changeset 3215:568dc3bf6c43

Add ECM file redboot_K70_FPU.ecm.
author vae
date Sat, 09 Mar 2013 18:00:22 +0000
parents 3a87a9603953
children f35f92c0b860
files packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog packages/hal/cortexm/kinetis/twr_k70f120m/current/misc/redboot_K70_ROM_FPU.ecm
diffstat 2 files changed, 87 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
@@ -1,6 +1,9 @@
+2013-03-09  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* misc/redboot_K70_ROM_FPU.ecm: Add ECM file
+
 2012-11-30  Ilija Kocho  <ilijak@siva.com.mk>
 
-	* misc/redboot_K70_ROM_FPU.ecm: Add ECM file
 	* cdl/hal_cortexm_kinetis_twr_k70f120m.cdl: Sync with variant changes due to
 	hardware floating point support. Implements CYGINT_HAL_FPV4_SP_D16.
 	Changed maximum peripheral bus clocks to 75MHz.
new file mode 100644
--- /dev/null
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/misc/redboot_K70_ROM_FPU.ecm
@@ -0,0 +1,83 @@
+# Redboot minimal configuration
+# Target: TWR-K70F120M
+# Startup: ROM with external RAM
+
+
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+    description "RedBoot Kinetis TWR-K70F120M" ;
+    package CYGPKG_IO_FLASH current ;
+    package CYGPKG_IO_ETH_DRIVERS current ;
+};
+
+cdl_option CYGHWR_HAL_CORTEXM_FPU {
+    user_value 1
+};
+
+cdl_option CYGHWR_HAL_CORTEXM_FPU_SWITCH {
+    user_value ALL
+};
+
+cdl_component CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP {
+    user_value 1
+};
+
+cdl_option CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP {
+    user_value 1
+};
+
+cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG {
+    user_value 0
+};
+
+#cdl_option CYGBLD_REDBOOT_LOAD_INTO_FLASH {
+#    user_value 1
+#};
+
+cdl_option CYGNUM_REDBOOT_FIS_DIRECTORY_BLOCK {
+    user_value -1
+};
+
+cdl_option CYGNUM_REDBOOT_FLASH_CONFIG_BLOCK {
+    user_value -2
+};
+
+cdl_option CYGNUM_REDBOOT_FIS_DIRECTORY_ENTRY_COUNT {
+    user_value 16
+};
+
+#cdl_option CYGNUM_REDBOOT_FLASH_RESERVED_BASE {
+#    user_value 0x20000
+#};
+
+cdl_option CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK {
+    user_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+    user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+    user_value 0
+};
+
+cdl_option CYGDBG_HAL_CRCTABLE_LOCATION {
+    user_value ROM
+};
+
+cdl_option CYGSEM_HAL_ROM_MONITOR {
+    user_value 1
+};
+
+cdl_component CYGPKG_DEVS_ETH_FREESCALE_ENET_REDBOOT_HOLDS_ESA {
+    user_value 1
+};