--- a/packages/hal/cortexm/kinetis/var/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/var/current/ChangeLog
@@ -1,3 +1,11 @@
+2014-05-05  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* cdl/hal_cortexm_kinetis.cdl:
+	* include/var_io_gpio.h:
+	* src/kinetis_gpio.c:    New
+	Add functions for Kinetis GPIO pin configuration and manipulation.
+	[ Bugzilla 1001981 ]
+
 2014-02-13  Ilija Kocho  <ilijak@siva.com.mk>
 
 	* cortexm/kinetis/var/current/include/var_intr.h:

--- a/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl
+++ b/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl
@@ -58,7 +58,7 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS {
         based Kinetis microcontroller family.
         It is also necessary to select a variant and platform HAL package."
 
-    compile       hal_diag.c kinetis_misc.c kinetis_clocking.c
+    compile       hal_diag.c kinetis_misc.c kinetis_clocking.c kinetis_gpio.c
 
     implements    CYGINT_HAL_DEBUG_GDB_STUBS
     implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK

--- a/packages/hal/cortexm/kinetis/var/current/include/var_io_gpio.h
+++ b/packages/hal/cortexm/kinetis/var/current/include/var_io_gpio.h
@@ -118,6 +118,20 @@ typedef volatile struct cyghwr_hal_kinet
 #define CYGHWR_HAL_KINETIS_GPIO_PIN_DDR_IN(__port, __pin)  \
   CYGHWR_HAL_KINETIS_GPIO(__port, pddr) &= ~BIT_(__pin)
 
+
+__externC void hal_gpio_pin_ddr_out(cyg_uint32 pin);
+__externC void hal_gpio_pin_ddr_in(cyg_uint32 pin);
+
+__externC cyg_uint32 hal_gpio_get_pin(cyg_uint32 pin);
+
+__externC void hal_gpio_port_clear(cyg_uint32 port_i, cyg_uint32 mask);
+__externC void hal_gpio_port_set(cyg_uint32 port_i, cyg_uint32 mask);
+__externC void hal_gpio_port_toggle(cyg_uint32 port_i, cyg_uint32 mask);
+
+__externC void hal_gpio_pin_clear(cyg_uint32 pin);
+__externC void hal_gpio_pin_set(cyg_uint32 pin);
+__externC void hal_gpio_pin_toggle(cyg_uint32 pin);
+
 //-----------------------------------------------------------------------------
 // end of var_io_gpio.h
 #endif // CYGONCE_HAL_VAR_IO_GPIO_H

new file mode 100644
--- /dev/null
+++ b/packages/hal/cortexm/kinetis/var/current/src/kinetis_gpio.c
@@ -0,0 +1,146 @@
+//==========================================================================
+//
+//      kinetis_gpio.c
+//
+//      Cortex-M Kinetis HAL functions
+//
+//==========================================================================
+// ####ECOSGPLCOPYRIGHTBEGIN####                                            
+// -------------------------------------------                              
+// This file is part of eCos, the Embedded Configurable Operating System.   
+// Copyright (C) 2014 Free Software Foundation, Inc.                        
+//
+// eCos is free software; you can redistribute it and/or modify it under    
+// the terms of the GNU General Public License as published by the Free     
+// Software Foundation; either version 2 or (at your option) any later      
+// version.                                                                 
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT      
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
+// for more details.                                                        
+//
+// You should have received a copy of the GNU General Public License        
+// along with eCos; if not, write to the Free Software Foundation, Inc.,    
+// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
+//
+// As a special exception, if other files instantiate templates or use      
+// macros or inline functions from this file, or you compile this file      
+// and link it with other works to produce a work based on this file,       
+// this file does not by itself cause the resulting work to be covered by   
+// the GNU General Public License. However the source code for this file    
+// must still be made available in accordance with section (3) of the GNU   
+// General Public License v2.                                               
+//
+// This exception does not invalidate any other reasons why a work based    
+// on this file might be covered by the GNU General Public License.         
+// -------------------------------------------                              
+// ####ECOSGPLCOPYRIGHTEND####                                              
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    ilijak
+// Date:         2014-02-05
+// Description:
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================
+
+#include <cyg/hal/hal_io.h>
+#include <cyg/hal/var_io_gpio.h>
+
+static cyghwr_hal_kinetis_gpio_t * const PortsGPIO[] = {
+    CYGHWR_HAL_KINETIS_GPIO_PORTA_P, CYGHWR_HAL_KINETIS_GPIO_PORTB_P,
+    CYGHWR_HAL_KINETIS_GPIO_PORTC_P, CYGHWR_HAL_KINETIS_GPIO_PORTD_P,
+    CYGHWR_HAL_KINETIS_GPIO_PORTE_P, CYGHWR_HAL_KINETIS_GPIO_PORTF_P
+};
+
+void
+hal_gpio_pin_ddr_out(cyg_uint32 pin){
+    cyghwr_hal_kinetis_gpio_t *port_p;
+
+    if(pin != CYGHWR_HAL_KINETIS_PIN_NONE) {
+        port_p = PortsGPIO[CYGHWR_HAL_KINETIS_PIN_PORT(pin)];
+        port_p->pddr |= BIT_(CYGHWR_HAL_KINETIS_PIN_BIT(pin));
+    }    
+}
+
+void
+hal_gpio_pin_ddr_in(cyg_uint32 pin){
+    cyghwr_hal_kinetis_gpio_t *port_p;
+
+    if(pin != CYGHWR_HAL_KINETIS_PIN_NONE) {
+        port_p = PortsGPIO[CYGHWR_HAL_KINETIS_PIN_PORT(pin)];
+        port_p->pddr &= ~BIT_(CYGHWR_HAL_KINETIS_PIN_BIT(pin));
+    }    
+}
+
+cyg_uint32
+hal_gpio_get_pin(cyg_uint32 pin){
+    cyghwr_hal_kinetis_gpio_t *port_p;
+    cyg_uint32 retval = 0xffffffff;
+    
+    if(pin != CYGHWR_HAL_KINETIS_PIN_NONE) {
+        port_p = PortsGPIO[CYGHWR_HAL_KINETIS_PIN_PORT(pin)];
+        retval = port_p->pdir & BIT_(CYGHWR_HAL_KINETIS_PIN_BIT(pin));
+    }
+    return retval;
+}
+
+
+// GPIO register on a given port (register name is lower case)
+#define CYGHWR_HAL_KINETIS_GPIO_PORT_OPER(__port, __mask, __opreg) \
+CYG_MACRO_START                                                    \
+    cyghwr_hal_kinetis_gpio_t *port_p;                             \
+    port_p = PortsGPIO[__port];                                    \
+    port_p->__opreg = __mask;                                      \
+CYG_MACRO_END
+
+#define CYGHWR_HAL_KINETIS_GPIO_PIN_OPER(__pin, __opreg)                                 \
+CYG_MACRO_START                                                                          \
+if(__pin != CYGHWR_HAL_KINETIS_PIN_NONE)                                                 \
+    CYGHWR_HAL_KINETIS_GPIO_PORT_OPER(CYGHWR_HAL_KINETIS_PIN_PORT(__pin),                \
+                                      BIT_(CYGHWR_HAL_KINETIS_PIN_BIT(__pin)), __opreg); \
+CYG_MACRO_END
+
+// Port operations
+// Bit operations (clear, set or toggle) are performed on port's bits
+// that correspond to set bits in the mask parameter.
+
+void
+hal_gpio_port_clear(cyg_uint32 port_i, cyg_uint32 mask){
+    CYGHWR_HAL_KINETIS_GPIO_PORT_OPER(port_i, mask, pcor);
+}
+
+void
+hal_gpio_port_set(cyg_uint32 port_i, cyg_uint32 mask){
+    CYGHWR_HAL_KINETIS_GPIO_PORT_OPER(port_i, mask, psor);
+}
+
+void
+hal_gpio_port_toggle(cyg_uint32 port_i, cyg_uint32 mask){
+    CYGHWR_HAL_KINETIS_GPIO_PORT_OPER(port_i, mask, ptor);
+}
+
+// Pin operations.
+// Operation is performed to a given pin. Thin is addresses through
+// a pin descriptor. Pin descriptor is typically created with CYGHWR_HAL_KINETIS_PIN_CFG()
+// or CYGHWR_HAL_KINETIS_PIN() [ defined in var_io.h ]
+
+void
+hal_gpio_pin_clear(cyg_uint32 pin){
+    CYGHWR_HAL_KINETIS_GPIO_PIN_OPER(pin, pcor);
+}
+
+void
+hal_gpio_pin_set(cyg_uint32 pin){
+    CYGHWR_HAL_KINETIS_GPIO_PIN_OPER(pin, psor);
+}
+
+void
+hal_gpio_pin_toggle(cyg_uint32 pin){
+    CYGHWR_HAL_KINETIS_GPIO_PIN_OPER(pin, ptor);
+}
+
+// EOF kinetis_gpio.c