changeset 3243:fa4455042d3c

Add requirement for WRITETHRU data cache startup mode when eDMA is in use. Sync with change in eDMA driver [ Bugzilla 1001838 ]
author vae
date Sun, 02 Jun 2013 16:39:24 +0000
parents 1b3a6c3f449e
children f6140ea7e34d
files packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
diffstat 2 files changed, 10 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
@@ -1,3 +1,10 @@
+2013-04-09  Ilija Kocho <ilijak@siva.com.mk>
+
+	* cdl/hal_cortexm_kinetis_twr_k70f120m.cdl:
+
+	Add requirement for WRITETHRU data cache startup mode when eDMA is in use.
+	Sync with change in eDMA driver [ Bugzilla 1001838 ]
+
 2013-04-09  Ilija Kocho <ilijak@siva.com.mk>
 
 	* cdl/hal_cortexm_kinetis_twr_k70f120m.cdl:
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
@@ -320,6 +320,9 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS_T
         requires CYGHWR_DEVS_SPI_FREESCALE_DSPI1 == 1
         implements CYGINT_DEVS_SPI_FREESCALE_DSPI1
         implements CYGINT_FREESCALE_DSPI1_HAS_MASS
+        requires  { (is_active(CYGSEM_HAL_DCACHE_STARTUP_MODE)
+                    && CYGINT_DEVS_SPI_DSPI_DMA_USE)
+                    implies CYGSEM_HAL_DCACHE_STARTUP_MODE == "WRITETHRU" }
 
         cdl_option CYGHWR_DEVS_DISK_MMC_FREESCALE_DSPI_CS {
             display "Device number (CS)"