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comparison packages/hal/arm/edb7xxx/current/src/edb7xxx_misc.c @ 115:6ed91473a1cd ecos-sw-2000-08-21

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Merge from eCos master repository on 2000-08-21-22:40:54-BST
author jlarmour
date Fri, 25 Aug 2000 17:32:38 +0000
parents 84e4bde58b26
children f935b880e96c
comparison
equal deleted inserted replaced
114:5ad2b71d525e 115:6ed91473a1cd
76 #else 76 #else
77 #err Invalid CPU clock frequency 77 #err Invalid CPU clock frequency
78 #endif 78 #endif
79 79
80 static cyg_uint32 _period; 80 static cyg_uint32 _period;
81 void dram_delay_loop(void);
81 82
82 // Use Timer/Counter #2 for system clock 83 // Use Timer/Counter #2 for system clock
83 84
84 void hal_clock_initialize(cyg_uint32 period) 85 void hal_clock_initialize(cyg_uint32 period)
85 { 86 {
133 // EP7209 has no DRAM/controller, thus no problem 134 // EP7209 has no DRAM/controller, thus no problem
134 enable_FIQ(); // Should be safe here 135 enable_FIQ(); // Should be safe here
135 #ifdef CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH 136 #ifdef CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH
136 do_DRAM_refresh(); 137 do_DRAM_refresh();
137 #else 138 #else
138 // Temporary fix for DRAM starvation problem 139 dram_delay_loop();
139 if (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK > 37000) {
140 int i;
141 for (i = 0; i < (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK*2)/24; i++) ; // approx 300 us
142 }
143 #endif 140 #endif
144 #endif 141 #endif
145 } 142 }
146 143
147 // Read the current value of the clock, returning the number of hardware "ticks" 144 // Read the current value of the clock, returning the number of hardware "ticks"
152 volatile cyg_int32 *tc2d = (volatile cyg_int32 *)TC2D; 149 volatile cyg_int32 *tc2d = (volatile cyg_int32 *)TC2D;
153 static cyg_int32 clock_val; 150 static cyg_int32 clock_val;
154 clock_val = *tc2d & 0x0000FFFF; // Register has only 16 bits 151 clock_val = *tc2d & 0x0000FFFF; // Register has only 16 bits
155 if (clock_val & 0x00008000) clock_val |= 0xFFFF8000; // Extend sign bit 152 if (clock_val & 0x00008000) clock_val |= 0xFFFF8000; // Extend sign bit
156 *pvalue = (cyg_uint32)(_period - clock_val); // 'clock_val' counts down and wraps 153 *pvalue = (cyg_uint32)(_period - clock_val); // 'clock_val' counts down and wraps
154 }
155
156 // Delay for some number of useconds. Assume that the system clock
157 // has been set up to run at 512KHz (default).
158 void hal_delay_us(int us)
159 {
160 volatile cyg_int32 *tc2d = (volatile cyg_int32 *)TC2D;
161 cyg_int32 val, prev;
162 while (us >= 2) {
163 prev = *tc2d & 0x0000FFFF; // Register has only 16 bits
164 if (prev & 0x00008000) prev |= 0xFFFF8000; // Extend sign bit
165 while (true) {
166 val = *tc2d & 0x0000FFFF; // Register has only 16 bits
167 if (val & 0x00008000) {
168 val |= 0xFFFF8000; // Extend sign bit
169 *tc2d = _period; // Need to reset counter
170 }
171 if (val != prev) {
172 break; // At least 2us have passed
173 }
174 }
175 us -= 2;
176 }
157 } 177 }
158 178
159 void 179 void
160 dram_delay_loop(void) 180 dram_delay_loop(void)
161 { 181 {
392 &batlow_interrupt); 412 &batlow_interrupt);
393 cyg_drv_interrupt_attach(batlow_interrupt_handle); 413 cyg_drv_interrupt_attach(batlow_interrupt_handle);
394 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_BLINT); 414 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_BLINT);
395 #endif 415 #endif
396 416
417 // Initialize real-time clock (for delays, etc, even if kernel doesn't use it)
418 hal_clock_initialize(CYGNUM_HAL_RTC_PERIOD);
419
397 // Set up eCos/ROM interfaces 420 // Set up eCos/ROM interfaces
398 hal_if_init(); 421 hal_if_init();
399 } 422 }
400 423
401 // 424 //