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comparison packages/hal/arm/sa11x0/assabet/current/misc/cf_test.c @ 115:6ed91473a1cd ecos-sw-2000-08-21

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Merge from eCos master repository on 2000-08-21-22:40:54-BST
author jlarmour
date Fri, 25 Aug 2000 17:32:38 +0000
parents ff3f181b64bd
children
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114:5ad2b71d525e 115:6ed91473a1cd
35 // Contributors: gthomas 35 // Contributors: gthomas
36 // Date: 2000-06-05 36 // Date: 2000-06-05
37 // Description: Tool used to test CF stuff 37 // Description: Tool used to test CF stuff
38 //####DESCRIPTIONEND#### 38 //####DESCRIPTIONEND####
39 39
40 #include <pkgconf/system.h>
41 #ifdef CYGPKG_IO_PCMCIA
40 #include <pkgconf/kernel.h> // Configuration header 42 #include <pkgconf/kernel.h> // Configuration header
41 #include <cyg/kernel/kapi.h> 43 #include <cyg/kernel/kapi.h>
42 #include <cyg/infra/diag.h> 44 #include <cyg/infra/diag.h>
43 45
44 #include <cyg/hal/hal_io.h> // IO macros 46 #include <cyg/hal/hal_io.h> // IO macros
45 #include <cyg/hal/hal_arch.h> // Register state info 47 #include <cyg/hal/hal_arch.h> // Register state info
46 #include <cyg/hal/hal_intr.h> // HAL interrupt macros 48 #include <cyg/hal/hal_intr.h> // HAL interrupt macros
49
50 #include <cyg/io/pcmcia.h>
47 51
48 #include <cyg/hal/hal_sa11x0.h> // Board definitions 52 #include <cyg/hal/hal_sa11x0.h> // Board definitions
49 #include <cyg/hal/assabet.h> 53 #include <cyg/hal/assabet.h>
50 54
51 #ifndef FALSE 55 #ifndef FALSE
56 #define STACK_SIZE 4096 60 #define STACK_SIZE 4096
57 static char stack[STACK_SIZE]; 61 static char stack[STACK_SIZE];
58 static cyg_thread thread_data; 62 static cyg_thread thread_data;
59 static cyg_handle_t thread_handle; 63 static cyg_handle_t thread_handle;
60 64
61 static cyg_interrupt cf_interrupt;
62 static cyg_handle_t cf_interrupt_handle;
63
64 // FUNCTIONS 65 // FUNCTIONS
65 66
66 static void 67 static void
67 cyg_test_exit(void) 68 cyg_test_exit(void)
68 { 69 {
69 while (TRUE) ; 70 while (TRUE) ;
70 } 71 }
71 72
72 // This ISR is called when a CompactFlash board is inserted
73 static int
74 cf_detect_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
75 {
76 cyg_interrupt_mask(SA1110_CF_DETECT);
77 return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR
78 }
79
80 // This DSR handles the board insertion
81 static void
82 cf_detect_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
83 {
84 unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL;
85 diag_printf("CF card inserted, state: %x\n", new_state);
86 cyg_interrupt_acknowledge(SA1110_CF_DETECT);
87 cyg_interrupt_unmask(SA1110_CF_DETECT);
88 }
89
90 static void 73 static void
91 cf_test(cyg_addrword_t p) 74 cf_test(cyg_addrword_t p)
92 { 75 {
93 unsigned long cf_state; 76 int len, ptr;
77 unsigned char buf[256];
78 unsigned char *en0;
79 unsigned long cor = 0, regs;
80 struct cf_cftable cftable;
81 struct cf_config config;
82 struct cf_slot *slot;
83
94 diag_printf("CF test here\n"); 84 diag_printf("CF test here\n");
95 // Disable CF bus & power (idle/off) 85 cf_init();
96 assabet_BCR(SA1110_BCR_CF_POWER | 86 slot = cf_get_slot(0);
97 SA1110_BCR_CF_RESET | 87 en0 = slot->io;
98 SA1110_BCR_CF_BUS,
99 SA1110_BCR_CF_POWER_OFF |
100 SA1110_BCR_CF_RESET_DISABLE |
101 SA1110_BCR_CF_BUS_OFF);
102 while (1) { 88 while (1) {
103 cf_state = *SA11X0_GPIO_PIN_LEVEL; 89 if (slot->state == CF_SLOT_STATE_Inserted) {
104 if ((cf_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) {
105 diag_printf("Compact Flash card inserted!\n"); 90 diag_printf("Compact Flash card inserted!\n");
106 diag_dump_buf(0x30000000, 0x100); 91 cf_change_state(slot, CF_SLOT_STATE_Ready);
92 diag_dump_buf(slot->attr, slot->attr_length);
93 len = sizeof(buf);
94 ptr = 0;
95 if (cf_get_CIS(slot, CF_CISTPL_MANFID, buf, &len, &ptr)) {
96 diag_printf("CIS 0x20:\n");
97 diag_dump_buf(buf, len);
98 }
99 ptr = 0;
100 if (cf_get_CIS(slot, CF_CISTPL_VERS_1, buf, &len, &ptr)) {
101 diag_printf("CIS 0x15:\n");
102 diag_dump_buf(buf, len);
103 }
104 ptr = 0;
105 if (cf_get_CIS(slot, CF_CISTPL_CONFIG, buf, &len, &ptr)) {
106 diag_printf("CIS 0x1A:\n");
107 diag_dump_buf(buf, len);
108 }
109 if (cf_parse_config(buf, len, &config)) {
110 cor = config.base;
111 diag_printf("COR = %x\n", cor);
112 }
113 ptr = 0;
114 while (cf_get_CIS(slot, CF_CISTPL_CFTABLE_ENTRY, buf, &len, &ptr)) {
115 diag_printf("CIS 0x1B:\n");
116 diag_dump_buf(buf, len);
117 if (cf_parse_cftable(buf, len, &cftable)) {
118 regs = cftable.io_space.base[0];
119 cf_set_COR(slot, cor, cftable.cor);
120 en0[regs+0x00] = 0x21;
121 en0[regs+0x0E] = 0x49;
122 en0[regs+0x00] = 0x61;
123 diag_dump_buf(en0+regs, 0x10);
124 en0[regs+0x00] = 0x21;
125 diag_dump_buf(en0+regs, 0x10);
126 }
127 }
107 break; 128 break;
108 } 129 }
109 } 130 }
110 cyg_test_exit(); 131 cyg_test_exit();
111 } 132 }
112 133
113 externC void 134 externC void
114 cyg_start( void ) 135 cyg_start( void )
115 { 136 {
116 // Set up interrupts
117 cyg_interrupt_create(SA1110_CF_DETECT,
118 99, // Priority - what goes here?
119 0, // Data item passed to interrupt handler
120 (cyg_ISR_t *)cf_detect_isr,
121 (cyg_DSR_t *)cf_detect_dsr,
122 &cf_interrupt_handle,
123 &cf_interrupt);
124 cyg_interrupt_attach(cf_interrupt_handle);
125 cyg_interrupt_configure(SA1110_CF_DETECT, true, true); // Detect either edge
126 cyg_interrupt_acknowledge(SA1110_CF_DETECT);
127 cyg_interrupt_unmask(SA1110_CF_DETECT);
128 // Create a main thread, so we can run the scheduler and have time 'pass' 137 // Create a main thread, so we can run the scheduler and have time 'pass'
129 cyg_thread_create(10, // Priority - just a number 138 cyg_thread_create(10, // Priority - just a number
130 cf_test, // entry 139 cf_test, // entry
131 0, // entry parameter 140 0, // entry parameter
132 "CompactFlash test", // Name 141 "CompactFlash test", // Name
136 &thread_data // Thread data structure 145 &thread_data // Thread data structure
137 ); 146 );
138 cyg_thread_resume(thread_handle); // Start it 147 cyg_thread_resume(thread_handle); // Start it
139 cyg_scheduler_start(); 148 cyg_scheduler_start();
140 } // cyg_package_start() 149 } // cyg_package_start()
150 #endif