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comparison packages/devs/pcmcia/arm/assabet/current/src/assabet_pcmcia.c @ 119:77cec8369160 ecos-sw-2000-09-01

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Merge from eCos master repository on 2000-09-01-07:47:03-BST
author jlarmour
date Fri, 01 Sep 2000 13:45:23 +0000
parents bd1a71e3e476
children 518f42066aba
comparison
equal deleted inserted replaced
118:59c1a83fb200 119:77cec8369160
101 // This DSR handles the card interrupt 101 // This DSR handles the card interrupt
102 static void 102 static void
103 cf_irq_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) 103 cf_irq_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
104 { 104 {
105 struct cf_slot *slot = (struct cf_slot *)data; 105 struct cf_slot *slot = (struct cf_slot *)data;
106 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
107 cyg_bool was_ctrlc_int;
108 #endif
109
106 // Clear interrupt [edge indication] 110 // Clear interrupt [edge indication]
107 cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); 111 cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ);
112 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
113 was_ctrlc_int = HAL_CTRLC_CHECK(vector, data);
114 if (!was_ctrlc_int) // Fall through and run normal code
115 #endif
108 // Process interrupt 116 // Process interrupt
109 (slot->irq_handler.handler)(slot->irq_handler.param); 117 (slot->irq_handler.handler)(slot->irq_handler.param);
110 // Allow interrupts to happen again 118 // Allow interrupts to happen again
111 cyg_drv_interrupt_unmask(SA1110_CF_IRQ); 119 cyg_drv_interrupt_unmask(SA1110_CF_IRQ);
112 } 120 }
141 (cyg_ISR_t *)cf_irq_isr, 149 (cyg_ISR_t *)cf_irq_isr,
142 (cyg_DSR_t *)cf_irq_dsr, 150 (cyg_DSR_t *)cf_irq_dsr,
143 &cf_irq_interrupt_handle, 151 &cf_irq_interrupt_handle,
144 &cf_irq_interrupt); 152 &cf_irq_interrupt);
145 cyg_drv_interrupt_attach(cf_irq_interrupt_handle); 153 cyg_drv_interrupt_attach(cf_irq_interrupt_handle);
154 cyg_drv_interrupt_unmask(SA1110_CF_IRQ);
155 #endif
156 cyg_drv_interrupt_configure(SA1110_CF_IRQ, false, false); // Falling edge
146 cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); 157 cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ);
147 cyg_drv_interrupt_unmask(SA1110_CF_IRQ);
148 #endif
149 cyg_drv_interrupt_configure(SA1110_CF_IRQ, false, false); // Falling edge
150 } 158 }
151 slot->attr = (unsigned char *)0x38000000; 159 slot->attr = (unsigned char *)0x38000000;
152 slot->attr_length = 0x200; 160 slot->attr_length = 0x200;
153 slot->io = (unsigned char *)0x30000000; 161 slot->io = (unsigned char *)0x30000000;
154 slot->io_length = 0x04000000; 162 slot->io_length = 0x04000000;
155 slot->mem = (unsigned char *)0x3C000000; 163 slot->mem = (unsigned char *)0x3C000000;
156 slot->mem_length = 0x04000000; 164 slot->mem_length = 0x04000000;
157 slot->int_num = SA1110_CF_IRQ; 165 slot->int_num = SA1110_CF_IRQ;
166 #ifdef CYG_HAL_STARTUP_ROM
158 // Disable CF bus & power (idle/off) 167 // Disable CF bus & power (idle/off)
159 assabet_BCR(SA1110_BCR_CF_POWER | 168 assabet_BCR(SA1110_BCR_CF_POWER |
160 SA1110_BCR_CF_RESET | 169 SA1110_BCR_CF_RESET |
161 SA1110_BCR_CF_BUS, 170 SA1110_BCR_CF_BUS,
162 SA1110_BCR_CF_POWER_OFF | 171 SA1110_BCR_CF_POWER_OFF |
163 SA1110_BCR_CF_RESET_DISABLE | 172 SA1110_BCR_CF_RESET_DISABLE |
164 SA1110_BCR_CF_BUS_OFF); 173 SA1110_BCR_CF_BUS_OFF);
174 #endif
165 if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) { 175 if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) {
166 slot->state = CF_SLOT_STATE_Inserted; 176 if ((_assabet_BCR & SA1110_BCR_CF_POWER) == SA1110_BCR_CF_POWER_ON) {
177 // Assume that the ROM environment has turned the bus on
178 slot->state = CF_SLOT_STATE_Ready;
179 } else {
180 slot->state = CF_SLOT_STATE_Inserted;
181 }
167 } else { 182 } else {
168 slot->state = CF_SLOT_STATE_Empty; 183 slot->state = CF_SLOT_STATE_Empty;
169 } 184 }
170 } 185 }
171 186