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comparison packages/hal/arm/sa11x0/var/current/include/hal_sa11x0.h @ 132:0ae0bc38e387 ecos-sw-2000-10-31

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Merge from eCos master repository on 2000-10-31-00:30:36-GMT
author jlarmour
date Tue, 31 Oct 2000 20:53:09 +0000
parents ff3f181b64bd
children e2d866e32dac
comparison
equal deleted inserted replaced
131:8461114e4f19 132:0ae0bc38e387
30 //####COPYRIGHTEND#### 30 //####COPYRIGHTEND####
31 //========================================================================== 31 //==========================================================================
32 //#####DESCRIPTIONBEGIN#### 32 //#####DESCRIPTIONBEGIN####
33 // 33 //
34 // Author(s): gthomas 34 // Author(s): gthomas
35 // Contributors: gthomas 35 // Contributors: gthomas, dmoseley
36 // Date: 2000-04-04 36 // Date: 2000-04-04
37 // Purpose: Platform register definitions 37 // Purpose: Platform register definitions
38 // Description: 38 // Description:
39 // 39 //
40 //####DESCRIPTIONEND#### 40 //####DESCRIPTIONEND####
662 #define SA11X0_STATIC_ROM_BANK_3(x) (((x) & 0xFFFF) << 16) 662 #define SA11X0_STATIC_ROM_BANK_3(x) (((x) & 0xFFFF) << 16)
663 663
664 /* 664 /*
665 * SA-1100 GPIO Register Definitions 665 * SA-1100 GPIO Register Definitions
666 */ 666 */
667 #define SA11X0_GPIO_PIN_0 BIT0 667 #define SA11X0_GPIO_PIN_0 (1 << 0)
668 #define SA11X0_GPIO_PIN_1 BIT1 668 #define SA11X0_GPIO_PIN_1 (1 << 1)
669 #define SA11X0_GPIO_PIN_2 BIT2 669 #define SA11X0_GPIO_PIN_2 (1 << 2)
670 #define SA11X0_GPIO_PIN_3 BIT3 670 #define SA11X0_GPIO_PIN_3 (1 << 3)
671 #define SA11X0_GPIO_PIN_4 BIT4 671 #define SA11X0_GPIO_PIN_4 (1 << 4)
672 #define SA11X0_GPIO_PIN_5 BIT5 672 #define SA11X0_GPIO_PIN_5 (1 << 5)
673 #define SA11X0_GPIO_PIN_6 BIT6 673 #define SA11X0_GPIO_PIN_6 (1 << 6)
674 #define SA11X0_GPIO_PIN_7 BIT7 674 #define SA11X0_GPIO_PIN_7 (1 << 7)
675 #define SA11X0_GPIO_PIN_8 BIT8 675 #define SA11X0_GPIO_PIN_8 (1 << 8)
676 #define SA11X0_GPIO_PIN_9 BIT9 676 #define SA11X0_GPIO_PIN_9 (1 << 9)
677 #define SA11X0_GPIO_PIN_10 BIT10 677 #define SA11X0_GPIO_PIN_10 (1 << 10)
678 #define SA11X0_GPIO_PIN_11 BIT11 678 #define SA11X0_GPIO_PIN_11 (1 << 11)
679 #define SA11X0_GPIO_PIN_12 BIT12 679 #define SA11X0_GPIO_PIN_12 (1 << 12)
680 #define SA11X0_GPIO_PIN_13 BIT13 680 #define SA11X0_GPIO_PIN_13 (1 << 13)
681 #define SA11X0_GPIO_PIN_14 BIT14 681 #define SA11X0_GPIO_PIN_14 (1 << 14)
682 #define SA11X0_GPIO_PIN_15 BIT15 682 #define SA11X0_GPIO_PIN_15 (1 << 15)
683 #define SA11X0_GPIO_PIN_16 BIT16 683 #define SA11X0_GPIO_PIN_16 (1 << 16)
684 #define SA11X0_GPIO_PIN_17 BIT17 684 #define SA11X0_GPIO_PIN_17 (1 << 17)
685 #define SA11X0_GPIO_PIN_18 BIT18 685 #define SA11X0_GPIO_PIN_18 (1 << 18)
686 #define SA11X0_GPIO_PIN_19 BIT19 686 #define SA11X0_GPIO_PIN_19 (1 << 19)
687 #define SA11X0_GPIO_PIN_20 BIT20 687 #define SA11X0_GPIO_PIN_20 (1 << 20)
688 #define SA11X0_GPIO_PIN_21 BIT21 688 #define SA11X0_GPIO_PIN_21 (1 << 21)
689 #define SA11X0_GPIO_PIN_22 BIT22 689 #define SA11X0_GPIO_PIN_22 (1 << 22)
690 #define SA11X0_GPIO_PIN_23 BIT23 690 #define SA11X0_GPIO_PIN_23 (1 << 23)
691 #define SA11X0_GPIO_PIN_24 BIT24 691 #define SA11X0_GPIO_PIN_24 (1 << 24)
692 #define SA11X0_GPIO_PIN_25 BIT25 692 #define SA11X0_GPIO_PIN_25 (1 << 25)
693 #define SA11X0_GPIO_PIN_26 BIT26 693 #define SA11X0_GPIO_PIN_26 (1 << 26)
694 #define SA11X0_GPIO_PIN_27 BIT27 694 #define SA11X0_GPIO_PIN_27 (1 << 27)
695 695
696 #define SA11X0_GPIO_PIN_LEVEL SA11X0_REGISTER(0x10040000) 696 #define SA11X0_GPIO_PIN_LEVEL SA11X0_REGISTER(0x10040000)
697 #define SA11X0_GPIO_PIN_DIRECTION SA11X0_REGISTER(0x10040004) 697 #define SA11X0_GPIO_PIN_DIRECTION SA11X0_REGISTER(0x10040004)
698 #define SA11X0_GPIO_PIN_OUTPUT_SET SA11X0_REGISTER(0x10040008) 698 #define SA11X0_GPIO_PIN_OUTPUT_SET SA11X0_REGISTER(0x10040008)
699 #define SA11X0_GPIO_PIN_OUTPUT_CLEAR SA11X0_REGISTER(0x1004000C) 699 #define SA11X0_GPIO_PIN_OUTPUT_CLEAR SA11X0_REGISTER(0x1004000C)