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comparison packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c @ 2818:7894f6bee6e5

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* src/ser_16x5x.c: Allow platform code to override the default implementation for writing the LCR register and reading the ISR register by using the SER_16X5X_WRITE_LCR() and SER_16X5X_READ_ISR() macros.
author jlarmour
date Thu, 19 Feb 2009 01:02:15 +0000
parents 74dbf4c3f2e1
children
comparison
equal deleted inserted replaced
2817:6e1e5c6da98e 2818:7894f6bee6e5
227 227
228 #ifndef CYG_IO_SERIAL_GENERIC_16X5X_INT_PRIORITY 228 #ifndef CYG_IO_SERIAL_GENERIC_16X5X_INT_PRIORITY
229 # define CYG_IO_SERIAL_GENERIC_16X5X_INT_PRIORITY 4 229 # define CYG_IO_SERIAL_GENERIC_16X5X_INT_PRIORITY 4
230 #endif 230 #endif
231 231
232 // Allow platform code to override the default implementation of
233 // a write to the LCR
234 #ifndef SER_16X5X_WRITE_LCR
235 #define SER_16X5X_WRITE_LCR(_base_, _val_) HAL_WRITE_UINT8((_base_) + REG_lcr, _val_)
236 #endif
237
238 // Allow platform code to override the default implementation of
239 // a read of the ISR
240 #ifndef SER_16X5X_READ_ISR
241 #define SER_16X5X_READ_ISR(_base_, _val_) HAL_READ_UINT8((_base_) + REG_isr, _val_)
242 #endif
232 243
233 // Internal function to actually configure the hardware to desired 244 // Internal function to actually configure the hardware to desired
234 // baud rate, etc. 245 // baud rate, etc.
235 static bool 246 static bool
236 serial_config_port(serial_channel *chan, 247 serial_config_port(serial_channel *chan,
257 HAL_WRITE_UINT8(base+REG_ier, 0); 268 HAL_WRITE_UINT8(base+REG_ier, 0);
258 269
259 _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | 270 _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] |
260 select_stop_bits[new_config->stop] | 271 select_stop_bits[new_config->stop] |
261 select_parity[new_config->parity]; 272 select_parity[new_config->parity];
262 HAL_WRITE_UINT8(base+REG_lcr, _lcr | LCR_DL); 273 SER_16X5X_WRITE_LCR(base, _lcr | LCR_DL);
263 HAL_WRITE_UINT8(base+REG_mdl, baud_divisor >> 8); 274 HAL_WRITE_UINT8(base+REG_mdl, baud_divisor >> 8);
264 HAL_WRITE_UINT8(base+REG_ldl, baud_divisor & 0xFF); 275 HAL_WRITE_UINT8(base+REG_ldl, baud_divisor & 0xFF);
265 HAL_WRITE_UINT8(base+REG_lcr, _lcr); 276 SER_16X5X_WRITE_LCR(base, _lcr);
266 if (init) { 277 if (init) {
267 #ifdef CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO 278 #ifdef CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO
268 unsigned char _fcr_thresh; 279 unsigned char _fcr_thresh;
269 cyg_uint8 b; 280 cyg_uint8 b;
270 281
578 cyg_addrword_t base = ser_chan->base; 589 cyg_addrword_t base = ser_chan->base;
579 cyg_uint8 _isr; 590 cyg_uint8 _isr;
580 591
581 // Check if we have an interrupt pending - note that the interrupt 592 // Check if we have an interrupt pending - note that the interrupt
582 // is pending of the low bit of the isr is *0*, not 1. 593 // is pending of the low bit of the isr is *0*, not 1.
583 HAL_READ_UINT8(base+REG_isr, _isr); 594 SER_16X5X_READ_ISR(base, _isr);
584 while ((_isr & ISR_nIP) == 0) { 595 while ((_isr & ISR_nIP) == 0) {
585 switch (_isr&0xE) { 596 switch (_isr&0xE) {
586 case ISR_Rx: 597 case ISR_Rx:
587 case ISR_RxTO: 598 case ISR_RxTO:
588 { 599 {