Mercurial > ecos-v3_0-branch
comparison packages/hal/arm/cl7211/current/src/cl7211_misc.c @ 42:94fd8fbfe8fe ecos-sw-1999-10-05
Merge from eCos master repository on 1999-10-05-12:38:44-BST
| author | jlarmour |
|---|---|
| date | Tue, 05 Oct 1999 12:09:26 +0000 |
| parents | e7ba79f6d3a8 |
| children | a0774359f013 |
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| 41:7b92742d1d6f | 42:94fd8fbfe8fe |
|---|---|
| 234 int vector; | 234 int vector; |
| 235 // Clear and initialize instruction cache | 235 // Clear and initialize instruction cache |
| 236 HAL_ICACHE_INVALIDATE_ALL(); | 236 HAL_ICACHE_INVALIDATE_ALL(); |
| 237 HAL_ICACHE_ENABLE(); | 237 HAL_ICACHE_ENABLE(); |
| 238 // Any hardware/platform initialization that needs to be done. | 238 // Any hardware/platform initialization that needs to be done. |
| 239 *(volatile cyg_uint32 *)INTMR1 = 0; | |
| 240 *(volatile cyg_uint32 *)INTMR2 = 0; | |
| 241 #if !defined(__CL7111) | |
| 242 *(volatile cyg_uint32 *)INTMR3 = 0; | |
| 243 *(volatile cyg_uint8 *)SYSCON3 = SYSCON3_CLKCTL(CPU_CLOCK); | |
| 244 #endif | |
| 239 #if 0 | 245 #if 0 |
| 240 diag_printf("IMR1: %04x, IMR2: %04x\n", | 246 diag_printf("IMR1: %04x, IMR2: %04x\n", |
| 241 *(volatile cyg_uint32 *)INTMR1, | 247 *(volatile cyg_uint32 *)INTMR1, |
| 242 *(volatile cyg_uint32 *)INTMR2); | 248 *(volatile cyg_uint32 *)INTMR2); |
| 243 diag_printf("Memcfg1: %08x, Memcfg2: %08x, DRAM refresh: %08x\n", | 249 diag_printf("Memcfg1: %08x, Memcfg2: %08x, DRAM refresh: %08x\n", |
| 244 *(volatile cyg_uint32 *)MEMCFG1, | 250 *(volatile cyg_uint32 *)MEMCFG1, |
| 245 *(volatile cyg_uint32 *)MEMCFG2, | 251 *(volatile cyg_uint32 *)MEMCFG2, |
| 246 *(volatile cyg_uint8 *)DRFPR); | 252 *(volatile cyg_uint8 *)DRFPR); |
| 247 #endif | 253 #endif |
| 248 // Reset all interrupt masks (disable all interrupt sources) | 254 // Reset all interrupt masks (disable all interrupt sources) |
| 249 *(volatile cyg_uint32 *)INTMR1 = 0; | |
| 250 *(volatile cyg_uint32 *)INTMR2 = 0; | |
| 251 #if !defined(__CL7111) | |
| 252 *(volatile cyg_uint32 *)INTMR3 = 0; | |
| 253 *(volatile cyg_uint8 *)SYSCON3 = SYSCON3_CLKCTL(CPU_CLOCK); | |
| 254 #endif | |
| 255 for (vector = CYGNUM_HAL_ISR_MIN; vector < CYGNUM_HAL_ISR_COUNT; vector++) { | 255 for (vector = CYGNUM_HAL_ISR_MIN; vector < CYGNUM_HAL_ISR_COUNT; vector++) { |
| 256 icr = (volatile cyg_uint32 *)hal_interrupt_clear_map[vector]; | 256 icr = (volatile cyg_uint32 *)hal_interrupt_clear_map[vector]; |
| 257 if (icr) *icr = 0; // Just a write clears the latch | 257 if (icr) *icr = 0; // Just a write clears the latch |
| 258 } | 258 } |
| 259 // Turn on the DIAG LED to let the world know the board is alive | 259 // Turn on the DIAG LED to let the world know the board is alive |
