Mercurial > ecos-v3_0-branch
comparison packages/devs/spi/arm/lpc2xxx/current/src/spi_lpc2xxx.cxx @ 2809:a0730cb32880
* cdl/spi_lpc2xxx.cdl: Ensure the SPI interrupts are using different
priorities: CYGNUM_IO_SPI_ARM_LPC2XXX_SPI{0,1}_INTPRIO entered.
* include/spi_lpc2xxx.h: cyg_spi_lpc2xxx_bus_t: spi_prio field added.
* src/spi_lpc2xxx.cxx: spi_lpc2xxx_set_config(): fixed copy & paste
typo, spi_lpc2xxx_init_bus(): added 'prio' argument to initializer.
| author | jlarmour |
|---|---|
| date | Tue, 17 Feb 2009 00:51:30 +0000 |
| parents | 6d113aa28eb1 |
| children | 3fdf0d74f32d |
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| 2808:ef21b86ad6b9 | 2809:a0730cb32880 |
|---|---|
| 178 cyg_uint32 *len) | 178 cyg_uint32 *len) |
| 179 { | 179 { |
| 180 cyg_spi_lpc2xxx_dev_t *dev = (cyg_spi_lpc2xxx_dev_t *) device; | 180 cyg_spi_lpc2xxx_dev_t *dev = (cyg_spi_lpc2xxx_dev_t *) device; |
| 181 | 181 |
| 182 switch(key) { | 182 switch(key) { |
| 183 case CYG_IO_GET_CONFIG_SPI_CLOCKRATE: | 183 case CYG_IO_SET_CONFIG_SPI_CLOCKRATE: |
| 184 if(*len == sizeof(cyg_uint32)) { | 184 if(*len == sizeof(cyg_uint32)) { |
| 185 dev->spi_baud = * (cyg_uint32 *) buf; | 185 dev->spi_baud = * (cyg_uint32 *) buf; |
| 186 spi_lpc2xxx_baud((cyg_spi_lpc2xxx_bus_t *) dev->spi_device.spi_bus, | 186 spi_lpc2xxx_baud((cyg_spi_lpc2xxx_bus_t *) dev->spi_device.spi_bus, |
| 187 dev->spi_baud); | 187 dev->spi_baud); |
| 188 } | 188 } |
| 302 * Driver & bus initialization | 302 * Driver & bus initialization |
| 303 */ | 303 */ |
| 304 static void | 304 static void |
| 305 spi_lpc2xxx_init_bus(cyg_spi_lpc2xxx_bus_t *bus, | 305 spi_lpc2xxx_init_bus(cyg_spi_lpc2xxx_bus_t *bus, |
| 306 cyg_addrword_t dev, | 306 cyg_addrword_t dev, |
| 307 cyg_vector_t vec) | 307 cyg_vector_t vec, |
| 308 cyg_priority_t prio) | |
| 308 { | 309 { |
| 309 bus->spi_bus.spi_transaction_begin = spi_lpc2xxx_begin; | 310 bus->spi_bus.spi_transaction_begin = spi_lpc2xxx_begin; |
| 310 bus->spi_bus.spi_transaction_transfer = spi_lpc2xxx_transfer; | 311 bus->spi_bus.spi_transaction_transfer = spi_lpc2xxx_transfer; |
| 311 bus->spi_bus.spi_transaction_tick = spi_lpc2xxx_tick; | 312 bus->spi_bus.spi_transaction_tick = spi_lpc2xxx_tick; |
| 312 bus->spi_bus.spi_transaction_end = spi_lpc2xxx_end; | 313 bus->spi_bus.spi_transaction_end = spi_lpc2xxx_end; |
| 317 cyg_drv_mutex_init(&bus->spi_lock); | 318 cyg_drv_mutex_init(&bus->spi_lock); |
| 318 cyg_drv_cond_init(&bus->spi_wait, &bus->spi_lock); | 319 cyg_drv_cond_init(&bus->spi_wait, &bus->spi_lock); |
| 319 | 320 |
| 320 bus->spi_dev = (struct spi_dev *) dev; | 321 bus->spi_dev = (struct spi_dev *) dev; |
| 321 bus->spi_vect = vec; | 322 bus->spi_vect = vec; |
| 323 bus->spi_prio = prio; | |
| 322 cyg_drv_interrupt_create( | 324 cyg_drv_interrupt_create( |
| 323 vec, 0, (cyg_addrword_t) bus, | 325 vec, prio, (cyg_addrword_t) bus, |
| 324 &spi_lpc2xxx_isr, &spi_lpc2xxx_dsr, | 326 &spi_lpc2xxx_isr, &spi_lpc2xxx_dsr, |
| 325 &bus->spi_hand, &bus->spi_intr); | 327 &bus->spi_hand, &bus->spi_intr); |
| 326 cyg_drv_interrupt_attach(bus->spi_hand); | 328 cyg_drv_interrupt_attach(bus->spi_hand); |
| 327 } | 329 } |
| 328 | 330 |
| 341 tmp |= 0x5500; | 343 tmp |= 0x5500; |
| 342 HAL_WRITE_UINT32(addr, tmp); | 344 HAL_WRITE_UINT32(addr, tmp); |
| 343 | 345 |
| 344 spi_lpc2xxx_init_bus(&cyg_spi_lpc2xxx_bus0, | 346 spi_lpc2xxx_init_bus(&cyg_spi_lpc2xxx_bus0, |
| 345 CYGARC_HAL_LPC2XXX_REG_SPI0_BASE, | 347 CYGARC_HAL_LPC2XXX_REG_SPI0_BASE, |
| 346 CYGNUM_HAL_INTERRUPT_SPI0); | 348 CYGNUM_HAL_INTERRUPT_SPI0, |
| 349 CYGNUM_IO_SPI_ARM_LPC2XXX_SPI0_INTPRIO); | |
| 347 #endif | 350 #endif |
| 348 #ifdef CYGPKG_DEVS_SPI_ARM_LPC2XXX_BUS1 | 351 #ifdef CYGPKG_DEVS_SPI_ARM_LPC2XXX_BUS1 |
| 349 addr = (CYGARC_HAL_LPC2XXX_REG_PIN_BASE | 352 addr = (CYGARC_HAL_LPC2XXX_REG_PIN_BASE |
| 350 + CYGARC_HAL_LPC2XXX_REG_PINSEL1); | 353 + CYGARC_HAL_LPC2XXX_REG_PINSEL1); |
| 351 HAL_READ_UINT32(addr, tmp); | 354 HAL_READ_UINT32(addr, tmp); |
| 352 tmp |= 0x2a8; | 355 tmp |= 0x2a8; |
| 353 HAL_WRITE_UINT32(addr, tmp); | 356 HAL_WRITE_UINT32(addr, tmp); |
| 354 spi_lpc2xxx_init_bus(&cyg_spi_lpc2xxx_bus1, | 357 spi_lpc2xxx_init_bus(&cyg_spi_lpc2xxx_bus1, |
| 355 CYGARC_HAL_LPC2XXX_REG_SPI1_BASE, | 358 CYGARC_HAL_LPC2XXX_REG_SPI1_BASE, |
| 356 CYGNUM_HAL_INTERRUPT_SPI1); | 359 CYGNUM_HAL_INTERRUPT_SPI1, |
| 360 CYGNUM_IO_SPI_ARM_LPC2XXX_SPI1_INTPRIO); | |
| 357 #endif | 361 #endif |
| 358 } | 362 } |
| 359 }; | 363 }; |
| 360 | 364 |
| 361 static cyg_spi_lpc2xxx_init_class spi_lpc2xxx_init | 365 static cyg_spi_lpc2xxx_init_class spi_lpc2xxx_init |
