Mercurial > ecos-v3_0-branch
comparison packages/hal/sh/sh4/current/include/mod_regs_ubc.h @ 134:d2f49caf9e38 ecos-sw-2000-11-03
Merge from eCos master repository on 2000-11-03-09:00:49-GMT
| author | jlarmour |
|---|---|
| date | Fri, 03 Nov 2000 21:17:40 +0000 |
| parents | |
| children | a9ac27ec7abc |
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| 133:98d71f4d8243 | 134:d2f49caf9e38 |
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| 1 //============================================================================= | |
| 2 // | |
| 3 // mod_regs_ubc.h | |
| 4 // | |
| 5 // UBC (user break controller) Module register definitions | |
| 6 // | |
| 7 //============================================================================= | |
| 8 //####COPYRIGHTBEGIN#### | |
| 9 // | |
| 10 // ------------------------------------------- | |
| 11 // The contents of this file are subject to the Red Hat eCos Public License | |
| 12 // Version 1.1 (the "License"); you may not use this file except in | |
| 13 // compliance with the License. You may obtain a copy of the License at | |
| 14 // http://www.redhat.com/ | |
| 15 // | |
| 16 // Software distributed under the License is distributed on an "AS IS" | |
| 17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 18 // License for the specific language governing rights and limitations under | |
| 19 // the License. | |
| 20 // | |
| 21 // The Original Code is eCos - Embedded Configurable Operating System, | |
| 22 // released September 30, 1998. | |
| 23 // | |
| 24 // The Initial Developer of the Original Code is Red Hat. | |
| 25 // Portions created by Red Hat are | |
| 26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. | |
| 27 // All Rights Reserved. | |
| 28 // ------------------------------------------- | |
| 29 // | |
| 30 //####COPYRIGHTEND#### | |
| 31 //============================================================================= | |
| 32 //#####DESCRIPTIONBEGIN#### | |
| 33 // | |
| 34 // Author(s): jskov | |
| 35 // Contributors:jskov | |
| 36 // Date: 2000-10-30 | |
| 37 // | |
| 38 //####DESCRIPTIONEND#### | |
| 39 // | |
| 40 //============================================================================= | |
| 41 | |
| 42 //-------------------------------------------------------------------------- | |
| 43 // User Break Control | |
| 44 #define CYGARC_REG_BARA 0xFF200000 // 32 bit | |
| 45 #define CYGARC_REG_BAMRA 0xFF200004 // 8 bit | |
| 46 #define CYGARC_REG_BBRA 0xFF200008 // 16 bit | |
| 47 | |
| 48 #define CYGARC_REG_BARB 0xFF20000C // 32 bit | |
| 49 #define CYGARC_REG_BAMRB 0xFF200010 // 8 bit | |
| 50 | |
| 51 #define CYGARC_REG_BBRB 0xFF200014 // 16 bit | |
| 52 #define CYGARC_REG_BDRB 0xFF200018 // 32 bit | |
| 53 #define CYGARC_REG_BDMRB 0xFF20001C // 32 bit | |
| 54 | |
| 55 #define CYGARC_REG_BRCR 0xFF200020 // 16 bit | |
| 56 | |
| 57 | |
| 58 #define CYGARC_REG_BRCR_CMFA 0x8000 // condition match flag A | |
| 59 #define CYGARC_REG_BRCR_CMFB 0x4000 // condition match flag B | |
| 60 #define CYGARC_REG_BRCR_PCBA 0x0400 // post execute channel A | |
| 61 #define CYGARC_REG_BRCR_DBEB 0x0080 // data break enable B | |
| 62 #define CYGARC_REG_BRCR_PCBB 0x0040 // post execute channel B | |
| 63 #define CYGARC_REG_BRCR_SEQ 0x0008 // sequence condition select | |
| 64 #define CYGARC_REG_BRCR_UBDE 0x0001 // User Break Debug Enable | |
| 65 | |
| 66 | |
| 67 #define CYGARC_REG_BBRA_DFETCH 0x0020 // Break on DFETCH | |
| 68 #define CYGARC_REG_BBRA_IFETCH 0x0010 // Break on IFETCH | |
| 69 #define CYGARC_REG_BBRA_WRITE 0x0008 // Break on WRITE | |
| 70 #define CYGARC_REG_BBRA_READ 0x0004 // Break on READ | |
| 71 #define CYGARC_REG_BBRA_SIZE_QUAD 0x0040 // Break on quad word access | |
| 72 #define CYGARC_REG_BBRA_SIZE_LONG 0x0003 // Break on long word access | |
| 73 #define CYGARC_REG_BBRA_SIZE_WORD 0x0002 // Break on word access | |
| 74 #define CYGARC_REG_BBRA_SIZE_BYTE 0x0001 // Break on byte access | |
| 75 #define CYGARC_REG_BBRA_SIZE_ANY 0x0000 // Break on any size |