Mercurial > ecos-v3_0-branch

comparison packages/devs/spi/arm/lpc2xxx/current/cdl/spi_lpc2xxx.cdl @ 2812:fcdbe7acd0f7

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
* cdl/spi_lpc2xxx.cdl: Fix my mistake in below change and make CDL requires match option names.
author jlarmour
date Wed, 18 Feb 2009 17:30:27 +0000
parents 782f0399f068
children
comparison
equal deleted inserted replaced
2811:3fdf0d74f32d 2812:fcdbe7acd0f7
6 # 6 #
7 # ==================================================================== 7 # ====================================================================
8 ## ####ECOSGPLCOPYRIGHTBEGIN#### 8 ## ####ECOSGPLCOPYRIGHTBEGIN####
9 ## ------------------------------------------- 9 ## -------------------------------------------
10 ## This file is part of eCos, the Embedded Configurable Operating System. 10 ## This file is part of eCos, the Embedded Configurable Operating System.
11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 ,2009 Free Software Foundation, Inc.
12 ## 12 ##
13 ## eCos is free software; you can redistribute it and/or modify it under 13 ## eCos is free software; you can redistribute it and/or modify it under
14 ## the terms of the GNU General Public License as published by the Free 14 ## the terms of the GNU General Public License as published by the Free
15 ## Software Foundation; either version 2 or (at your option) any later 15 ## Software Foundation; either version 2 or (at your option) any later
16 ## version. 16 ## version.
68 cdl_option CYGNUM_IO_SPI_ARM_LPC2XXX_BUS0_INTPRIO { 68 cdl_option CYGNUM_IO_SPI_ARM_LPC2XXX_BUS0_INTPRIO {
69 display "Interrupt priority of the SPI bus 0 ISR" 69 display "Interrupt priority of the SPI bus 0 ISR"
70 flavor data 70 flavor data
71 legal_values 0 to 15 71 legal_values 0 to 15
72 default_value 12 72 default_value 12
73 requires { is_active(CYGNUM_IO_SPI_ARM_LPC2XXX_SPI1_INTPRIO) 73 requires { is_active(CYGNUM_IO_SPI_ARM_LPC2XXX_BUS1_INTPRIO)
74 implies (CYGNUM_IO_SPI_ARM_LPC2XXX_SPI0_INTPRIO != 74 implies (CYGNUM_IO_SPI_ARM_LPC2XXX_BUS0_INTPRIO !=
75 CYGNUM_IO_SPI_ARM_LPC2XXX_SPI1_INTPRIO) 75 CYGNUM_IO_SPI_ARM_LPC2XXX_BUS1_INTPRIO)
76 } 76 }
77 description " 77 description "
78 This option specifies the interrupt priority of the ISR of 78 This option specifies the interrupt priority of the ISR of
79 the SPI bus 0 interrupt in the VIC. Slot 0 has the highest 79 the SPI bus 0 interrupt in the VIC. Slot 0 has the highest
80 priority and slot 15 the lowest." 80 priority and slot 15 the lowest."