--- a/packages/hal/arm/sa11x0/sa1100mm/current/src/sa1100mm_misc.c
+++ b/packages/hal/arm/sa11x0/sa1100mm/current/src/sa1100mm_misc.c
@@ -60,106 +60,8 @@
 
 #include <cyg/infra/diag.h>             // diag_printf
 
-// -------------------------------------------------------------------------
-// MMU initialization:
-// 
-// These structures are laid down in memory to define the translation
-// table.
-// 
-
-/*
- * SA-1100 Translation Table Base Bit Masks */
-#define ARM_TRANSLATION_TABLE_MASK               0xFFFFC000
-
-/*
- * SA-1100 Domain Access Control Bit Masks
- */
-#define ARM_ACCESS_TYPE_NO_ACCESS(domain_num)    (0x0 << (domain_num)*2)
-#define ARM_ACCESS_TYPE_CLIENT(domain_num)       (0x1 << (domain_num)*2)
-#define ARM_ACCESS_TYPE_MANAGER(domain_num)      (0x3 << (domain_num)*2)
-
-struct ARM_MMU_FIRST_LEVEL_FAULT {
-    int id : 2;
-    int sbz : 30;
-};
-#define ARM_MMU_FIRST_LEVEL_FAULT_ID 0x0
-
-struct ARM_MMU_FIRST_LEVEL_PAGE_TABLE {
-    int id : 2;
-    int imp : 2;
-    int domain : 4;
-    int sbz : 1;
-    int base_address : 23;
-};
-#define ARM_MMU_FIRST_LEVEL_PAGE_TABLE_ID 0x1
-
-struct ARM_MMU_FIRST_LEVEL_SECTION {
-    int id : 2;
-    int b : 1;
-    int c : 1;
-    int imp : 1;
-    int domain : 4;
-    int sbz0 : 1;
-    int ap : 2;
-    int sbz1 : 8;
-    int base_address : 12;
-};
-#define ARM_MMU_FIRST_LEVEL_SECTION_ID 0x2
-
-struct ARM_MMU_FIRST_LEVEL_RESERVED {
-    int id : 2;
-    int sbz : 30;
-};
-#define ARM_MMU_FIRST_LEVEL_RESERVED_ID 0x3
-
-#define ARM_MMU_FIRST_LEVEL_DESCRIPTOR_ADDRESS(ttb_base, table_index) \
-   (unsigned long *)((unsigned long)(ttb_base) + ((table_index) << 2))
-
-#define ARM_FIRST_LEVEL_PAGE_TABLE_SIZE 0x4000
-
-#define ARM_MMU_SECTION(ttb_base, actual_base, virtual_base,              \
-                        cacheable, bufferable, perm)                      \
-    CYG_MACRO_START                                                       \
-        register union ARM_MMU_FIRST_LEVEL_DESCRIPTOR desc;               \
-                                                                          \
-        desc.word = 0;                                                    \
-        desc.section.id = ARM_MMU_FIRST_LEVEL_SECTION_ID;                 \
-        desc.section.domain = 0;                                          \
-        desc.section.c = (cacheable);                                     \
-        desc.section.b = (bufferable);                                    \
-        desc.section.ap = (perm);                                         \
-        desc.section.base_address = (actual_base);                        \
-        *ARM_MMU_FIRST_LEVEL_DESCRIPTOR_ADDRESS(ttb_base, (virtual_base)) \
-                            = desc.word;                                  \
-    CYG_MACRO_END
-
-#define X_ARM_MMU_SECTION(abase,vbase,size,cache,buff,access)      \
-    { int i; int j = abase; int k = vbase;                         \
-      for (i = size; i > 0 ; i--,j++,k++)                          \
-      {                                                            \
-        ARM_MMU_SECTION(ttb_base, j, k, cache, buff, access);      \
-      }                                                            \
-    }
-
-union ARM_MMU_FIRST_LEVEL_DESCRIPTOR {
-    unsigned long word;
-    struct ARM_MMU_FIRST_LEVEL_FAULT fault;
-    struct ARM_MMU_FIRST_LEVEL_PAGE_TABLE page_table;
-    struct ARM_MMU_FIRST_LEVEL_SECTION section;
-    struct ARM_MMU_FIRST_LEVEL_RESERVED reserved;
-};
-
-#define ARM_UNCACHEABLE                         0
-#define ARM_CACHEABLE                           1
-#define ARM_UNBUFFERABLE                        0
-#define ARM_BUFFERABLE                          1
-
-#define ARM_ACCESS_PERM_NONE_NONE               0
-#define ARM_ACCESS_PERM_RO_NONE                 0
-#define ARM_ACCESS_PERM_RO_RO                   0
-#define ARM_ACCESS_PERM_RW_NONE                 1
-#define ARM_ACCESS_PERM_RW_RO                   2
-#define ARM_ACCESS_PERM_RW_RW                   3
+// All the MM table layout is here:
+#include <cyg/hal/hal_mm.h>
 
 void
 hal_mmu_init(void)
@@ -175,22 +77,7 @@ hal_mmu_init(void)
     /*
      * Set the Domain Access Control Register
      */
-    i = ARM_ACCESS_TYPE_MANAGER(0)    | 
-        ARM_ACCESS_TYPE_NO_ACCESS(1)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(2)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(3)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(4)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(5)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(6)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(7)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(8)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(9)  |
-        ARM_ACCESS_TYPE_NO_ACCESS(10) |
-        ARM_ACCESS_TYPE_NO_ACCESS(11) |
-        ARM_ACCESS_TYPE_NO_ACCESS(12) |
-        ARM_ACCESS_TYPE_NO_ACCESS(13) |
-        ARM_ACCESS_TYPE_NO_ACCESS(14) |
-        ARM_ACCESS_TYPE_NO_ACCESS(15);
+    i = ARM_ACCESS_DACR_DEFAULT;
     asm volatile ("mcr  p15,0,%0,c3,c0,0" : : "r"(i) /*:*/);
 
     /*
@@ -240,3 +127,6 @@ void sa1100mm_program_new_stack(void *fu
     stack_ptr = old_stack;
     return;
 }
+
+// ------------------------------------------------------------------------
+// EOF sa1100mm_misc.c