annotate packages/hal/arm/aeb/current/include/hal_cache.h @ 46:797268ecc331 ecos-sw-1999-10-19

Merge from eCos master repository on 1999-10-19-18:55:31-BST
author jlarmour
date Tue, 19 Oct 1999 19:19:52 +0000
parents 41bd4f3a90de
children c38311975d4f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1 #ifndef CYGONCE_HAL_CACHE_H
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
2 #define CYGONCE_HAL_CACHE_H
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
3
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
4 //=============================================================================
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
5 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
6 // hal_cache.h
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
7 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
8 // HAL cache control API
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
9 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
10 //=============================================================================
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
11 //####COPYRIGHTBEGIN####
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
12 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
13 // -------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
14 // The contents of this file are subject to the Cygnus eCos Public License
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
15 // Version 1.0 (the "License"); you may not use this file except in
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
16 // compliance with the License. You may obtain a copy of the License at
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
17 // http://sourceware.cygnus.com/ecos
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
18 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
19 // Software distributed under the License is distributed on an "AS IS"
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
21 // License for the specific language governing rights and limitations under
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
22 // the License.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
23 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
24 // The Original Code is eCos - Embedded Cygnus Operating System, released
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
25 // September 30, 1998.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
26 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
27 // The Initial Developer of the Original Code is Cygnus. Portions created
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
28 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
29 // -------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
30 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
31 //####COPYRIGHTEND####
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
32 //=============================================================================
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
33 //#####DESCRIPTIONBEGIN####
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
34 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
35 // Author(s): nickg, gthomas
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
36 // Contributors: nickg, gthomas
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
37 // Date: 1998-09-28
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
38 // Purpose: Cache control API
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
39 // Description: The macros defined here provide the HAL APIs for handling
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
40 // cache control operations.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
41 // Usage:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
42 // #include <cyg/hal/hal_cache.h>
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
43 // ...
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
44 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
45 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
46 //####DESCRIPTIONEND####
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
47 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
48 //=============================================================================
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
49
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
50 #include <cyg/infra/cyg_type.h>
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
51 #include <cyg/hal/hal_io.h>
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
52
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
53 //-----------------------------------------------------------------------------
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
54 // Cache dimensions - one unified cache
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
55
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
56 #define HAL_CACHE_UNIFIED
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
57
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
58 #define HAL_UCACHE_SIZE 0x800 // Size of cache in bytes
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
59 #define HAL_UCACHE_LINE_SIZE 4 // Size of a cache line
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
60 #define HAL_UCACHE_WAYS 4 // Associativity of the cache
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
61
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
62 #define HAL_UCACHE_SETS (HAL_UCACHE_SIZE/(HAL_UCACHE_LINE_SIZE*HAL_UCACHE_WAYS))
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
63
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
64 // Cache & SRAM control
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
65 #define CYG_DEVICE_CCR 0xFFFFA400
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
66 #define CYG_DEVICE_LSCR 0xFFFFA404
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
67 #define CYG_DEVICE_CACHE_MEM 0x60000800
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
68
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
69 #define CCR_E 0x01 // Cache enabled
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
70 #define CCR_S 0x02 // SRAM mode enabled
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
71 #define CCR_F 0x04 // Flush mode enabled
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
72 #define CCR_I 0x08 // Invalidate mode
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
73
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
74 #define LCSR_E 0x01 // Local SRAM enabled
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
75 #define LCSR_L 0x02 // Local SRAM mapped to high memory
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
76
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
77 //-----------------------------------------------------------------------------
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
78 // Global control of cache
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
79
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
80 // Enable the cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
81 #define HAL_UCACHE_ENABLE() \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
82 { \
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
83 HAL_WRITE_UINT8(CYG_DEVICE_CCR, CCR_E); \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
84 }
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
85
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
86 // Disable the cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
87 #define HAL_UCACHE_DISABLE() \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
88 { \
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
89 HAL_WRITE_UINT8(CYG_DEVICE_CCR, 0); \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
90 }
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
91
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
92 // Invalidate the entire cache
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
93 #define HAL_UCACHE_INVALIDATE_ALL() \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
94 { \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
95 register cyg_uint8 old_ccr; \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
96 HAL_READ_UINT8(CYG_DEVICE_CCR, old_ccr); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
97 HAL_WRITE_UINT8(CYG_DEVICE_CCR, CCR_I); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
98 HAL_WRITE_UINT8(CYG_DEVICE_CCR, old_ccr); \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
99 }
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
100
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
101 // Synchronize the contents of the cache with memory.
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
102 #define HAL_UCACHE_SYNC() \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
103 { \
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
104 register volatile cyg_uint8 *cache_SRAM = \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
105 (volatile cyg_uint8*) CYG_DEVICE_CACHE_MEM; \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
106 register int i; \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
107 register cyg_uint8 old_ccr; \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
108 HAL_READ_UINT8(CYG_DEVICE_CCR, old_ccr); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
109 HAL_WRITE_UINT8(CYG_DEVICE_CCR, CCR_F); \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
110 for (i = 0; i < HAL_DCACHE_SETS; i++) { \
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
111 *cache_SRAM = 0; \
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
112 cache_SRAM += HAL_DCACHE_LINE_SIZE; \
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
113 } \
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
114 HAL_WRITE_UINT8(CYG_DEVICE_CCR, CCR_I); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
115 HAL_WRITE_UINT8(CYG_DEVICE_CCR, old_ccr); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
116 }
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
117
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
118 // Query the state of the cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
119 #define HAL_UCACHE_IS_ENABLED(_state_) \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
120 { \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
121 cyg_uint8 __ccr; \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
122 HAL_READ_UINT8(CYG_DEVICE_CCR, __ccr); \
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
123 (_state_) = (CCR_E == __ccr) ? 1 : 0; \
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
124 }
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
125
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
126 // Purge contents of cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
127 #define HAL_UCACHE_PURGE_ALL() HAL_UCACHE_INVALIDATE_ALL()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
128
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
129 // Set the cache refill burst size
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
130 //#define HAL_UCACHE_BURST_SIZE(_size_)
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
131
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
132 // Set the cache write mode
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
133 //#define HAL_UCACHE_WRITE_MODE( _mode_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
134
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
135 //#define HAL_UCACHE_WRITETHRU_MODE 0
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
136 //#define HAL_UCACHE_WRITEBACK_MODE 1
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
137
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
138 // Load the contents of the given address range into the cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
139 // and then lock the cache so that it stays there.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
140 //#define HAL_UCACHE_LOCK(_base_, _size_)
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
141
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
142 // Undo a previous lock operation
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
143 //#define HAL_UCACHE_UNLOCK(_base_, _size_)
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
144
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
145 // Unlock entire cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
146 //#define HAL_UCACHE_UNLOCK_ALL()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
147
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
148 //-----------------------------------------------------------------------------
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
149 // Cache line control
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
150
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
151 // Allocate cache lines for the given address range without reading its
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
152 // contents from memory.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
153 //#define HAL_UCACHE_ALLOCATE( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
154
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
155 // Write dirty cache lines to memory and invalidate the cache entries
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
156 // for the given address range.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
157 //#define HAL_UCACHE_FLUSH( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
158
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
159 // Invalidate cache lines in the given range without writing to memory.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
160 //#define HAL_UCACHE_INVALIDATE( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
161
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
162 // Write dirty cache lines to memory for the given address range.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
163 //#define HAL_UCACHE_STORE( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
164
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
165 // Preread the given range into the cache with the intention of reading
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
166 // from it later.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
167 //#define HAL_UCACHE_READ_HINT( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
168
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
169 // Preread the given range into the cache with the intention of writing
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
170 // to it later.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
171 //#define HAL_UCACHE_WRITE_HINT( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
172
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
173 // Allocate and zero the cache lines associated with the given range.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
174 //#define HAL_UCACHE_ZERO( _base_ , _size_ )
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
175
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
176 //-----------------------------------------------------------------------------
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
177
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
178 //-----------------------------------------------------------------------------
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
179 // Data and instruction cache macros map onto the both-cache macros
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
180
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
181 //-----------------------------------------------------------------------------
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
182 // Global control of data cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
183
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
184 #define HAL_DCACHE_SIZE HAL_UCACHE_SIZE
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
185 #define HAL_DCACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
186 #define HAL_DCACHE_WAYS HAL_UCACHE_WAYS
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
187 #define HAL_DCACHE_SETS HAL_UCACHE_SETS
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
188
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
189 // Enable the data cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
190 #define HAL_DCACHE_ENABLE() HAL_UCACHE_ENABLE()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
191
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
192 // Disable the data cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
193 #define HAL_DCACHE_DISABLE() HAL_UCACHE_DISABLE()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
194
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
195 // Invalidate the entire cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
196 #define HAL_DCACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
197
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
198 // Synchronize the contents of the cache with memory.
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
199 #define HAL_DCACHE_SYNC() HAL_UCACHE_SYNC()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
200
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
201 // Query the state of the data cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
202 #define HAL_DCACHE_IS_ENABLED(_state_) HAL_UCACHE_IS_ENABLED(_state_)
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
203
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
204 // Set the data cache refill burst size
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
205 //#define HAL_DCACHE_BURST_SIZE(_size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
206
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
207 // Set the data cache write mode
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
208 //#define HAL_DCACHE_WRITE_MODE( _mode_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
209
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
210 //#define HAL_DCACHE_WRITETHRU_MODE 0
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
211 //#define HAL_DCACHE_WRITEBACK_MODE 1
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
212
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
213 // Load the contents of the given address range into the data cache
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
214 // and then lock the cache so that it stays there.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
215 //#define HAL_DCACHE_LOCK(_base_, _size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
216
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
217 // Undo a previous lock operation
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
218 //#define HAL_DCACHE_UNLOCK(_base_, _size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
219
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
220 // Unlock entire cache
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
221 //#define HAL_DCACHE_UNLOCK_ALL()
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
222
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
223 //-----------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
224 // Data cache line control
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
225
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
226 // Allocate cache lines for the given address range without reading its
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
227 // contents from memory.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
228 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
229
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
230 // Write dirty cache lines to memory and invalidate the cache entries
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
231 // for the given address range.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
232 //#define HAL_DCACHE_FLUSH( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
233
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
234 // Invalidate cache lines in the given range without writing to memory.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
235 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
236
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
237 // Write dirty cache lines to memory for the given address range.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
238 //#define HAL_DCACHE_STORE( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
239
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
240 // Preread the given range into the cache with the intention of reading
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
241 // from it later.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
242 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
243
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
244 // Preread the given range into the cache with the intention of writing
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
245 // to it later.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
246 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
247
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
248 // Allocate and zero the cache lines associated with the given range.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
249 //#define HAL_DCACHE_ZERO( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
250
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
251 //-----------------------------------------------------------------------------
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
252 // Global control of Instruction cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
253
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
254 #define HAL_ICACHE_SIZE HAL_UCACHE_SIZE
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
255 #define HAL_ICACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
256 #define HAL_ICACHE_WAYS HAL_UCACHE_WAYS
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
257 #define HAL_ICACHE_SETS HAL_UCACHE_SETS
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
258
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
259 // Enable the instruction cache
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
260 #define HAL_ICACHE_ENABLE() HAL_UCACHE_ENABLE()
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
261
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
262 // Disable the instruction cache
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
263 #define HAL_ICACHE_DISABLE() HAL_UCACHE_DISABLE()
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
264
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
265 // Invalidate the entire cache
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
266 #define HAL_ICACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
267
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
268
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
269 // Synchronize the contents of the cache with memory.
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
270 #define HAL_ICACHE_SYNC() HAL_UCACHE_SYNC()
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
271
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
272 // Query the state of the instruction cache
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
273 #define HAL_ICACHE_IS_ENABLED(_state_) HAL_UCACHE_IS_ENABLED(_state_)
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
274
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
275 // Set the instruction cache refill burst size
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
276 //#define HAL_ICACHE_BURST_SIZE(_size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
277
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
278 // Load the contents of the given address range into the instruction cache
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
279 // and then lock the cache so that it stays there.
44
41bd4f3a90de Merge from eCos master repository on 1999-10-08-07:47:04-BST
jlarmour
parents: 2
diff changeset
280
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
281 //#define HAL_ICACHE_LOCK(_base_, _size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
282
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
283 // Undo a previous lock operation
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
284 //#define HAL_ICACHE_UNLOCK(_base_, _size_)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
285
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
286 // Unlock entire cache
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
287 //#define HAL_ICACHE_UNLOCK_ALL()
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
288
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
289 //-----------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
290 // Instruction cache line control
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
291
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
292 // Invalidate cache lines in the given range without writing to memory.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
293 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
294
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
295 #endif // ifndef CYGONCE_HAL_CACHE_H
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
296 // End of hal_cache.h