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1 //============================================================================= |
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2 // |
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3 // plf_stub.c |
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4 // |
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5 // Platform specific code for GDB stub support. |
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6 // |
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7 //============================================================================= |
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8 //####COPYRIGHTBEGIN#### |
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9 // |
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10 // ------------------------------------------- |
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11 // The contents of this file are subject to the Cygnus eCos Public License |
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12 // Version 1.0 (the "License"); you may not use this file except in |
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13 // compliance with the License. You may obtain a copy of the License at |
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14 // http://sourceware.cygnus.com/ecos |
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15 // |
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16 // Software distributed under the License is distributed on an "AS IS" |
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
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18 // License for the specific language governing rights and limitations under |
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19 // the License. |
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20 // |
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released |
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22 // September 30, 1998. |
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23 // |
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24 // The Initial Developer of the Original Code is Cygnus. Portions created |
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25 // by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. |
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26 // All Rights Reserved. |
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27 // ------------------------------------------- |
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28 // |
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29 //####COPYRIGHTEND#### |
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30 //============================================================================= |
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31 //#####DESCRIPTIONBEGIN#### |
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32 // |
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33 // Author(s): gthomas (based on the old ARM/PID hal_stub.c) |
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34 // Contributors:gthomas, jskov |
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35 // Date: 1999-02-15 |
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36 // Purpose: Platform specific code for GDB stub support. |
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37 // |
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38 //####DESCRIPTIONEND#### |
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39 // |
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40 //============================================================================= |
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41 |
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42 #include <pkgconf/hal.h> |
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43 |
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44 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
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45 |
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46 #include <cyg/hal/hal_stub.h> |
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47 |
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48 #include <cyg/hal/hal_io.h> // HAL IO macros |
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49 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
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50 #include <cyg/hal/hal_intr.h> // HAL interrupt macros |
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51 #include <cyg/hal/drv_api.h> // HAL ISR support |
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52 #endif |
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53 |
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54 //----------------------------------------------------------------------------- |
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55 // Serial definitions. |
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56 #if CYGHWR_HAL_ARM_PID_GDB_PORT==0 |
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57 // This is the base address of the A-channel |
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58 #define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800000 |
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59 #define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALA |
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60 #else |
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61 // This is the base address of the B-channel |
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62 #define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800020 |
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63 #define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALB |
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64 #endif |
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65 |
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66 #if CYGHWR_HAL_ARM_PID_GDB_BAUD==9600 |
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67 #define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 |
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68 #define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x0C |
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69 #endif |
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70 #if CYGHWR_HAL_ARM_PID_GDB_BAUD==19200 |
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71 #define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 |
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72 #define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x06 |
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73 #endif |
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74 #if CYGHWR_HAL_ARM_PID_GDB_BAUD==38400 |
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75 #define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 |
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76 #define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x03 |
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77 #endif |
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78 #if CYGHWR_HAL_ARM_PID_GDB_BAUD==115200 |
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79 #define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 |
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80 #define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x01 |
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81 #endif |
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82 |
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83 #ifndef CYG_DEVICE_SERIAL_RS232_BAUD_MSB |
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84 #error Missing/incorrect serial baud rate defined - CDL error? |
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85 #endif |
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86 |
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87 // Define the serial registers. |
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88 #define CYG_DEVICE_SERIAL_RS232_16550_RBR \ |
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89 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) |
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90 // receiver buffer register, read, dlab = 0 |
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91 #define CYG_DEVICE_SERIAL_RS232_16550_THR \ |
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92 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) |
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93 // transmitter holding register, write, dlab = 0 |
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94 #define CYG_DEVICE_SERIAL_RS232_16550_DLL \ |
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95 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) |
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96 // divisor latch (LS), read/write, dlab = 1 |
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97 #define CYG_DEVICE_SERIAL_RS232_16550_IER \ |
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98 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) |
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99 // interrupt enable register, read/write, dlab = 0 |
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100 #define CYG_DEVICE_SERIAL_RS232_16550_DLM \ |
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101 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) |
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102 // divisor latch (MS), read/write, dlab = 1 |
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103 #define CYG_DEVICE_SERIAL_RS232_16550_IIR \ |
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104 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) |
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105 // interrupt identification register, read, dlab = 0 |
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106 #define CYG_DEVICE_SERIAL_RS232_16550_FCR \ |
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107 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) |
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108 // fifo control register, write, dlab = 0 |
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109 #define CYG_DEVICE_SERIAL_RS232_16550_LCR \ |
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110 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x0C) |
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111 // line control register, read/write |
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112 #define CYG_DEVICE_SERIAL_RS232_16550_MCR \ |
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113 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) |
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114 // modem control register, read/write |
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115 #define CYG_DEVICE_SERIAL_RS232_16550_LSR \ |
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116 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x14) |
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117 // line status register, read |
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118 #define CYG_DEVICE_SERIAL_RS232_16550_MSR \ |
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119 ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) |
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120 // modem status register, read |
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121 |
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122 // The interrupt enable register bits. |
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123 #define SIO_IER_ERDAI 0x01 // enable received data available irq |
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124 #define SIO_IER_ETHREI 0x02 // enable THR empty interrupt |
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125 #define SIO_IER_ELSI 0x04 // enable receiver line status irq |
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126 #define SIO_IER_EMSI 0x08 // enable modem status interrupt |
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127 |
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128 // The interrupt identification register bits. |
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129 #define SIO_IIR_IP 0x01 // 0 if interrupt pending |
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130 #define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits |
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131 |
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132 // The line status register bits. |
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133 #define SIO_LSR_DR 0x01 // data ready |
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134 #define SIO_LSR_OE 0x02 // overrun error |
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135 #define SIO_LSR_PE 0x04 // parity error |
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136 #define SIO_LSR_FE 0x08 // framing error |
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137 #define SIO_LSR_BI 0x10 // break interrupt |
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138 #define SIO_LSR_THRE 0x20 // transmitter holding register empty |
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139 #define SIO_LSR_TEMT 0x40 // transmitter register empty |
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140 #define SIO_LSR_ERR 0x80 // any error condition |
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141 |
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142 // The modem status register bits. |
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143 #define SIO_MSR_DCTS 0x01 // delta clear to send |
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144 #define SIO_MSR_DDSR 0x02 // delta data set ready |
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145 #define SIO_MSR_TERI 0x04 // trailing edge ring indicator |
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146 #define SIO_MSR_DDCD 0x08 // delta data carrier detect |
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147 #define SIO_MSR_CTS 0x10 // clear to send |
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148 #define SIO_MSR_DSR 0x20 // data set ready |
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149 #define SIO_MSR_RI 0x40 // ring indicator |
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150 #define SIO_MSR_DCD 0x80 // data carrier detect |
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151 |
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152 // The line control register bits. |
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153 #define SIO_LCR_WLS0 0x01 // word length select bit 0 |
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154 #define SIO_LCR_WLS1 0x02 // word length select bit 1 |
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155 #define SIO_LCR_STB 0x04 // number of stop bits |
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156 #define SIO_LCR_PEN 0x08 // parity enable |
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157 #define SIO_LCR_EPS 0x10 // even parity select |
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158 #define SIO_LCR_SP 0x20 // stick parity |
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159 #define SIO_LCR_SB 0x40 // set break |
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160 #define SIO_LCR_DLAB 0x80 // divisor latch access bit |
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161 |
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162 // Interrupt Enable Register |
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163 #define SIO_IER_RCV 0x01 |
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164 #define SIO_IER_XMT 0x02 |
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165 #define SIO_IER_LS 0x04 |
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166 #define SIO_IER_MS 0x08 |
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167 |
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168 // Modem Control Register |
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169 #define SIO_MCR_DTR 0x01 |
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170 #define SIO_MCR_RTS 0x02 |
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171 #define SIO_MCR_INT 0x08 // Enable interrupts |
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172 |
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173 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
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174 static cyg_interrupt gdb_interrupt; |
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175 static cyg_handle_t gdb_interrupt_handle; |
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176 #endif |
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177 |
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178 //----------------------------------------------------------------------------- |
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179 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
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180 // This ISR is called only for serial receive interrupts. |
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181 int |
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182 cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) |
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183 { |
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184 cyg_uint8 c; |
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185 |
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186 c = hal_pid_get_char(); // Fetch the character |
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187 if( 3 == c ) { // ^C |
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188 // Ctrl-C: set a breakpoint at PC so GDB will display the |
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189 // correct program context when stopping rather than the |
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190 // interrupt handler. |
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191 cyg_hal_gdb_interrupt (regs->pc); |
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192 cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); |
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193 } |
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194 return 0; // No need to run DSR |
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195 } |
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196 |
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197 int |
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198 hal_pid_interruptible(int state) |
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199 { |
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200 if (state) { |
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201 cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); |
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202 } else { |
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203 cyg_drv_interrupt_mask(CYG_DEVICE_SERIAL_INT); |
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204 } |
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205 |
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206 return 0; |
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207 } |
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208 #endif |
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209 |
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210 // Initialize the current serial port. |
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211 void hal_pid_init_serial(void) |
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212 { |
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213 cyg_uint8 lcr; |
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214 |
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215 // 8-1-no parity. |
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216 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, |
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217 SIO_LCR_WLS0 | SIO_LCR_WLS1); |
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218 |
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219 HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); |
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220 lcr |= SIO_LCR_DLAB; |
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221 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); |
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222 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, |
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223 CYG_DEVICE_SERIAL_RS232_BAUD_LSB); |
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224 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, |
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225 CYG_DEVICE_SERIAL_RS232_BAUD_MSB); |
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226 lcr &= ~SIO_LCR_DLAB; |
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227 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); |
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228 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO |
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229 |
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230 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
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231 cyg_drv_interrupt_create(CYG_DEVICE_SERIAL_INT, |
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232 99, // Priority - what goes here? |
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233 0, // Data item passed to interrupt handler |
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234 cyg_hal_gdb_isr, |
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235 0, |
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236 &gdb_interrupt_handle, |
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237 &gdb_interrupt); |
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238 cyg_drv_interrupt_attach(gdb_interrupt_handle); |
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239 cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); |
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240 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_RCV); |
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241 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, SIO_MCR_INT|SIO_MCR_DTR|SIO_MCR_RTS); |
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242 #endif |
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243 } |
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244 |
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245 // Write C to the current serial port. |
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246 void hal_pid_put_char(int c) |
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247 { |
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248 cyg_uint8 lsr; |
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249 |
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250 do { |
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251 HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); |
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252 } while ((lsr & SIO_LSR_THRE) == 0); |
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253 |
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254 HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); |
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255 } |
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256 |
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257 // Read one character from the current serial port. |
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258 int hal_pid_get_char(void) |
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259 { |
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260 char c; |
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261 cyg_uint8 lsr; |
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262 |
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263 do { |
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264 HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); |
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265 } while ((lsr & SIO_LSR_DR) == 0); |
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266 |
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267 HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); |
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268 return c; |
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269 } |
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270 |
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271 #endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
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272 //----------------------------------------------------------------------------- |
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273 // End of plf_stub.c |
