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annotate packages/hal/frv/arch/current/include/hal_io.h @ 3292:7f8e529b4d82 default tip

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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #ifndef CYGONCE_HAL_IO_H
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2 #define CYGONCE_HAL_IO_H
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3
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4 //=============================================================================
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5 //
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6 // hal_io.h
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7 //
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8 // HAL device IO register support.
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9 //
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10 //=============================================================================
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11 // ####ECOSGPLCOPYRIGHTBEGIN####
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12 // -------------------------------------------
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13 // This file is part of eCos, the Embedded Configurable Operating System.
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later
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19 // version.
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20 //
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21 // eCos is distributed in the hope that it will be useful, but WITHOUT
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22 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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24 // for more details.
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25 //
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26 // You should have received a copy of the GNU General Public License
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27 // along with eCos; if not, write to the Free Software Foundation, Inc.,
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28 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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29 //
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30 // As a special exception, if other files instantiate templates or use
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31 // macros or inline functions from this file, or you compile this file
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32 // and link it with other works to produce a work based on this file,
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33 // this file does not by itself cause the resulting work to be covered by
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34 // the GNU General Public License. However the source code for this file
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35 // must still be made available in accordance with section (3) of the GNU
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36 // General Public License v2.
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37 //
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38 // This exception does not invalidate any other reasons why a work based
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39 // on this file might be covered by the GNU General Public License.
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40 // -------------------------------------------
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41 // ####ECOSGPLCOPYRIGHTEND####
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42 //=============================================================================
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43 //#####DESCRIPTIONBEGIN####
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44 //
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45 // Author(s): nickg, gthomas
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46 // Contributors: nickg, gthomas
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47 // Date: 1998-09-11
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48 // Purpose: Define IO register support
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49 // Description: The macros defined here provide the HAL APIs for handling
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50 // device IO control registers.
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51 //
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52 // Usage:
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53 // #include <cyg/hal/hal_io.h>
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54 // ...
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55 //
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56 //
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57 //####DESCRIPTIONEND####
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58 //
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59 //=============================================================================
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60
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61 #include <pkgconf/system.h>
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62 #include <cyg/infra/cyg_type.h>
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63
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64 #include <cyg/hal/basetype.h>
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65
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66 //-----------------------------------------------------------------------------
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67 // IO Register address.
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68 // This type is for recording the address of an IO register.
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69
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70 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
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71
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72
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73 //-----------------------------------------------------------------------------
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74 // BYTE Register access.
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75 // Individual and vectorized access to 8 bit registers.
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76
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77 #define HAL_READ_UINT8( _register_, _value_ ) \
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78 CYG_MACRO_START \
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79 ((_value_) = *((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)))); \
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80 HAL_IO_BARRIER(); \
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81 CYG_MACRO_END
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82
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83 #define HAL_WRITE_UINT8( _register_, _value_ ) \
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84 CYG_MACRO_START \
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85 (*((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_))) = (_value_)); \
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86 HAL_IO_BARRIER(); \
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87 CYG_MACRO_END
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88
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89 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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90 CYG_MACRO_START \
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91 cyg_count32 _i_,_j_; \
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92 volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)); \
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93 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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94 (_buf_)[_i_] = _r_[_j_]; \
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95 CYG_MACRO_END
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96
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97 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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98 CYG_MACRO_START \
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99 cyg_count32 _i_,_j_; \
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100 volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)); \
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101 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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102 _r_[_j_] = (_buf_)[_i_]; \
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103 CYG_MACRO_END
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104
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105 //-----------------------------------------------------------------------------
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106 // 16 bit access.
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107 // Individual and vectorized access to 16 bit registers.
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108
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109 #define HAL_READ_UINT16( _register_, _value_ ) \
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110 CYG_MACRO_START \
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111 ((_value_) = *((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)))); \
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112 HAL_IO_BARRIER(); \
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113 CYG_MACRO_END
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114
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115 #define HAL_WRITE_UINT16( _register_, _value_ ) \
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116 CYG_MACRO_START \
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117 (*((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_))) = (_value_)); \
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118 HAL_IO_BARRIER(); \
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119 CYG_MACRO_END
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120
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121 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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122 CYG_MACRO_START \
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123 cyg_count32 _i_,_j_; \
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124 volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)); \
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125 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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126 (_buf_)[_i_] = _r_[_j_]; \
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127 CYG_MACRO_END
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128
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129 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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130 CYG_MACRO_START \
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131 cyg_count32 _i_,_j_; \
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132 volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)); \
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133 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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134 _r_[_j_] = (_buf_)[_i_]; \
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135 CYG_MACRO_END
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136
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137 //-----------------------------------------------------------------------------
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138 // 32 bit access.
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139 // Individual and vectorized access to 32 bit registers.
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140
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141 // Note: same macros for little- and big-endian systems.
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142
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143 #define HAL_READ_UINT32( _register_, _value_ ) \
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144 CYG_MACRO_START \
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145 ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \
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146 HAL_IO_BARRIER(); \
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147 CYG_MACRO_END
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148
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149 #define HAL_WRITE_UINT32( _register_, _value_ ) \
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150 CYG_MACRO_START \
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151 (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \
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152 HAL_IO_BARRIER(); \
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153 CYG_MACRO_END
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154
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155 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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156 CYG_MACRO_START \
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157 cyg_count32 _i_,_j_; \
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158 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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159 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
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160 CYG_MACRO_END
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161
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162 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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163 CYG_MACRO_START \
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164 cyg_count32 _i_,_j_; \
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165 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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166 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
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167 CYG_MACRO_END
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168
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169 // Enforce a flow "barrier" to prevent optimizing compiler from reordering
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170 // operations.
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171 #define HAL_IO_BARRIER() \
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172 __asm__ volatile("membar" : : );
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173
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174
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175 //-----------------------------------------------------------------------------
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176 // Include plf_io.h for platforms that define it.
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177 #ifdef CYGBLD_HAL_PLATFORM_IO_H
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178 #include CYGBLD_HAL_PLATFORM_IO_H
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179 #endif
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180
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181 //-----------------------------------------------------------------------------
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182 #endif // ifndef CYGONCE_HAL_IO_H
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183 // End of hal_io.h