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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1604
bc88a3357a79 Update usage of 'tail' command for new (pickier) version - from Jani Monoses
gthomas
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1 2004-04-22 Jani Monoses <jani@iv.ro>
bc88a3357a79 Update usage of 'tail' command for new (pickier) version - from Jani Monoses
gthomas
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2
bc88a3357a79 Update usage of 'tail' command for new (pickier) version - from Jani Monoses
gthomas
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3 * cdl/hal_mips_vr4300.cdl :
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4 Invoke tail with stricter syntax that works in latest coreutils.
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5
928
6425a2421b16 Many small changes to .ld and .ldi files.
nickg
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6 2003-04-10 Nick Garnett <nickg@balti.calivar.com>
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7
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8 * src/mips_vr4300.ld:
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9 Added libsupc++.a to GROUP() directive for GCC versions later than
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10 3.0.
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11
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12 2001-12-05 Nick Garnett <nickg@redhat.com>
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13
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14 * include/variant.inc: Add ifdef around cache clearing code to
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15 only do this in non-RAM-startup configurations. If this is done in
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16 a RAM-startup configuration, it can play merry havoc with the
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17 state of things like RedBoot's network stack.
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18 We now assume, for RAM applications, that our loader has
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19 initialized the cache.
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21 2001-10-12 Nick Garnett <nickg@redhat.com>
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22
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23 * src/mips_vr4300.ld (SECTION_rom_vectors): Updated this section
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24 to make ROM startup work.
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25 Note: this still does not fix all ROM startup problems, since the
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26 ROM is still too slow to execute code from at anything like a
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27 relistic speed.
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28
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29 2001-10-01 Jonathan Larmour <jlarmour@redhat.com>
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30
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31 * cdl/hal_mips_vr4300.cdl: Define endianness in platform CDL instead.
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33 2001-09-10 Nick Garnett <nickg@redhat.com>
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34
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35 * src/mips_vr4300.ld: Added .2ram sections to data section needed
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36 for FLASH support.
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37
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38 2001-09-07 Nick Garnett <nickg@redhat.com>
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39
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40 * include/variant.inc: Added definition of INITIAL_SR_VAR.
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41
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42 * include/var_arch.h (CYG_HAL_GDB_REG): Returned GDB registers to
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43 full 64bit width.
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44
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45 * cdl/hal_mips_vr4300.cdl: Added endianness configuration.
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46 Currently the VRC4373 platform is big endian for historical
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47 reasons, while the VRC4375 platform is little endian.
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49 2000-09-01 Jonathan Larmour <jlarmour@redhat.com>
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51 * include/var_arch.h (CYG_HAL_GDB_REG): vr4300 GDB stubs now use
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52 32-bits internally to represent registers
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54 2000-06-21 Nick Garnett <nickg@cygnus.co.uk>
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55
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56 * src/mips_vr4300.ld:
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57 Switched to new table definition mechanism.
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59 2000-02-23 Jonathan Larmour <jlarmour@redhat.co.uk>
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61 * include/var_cache.h: Don't need to conditionalize on vr4300
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62
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63 2000-02-16 Jesper Skov <jskov@redhat.com>
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65 * cdl/hal_mips_vr4300.cdl: removed fix me
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67 2000-01-28 Gary Thomas <gthomas@cygnus.co.uk>
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68
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69 * src/mips_vr4300.ld: Add support for network package.
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71 2000-01-14 Nick Garnett <nickg@cygnus.co.uk>
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73 * include/pkgconf/hal_mips_vr4300.h:
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74 Added define for CYGHWR_HAL_MIPS_64BIT so that all vr4300 targets
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75 save and restore 64 bit register values.
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76
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77 * cdl/hal_mips_vr4300.cdl:
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78 Added option for CYGHWR_HAL_MIPS_64BIT so that all vr4300 targets
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79 save and restore 64 bit register values.
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80
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81 1999-12-21 Jonathan Larmour <jlarmour@cygnus.co.uk>
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82
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83 * cdl/hal_mips_vr4300.cdl: Some cosmetic layout changes and fixed typos
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84 Ensure we "puts" to correct CDL header
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85
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86 1999-12-02 John Dallaway <jld@cygnus.co.uk>
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87
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88 * cdl/hal_mips_vr4300.cdl:
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89
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90 Use the <PACKAGE> token in custom rules.
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91
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92 1999-12-01 John Dallaway <jld@cygnus.co.uk>
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93
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94 * cdl/hal_mips_vr4300.cdl:
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95
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96 Use the <PREFIX> token in custom rules.
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97
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98 1999-11-04 John Dallaway <jld@cygnus.co.uk>
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99
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100 * cdl/hal_mips_vr4300.cdl:
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101
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102 Output custom rule dependency information to .deps files in
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103 the current directory.
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104
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105 Dispense with the need to create a 'src' sub-directory.
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106
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107 1999-11-02 Jesper Skov <jskov@cygnus.co.uk>
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108
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109 * cdl/hal_mips_vr4300.cdl: Added.
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110
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111 1999-10-25 Nick Garnett <nickg@cygnus.co.uk>
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112
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113 * include/var_cache.h: The single nop added on 10-21 seems to
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114 cause exceptions on the vrc4373 board but not on others. Extended
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115 this to three nops, which seem to work on all boards.
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116
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117 1999-10-22 Nick Garnett <nickg@cygnus.co.uk>
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118
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119 * include/var_intr.h: Removed superfluous placeholder ifdef.
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120
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121 1999-10-21 Nick Garnett <nickg@cygnus.co.uk>
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122
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123 * include/var_cache.h: Added an extra nop after reading the
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124 config0 register. In some boards we get an exception when reloading
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125 it if we don't have this here. Something to do with coprocessor
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126 hazards.
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127
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128 1999-10-06 Jonathan Larmour <jlarmour@cygnus.co.uk>
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129
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130 * src/PKGconf.mak: Don't create extras.o here any more
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131
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132 1999-10-05 Nick Garnett <nickg@cygnus.co.uk>
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133
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134 * src/PKGconf.mak: Switched link command for libextras over to big
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135 endian.
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136
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137 * include/pkgconf/hal_mips_vr4300.h: Added definition of
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138 CYGPKG_HAL_MIPS_MSBFIRST.
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139
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140 * include/variant.inc: Set BE bit in config0 register depending on
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141 definitions of CYGPKG_HAL_MIPS_[L|M]SBFIRST.
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142
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143 1999-09-09 Nick Garnett <nickg@cygnus.co.uk>
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144
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145 * src/mips_vr4300.ld:
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146 Extended size of .rom_vectors section to 0x800 bytes for ROMRAM
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147 startup so that when it is copied down into RAM, the VSR and
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148 vector tables are zeroed automatically.
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149
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150 * include/variant.inc:
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151 Moved cache macros here so that code to initialize the caches is
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152 variant specific.
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153
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154 1999-09-08 Jonathan Larmour <jlarmour@cygnus.co.uk>
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155
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156 * src/mips_vr4300.ld: Discard debug vector - it doesn't exist on the
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157 vr4300
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158
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159 1999-08-05 Jonathan Larmour <jlarmour@cygnus.co.uk>
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160
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161 * include/variant.inc: VR4300 is a mips 3 processor, so always allow
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162 mips3 instructions
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163
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164 1999-07-15 Jonathan Larmour <jlarmour@cygnus.co.uk>
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165
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166 * include/variant.inc: Rename CYG_HAL_MIPS_FSR_INIT to
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167 CYG_HAL_MIPS_FCSR_INIT since that's closer to its documented name
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168
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169 1999-07-09 Jonathan Larmour <jlarmour@cygnus.co.uk>
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170
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171 * include/var_cache.h: Define HAL_ICACHE_IS_ENABLED() to be the same
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172 as HAL_DCACHE_IS_ENABLED()
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173
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174 1999-06-25 Nick Garnett <nickg@cygnus.co.uk>
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175
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176 * include/variant.inc:
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177 Added initializer for FPU FSR register.
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178
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179 1999-06-17 Nick Garnett <nickg@cygnus.co.uk>
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180
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181 * include/var_cache.h: Added defines to disable generic code for
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182 cache lock support in hal_cache.h. The vr4300 does not have cache
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183 locking.
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184
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185 1999-06-17 Jesper Skov <jskov@cygnus.co.uk>
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186
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187 * src/mips_vr4300.ld: Removed below workaround.
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188
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189 1999-06-16 Jesper Skov <jskov@cygnus.co.uk>
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190 CR 100804 workaround
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191 * src/mips_vr4300.ld: Suppress .mdebug in the final output.
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192
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193 1999-05-28 Nick Garnett <nickg@cygnus.co.uk>
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194
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195 * src/mips_vr4300.ld:
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196 Removed references to CYG_HAL_STARTUP_STUBS
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197
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198 1999-05-27 Nick Garnett <nickg@cygnus.co.uk>
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199
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200 * include/var_cache.h (HAL_DCACHE_IS_ENABLED): Added an
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201 implementation of this macro.
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202
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203 1999-05-21 Nick Garnett <nickg@cygnus.co.uk>
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204
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205 * src/var_misc.c (hal_variant_init): Added enables for caches.
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206
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207 * src/mips_vr4300.ld: Added definition of SECTION_rom_vectors()
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208 for ROMRAM and STUBS startups.
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209
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210 * include/variant.inc: Added an initial value for config0.
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211
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212 * include/var_cache.h: Added enable and disable macros for data
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213 and instruction caches.
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214
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215 1999-05-13 Nick Garnett <nickg@cygnus.co.uk>
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216
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217 Imported whole directory tree into main trunk of repository.
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218
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219 1999-05-11 Nick Garnett <nickg@cygnus.co.uk>
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220
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221 [VR4300 branch]
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222 * include/imp_arch.h:
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223 * include/imp_intr.h:
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224 * include/imp_cache.h:
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225 * include/impl.inc:
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226 * src/imp_misc.c:
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227 * include/var_arch.h:
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228 * include/var_intr.h:
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229 * include/var_cache.h:
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230 * include/variant.inc:
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231 * src/var_misc.c:
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232 * src/PKGconf.mak:
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233 "Imp" and "Impl" files renamed to "var" and "variant" equivalents.
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234
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235 * include/pkgconf/hal_vr4300.h
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236 * include/pkgconf/hal_mips_vr4300.h
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237 Config file hal_vr4300.h renamed to hal_mips_vr4300.h so that it
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238 matches the name synthesized by pkgconf.tcl.
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239
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240 * src/mips_vr4300.ld:
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241 Moved VSR table and vector table to 0x800XXXXX.
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242
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243 1999-05-11 Gary Thomas <gthomas@cygnus.co.uk>
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244
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245 [VR4300 branch]
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246 * src/mips_vr4300.ld: Change CTOR sort order - fixes problems
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247 with uItron initialization.
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248
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249 1999-04-29 Nick Garnett <nickg@cygnus.co.uk>
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250
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251 [VR4300 branch]
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252 * src/mips_vr4300.ld: Added definitions of hal_vsr_table and
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253 hal_virtual_vector_table. These are currently at 0x806XXXXX but
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254 will be moved to 0x800XXXXX when we can make proper ROMs.
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255
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256 1999-04-27 John Dallaway <jld@cygnus.co.uk>
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257
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258 [VR4300 branch]
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259 * src/PKGconf.mak: Force generation of little-endian extras.o
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260
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261 1999-04-23 Nick Garnett <nickg@cygnus.co.uk>
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262
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263 [VR4300 branch]
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264 * include/pkgconf/hal_vr4300.h: Added some CPU characterization
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265 definitions for the benefit of the generic mips HAL.
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266
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267 * include/imp_arch.h: Added this file. It contains configuration
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268 and redefinitions for stuff in hal_arch.h.
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269
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270 1999-04-21 Nick Garnett <nickg@cygnus.co.uk>
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271
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272 [VR4300 branch]
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273 * src/imp_misc.c: Added this file to contain
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274 hal_implementation_init().
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275
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276 * src/PKGconf.mak (COMPILE): Added imp_misc.c.
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277
184
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278
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279 //===========================================================================
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280 // ####GPLCOPYRIGHTBEGIN####
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281 // -------------------------------------------
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282 // This file is part of eCos, the Embedded Configurable Operating System.
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283 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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284 //
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285 // This program is free software; you can redistribute it and/or modify
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286 // it under the terms of the GNU General Public License as published by
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287 // the Free Software Foundation; either version 2 or (at your option) any
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288 // later version.
208
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289 //
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290 // This program is distributed in the hope that it will be useful, but
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291 // WITHOUT ANY WARRANTY; without even the implied warranty of
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292 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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293 // General Public License for more details.
208
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294 //
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295 // You should have received a copy of the GNU General Public License
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296 // along with this program; if not, write to the
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297 // Free Software Foundation, Inc., 51 Franklin Street,
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298 // Fifth Floor, Boston, MA 02110-1301, USA.
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299 // -------------------------------------------
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300 // ####GPLCOPYRIGHTEND####
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301 //===========================================================================