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annotate packages/hal/powerpc/fads/current/src/quicc_smc2.c @ 3292:7f8e529b4d82 default tip

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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents ca7141aff7c0
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 //=============================================================================
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2 //####UNSUPPORTEDBEGIN####
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3 //
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4 // -------------------------------------------
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5 // This source file has been contributed to eCos/Red Hat. It may have been
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6 // changed slightly to provide an interface consistent with those of other
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7 // files.
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8 //
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9 // The functionality and contents of this file is supplied "AS IS"
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10 // without any form of support and will not necessarily be kept up
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11 // to date by Red Hat.
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12 //
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13 // The style of programming used in this file may not comply with the
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14 // eCos programming guidelines. Please do not use as a base for other
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15 // files.
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16 //
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17 // All inquiries about this file, or the functionality provided by it,
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18 // should be directed to the 'ecos-discuss' mailing list (see
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19 // http://ecos.sourceware.org/ecos/intouch.html for details).
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20 //
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21 // Contributed by: Kevin Hester <khester@opticworks.com>
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22 // Maintained by: <Unmaintained>
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23 // See also:
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24 // Motorola's "Example Software Initializing the SMC as a UART" package
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25 // (smc2.zip) at:
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26 // http://www.mot.com/SPS/RISC/netcomm/tools/index.html#MPC860_table
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27 // -------------------------------------------
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28 //
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29 //####UNSUPPORTEDEND####
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30 //=============================================================================
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31 /*-------------------------------------------------------------------------
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32 * FILENAME: smc2.c
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33 *
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34 * DESCRIPTION:
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35 *
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36 * The code in this module provides echo capability on SMC2. It's
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37 * intent is to provide the beginnings of a debug port that is
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38 * mostly compiler independent. If an ASCII terminal is connected
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39 * at 9600,N,8,1 on Port 2 (PB3) on the ADS board with no hardware
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40 * control, characters typed on the keyboard will be received by
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41 * SMC2 and echoed back out the RS232 port to the ASCII terminal.
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42 * This function was designed and tested on an ADS860
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43 * development board. Note that if a different baud rate is
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44 * required, there is a header file on the netcomm website under
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45 * the General Software category that is labelled "Asynchronous
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46 * Baud Rate Tables".
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47 *
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48 * REFERENCES:
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49 *
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50 * 1) MPC860 Users Manual
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51 * 2) PowerPC Microprocessor Family: The Programming Environments for
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52 * 32-Bit Microprocessors
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53 *
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54 * HISTORY:
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55 *
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56 * 27 APR 98 jay initial release
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57 *
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58 *-------------------------------------------------------------------------*/
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59
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60 #include <cyg/hal/quicc_smc2.h>
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61 #include "ppc_860.h"
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62
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63 /***********************/
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64 /* Global Declarations */
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65 /***********************/
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66
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67 static EPPC *IMMR; /* IMMR base pointer */
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68 static BDRINGS *RxTxBD; /* buffer descriptors base pointer */
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69 static LB *SMC2Buffers; /* SMC2 base pointers */
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70
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71 /*---------------------*/
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72 /* Function Prototypes */
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73 /*---------------------*/
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74
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75 //static char SMC2Poll(void);
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76 static void InitBDs(void);
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77 //static void EchoChar(void);
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78 static unsigned long GetIMMR(void);
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79
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80
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81 /*-----------------------------------------------------------------------------
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82 *
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83 * FUNCTION NAME: cyg_smc2_init
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84 *
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85 * DESCRIPTION:
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86 *
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87 * EXTERNAL EFFECT:
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88 *
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89 * PARAMETERS: None
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90 *
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91 * RETURNS: None
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92 *
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93 *---------------------------------------------------------------------------*/
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94
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95 void cyg_smc2_init(unsigned long baudRate)
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96
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97 {
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98 unsigned long *bcsr1;
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99 unsigned long clockRate = 20 * 1000 * 1000; // 20Mhz
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100 unsigned long divider = clockRate / (baudRate * 16) - 1;
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101
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102 /*------------------------*/
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103 /* Establish IMMR pointer */
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104 /*------------------------*/
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105
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106 IMMR = (EPPC *)(GetIMMR() & 0xFFFF0000); /* MPC8xx internal register
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107 map */
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108
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109 /*-----------------------------------------------*/
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110 /* Enable RS232 interface on ADS board via BCSR1 */
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111 /* Get the base address of BCSR */
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112 /*-----------------------------------------------*/
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113
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114 bcsr1 = (unsigned long *) ((IMMR->memc_br1 & 0xffff0000) + 4);
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115 *bcsr1 &= ~(1 << 18); // turn on RS232 port 2
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116
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117
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118 /*-----------------------*/
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119 /* Allow SMC2 TX, RX out */
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120 /*-----------------------*/
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121
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122 IMMR->pip_pbpar |= (0x0C00);
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123 IMMR->pip_pbdir &= 0xF3FF;
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124
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125 /*------------------------------------------------*/
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126 /* Set Baud Rate to 9600 for 40MHz System Clock. */
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127 /* Enable BRG Count. */
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128 /*------------------------------------------------*/
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129
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130 IMMR->brgc2 = ((divider << 1) | 0x10000);
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131
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132 IMMR->si_simode &= ~(0xF0000000); /* SCM2: NMSI mode */
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133 IMMR->si_simode |= 0x10000000; /* SCM2: Tx/Rx Clocks are BRG2 */
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134
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135
34
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136 /*--------------------*/
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137 /* Initialize the BDs */
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138 /*--------------------*/
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139
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140 InitBDs(); /* before setting up info depending on RxTxBD below */
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141
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142 IMMR->smc_regs[SMC2_REG].smc_smce = 0xFF; /* Clear any pending events */
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143
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144 /*----------------------------------------*/
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145 /* Set RXBD table start at Dual Port +800 */
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146 /*----------------------------------------*/
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147
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148 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.rbase = (unsigned short) (unsigned) &RxTxBD->RxBD;
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149
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150 /*----------------------------------------*/
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151 /* Set TXBD table start at Dual Port +808 */
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152 /*----------------------------------------*/
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153
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154 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.tbase = (unsigned short) (unsigned) &RxTxBD->TxBD;
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155
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156
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157 /*--------------------------------------*/
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158 /* Set RFCR,TFCR -- Rx,Tx Function Code */
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159 /* Normal Operation and Motorola byte */
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160 /* ordering */
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161 /*--------------------------------------*/
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162
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163 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.rfcr = 0x18;
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164 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.tfcr = 0x18;
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165
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166 /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
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167 /* Protocol Specific Parameters */
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168 /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
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169
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170 /*---------------------------*/
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171 /* MRBLR = MAX buffer length */
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172 /*---------------------------*/
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173
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174 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.mrblr = 1;
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175
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176 /*------------------------------------*/
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177 /* MAX_IDL = Disable MAX Idle Feature */
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178 /*------------------------------------*/
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179
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180 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.max_idl = 0;
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181
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182 /*-------------------------------------*/
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183 /* BRKEC = No break condition occurred */
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184 /*-------------------------------------*/
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185
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186 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.brkec = 0;
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187
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188 /*---------------------------------------*/
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189 /* BRKCR = 1 break char sent on top XMIT */
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190 /*---------------------------------------*/
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191
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192 IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.brkcr = 1;
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193
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194
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195 /* InitBDs() used to be here - no harm in doing this again */
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196 IMMR->smc_regs[SMC2_REG].smc_smce = 0xFF; /* Clear any pending events */
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197
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198 /*--------------------------------------------------*/
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199 /* SMC_SMCM = Mask all interrupts, use polling mode */
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200 /*--------------------------------------------------*/
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201
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202 IMMR->smc_regs[SMC2_REG].smc_smcm = 0;
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203
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204 IMMR->cpmi_cicr = 0; /* Disable all CPM interrups */
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205 IMMR->cpmi_cipr = 0xFFFFFFFF; /* Clear all pending interrupt events */
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206 IMMR->cpmi_cimr = 0; /* Mask all event interrupts */
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207
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208 /*------------------------------------*/
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209 /* 8-bit mode, no parity, 1 stop-bit */
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210 /* UART SMC Mode */
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211 /* Normal operation (no loopback), */
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212 /* SMC Transmitter/Receiver Enabled */
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213 /*------------------------------------*/
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214
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215 IMMR->smc_regs[SMC2_REG].smc_smcmr = 0x4823;
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216
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217 /*---------------------------------------*/
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218 /* Initialize Rx and Tx Params for SMC2: */
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219 /* Spin until cpcr flag is cleared */
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220 /*---------------------------------------*/
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221
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222 for(IMMR->cp_cr = 0x00d1; IMMR->cp_cr & 0x0001;) ;
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223
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224 }
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225
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226
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227
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228 /*-----------------------------------------------------------------------------
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229 *
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230 * FUNCTION NAME: InitBDs
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231 *
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232 * DESCRIPTION: This function initializes the Tx and Rx Buffer Descriptors.
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233 *
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234 * EXTERNAL EFFECT: RxTxBD
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235 *
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236 * PARAMETERS: None
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237 *
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238 * RETURNS: None
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239 *
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240 *---------------------------------------------------------------------------*/
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241
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242 static void InitBDs(void)
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243
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244 {
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245 /*--------------------------------------------------------------------*/
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246 /* We add 64 bytes to the start of the buffer descriptors because */
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247 /* this code was also tested on the monitor version of SDS debugger. */
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248 /* The monitor program on our target uses most of the first 64 bytes */
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249 /* for buffer descriptors. If you are not using the SDS monitor with */
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250 /* Motorola's ADS development board, you can delete 64 below and */
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251 /* start at the beginning of this particular block of Dual Port RAM. */
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252 /*--------------------------------------------------------------------*/
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253
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254 /*----------------------------------*/
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255 /* Get pointer to BD area on DP RAM */
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256 /*----------------------------------*/
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257
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258 RxTxBD = (BDRINGS *)(IMMR->qcp_or_ud.ud.udata_bd + 64);
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259
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260 /*-------------------------------------------------------------------*/
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261 /* Establish the buffer pool in Dual Port RAM. We do this because the*/
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262 /* pool size is only 2 bytes (1 for Rx and 1 for Tx) and to avoid */
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263 /* disabling data cache for the memory region where BufferPool would */
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264 /* reside. The CPM does not recognize data in buffer pools once it */
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265 /* been cached. It's acesses are direct through DMA to external */
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266 /* memory. */
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267 /*-------------------------------------------------------------------*/
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268
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269 SMC2Buffers = (LB *)(IMMR->qcp_or_ud.ud.udata_bd + 80);
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270
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271 /*-----------------------------------*/
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272 /* Setup Receiver Buffer Descriptors */
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273 /*-----------------------------------*/
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274
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275 RxTxBD->RxBD.bd_cstatus = 0xA000; /* Enable, Last BD */
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276 RxTxBD->RxBD.bd_length = 1;
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277 RxTxBD->RxBD.bd_addr = &(SMC2Buffers->RxBuffer);
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278
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279
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280 /*--------------------------------------*/
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281 /* Setup Transmitter Buffer Descriptors */
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282 /*--------------------------------------*/
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283
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284 RxTxBD->TxBD.bd_cstatus = 0x2000; /* Buffer not yet ready; Last BD */
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285 RxTxBD->TxBD.bd_length = 1;
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286 RxTxBD->TxBD.bd_addr = &(SMC2Buffers->TxBuffer);
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287
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288 } /* END InitBDs */
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289
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290
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291 #if 0 // static unused function. -jskov 19990122
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292 /*-----------------------------------------------------------------------------
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293 *
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294 * FUNCTION NAME: EchoChar
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295 *
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296 * DESCRIPTION: This function facilitates the echoing of a received character.
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297 *
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298 * EXTERNAL EFFECT: RxTxBD
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299 *
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300 * PARAMETERS: None
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301 *
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302 * RETURNS: None
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303 *
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304 *---------------------------------------------------------------------------*/
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305
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306 static void EchoChar(void)
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307
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308 {
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309 char mych;
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310
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311 mych = cyg_smc2_getchar();
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312 cyg_smc2_putchar(mych);
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313
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314 } /* end EchoChar */
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315 #endif
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316
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317 /*-----------------------------------------------------------------------------
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318 *
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319 * FUNCTION NAME: cyg_smc2_putchar
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320 *
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321 * DESCRIPTION: Output a character to SMC2
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322 *
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323 * EXTERNAL EFFECT: RxTxBD
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324 *
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325 * PARAMETERS: ch - input character
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326 *
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327 * RETURNS: None
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328 *
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329 *---------------------------------------------------------------------------*/
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330
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331 void cyg_smc2_putchar(char ch)
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332
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333 {
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334 /*-----------------------------------*/
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335 /* Loop until transmission completed */
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336 /*-----------------------------------*/
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337
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338 while (RxTxBD->TxBD.bd_cstatus & 0x8000);
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339
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340 /*------------*/
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341 /* Store data */
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342 /*------------*/
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343
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344 *(RxTxBD->TxBD.bd_addr) = ch;
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345 RxTxBD->TxBD.bd_length = 1;
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346
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347 /*---------------*/
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348 /* Set Ready bit */
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349 /*---------------*/
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350
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351 RxTxBD->TxBD.bd_cstatus |= 0x8000;
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352
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353 }
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354
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355
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356
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357 /*-----------------------------------------------------------------------------
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358 *
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359 * FUNCTION NAME: cyg_smc2_getchar
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360 *
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361 * DESCRIPTION: Get a character from SMC2
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362 *
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363 * EXTERNAL EFFECT: RxTxBD
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364 *
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365 * PARAMETERS: NONE
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366 *
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367 * RETURNS: A character from SMC2
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368 *
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369 *---------------------------------------------------------------------------*/
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370
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371 char cyg_smc2_getchar(void)
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372
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373 {
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374
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375 char ch; /* output character from SMC2 */
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376
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377 /*--------------------*/
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378 /* Loop if RxBD empty */
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379 /*--------------------*/
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380
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381 while (RxTxBD->RxBD.bd_cstatus & 0x8000);
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382
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383 /*--------------*/
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384 /* Receive data */
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385 /*--------------*/
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386
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387 ch = *(RxTxBD->RxBD.bd_addr);
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388
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389 /*----------------------*/
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390 /* Set Buffer Empty bit */
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391 /*----------------------*/
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392
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393 RxTxBD->RxBD.bd_cstatus |= 0x8000;
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394
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395 return ch;
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396
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397 }
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398
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399
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400 #if 0 // static unused function. -jskov 19990122
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401 /*-----------------------------------------------------------------------------
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402 *
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403 * FUNCTION NAME: SMC2Poll
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404 *
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405 * DESCRIPTION: Poll SMC2 RxBD and check to see if a character was received
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406 *
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407 * EXTERNAL EFFECT: NONE
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408 *
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409 * PARAMETERS: NONE
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410 *
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411 * RETURNS: A one if there is a character available in the receive buffer,
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412 * else zero.
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413 *
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414 *---------------------------------------------------------------------------*/
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415
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416 static char SMC2Poll(void)
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417
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418 {
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419 return (RxTxBD->RxBD.bd_cstatus & 0x8000) ? 0 : 1;
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420
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421 } /* END SMC2Poll */
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422 #endif
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423
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424
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425 /*-----------------------------------------------------------------------------
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426 *
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427 * FUNCTION NAME: GetIMMR
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428 *
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429 * DESCRIPTION: Returns current value in the IMMR register.
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430 *
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431 * EXTERNAL EFFECT: NONE
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432 *
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433 * PARAMETERS: NONE
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434 *
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435 * RETURNS: The IMMR value in r3. The compiler uses r3 as the register
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436 * containing the return value.
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437 *
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438 *---------------------------------------------------------------------------*/
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439
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440 static unsigned long GetIMMR(void)
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441
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442 {
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443 unsigned long ret;
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444 asm volatile (" mfspr %0,638 " : "=r" (ret)); /* IMMR is spr #638 */
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445
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446 return ret;
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447 }
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448
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449
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450 /* EOF hal/powerpc/fads/quicc_smc2.c */