Mercurial > ecos
annotate packages/hal/sparclite/sleb/current/src/hal_diag.c @ 3292:7f8e529b4d82 default tip
Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
| author | vae |
|---|---|
| date | Wed, 29 Apr 2015 23:31:48 +0000 |
| parents | 74dbf4c3f2e1 |
| children |
| rev | line source |
|---|---|
| 2 | 1 /*============================================================================= |
| 2 // | |
| 3 // hal_diag.c | |
| 4 // | |
| 5 // HAL diagnostic output code | |
| 6 // | |
| 7 //============================================================================= | |
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8 // ####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
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12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later |
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16 // version. |
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17 // |
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18 // eCos is distributed in the hope that it will be useful, but WITHOUT |
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19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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21 // for more details. |
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22 // |
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23 // You should have received a copy of the GNU General Public License |
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24 // along with eCos; if not, write to the Free Software Foundation, Inc., |
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25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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26 // |
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27 // As a special exception, if other files instantiate templates or use |
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28 // macros or inline functions from this file, or you compile this file |
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29 // and link it with other works to produce a work based on this file, |
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30 // this file does not by itself cause the resulting work to be covered by |
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31 // the GNU General Public License. However the source code for this file |
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32 // must still be made available in accordance with section (3) of the GNU |
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33 // General Public License v2. |
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34 // |
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35 // This exception does not invalidate any other reasons why a work based |
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36 // on this file might be covered by the GNU General Public License. |
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37 // ------------------------------------------- |
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38 // ####ECOSGPLCOPYRIGHTEND#### |
| 2 | 39 //============================================================================= |
| 40 //#####DESCRIPTIONBEGIN#### | |
| 41 // | |
| 42 // Author(s): nickg | |
| 43 // Contributors: nickg | |
| 44 // Date: 1998-03-02 | |
| 45 // Purpose: HAL diagnostic output | |
| 46 // Description: Implementations of HAL diagnostic output support. | |
| 47 // | |
| 48 //####DESCRIPTIONEND#### | |
| 49 // | |
| 50 //===========================================================================*/ | |
| 51 | |
| 52 #include <pkgconf/system.h> | |
| 53 #include <pkgconf/hal.h> | |
| 54 #include <pkgconf/hal_sparclite.h> | |
| 55 #include <pkgconf/hal_sparclite_sleb.h> | |
| 56 | |
| 57 #include <cyg/infra/cyg_type.h> // base types | |
| 58 | |
| 59 #include <cyg/hal/hal_arch.h> | |
| 60 #include <cyg/hal/hal_diag.h> | |
| 61 #include <cyg/hal/hal_intr.h> | |
| 62 | |
| 63 #include <cyg/hal/hal_cygm.h> | |
| 64 | |
| 65 /*---------------------------------------------------------------------------*/ | |
| 66 | |
| 67 #ifdef CYG_KERNEL_DIAG_GDB | |
| 68 | |
| 69 #ifdef CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT // then force $O packets to serial | |
| 70 | |
| 71 void hal_diag_init(void) | |
| 72 { | |
| 73 // hal_diag_init_serial(); | |
| 74 } | |
| 75 | |
| 76 void hal_diag_write_char_serial( char c ) | |
| 77 { | |
| 78 HAL_REORDER_BARRIER(); | |
| 79 HAL_DIAG_WRITE_CHAR_DIRECT( c ); | |
| 80 HAL_REORDER_BARRIER(); | |
| 81 HAL_DIAG_WRITE_CHAR_WAIT_FOR_EMPTY(); | |
| 82 HAL_REORDER_BARRIER(); | |
| 83 } | |
| 84 | |
| 85 void hal_diag_write_char(char c) | |
| 86 { | |
| 87 static char line[100]; | |
| 88 static int pos = 0; | |
| 89 | |
| 90 // No need to send CRs | |
| 91 if( c == '\r' ) return; | |
| 92 | |
| 93 line[pos++] = c; | |
| 94 | |
| 95 if( c == '\n' || pos == sizeof(line) ) | |
| 96 { | |
| 97 CYG_INTERRUPT_STATE old; | |
| 98 | |
| 99 // Disable interrupts. This prevents GDB trying to interrupt us | |
| 100 // while we are in the middle of sending a packet. The serial | |
| 101 // receive interrupt will be seen when we re-enable interrupts | |
| 102 // later. | |
| 103 | |
| 104 HAL_DISABLE_INTERRUPTS(old); | |
| 105 | |
| 106 while(1) | |
| 107 { | |
| 108 cyg_uint32 status, c1, tries; | |
| 109 static char hex[] = "0123456789ABCDEF"; | |
| 110 cyg_uint8 csum = 0; | |
| 111 int i; | |
| 112 | |
| 113 hal_diag_write_char_serial('$'); | |
| 114 hal_diag_write_char_serial('O'); | |
| 115 csum += 'O'; | |
| 116 for( i = 0; i < pos; i++ ) | |
| 117 { | |
| 118 char ch = line[i]; | |
| 119 char h = hex[(ch>>4)&0xF]; | |
| 120 char l = hex[ch&0xF]; | |
| 121 hal_diag_write_char_serial(h); | |
| 122 hal_diag_write_char_serial(l); | |
| 123 csum += h; | |
| 124 csum += l; | |
| 125 } | |
| 126 hal_diag_write_char_serial('#'); | |
| 127 hal_diag_write_char_serial(hex[(csum>>4)&0xF]); | |
| 128 hal_diag_write_char_serial(hex[csum&0xF]); | |
| 129 | |
| 130 // Wait for the ACK character '+' from GDB here and handle | |
| 131 // receiving a ^C instead. This is the reason for this clause | |
| 132 // being a loop. | |
| 133 status = 0; | |
| 134 tries = 1000000000; | |
| 135 while ( 0 == (HAL_SPARC_86940_FLAG_RXRDY & status) ) { | |
| 136 if ( 0 == --tries ) | |
| 137 break; | |
| 138 HAL_SPARC_86940_SDTR0_STAT_READ( status ); | |
| 139 } | |
| 140 if ( 0 == tries ) // then we broke out after waiting | |
| 141 continue; // the outer loop, send the packet | |
| 142 | |
| 143 HAL_SPARC_86940_SDTR0_RXDATA_READ( c1 ); | |
| 144 | |
| 145 // We must ack the interrupt caused by that read to avoid | |
| 146 // confusing the GDB stub ROM. | |
| 147 HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_VECTOR_INTERRUPT_10 ); | |
| 148 | |
| 149 if( c1 == '+' ) | |
| 150 break; // a good acknowledge | |
| 151 | |
| 152 if( c1 == 3 ) { | |
| 153 // Ctrl-C: breakpoint. | |
| 154 asm volatile( "ta 2; nop; nop; nop" ); | |
| 155 break; | |
| 156 } | |
| 157 // otherwise, loop round again | |
| 158 } | |
| 159 | |
| 160 pos = 0; | |
| 161 | |
| 162 // And re-enable interrupts | |
| 163 HAL_RESTORE_INTERRUPTS(old); | |
| 164 | |
| 165 } | |
| 166 } | |
| 167 #else // CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT not defined; use CygMon | |
| 168 | |
| 169 // All this code provided by MSalter - ta. | |
| 170 | |
| 171 struct bsp_comm_procs { | |
| 172 void *ch_data; | |
| 173 void (*__write)(void *ch_data, const char *buf, int len); | |
| 174 int (*__read)(void *ch_data, char *buf, int len); | |
| 175 void (*__putc)(void *ch_data, char ch); | |
| 176 int (*__getc)(void *ch_data); | |
| 177 int (*__control)(void *ch_data, int func, ...); | |
| 178 }; | |
| 179 | |
| 180 // This is pointed to by entry BSP_NOTVEC_BSP_COMM_PROCS: | |
| 181 typedef struct { | |
| 182 int version; /* version number for future expansion */ | |
| 183 void *__ictrl_table; | |
| 184 void *__exc_table; | |
| 185 void *__dbg_vector; | |
| 186 void *__kill_vector; | |
| 187 struct bsp_comm_procs *__console_procs; | |
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188 struct bsp_comm_procs *__debug_procs; |
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189 void *__flush_dcache; |
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190 void *__flush_icache; |
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191 void *__cpu_data; |
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192 void *__board_data; |
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193 void *__sysinfo; |
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194 int (*__set_debug_comm)(int __comm_id); |
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195 void *__set_console_comm; |
| 2 | 196 } bsp_shared_t; |
| 197 | |
| 198 | |
| 199 static int | |
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200 hal_bsp_set_debug_comm(int arg) |
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201 { |
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202 bsp_shared_t *shared; |
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203 |
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204 shared = (bsp_shared_t *) |
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205 (CYGMON_VECTOR_TABLE[ BSP_NOTVEC_BSP_COMM_PROCS ]); |
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206 |
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207 if (0 != shared->__set_debug_comm) { |
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208 return (*(shared->__set_debug_comm))(arg); |
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209 } |
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210 return 0; |
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211 } |
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212 |
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213 static int |
| 2 | 214 hal_bsp_console_write(const char *p, int len) |
| 215 { | |
| 216 bsp_shared_t *shared; | |
| 217 struct bsp_comm_procs *com; | |
| 218 | |
| 219 shared = (bsp_shared_t *) | |
| 220 (CYGMON_VECTOR_TABLE[ BSP_NOTVEC_BSP_COMM_PROCS ]); | |
| 221 | |
| 222 com = shared->__console_procs; | |
| 223 | |
| 224 if (0 != com) { | |
| 225 com->__write(com->ch_data, p, len); | |
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226 |
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227 #if 1 |
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228 // FIXME: This is a workaround for PR 19926; CygMon does not |
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229 // expect to be sharing the line with a serial driver (which |
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230 // can be excused :) and so doesn't acknowledge the interrupt. |
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231 // In normal circumstances CygMon would handle the resulting |
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232 // interrupt and do the right thing. However, when using the |
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233 // serial driver it is handling the interrupts and gets |
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234 // mightily confused by these spurious interrupts. |
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235 // |
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236 // As a workaround, ask CygMon which communication port is |
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237 // using for console output. If this is the serial port |
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238 // (comm 0), acknowledge the interrupt. |
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239 if ( 0 == hal_bsp_set_debug_comm( -1 ) ) |
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240 HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_VECTOR_INTERRUPT_10 ); |
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241 #endif |
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242 |
| 2 | 243 return 1; |
| 244 } | |
| 245 return 0; | |
| 246 } | |
| 247 | |
| 248 static void | |
| 249 hal_dumb_serial_write(const char *p, int len) | |
| 250 { | |
| 251 int i; | |
| 252 for ( i = 0 ; i < len; i++ ) { | |
| 253 HAL_DIAG_WRITE_CHAR_DIRECT( p[ i ] ); | |
| 254 } | |
| 255 } | |
| 256 | |
| 257 | |
| 258 void hal_diag_init(void) | |
| 259 { | |
| 260 } | |
| 261 | |
| 262 void hal_diag_write_char(char c) | |
| 263 { | |
| 264 static char line[100]; | |
| 265 static int pos = 0; | |
| 266 | |
| 267 // No need to send CRs | |
| 268 if( c == '\r' ) return; | |
| 269 | |
| 270 line[pos++] = c; | |
| 271 | |
| 272 if( c == '\n' || pos == sizeof(line) ) { | |
| 273 CYG_INTERRUPT_STATE old; | |
| 274 | |
| 275 // Disable interrupts. This prevents GDB trying to interrupt us | |
| 276 // while we are in the middle of sending a packet. The serial | |
| 277 // receive interrupt will be seen when we re-enable interrupts | |
| 278 // later. | |
| 279 | |
| 280 HAL_DISABLE_INTERRUPTS(old); | |
| 281 | |
| 282 if ( ! hal_bsp_console_write( line, pos ) ) | |
| 283 // then there is no function registered, just spew it out serial | |
| 284 hal_dumb_serial_write( line, pos ); | |
| 285 | |
| 286 pos = 0; | |
| 287 | |
| 288 // And re-enable interrupts | |
| 289 HAL_RESTORE_INTERRUPTS(old); | |
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290 |
| 2 | 291 } |
| 292 } | |
| 293 | |
| 294 #endif // CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT not defined; use CygMon | |
| 295 | |
| 296 #else // CYG_KERNEL_DIAG_GDB not defined, so we are going to the serial line | |
| 297 // without GDB encoding - likely to be ROM startup. | |
| 298 | |
| 299 /* Address of clock switch */ | |
| 300 #define CLKSW_ADDR 0x01000003 | |
| 301 | |
| 302 /* Address of SW1 */ | |
| 303 #define SW1_ADDR 0x02000003 | |
| 304 | |
| 305 void hal_diag_init(void) | |
| 306 { | |
| 307 cyg_uint32 clk, tval; | |
| 308 | |
| 309 // first set the baud rate | |
| 310 | |
| 311 clk = *(unsigned char *)CLKSW_ADDR; | |
| 312 if (clk & 0x80) | |
| 313 clk = 10; | |
| 314 | |
| 315 clk = (clk & 0x3f) * 1000000; /* in MHz */ | |
| 316 | |
| 317 tval = clk / 19200; | |
| 318 tval /= 32; | |
| 319 tval -= 1; | |
| 320 | |
| 321 HAL_SPARC_86940_TCR3_WRITE( | |
| 322 HAL_SPARC_86940_TCR_CE | | |
| 323 HAL_SPARC_86940_TCR_CLKINT | | |
| 324 HAL_SPARC_86940_TCR_OUTC3 | | |
| 325 HAL_SPARC_86940_TCR_SQWAVE ); | |
| 326 | |
| 327 HAL_SPARC_86940_RELOAD3_WRITE( tval); | |
| 328 | |
| 329 #define DELAY(x) \ | |
| 330 CYG_MACRO_START int i; for (i = 0; i < x; i++); CYG_MACRO_END | |
| 331 | |
| 332 HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); | |
| 333 DELAY(100); | |
| 334 HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); | |
| 335 DELAY(100); | |
| 336 HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); | |
| 337 DELAY(100); | |
| 338 | |
| 339 HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_CMD_IRST ); | |
| 340 DELAY(100); | |
| 341 | |
| 342 /* first write after reset is to mode register */ | |
| 343 HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_DIV16_CLK | | |
| 344 HAL_SPARC_86940_SER_8BITS | | |
| 345 HAL_SPARC_86940_SER_NO_PARITY | | |
| 346 HAL_SPARC_86940_SER_STOP1 ); | |
| 347 DELAY(100); | |
| 348 | |
| 349 /* subsequent writes are to command register */ | |
| 350 HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_CMD_RTS | | |
| 351 HAL_SPARC_86940_SER_CMD_DTR | | |
| 352 HAL_SPARC_86940_SER_CMD_EFR | | |
| 353 HAL_SPARC_86940_SER_CMD_RXEN | | |
| 354 HAL_SPARC_86940_SER_CMD_TXEN ); | |
| 355 DELAY(100); | |
| 356 } | |
| 357 | |
| 358 | |
| 359 | |
| 360 | |
| 361 | |
| 362 #endif // CYG_KERNEL_DIAG_GDB | |
| 363 | |
| 364 /*---------------------------------------------------------------------------*/ | |
| 365 /* End of hal_diag.c */ |