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annotate packages/hal/synth/arch/current/include/hal_intr.h @ 3292:7f8e529b4d82 default tip

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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #ifndef CYGONCE_HAL_HAL_INTR_H
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2 #define CYGONCE_HAL_HAL_INTR_H
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3
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4 //==========================================================================
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5 //
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6 // hal_intr.h
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7 //
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8 // HAL Interrupt and clock support
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9 //
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10 //==========================================================================
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11 // ####ECOSGPLCOPYRIGHTBEGIN####
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12 // -------------------------------------------
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13 // This file is part of eCos, the Embedded Configurable Operating System.
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later
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19 // version.
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20 //
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21 // eCos is distributed in the hope that it will be useful, but WITHOUT
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22 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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24 // for more details.
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25 //
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26 // You should have received a copy of the GNU General Public License
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27 // along with eCos; if not, write to the Free Software Foundation, Inc.,
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28 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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29 //
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30 // As a special exception, if other files instantiate templates or use
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31 // macros or inline functions from this file, or you compile this file
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32 // and link it with other works to produce a work based on this file,
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33 // this file does not by itself cause the resulting work to be covered by
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34 // the GNU General Public License. However the source code for this file
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35 // must still be made available in accordance with section (3) of the GNU
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36 // General Public License v2.
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37 //
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38 // This exception does not invalidate any other reasons why a work based
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39 // on this file might be covered by the GNU General Public License.
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40 // -------------------------------------------
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41 // ####ECOSGPLCOPYRIGHTEND####
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42 //==========================================================================
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43 //#####DESCRIPTIONBEGIN####
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44 //
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45 // Author(s): proven
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46 // Contributors: proven, jskov, pjo, nickg, bartv
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47 // Date: 1999-02-20
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48 // Purpose: Define Interrupt support
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49 // Description: The macros defined here provide the HAL APIs for handling
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50 // interrupts and the clock.
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51 //
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52 // Usage:
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53 // #include <cyg/hal/hal_intr.h>
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54 // ...
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55 //
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56 //####DESCRIPTIONEND####
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57 //
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58 //==========================================================================
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59
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60 // Interrupt and exception handling in the synthetic target is very much
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61 // tied up with POSIX signal handling.
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62 //
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63 // There are two interrupt sources to consider. The system clock is
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64 // provided most conveniently by a timer signal SIGALRM. All other
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65 // interrupts are handled by communication with the auxiliary program
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66 // and involve SIGIO. The model that is actually presented to
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67 // higher-level code is a single VSR, and 32 ISRs. ISR 0 is
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68 // arbitrarily assigned to the clock. The remaining 31 ISRs correspond
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69 // to devices managed through the auxiliary, effectively providing an
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70 // interrupt controller. A single VSR suffices because it is passed
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71 // the signal number as argument.
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72 //
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73 // Exceptions also correspond to signals, but are not handled through
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74 // the same VSR: slightly different processing is needed for
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75 // interrupts vs. exceptions, for example the latter does not involve
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76 // calling interrupt_end(). The exceptions of interest are SIGILL,
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77 // SIGBUS, SIGFPE, and SIGSEGV. SIGBUS and SIGSEGV are treated as a
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78 // single exception. Obviously there are other signals but they do not
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79 // have obvious meanings in the context of the synthetic target. NOTE:
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80 // SIGSTKFLT may be needed as well at some point.
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81
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82 #define CYGNUM_HAL_INTERRUPT_RTC 0
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83 #define CYGNUM_HAL_ISR_MIN 0
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84 #define CYGNUM_HAL_ISR_MAX 31
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85 #define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX + 1)
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86
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87 #define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION 0
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88 #define CYGNUM_HAL_EXCEPTION_DATA_ACCESS 1
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89 #define CYGNUM_HAL_EXCEPTION_FPU 2
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90
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91 #define CYGNUM_HAL_EXCEPTION_MIN 0
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92 #define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_EXCEPTION_FPU
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93 #define CYGNUM_HAL_EXCEPTION_COUNT (CYGNUM_HAL_EXCEPTION_MAX + 1)
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94
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95 #define CYGNUM_HAL_VECTOR_SIGNAL 0
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96 #define CYGNUM_HAL_VSR_MIN 0
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97 #define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_SIGNAL
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98 #define CYGNUM_HAL_VSR_COUNT (CYGNUM_HAL_VSR_MAX + 1)
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99
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100 // These #include's cannot happen until after the above are defined.
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101 // There are dependencies on e.g. CYGNUM_HAL_EXCEPTION_COUNT.
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102 // Basic data types
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103 #include <cyg/infra/cyg_type.h>
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104
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105 // cyg_vector_t etc., supplied either by the kernel or the common HAL
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106 #include <cyg/hal/drv_api.h>
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107
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108 // Nearly all interrupt state control happens via functions. This
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109 // facilitates debugging, for example it is easier to set breakpoints
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110 // that way, at the cost of performance. However performance is not a
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111 // critical issue for the synthetic target, Instead it is intended to
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112 // facilitate application development, and hence debugability has a
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113 // higher priority. There is one exception: the sequence
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114 // disable_interrupts() followed by restore_interrupts() occurs
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115 // frequently and is worth some inlining.
176
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116 //
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117 // Note: some of the details such as the existence of a global
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118 // variable hal_interrupts_enabled are known to the context switch
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119 // code in the variant HAL.
161
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120 typedef cyg_bool_t CYG_INTERRUPT_STATE;
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121 externC volatile cyg_bool_t hal_interrupts_enabled;
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122 externC void hal_enable_interrupts(void);
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123 externC cyg_bool_t hal_interrupt_in_use(cyg_vector_t);
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124 externC void hal_interrupt_attach(cyg_vector_t, cyg_ISR_t*, CYG_ADDRWORD, CYG_ADDRESS);
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125 externC void hal_interrupt_detach(cyg_vector_t, cyg_ISR_t*);
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126 externC void (*hal_vsr_get(cyg_vector_t))(void);
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127 externC void hal_vsr_set(cyg_vector_t, void (*)(void), void (**)(void));
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128 externC void hal_interrupt_mask(cyg_vector_t);
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129 externC void hal_interrupt_unmask(cyg_vector_t);
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130 externC void hal_interrupt_acknowledge(cyg_vector_t);
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131 externC void hal_interrupt_configure(cyg_vector_t, cyg_bool_t, cyg_bool_t);
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132 externC void hal_interrupt_set_level(cyg_vector_t, cyg_priority_t);
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133
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134
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135 #define HAL_ENABLE_INTERRUPTS() \
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136 CYG_MACRO_START \
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137 hal_enable_interrupts(); \
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138 CYG_MACRO_END
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139
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140 #define HAL_DISABLE_INTERRUPTS(_old_) \
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141 CYG_MACRO_START \
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142 _old_ = hal_interrupts_enabled; \
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143 hal_interrupts_enabled = false; \
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144 CYG_MACRO_END
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145
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146 #define HAL_RESTORE_INTERRUPTS(_old_) \
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147 CYG_MACRO_START \
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148 if (!_old_) { \
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149 hal_interrupts_enabled = false; \
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150 } else if (!hal_interrupts_enabled) { \
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151 hal_enable_interrupts(); \
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152 } \
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153 CYG_MACRO_END
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154
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155 #define HAL_QUERY_INTERRUPTS(_old_) \
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156 CYG_MACRO_START \
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157 _old_ = hal_interrupts_enabled; \
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158 CYG_MACRO_END
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159
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160 #define HAL_TRANSLATE_VECTOR(_vector_, _index_) \
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161 CYG_MACRO_START \
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162 (_index_) = (_vector_); \
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163 CYG_MACRO_END
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164
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165 #define HAL_INTERRUPT_IN_USE(_vector_, _state_) \
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166 CYG_MACRO_START \
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167 (_state_) = hal_interrupt_in_use(_vector_); \
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168 CYG_MACRO_END
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169
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170 #define HAL_INTERRUPT_ATTACH(_vector_, _isr_, _data_, _object_ ) \
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171 CYG_MACRO_START \
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172 hal_interrupt_attach(_vector_, _isr_, (CYG_ADDRWORD) _data_, (CYG_ADDRESS) _object_); \
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173 CYG_MACRO_END
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174
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175 #define HAL_INTERRUPT_DETACH(_vector_, _isr_) \
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176 CYG_MACRO_START \
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177 hal_interrupt_detach(_vector_, _isr_); \
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178 CYG_MACRO_END
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179
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180 #define HAL_VSR_GET(_vector_, _vsr_) \
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181 CYG_MACRO_START \
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182 (*_vsr_) = hal_vsr_get(_vector_); \
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183 CYG_MACRO_END
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184
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185 #define HAL_VSR_SET(_vector_, _vsr_, _poldvsr_) \
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186 CYG_MACRO_START \
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187 hal_vsr_set(_vector_, _vsr_, _poldvsr_); \
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188 CYG_MACRO_END
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189
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190 #define HAL_INTERRUPT_MASK(_vector_) \
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191 CYG_MACRO_START \
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192 hal_interrupt_mask(_vector_); \
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193 CYG_MACRO_END
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194
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195 #define HAL_INTERRUPT_UNMASK(_vector_) \
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196 CYG_MACRO_START \
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197 hal_interrupt_unmask(_vector_); \
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198 CYG_MACRO_END
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199
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200 #define HAL_INTERRUPT_ACKNOWLEDGE(_vector_) \
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201 CYG_MACRO_START \
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202 hal_interrupt_acknowledge(_vector_); \
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203 CYG_MACRO_END
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204
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205 #define HAL_INTERRUPT_CONFIGURE(_vector_, _level_, _up_) \
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206 CYG_MACRO_START \
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207 hal_interrupt_configure(_vector_, _level_, _up_); \
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208 CYG_MACRO_END
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209
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210 #define HAL_INTERRUPT_SET_LEVEL(_vector_, _level_) \
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211 CYG_MACRO_START \
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212 hal_interrupt_set_level(_vector_, _level_); \
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213 CYG_MACRO_END
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214
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215 // Additional data exported by the synthetic target interrupt handling
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216 // subsystem. These two variables correspond to typical interrupt
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217 // status and mask registers.
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218 extern volatile cyg_uint32 synth_pending_isrs;
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219 extern volatile cyg_uint32 synth_masked_isrs;
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220
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221 // ----------------------------------------------------------------------------
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222 // The clock support
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223 externC void hal_clock_initialize(cyg_uint32);
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224 externC cyg_uint32 hal_clock_read(void);
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225
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226 #define HAL_CLOCK_INITIALIZE( _period_ ) \
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227 CYG_MACRO_START \
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228 hal_clock_initialize(_period_); \
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229 CYG_MACRO_END
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230
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231 // No special action is needed for reset.
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232 #define HAL_CLOCK_RESET( _vector_, _period_ ) \
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233 CYG_EMPTY_STATEMENT
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234
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235 #define HAL_CLOCK_READ(_pvalue_) \
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236 CYG_MACRO_START \
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237 *(_pvalue_) = hal_clock_read(); \
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238 CYG_MACRO_END
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239
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240 // ----------------------------------------------------------------------------
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241 // HAL_DELAY_US() support. The macro is provided by the processor-specific
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242 // HAL, but the bogomips rating is provided by the architectural code.
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243 extern int hal_bogomips;
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244 #include <cyg/hal/var_intr.h>
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245
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246 // ----------------------------------------------------------------------------
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247 // Resetting the Synth target is not possible, but existing the process is.
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248 externC void cyg_hal_sys_exit(int);
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249 #define HAL_PLATFORM_RESET() \
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250 CYG_MACRO_START \
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251 cyg_hal_sys_exit(0); \
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252 CYG_MACRO_END
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253
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254 // ----------------------------------------------------------------------------
161
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255 // Test case exit support.
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256 #define CYGHWR_TEST_PROGRAM_EXIT() \
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257 CYG_MACRO_START \
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258 cyg_hal_sys_exit(0); \
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259 CYG_MACRO_END
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260 //---------------------------------------------------------------------------
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261 #endif // ifndef CYGONCE_HAL_HAL_INTR_H
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262 // End of hal_intr.h