#ifndef CYGONCE_HAL_HAL_SPD_H
#define CYGONCE_HAL_HAL_SPD_H

//=============================================================================
//
//      hal_spd.h
//
//      HAL header for SDRAM Serial Presence Detect support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
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// for more details.
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// You should have received a copy of the GNU General Public License along
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
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// or inline functions from this file, or you compile this file and link it
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// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   msalter
// Contributors:msalter
// Date:        2002-01-17
// Purpose:     Generic HAL SPD header.
// Usage:       #include <cyg/hal/hal_spd.h>
// Description: This header provides byte numbers and bit definitions for
//              serial EEPROM containing SDRAM module information.
//                           
//####DESCRIPTIONEND####
//
//=============================================================================

// Commonly used bytes
#define	SPD_BANKCNT	    5	// number of module banks
#define	SPD_CONFIG	   11	// DIMM configuration type (Parity or not, EEC)
#define	SPD_REFRESH        12 	// Referesh rate
#define	SPD_SDRAM_WIDTH    13 	// DRAM width
#define	SPD_MOD_ATTRIB     21 	// DRAM module attribute
#define	SPD_BANKSZ	   31	// module bank density
#define	SPD_CHECKSUM	   63 	// checksum for bytes 0-62

// SPD_MOD_ATTRIB bits
#define SPD_ATTRIB_BUF_CTL 0x01 // Buffered Addr/Control inputs
#define SPD_ATTRIB_REG_CTL 0x02 // Registered Addr/Control inputs
#define SPD_ATTRIB_PLL     0x04 // On-card PLL
#define SPD_ATTRIB_BUF_DQ  0x08 // Buffered DQMB inputs
#define SPD_ATTRIB_REG_DQ  0x10 // Registered DQMB inputs
#define SPD_ATTRIB_DIFF    0x20 // Differential clock input
#define SPD_ATTRIB_RRA     0x40 // Redundant Row Address

//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_HAL_SPD_H
// End of hal_spd.h
