2005-05-18  Peter Korsgaard  <jacmet@sunsite.dk>

	* src/var_misc.c (hal_ppc40x_delay_us): Removed double
	initialization of delay_period. Work correctly for system clock !=
	100Hz.

2005-05-04  Peter Korsgaard  <jacmet@sunsite.dk>

	* include/var_io.h: Only define PCI macros if 405GP PCI support is
	enabled.

2004-09-16  Gary Thomas  <gary@mlbassoc.com>

	* src/hal_diag.c: Assert RTS/DTR modem signals.

2004-02-26  Gary Thomas  <gary@mlbassoc.com>

	* src/ppc405_pci.c: 
	* cdl/hal_powerpc_ppc40x.cdl: Make display of PCI "contents" optional.

2004-02-17  Gary Thomas  <gary@mlbassoc.com>

	* cdl/hal_powerpc_ppc40x.cdl: Fix real time clock - this counter
	has no dividers in the chain (hence no need to divide by 4)

2003-10-15  Gary Thomas  <gary@mlbassoc.com>

	* include/var_regs.h: Changes to allow building with GCC-3.3.x
	since the newest GAS doesn't like spaces in expressions :-(

2003-10-02  Gary Thomas  <gary@mlbassoc.com>

	* include/var_regs.h: Add CPU serial number registers (405 only)

2003-09-26  Gary Thomas  <gary@mlbassoc.com>

	* src/ppc405_pci.c: IRQ mapping now defined by platform.

2003-09-20  Gary Thomas  <gary@mlbassoc.com>

	* src/ppc405_pci.c: Need call to cyg_pci_init() to get proper I/O
	addressing setup.

2003-09-19  Gary Thomas  <gary@mlbassoc.com>

	* src/ppc405_pci.c: New file - basic support for PCI on PPC 405GP

	* src/hal_diag.c: New file - diagnostic I/O support (previously
	was defined by platforms).  Note: only for 405GP based devices.

2002-11-21  Gary Thomas  <gary@mlbassoc.com>

	* src/var_intr.c: 
	* include/variant.inc: 
	* include/var_intr.h: Better variant/platform support (platforms can
	override most all default behaviour).

2002-11-20  Gary Thomas  <gary@mlbassoc.com>

	* include/var_cache.h: Cache sizes differ based on CPU.

	* include/var_intr.h: 
	* include/var_regs.h:
	* src/var_intr.c: Split interrupt control based on CPU type since
	403 uses a different controller than the 405 family.

	* cdl/hal_powerpc_ppc40x.cdl: Add 403/405/405GP controls.  Also,
	enable ROM monitor support (GDB).

2002-05-22  Jesper Skov  <jskov@redhat.com>

	* src/var_intr.c: Fixed warning.
	* src/var_misc.c: Same.

2002-05-13  Gary Thomas  <gthomas@redhat.com>

	* cdl/hal_powerpc_ppc40x.cdl: This processor family has no FPU.

2001-01-26  Jesper Skov  <jskov@redhat.com>

	* include/var_intr.h: Include plf_intr.h

2001-01-18  Gary Thomas  <gthomas@redhat.com>

	* cdl/hal_powerpc_ppc40x.cdl: Move CYGSEM_HAL_USE_ROM_MONITOR to
	platform CDL.

2001-01-17  Gary Thomas  <gthomas@redhat.com>

	* include/variant.inc: Fix EXISR interrupt decode.

2001-01-16  Gary Thomas  <gthomas@redhat.com>

	* src/var_intr.c (hal_variant_IRQ_init): Add platform IRQ support.
	(hal_ppc40x_interrupt_configure): Properly configure level interrupts.

2001-01-15  Gary Thomas  <gthomas@redhat.com>

	* include/var_regs.h (SPR_DBSR, SPR_DBCR): Special registers used
	for debug support.  Too bad the hardware is broken.

	* include/var_intr.h (CYGNUM_HAL_NO_VECTOR_TRACE): Disable common
	single step code [hardware does not work].

2000-11-21  Gary Thomas  <gthomas@redhat.com>

	* include/variant.inc: Include platform specifics <cyg/hal/plf.inc>

2000-11-12  Gary Thomas  <gthomas@redhat.com>

	* src/var_misc.c: Add hal_delay_us().

2000-11-04  Gary Thomas  <gthomas@redhat.com>

	* src/var_misc.c: Define clock handling for PPC40x (different
	from default since there is no decrementer).

	* include/variant.inc: Special interrupt fielder for timers.
	Add interrupt decode.

	* include/var_regs.h: Define architecture (variant) specific
	registers and special instructions used to access them.

	* src/var_intr.c: 
	* include/var_intr.h: Define proper interrupt support for
	this platform.

	* include/var_cache.h: Fix details of cache on PPC40x.  Note:
	the data cache has problems - currently left disabled.

	* cdl/hal_powerpc_ppc40x.cdl: Add support for ROM_MONITOR.

//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2002 Gary Thomas
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