Mercurial > ecos
comparison packages/hal/sh/arch/current/include/hal_cache.h @ 128:0c2b7be0d798 ecos-sw-2000-10-12
Merge from eCos master repository on 2000-10-12-08:46:24-BST
| author | jlarmour |
|---|---|
| date | Thu, 12 Oct 2000 20:31:43 +0000 |
| parents | 489eb5632bc3 |
| children | d2f49caf9e38 |
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| 127:67f0ef5f8ee9 | 128:0c2b7be0d798 |
|---|---|
| 86 | 86 |
| 87 externC void cyg_hal_cache_enable(void); | 87 externC void cyg_hal_cache_enable(void); |
| 88 externC void cyg_hal_cache_disable(void); | 88 externC void cyg_hal_cache_disable(void); |
| 89 externC void cyg_hal_cache_invalidate_all(void); | 89 externC void cyg_hal_cache_invalidate_all(void); |
| 90 externC void cyg_hal_cache_sync(void); | 90 externC void cyg_hal_cache_sync(void); |
| 91 externC void cyg_hal_cache_sync_region(cyg_haladdress base, | |
| 92 cyg_haladdrword len); | |
| 91 externC void cyg_hal_cache_write_mode(int mode); | 93 externC void cyg_hal_cache_write_mode(int mode); |
| 92 | 94 |
| 93 // Enable the cache | 95 // Enable the cache |
| 94 #define HAL_UCACHE_ENABLE() cyg_hal_cache_enable() | 96 #define HAL_UCACHE_ENABLE() cyg_hal_cache_enable() |
| 95 | 97 |
| 111 | 113 |
| 112 // Set the cache refill burst size | 114 // Set the cache refill burst size |
| 113 //#define HAL_UCACHE_BURST_SIZE(_size_) | 115 //#define HAL_UCACHE_BURST_SIZE(_size_) |
| 114 | 116 |
| 115 // Set the cache write mode | 117 // Set the cache write mode |
| 116 #define HAL_UCACHE_WRITE_MODE( _mode_ ) cyg_hal_cache_write_mode(_mode_) | 118 #define HAL_UCACHE_WRITE_MODE( _mode_ ) \ |
| 119 CYG_MACRO_START \ | |
| 120 cyg_uint32 _m_; \ | |
| 121 if (HAL_UCACHE_WRITETHRU_MODE == _mode_) \ | |
| 122 _m_ = CYGARC_REG_CCR_WT; \ | |
| 123 else \ | |
| 124 _m_ = CYGARC_REG_CCR_CB; \ | |
| 125 cyg_hal_cache_write_mode(_m_); \ | |
| 126 CYG_MACRO_END | |
| 117 | 127 |
| 118 #define HAL_UCACHE_WRITETHRU_MODE 0 | 128 #define HAL_UCACHE_WRITETHRU_MODE 0 |
| 119 #define HAL_UCACHE_WRITEBACK_MODE 1 | 129 #define HAL_UCACHE_WRITEBACK_MODE 1 |
| 130 | |
| 131 // This macro allows the client to specify separate modes for the two | |
| 132 // regions. | |
| 133 #define HAL_UCACHE_WRITE_MODE_SH( _mode_ ) cyg_hal_cache_write_mode(_mode_) | |
| 120 | 134 |
| 121 // Load the contents of the given address range into the cache | 135 // Load the contents of the given address range into the cache |
| 122 // and then lock the cache so that it stays there. | 136 // and then lock the cache so that it stays there. |
| 123 //#define HAL_UCACHE_LOCK(_base_, _size_) | 137 //#define HAL_UCACHE_LOCK(_base_, _size_) |
| 124 | 138 |
| 135 // contents from memory. | 149 // contents from memory. |
| 136 //#define HAL_UCACHE_ALLOCATE( _base_ , _size_ ) | 150 //#define HAL_UCACHE_ALLOCATE( _base_ , _size_ ) |
| 137 | 151 |
| 138 // Write dirty cache lines to memory and invalidate the cache entries | 152 // Write dirty cache lines to memory and invalidate the cache entries |
| 139 // for the given address range. | 153 // for the given address range. |
| 140 //#define HAL_UCACHE_FLUSH( _base_ , _size_ ) | 154 #define HAL_UCACHE_FLUSH( _base_ , _size_ ) \ |
| 155 cyg_hal_cache_sync_region(_base_, _size_) | |
| 141 | 156 |
| 142 // Invalidate cache lines in the given range without writing to memory. | 157 // Invalidate cache lines in the given range without writing to memory. |
| 143 //#define HAL_UCACHE_INVALIDATE( _base_ , _size_ ) | 158 //#define HAL_UCACHE_INVALIDATE( _base_ , _size_ ) |
| 144 | 159 |
| 145 // Write dirty cache lines to memory for the given address range. | 160 // Write dirty cache lines to memory for the given address range. |
| 146 //#define HAL_UCACHE_STORE( _base_ , _size_ ) | 161 //#define HAL_UCACHE_STORE( _base_ , _size_ ) |
| 162 | |
| 147 | 163 |
| 148 // Preread the given range into the cache with the intention of reading | 164 // Preread the given range into the cache with the intention of reading |
| 149 // from it later. | 165 // from it later. |
| 150 //#define HAL_UCACHE_READ_HINT( _base_ , _size_ ) | 166 //#define HAL_UCACHE_READ_HINT( _base_ , _size_ ) |
| 151 | 167 |
| 209 // contents from memory. | 225 // contents from memory. |
| 210 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) | 226 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) |
| 211 | 227 |
| 212 // Write dirty cache lines to memory and invalidate the cache entries | 228 // Write dirty cache lines to memory and invalidate the cache entries |
| 213 // for the given address range. | 229 // for the given address range. |
| 214 //#define HAL_DCACHE_FLUSH( _base_ , _size_ ) | 230 #define HAL_DCACHE_FLUSH( _base_ , _size_ ) HAL_UCACHE_FLUSH( _base_, _size_ ) |
| 215 | 231 |
| 216 // Invalidate cache lines in the given range without writing to memory. | 232 // Invalidate cache lines in the given range without writing to memory. |
| 217 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) | 233 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) |
| 218 | 234 |
| 219 // Write dirty cache lines to memory for the given address range. | 235 // Write dirty cache lines to memory for the given address range. |
