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comparison packages/hal/mips/arch/current/src/vectors.S @ 151:25e238959bae

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Merge from eCos master repository on 2001-02-12-23:44:24-GMT
author jlarmour
date Tue, 13 Feb 2001 01:23:16 +0000
parents 518f42066aba
children e2d866e32dac
comparison
equal deleted inserted replaced
150:f0e3fb000de8 151:25e238959bae
239 move s1,a1 239 move s1,a1
240 240
241 # hal_diag_init 241 # hal_diag_init
242 242
243 hal_diag_writec '$' 243 hal_diag_writec '$'
244 mfc0 a0,$30 # get ErrorEPC 244 mvafc0 a0,$30 # get ErrorEPC
245 lar k0,hal_diag_ai_write_hex8 245 lar k0,hal_diag_ai_write_hex8
246 jalr k0 246 jalr k0
247 nop 247 nop
248 hal_diag_writec '-' 248 hal_diag_writec '-'
249 move a0,s0 249 move a0,s0
278 # Clear exception state 278 # Clear exception state
279 hal_cpu_except_enable 279 hal_cpu_except_enable
280 280
281 # Move the ErrorEPC register to the EPC register so that the 281 # Move the ErrorEPC register to the EPC register so that the
282 # default exception handler saves the right PC value. 282 # default exception handler saves the right PC value.
283 mfc0 k0,$30 283 mvafc0 k0,$30
284 nop; nop; nop; 284 nop; nop; nop;
285 mtc0 k0,epc 285 mvatc0 k0,epc
286 nop; nop; nop; 286 nop; nop; nop;
287 287
288 #if (INITIAL_SR & 0x00400000) == 0 288 #if (INITIAL_SR & 0x00400000) == 0
289 # Taking this exception will have set the BEV bit to 1. 289 # Taking this exception will have set the BEV bit to 1.
290 # If we normally run with it zero, we must clear it here. 290 # If we normally run with it zero, we must clear it here.
300 jr k1 # go there 300 jr k1 # go there
301 nop # (delay slot) 301 nop # (delay slot)
302 302
303 FUNC_END(__nmi_entry) 303 FUNC_END(__nmi_entry)
304 304
305
306 ##----------------------------------------------------------------------------- 305 ##-----------------------------------------------------------------------------
307 ## Default exception VSR. 306 ## Default exception VSR.
308 ## Saves machine state and calls external handling code. 307 ## Saves machine state and calls external handling code.
309 308
310 FUNC_START(__default_exception_vsr) 309 FUNC_START(__default_exception_vsr)
372 371
373 # save remaining machine state registers 372 # save remaining machine state registers
374 mfc0 t0,cause 373 mfc0 t0,cause
375 mfc0 t1,status 374 mfc0 t1,status
376 mfc0 t2,cachectrl 375 mfc0 t2,cachectrl
377 mfc0 t3,badvr 376 mvafc0 t3,badvr
378 mfc0 t4,config 377 mfc0 t4,config
379 mfc0 t5,prid 378 mfc0 t5,prid
380 mfc0 t6,epc 379 mvafc0 t6,epc
381 380
382 sw t0,mipsreg_cause(sp) 381 sw t0,mipsreg_cause(sp)
383 sw t1,mipsreg_sr(sp) 382 sw t1,mipsreg_sr(sp)
384 sw t2,mipsreg_cachectrl(sp) 383 sw t2,mipsreg_cachectrl(sp)
385 sw t3,mipsreg_badvr(sp) 384 sva t3,mipsreg_badvr(sp)
386 sw t4,mipsreg_config(sp) 385 sw t4,mipsreg_config(sp)
387 sw t5,mipsreg_prid(sp) 386 sw t5,mipsreg_prid(sp)
388 sw t6,mipsreg_pc(sp) 387 sva t6,mipsreg_pc(sp)
389 388
390 hal_fpu_save sp 389 hal_fpu_save sp
391 390
392 # The machine state is now all saved on the stack. 391 # The machine state is now all saved on the stack.
393 392
479 # K1 contains original SP 478 # K1 contains original SP
480 ssp k1,sp # store in reg dump 479 ssp k1,sp # store in reg dump
481 480
482 mfc0 t1,status 481 mfc0 t1,status
483 mfc0 t2,cachectrl 482 mfc0 t2,cachectrl
484 mfc0 t3,epc 483 mvafc0 t3,epc
485 484
486 sw t1,mipsreg_sr(sp) 485 sw t1,mipsreg_sr(sp)
487 sw t2,mipsreg_cachectrl(sp) 486 sw t2,mipsreg_cachectrl(sp)
488 sw t3,mipsreg_pc(sp) 487 sva t3,mipsreg_pc(sp)
489 488
490 hal_fpu_save sp 489 hal_fpu_save sp
491 490
492 # The machine state is now all saved on the stack. 491 # The machine state is now all saved on the stack.
493 492
501 addi a0,a0,1 500 addi a0,a0,1
502 sw a0,0(v0) 501 sw a0,0(v0)
503 #endif 502 #endif
504 503
505 move s0,sp # save pointer to saved state 504 move s0,sp # save pointer to saved state
506 505
507 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK 506 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
508 507
509 la a0,__interrupt_stack # a0 = stack top 508 la a0,__interrupt_stack # a0 = stack top
510 la a1,__interrupt_stack_base # a1 = stack base 509 la a1,__interrupt_stack_base # a1 = stack base
511 sub a3,sp,a1 # a3 = sp - base 510 sub a3,sp,a1 # a3 = sp - base
512 bltz a3,1f # if < 0 - not on istack 511 bltz a3,1f # not on istack if < 0
513 nop # delay slot 512 nop # delay slot
514 sub t0,a0,sp # t0 = top - sp 513 sub t0,a0,sp # t0 = top - sp
515 bgtz t0,8f # if > 0 - already on istack 514 bgtz t0,8f # already on istack if > 0
516 nop # delay slot 515 nop # delay slot
517 1: 516 1:
518 move sp,a0 # switch to istack 517 move sp,a0 # switch to istack
519 8: 518 8:
520 addi sp,sp,-8 # space for old SP 519 addi sp,sp,-8 # space for old SP
682 # lgpr 29,sp # == SP 681 # lgpr 29,sp # == SP
683 lgpr 30,sp # == FP 682 lgpr 30,sp # == FP
684 lgpr 31,sp # == RA 683 lgpr 31,sp # == RA
685 .set at 684 .set at
686 685
687
688 #if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) 686 #if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
689 687
690 # If we have a Cygmon that wants to listen to network interrupts, then 688 # If we have a Cygmon that wants to listen to network interrupts, then
691 # the return code from the earlier call to hal_default_isr() will 689 # the return code from the earlier call to hal_default_isr() will
692 # have been negative to indicate this. So we jump into Cygmon here 690 # have been negative to indicate this. So we jump into Cygmon here
711 sll k0,1 # clear bit 31. 709 sll k0,1 # clear bit 31.
712 jr k1 710 jr k1
713 srl k0,1 711 srl k0,1
714 1: 712 1:
715 #endif 713 #endif
716 lw k0,mipsreg_pc(sp) # K0 = return PC 714 lva k0,mipsreg_pc(sp) # K0 = return PC
717 lw k1,mipsreg_sr(sp) # K1 = saved SR 715 lw k1,mipsreg_sr(sp) # K1 = saved SR
718 lsp sp,sp # load SP 716 lsp sp,sp # load SP
719 717
720 # Invoke CPU specific mechanism for returning from this 718 # Invoke CPU specific mechanism for returning from this
721 # exception 719 # exception
775 ## notification and GDB for program-flow breakpoints. This springboard 773 ## notification and GDB for program-flow breakpoints. This springboard
776 ## looks for the d-b-z kind and directs them to another vector so libc 774 ## looks for the d-b-z kind and directs them to another vector so libc
777 ## can handle these without affecting the debugger. 775 ## can handle these without affecting the debugger.
778 776
779 FUNC_START(__break_vsr_springboard) 777 FUNC_START(__break_vsr_springboard)
780 mfc0 k0,epc 778 mvafc0 k0,epc
781 mfc0 k1,cause 779 mfc0 k1,cause
782 bltzl k1,1f 780 bltzl k1,1f
783 addi k0,k0,4 # delay slot (only executed if BD set) 781 addi k0,k0,4 # delay slot (only executed if BD set)
784 1: lw k1,0(k0) # get break instruction 782 1: lw k1,0(k0) # get break instruction
785 la k0,0x0007000d # break 0x7 used by GCC for d-b-z 783 la k0,0x0007000d # break 0x7 used by GCC for d-b-z