comparison packages/hal/sh/arch/current/include/sh3_sci.h @ 105:5a0cc6c243a9 ecos-sw-2000-06-30

Merge from eCos master repository on 2000-06-30-08:18:49-BST
author jlarmour
date Fri, 30 Jun 2000 16:27:35 +0000
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104:ad66e26a9e7c 105:5a0cc6c243a9
1 //=============================================================================
2 //
3 // sh3_sci.h
4 //
5 // Simple driver for the SH Serial Communication Interface (SCI)
6 //
7 //=============================================================================
8 //####COPYRIGHTBEGIN####
9 //
10 // -------------------------------------------
11 // The contents of this file are subject to the Red Hat eCos Public License
12 // Version 1.1 (the "License"); you may not use this file except in
13 // compliance with the License. You may obtain a copy of the License at
14 // http://www.redhat.com/
15 //
16 // Software distributed under the License is distributed on an "AS IS"
17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
18 // License for the specific language governing rights and limitations under
19 // the License.
20 //
21 // The Original Code is eCos - Embedded Configurable Operating System,
22 // released September 30, 1998.
23 //
24 // The Initial Developer of the Original Code is Red Hat.
25 // Portions created by Red Hat are
26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
27 // All Rights Reserved.
28 // -------------------------------------------
29 //
30 //####COPYRIGHTEND####
31 //=============================================================================
32 //#####DESCRIPTIONBEGIN####
33 //
34 // Author(s): jskov
35 // Contributors:jskov
36 // Date: 1999-05-17
37 //
38 //####DESCRIPTIONEND####
39 //
40 //=============================================================================
41
42 #include <pkgconf/hal.h>
43
44 #ifdef CYGNUM_HAL_SH_SH3_SCI_PORTS
45
46 //--------------------------------------------------------------------------
47 // SCI register offsets
48 #ifdef CYGARC_SH_MOD_SCI_V2
49 # define _REG_SCSPTR -0x4 // serial port register
50 #endif
51 #define _REG_SCSMR 0x0 // serial mode register
52 #define _REG_SCBRR 0x2 // bit rate register
53 #define _REG_SCSCR 0x4 // serial control register
54 #define _REG_SCTDR 0x6 // transmit data register
55 #define _REG_SCSSR 0x8 // serial status register
56 #define _REG_SCRDR 0xa // receive data register
57
58 //--------------------------------------------------------------------------
59
60 typedef struct {
61 cyg_uint8* base;
62 cyg_int32 msec_timeout;
63 int isr_vector;
64 } channel_data_t;
65
66 //--------------------------------------------------------------------------
67
68 #if !defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG)
69 // This one should only be used by old-stub compatibility code!
70 externC void cyg_hal_plf_sci_init_channel(const channel_data_t* chan);
71 #endif
72
73 externC cyg_uint8 cyg_hal_plf_sci_getc(void* __ch_data);
74 externC void cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c);
75 externC void cyg_hal_plf_sci_init(int sci_index, int comm_index,
76 int rcv_vect, cyg_uint8* base);
77
78
79 #endif // CYGNUM_HAL_SH_SH3_SCI_PORTS
80 //-----------------------------------------------------------------------------
81 // end of sh3_sci.h