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comparison packages/hal/mips/arch/current/include/arch.inc @ 62:7a6ac9edc838 ecos-sw-2000-01-24

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Merge from eCos master repository on 2000-01-24-19:43:49-GMT
author jlarmour
date Mon, 24 Jan 2000 21:43:17 +0000
parents 1370c5e55234
children c38311975d4f
comparison
equal deleted inserted replaced
61:e44112c47676 62:7a6ac9edc838
54 ## Set up the value for the initial status register 54 ## Set up the value for the initial status register
55 55
56 #ifndef INITIAL_SR 56 #ifndef INITIAL_SR
57 57
58 #if defined(CYG_HAL_STARTUP_RAM) 58 #if defined(CYG_HAL_STARTUP_RAM)
59 # if defined(CYG_HAL_MIPS_SIM) || !defined(CYG_HAL_USE_ROM_MONITOR) 59 # if defined(CYG_HAL_MIPS_SIM) || !defined(CYGSEM_HAL_USE_ROM_MONITOR)
60 # define INITIAL_SR 0x1000ff00 /* CP0 usable, Ints enabled */ 60 # define INITIAL_SR 0x1000ff00 /* CP0 usable, Ints enabled */
61 # else 61 # else
62 # define INITIAL_SR 0x1040ff00 /* as above + ROM vectors used */ 62 # define INITIAL_SR 0x1040ff00 /* as above + ROM vectors used */
63 # endif 63 # endif
64 #elif defined(CYG_HAL_STARTUP_ROM) 64 #elif defined(CYG_HAL_STARTUP_ROM)
84 #ifdef CYGHWR_HAL_MIPS_64BIT 84 #ifdef CYGHWR_HAL_MIPS_64BIT
85 # define mips_regsize 8 85 # define mips_regsize 8
86 #else 86 #else
87 # define mips_regsize 4 87 # define mips_regsize 4
88 #endif 88 #endif
89
90 # define mips_regsize32 4
89 91
90 #if defined(CYGHWR_HAL_MIPS_FPU) 92 #if defined(CYGHWR_HAL_MIPS_FPU)
91 # if defined(CYGHWR_HAL_MIPS_FPU_64BIT) 93 # if defined(CYGHWR_HAL_MIPS_FPU_64BIT)
92 # define mips_fpuregsize 8 94 # define mips_fpuregsize 8
93 # elif defined(CYGHWR_HAL_MIPS_FPU_32BIT) 95 # elif defined(CYGHWR_HAL_MIPS_FPU_32BIT)
102 #define mipsreg_hi (mips_regsize*32) 104 #define mipsreg_hi (mips_regsize*32)
103 #define mipsreg_lo (mipsreg_hi+mips_regsize) 105 #define mipsreg_lo (mipsreg_hi+mips_regsize)
104 #ifdef CYGHWR_HAL_MIPS_FPU 106 #ifdef CYGHWR_HAL_MIPS_FPU
105 # define mipsreg_fpureg (mipsreg_lo+mips_regsize) 107 # define mipsreg_fpureg (mipsreg_lo+mips_regsize)
106 # define mipsreg_fcr31 (mipsreg_fpureg+(mips_fpuregsize*32)) 108 # define mipsreg_fcr31 (mipsreg_fpureg+(mips_fpuregsize*32))
107 # define mipsreg_fppad (mipsreg_fcr31+mips_regsize) 109 # define mipsreg_fppad (mipsreg_fcr31+mips_regsize32)
108 # define mipsreg_vector (mipsreg_fppad+mips_regsize) 110 # define mipsreg_vector (mipsreg_fppad+mips_regsize32)
109 #else 111 #else
110 # define mipsreg_vector (mipsreg_lo+mips_regsize) 112 # define mipsreg_vector (mipsreg_lo+mips_regsize32)
111 #endif 113 #endif
112 #define mipsreg_pc (mipsreg_vector+mips_regsize) 114 #define mipsreg_pc (mipsreg_vector+mips_regsize32)
113 #define mipsreg_sr (mipsreg_pc+mips_regsize) 115 #define mipsreg_sr (mipsreg_pc+mips_regsize32)
114 #define mipsreg_cachectrl (mipsreg_sr+mips_regsize) 116 #define mipsreg_cachectrl (mipsreg_sr+mips_regsize32)
115 #define mipsreg_cause (mipsreg_cachectrl+mips_regsize) 117 #define mipsreg_cause (mipsreg_cachectrl+mips_regsize32)
116 #define mipsreg_badvr (mipsreg_cause+mips_regsize) 118 #define mipsreg_badvr (mipsreg_cause+mips_regsize32)
117 #define mipsreg_prid (mipsreg_badvr+mips_regsize) 119 #define mipsreg_prid (mipsreg_badvr+mips_regsize32)
118 #define mipsreg_config (mipsreg_prid+mips_regsize) 120 #define mipsreg_config (mipsreg_prid+mips_regsize32)
119 #define mipsreg_size (mipsreg_config+mips_regsize) 121 #define mipsreg_size (mipsreg_config+mips_regsize32)
120 122
121 #define mips_exception_decrement (mipsreg_size*2) 123 #define mips_exception_decrement (mipsreg_size*2)
122 124
123 ##----------------------------------------------------------------------------- 125 ##-----------------------------------------------------------------------------
124 ## Minimal stack frame size uses to call functions from asm. 126 ## Minimal stack frame size uses to call functions from asm.
324 .byte 4, 0, 1, 0 326 .byte 4, 0, 1, 0
325 .byte 2, 0, 1, 0 327 .byte 2, 0, 1, 0
326 .byte 3, 0, 1, 0 328 .byte 3, 0, 1, 0
327 .byte 2, 0, 1, 0 329 .byte 2, 0, 1, 0
328 .endm 330 .endm
331 #endif
332
333 #------------------------------------------------------------------------------
334 # Register save and restore macros. These expect a pointer to a CPU save state
335 # area in the register \ptr. The GPR indicated by \reg will be saved into its
336 # slot in that structure.
337
338 #ifdef CYGHWR_HAL_MIPS_64BIT
339
340 .macro sgpr reg,ptr
341 sd $\reg,(mipsreg_regs+\reg*mips_regsize)(\ptr)
342 .endm
343
344 .macro lgpr reg,ptr
345 ld $\reg,(mipsreg_regs+\reg*mips_regsize)(\ptr)
346 .endm
347
348 .macro slo reg,ptr
349 sd \reg,(mipsreg_lo)(\ptr)
350 .endm
351
352 .macro shi reg,ptr
353 sd \reg,(mipsreg_hi)(\ptr)
354 .endm
355
356 .macro llo reg,ptr
357 ld \reg,(mipsreg_lo)(\ptr)
358 .endm
359
360 .macro lhi reg,ptr
361 ld \reg,(mipsreg_hi)(\ptr)
362 .endm
363
364 .macro ssp reg,ptr
365 sd \reg,(mipsreg_regs+29*mips_regsize)(\ptr)
366 .endm
367
368 .macro lsp reg,ptr
369 ld \reg,(mipsreg_regs+29*mips_regsize)(\ptr)
370 .endm
371
372 #else
373
374 .macro sgpr reg,ptr
375 sw $\reg,(mipsreg_regs+\reg*mips_regsize)(\ptr)
376 .endm
377
378 .macro lgpr reg,ptr
379 lw $\reg,(mipsreg_regs+\reg*mips_regsize)(\ptr)
380 .endm
381
382 .macro slo reg,ptr
383 sw \reg,(mipsreg_lo)(\ptr)
384 .endm
385
386 .macro shi reg,ptr
387 sw \reg,(mipsreg_hi)(\ptr)
388 .endm
389
390 .macro llo reg,ptr
391 lw \reg,(mipsreg_lo)(\ptr)
392 .endm
393
394 .macro lhi reg,ptr
395 lw \reg,(mipsreg_hi)(\ptr)
396 .endm
397
398 .macro ssp reg,ptr
399 sw \reg,(mipsreg_regs+29*mips_regsize)(\ptr)
400 .endm
401
402 .macro lsp reg,ptr
403 lw \reg,(mipsreg_regs+29*mips_regsize)(\ptr)
404 .endm
405
329 #endif 406 #endif
330 407
331 #------------------------------------------------------------------------------ 408 #------------------------------------------------------------------------------
332 # FPU macros. 409 # FPU macros.
333 # The MIPS floating point unit essentially operates in two modes. In the first 410 # The MIPS floating point unit essentially operates in two modes. In the first