comparison packages/hal/powerpc/ppc60x/current/include/var_intr.h @ 70:c5536bad4c24 ecos-sw-2000-02-11

Merge from eCos master repository on 2000-02-11-15:46:40-GMT
author jlarmour
date Fri, 11 Feb 2000 16:47:32 +0000
parents
children e0c0827131d1
comparison
equal deleted inserted replaced
69:9a9babddf7e7 70:c5536bad4c24
1 #ifndef CYGONCE_VAR_INTR_H
2 #define CYGONCE_VAR_INTR_H
3 //=============================================================================
4 //
5 // var_intr.h
6 //
7 // Variant HAL interrupt and clock support
8 //
9 //=============================================================================
10 //####COPYRIGHTBEGIN####
11 //
12 // -------------------------------------------
13 // The contents of this file are subject to the Red Hat eCos Public License
14 // Version 1.1 (the "License"); you may not use this file except in
15 // compliance with the License. You may obtain a copy of the License at
16 // http://www.redhat.com/
17 //
18 // Software distributed under the License is distributed on an "AS IS"
19 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
20 // License for the specific language governing rights and limitations under
21 // the License.
22 //
23 // The Original Code is eCos - Embedded Configurable Operating System,
24 // released September 30, 1998.
25 //
26 // The Initial Developer of the Original Code is Red Hat.
27 // Portions created by Red Hat are
28 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
29 // All Rights Reserved.
30 // -------------------------------------------
31 //
32 //####COPYRIGHTEND####
33 //=============================================================================
34 //#####DESCRIPTIONBEGIN####
35 //
36 // Author(s): nickg
37 // Contributors:nickg, jskov, jlarmour, hmt
38 // Date: 2000-04-02
39 // Purpose: Variant interrupt support
40 // Description: The macros defined here provide the HAL APIs for handling
41 // interrupts and the clock on the PPC60x variant CPUs.
42 // Usage: Is included via the architecture interrupt header:
43 // #include <cyg/hal/hal_intr.h>
44 // ...
45 //
46 //####DESCRIPTIONEND####
47 //
48 //=============================================================================
49
50 // No builtin interrupt controller in the PPC60x CPUs.
51
52 //-----------------------------------------------------------------------------
53 #endif // ifndef CYGONCE_VAR_INTR_H
54 // End of var_intr.h