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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
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children d2c90368aeef
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207:74c807ddde34 208:e0c0827131d1
1 #ifndef CYGONCE_HAL_HAL_IO_H
2 #define CYGONCE_HAL_HAL_IO_H
3
4 //=============================================================================
5 //
6 // hal_io.h
7 //
8 // HAL device IO register support.
9 //
10 //=============================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
13 // This file is part of eCos, the Embedded Configurable Operating System.
14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 //
16 // eCos is free software; you can redistribute it and/or modify it under
17 // the terms of the GNU General Public License as published by the Free
18 // Software Foundation; either version 2 or (at your option) any later version.
19 //
20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 // for more details.
24 //
25 // You should have received a copy of the GNU General Public License along
26 // with eCos; if not, write to the Free Software Foundation, Inc.,
27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 //
29 // As a special exception, if other files instantiate templates or use macros
30 // or inline functions from this file, or you compile this file and link it
31 // with other works to produce a work based on this file, this file does not
32 // by itself cause the resulting work to be covered by the GNU General Public
33 // License. However the source code for this file must still be made available
34 // in accordance with section (3) of the GNU General Public License.
35 //
36 // This exception does not invalidate any other reasons why a work based on
37 // this file might be covered by the GNU General Public License.
38 //
39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
40 // at http://sources.redhat.com/ecos/ecos-license
41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //=============================================================================
44 //#####DESCRIPTIONBEGIN####
45 //
46 // Author(s): yoshinori sato
47 // Contributors: yoshinori sato
48 // Date: 2002-02-13
49 // Purpose: Define IO register support
50 // Description: The macros defined here provide the HAL APIs for handling
51 // device IO control registers.
52 //
53 // Usage:
54 // #include <cyg/hal/hal_io.h>
55 // ...
56 //
57 //
58 //####DESCRIPTIONEND####
59 //
60 //=============================================================================
61
62 #include <cyg/infra/cyg_type.h>
63
64 //-----------------------------------------------------------------------------
65 // IO Register address.
66 // This type is for recording the address of an IO register.
67
68 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
69
70 //-----------------------------------------------------------------------------
71 // BYTE Register access.
72 // Individual and vectorized access to 8 bit registers.
73
74 #define HAL_READ_UINT8( _register_, _value_ ) \
75 ((_value_) = *((volatile CYG_BYTE *)(_register_)))
76
77 #define HAL_WRITE_UINT8( _register_, _value_ ) \
78 (*((volatile CYG_BYTE *)(_register_)) = (_value_))
79
80 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
81 { \
82 cyg_count32 _i_,_j_; \
83 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
84 (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
85 }
86
87 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
88 { \
89 cyg_count32 _i_,_j_; \
90 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
91 ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
92 }
93
94
95 //-----------------------------------------------------------------------------
96 // 16 bit access.
97 // Individual and vectorized access to 16 bit registers.
98
99 #define HAL_READ_UINT16( _register_, _value_ ) \
100 ((_value_) = *((volatile CYG_WORD16 *)(_register_)))
101
102 #define HAL_WRITE_UINT16( _register_, _value_ ) \
103 (*((volatile CYG_WORD16 *)(_register_)) = (_value_))
104
105 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
106 { \
107 cyg_count32 _i_,_j_; \
108 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
109 (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
110 }
111
112 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
113 { \
114 cyg_count32 _i_,_j_; \
115 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
116 ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
117 }
118
119 //-----------------------------------------------------------------------------
120 // 32 bit access.
121 // Individual and vectorized access to 32 bit registers.
122
123 #define HAL_READ_UINT32( _register_, _value_ ) \
124 ((_value_) = *((volatile CYG_WORD32 *)(_register_)))
125
126 #define HAL_WRITE_UINT32( _register_, _value_ ) \
127 (*((volatile CYG_WORD32 *)(_register_)) = (_value_))
128
129 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
130 { \
131 cyg_count32 _i_,_j_; \
132 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
133 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
134 }
135
136 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
137 { \
138 cyg_count32 _i_,_j_; \
139 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
140 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
141 }
142
143 //-----------------------------------------------------------------------------
144 #endif // ifndef CYGONCE_HAL_HAL_IO_H
145 // End of hal_io.h