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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
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children d2c90368aeef
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207:74c807ddde34 208:e0c0827131d1
1 # ====================================================================
2 #
3 # hal_h8300_h8300h.cdl
4 #
5 # H8/300H variant architectural HAL package configuration data
6 #
7 # ====================================================================
8 #####ECOSGPLCOPYRIGHTBEGIN####
9 # -------------------------------------------
10 # This file is part of eCos, the Embedded Configurable Operating System.
11 # Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 #
13 # eCos is free software; you can redistribute it and/or modify it under
14 # the terms of the GNU General Public License as published by the Free
15 # Software Foundation; either version 2 or (at your option) any later version.
16 #
17 # eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 # WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 # for more details.
21 #
22 # You should have received a copy of the GNU General Public License along
23 # with eCos; if not, write to the Free Software Foundation, Inc.,
24 # 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 #
26 # As a special exception, if other files instantiate templates or use macros
27 # or inline functions from this file, or you compile this file and link it
28 # with other works to produce a work based on this file, this file does not
29 # by itself cause the resulting work to be covered by the GNU General Public
30 # License. However the source code for this file must still be made available
31 # in accordance with section (3) of the GNU General Public License.
32 #
33 # This exception does not invalidate any other reasons why a work based on
34 # this file might be covered by the GNU General Public License.
35 #
36 # Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 # at http://sources.redhat.com/ecos/ecos-license
38 # -------------------------------------------
39 #####ECOSGPLCOPYRIGHTEND####
40 # ====================================================================
41 ######DESCRIPTIONBEGIN####
42 #
43 # Author(s): jskov
44 # Original data: nickg
45 # Contributors: dmoseley
46 # Date: 1999-11-02
47 #
48 #####DESCRIPTIONEND####
49 #
50 # ====================================================================
51
52 cdl_package CYGPKG_HAL_H8300_H8300H {
53 display "H8/300H variant"
54 parent CYGPKG_HAL_H8300
55 implements CYGINT_HAL_H8300_VARIANT
56 hardware
57 include_dir cyg/hal
58 define_header hal_h8300_h8300h.h
59 description "
60 The H8/300H variant HAL package provides generic
61 support for this processor architecture. It is also
62 necessary to select a specific target platform HAL
63 package."
64
65 define_proc {
66 puts $::cdl_header "#include <pkgconf/hal_h8300.h>"
67 }
68
69 compile var_misc.c h8_sci.c
70
71 make {
72 <PREFIX>/lib/target.ld: <PACKAGE>/src/h8300_h8300h.ld
73 $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $<
74 @echo $@ ": \\" > $(notdir $@).deps
75 @tail +2 target.tmp >> $(notdir $@).deps
76 @echo >> $(notdir $@).deps
77 @rm target.tmp
78 }
79
80 cdl_option CYGBLD_LINKER_SCRIPT {
81 display "Linker script"
82 flavor data
83 no_define
84 calculated { "src/h8300_h8300h.ld" }
85 }
86
87 cdl_component CYGHWR_HAL_H8300H_CLOCK_SETTINGS {
88 display "H8/300H on-chip generic clock controls"
89 description "
90 The various clocks used by the system are controlled by
91 these options, some of which are derived from platform
92 settings."
93 flavor none
94 no_define
95
96 cdl_option CYGHWR_HAL_H8300_DIVIDER_RATE {
97 display "Divider Rate (1/n)"
98 flavor data
99 legal_values { 1 2 4 8 }
100 default_value 1
101 description "
102 The system clock divide rate setting"
103 }
104 cdl_option CYGHWR_HAL_H8300_PROCESSOR_SPEED {
105 display "Processor clock speed (MHz)"
106 flavor data
107 calculated { CYGHWR_HAL_H8300_CPG_INPUT / CYGHWR_HAL_H8300_DIVIDER_RATE }
108 description "
109 The core (CPU) speed is computed from
110 the input clock speed and the divider setting."
111 }
112 }
113 cdl_option CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE {
114 display "SCI serial port default baud rate"
115 flavor data
116 legal_values { 4800 9600 14400 19200 38400 57600 115200 }
117 default_value { 38400 }
118 }
119 }