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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
parents 67850532eebb
children d2c90368aeef
comparison
equal deleted inserted replaced
207:74c807ddde34 208:e0c0827131d1
3 // pcmb_misc.c 3 // pcmb_misc.c
4 // 4 //
5 // HAL implementation miscellaneous functions 5 // HAL implementation miscellaneous functions
6 // 6 //
7 //========================================================================== 7 //==========================================================================
8 //####COPYRIGHTBEGIN#### 8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // 9 // -------------------------------------------
10 // ------------------------------------------- 10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // The contents of this file are subject to the Red Hat eCos Public License 11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 // Version 1.1 (the "License"); you may not use this file except in 12 //
13 // compliance with the License. You may obtain a copy of the License at 13 // eCos is free software; you can redistribute it and/or modify it under
14 // http://www.redhat.com/ 14 // the terms of the GNU General Public License as published by the Free
15 // 15 // Software Foundation; either version 2 or (at your option) any later version.
16 // Software distributed under the License is distributed on an "AS IS" 16 //
17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the 17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 // License for the specific language governing rights and limitations under 18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // the License. 19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 // 20 // for more details.
21 // The Original Code is eCos - Embedded Configurable Operating System, 21 //
22 // released September 30, 1998. 22 // You should have received a copy of the GNU General Public License along
23 // 23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // The Initial Developer of the Original Code is Red Hat. 24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 // Portions created by Red Hat are 25 //
26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. 26 // As a special exception, if other files instantiate templates or use macros
27 // All Rights Reserved. 27 // or inline functions from this file, or you compile this file and link it
28 // ------------------------------------------- 28 // with other works to produce a work based on this file, this file does not
29 // 29 // by itself cause the resulting work to be covered by the GNU General Public
30 //####COPYRIGHTEND#### 30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
32 //
33 // This exception does not invalidate any other reasons why a work based on
34 // this file might be covered by the GNU General Public License.
35 //
36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 // at http://sources.redhat.com/ecos/ecos-license
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
31 //========================================================================== 40 //==========================================================================
32 //#####DESCRIPTIONBEGIN#### 41 //#####DESCRIPTIONBEGIN####
33 // 42 //
34 // Author(s): nickg 43 // Author(s): nickg
35 // Contributors: nickg, jlarmour, pjo 44 // Contributors: nickg, jlarmour, pjo
50 #include <cyg/infra/cyg_trac.h> // tracing macros 59 #include <cyg/infra/cyg_trac.h> // tracing macros
51 #include <cyg/infra/cyg_ass.h> // assertion macros 60 #include <cyg/infra/cyg_ass.h> // assertion macros
52 61
53 #include <cyg/hal/hal_intr.h> 62 #include <cyg/hal/hal_intr.h>
54 #include <cyg/hal/hal_io.h> 63 #include <cyg/hal/hal_io.h>
64 #include <cyg/hal/hal_smp.h>
55 65
56 /*------------------------------------------------------------------------*/ 66 /*------------------------------------------------------------------------*/
57 // Array which stores the configured priority levels for the configured 67 // Array which stores the configured priority levels for the configured
58 // interrupts. 68 // interrupts.
59 69
94 HAL_READ_CMOS( 0x18, hi ); 104 HAL_READ_CMOS( 0x18, hi );
95 #endif 105 #endif
96 106
97 cyg_hal_pcmb_memsize_extended = ((hi<<8)+lo)*1024; 107 cyg_hal_pcmb_memsize_extended = ((hi<<8)+lo)*1024;
98 #endif 108 #endif
109
110 // Disable NMI - this can be reenabled later, once a proper handler
111 // is registered and ready to handle events
112 HAL_WRITE_UINT8(0x70, 0x80);
99 } 113 }
100 114
101 /*------------------------------------------------------------------------*/ 115 /*------------------------------------------------------------------------*/
102 116
103 cyg_uint8 *hal_i386_mem_real_region_top( cyg_uint8 *regionend ) 117 cyg_uint8 *hal_i386_mem_real_region_top( cyg_uint8 *regionend )
114 } 128 }
115 129
116 /*------------------------------------------------------------------------*/ 130 /*------------------------------------------------------------------------*/
117 // Clock initialization and access 131 // Clock initialization and access
118 132
133 #ifdef CYGPKG_HAL_SMP_SUPPORT
134 static HAL_SPINLOCK_TYPE pc_clock_lock;
135 #else
119 #define HAL_SPINLOCK_SPIN( lock ) 136 #define HAL_SPINLOCK_SPIN( lock )
120 #define HAL_SPINLOCK_CLEAR( lock ) 137 #define HAL_SPINLOCK_CLEAR( lock )
138 #endif
121 139
122 void hal_pc_clock_initialize(cyg_uint32 period) 140 void hal_pc_clock_initialize(cyg_uint32 period)
123 { 141 {
124 /* Select mode 2: rate generator. Then we'll load LSB, and finally MSB. */ 142 /* Select mode 2: rate generator. Then we'll load LSB, and finally MSB. */
125 HAL_WRITE_UINT8( PC_PIT_CONTROL, 0x34 ); 143 HAL_WRITE_UINT8( PC_PIT_CONTROL, 0x34 );
160 178
161 /*------------------------------------------------------------------------*/ 179 /*------------------------------------------------------------------------*/
162 180
163 void hal_idle_thread_action(cyg_uint32 loop_count) 181 void hal_idle_thread_action(cyg_uint32 loop_count)
164 { 182 {
183 #if 1 //ndef CYGPKG_HAL_SMP_SUPPORT
165 asm("hlt") ; 184 asm("hlt") ;
166 185
186 #else
187
188 CYG_WORD32 val;
189 CYG_WORD32 cpu = 0;
190 #ifdef CYGPKG_HAL_SMP_SUPPORT
191 cpu = HAL_SMP_CPU_THIS();
192
193 {
194 __externC HAL_SPINLOCK_TYPE cyg_hal_ioapic_lock;
195
196 HAL_SPINLOCK_SPIN( cyg_hal_ioapic_lock );
197 HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDTBL+4, val );
198 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(15)+10, val );
199
200 HAL_IOAPIC_READ( HAL_IOAPIC_REG_REDTBL+5, val );
201 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(15), val );
202
203 HAL_SPINLOCK_CLEAR( cyg_hal_ioapic_lock );
204
205 }
206 #endif
207
208 hal_pc_clock_read( &val);
209 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(15)+20, val );
210
211
212 #ifdef CYGPKG_HAL_SMP_SUPPORT
213
214 PC_WRITE_SCREEN_8( PC_SCREEN_LINE(16+cpu), cpu);
215
216 HAL_APIC_READ( HAL_APIC_IRR, val );
217 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(16+cpu)+10, val );
218 HAL_APIC_READ( HAL_APIC_IRR+1, val );
219 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(16+cpu)+20, val );
220 HAL_APIC_READ( HAL_APIC_IRR+2, val );
221 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(16+cpu)+30, val );
222 #endif
223
224 HAL_QUERY_INTERRUPTS( val );
225 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(16+cpu)+50, val );
226 PC_WRITE_SCREEN_32( PC_SCREEN_LINE(16+cpu)+60, loop_count );
227
228 #endif
167 } 229 }
168 230
169 /*------------------------------------------------------------------------*/ 231 /*------------------------------------------------------------------------*/
170 /* End of pcmb_misc.c */ 232 /* End of pcmb_misc.c */