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comparison packages/hal/sh/se7751/current/include/plf_intr.h @ 208:e0c0827131d1 ecos

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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
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children d2c90368aeef
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207:74c807ddde34 208:e0c0827131d1
1 #ifndef CYGONCE_HAL_PLF_INTR_H
2 #define CYGONCE_HAL_PLF_INTR_H
3
4 //==========================================================================
5 //
6 // plf_intr.h
7 //
8 // Platform specific Interrupt and clock support
9 //
10 //==========================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
13 // This file is part of eCos, the Embedded Configurable Operating System.
14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 //
16 // eCos is free software; you can redistribute it and/or modify it under
17 // the terms of the GNU General Public License as published by the Free
18 // Software Foundation; either version 2 or (at your option) any later version.
19 //
20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 // for more details.
24 //
25 // You should have received a copy of the GNU General Public License along
26 // with eCos; if not, write to the Free Software Foundation, Inc.,
27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 //
29 // As a special exception, if other files instantiate templates or use macros
30 // or inline functions from this file, or you compile this file and link it
31 // with other works to produce a work based on this file, this file does not
32 // by itself cause the resulting work to be covered by the GNU General Public
33 // License. However the source code for this file must still be made available
34 // in accordance with section (3) of the GNU General Public License.
35 //
36 // This exception does not invalidate any other reasons why a work based on
37 // this file might be covered by the GNU General Public License.
38 //
39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
40 // at http://sources.redhat.com/ecos/ecos-license
41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //==========================================================================
44 //#####DESCRIPTIONBEGIN####
45 //
46 // Author(s): jskov
47 // Contributors: jskov
48 // Date: 2001-06-12
49 // Purpose: Define Interrupt support
50 // Description: The macros defined here provide the HAL APIs for handling
51 // interrupts and the clock for the SE77x9 board.
52 // Usage:
53 // #include <cyg/hal/plf_intr.h>
54 // ...
55 //
56 //
57 //####DESCRIPTIONEND####
58 //
59 //==========================================================================
60
61 #include <pkgconf/hal.h>
62
63 //----------------------------------------------------------------------------
64 // External interrupts.
65 #define CYGNUM_HAL_INTERRUPT_EXTERNALS_BASE CYGNUM_HAL_INTERRUPT_LVL0
66 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ8 CYGNUM_HAL_INTERRUPT_LVL0
67 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ7 CYGNUM_HAL_INTERRUPT_LVL1
68 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ6 CYGNUM_HAL_INTERRUPT_LVL2
69 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ5 CYGNUM_HAL_INTERRUPT_LVL3
70 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ4 CYGNUM_HAL_INTERRUPT_LVL4
71 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ3 CYGNUM_HAL_INTERRUPT_LVL5
72 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ2 CYGNUM_HAL_INTERRUPT_LVL6
73 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ1 CYGNUM_HAL_INTERRUPT_LVL7
74 #define CYGNUM_HAL_INTERRUPT_PC_SIRQ4 CYGNUM_HAL_INTERRUPT_LVL8
75 #define CYGNUM_HAL_INTERRUPT_PC_SIRQ3 CYGNUM_HAL_INTERRUPT_LVL9
76 #define CYGNUM_HAL_INTERRUPT_PC_SIRQ2 CYGNUM_HAL_INTERRUPT_LVL10
77 #define CYGNUM_HAL_INTERRUPT_PC_SIRQ1 CYGNUM_HAL_INTERRUPT_LVL11
78 #define CYGNUM_HAL_INTERRUPT_PCIA CYGNUM_HAL_INTERRUPT_LVL12
79 #define CYGNUM_HAL_INTERRUPT_PCIB CYGNUM_HAL_INTERRUPT_LVL13
80 #define CYGNUM_HAL_INTERRUPT_PCIC CYGNUM_HAL_INTERRUPT_LVL14
81 #define CYGNUM_HAL_INTERRUPT_PCID CYGNUM_HAL_INTERRUPT_LVL14 // !?!
82
83
84 //----------------------------------------------------------------------------
85 // Interrupt controller
86 #define CYGARC_REG_INTC_A 0xbb000000
87 #define CYGARC_REG_INTC_B 0xbb000002
88 #define CYGARC_REG_INTC_C 0xbb000004
89 #define CYGARC_REG_INTC_D 0xbb000006
90 #define CYGARC_REG_INTC_E 0xbb000008
91
92
93 //----------------------------------------------------------------------------
94 // Interrupt configuration extention macros
95 #define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level) \
96 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ8 ... CYGNUM_HAL_INTERRUPT_SLOT_IRQ5: \
97 { \
98 cyg_uint16 msk; \
99 int shift = 4*(3 - (vec - CYGNUM_HAL_INTERRUPT_SLOT_IRQ8)); \
100 HAL_READ_UINT16(CYGARC_REG_INTC_A, msk); \
101 msk &= ~(0x000f << shift); \
102 if (level) msk |= (CYGNUM_HAL_INTERRUPT_LVL14 - vec + 1) << shift; \
103 HAL_WRITE_UINT16(CYGARC_REG_INTC_A, msk); \
104 break; \
105 } \
106 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ4 ... CYGNUM_HAL_INTERRUPT_SLOT_IRQ1: \
107 { \
108 cyg_uint16 msk; \
109 int shift = 4*(3 - (vec - CYGNUM_HAL_INTERRUPT_SLOT_IRQ4)); \
110 HAL_READ_UINT16(CYGARC_REG_INTC_B, msk); \
111 msk &= ~(0x000f << shift); \
112 if (level) msk |= (CYGNUM_HAL_INTERRUPT_LVL14 - vec + 1) << shift; \
113 HAL_WRITE_UINT16(CYGARC_REG_INTC_B, msk); \
114 break; \
115 } \
116 case CYGNUM_HAL_INTERRUPT_PC_SIRQ4 ... CYGNUM_HAL_INTERRUPT_PC_SIRQ1: \
117 { \
118 cyg_uint16 msk; \
119 int shift = 4*(3 - (vec - CYGNUM_HAL_INTERRUPT_PC_SIRQ4)); \
120 HAL_READ_UINT16(CYGARC_REG_INTC_C, msk); \
121 msk &= ~(0x000f << shift); \
122 if (level) msk |= (CYGNUM_HAL_INTERRUPT_LVL14 - vec + 1) << shift; \
123 HAL_WRITE_UINT16(CYGARC_REG_INTC_C, msk); \
124 break; \
125 } \
126 case CYGNUM_HAL_INTERRUPT_PCIA ... CYGNUM_HAL_INTERRUPT_PCIC: \
127 { \
128 cyg_uint16 msk; \
129 int shift = 4*(3 - (vec - CYGNUM_HAL_INTERRUPT_PCIA)); \
130 HAL_READ_UINT16(CYGARC_REG_INTC_D, msk); \
131 msk &= ~(0x000f << shift); \
132 if (level) msk |= (CYGNUM_HAL_INTERRUPT_LVL14 - vec + 1) << shift; \
133 HAL_WRITE_UINT16(CYGARC_REG_INTC_D, msk); \
134 break; \
135 }
136
137 //----------------------------------------------------------------------------
138 // Reset.
139 // Block interrupts and cause an exception. This forces a reset.
140 #define HAL_PLATFORM_RESET() \
141 asm volatile ("ldc %0,sr;trapa #0x00;" : : "r" (CYGARC_REG_SR_BL))
142
143 #define HAL_PLATFORM_RESET_ENTRY 0x80000000
144
145 //--------------------------------------------------------------------------
146 #endif // ifndef CYGONCE_HAL_PLF_INTR_H
147 // End of plf_intr.h