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comparison packages/hal/arm/sa11x0/assabet/current/include/hal_platform_setup.h @ 108:ff3f181b64bd ecos-sw-2000-07-04

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Merge from eCos master repository on 2000-07-04-20:42:44-BST
author jlarmour
date Tue, 04 Jul 2000 20:17:21 +0000
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children eb9fd8c04db3
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107:7f461c3a372c 108:ff3f181b64bd
1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2 #define CYGONCE_HAL_PLATFORM_SETUP_H
3
4 /*=============================================================================
5 //
6 // hal_platform_setup.h
7 //
8 // Platform specific support for HAL (assembly code)
9 //
10 //=============================================================================
11 //####COPYRIGHTBEGIN####
12 //
13 // -------------------------------------------
14 // The contents of this file are subject to the Red Hat eCos Public License
15 // Version 1.1 (the "License"); you may not use this file except in
16 // compliance with the License. You may obtain a copy of the License at
17 // http://www.redhat.com/
18 //
19 // Software distributed under the License is distributed on an "AS IS"
20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
21 // License for the specific language governing rights and limitations under
22 // the License.
23 //
24 // The Original Code is eCos - Embedded Configurable Operating System,
25 // released September 30, 1998.
26 //
27 // The Initial Developer of the Original Code is Red Hat.
28 // Portions created by Red Hat are
29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
30 // All Rights Reserved.
31 // -------------------------------------------
32 //
33 //####COPYRIGHTEND####
34 //=============================================================================
35 //#####DESCRIPTIONBEGIN####
36 //
37 // Author(s): gthomas
38 // Contributors: gthomas
39 // Date: 2000-05-08
40 // Purpose: Intel SA1110/Assabet platform specific support routines
41 // Description:
42 // Usage: #include <cyg/hal/hal_platform_setup.h>
43 // Only used by "vectors.S"
44 //
45 //####DESCRIPTIONEND####
46 //
47 //===========================================================================*/
48
49 #include <pkgconf/system.h> // System-wide configuration info
50 #include CYGBLD_HAL_VARIANT_H // Variant (SA11x0) specific configuration
51 #include CYGBLD_HAL_PLATFORM_H // Platform specific configuration
52 #include <cyg/hal/hal_sa11x0.h> // Variant specific hardware definitions
53 #include <cyg/hal/hal_mmu.h> // MMU definitions
54 #include <cyg/hal/assabet.h> // Platform specific hardware definitions
55
56 #if defined(CYG_HAL_STARTUP_ROM)
57 #define PLATFORM_SETUP1 _platform_setup1
58 #define CYGHWR_HAL_ARM_HAS_MMU
59
60 #if (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 59000)
61 #define SA11X0_PLL_CLOCK 0x0
62 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 73700)
63 #define SA11X0_PLL_CLOCK 0x1
64 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 88500)
65 #define SA11X0_PLL_CLOCK 0x2
66 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 103200)
67 #define SA11X0_PLL_CLOCK 0x3
68 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 118000)
69 #define SA11X0_PLL_CLOCK 0x4
70 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 132700)
71 #define SA11X0_PLL_CLOCK 0x5
72 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 147500)
73 #define SA11X0_PLL_CLOCK 0x6
74 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 162200)
75 #define SA11X0_PLL_CLOCK 0x7
76 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 176900)
77 #define SA11X0_PLL_CLOCK 0x8
78 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 191700)
79 #define SA11X0_PLL_CLOCK 0x9
80 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 206400)
81 #define SA11X0_PLL_CLOCK 0xA
82 #elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 221200)
83 #define SA11X0_PLL_CLOCK 0xB
84 #else
85 #error Invalid processor clock speed
86 #endif
87
88
89 // This macro represents the initial startup code for the platform
90 .macro _platform_setup1
91
92 // Turn off LEDs
93 ldr r1,=SA1110_BOARD_CONTROL
94 ldr r2,=SA1110_BCR_MIN
95 orr r2,r2,#SA1110_BCR_RED_LED
96 orr r2,r2,#SA1110_BCR_GREEN_LED
97 str r2,[r1]
98
99 // Set up GPIO to read hardware configuration
100 ldr r1,=SA11X0_GPIO_PIN_DIRECTION
101 ldr r2,=0x0807A7FC
102 str r2,[r1]
103 ldr r3,=SA11X0_GPIO_PIN_OUTPUT_SET
104 ldr r2,=0x2FC // Bits 2..9
105 str r2,[r3] // Requests hardware configuration
106 ldr r2,=0x0807A400 // Reconfigure 2..9 as inputs
107 str r2,[r1]
108 ldr r3,=SA11X0_GPIO_PIN_LEVEL
109 mov r2,#100
110 10: ldr r9,[r3] // Read multiple times to settle
111 subs r2,r2,#1
112 bne 10b
113 ldr r2,=0x0807A7FC // Restore proper pin configuration
114 str r2,[r1]
115 ldr r3,=SA11X0_GPIO_PIN_OUTPUT_SET
116 ldr r2,=0x10000 // Enable high power mode
117 str r2,[r3]
118
119 // Disable clock switching
120 mcr p15,0,r0,\
121 SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\
122 SA11X0_DISABLE_CLOCK_SWITCHING_RM,\
123 SA11X0_DISABLE_CLOCK_SWITCHING_OPCODE
124
125 // Set up processor clock
126 ldr r1,=SA11X0_PWR_MGR_PLL_CONFIG
127 ldr r2,=SA11X0_PLL_CLOCK
128 str r2,[r1]
129
130 // Turn clock switching back on
131 mcr p15,0,r0,\
132 SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\
133 SA11X0_ENABLE_CLOCK_SWITCHING_RM,\
134 SA11X0_ENABLE_CLOCK_SWITCHING_OPCODE
135 nop
136 nop
137
138 // Turn on Red LED
139 ldr r1,=SA1110_BOARD_CONTROL
140 ldr r2,=SA1110_BCR_MIN
141 bic r2,r2,#SA1110_BCR_RED_LED
142 orr r2,r2,#SA1110_BCR_GREEN_LED
143 str r2,[r1]
144
145 // Pause
146 ldr r1,=100000
147 10: sub r1,r1,#1
148 cmp r1,#0
149 bne 10b
150
151 // Initialize DRAM controller
152 ldr r1,=dram_table
153 ldr r2,=__exception_handlers
154 sub r1,r1,r2
155 ldr r2,[r1],#4 // First control register
156 10: ldr r3,[r1],#4
157 str r3,[r2]
158 ldr r2,[r1],#4 // Next control register
159 cmp r2,#0
160 bne 10b
161
162 ldr r1,=SA1110_BOARD_CONTROL
163 ldr r2,=SA1110_BCR_MIN
164 orr r2,r2,#SA1110_BCR_RED_LED
165 bic r2,r2,#SA1110_BCR_GREEN_LED
166 str r2,[r1]
167
168 // Enable UART
169 ldr r1,=SA1110_GPCLK_CONTROL_0
170 ldr r2,=SA1110_GPCLK_SUS_UART
171 str r2,[r1]
172
173 // Release DRAM hold (set by RESET)
174 ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS
175 ldr r2,=SA11X0_DRAM_CONTROL_HOLD
176 str r2,[r1]
177
178 // Perform 8 reads from unmapped/unenabled DRAM
179 ldr r1,=SA11X0_RAM_BANK0_BASE
180 ldr r2,[r1]
181 ldr r2,[r1]
182 ldr r2,[r1]
183 ldr r2,[r1]
184 ldr r2,[r1]
185 ldr r2,[r1]
186 ldr r2,[r1]
187 ldr r2,[r1]
188
189 // Enable DRAM controller
190 ldr r1,=SA11X0_DRAM_CONFIGURATION
191 ldr r2,=0x72547255
192 str r2,[r1]
193
194 b 19f
195
196 // DRAM controller initialization
197 dram_table:
198 .word SA11X0_DRAM0_CAS_0, 0xAAAAAA7F
199 .word SA11X0_DRAM0_CAS_1, 0xAAAAAAAA
200 .word SA11X0_DRAM0_CAS_2, 0xAAAAAAAA
201 .word SA11X0_STATIC_CONTROL_0, 0x4B384B38
202 .word SA11X0_STATIC_CONTROL_1, 0x22212419
203 .word SA11X0_EXP_BUS_CONFIGURATION, 0x994A994A
204 .word SA11X0_REFRESH_CONFIGURATION, 0x49FC0327
205 .word SA11X0_DRAM2_CAS_0, 0xAAAAAA7F
206 .word SA11X0_DRAM2_CAS_1, 0xAAAAAAAA
207 .word SA11X0_DRAM2_CAS_2, 0xAAAAAAAA
208 .word SA11X0_STATIC_CONTROL_2, 0x42194449
209 .word SA11X0_SMROM_CONFIGURATION, 0xAFCCAFCC
210 .word SA11X0_DRAM_CONFIGURATION, 0x72547254 // Disabled
211 .word 0, 0
212 19:
213
214 // Release peripheral hold (set by RESET)
215 ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS
216 ldr r2,=SA11X0_PERIPHERAL_CONTROL_HOLD
217 str r2,[r1]
218
219 // Set up a stack [for calling C code]
220 ldr r1,=__startup_stack
221 ldr r2,=SA11X0_RAM_BANK0_BASE
222 orr sp,r1,r2
223
224 // Create MMU tables
225 bl hal_mmu_init
226
227 // Turn on green LED
228 ldr r1,=SA1110_BOARD_CONTROL
229 ldr r2,=SA1110_BCR_MIN
230 orr r2,r2,#SA1110_BCR_RED_LED
231 bic r2,r2,#SA1110_BCR_GREEN_LED
232 str r2,[r1]
233
234 // Enable MMU
235 ldr r2,=10f
236 ldr r1,=MMU_Control_Init|MMU_Control_M
237 mcr MMU_CP,0,r1,MMU_Control,c0
238 mov pc,r2 /* Change address spaces */
239 nop
240 nop
241 nop
242 10:
243
244 // Turn on both LEDs
245 ldr r1,=SA1110_BOARD_CONTROL
246 ldr r2,=SA1110_BCR_MIN
247 bic r2,r2,#SA1110_BCR_RED_LED
248 bic r2,r2,#SA1110_BCR_GREEN_LED
249 str r2,[r1]
250
251 // Save shadow copy of BCR, also hardware configuration
252 ldr r1,=_assabet_BCR
253 str r2,[r1]
254 ldr r1,=_assabet_CFG
255 str r9,[r1] // Saved far above...
256 .endm
257
258 #else // defined(CYG_HAL_STARTUP_ROM)
259 #define PLATFORM_SETUP1
260 #endif
261
262 #define PLATFORM_VECTORS _platform_vectors
263 .macro _platform_vectors
264 .globl _assabet_BCR, _assabet_CFG
265 _assabet_BCR: .long 0 // Board Control register shadow
266 _assabet_CFG: .long 0 // Board Configuration (read at RESET)
267 .endm
268
269 /*---------------------------------------------------------------------------*/
270 /* end of hal_platform_setup.h */
271 #endif /* CYGONCE_HAL_PLATFORM_SETUP_H */