* src/arm.ld: Discard C++ EH-related sections when we can't possibly support C++ EH (no CYGPKG_LIBSTDCXX). * src/hal_mk_defs.c: Also export HAL_BREAKINST_THUMB and HAL_BREAKINST_ARM to asm. * src/arm.ld: Revise alignment yet further. Maintain ALIGN_LMA at original value, but define alignment for use in compliance with AAPCS. Expand explanatory comments. (SECTION_text): Comply with AAPCS alignment when inserting .ARM.extab and .ARM.exidx. * src/arm.ld: Rework alignment further to improve backward compatibility. Improve commenting on alignment issues. * src/arm.ld: We need to be double-word aligned sometimes, so align LMA the same way too. * cdl/hal_arm.cdl (CYGBLD_HAL_ARM_EABI): EABI has a different C++ EH implementation, so don't let LIBSTDCXX use the default one. * src/vectors.S: Correctly conditionalise overwriting (or not) of reset vector. * src/hal_misc.c (CONSTRUCTORS_END): Fix fencepost error. * include/arm_stub.h: Remove CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION and CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION defines which should remain as their defaults. * src/arm.ld: Add SECTION_hal_vsr_table for targets which need the VSR table in a different location to the rest of the fixed vectors. * src/vectors.S: Allow hal_platform_setup.h to define CYGHWR_HAL_ARM_SEPARATE_VSR_TABLE to allow move of hal_vsr_table to its own section at a different address. * src/hal_mk_defs.c (main): Export exception vector info to asm. * src/arm.ld: Remove previous EABI support and instead use a different approach incorporating into existing SECTION macros for better backward compatibility. * src/hal_misc.c (cyg_hal_invoke_constructors): Rewrite init_array support for EABI. There is now nothing copyrightable remaining from Chris Zimman's earlier work in this package. * cdl/hal_arm.cdl: Rename EABI option. Set default from toolchain prefix and flags. Rewrite description. * include/hal_arch.h: Rename exception vector addresses to names less likely to potentially clash with applications. * src/vectors.S: Update vector address names in line with hal_arch.h change. Rename CYGNUM_HAL_VECTOR_TABLE -> CYGHWR_HAL_VECTOR_TABLE_BASE. Some of the following changes were inspired by work from Chris Zimman. Further changes were also provided, but have not been included because either they are cosmetic (whitespace changes etc.) and thus will only make it more difficult to merge in future updates from public eCos code base in future, increase code size for those who don't need it, or break compatibility with public eCos. * cdl/hal_arm.cdl: Add EABI build option. * include/hal_arch.h: Add extra CPSR definitions, and exception vector addresses. * src/arm.ld: Add EABI support. * src/hal_misc.c: Add EABI constructor support. * src/vectors.S: Allow variant/processor/platform to specify alternate vector table base. Use pretty names from hal_arch.h for vector offset/addresses.

--- a/packages/hal/arm/arch/current/include/hal_arch.h
+++ b/packages/hal/arm/arch/current/include/hal_arch.h
@@ -12,6 +12,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+// Copyright (C) 2004, 2005, 2007, 2008 eCosCentric Limited
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -78,11 +79,40 @@
 #define CPSR_SUPERVISOR_MODE	0x13
 #define CPSR_UNDEF_MODE		0x1B
 
+// The following are not supported by every CPU, but if
+// they are, they have the following values:
+#define CPSR_ICACHE_ENABLE	0x1000
+#define CPSR_BIG_ENDIAN		0x80
+#define CPSR_DCACHE_ENABLE	0x4
+#define CPSR_ALIGN_FAULT_ENABLE	0x2
+#define CPSR_MMU_ENABLE		0x1
+
 #define CPSR_MODE_BITS          0x1F
 
 #define CPSR_INITIAL (CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
 #define CPSR_THREAD_INITIAL (CPSR_SUPERVISOR_MODE)
 
+//
+// Vector table offsets
+//
+
+#define HAL_ARM_RESET_VECTOR			0x00
+#define HAL_ARM_UNDEFINED_VECTOR		0x04
+#define HAL_ARM_SWI_VECTOR			0x08
+#define HAL_ARM_PREFETCH_VECTOR			0x0C
+#define HAL_ARM_ABORT_VECTOR			0x10
+#define HAL_ARM_RESERVED_VECTOR			0x14
+#define HAL_ARM_IRQ_VECTOR			0x18
+#define HAL_ARM_FIQ_VECTOR			0x1C
+#define HAL_ARM_RESET_VECTOR_ADDR		0x20
+#define HAL_ARM_UNDEFINED_VECTOR_ADDR		0x24
+#define HAL_ARM_SWI_VECTOR_ADDR			0x28
+#define HAL_ARM_PREFETCH_VECTOR_ADDR		0x2C
+#define HAL_ARM_ABORT_VECTOR_ADDR		0x30
+#define HAL_ARM_RESERVED_VECTOR_ADDR		0x34
+#define HAL_ARM_IRQ_VECTOR_ADDR			0x38
+#define HAL_ARM_FIQ_VECTOR_ADDR			0x3C
+
 //--------------------------------------------------------------------------
 // Processor saved states:
 // The layout of this structure is also defined in "arm.inc", for assembly