# HG changeset patch # User jlarmour # Date 1166095519 0 # Node ID 2296f0d76ae25e18c13d31dadd2f310e1f9d33db # Parent 23bf56b48ddcd8635dcabed475b94f287a66af84 * cdl/flash_intel_28fxxx.cdl, include/flash_28fxxx_parts.inl: Add Intel 28F320J3 part. diff --git a/packages/devs/flash/intel/28fxxx/current/ChangeLog b/packages/devs/flash/intel/28fxxx/current/ChangeLog --- a/packages/devs/flash/intel/28fxxx/current/ChangeLog +++ b/packages/devs/flash/intel/28fxxx/current/ChangeLog @@ -1,3 +1,8 @@ +2006-12-14 Yoshinori Sato + + * cdl/flash_intel_28fxxx.cdl, include/flash_28fxxx_parts.inl: Add + Intel 28F320J3 part. + 2006-11-28 Sergei Gavrikov * cdl/flash_intel_28fxxx.cdl, include/flash_28fxxx_parts.inl: diff --git a/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl b/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl --- a/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl +++ b/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl @@ -184,6 +184,17 @@ cdl_package CYGPKG_DEVS_FLASH_INTEL_28FX part in the family." } + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F320J3 { + display "Intel 28F320J3 flash memory support" + default_value 0 + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + implements CYGINT_DEVS_FLASH_INTEL_VARIANTS + description " + When this option is enabled, the Intel flash driver will be + able to recognize and handle the 28F320J3 + part in the family." + } + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F800B5 { display "Intel 28F800B5 flash memory support" default_value 0 diff --git a/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl b/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl --- a/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl +++ b/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl @@ -193,7 +193,21 @@ banked : false }, #endif - + +#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320J3 + { // 28F320J3 + device_id : FLASHWORD(0x0016), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 32, + device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : false, + buffered_w : false, + bootblock : false, + banked : false + }, +#endif + #ifdef CYGHWR_DEVS_FLASH_INTEL_28F128K3 { device_id : FLASHWORD(0x8802),