# HG changeset patch # User jlarmour # Date 926425474 0 # Node ID 443894e2e912454b8607ddf011c7a94789795639 # Parent 72f549f0d891c90f2028c26d5b712bbdb28f1e8a Block commit of eCos version 1.2.1 diff --git a/packages/ChangeLog b/packages/ChangeLog --- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,296 @@ +1999-04-26 Bart Veer + + * pkgconf.tcl: + Temporary workaround - add a .PRECIOUS for libextras.a + +1999-04-16 Bart Veer + + * pkgconf.tcl: + Remove the phony target "packages". This is no longer useful and + was causing problems, extras.o was not always rebuilt when it + should because of a dependency on a phony target. + + * pkgconf.tcl: + Simplify the rules for extras.o, based on the assumption that + libextras.a will always exist. This is now guaranteed via + hal/common/src/dummy.c + +1999-04-15 Bart Veer + + * pkgconf/makrules.src (build): + Remove partial comment - I cannot remember what is was meant to + say. + +1999-04-14 Jonathan Larmour + + * pkgconf.tcl: Recreate extras.o when necessary after all other builds + have completed. Create a dummy one, if there's no libextras.a + +1999-04-14 Bart Veer + + * packages: + Move serial devices to the end of the file so that the reparenting + below the HAL packages works as intended. + +1999-04-12 John Dallaway + + * pkgrelease.tcl: Report 'not within region' messages. + +1999-03-28 John Dallaway + + * pkgrelease.tcl: Supress incomplete NEWS file. + +1999-03-22 Jonathan Larmour + + * packages + * targets + Don't let CYGPKG_DEVICES_WALLCLOCK and CYGPKG_DEVICES_WATCHDOG be + hardware-specific since they have emulation modes. + Instead make them ubiquitous with default state enabled + + * Recursively *.h, *.hxx, *.c, *.cxx, *.inl: + Detabify + +1999-03-22 John Lane + + * Recursively *.h, *.hxx, *.c, *.cxx, *.inl: + Update all copyright messages to be copyright 1999 too + Strip all e-mail addresses down to user names within the DESCRIPTION header + +1999-03-16 Gary Thomas + + * pkgconf/makevars: Allow variables of the type 'fn-CFLAGS' + and 'fn-CXXFLAGS' to provide singular option override for the + given file name. + +1999-03-17 John Dallaway + + * pkgconf/makevars: Remove dependence on echo '-e' switch. + +1999-03-16 Hugo Tyson + + * targets (sparclite, sleb): add rom startup. + +1999-03-09 Bart Veer + + * pkgconf.tcl: + The generated pkgconf/pkgconf.mak file now defines variables + TARGET, PLATFORM and STARTUP. + +1999-03-05 John Dallaway + + * packages, targets: Replace hardware attribute due to + unforseen problems (undo most recent change). + +1999-03-05 John Dallaway + + * packages: Remove the hardware attribute from the WALLCLOCK + and WATCHDOG packages. + * targets: Remove the dependency of each platform on the + WALLCLOCK and WATCHDOG packages since these are no longer + hardware packages. + +1999-03-05 Gary Thomas + + * targets: Remove old DEVICES package requirements. + Add WALLCLOCK, WATCHDOG for all platforms. + +1999-03-04 Gary Thomas + + These changes merged from 'ecos-new_devs-19990216-branch' + + (1999-02-18 Gary Thomas ) + + * packages: Change include directory paths for I/O files. + + (1999-02-16 Gary Thomas ) + + * pkgconf/makrules.src: + * pkgconf/makrules.tst: + * packages: Rework I/O [device drivers] sub-system. + +1999-03-04 Bart Veer + + * pkgconf.tcl: + Added new command-line arguments --debug and --nodebug + + * pkgconf.tcl: + Revert previous change. cygpath may not be available in + customer releases of eCos. + + * pkgconf.tcl: + Under Windows the external cygpath utility is now used to + perform pathname translations. This eliminates the need for + pkgconf.tcl to know about or make guesses about the mount + table. + + * pkgrelease.tcl: + Added NEWS to the list of special files. + +1999-03-04 John Dallaway + + * pkgconf.tcl: Point to renamed *.ldi and *.h memory + layout files with unique names. + +1999-03-03 John Dallaway + + * pkgconf/makrules.tst: + Ignore test link errors only when IGNORE_LINK_ERRORS is + defined. + +1999-03-02 Bart Veer + + * pkgconf.tcl: + tclsh 8.0 patchlevel 0 had problems accessing a namespace + array variable when a command was running inside a safe + interpreter. Prefixing the array variable with :: avoids + the problem and is still legal Tcl code. + +1999-02-26 Hugo Tyson + + * targets (sleb): + * packages (CYGPKG_HAL_SPARCLITE_SLEB): + Add SPARClite evaluation board (sleb). + + +1999-02-22 Mark Galassi + + * NEWS: small addition. + +1999-02-19 Jesper Skov + + * NEWS: Added some more entries, fleshed out some. + +1999-02-19 Mark Galassi + + * NEWS: added the NEWS file. It's rather sparse for now. + +1999-02-12 John Dallaway + + * pkgrelease.tcl: Report 'region is full' message count. + +1999-02-11 John Dallaway + + * pkgrelease.tcl: Report ignored linker error count. + +1999-02-11 John Dallaway + + * pkgconf/makrules.tst: Ignore linker errors while building tests. + +1999-02-10 Hugo Tyson + + * targets: Set sparclite optimization -O2, enable selective + linking, &c &c. + +1999-02-10 Gary Thomas + + * targets: Remove options now that math problems have been addressed. + +1999-02-10 John Dallaway + + * pkgrelease.tcl: Suppress generation of prebuilts for stubs startup + +1999-02-08 John Dallaway + + * packages: Define HAL and RS232 packages in alphabetical order + for presentation by the configuration tool. + +1999-02-01 Gary Thomas + + * targets: Add compiler options to work-around math code problems. + +1999-01-25 Hugo Tyson + + * targets: be explicit about -msoft-float -mcpu=sparclite FAOD. + + +1999-01-21 Jesper Skov + + * targets: + * packages: + Added FADS entries from Kevin Hester . + +1999-01-21 Gary Thomas + + * pkgrelease.tcl: Add "--customers_file=xxx" option to allow customer + data-base file to be overidden on command line. This is really just + for ease of testing new, exciting customer setups. + +1999-01-20 Gary Thomas + + * packages: Add ARM/PID serial driver + +1999-01-20 Jesper Skov + + * targets: Changes ppc target 'stub' to 'stubs'. + +1999-01-19 Hugo Tyson + + * targets: added -finit-priority to CXXLANGFLAGS for sparclite. + + +1999-01-19 Jesper Skov + + * targets: Added 'stub' startup. + +1999-01-19 Gary Thomas + + * targets: Add new memory layout 'stubs' for GDB/stubs layout. + +1999-01-15 Gary Thomas + + * pkgconf.tcl: Add new misc file 'system.mak' which contains + the same info as except suitable for makefiles. + +1999-01-14 Hugo Tyson + + * packages: add SPARClite HAL info + * targets: add SPARClite info + * hal/sparclite/*...: initial checkin. + + +1999-01-14 Gary Thomas + + * pkgconf/makrules.prv: Rename 'TESTS' to 'PROGS' which makes + more sense based on how these rules are used. + + * pkgconf.tcl: Add support for 'misc' subdirectories. + +1999-01-14 Jesper Skov + + * targets: Changed x86 tools prefix to i686-pc-linux-gnu. + +1999-01-13 Jesper Skov + + * packages: Added aliases to i386 linux entry. + +1999-01-06 Jesper Skov + + * targets: Cleaned up i386 entry. + +Mon Nov 9 15:05:30 GMT 1998 Chris Provenzano + + Initial i386 linux port. + + * packages, targets: Added target i386 platform linux. + + +1999-01-11 Bart Veer + + * pkgconf.tcl: Provide interim support for the MLT + +1998-12-17 Gary Thomas + + * targets: Make compiler options platform specific + for ARM (AEB-1 vs PID) + +1998-12-15 Gary Thomas + + * packages: Add new AEB-1 platform + + * targets: Support new selective linking for ARM. + Also add AEB-1 platform. + 1998-10-23 Jesper Skov PR 17959 @@ -271,7 +564,7 @@ 1998-07-23 Bart Veer +1999-04-23 Hugo Tyson + + * tests/testcx7.cxx: T2_MALLOC definition; only make it smaller + than the main consumer malloc if coaleasing is enabled, otherwise + the mempool cannot allocate blocks for the consumer for next time. + Fixes PR 18817 - only a random perm disable coalescence. + + * tests/test7.c: Ditto. + +1999-04-15 John Dallaway + + * include/pkgconf/uitron.h: Tidy display string capitalization. + +1999-04-09 Hugo Tyson + + * include/uit_func.inl (dis_dsp): Remove bad old code which used + to lock the scheduler to implement dis_dsp() and ena_dsp() - which + also stopped the clock, for example. Instead change the calling + thread's priority to 0 internally so that it cannot be preempted + by uITRON threads at least, whose priorities are 1--N. Same + applies to loc/unl_cpu(). Save the "real" priority in a static, + and take notice of it everywhere relevant, such as thread and + system state inquiries, changing (our own) priority, checking for + dispatch enabled in sleeping calls, and so on. + + * src/uit_func.cxx: New variable cyg_uitron_dis_dsp_old_priority + for holding the "real" priority of a thread whilst we change our + priority to zero (the highest) to prevent dispatching in dis_dsp() + or loc_cpu(). + + * include/uit_func.inl (get_tid): Return 0 for the task id if not + in a uITRON thread, this is better conformance to the spec. + +1999-03-22 Hugo Tyson + + * src/uit_objs.cxx: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-02-23 Jonathan Larmour + + * tests/test1.c, tests/test2.c, tests/test3.c, tests/test4.c, + tests/test5.c, tests/test6.c, tests/test7.c, tests/test8.c, + tests/test9.c, tests/testcxx.cxx, tests/testcx2.cxx, + tests/testcx3.cxx, tests/testcx4.cxx, tests/testcx5.cxx, + tests/testcx6.cxx, tests/testcx7.cxx, tests/testcx8.cxx, + tests/testcx9.cxx: + Change all non-applicable cases to use CYG_TEST_NA rather than + CYG_TEST_PASS/CYG_TEST_EXIT + +1999-02-22 Hugo Tyson + + * src/uit_objs.cxx: Eeeek! Previous fix was bogus: the override + was too late in the file to take effect. The declaration of the + objects (including stacks) is moved to below the override CPP + runes. + +1999-02-12 Hugo Tyson + + * src/uit_objs.cxx (CYG_UITRON_DECL): + Override CYGNUM_UITRON_STACK_SIZE if CYGNUM_HAL_MINIMUM_STACK_SIZE + demands it. + + * include/pkgconf/uitron.h (CYGNUM_UITRON_STACK_SIZE): + Document that this option can be overridden by HALs demands. + +1999-02-02 Jesper Skov + PR 18968 + * tests/test2.c (task1): + * tests/testcx2.cxx (task1): + Reduce run time on SIM. + +1999-01-26 Jesper Skov + PR 18788 + * tests/test4.c (task1): + * tests/testcx4.cxx (task1): + Extend timeouts when running on HW to avoid failures due to + overhead of GDB interaction. + +1999-01-25 Jesper Skov + PR 18576 + * include/pkgconf/uitron.h (CYGDAT_UITRON_SEMA_INITIALIZERS): + Let default initializers have values that don't cause tests to + fail. + +1998-11-25 Hugo Tyson + + * include/uit_func.inl (del_xxx &c): + Make error returns more consistent; E_NOEXS rather than E_OBJ if + the object disappeared during a race. + +1998-11-19 Hugo Tyson + + * src/uit_func.cxx (SET_UP_PTRS): + PR 17999; work around codegen bug on tx39 with -Os. + The code is better with the fix regardless, so it's got no + downside. Explicitly condition whether to run a follow-on loop + rather than letting the for-loop sort it out itself. + +1998-11-16 Hugo Tyson + + * tests/testcx7.cxx (check_waitstate): + Add a routine to check the reported waiting state of the synch + object in question, and call it as necessary. This only added to + the C++ version of the test for enhanced coverage, in case the + enquiry call perturbs the object state; having both versions + present is better. This checks a very recent fix to + kernel...thread.cxx (1998-10-27). + +1998-10-21 Hugo Tyson * src/uit_func.cxx: Provide weakly named dummies for task[1-4], which are the defaults @@ -436,7 +545,7 @@ Fri Jul 24 13:02:46 1998 Hugo Tyson #include + +// ------------------------------------------------------------------------ +// The variable where dis_dsp/ena_dsp state is held: +extern cyg_uint32 cyg_uitron_dis_dsp_old_priority; + // ------------------------------------------------------------------------ // Parameter checking; either check the expression and return an error code // if not true, or assert the truth with a made-up message. #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS // default: uitron error codes are returned -#define CYG_UIT_PARAMCHECK( _true_, _error_ ) CYG_MACRO_START \ - if ( ! (_true_) ) return (_error_); \ +#define CYG_UIT_PARAMCHECK( _true_, _error_ ) CYG_MACRO_START \ + if ( ! (_true_) ) return (_error_); \ CYG_MACRO_END #else // ...but they are asserted if asserts are on -#define CYG_UIT_PARAMCHECK( _true_, _error_ ) CYG_MACRO_START \ - CYG_ASSERT( (_true_), "CYG_UIT_PARAMCHECK fail: " #_true_ ); \ +#define CYG_UIT_PARAMCHECK( _true_, _error_ ) CYG_MACRO_START \ + CYG_ASSERT( (_true_), "CYG_UIT_PARAMCHECK fail: " #_true_ ); \ CYG_MACRO_END #endif // else !CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS @@ -81,111 +86,111 @@ CYG_MACRO_END // // Usage: // INT snd_msg( ID mbxid, ... ) { -// Cyg_Mbox *p; -// CYG_UITRON_CHECK_AND_GETP_MBOXES( mbxid, p ); -// p->...(...); +// Cyg_Mbox *p; +// CYG_UITRON_CHECK_AND_GETP_MBOXES( mbxid, p ); +// p->...(...); // internal: plain assignment to the object pointer, from static array -#define CYG_UIT_SPTR( _which_, _idx_, _ptr_ ) CYG_MACRO_START \ - (_ptr_) = CYG_UITRON_OBJS( _which_ ) + ((_idx_) - 1); \ +#define CYG_UIT_SPTR( _which_, _idx_, _ptr_ ) CYG_MACRO_START \ + (_ptr_) = CYG_UITRON_OBJS( _which_ ) + ((_idx_) - 1); \ CYG_MACRO_END // internal: plain assignment to the object pointer, from pointer array // with error checking. -#define CYG_UIT_SPTR_PTR( _which_, _idx_, _ptr_ ) CYG_MACRO_START \ - (_ptr_) = CYG_UITRON_PTRS( _which_ )[ ((_idx_) - 1) ]; \ - if ( NULL == (_ptr_) ) return E_NOEXS; \ +#define CYG_UIT_SPTR_PTR( _which_, _idx_, _ptr_ ) CYG_MACRO_START \ + (_ptr_) = CYG_UITRON_PTRS( _which_ )[ ((_idx_) - 1) ]; \ + if ( NULL == (_ptr_) ) return E_NOEXS; \ CYG_MACRO_END -#define CYG_UITRON_CHECK_AND_GETP_DIRECT( _which_, _idx_, _ptr_ ) \ -CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ - CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ - CYG_UIT_SPTR( _which_, _idx_, _ptr_ ); \ +#define CYG_UITRON_CHECK_AND_GETP_DIRECT( _which_, _idx_, _ptr_ ) \ +CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ + CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ + CYG_UIT_SPTR( _which_, _idx_, _ptr_ ); \ CYG_MACRO_END -#define CYG_UITRON_CHECK_AND_GETP_INDIRECT( _which_, _idx_, _ptr_ ) \ -CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ - CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ - CYG_UIT_SPTR_PTR( _which_, _idx_, _ptr_ ); \ +#define CYG_UITRON_CHECK_AND_GETP_INDIRECT( _which_, _idx_, _ptr_ ) \ +CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ + CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ + CYG_UIT_SPTR_PTR( _which_, _idx_, _ptr_ ); \ CYG_MACRO_END // As above but for handler numbers which return E_PAR when out of range -#define CYG_UITRON_CHECK_AND_GETHDLR( _which_, _num_, _ptr_ ) \ -CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( 0 < (_num_), E_PAR ); \ +#define CYG_UITRON_CHECK_AND_GETHDLR( _which_, _num_, _ptr_ ) \ +CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( 0 < (_num_), E_PAR ); \ CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_num_), E_PAR ); \ - CYG_UIT_SPTR( _which_, _num_, _ptr_ ); \ + CYG_UIT_SPTR( _which_, _num_, _ptr_ ); \ CYG_MACRO_END // And a macro to check that creation of an object is OK -#define CYG_UITRON_CHECK_NO_OBJ_LOCK_SCHED( _which_, _idx_ ) \ -CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ - CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ - Cyg_Scheduler::lock(); \ - if ( NULL != CYG_UITRON_PTRS( _which_ )[ ((_idx_) - 1) ] ) { \ - Cyg_Scheduler::unlock(); \ - return E_OBJ; \ - } \ +#define CYG_UITRON_CHECK_NO_OBJ_LOCK_SCHED( _which_, _idx_ ) \ +CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( 0 < (_idx_), E_ID ); \ + CYG_UIT_PARAMCHECK( CYG_UITRON_NUM( _which_ ) >= (_idx_), E_ID ); \ + Cyg_Scheduler::lock(); \ + if ( NULL != CYG_UITRON_PTRS( _which_ )[ ((_idx_) - 1) ] ) { \ + Cyg_Scheduler::unlock(); \ + return E_OBJ; \ + } \ CYG_MACRO_END // define a magic new operator in order to call constructors -#define CYG_UITRON_NEWFUNCTION( _class_ ) \ -inline void *operator new(size_t size, _class_ *ptr) \ -{ \ - CYG_CHECK_DATA_PTR( ptr, "Bad pointer" ); \ - return ptr; \ +#define CYG_UITRON_NEWFUNCTION( _class_ ) \ +inline void *operator new(size_t size, _class_ *ptr) \ +{ \ + CYG_CHECK_DATA_PTR( ptr, "Bad pointer" ); \ + return ptr; \ } // now configury to support selectable create/delete support ie. an // array of pointers to the objects themselves. #ifdef CYGPKG_UITRON_TASKS_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_TASKS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_TASKS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( TASKS, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_TASKS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_TASKS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( TASKS, _idx_, _ptr_ ) #endif #ifdef CYGPKG_UITRON_SEMAS_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_SEMAS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_SEMAS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( SEMAS, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_SEMAS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_SEMAS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( SEMAS, _idx_, _ptr_ ) #endif #ifdef CYGPKG_UITRON_MBOXES_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_MBOXES( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MBOXES( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( MBOXES, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_MBOXES( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MBOXES( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( MBOXES, _idx_, _ptr_ ) #endif #ifdef CYGPKG_UITRON_FLAGS_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_FLAGS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_FLAGS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( FLAGS, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_FLAGS( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_FLAGS( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( FLAGS, _idx_, _ptr_ ) #endif #ifdef CYGPKG_UITRON_MEMPOOLFIXED_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLFIXED( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLFIXED( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( MEMPOOLFIXED, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLFIXED( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLFIXED( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( MEMPOOLFIXED, _idx_, _ptr_ ) #endif #ifdef CYGPKG_UITRON_MEMPOOLVAR_CREATE_DELETE -#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLVAR( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLVAR( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_INDIRECT( MEMPOOLVAR, _idx_, _ptr_ ) #else -#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLVAR( _idx_, _ptr_ ) \ +#define CYG_UITRON_CHECK_AND_GETP_MEMPOOLVAR( _idx_, _ptr_ ) \ CYG_UITRON_CHECK_AND_GETP_DIRECT( MEMPOOLVAR, _idx_, _ptr_ ) #endif @@ -197,46 +202,46 @@ inline void *operator new(size_t size, _ // if not checking and not asserted, these are removed to avoid usused // variable warnings. #define CYG_UITRON_CHECK_TASK_CONTEXT_SELF( _self_ ) CYG_EMPTY_STATEMENT -#define CYG_UITRON_CHECK_TASK_CONTEXT() CYG_EMPTY_STATEMENT -#define CYG_UITRON_CHECK_DISPATCH_ENABLED() CYG_EMPTY_STATEMENT +#define CYG_UITRON_CHECK_TASK_CONTEXT() CYG_EMPTY_STATEMENT +#define CYG_UITRON_CHECK_DISPATCH_ENABLED() CYG_EMPTY_STATEMENT #define CYG_UITRON_CHECK_DISPATCH_ENABLED_TMO( _tmout_ ) CYG_EMPTY_STATEMENT #else // the default: // Check a task is actually a uITRON task -#define CYG_UITRON_CHECK_TASK_CONTEXT_SELF( _self_ ) CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( \ - (&cyg_uitron_TASKS[0] <= (_self_)) && \ - ((_self_) < &cyg_uitron_TASKS[CYGNUM_UITRON_TASKS]), \ - E_CTX ); \ +#define CYG_UITRON_CHECK_TASK_CONTEXT_SELF( _self_ ) CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( \ + (&cyg_uitron_TASKS[0] <= (_self_)) && \ + ((_self_) < &cyg_uitron_TASKS[CYGNUM_UITRON_TASKS]), \ + E_CTX ); \ CYG_MACRO_END -#define CYG_UITRON_CHECK_TASK_CONTEXT() CYG_MACRO_START \ - Cyg_Thread *self = Cyg_Thread::self(); \ - CYG_UITRON_CHECK_TASK_CONTEXT_SELF( self ); \ +#define CYG_UITRON_CHECK_TASK_CONTEXT() CYG_MACRO_START \ + Cyg_Thread *self = Cyg_Thread::self(); \ + CYG_UITRON_CHECK_TASK_CONTEXT_SELF( self ); \ CYG_MACRO_END // Check dispatching is enabled for calls which might wait -#define CYG_UITRON_CHECK_DISPATCH_ENABLED() CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( 0 == Cyg_Scheduler::get_sched_lock(), E_CTX ); \ +#define CYG_UITRON_CHECK_DISPATCH_ENABLED() CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( 0 == cyg_uitron_dis_dsp_old_priority, E_CTX ); \ CYG_MACRO_END #define CYG_UITRON_CHECK_DISPATCH_ENABLED_TMO(_tmout_) CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( -1 <= (_tmout_), E_PAR ); \ - if ( TMO_POL != (_tmout_) ) \ - CYG_UITRON_CHECK_DISPATCH_ENABLED(); \ + CYG_UIT_PARAMCHECK( -1 <= (_tmout_), E_PAR ); \ + if ( TMO_POL != (_tmout_) ) \ + CYG_UITRON_CHECK_DISPATCH_ENABLED(); \ CYG_MACRO_END #endif #ifdef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR -#define CYG_UIT_PARAMCHECK_PTR( _p_ ) CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( NADR != (_p_), E_PAR ); \ +#define CYG_UIT_PARAMCHECK_PTR( _p_ ) CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( NADR != (_p_), E_PAR ); \ CYG_MACRO_END #else // do check for NULL -#define CYG_UIT_PARAMCHECK_PTR( _p_ ) CYG_MACRO_START \ - CYG_UIT_PARAMCHECK( NADR != (_p_), E_PAR ); \ - CYG_UIT_PARAMCHECK( NULL != (_p_), E_PAR ); \ +#define CYG_UIT_PARAMCHECK_PTR( _p_ ) CYG_MACRO_START \ + CYG_UIT_PARAMCHECK( NADR != (_p_), E_PAR ); \ + CYG_UIT_PARAMCHECK( NULL != (_p_), E_PAR ); \ CYG_MACRO_END #endif // !CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR @@ -248,25 +253,25 @@ CYG_MACRO_END // This macro examines context and finds out which, then executes a return // with the correct uITRON condition code. -#define CYG_UITRON_FAIL_RETURN_SELF( _self_ ) CYG_MACRO_START \ - Cyg_Thread::cyg_reason reason = (_self_)->get_wake_reason(); \ - if ( Cyg_Thread::TIMEOUT == reason ) \ - return E_TMOUT; \ - if ( Cyg_Thread::BREAK == reason ) \ - return E_RLWAI; \ - if ( Cyg_Thread::DESTRUCT == reason ) \ - return E_DLT; \ - return E_SYS; /* if no plausible reason was found */ \ +#define CYG_UITRON_FAIL_RETURN_SELF( _self_ ) CYG_MACRO_START \ + Cyg_Thread::cyg_reason reason = (_self_)->get_wake_reason(); \ + if ( Cyg_Thread::TIMEOUT == reason ) \ + return E_TMOUT; \ + if ( Cyg_Thread::BREAK == reason ) \ + return E_RLWAI; \ + if ( Cyg_Thread::DESTRUCT == reason ) \ + return E_DLT; \ + return E_SYS; /* if no plausible reason was found */ \ CYG_MACRO_END -#define CYG_UITRON_FAIL_RETURN() CYG_MACRO_START \ - Cyg_Thread *self = Cyg_Thread::self(); \ - CYG_UITRON_FAIL_RETURN_SELF( self ); \ +#define CYG_UITRON_FAIL_RETURN() CYG_MACRO_START \ + Cyg_Thread *self = Cyg_Thread::self(); \ + CYG_UITRON_FAIL_RETURN_SELF( self ); \ CYG_MACRO_END // ------------------------------------------------------------------------ // Interrupts disabled? -#define CYG_UITRON_CHECK_CPU_UNLOC() \ +#define CYG_UITRON_CHECK_CPU_UNLOC() \ CYG_UIT_PARAMCHECK( (Cyg_Interrupt::interrupts_enabled()), E_CTX ) // ------------------------------------------------------------------------ @@ -328,6 +333,11 @@ del_tsk ( ID tskid ) CYG_UITRON_CHECK_AND_GETP_TASKS( tskid, p ); Cyg_Scheduler::lock(); + // deal with the race condition here + if ( p != CYG_UITRON_PTRS( TASKS )[ tskid - 1 ] ) { + Cyg_Scheduler::unlock(); + return E_NOEXS; + } cyg_uint32 state = p->get_state(); if ( state & Cyg_Thread::EXITED ) // just disconnect the pointer from its object @@ -419,6 +429,13 @@ ter_tsk ( ID tskid ) #endif } Cyg_Scheduler::unlock(); +#ifdef CYGIMP_THREAD_PRIORITY + if ( (E_OK == ret) && (0 != cyg_uitron_dis_dsp_old_priority) ) { + // then dispatching is disabled, so our prio is 0 too + Cyg_Thread::yield(); // so let the dying thread run; + Cyg_Thread::yield(); // no cost here of making sure. + } +#endif return ret; } @@ -428,9 +445,18 @@ dis_dsp ( void ) { CYG_UITRON_CHECK_TASK_CONTEXT(); CYG_UITRON_CHECK_CPU_UNLOC(); - // Prevent preemption - if ( 0 == Cyg_Scheduler::get_sched_lock() ) - Cyg_Scheduler::lock(); + Cyg_Scheduler::lock(); + // Prevent preemption by going up to prio 0 + if ( 0 == cyg_uitron_dis_dsp_old_priority ) { +#ifdef CYGIMP_THREAD_PRIORITY + Cyg_Thread *p = Cyg_Thread::self(); + cyg_uitron_dis_dsp_old_priority = p->get_priority(); + p->set_priority( 0 ); +#else + cyg_uitron_dis_dsp_old_priority = 1; +#endif + } + Cyg_Scheduler::unlock(); return E_OK; } @@ -440,9 +466,19 @@ ena_dsp ( void ) { CYG_UITRON_CHECK_TASK_CONTEXT(); CYG_UITRON_CHECK_CPU_UNLOC(); - // Unlock the scheduler (if locked) and maybe switch threads - if ( 0 < Cyg_Scheduler::get_sched_lock() ) - Cyg_Scheduler::unlock(); + Cyg_Scheduler::lock(); + // Enable dispatching (if disabled) and maybe switch threads + if ( 0 != cyg_uitron_dis_dsp_old_priority ) { + // We had prevented preemption by going up to prio 0 +#ifdef CYGIMP_THREAD_PRIORITY + Cyg_Thread *p = Cyg_Thread::self(); + p->set_priority( cyg_uitron_dis_dsp_old_priority ); + p->to_queue_head(); // to ensure we continue to run + // if nobody higher pri +#endif + cyg_uitron_dis_dsp_old_priority = 0; + } + Cyg_Scheduler::unlock(); CYG_UITRON_CHECK_DISPATCH_ENABLED(); // NB: afterwards! return E_OK; } @@ -460,6 +496,8 @@ chg_pri ( ID tskid, PRI tskpri ) } else CYG_UITRON_CHECK_AND_GETP_TASKS( tskid, p ); + + CYG_UIT_PARAMCHECK( 0 < tskpri, E_PAR ); #ifdef CYGIMP_THREAD_PRIORITY #if CYG_THREAD_MAX_PRIORITY < CYG_THREAD_MIN_PRIORITY CYG_UIT_PARAMCHECK( CYG_THREAD_MAX_PRIORITY <= tskpri && @@ -468,6 +506,15 @@ chg_pri ( ID tskid, PRI tskpri ) CYG_UIT_PARAMCHECK( CYG_THREAD_MAX_PRIORITY >= tskpri && tskpri >= CYG_THREAD_MIN_PRIORITY, E_PAR ); #endif + // Handle changing our own prio specially, if dispatch disabled: + if ( 0 != cyg_uitron_dis_dsp_old_priority ) { + // our actual prio is 0 now and must remain so: + if ( Cyg_Thread::self() == p ) { // by whichever route p was set + // set the priority we will return to when dispatch is enabled: + cyg_uitron_dis_dsp_old_priority = (cyg_uint32)tskpri; + return E_OK; + } + } Cyg_Scheduler::lock(); if ( (p->get_state() & (Cyg_Thread::EXITED | Cyg_Thread::CREATING)) || (Cyg_Thread::EXIT == p->get_wake_reason()) ) @@ -496,9 +543,7 @@ rot_rdq ( PRI tskpri ) CYG_UIT_PARAMCHECK( CYG_THREAD_MAX_PRIORITY >= tskpri && tskpri >= CYG_THREAD_MIN_PRIORITY, E_PAR ); #endif -#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE Cyg_Thread::rotate_queue( tskpri ); -#endif #endif // CYGIMP_THREAD_PRIORITY got priorities at all? return E_OK; } @@ -530,9 +575,13 @@ ER get_tid ( ID *p_tskid ) { Cyg_Thread *self = Cyg_Thread::self(); - CYG_UITRON_CHECK_TASK_CONTEXT_SELF( self ); CYG_UIT_PARAMCHECK_PTR( p_tskid ); - *p_tskid = (self - (&cyg_uitron_TASKS[0])) + 1; + if ( (&cyg_uitron_TASKS[0] <= (self)) && + ((self) < &cyg_uitron_TASKS[CYGNUM_UITRON_TASKS]) ) + // then I am a uITRON task + *p_tskid = (self - (&cyg_uitron_TASKS[0])) + 1; + else + *p_tskid = 0; // Otherwise, non-task portion return E_OK; } @@ -574,6 +623,11 @@ ref_tsk ( T_RTSK *pk_rtsk, ID tskid ) #ifdef CYGIMP_THREAD_PRIORITY if ( TTS_DMT == pk_rtsk->tskstat ) pk_rtsk->tskpri = CYG_UITRON_TASK_INITIAL_PRIORITY( tskid ); + else if ( (TTS_RUN == pk_rtsk->tskstat) && + (0 != cyg_uitron_dis_dsp_old_priority) ) + // then we are it and dispatching is disabled, so + // report our "real" priority - it is 0 in the kernel at the moment + pk_rtsk->tskpri = cyg_uitron_dis_dsp_old_priority; else pk_rtsk->tskpri = p->get_priority(); #else @@ -756,7 +810,7 @@ del_sem ( ID semid ) // deal with the race condition here if ( p != CYG_UITRON_PTRS( SEMAS )[ semid - 1 ] ) { Cyg_Scheduler::unlock(); - return E_OBJ; + return E_NOEXS; } CYG_UITRON_PTRS( SEMAS )[ semid - 1 ] = NULL; p->~Cyg_Counting_Semaphore2(); @@ -877,7 +931,7 @@ del_flg ( ID flgid ) // deal with the race condition here if ( p != CYG_UITRON_PTRS( FLAGS )[ flgid - 1 ] ) { Cyg_Scheduler::unlock(); - return E_OBJ; + return E_NOEXS; } CYG_UITRON_PTRS( FLAGS )[ flgid - 1 ] = NULL; p->~Cyg_Flag(); @@ -1034,7 +1088,7 @@ del_mbx ( ID mbxid ) // deal with the race condition here if ( p != CYG_UITRON_PTRS( MBOXES )[ mbxid - 1 ] ) { Cyg_Scheduler::unlock(); - return E_OBJ; + return E_NOEXS; } CYG_UITRON_PTRS( MBOXES )[ mbxid - 1 ] = NULL; p->~Cyg_Mbox(); @@ -1054,29 +1108,29 @@ del_mbx ( ID mbxid ) #ifdef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR // represent a NULL as NADR internally -#define CYG_UIT_TMSG_FIXUP_IN( _p_ ) CYG_MACRO_START \ - if ( NULL == (_p_) ) \ - (_p_) = (T_MSG *)NADR; \ +#define CYG_UIT_TMSG_FIXUP_IN( _p_ ) CYG_MACRO_START \ + if ( NULL == (_p_) ) \ + (_p_) = (T_MSG *)NADR; \ CYG_MACRO_END // we get a NADR back sometimes, meaning NULL -#define CYG_UIT_TMSG_FIXUP_OUT( _p_ ) CYG_MACRO_START \ - if ( NADR == (_p_) ) \ - (_p_) = (T_MSG *)NULL; \ +#define CYG_UIT_TMSG_FIXUP_OUT( _p_ ) CYG_MACRO_START \ + if ( NADR == (_p_) ) \ + (_p_) = (T_MSG *)NULL; \ CYG_MACRO_END #else // NULL is checked for and makes an error -#define CYG_UIT_TMSG_FIXUP_IN( _p_ ) CYG_EMPTY_STATEMENT -#define CYG_UIT_TMSG_FIXUP_OUT( _p_ ) CYG_EMPTY_STATEMENT +#define CYG_UIT_TMSG_FIXUP_IN( _p_ ) CYG_EMPTY_STATEMENT +#define CYG_UIT_TMSG_FIXUP_OUT( _p_ ) CYG_EMPTY_STATEMENT #endif // and sometimes either in status enquiries -#define CYG_UIT_TMSG_FIXUP_ALL( _p_ ) CYG_MACRO_START \ - if ( NULL == (_p_) ) \ - (_p_) = (T_MSG *)NADR; \ - else if ( NADR == (_p_) ) \ - (_p_) = (T_MSG *)NULL; \ +#define CYG_UIT_TMSG_FIXUP_ALL( _p_ ) CYG_MACRO_START \ + if ( NULL == (_p_) ) \ + (_p_) = (T_MSG *)NADR; \ + else if ( NADR == (_p_) ) \ + (_p_) = (T_MSG *)NULL; \ CYG_MACRO_END CYG_UIT_FUNC_INLINE @@ -1178,40 +1232,40 @@ ref_mbx ( T_RMBX *pk_rmbx, ID mbxid ) // - Extended Synchronization and Communication Functions #if 0 // NOT SUPPORTED -ER cre_mbf ( ID mbfid, T_CMBF *pk_cmbf ); -ER del_mbf ( ID mbfid ); -ER snd_mbf ( ID mbfid, VP msg, INT msgsz ); -ER psnd_mbf ( ID mbfid, VP msg, INT msgsz ); -ER tsnd_mbf ( ID mbfid, VP msg, INT msgsz, TMO tmout ); -ER rcv_mbf ( VP msg, INT *p_msgsz, ID mbfid ); -ER prcv_mbf ( VP msg, INT *p_msgsz, ID mbfid ); -ER trcv_mbf ( VP msg, INT *p_msgsz, ID mbfid, TMO tmout ); -ER ref_mbf ( T_RMBF *pk_rmbf, ID mbfid ); -ER cre_por ( ID porid, T_CPOR *pk_cpor ); -ER del_por ( ID porid ); -ER cal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT +ER cre_mbf ( ID mbfid, T_CMBF *pk_cmbf ); +ER del_mbf ( ID mbfid ); +ER snd_mbf ( ID mbfid, VP msg, INT msgsz ); +ER psnd_mbf ( ID mbfid, VP msg, INT msgsz ); +ER tsnd_mbf ( ID mbfid, VP msg, INT msgsz, TMO tmout ); +ER rcv_mbf ( VP msg, INT *p_msgsz, ID mbfid ); +ER prcv_mbf ( VP msg, INT *p_msgsz, ID mbfid ); +ER trcv_mbf ( VP msg, INT *p_msgsz, ID mbfid, TMO tmout ); +ER ref_mbf ( T_RMBF *pk_rmbf, ID mbfid ); +ER cre_por ( ID porid, T_CPOR *pk_cpor ); +ER del_por ( ID porid ); +ER cal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT cmsgsz ); -ER pcal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT +ER pcal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT cmsgsz ); -ER tcal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT +ER tcal_por ( VP msg, INT *p_rmsgsz, ID porid, UINT calptn, INT cmsgsz, TMO tmout ); -ER acp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT +ER acp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT acpptn ); -ER pacp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT +ER pacp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT acpptn ); -ER tacp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT +ER tacp_por ( RNO *p_rdvno, VP msg, INT *p_cmsgsz, ID porid, UINT acpptn, TMO tmout ); -ER fwd_por ( ID porid, UINT calptn, RNO rdvno, VP msg, INT cmsgsz +ER fwd_por ( ID porid, UINT calptn, RNO rdvno, VP msg, INT cmsgsz ); -ER rpl_rdv ( RNO rdvno, VP msg, INT rmsgsz ); -ER ref_por ( T_RPOR *pk_rpor, ID porid ); +ER rpl_rdv ( RNO rdvno, VP msg, INT rmsgsz ); +ER ref_por ( T_RPOR *pk_rpor, ID porid ); #endif // - Interrupt Management Functions #if 0 // NOT SUPPORTED -ER def_int ( UINT dintno, T_DINT *pk_dint ); -void ret_wup ( ID tskid ); +ER def_int ( UINT dintno, T_DINT *pk_dint ); +void ret_wup ( ID tskid ); #endif CYG_UIT_FUNC_INLINE @@ -1219,9 +1273,19 @@ ER loc_cpu ( void ) { CYG_UITRON_CHECK_TASK_CONTEXT(); + Cyg_Scheduler::lock(); + // Prevent preemption by going up to prio 0 + if ( 0 == cyg_uitron_dis_dsp_old_priority ) { +#ifdef CYGIMP_THREAD_PRIORITY + Cyg_Thread *p = Cyg_Thread::self(); + cyg_uitron_dis_dsp_old_priority = p->get_priority(); + p->set_priority( 0 ); +#else + cyg_uitron_dis_dsp_old_priority = 1; +#endif + } Cyg_Interrupt::disable_interrupts(); - if ( 0 == Cyg_Scheduler::get_sched_lock() ) - Cyg_Scheduler::lock(); + Cyg_Scheduler::unlock(); return E_OK; } @@ -1230,17 +1294,27 @@ ER unl_cpu ( void ) { CYG_UITRON_CHECK_TASK_CONTEXT(); + Cyg_Scheduler::lock(); + // Enable dispatching (if disabled) and maybe switch threads + if ( 0 != cyg_uitron_dis_dsp_old_priority ) { + // We had prevented preemption by going up to prio 0 +#ifdef CYGIMP_THREAD_PRIORITY + Cyg_Thread *p = Cyg_Thread::self(); + p->set_priority( cyg_uitron_dis_dsp_old_priority ); +#endif + cyg_uitron_dis_dsp_old_priority = 0; + } Cyg_Interrupt::enable_interrupts(); - if ( 0 < Cyg_Scheduler::get_sched_lock() ) - Cyg_Scheduler::unlock(); + Cyg_Scheduler::unlock(); + CYG_UITRON_CHECK_DISPATCH_ENABLED(); // NB: afterwards! return E_OK; } #if 0 // NOT SUPPORTED -ER dis_int ( UINT eintno ); -ER ena_int ( UINT eintno ); -ER chg_iXX ( UINT iXXXX ); -ER ref_iXX ( UINT *p_iXXXX ); +ER dis_int ( UINT eintno ); +ER ena_int ( UINT eintno ); +ER chg_iXX ( UINT iXXXX ); +ER ref_iXX ( UINT *p_iXXXX ); #endif // - Memorypool Management Functions @@ -1286,7 +1360,7 @@ del_mpl ( ID mplid ) // deal with the race condition here if ( p != CYG_UITRON_PTRS( MEMPOOLVAR )[ mplid - 1 ] ) { Cyg_Scheduler::unlock(); - return E_OBJ; + return E_NOEXS; } CYG_UITRON_PTRS( MEMPOOLVAR )[ mplid - 1 ] = NULL; p->~Cyg_Mempool_Variable(); @@ -1436,7 +1510,7 @@ del_mpf ( ID mpfid ) // deal with the race condition here if ( p != CYG_UITRON_PTRS( MEMPOOLFIXED )[ mpfid - 1 ] ) { Cyg_Scheduler::unlock(); - return E_OBJ; + return E_NOEXS; } CYG_UITRON_PTRS( MEMPOOLFIXED )[ mpfid - 1 ] = NULL; p->~Cyg_Mempool_Fixed(); @@ -1711,16 +1785,16 @@ get_ver ( T_VER *pk_ver ) { CYG_UIT_PARAMCHECK_PTR( pk_ver ); - pk_ver->maker = CYGNUM_UITRON_VER_MAKER; - pk_ver->id = CYGNUM_UITRON_VER_ID; - pk_ver->spver = CYGNUM_UITRON_VER_SPVER; - pk_ver->prver = CYGNUM_UITRON_VER_PRVER; - pk_ver->prno[0] = CYGNUM_UITRON_VER_PRNO_0; - pk_ver->prno[1] = CYGNUM_UITRON_VER_PRNO_1; - pk_ver->prno[2] = CYGNUM_UITRON_VER_PRNO_2; - pk_ver->prno[3] = CYGNUM_UITRON_VER_PRNO_3; - pk_ver->cpu = CYGNUM_UITRON_VER_CPU; - pk_ver->var = CYGNUM_UITRON_VER_VAR; + pk_ver->maker = CYGNUM_UITRON_VER_MAKER; + pk_ver->id = CYGNUM_UITRON_VER_ID; + pk_ver->spver = CYGNUM_UITRON_VER_SPVER; + pk_ver->prver = CYGNUM_UITRON_VER_PRVER; + pk_ver->prno[0] = CYGNUM_UITRON_VER_PRNO_0; + pk_ver->prno[1] = CYGNUM_UITRON_VER_PRNO_1; + pk_ver->prno[2] = CYGNUM_UITRON_VER_PRNO_2; + pk_ver->prno[3] = CYGNUM_UITRON_VER_PRNO_3; + pk_ver->cpu = CYGNUM_UITRON_VER_CPU; + pk_ver->var = CYGNUM_UITRON_VER_VAR; return E_OK; } @@ -1735,7 +1809,7 @@ ref_sys ( T_RSYS *pk_rsys ) pk_rsys->sysstat = TSS_LOC; else pk_rsys->sysstat = - (Cyg_Scheduler::get_sched_lock() == 0) ? TSS_TSK : TSS_DDSP; + (0 == cyg_uitron_dis_dsp_old_priority) ? TSS_TSK : TSS_DDSP; return E_OK; } @@ -1749,19 +1823,19 @@ ref_cfg ( T_RCFG *pk_rcfg ) } #if 0 // NOT SUPPORTED -ER def_svc ( FN s_fncd, T_DSVC *pk_dsvc ); -ER def_exc ( UINT exckind, T_DEXC *pk_dexc ); +ER def_svc ( FN s_fncd, T_DSVC *pk_dsvc ); +ER def_exc ( UINT exckind, T_DEXC *pk_dexc ); #endif // - Network Support Functions #if 0 // NOT SUPPORTED -ER nrea_dat ( INT *p_reasz, VP dstadr, NODE srcnode, VP srcadr, +ER nrea_dat ( INT *p_reasz, VP dstadr, NODE srcnode, VP srcadr, INT datsz ); -ER nwri_dat ( INT *p_wrisz, NODE dstnode, VP dstadr, VP srcadr, +ER nwri_dat ( INT *p_wrisz, NODE dstnode, VP dstadr, VP srcadr, INT datsz ); -ER nget_nod ( NODE *p_node ); -ER nget_ver ( T_VER *pk_ver, NODE node ); +ER nget_nod ( NODE *p_node ); +ER nget_ver ( T_VER *pk_ver, NODE node ); #endif // ======================================================================== diff --git a/packages/compat/uitron/current/include/uit_objs.hxx b/packages/compat/uitron/current/include/uit_objs.hxx --- a/packages/compat/uitron/current/include/uit_objs.hxx +++ b/packages/compat/uitron/current/include/uit_objs.hxx @@ -2,9 +2,9 @@ #define CYGONCE_COMPAT_UITRON_UIT_OBJS_HXX //=========================================================================== // -// uit_objs.hxx +// uit_objs.hxx // -// uITRON static objects +// uITRON static objects // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -24,18 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON static system objects -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON static system objects +// Description: // //####DESCRIPTIONEND#### // @@ -86,59 +86,59 @@ #ifdef CYGPKG_UITRON_SEMAS extern -Cyg_Counting_Semaphore2 CYG_UITRON_OBJS( SEMAS ) []; +Cyg_Counting_Semaphore2 CYG_UITRON_OBJS( SEMAS ) []; #ifdef CYGPKG_UITRON_SEMAS_CREATE_DELETE extern -Cyg_Counting_Semaphore2 *CYG_UITRON_PTRS( SEMAS ) []; +Cyg_Counting_Semaphore2 *CYG_UITRON_PTRS( SEMAS ) []; #endif #endif #ifdef CYGPKG_UITRON_MBOXES extern -Cyg_Mbox CYG_UITRON_OBJS( MBOXES ) []; +Cyg_Mbox CYG_UITRON_OBJS( MBOXES ) []; #ifdef CYGPKG_UITRON_MBOXES_CREATE_DELETE extern -Cyg_Mbox *CYG_UITRON_PTRS( MBOXES ) []; +Cyg_Mbox *CYG_UITRON_PTRS( MBOXES ) []; #endif #endif #ifdef CYGPKG_UITRON_FLAGS extern -Cyg_Flag CYG_UITRON_OBJS( FLAGS ) []; +Cyg_Flag CYG_UITRON_OBJS( FLAGS ) []; #ifdef CYGPKG_UITRON_FLAGS_CREATE_DELETE extern -Cyg_Flag *CYG_UITRON_PTRS( FLAGS ) []; +Cyg_Flag *CYG_UITRON_PTRS( FLAGS ) []; #endif #endif // there must always be tasks extern -Cyg_Thread CYG_UITRON_OBJS( TASKS ) []; +Cyg_Thread CYG_UITRON_OBJS( TASKS ) []; #ifdef CYGPKG_UITRON_TASKS_CREATE_DELETE extern -Cyg_Thread *CYG_UITRON_PTRS( TASKS ) []; +Cyg_Thread *CYG_UITRON_PTRS( TASKS ) []; #endif // no endif #ifdef CYGPKG_UITRON_MEMPOOLFIXED extern -Cyg_Mempool_Fixed CYG_UITRON_OBJS( MEMPOOLFIXED ) []; +Cyg_Mempool_Fixed CYG_UITRON_OBJS( MEMPOOLFIXED ) []; #ifdef CYGPKG_UITRON_MEMPOOLFIXED_CREATE_DELETE extern -Cyg_Mempool_Fixed *CYG_UITRON_PTRS( MEMPOOLFIXED )[]; +Cyg_Mempool_Fixed *CYG_UITRON_PTRS( MEMPOOLFIXED )[]; #endif #endif #ifdef CYGPKG_UITRON_MEMPOOLVAR extern -Cyg_Mempool_Variable CYG_UITRON_OBJS( MEMPOOLVAR ) []; +Cyg_Mempool_Variable CYG_UITRON_OBJS( MEMPOOLVAR ) []; #ifdef CYGPKG_UITRON_MEMPOOLVAR_CREATE_DELETE extern -Cyg_Mempool_Variable *CYG_UITRON_PTRS( MEMPOOLVAR ) []; +Cyg_Mempool_Variable *CYG_UITRON_PTRS( MEMPOOLVAR ) []; #endif #endif #ifdef CYGPKG_UITRON_CYCLICS extern -Cyg_Timer CYG_UITRON_OBJS( CYCLICS ) []; +Cyg_Timer CYG_UITRON_OBJS( CYCLICS ) []; #endif #ifdef CYGPKG_UITRON_ALARMS extern -Cyg_Timer CYG_UITRON_OBJS( ALARMS ) []; +Cyg_Timer CYG_UITRON_OBJS( ALARMS ) []; #endif // ------------------------------------------------------------------------ diff --git a/packages/compat/uitron/current/include/uit_type.h b/packages/compat/uitron/current/include/uit_type.h --- a/packages/compat/uitron/current/include/uit_type.h +++ b/packages/compat/uitron/current/include/uit_type.h @@ -2,9 +2,9 @@ #define CYGONCE_COMPAT_UITRON_UIT_TYPE_H //=========================================================================== // -// uit_type.h +// uit_type.h // -// uITRON specific data types as required by the API +// uITRON specific data types as required by the API // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -24,18 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON specific data types as required by the API -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON specific data types as required by the API +// Description: // //####DESCRIPTIONEND#### // @@ -57,7 +57,7 @@ // // *** General-Purpose Data Types *************************************** -typedef cyg_int8 B; // signed 8-bit integer +typedef cyg_int8 B; // signed 8-bit integer typedef cyg_int16 H; // signed 16-bit integer typedef cyg_int32 W; // signed 32-bit integer typedef cyg_uint8 UB; // unsigned 8-bit integer @@ -82,22 +82,22 @@ typedef CYG_ADDRWORD FP; // progr // names are used for data types which appear frequently and/or have // special meanings. -typedef cyg_int32 INT; // Signed integer (bit width of processor) +typedef cyg_int32 INT; // Signed integer (bit width of processor) typedef cyg_uint32 UINT; // Unsigned integer (bit width of processor) typedef cyg_int32 BOOL; // Boolean value. TRUE (1) or FALSE (0). typedef cyg_uint16 FN; // Function code. Signed integer. Maximum 2 bytes. -typedef INT ID; // Object ID number (???id) -typedef INT BOOL_ID;// Boolean value or ID number -typedef INT HNO; // Handler number -typedef INT RNO; // Rendezvous number -typedef INT NODE; // Node Number. Usually a signed integer. -typedef UINT ATR; // Object or handler attribute. An unsigned integer. -typedef INT ER; // Error code. A signed integer. -typedef INT PRI; // Task priority. A signed integer. -typedef UB T_MSG; // Message packet data structure used for mailboxes -typedef INT TMO; // Timeout value. A signed integer. +typedef INT ID; // Object ID number (???id) +typedef INT BOOL_ID;// Boolean value or ID number +typedef INT HNO; // Handler number +typedef INT RNO; // Rendezvous number +typedef INT NODE; // Node Number. Usually a signed integer. +typedef UINT ATR; // Object or handler attribute. An unsigned integer. +typedef INT ER; // Error code. A signed integer. +typedef INT PRI; // Task priority. A signed integer. +typedef UB T_MSG; // Message packet data structure used for mailboxes +typedef INT TMO; // Timeout value. A signed integer. // TMO_POL = 0 indicates polling, - // while TMO_FEVR = -1 indicates wait forever. + // while TMO_FEVR = -1 indicates wait forever. typedef cyg_uint64 CYGTM; typedef CYGTM SYSTIME;// Data types used for specifying times. @@ -518,7 +518,7 @@ enum { INT frbcnt; /* free block count */ /* additional information may be included depending on the implementation */ - INT numbcnt; /* total number of blocks */ + INT numbcnt; /* total number of blocks */ INT bsize; /* block size */ } T_RMPF; diff --git a/packages/compat/uitron/current/src/PKGconf.mak b/packages/compat/uitron/current/src/PKGconf.mak --- a/packages/compat/uitron/current/src/PKGconf.mak +++ b/packages/compat/uitron/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/compat/uitron/current/src/uit_func.cxx b/packages/compat/uitron/current/src/uit_func.cxx --- a/packages/compat/uitron/current/src/uit_func.cxx +++ b/packages/compat/uitron/current/src/uit_func.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// uit_func.cxx +// uit_func.cxx // -// uITRON compatibility functions +// uITRON compatibility functions // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON compatibility functions -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON compatibility functions +// Description: // //####DESCRIPTIONEND#### // @@ -49,6 +49,8 @@ #define CYGPRI_UITRON_FUNCS_HERE_AND_NOW #include +cyg_uint32 cyg_uitron_dis_dsp_old_priority = 0; + // ------------------------------------------------------------------------ // STARTUP // this routine is outside the uITRON specification; call it from @@ -82,16 +84,18 @@ #endif -#define SET_UP_PTRS( _which_ ) CYG_MACRO_START \ +#define SET_UP_PTRS( _which_ ) CYG_MACRO_START \ for ( i = 0; \ (i < CYGNUM_UITRON_ ## _which_ ## _INITIALLY) && \ (i < CYGNUM_UITRON_ ## _which_ ) ; \ i++ ) { \ CYG_UITRON_PTRS( _which_ )[ i ] = CYG_UITRON_OBJS( _which_ ) + i; \ } \ - for ( /* i as is */; i < CYGNUM_UITRON_ ## _which_ ; i++ ) { \ - CYG_UITRON_PTRS( _which_ )[ i ] = NULL; \ - } \ + if ( (CYGNUM_UITRON_ ## _which_ ## _INITIALLY) \ + < (CYGNUM_UITRON_ ## _which_) ) \ + for ( /* i as is */; i < CYGNUM_UITRON_ ## _which_ ; i++ ) { \ + CYG_UITRON_PTRS( _which_ )[ i ] = NULL; \ + } \ CYG_MACRO_END void cyg_uitron_start( void ) diff --git a/packages/compat/uitron/current/src/uit_objs.cxx b/packages/compat/uitron/current/src/uit_objs.cxx --- a/packages/compat/uitron/current/src/uit_objs.cxx +++ b/packages/compat/uitron/current/src/uit_objs.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// uit_objs.cxx +// uit_objs.cxx // -// uITRON static objects +// uITRON static objects // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON static system objects -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON static system objects +// Description: // //####DESCRIPTIONEND#### // @@ -49,13 +49,15 @@ // we define below, and everything // we need to specify them. +#include // for CYGNUM_HAL_STACK_SIZE_TYPICAL + // ------------------------------------------------------------------------ // Mboxes have no initializer. #ifdef CYGPKG_UITRON_MBOXES #if 0 < CYGNUM_UITRON_MBOXES -Cyg_Mbox CYG_UITRON_DECL( MBOXES ); +Cyg_Mbox CYG_UITRON_DECL( MBOXES ); #ifdef CYGPKG_UITRON_MBOXES_CREATE_DELETE -Cyg_Mbox *CYG_UITRON_DECL_PTRS( MBOXES ); +Cyg_Mbox *CYG_UITRON_DECL_PTRS( MBOXES ); #endif #endif #endif // CYGPKG_UITRON_MBOXES @@ -64,9 +66,9 @@ Cyg_Mbox *CYG_UITRON_DECL_PTRS( MBOXES // Flags have no initializer. #ifdef CYGPKG_UITRON_FLAGS #if 0 < CYGNUM_UITRON_FLAGS -Cyg_Flag CYG_UITRON_DECL( FLAGS ); +Cyg_Flag CYG_UITRON_DECL( FLAGS ); #ifdef CYGPKG_UITRON_FLAGS_CREATE_DELETE -Cyg_Flag *CYG_UITRON_DECL_PTRS( FLAGS ); +Cyg_Flag *CYG_UITRON_DECL_PTRS( FLAGS ); #endif #endif #endif // CYGPKG_UITRON_FLAGS @@ -81,7 +83,7 @@ Cyg_Flag *CYG_UITRON_DECL_PTRS( FLAGS ) #error You must define CYGNUM_UITRON_SEMAS #endif -Cyg_Counting_Semaphore2 CYG_UITRON_DECL( SEMAS ) +Cyg_Counting_Semaphore2 CYG_UITRON_DECL( SEMAS ) #ifdef CYGDAT_UITRON_SEMA_INITIALIZERS // a Macro to ease the construction: @@ -117,32 +119,44 @@ Cyg_Counting_Semaphore2 *CYG_UITRON_DECL #error You must define CYGNUM_UITRON_TASKS #endif -// declare the symbols used in the initializer -CYGDAT_UITRON_TASK_EXTERNS - // a Macro to ease the construction: -// "name", priority, proc, stackbase, stacksize +// "name", priority, proc, stackbase, stacksize #define CYG_UIT_TASK( _name_, _prio_, _func_, _sb_, _ss_ ) \ - Cyg_Thread( \ - (CYG_ADDRWORD)(_prio_), \ - (_func_), \ - (CYG_ADDRWORD)0, \ - _name_, \ - (CYG_ADDRESS)(_sb_), \ + Cyg_Thread( \ + (CYG_ADDRWORD)(_prio_), \ + (_func_), \ + (CYG_ADDRWORD)0, \ + _name_, \ + (CYG_ADDRESS)(_sb_), \ (cyg_ucount32)(_ss_) ) #ifdef CYGPKG_UITRON_TASKS_CREATE_DELETE #define CYG_UIT_TASK_NOEXS( _name_, _sb_, _ss_ ) \ - Cyg_Thread( \ - (CYG_ADDRWORD)(CYG_SCHED_DEFAULT_INFO), \ - (cyg_thread_entry *)(0), \ - (CYG_ADDRWORD)0, \ - _name_, \ - (CYG_ADDRESS)(_sb_), \ + Cyg_Thread( \ + (CYG_ADDRWORD)(CYG_SCHED_DEFAULT_INFO), \ + (cyg_thread_entry *)(0), \ + (CYG_ADDRWORD)0, \ + _name_, \ + (CYG_ADDRESS)(_sb_), \ (cyg_ucount32)(_ss_) ) #endif -Cyg_Thread CYG_UITRON_DECL( TASKS ) = +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +# ifdef CYGNUM_UITRON_STACK_SIZE +# if CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_TYPICAL + +// then override the configured stack size +# undef CYGNUM_UITRON_STACK_SIZE +# define CYGNUM_UITRON_STACK_SIZE CYGNUM_HAL_STACK_SIZE_TYPICAL + +# endif // CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_TYPICAL +# endif // CYGNUM_UITRON_STACK_SIZE +#endif // CYGNUM_HAL_STACK_SIZE_TYPICAL + +// declare the symbols used in the initializer +CYGDAT_UITRON_TASK_EXTERNS + +Cyg_Thread CYG_UITRON_DECL( TASKS ) = { CYGDAT_UITRON_TASK_INITIALIZERS }; @@ -159,7 +173,7 @@ cyg_uitron_task_initial_priorities[ CYG_ #endif #ifdef CYGPKG_UITRON_TASKS_CREATE_DELETE -Cyg_Thread *CYG_UITRON_DECL_PTRS( TASKS ); +Cyg_Thread *CYG_UITRON_DECL_PTRS( TASKS ); #endif // ------------------------------------------------------------------------ @@ -192,7 +206,7 @@ CYGDAT_UITRON_MEMPOOLFIXED_EXTERNS (cyg_uint8 *)(_a_), (cyg_int32)(_s_), (CYG_ADDRWORD) ((~7)&((_s_)/2)) ) #endif -Cyg_Mempool_Fixed CYG_UITRON_DECL( MEMPOOLFIXED ) = +Cyg_Mempool_Fixed CYG_UITRON_DECL( MEMPOOLFIXED ) = { CYGDAT_UITRON_MEMPOOLFIXED_INITIALIZERS }; @@ -202,7 +216,7 @@ Cyg_Mempool_Fixed CYG_UITRON_DECL( MEMPO #endif #ifdef CYGPKG_UITRON_MEMPOOLFIXED_CREATE_DELETE -Cyg_Mempool_Fixed *CYG_UITRON_DECL_PTRS( MEMPOOLFIXED ); +Cyg_Mempool_Fixed *CYG_UITRON_DECL_PTRS( MEMPOOLFIXED ); #endif #endif // do we have fixed memory pools at all? #endif // CYGPKG_UITRON_MEMPOOLFIXED @@ -245,7 +259,7 @@ Cyg_Mempool_Variable CYG_UITRON_DECL( ME #endif #ifdef CYGPKG_UITRON_MEMPOOLVAR_CREATE_DELETE -Cyg_Mempool_Variable *CYG_UITRON_DECL_PTRS( MEMPOOLVAR ); +Cyg_Mempool_Variable *CYG_UITRON_DECL_PTRS( MEMPOOLVAR ); #endif #endif // do we have variable memory pools at all? #endif // CYGPKG_UITRON_MEMPOOLVAR @@ -277,7 +291,7 @@ CYGDAT_UITRON_CYCLIC_EXTERNS #endif // have externs or initializers -Cyg_Timer CYG_UITRON_DECL( CYCLICS ) +Cyg_Timer CYG_UITRON_DECL( CYCLICS ) #ifdef CYGDAT_UITRON_CYCLIC_INITIALIZERS @@ -322,7 +336,7 @@ CYGDAT_UITRON_ALARM_EXTERNS #endif // have externs or initializers -Cyg_Timer CYG_UITRON_DECL( ALARMS ) +Cyg_Timer CYG_UITRON_DECL( ALARMS ) #ifdef CYGDAT_UITRON_ALARM_INITIALIZERS diff --git a/packages/compat/uitron/current/tests/PKGconf.mak b/packages/compat/uitron/current/tests/PKGconf.mak --- a/packages/compat/uitron/current/tests/PKGconf.mak +++ b/packages/compat/uitron/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/compat/uitron/current/tests/test1.c b/packages/compat/uitron/current/tests/test1.c --- a/packages/compat/uitron/current/tests/test1.c +++ b/packages/compat/uitron/current/tests/test1.c @@ -1,8 +1,8 @@ //=========================================================================== // -// test1.c +// test1.c // -// uITRON "C" test program one +// uITRON "C" test program one // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -88,12 +88,12 @@ INT scratch = 0; #ifndef CYGSEM_KERNEL_SCHED_TIMESLICE #define TIMESLICEMSG "Assuming no kernel timeslicing" -#define TSGO() (1) -#define TSRELEASE() CYG_EMPTY_STATEMENT -#define TSSTOP() CYG_EMPTY_STATEMENT -#define TSLOCK() CYG_EMPTY_STATEMENT -#define TSUNLOCK() CYG_EMPTY_STATEMENT -#define ICWAIT( _i_ ) CYG_EMPTY_STATEMENT +#define TSGO() (1) +#define TSRELEASE() CYG_EMPTY_STATEMENT +#define TSSTOP() CYG_EMPTY_STATEMENT +#define TSLOCK() CYG_EMPTY_STATEMENT +#define TSUNLOCK() CYG_EMPTY_STATEMENT +#define ICWAIT( _i_ ) CYG_EMPTY_STATEMENT #else // Now follow some nasty bodges to control the scheduling when basically it @@ -110,26 +110,26 @@ INT scratch = 0; #define TIMESLICEMSG "Assuming kernel timeslicing ENABLED" volatile int ts_interlock = 0; -#define TSGO() (ts_interlock) -#define TSRELEASE() ts_interlock = 1 -#define TSSTOP() ts_interlock = 0 +#define TSGO() (ts_interlock) +#define TSRELEASE() ts_interlock = 1 +#define TSSTOP() ts_interlock = 0 -#define TSLOCK() CYG_MACRO_START \ - ER ercd2 = dis_dsp(); \ - CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" ); \ +#define TSLOCK() CYG_MACRO_START \ + ER ercd2 = dis_dsp(); \ + CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" ); \ CYG_MACRO_END -#define TSUNLOCK() CYG_MACRO_START \ - ER ercd3 = ena_dsp(); \ - CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" ); \ +#define TSUNLOCK() CYG_MACRO_START \ + ER ercd3 = ena_dsp(); \ + CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" ); \ CYG_MACRO_END -#define ICWAIT( _i_ ) CYG_MACRO_START \ - int loops; \ - for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) { \ - ER ercd4 = rot_rdq( 0 ); /* yield */ \ - CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" ); \ - } \ +#define ICWAIT( _i_ ) CYG_MACRO_START \ + int loops; \ + for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) { \ + ER ercd4 = rot_rdq( 0 ); /* yield */ \ + CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" ); \ + } \ CYG_MACRO_END #endif // CYGSEM_KERNEL_SCHED_TIMESLICE @@ -784,10 +784,10 @@ out: #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -797,8 +797,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test2.c b/packages/compat/uitron/current/tests/test2.c --- a/packages/compat/uitron/current/tests/test2.c +++ b/packages/compat/uitron/current/tests/test2.c @@ -1,8 +1,8 @@ //=========================================================================== // -// test2.c +// test2.c // -// uITRON "C" test program two +// uITRON "C" test program two // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -137,6 +137,10 @@ void task1( unsigned int arg ) VP blfptr = (VP)foo; VP blkptr = (VP)foo; + int delay = 10; + if (cyg_test_is_simulator) + delay = 3; + CYG_TEST_INFO( "Task 1 running" ); ercd = get_tid( &scratch ); CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); @@ -146,7 +150,7 @@ void task1( unsigned int arg ) intercom = 1; ercd = sta_tsk( 2, 222 ); CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); // Semaphores; all the illegal argument combinations first @@ -164,9 +168,9 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_ID == ercd, "preq_sem bad ercd !E_ID" ); ercd = preq_sem( 99 ); CYG_TEST_CHECK( E_ID == ercd, "preq_sem bad ercd !E_ID" ); - ercd = twai_sem( -6, 10 ); + ercd = twai_sem( -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_sem bad ercd !E_ID" ); - ercd = twai_sem( 99, 10 ); + ercd = twai_sem( 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_sem bad ercd !E_ID" ); ercd = twai_sem( 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "twai_sem bad ercd !E_PAR" ); @@ -186,7 +190,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = preq_sem( 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "preq_sem bad ercd !E_TMOUT" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem bad ercd !E_TMOUT" ); ercd = twai_sem( 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem(POL) bad ercd !E_TMOUT" ); @@ -195,7 +199,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = wai_sem( 2 ); CYG_TEST_CHECK( E_CTX == ercd, "wai_sem bad ercd !E_CTX" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "twai_sem bad ercd !E_CTX" ); ercd = twai_sem( 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "twai_sem(FEVR) bad ercd !E_CTX" ); @@ -208,7 +212,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = preq_sem( 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "preq_sem bad ercd !E_TMOUT" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem bad ercd !E_TMOUT" ); ercd = twai_sem( 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem(POL) bad ercd !E_TMOUT" ); @@ -249,14 +253,14 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); CYG_TEST_CHECK( 0 == sem_info.wtsk, "sem.wtsk should be 0" ); CYG_TEST_CHECK( 1 == sem_info.semcnt, "semcnt should be 1" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "wai_sem bad ercd" ); ercd = ref_sem( &sem_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); CYG_TEST_CHECK( 0 == sem_info.wtsk, "sem.wtsk should be 0" ); CYG_TEST_CHECK( 0 == sem_info.semcnt, "semcnt should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_sem( &sem_info, 2 ); @@ -273,7 +277,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( 1 == sem_info.semcnt, "semcnt should be 1" ); #endif - ercd = dly_tsk( 10 ); // let task 2 pick up the signal + ercd = dly_tsk( delay ); // let task 2 pick up the signal CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_sem( &sem_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); @@ -320,21 +324,21 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_PAR == ercd, "pol_flg bad ercd !E_PAR" ); ercd = pol_flg( &flagptn, 2, 0, TWF_ANDW ); CYG_TEST_CHECK( E_PAR == ercd, "pol_flg bad ercd !E_PAR" ); - ercd = twai_flg( &flagptn, -6, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, -6, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_flg bad ercd !E_ID" ); - ercd = twai_flg( &flagptn, 99, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 99, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_flg bad ercd !E_ID" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = twai_flg( NULL, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( NULL, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); #endif - ercd = twai_flg( NADR, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( NADR, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); - ercd = twai_flg( &flagptn, 2, 7, 34657, 10 ); + ercd = twai_flg( &flagptn, 2, 7, 34657, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); - ercd = twai_flg( &flagptn, 2, 0, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 0, TWF_ANDW, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); ercd = ref_flg( &flg_info, -6 ); CYG_TEST_CHECK( E_ID == ercd, "ref_flg bad ercd !E_ID" ); @@ -352,7 +356,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = pol_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_TMOUT == ercd, "pol_flg bad ercd !E_TMOUT" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg bad ercd !E_TMOUT" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg(POL) bad ercd !E_TMOUT" ); @@ -361,7 +365,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = wai_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_CTX == ercd, "wai_flg bad ercd !E_CTX" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_CTX == ercd, "twai_flg bad ercd !E_CTX" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "twai_flg(FEVR) bad ercd !E_CTX" ); @@ -374,7 +378,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pol_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_TMOUT == ercd, "pol_flg bad ercd !E_TMOUT" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg bad ercd !E_TMOUT" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg(POL) bad ercd !E_TMOUT" ); @@ -386,7 +390,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == flg_info.wtsk, "flg.wtsk should be non0" ); CYG_TEST_CHECK( 0 == flg_info.flgptn, "flgptn should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_flg( &flg_info, 2 ); @@ -395,7 +399,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == flg_info.flgptn, "flgptn should be 0" ); ercd = set_flg( 2, 0x5555 ); CYG_TEST_CHECK( E_OK == ercd, "sig_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -403,7 +407,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0x5555 == flg_info.flgptn, "flgptn should be 0x5555" ); ercd = clr_flg( 2, 0xF0F0 ); CYG_TEST_CHECK( E_OK == ercd, "clr_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -411,7 +415,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0x5050 == flg_info.flgptn, "flgptn should be 0x5050" ); ercd = set_flg( 2, 0xFFFF ); CYG_TEST_CHECK( E_OK == ercd, "sig_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -452,17 +456,17 @@ void task1( unsigned int arg ) #endif ercd = prcv_msg( NADR, 2 ); CYG_TEST_CHECK( E_PAR == ercd, "prcv_msg bad ercd !E_PAR" ); - ercd = trcv_msg( &rxptr, -6, 10 ); + ercd = trcv_msg( &rxptr, -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "trcv_msg bad ercd !E_ID" ); - ercd = trcv_msg( &rxptr, 99, 10 ); + ercd = trcv_msg( &rxptr, 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "trcv_msg bad ercd !E_ID" ); ercd = trcv_msg( &rxptr, 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "trcv_msg bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = trcv_msg( NULL, 2, 10 ); + ercd = trcv_msg( NULL, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "trcv_msg bad ercd !E_PAR" ); #endif - ercd = trcv_msg( NADR, 2, 10 ); + ercd = trcv_msg( NADR, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "trcv_msg bad ercd !E_PAR" ); ercd = ref_mbx( &mbx_info, -6 ); CYG_TEST_CHECK( E_ID == ercd, "ref_mbx bad ercd !E_ID" ); @@ -480,7 +484,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = prcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "prcv_msg bad ercd !E_TMOUT" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg bad ercd !E_TMOUT" ); ercd = trcv_msg( &rxptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg(POL) bad ercd !E_TMOUT" ); @@ -489,7 +493,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = rcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "rcv_msg bad ercd !E_CTX" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "trcv_msg bad ercd !E_CTX" ); ercd = trcv_msg( &rxptr, 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "trcv_msg(FEVR) bad ercd !E_CTX" ); @@ -502,7 +506,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = prcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "prcv_msg bad ercd !E_TMOUT" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg bad ercd !E_TMOUT" ); ercd = trcv_msg( &rxptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg(POL) bad ercd !E_TMOUT" ); @@ -514,7 +518,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == mbx_info.wtsk, "mbx.wtsk should be 0" ); CYG_TEST_CHECK( NADR == mbx_info.pk_msg, "mbx peek should be NADR" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mbx( &mbx_info, 2 ); @@ -531,7 +535,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( msgptr == mbx_info.pk_msg, "mbx peek should be msgptr" ); #endif - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mbx( &mbx_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mbx bad ercd" ); @@ -591,17 +595,17 @@ void task1( unsigned int arg ) #endif ercd = pget_blf( NADR, 2 ); CYG_TEST_CHECK( E_PAR == ercd, "pget_blf bad ercd !E_PAR" ); - ercd = tget_blf( &blfptr, -6, 10 ); + ercd = tget_blf( &blfptr, -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blf bad ercd !E_ID" ); - ercd = tget_blf( &blfptr, 99, 10 ); + ercd = tget_blf( &blfptr, 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blf bad ercd !E_ID" ); ercd = tget_blf( &blfptr, 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blf bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = tget_blf( NULL, 2, 10 ); + ercd = tget_blf( NULL, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blf bad ercd !E_PAR" ); #endif - ercd = tget_blf( NADR, 2, 10 ); + ercd = tget_blf( NADR, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blf bad ercd !E_PAR" ); ercd = ref_mpf( &mpf_info, -6 ); CYG_TEST_CHECK( E_ID == ercd, "ref_mpf bad ercd !E_ID" ); @@ -621,7 +625,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blf bad ercd" ); ercd = dis_dsp(); CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" ); @@ -630,7 +634,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blf bad ercd !E_CTX" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf bad ercd !E_CTX" ); #endif // we can test bad param error returns ercd = ena_dsp(); @@ -639,7 +643,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); @@ -649,7 +653,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); ercd = pget_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf bad ercd !E_TMOUT" ); ercd = tget_blf( &blfptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf(POL) bad ercd !E_TMOUT" ); @@ -658,7 +662,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blf bad ercd !E_CTX" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf bad ercd !E_CTX" ); ercd = tget_blf( &blfptr, 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf(FEVR) bad ercd !E_CTX" ); @@ -669,7 +673,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pget_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); ercd = tget_blf( &blfptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf(POL) bad ercd !E_TMOUT" ); @@ -681,7 +685,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == mpf_info.wtsk, "mpf.wtsk should be 0" ); CYG_TEST_CHECK( 0 == mpf_info.frbcnt, "mpf.frbcnt should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mpf( &mpf_info, 2 ); @@ -698,7 +702,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( 0 != mpf_info.frbcnt, "mpf.frbcnt should be non0" ); #endif - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mpf( &mpf_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpf bad ercd" ); @@ -743,17 +747,17 @@ void task1( unsigned int arg ) #endif ercd = pget_blk( NADR, 2, 100 ); CYG_TEST_CHECK( E_PAR == ercd, "pget_blk bad ercd !E_PAR" ); - ercd = tget_blk( &blkptr, -6, 100, 10 ); + ercd = tget_blk( &blkptr, -6, 100, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blk bad ercd !E_ID" ); - ercd = tget_blk( &blkptr, 99, 100, 10 ); + ercd = tget_blk( &blkptr, 99, 100, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blk bad ercd !E_ID" ); ercd = tget_blk( &blkptr, 2, 100, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blk bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = tget_blk( NULL, 2, 100, 10 ); + ercd = tget_blk( NULL, 2, 100, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blk bad ercd !E_PAR" ); #endif - ercd = tget_blk( NADR, 2, 100, 10 ); + ercd = tget_blk( NADR, 2, 100, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blk bad ercd !E_PAR" ); ercd = ref_mpl( &mpl_info, -6 ); CYG_TEST_CHECK( E_ID == ercd, "ref_mpl bad ercd !E_ID" ); @@ -773,7 +777,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blk bad ercd" ); ercd = dis_dsp(); CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" ); @@ -782,7 +786,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blk bad ercd !E_CTX" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk bad ercd !E_CTX" ); #endif // we can test bad param error returns ercd = ena_dsp(); @@ -791,7 +795,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); @@ -801,7 +805,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); ercd = pget_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk bad ercd !E_TMOUT" ); ercd = tget_blk( &blkptr, 2, 100, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk(POL) bad ercd !E_TMOUT" ); @@ -810,7 +814,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blk bad ercd !E_CTX" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk bad ercd !E_CTX" ); ercd = tget_blk( &blkptr, 2, 100, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk(FEVR) bad ercd !E_CTX" ); @@ -821,7 +825,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pget_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); ercd = tget_blk( &blkptr, 2, 100, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk(POL) bad ercd !E_TMOUT" ); @@ -834,7 +838,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( mpl_info.maxsz <= mpl_info.frsz, "mpl.maxsz not < mpl.frsz" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mpl( &mpl_info, 2 ); @@ -845,7 +849,7 @@ void task1( unsigned int arg ) ercd = ref_mpl( &mpl_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpl bad ercd" ); CYG_TEST_CHECK( 0 == mpl_info.wtsk, "mpl.wtsk should be 0" ); - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mpl( &mpl_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpl bad ercd" ); @@ -933,12 +937,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -948,8 +952,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test3.c b/packages/compat/uitron/current/tests/test3.c --- a/packages/compat/uitron/current/tests/test3.c +++ b/packages/compat/uitron/current/tests/test3.c @@ -1,8 +1,8 @@ //=========================================================================== // -// test3.c +// test3.c // -// uITRON "C" test program three +// uITRON "C" test program three // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -222,12 +222,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -237,8 +237,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test4.c b/packages/compat/uitron/current/tests/test4.c --- a/packages/compat/uitron/current/tests/test4.c +++ b/packages/compat/uitron/current/tests/test4.c @@ -1,8 +1,8 @@ //=========================================================================== // -// test4.c +// test4.c // -// uITRON "C" test program four +// uITRON "C" test program four // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-12 -// Purpose: uITRON API testing -// Description: +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-12 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -117,9 +117,18 @@ void task1( unsigned int arg ) T_RCYC rcyc; T_RALM ralm; + unsigned int tm; + static char foo[] = "Test message"; VP info = (VP)foo; + // Increase times when running on HW since overhead of GDB packet + // acknowledgements may cause tests of timing to fail. + if (cyg_test_is_simulator) + tm = 1; + else + tm = 4; + CYG_TEST_INFO( "Task 1 running" ); ercd = get_tid( &scratch ); CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); @@ -233,23 +242,23 @@ void task1( unsigned int arg ) dcyc.cycatr = TA_HLNG; dcyc.cychdr = (FP)&hand1; dcyc.cycact = TCY_ON; - dcyc.cyctim = 50; + dcyc.cyctim = 50*tm; ercd = def_cyc(3, &dcyc); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); ercd = act_cyc(3, TCY_OFF); CYG_TEST_CHECK( E_OK == ercd, "act_cyc bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_OFF == rcyc.cycact, "rcyc.cycact should be TCY_OFF" ); ercd = act_cyc(3, TCY_ON); CYG_TEST_CHECK( E_OK == ercd, "act_cyc bad ercd" ); @@ -260,31 +269,31 @@ void task1( unsigned int arg ) dalm.almatr = TA_HLNG; dalm.almhdr = (FP)&hand2; dalm.tmmode = TTM_REL; - dalm.almtim = 120; + dalm.almtim = 120*tm; ercd = def_alm(3, &dalm); CYG_TEST_CHECK( E_OK == ercd, "def_alm bad ercd" ); ercd = ref_alm(&ralm, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_alm bad ercd" ); CYG_TEST_CHECK( info == ralm.exinf, "ralm.exinf should be info" ); - CYG_TEST_CHECK( 115 < ralm.lfttim, "ralm.lfttim too small" ); - CYG_TEST_CHECK( ralm.lfttim <= 120, "ralm.lfttim too big" ); + CYG_TEST_CHECK( 115*tm < ralm.lfttim, "ralm.lfttim too small" ); + CYG_TEST_CHECK( ralm.lfttim <= 120*tm, "ralm.lfttim too big" ); // Expect handlers to be called at approximate times - // time intercount - // 50 hand1 0 - // 100 hand1 1 - // 120 hand2 2 - // 150 hand1 3 + // time intercount + // tm*50 hand1 0 + // tm*100 hand1 1 + // tm*120 hand2 2 + // tm*150 hand1 3 - ercd = dly_tsk(160); + ercd = dly_tsk(160*tm); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); CYG_TEST_CHECK( 4 == intercount, "handlers not both called" ); ercd = act_cyc(3, TCY_OFF); CYG_TEST_CHECK( E_OK == ercd, "act_cyc(off) bad ercd" ); - ercd = dly_tsk(60); // enough for at least one tick + ercd = dly_tsk(60*tm); // enough for at least one tick CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); CYG_TEST_CHECK( 4 == intercount, "cyclic not disabled" ); @@ -294,8 +303,8 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 25 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 35, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 25*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 35*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // now resynchronize with right now: @@ -304,18 +313,18 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // wait a bit and check that time marches on, or even down - ercd = dly_tsk(10); + ercd = dly_tsk(10*tm); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 35 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 45, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 35*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 45*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // now turn it off and re-synch with right now: @@ -324,8 +333,8 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_OFF == rcyc.cycact, "rcyc.cycact should be TCY_OFF" ); ercd = act_cyc(3, TCY_OFF); @@ -361,12 +370,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -376,8 +385,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test5.c b/packages/compat/uitron/current/tests/test5.c --- a/packages/compat/uitron/current/tests/test5.c +++ b/packages/compat/uitron/current/tests/test5.c @@ -1,8 +1,8 @@ //=========================================================================== // -// test5.c +// test5.c // -// uITRON "C" test program five +// uITRON "C" test program five // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-12 -// Purpose: uITRON API testing -// Description: +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-12 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -320,12 +320,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -335,8 +335,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test6.c b/packages/compat/uitron/current/tests/test6.c --- a/packages/compat/uitron/current/tests/test6.c +++ b/packages/compat/uitron/current/tests/test6.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -464,8 +464,7 @@ void task1( unsigned int arg ) // all done if ( 0 == tests ) { - CYG_TEST_PASS( "N/A: no objects have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "No objects have create/delete enabled" ); } else { CYG_TEST_EXIT( "All done" ); @@ -582,8 +581,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test7.c b/packages/compat/uitron/current/tests/test7.c --- a/packages/compat/uitron/current/tests/test7.c +++ b/packages/compat/uitron/current/tests/test7.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -287,7 +287,11 @@ do_resume( void ) #define T2_WAIT (5) #define T1_MALLOC (110) +#ifdef CYGSEM_KERNEL_MEMORY_COALESCE #define T2_MALLOC (100) +#else +#define T2_MALLOC T1_MALLOC +#endif VP vptmp; VP vp = NULL; @@ -991,8 +995,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test8.c b/packages/compat/uitron/current/tests/test8.c --- a/packages/compat/uitron/current/tests/test8.c +++ b/packages/compat/uitron/current/tests/test8.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -295,8 +295,7 @@ void task1( unsigned int arg ) // all done CYG_TEST_EXIT( "All done" ); #else // ! CYGPKG_UITRON_TASKS_CREATE_DELETE - CYG_TEST_PASS( "N/A: tasks do not have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "Tasks do not have create/delete enabled" ); #endif // ! CYGPKG_UITRON_TASKS_CREATE_DELETE ext_tsk(); } @@ -376,8 +375,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/test9.c b/packages/compat/uitron/current/tests/test9.c --- a/packages/compat/uitron/current/tests/test9.c +++ b/packages/compat/uitron/current/tests/test9.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -373,8 +373,7 @@ void task1( unsigned int arg ) // all done if ( 0 == tests ) { - CYG_TEST_PASS( "N/A: no objects have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "No objects have create/delete enabled" ); } else { CYG_TEST_EXIT( "All done" ); @@ -472,8 +471,7 @@ void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx2.cxx b/packages/compat/uitron/current/tests/testcx2.cxx --- a/packages/compat/uitron/current/tests/testcx2.cxx +++ b/packages/compat/uitron/current/tests/testcx2.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// testcx2.cxx +// testcx2.cxx // -// uITRON "C++" test program two +// uITRON "C++" test program two // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -144,6 +144,10 @@ void task1( unsigned int arg ) VP blfptr = (VP)foo; VP blkptr = (VP)foo; + int delay = 10; + if (cyg_test_is_simulator) + delay = 3; + CYG_TEST_INFO( "Task 1 running" ); ercd = get_tid( &scratch ); CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); @@ -153,7 +157,7 @@ void task1( unsigned int arg ) intercom = 1; ercd = sta_tsk( 2, 222 ); CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); // Semaphores; all the illegal argument combinations first @@ -171,9 +175,9 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_ID == ercd, "preq_sem bad ercd !E_ID" ); ercd = preq_sem( 99 ); CYG_TEST_CHECK( E_ID == ercd, "preq_sem bad ercd !E_ID" ); - ercd = twai_sem( -6, 10 ); + ercd = twai_sem( -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_sem bad ercd !E_ID" ); - ercd = twai_sem( 99, 10 ); + ercd = twai_sem( 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_sem bad ercd !E_ID" ); ercd = twai_sem( 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "twai_sem bad ercd !E_PAR" ); @@ -191,7 +195,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = preq_sem( 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "preq_sem bad ercd !E_TMOUT" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem bad ercd !E_TMOUT" ); ercd = twai_sem( 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem(POL) bad ercd !E_TMOUT" ); @@ -200,7 +204,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = wai_sem( 2 ); CYG_TEST_CHECK( E_CTX == ercd, "wai_sem bad ercd !E_CTX" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "twai_sem bad ercd !E_CTX" ); ercd = twai_sem( 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "twai_sem(FEVR) bad ercd !E_CTX" ); @@ -213,7 +217,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = preq_sem( 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "preq_sem bad ercd !E_TMOUT" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem bad ercd !E_TMOUT" ); ercd = twai_sem( 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_sem(POL) bad ercd !E_TMOUT" ); @@ -254,14 +258,14 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); CYG_TEST_CHECK( 0 == sem_info.wtsk, "sem.wtsk should be 0" ); CYG_TEST_CHECK( 1 == sem_info.semcnt, "semcnt should be 1" ); - ercd = twai_sem( 2, 10 ); + ercd = twai_sem( 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "wai_sem bad ercd" ); ercd = ref_sem( &sem_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); CYG_TEST_CHECK( 0 == sem_info.wtsk, "sem.wtsk should be 0" ); CYG_TEST_CHECK( 0 == sem_info.semcnt, "semcnt should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_sem( &sem_info, 2 ); @@ -278,7 +282,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( 1 == sem_info.semcnt, "semcnt should be 1" ); #endif - ercd = dly_tsk( 10 ); // let task 2 pick up the signal + ercd = dly_tsk( delay ); // let task 2 pick up the signal CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_sem( &sem_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_sem bad ercd" ); @@ -321,19 +325,19 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_PAR == ercd, "pol_flg bad ercd !E_PAR" ); ercd = pol_flg( &flagptn, 2, 0, TWF_ANDW ); CYG_TEST_CHECK( E_PAR == ercd, "pol_flg bad ercd !E_PAR" ); - ercd = twai_flg( &flagptn, -6, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, -6, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_flg bad ercd !E_ID" ); - ercd = twai_flg( &flagptn, 99, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 99, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_ID == ercd, "twai_flg bad ercd !E_ID" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = twai_flg( NULL, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( NULL, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); #endif - ercd = twai_flg( &flagptn, 2, 7, 34657, 10 ); + ercd = twai_flg( &flagptn, 2, 7, 34657, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); - ercd = twai_flg( &flagptn, 2, 0, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 0, TWF_ANDW, delay ); CYG_TEST_CHECK( E_PAR == ercd, "twai_flg bad ercd !E_PAR" ); ercd = ref_flg( &flg_info, -6 ); CYG_TEST_CHECK( E_ID == ercd, "ref_flg bad ercd !E_ID" ); @@ -349,7 +353,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = pol_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_TMOUT == ercd, "pol_flg bad ercd !E_TMOUT" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg bad ercd !E_TMOUT" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg(POL) bad ercd !E_TMOUT" ); @@ -358,7 +362,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = wai_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_CTX == ercd, "wai_flg bad ercd !E_CTX" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_CTX == ercd, "twai_flg bad ercd !E_CTX" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "twai_flg(FEVR) bad ercd !E_CTX" ); @@ -371,7 +375,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pol_flg( &flagptn, 2, 7, TWF_ANDW ); CYG_TEST_CHECK( E_TMOUT == ercd, "pol_flg bad ercd !E_TMOUT" ); - ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, 10 ); + ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg bad ercd !E_TMOUT" ); ercd = twai_flg( &flagptn, 2, 7, TWF_ANDW, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "twai_flg(POL) bad ercd !E_TMOUT" ); @@ -383,7 +387,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == flg_info.wtsk, "flg.wtsk should be non0" ); CYG_TEST_CHECK( 0 == flg_info.flgptn, "flgptn should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_flg( &flg_info, 2 ); @@ -392,7 +396,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == flg_info.flgptn, "flgptn should be 0" ); ercd = set_flg( 2, 0x5555 ); CYG_TEST_CHECK( E_OK == ercd, "sig_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -400,7 +404,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0x5555 == flg_info.flgptn, "flgptn should be 0x5555" ); ercd = clr_flg( 2, 0xF0F0 ); CYG_TEST_CHECK( E_OK == ercd, "clr_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -408,7 +412,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0x5050 == flg_info.flgptn, "flgptn should be 0x5050" ); ercd = set_flg( 2, 0xFFFF ); CYG_TEST_CHECK( E_OK == ercd, "sig_flg bad ercd" ); - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_flg( &flg_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_flg bad ercd" ); @@ -443,14 +447,14 @@ void task1( unsigned int arg ) ercd = prcv_msg( NULL, 2 ); CYG_TEST_CHECK( E_PAR == ercd, "prcv_msg bad ercd !E_PAR" ); #endif - ercd = trcv_msg( &rxptr, -6, 10 ); + ercd = trcv_msg( &rxptr, -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "trcv_msg bad ercd !E_ID" ); - ercd = trcv_msg( &rxptr, 99, 10 ); + ercd = trcv_msg( &rxptr, 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "trcv_msg bad ercd !E_ID" ); ercd = trcv_msg( &rxptr, 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "trcv_msg bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = trcv_msg( NULL, 2, 10 ); + ercd = trcv_msg( NULL, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "trcv_msg bad ercd !E_PAR" ); #endif ercd = ref_mbx( &mbx_info, -6 ); @@ -467,7 +471,7 @@ void task1( unsigned int arg ) // check the waitable functions versus dispatch disable ercd = prcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "prcv_msg bad ercd !E_TMOUT" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg bad ercd !E_TMOUT" ); ercd = trcv_msg( &rxptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg(POL) bad ercd !E_TMOUT" ); @@ -476,7 +480,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = rcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "rcv_msg bad ercd !E_CTX" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "trcv_msg bad ercd !E_CTX" ); ercd = trcv_msg( &rxptr, 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "trcv_msg(FEVR) bad ercd !E_CTX" ); @@ -489,7 +493,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = prcv_msg( &rxptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "prcv_msg bad ercd !E_TMOUT" ); - ercd = trcv_msg( &rxptr, 2, 10 ); + ercd = trcv_msg( &rxptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg bad ercd !E_TMOUT" ); ercd = trcv_msg( &rxptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "trcv_msg(POL) bad ercd !E_TMOUT" ); @@ -501,7 +505,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == mbx_info.wtsk, "mbx.wtsk should be 0" ); CYG_TEST_CHECK( NADR == mbx_info.pk_msg, "mbx peek should be NADR" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mbx( &mbx_info, 2 ); @@ -518,7 +522,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( msgptr == mbx_info.pk_msg, "mbx peek should be msgptr" ); #endif - ercd = dly_tsk( 10 ); + ercd = dly_tsk( delay ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mbx( &mbx_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mbx bad ercd" ); @@ -572,14 +576,14 @@ void task1( unsigned int arg ) ercd = pget_blf( NULL, 2 ); CYG_TEST_CHECK( E_PAR == ercd, "pget_blf bad ercd !E_PAR" ); #endif - ercd = tget_blf( &blfptr, -6, 10 ); + ercd = tget_blf( &blfptr, -6, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blf bad ercd !E_ID" ); - ercd = tget_blf( &blfptr, 99, 10 ); + ercd = tget_blf( &blfptr, 99, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blf bad ercd !E_ID" ); ercd = tget_blf( &blfptr, 2, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blf bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = tget_blf( NULL, 2, 10 ); + ercd = tget_blf( NULL, 2, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blf bad ercd !E_PAR" ); #endif ercd = ref_mpf( &mpf_info, -6 ); @@ -598,7 +602,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blf bad ercd" ); ercd = dis_dsp(); CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" ); @@ -607,7 +611,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blf bad ercd !E_CTX" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf bad ercd !E_CTX" ); #endif // we can test bad param error returns ercd = ena_dsp(); @@ -616,7 +620,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blf bad ercd" ); ercd = rel_blf( 2, blfptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blf bad ercd" ); @@ -626,7 +630,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); ercd = pget_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf bad ercd !E_TMOUT" ); ercd = tget_blf( &blfptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf(POL) bad ercd !E_TMOUT" ); @@ -635,7 +639,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blf bad ercd !E_CTX" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf bad ercd !E_CTX" ); ercd = tget_blf( &blfptr, 2, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blf(FEVR) bad ercd !E_CTX" ); @@ -646,7 +650,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pget_blf( &blfptr, 2 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); - ercd = tget_blf( &blfptr, 2, 10 ); + ercd = tget_blf( &blfptr, 2, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blf bad ercd !E_TMOUT" ); ercd = tget_blf( &blfptr, 2, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blf(POL) bad ercd !E_TMOUT" ); @@ -658,7 +662,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( 0 == mpf_info.wtsk, "mpf.wtsk should be 0" ); CYG_TEST_CHECK( 0 == mpf_info.frbcnt, "mpf.frbcnt should be 0" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mpf( &mpf_info, 2 ); @@ -675,7 +679,7 @@ void task1( unsigned int arg ) #else // old, non-uITRON semantics CYG_TEST_CHECK( 0 != mpf_info.frbcnt, "mpf.frbcnt should be non0" ); #endif - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mpf( &mpf_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpf bad ercd" ); @@ -714,14 +718,14 @@ void task1( unsigned int arg ) ercd = pget_blk( NULL, 2, 100 ); CYG_TEST_CHECK( E_PAR == ercd, "pget_blk bad ercd !E_PAR" ); #endif - ercd = tget_blk( &blkptr, -6, 100, 10 ); + ercd = tget_blk( &blkptr, -6, 100, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blk bad ercd !E_ID" ); - ercd = tget_blk( &blkptr, 99, 100, 10 ); + ercd = tget_blk( &blkptr, 99, 100, delay ); CYG_TEST_CHECK( E_ID == ercd, "tget_blk bad ercd !E_ID" ); ercd = tget_blk( &blkptr, 2, 100, -999 ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blk bad ercd !E_PAR" ); #ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR - ercd = tget_blk( NULL, 2, 100, 10 ); + ercd = tget_blk( NULL, 2, 100, delay ); CYG_TEST_CHECK( E_PAR == ercd, "tget_blk bad ercd !E_PAR" ); #endif ercd = ref_mpl( &mpl_info, -6 ); @@ -740,7 +744,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blk bad ercd" ); ercd = dis_dsp(); CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" ); @@ -749,7 +753,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blk bad ercd !E_CTX" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk bad ercd !E_CTX" ); #endif // we can test bad param error returns ercd = ena_dsp(); @@ -758,7 +762,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "pget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_OK == ercd, "tget_blk bad ercd" ); ercd = rel_blk( 2, blkptr ); CYG_TEST_CHECK( E_OK == ercd, "rel_blk bad ercd" ); @@ -768,7 +772,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); ercd = pget_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk bad ercd !E_TMOUT" ); ercd = tget_blk( &blkptr, 2, 100, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk(POL) bad ercd !E_TMOUT" ); @@ -777,7 +781,7 @@ void task1( unsigned int arg ) #ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS ercd = get_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_CTX == ercd, "get_blk bad ercd !E_CTX" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk bad ercd !E_CTX" ); ercd = tget_blk( &blkptr, 2, 100, TMO_FEVR ); CYG_TEST_CHECK( E_CTX == ercd, "tget_blk(FEVR) bad ercd !E_CTX" ); @@ -788,7 +792,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" ); ercd = pget_blk( &blkptr, 2, 100 ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); - ercd = tget_blk( &blkptr, 2, 100, 10 ); + ercd = tget_blk( &blkptr, 2, 100, delay ); CYG_TEST_CHECK( E_TMOUT == ercd, "pget_blk bad ercd !E_TMOUT" ); ercd = tget_blk( &blkptr, 2, 100, TMO_POL ); CYG_TEST_CHECK( E_TMOUT == ercd, "tget_blk(POL) bad ercd !E_TMOUT" ); @@ -801,7 +805,7 @@ void task1( unsigned int arg ) CYG_TEST_CHECK( mpl_info.maxsz <= mpl_info.frsz, "mpl.maxsz not < mpl.frsz" ); intercom = 0; - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); intercom = 1; ercd = ref_mpl( &mpl_info, 2 ); @@ -812,7 +816,7 @@ void task1( unsigned int arg ) ercd = ref_mpl( &mpl_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpl bad ercd" ); CYG_TEST_CHECK( 0 == mpl_info.wtsk, "mpl.wtsk should be 0" ); - ercd = dly_tsk( 10 ); // let task 2 start waiting + ercd = dly_tsk( delay ); // let task 2 start waiting CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_mpl( &mpl_info, 2 ); CYG_TEST_CHECK( E_OK == ercd, "ref_mpl bad ercd" ); @@ -900,12 +904,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK " #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -915,8 +919,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx3.cxx b/packages/compat/uitron/current/tests/testcx3.cxx --- a/packages/compat/uitron/current/tests/testcx3.cxx +++ b/packages/compat/uitron/current/tests/testcx3.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// testcx3.cxx +// testcx3.cxx // -// uITRON "C++" test program three +// uITRON "C++" test program three // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -229,12 +229,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -244,8 +244,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx4.cxx b/packages/compat/uitron/current/tests/testcx4.cxx --- a/packages/compat/uitron/current/tests/testcx4.cxx +++ b/packages/compat/uitron/current/tests/testcx4.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// testcx4.cxx +// testcx4.cxx // -// uITRON "C++" test program four +// uITRON "C++" test program four // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-12 -// Purpose: uITRON API testing -// Description: +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-12 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -124,9 +124,18 @@ void task1( unsigned int arg ) T_RCYC rcyc; T_RALM ralm; + unsigned int tm; + static char foo[] = "Test message"; VP info = (VP)foo; + // Increase times when running on HW since overhead of GDB packet + // acknowledgements may cause tests of timing to fail. + if (cyg_test_is_simulator) + tm = 1; + else + tm = 4; + CYG_TEST_INFO( "Task 1 running" ); ercd = get_tid( &scratch ); CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); @@ -236,23 +245,23 @@ void task1( unsigned int arg ) dcyc.cycatr = TA_HLNG; dcyc.cychdr = (FP)&hand1; dcyc.cycact = TCY_ON; - dcyc.cyctim = 50; + dcyc.cyctim = 50*tm; ercd = def_cyc(3, &dcyc); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); ercd = act_cyc(3, TCY_OFF); CYG_TEST_CHECK( E_OK == ercd, "act_cyc bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_OFF == rcyc.cycact, "rcyc.cycact should be TCY_OFF" ); ercd = act_cyc(3, TCY_ON); CYG_TEST_CHECK( E_OK == ercd, "act_cyc bad ercd" ); @@ -263,31 +272,31 @@ void task1( unsigned int arg ) dalm.almatr = TA_HLNG; dalm.almhdr = (FP)&hand2; dalm.tmmode = TTM_REL; - dalm.almtim = 120; + dalm.almtim = 120*tm; ercd = def_alm(3, &dalm); CYG_TEST_CHECK( E_OK == ercd, "def_alm bad ercd" ); ercd = ref_alm(&ralm, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_alm bad ercd" ); CYG_TEST_CHECK( info == ralm.exinf, "ralm.exinf should be info" ); - CYG_TEST_CHECK( 115 < ralm.lfttim, "ralm.lfttim too small" ); - CYG_TEST_CHECK( ralm.lfttim <= 120, "ralm.lfttim too big" ); + CYG_TEST_CHECK( 115*tm < ralm.lfttim, "ralm.lfttim too small" ); + CYG_TEST_CHECK( ralm.lfttim <= 120*tm, "ralm.lfttim too big" ); // Expect handlers to be called at approximate times - // time intercount - // 50 hand1 0 - // 100 hand1 1 - // 120 hand2 2 - // 150 hand1 3 + // time intercount + // tm*50 hand1 0 + // tm*100 hand1 1 + // tm*120 hand2 2 + // tm*150 hand1 3 - ercd = dly_tsk(160); + ercd = dly_tsk(160*tm); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); CYG_TEST_CHECK( 4 == intercount, "handlers not both called" ); ercd = act_cyc(3, TCY_OFF); CYG_TEST_CHECK( E_OK == ercd, "act_cyc(off) bad ercd" ); - ercd = dly_tsk(60); // enough for at least one tick + ercd = dly_tsk(60*tm); // enough for at least one tick CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); CYG_TEST_CHECK( 4 == intercount, "cyclic not disabled" ); @@ -297,8 +306,8 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 25 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 35, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 25*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 35*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // now resynchronize with right now: @@ -307,18 +316,18 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // wait a bit and check that time marches on, or even down - ercd = dly_tsk(10); + ercd = dly_tsk(10*tm); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 35 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 45, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 35*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 45*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_ON == rcyc.cycact, "rcyc.cycact should be TCY_ON" ); // now turn it off and re-synch with right now: @@ -327,8 +336,8 @@ void task1( unsigned int arg ) ercd = ref_cyc(&rcyc, 3); CYG_TEST_CHECK( E_OK == ercd, "ref_cyc bad ercd" ); CYG_TEST_CHECK( info == rcyc.exinf, "rcyc.exinf should be info" ); - CYG_TEST_CHECK( 45 < rcyc.lfttim, "rcyc.lfttim too small" ); - CYG_TEST_CHECK( rcyc.lfttim <= 50, "rcyc.lfttim too big" ); + CYG_TEST_CHECK( 45*tm < rcyc.lfttim, "rcyc.lfttim too small" ); + CYG_TEST_CHECK( rcyc.lfttim <= 50*tm, "rcyc.lfttim too big" ); CYG_TEST_CHECK( TCY_OFF == rcyc.cycact, "rcyc.cycact should be TCY_OFF" ); ercd = act_cyc(3, TCY_OFF); @@ -364,12 +373,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -379,8 +388,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx5.cxx b/packages/compat/uitron/current/tests/testcx5.cxx --- a/packages/compat/uitron/current/tests/testcx5.cxx +++ b/packages/compat/uitron/current/tests/testcx5.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// testcx5.cxx +// testcx5.cxx // -// uITRON "C++" test program five +// uITRON "C++" test program five // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-12 -// Purpose: uITRON API testing -// Description: +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-12 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -330,12 +330,12 @@ void task4( unsigned int arg ) #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -345,8 +345,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx6.cxx b/packages/compat/uitron/current/tests/testcx6.cxx --- a/packages/compat/uitron/current/tests/testcx6.cxx +++ b/packages/compat/uitron/current/tests/testcx6.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -465,8 +465,7 @@ void task1( unsigned int arg ) // all done if ( 0 == tests ) { - CYG_TEST_PASS( "N/A: no objects have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "No objects have create/delete enabled" ); } else { CYG_TEST_EXIT( "All done" ); @@ -583,8 +582,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx7.cxx b/packages/compat/uitron/current/tests/testcx7.cxx --- a/packages/compat/uitron/current/tests/testcx7.cxx +++ b/packages/compat/uitron/current/tests/testcx7.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -298,7 +298,11 @@ do_resume( void ) #define T2_WAIT (5) #define T1_MALLOC (110) +#ifdef CYGSEM_KERNEL_MEMORY_COALESCE #define T2_MALLOC (100) +#else +#define T2_MALLOC T1_MALLOC +#endif VP vptmp; VP vp = NULL; @@ -642,6 +646,55 @@ do_wait( WAITOP wait, WAITTYPE type ) return E_SYS; } +void +check_waitstate( WAITOP wait, int waiting ) +{ + ER ercd; + int waity = 0; + switch ( wait ) { + case SLEEP: + case DELAY: + return; // do nothing for these + case SEMGET: { + T_RSEM rsem; + ercd = ref_sem( &rsem, 1 ); + waity = rsem.wtsk; + break; + } + case FLAGWAIT: { + T_RFLG rflg; + ercd = ref_flg( &rflg, 1 ); + waity = rflg.wtsk; + break; + } + case MSGGET: { + T_RMBX rmbx; + ercd = ref_mbx( &rmbx, 1 ); + waity = rmbx.wtsk; + break; + } + case MEMFIXEDGET: { + T_RMPF rmpf; + ercd = ref_mpf( &rmpf, 1 ); + waity = rmpf.wtsk; + break; + } + case MEMVARGET: { + T_RMPL rmpl; + ercd = ref_mpl( &rmpl, 1 ); + waity = rmpl.wtsk; + break; + } + default: + CYG_TEST_FAIL( "bad switch" ); + break; + } + if ( waiting ) + CYG_TEST_CHECK( waity, "Object has no task waiting!" ); + else + CYG_TEST_CHECK( !waity, "Object had a task waiting!" ); +} + // ======================================================================== void task1( unsigned int arg ) { @@ -744,9 +797,11 @@ void task1( unsigned int arg ) // it should now have run to completion break; case TIMEOUT: + check_waitstate( wait, 1 ); // wait for the timeout to occur ercd = dly_tsk( T1_WAIT ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); + check_waitstate( wait, 0 ); // it should now have run to completion break; case RELEASE: @@ -776,11 +831,14 @@ void task1( unsigned int arg ) // it should now have run to completion break; case SUSPEND_TIMEOUT_RESUME: + check_waitstate( wait, 1 ); // suspend the task do_suspend(); + check_waitstate( wait, 1 ); // wait for the timeout to occur ercd = dly_tsk( T1_WAIT ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); + check_waitstate( wait, 0 ); // resume the task do_resume(); // it should now have run to completion @@ -823,11 +881,14 @@ void task1( unsigned int arg ) // it should now have terminated without running break; case SUSPEND_TIMEOUT_KILL: + check_waitstate( wait, 1 ); // suspend the task do_suspend(); + check_waitstate( wait, 1 ); // wait for the timeout to occur ercd = dly_tsk( T1_WAIT ); CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" ); + check_waitstate( wait, 0 ); // kill the task ercd = ter_tsk( 2 ); CYG_TEST_CHECK( E_OK == ercd, "ter_tsk bad ercd" ); @@ -1002,8 +1063,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx8.cxx b/packages/compat/uitron/current/tests/testcx8.cxx --- a/packages/compat/uitron/current/tests/testcx8.cxx +++ b/packages/compat/uitron/current/tests/testcx8.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -297,8 +297,7 @@ void task1( unsigned int arg ) // all done CYG_TEST_EXIT( "All done" ); #else // ! CYGPKG_UITRON_TASKS_CREATE_DELETE - CYG_TEST_PASS( "N/A: tasks do not have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "Tasks do not have create/delete enabled" ); #endif // ! CYGPKG_UITRON_TASKS_CREATE_DELETE ext_tsk(); } @@ -378,8 +377,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcx9.cxx b/packages/compat/uitron/current/tests/testcx9.cxx --- a/packages/compat/uitron/current/tests/testcx9.cxx +++ b/packages/compat/uitron/current/tests/testcx9.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -376,8 +376,7 @@ void task1( unsigned int arg ) // all done if ( 0 == tests ) { - CYG_TEST_PASS( "N/A: no objects have create/delete enabled" ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( "No objects have create/delete enabled" ); } else { CYG_TEST_EXIT( "All done" ); @@ -475,8 +474,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/compat/uitron/current/tests/testcxx.cxx b/packages/compat/uitron/current/tests/testcxx.cxx --- a/packages/compat/uitron/current/tests/testcxx.cxx +++ b/packages/compat/uitron/current/tests/testcxx.cxx @@ -1,8 +1,8 @@ //=========================================================================== // -// testcxx.cxx +// testcxx.cxx // -// uITRON "C++" test program +// uITRON "C++" test program // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-13 -// Purpose: uITRON API testing -// Description: +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-13 +// Purpose: uITRON API testing +// Description: // //####DESCRIPTIONEND#### // @@ -96,12 +96,12 @@ extern "C" { #ifndef CYGSEM_KERNEL_SCHED_TIMESLICE #define TIMESLICEMSG "Assuming no kernel timeslicing" -#define TSGO() (1) -#define TSRELEASE() CYG_EMPTY_STATEMENT -#define TSSTOP() CYG_EMPTY_STATEMENT -#define TSLOCK() CYG_EMPTY_STATEMENT -#define TSUNLOCK() CYG_EMPTY_STATEMENT -#define ICWAIT( _i_ ) CYG_EMPTY_STATEMENT +#define TSGO() (1) +#define TSRELEASE() CYG_EMPTY_STATEMENT +#define TSSTOP() CYG_EMPTY_STATEMENT +#define TSLOCK() CYG_EMPTY_STATEMENT +#define TSUNLOCK() CYG_EMPTY_STATEMENT +#define ICWAIT( _i_ ) CYG_EMPTY_STATEMENT #else // Now follow some nasty bodges to control the scheduling when basically it @@ -118,26 +118,26 @@ extern "C" { #define TIMESLICEMSG "Assuming kernel timeslicing ENABLED" volatile int ts_interlock = 0; -#define TSGO() (ts_interlock) -#define TSRELEASE() ts_interlock = 1 -#define TSSTOP() ts_interlock = 0 +#define TSGO() (ts_interlock) +#define TSRELEASE() ts_interlock = 1 +#define TSSTOP() ts_interlock = 0 -#define TSLOCK() CYG_MACRO_START \ - ER ercd2 = dis_dsp(); \ - CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" ); \ +#define TSLOCK() CYG_MACRO_START \ + ER ercd2 = dis_dsp(); \ + CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" ); \ CYG_MACRO_END -#define TSUNLOCK() CYG_MACRO_START \ - ER ercd3 = ena_dsp(); \ - CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" ); \ +#define TSUNLOCK() CYG_MACRO_START \ + ER ercd3 = ena_dsp(); \ + CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" ); \ CYG_MACRO_END -#define ICWAIT( _i_ ) CYG_MACRO_START \ - int loops; \ - for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) { \ - ER ercd4 = rot_rdq( 0 ); /* yield */ \ - CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" ); \ - } \ +#define ICWAIT( _i_ ) CYG_MACRO_START \ + int loops; \ + for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) { \ + ER ercd4 = rot_rdq( 0 ); /* yield */ \ + CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" ); \ + } \ CYG_MACRO_END #endif // CYGSEM_KERNEL_SCHED_TIMESLICE @@ -784,12 +784,12 @@ out: #else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it #define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK" #endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it -#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it #define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER" -#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it -#else // ! CYGIMP_THREAD_PRIORITY - can't test without it +#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it +#else // ! CYGIMP_THREAD_PRIORITY - can't test without it #define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE" -#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it +#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it #else // ! CYGPKG_UITRON #define N_A_MSG "uITRON Compatibility layer disabled" #endif // CYGPKG_UITRON @@ -799,8 +799,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS( "N/A: " N_A_MSG ); - CYG_TEST_EXIT( "N/A" ); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG defined ie. we are N/A. diff --git a/packages/devs/common/current/ChangeLog b/packages/devs/common/current/ChangeLog deleted file mode 100644 --- a/packages/devs/common/current/ChangeLog +++ /dev/null @@ -1,172 +0,0 @@ -Mon Oct 19 18:54:22 1998 Jonathan Larmour - - * include/pkgconf/devs.h: - Don't cause an error if the kernel is disabled. Instead simply - leave out most of the defines beneath - - * include/iorb.h: - Remove unnecessary include of , and - replace with include of - -1998-10-19 Mark Galassi - - * include/pkgconf/devs.h: updated the doc URL - -Sun Sep 27 09:50:57 1998 Jesper Skov - PR 17506 - - * src/table.cxx: Corrected ASSERT statements on set_baud_rate. - Cleaned up a few other functions which checked the return value of - the call and only did ASSERT if the return value was wrong. - -Thu Sep 17 11:32:02 1998 Jesper Skov - - * include/pkgconf/devs.h: Require CYGPKG_KERNEL in CDL. Protect - kernel.h inclusion by CYGPKG_KERNEL. - Declare CYG_DEVICE_SERIAL_RS232_MN10300_2_DECLARE if GDB_DEVICE is - not configured. - Don't include GDB_DEVICE if _RS232_MN10300_2 is not defined. - - * include/pkgconf/devices.h: Protect .hxx inclusion with #ifdef - __cplusplus. - GDB device only applicable to MN10300. - -Tue Sep 15 02:18:30 BST 1998 Chris Provenzano - - * include/pkgconf/devs.h: #define ...DECLARE instead of - #undef DO_NOT_DECLARE. Defining a positive is easier - to understand than not defining a negative. - - Only #define CYG_DEVICE_SERIAL_RS232_MN10300_2_DECLARE if we are - building the simulator. Otherwise declare the GDB pseudo device. - -1998-09-12 Bart Veer - - * include/pkgconf/devs.h: - Added missing descriptions (PR 17184) - -Fri Sep 11 11:01:33 1998 Jesper Skov - PR 17228, PR 17176 - - * src/table.cxx: Disable serial async read/write methods when - KMODE_INTERRUPT undefined. - - (Cyg_Device_Serial_RS232_mn10300_1_set_read_mode): - (Cyg_Device_Serial_RS232_mn10300_2_set_read_mode): - Inverted ASSERT expression. - - (Cyg_Device_Serial_RS232_mn10300_2_set_read_data): - (Cyg_Device_Serial_RS232_mn10300_1_set_read_data): - Corrected ASSERT expression. - - (Cyg_Device_Serial_RS232_tx39_set_line_mode): - (Cyg_Device_Serial_RS232_mn10300_2_set_line_mode): - (Cyg_Device_Serial_RS232_mn10300_1_set_line_mode): - Inverted ASSERT expression. - -1998-09-11 Bart Veer - - * include/pkgconf/devs.h: - Sorting out dependencies for error package. - -1998-09-03 Bart Veer - - * include/pkgconf/devs.h: - * include/pkgconf/devices.h: - Provide minimal support for configuration options. - -Thu Sep 3 15:53:01 1998 Jonathan Larmour - - * include/pkgconf/gdb_1.h, include/pkgconf/serial_mn10300_1.h, - include/pkgconf/serial_mn10300_2.h, - include/pkgconf/serial_tx39.h: - Move these pkgconf files into the packages that actually own them. - -Wed Sep 2 22:04:01 1998 Jonathan Larmour - - * include/pkgconf/serial_2.h, include/pkgconf/serial_mn10300_2.h: - Rename serial_2.h to serial_mn10300_2.h - - * include/pkgconf/devices.h, include/pkgconf/devs.h, - include/pkgconf/devs.h, serial_mn10300_2.h: - Change all mentions of serial_2.h to serial_mn10300_2.h and - all mentions of serial_mn10300.hxx to serial_mn10300_2.hxx - -Tue Sep 1 19:28:16 1998 Hugo Tyson - - * src/diag.cxx: - Use CYGDBG_INFRA_DIAG_USE_DEVICE (from infra.h) instead of - CYG_DIAG_USE_DEVICE (badly named, from kernel.h). - - * include/pkgconf/devs.h: - Correct a comment about CYGDBG_INFRA_DIAG_USE_DEVICE (from - infra.h) instead of CYG_DIAG_USE_DEVICE (badly named, from - kernel.h). - -Thu Aug 27 19:24:10 1998 Jonathan Larmour - - * include/pkgconf/serial_tx39.h: - Change CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE to 38400 from - 19200, in line with HAL. Fix for PR 16955 - -Wed Jul 29 17:45:10 BST 1998 Chris Provenzano - - * include/serial.hxx: Comment cleanup from the code review. - -Wed Jul 29 13:35:53 BST 1998 Chris Provenzano - - * include/pkgconf/serial_2.h: Generic cleanup. Correct - comments to match comments in other device configure files. - Remove mention of KMODE_ASSERT as it doesn't do anything. - -Tue Jul 28 19:12:49 BST 1998 Chris Provenzano - - * include/pkgconf/devs.h: Set the device name of the - device to test. - -Tue Jul 28 13:56:45 BST 1998 Chris Provenzano - - * src/table.cxx: Use macro device names instead of hardcoded - names. This fixes the TX39 build. - -Mon Jul 27 23:31:07 BST 1998 Chris Provenzano - - * include/pkgconf/devs.h, include/pkgconf/gdb_1.h - Code revies cleanup. - - * include/pkgconf/gdb_1.h, include/pkgconf/serial_mn10300_1.h - Remove CYG_DEVICE_..._KMODE_ASSERT configuration option. - Selective linking will DTRT for this option. - - * src/table.cxx - Use macro device names instead of hardcoded names. - -Mon Jul 27 17:33:59 BST 1998 Chris Provenzano - - * Changelog: Initial ChangeLog entry. - - -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - diff --git a/packages/devs/common/current/include/device.hxx b/packages/devs/common/current/include/device.hxx deleted file mode 100644 --- a/packages/devs/common/current/include/device.hxx +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_DEVICE_HXX -#define CYGONCE_DEVS_COMMON_DEVICE_HXX - -//========================================================================== -// -// device.hxx -// -// Header file for the generic device data structure -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define Cyg_Device data structure -// Description: This file contains the C++ class declaration of Cyg_Device. -// Cyg_Device is the base class for all devices. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include -#include // assertion macros -#include // tracing macros - -#include - -// ------------------------------------------------------------------------- -// Cyg_Device - -class Cyg_Device -{ - protected: - - // Accessor functions - void - set_iorb_pdevice( Cyg_IORB * iorb ) { iorb->set_pdevice( this ); } - - public: -}; - -#endif // CYGONCE_DEVS_COMMON_DEVICE_HXX -// End of device.hxx - diff --git a/packages/devs/common/current/include/iorb.h b/packages/devs/common/current/include/iorb.h deleted file mode 100644 --- a/packages/devs/common/current/include/iorb.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_IORB_H -#define CYGONCE_DEVS_COMMON_IORB_H - -//========================================================================== -// -// iorb.h -// -// Header file for IORB data structure -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define IORB data structure -// Description: This file contains the C/C++ struct declaration of Cyg_IORB. -// Cyg_IORB is the basic class for all device operations for -// both the C and C++ API. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include -#include // assertion macros -#include // tracing macros - -// ------------------------------------------------------------------------- -// Cyg_IORB - -/* - * This struct will be accessed by some ISR routines. Any field that is - * modified by an ISR routine must be declared volatile. Currently this - * includes next, ret_length, and resultstatus. - * - * Note: For next this means the pointer next is volatile not the contents. - */ -typedef struct Cyg_IORB_t -{ -#ifdef __cplusplus - friend class Cyg_Device; - - private: - Cyg_Device * pdevice; - - // Accessor functions - void set_pdevice(Cyg_Device * device) { pdevice = device; } - - public: - - // Accessor functions - Cyg_Device * - get_pdevice(void) { return(pdevice); } - -#else - // Make sure the C and C++ versions are the same size; - CYG_ADDRESS pdevice; -#endif - - struct Cyg_IORB_t * volatile next; - - void * buffer; // ptr to buffer - cyg_uint32 buffer_length; // length of buffer - volatile cyg_uint32 xferred_length; // length of buffer xferd - - cyg_uint8 opcode; // operation code + options - volatile cyg_uint8 status; // state, result + error code - - CYG_ADDRWORD callback_data; // data field for callback routine - void (*callback)( struct Cyg_IORB_t * piorb); -} Cyg_IORB; - -// opflags codes -#define CYG_IORB_NOBLOCK 0x01 // opcode for special serial reads - -// Resultstatus codes -#define CYG_IORB_OK 0x00 -#define CYG_IORB_CANCELED 0x02 - -#endif // CYGONCE_DEVS_COMMON_IORB_H -// End of iorb.h - diff --git a/packages/devs/common/current/include/pkgconf/devices.h b/packages/devs/common/current/include/pkgconf/devices.h deleted file mode 100644 --- a/packages/devs/common/current/include/pkgconf/devices.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef CYGONCE_PKGCONF_DEVICES_H -#define CYGONCE_PKGCONF_DEVICES_H -// ==================================================================== -// -// pkgconf/devices.h -// -// Device configuration file -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors:proven -// Date: 1998-04-24 -// Purpose: Contain #include for all the possible devices for the -// current configuration. All applications should include -// this file if they want to use the raw C++ device -// Eventually this file should be generated automatically. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -/* --------------------------------------------------------------------- - * Get the device configurations. - */ - -#include - -/* --------------------------------------------------------------------- - * Now #include the specific driver include file. - */ - -#ifdef __cplusplus - -#ifdef CYG_HAL_MN10300 -# ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 -# include -# endif -# ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 -# include -# endif -#endif - -#ifdef CYG_HAL_TX39 -# ifdef CYGPKG_DEVICES_SERIAL_RS232_TX39 -# include -# endif -#endif - -#ifdef CYGPKG_DEVICES_GDB -# include -#endif - -#ifdef CYGPKG_DEVICES_WALLCLOCK -# include -#endif - -#ifdef CYGPKG_DEVICES_WATCHDOG -# include -#endif - -#endif /* __cplusplus */ - -#endif /* CYGONCE_PKGCONF_DEVICES_H */ -/* EOF devices.h */ diff --git a/packages/devs/common/current/include/pkgconf/devs.h b/packages/devs/common/current/include/pkgconf/devs.h deleted file mode 100644 --- a/packages/devs/common/current/include/pkgconf/devs.h +++ /dev/null @@ -1,173 +0,0 @@ -#ifndef CYGONCE_PKGCONF_DEVS_H -#define CYGONCE_PKGCONF_DEVS_H -// ==================================================================== -// -// pkgconf/devs.h -// -// Device configuration file -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-24 -// Purpose: To allow the user to edit device configuration options. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_DEVICES { - display "Device drivers" - type bool - requires CYGPKG_ERROR - description " - The eCos system is supplied with a number of different - device drivers." - doc ref/ecos-ref/ecos-device-drivers.html - } - - }}CFG_DATA */ - -/* --------------------------------------------------------------------- - * This file needs to know which HAL and device packages are in the - * current configuration. - */ - -#include - -/* - * This #include is spurious but avoids some problems in the current - * sources. - */ -#ifdef CYGPKG_KERNEL -#include - -/* --------------------------------------------------------------------- - * Define all the potential devices that the kernel can have. Then define - * the configuration file that contains the specific configuration for - * that device. Eventually all these configuration files will be generated - * by a hardware configuration tool. - */ - -#if defined(CYG_HAL_MN10300) && defined(CYGPKG_DEVICES_SERIAL_RS232_MN10300) - -# include - -# ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 -# define CYG_DEVICE_SERIAL_RS232_MN10300_1 "pkgconf/serial_mn10300_1.h" -# define CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME CYG_DEVICE_NAME_1 -# define CYG_DEVICE_SERIAL_RS232_MN10300_1_DECLARE -# endif - -# ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 -# define CYG_DEVICE_SERIAL_RS232_MN10300_2 "pkgconf/serial_mn10300_2.h" -# define CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME CYG_DEVICE_NAME_2 -// If we are the simulator then we want native output, -// otherwise we want GDB output by default. These -// all depend on the HAL --proven 19980906 -# if defined(CYG_HAL_MN10300_SIM) || !defined(CYGPKG_DEVICES_GDB) -# define CYG_DEVICE_SERIAL_RS232_MN10300_2_DECLARE -# endif -# endif - -/* - * GDB is a pseudo device that wraps a real device. If this package - * is required default it to the second serial port. - */ -#if defined(CYGPKG_DEVICES_GDB) \ - && defined(CYGPKG_DEVICES_SERIAL_RS232_MN10300_2) -#define CYG_DEVICE_GDB_1 "pkgconf/gdb_1.h" -//#define CYG_DEVICE_GDB_1_NAME CYG_DEVICE_NAME_2 -#ifndef CYG_HAL_MN10300_SIM -#define CYG_DEVICE_GDB_1_NAME CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME -#endif - -// These last two fields I really don't like. -// The should probably go in "pkgconf/gdb_1.h" but I'd rather they -// went away completely --proven 19980630 -// Note CYG_DEVICE_GDB_1_CLASS is different than CYG_CLASS_DEVICE_GDB_1 -#define CYG_DEVICE_GDB_1_CLASS CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 -#define CYG_DEVICE_GDB_1_INCLUDE "cyg/devs/serial/rs232/mn10300/serial_mn10300_2.hxx" -#endif - -#endif /* CYG_HAL_MN10300 */ - -#ifdef CYG_HAL_TX39 - -/* No serial drivers for simulator yet. */ -#if defined(CYG_HAL_TX39_JMR3904) && defined(CYGPKG_DEVICES_SERIAL_RS232_TX39) -#define CYG_DEVICE_SERIAL_RS232_TX39 "pkgconf/serial_tx39.h" -#define CYG_DEVICE_SERIAL_RS232_TX39_NAME CYG_DEVICE_NAME_1 -#define CYG_DEVICE_SERIAL_RS232_TX39_DECLARE -#endif -#endif - -/* --------------------------------------------------------------------- - * Define the device that is to be used for outputing diag data. One is - * required only if CYGDBG_INFRA_DIAG_USE_DEVICE is defined. Define the - * name in terms of an above device name. - */ -#ifdef CYG_HAL_MN10300 -// #ifdef on rom monitor -// #define CYG_DEVICE_DIAG_CLASS CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 -// #define CYG_DEVICE_DIAG_NAME CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME -#define CYG_DEVICE_DIAG_CLASS CYG_CLASS_DEVICE_GDB_1 -#define CYG_DEVICE_DIAG_NAME CYG_DEVICE_GDB_1_NAME - -#endif - -#ifdef CYG_HAL_TX39 -#define CYG_DEVICE_DIAG_CLASS CYG_CLASS_DEVICE_SERIAL_RS232_TX39 -#define CYG_DEVICE_DIAG_NAME CYG_DEVICE_SERIAL_RS232_TX39_NAME -#endif - -/* --------------------------------------------------------------------- - * Define the name of the device you wish to test. The test - * infrastructure can only handle one. - */ -#define CYGVAR_DEVICE_TEST_NAME CYG_DEVICE_NAME_2 - -/* --------------------------------------------------------------------- - * Define the names of the devices. These must be defined after the - * device to device name mappings. - */ -#define CYG_DEVICE_NAME_1 cyg_serial1 -#define CYG_DEVICE_NAME_2 cyg_serial2 - -#endif // ifdef CYGPKG_KERNEL - -/* --------------------------------------------------------------------- - * Define for a device table. Necessary for the C library to access devices. - */ -#define CYG_DEVICE_TABLE - -#endif /* CYGONCE_PKGCONF_DEVS_H */ -/* EOF devs.h */ diff --git a/packages/devs/common/current/include/queuet.hxx b/packages/devs/common/current/include/queuet.hxx deleted file mode 100644 --- a/packages/devs/common/current/include/queuet.hxx +++ /dev/null @@ -1,154 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_QUEUET_HXX -#define CYGONCE_DEVS_COMMON_QUEUET_HXX - -//========================================================================== -// -// queuet.hxx -// -// Generic queue template -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-21 -// Purpose: Create a template atomic queue -// Description: This file contains the implementations of -// Cyg_Queuet -// -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // base kernel types -#include // assertion macros -#include // tracing macros - - -/* - * Queue that allows two threads to interact with a queue - * without locking. One thread does queueing of useable buffers - * and dequeing of done buffers and one thread is the consumer. - * - * Only n-1 elements may be queued at any time for a queue of n bytes. - */ - -template -class Cyg_Queuet -{ -private: - cyg_ucount32 next_free; - cyg_ucount32 last_free; - cyg_ucount32 next_inuse; - cyg_ucount32 last_inuse; - static const cyg_ucount32 queue_size = QUEUE_SIZE; - T * queue[ QUEUE_SIZE ]; - -public: /* Routines for dealing with the queue */ - inline T * - get_next_inuse(T * done) - { - T * ret; - - CYG_ASSERT (next_inuse < queue_size, "next_inuse out of bounds"); - CYG_ASSERT (last_inuse < queue_size, "last_inuse out of bounds"); - - if (done) { - (++last_inuse) %= queue_size; - } - if ((ret = queue[next_inuse]) != NULL) { - (++next_inuse) %= queue_size; - } - return ret; - } - - inline void - enqueue(T * next) - { - CYG_ASSERT (next_free < queue_size, "next_free out of bounds"); - CYG_ASSERT (queue[next_free] == NULL, "next_free is not NULL"); - CYG_ASSERT (min_free(), "not enough space to enqueue"); - - queue[next_free++] = next; - next_free %= queue_size; - } - - inline T * - Cyg_Queuet::dequeue() - { - T * ret; - - CYG_ASSERT (last_free < queue_size, "last_free out of bounds"); - CYG_ASSERT (last_free != last_inuse, "no elements to dequeue"); - CYG_ASSERT (queue[last_free] != NULL, "queued element is NULL"); - - ret = queue[last_free]; - queue[last_free++] = NULL; - last_free %= queue_size; - return ret; - } - - /* Assume producer is checking */ - inline cyg_ucount32 - Cyg_Queuet::min_done() - { - cyg_count32 tmp; - cyg_ucount32 ret; - - if (queue[last_free] != NULL) { - tmp = last_inuse - last_free; - ret = (tmp < 0 ? tmp + queue_size : tmp); - } else { - CYG_ASSERT (last_free == next_free, - "last_free element is bogus"); - ret = 0; - } - return ret; - } - - /* Assume producer is checking */ - cyg_ucount32 - Cyg_Queuet::min_free() - { - cyg_count32 tmp; - cyg_ucount32 ret; - - CYG_ASSERT (next_free < queue_size, "next_free out of bounds"); - CYG_ASSERT (last_free < queue_size, "last_free out of bounds"); - - tmp = last_free - next_free; - ret = (tmp <= 0 ? tmp + queue_size : tmp); - /* Only n - 1 elements may be queued */ - return (ret - 1); - } -}; - -// ------------------------------------------------------------------------- -#endif // CYGONCE_DEVS_COMMON_QUEUET_HXX -// End of queuet.hxx - - diff --git a/packages/devs/common/current/include/serial.hxx b/packages/devs/common/current/include/serial.hxx deleted file mode 100644 --- a/packages/devs/common/current/include/serial.hxx +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_SERIAL_HXX -#define CYGONCE_DEVS_COMMON_SERIAL_HXX - -//========================================================================== -// -// serial.hxx -// -// Header file for the generic serial device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define Cyg_Device_Serial data structure -// Description: This file contains the C++ class declar of Cyg_Device_Serial. -// Cyg_Device_Serial is the base class for all serial devices. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // base kernel types -#include // assertion macros -#include // tracing macros - -#include - -// ------------------------------------------------------------------------- -// Cyg_Device_Serial - -class Cyg_Device_Serial - : public Cyg_Device -{ - // nothing extra -}; - -#endif // CYGONCE_DEVS_COMMON_SERIAL_HXX -// End of serial.hxx - diff --git a/packages/devs/common/current/include/table.h b/packages/devs/common/current/include/table.h deleted file mode 100644 --- a/packages/devs/common/current/include/table.h +++ /dev/null @@ -1,179 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_TABLE_H -#define CYGONCE_DEVS_COMMON_TABLE_H - -//========================================================================== -// -// table.h -// -// Header file for the device table -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define Device Table -// Description: This file contains the device table structure -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -/* - * devs.h should be replaced by an appropriate ECC Hardy package. - * and this file should mostly be auto generated -- proven 19980625 - */ -#include // What devices do we need. - -#include // Common type definitions and support -#include // Cyg_IORB definition -#include // Standard error codes - -// Handles to some of the device entries. -// These shouldn't go here and should be generated by ECC-Hardy -// --proven 19980625 -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 -extern CYG_ADDRWORD stdeval1_serial1; -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -extern CYG_ADDRWORD stdeval1_serial2; -#endif -#else -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -extern CYG_ADDRWORD stdeval1_serial2; -#endif -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 -extern CYG_ADDRWORD jmr3904_serial; -#endif - -// Mode for opening - -typedef enum { - CYG_DEVICE_OPEN_MODE_TEXT, - CYG_DEVICE_OPEN_MODE_RAW -} Cyg_DeviceOpenMode; - -// ------------------------------------------------------------------------- -// Cyg_Device_Table_t - -/* - * Device table. - */ -struct Cyg_Device_Table_t -{ - char * name; - CYG_ADDRWORD cookie; -// cyg_off_t seek_position; // Not implemented yet - - /* - * Note: The cookie is necessary for the function to differentiate - * between various instantiations of the same device type. - * - * Also note that open() will be called before the kernel scheduler - * (and hence the interrupt system) starts, so it must be safe for this - */ - Cyg_ErrNo (*open) (CYG_ADDRWORD cookie, Cyg_DeviceOpenMode); - Cyg_ErrNo (*read_cancel) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*write_cancel) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*read_blocking) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*write_blocking) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*read_asynchronous) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*write_asynchronous) (CYG_ADDRWORD cookie, Cyg_IORB *); - Cyg_ErrNo (*close) (CYG_ADDRWORD cookie); - - CYG_ADDRWORD ioctl; -}; - -externC struct Cyg_Device_Table_t Cyg_Device_Table[]; - -struct Cyg_Device_Serial_RS232_Table_t -{ - Cyg_ErrNo (*set_kmode) (CYG_ADDRWORD cookie, cyg_uint32); - Cyg_ErrNo (*get_baud_rate) (CYG_ADDRWORD cookie, cyg_int32 * ); - Cyg_ErrNo (*set_baud_rate) (CYG_ADDRWORD cookie, cyg_int32, cyg_int32 *); - Cyg_ErrNo (*get_line_mode) (CYG_ADDRWORD cookie, cyg_int32 * ); - Cyg_ErrNo (*set_line_mode) (CYG_ADDRWORD cookie, cyg_int32, cyg_int32 *); - - Cyg_ErrNo (*get_read_mode) (CYG_ADDRWORD cookie, cyg_int32 * ); - Cyg_ErrNo (*set_read_mode) (CYG_ADDRWORD cookie, cyg_int32, cyg_int32 *); - Cyg_ErrNo (*set_read_data) (CYG_ADDRWORD cookie, cyg_int32, char *, cyg_uint32); -}; - -/* - * C API is just a set of macros - */ -#define cyg_read_cancel(x, y) \ - ((struct Cyg_Device_Table_t *)x)->read_cancel(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_write_cancel(x, y) \ - ((struct Cyg_Device_Table_t *)x)->write_cancel(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_read_blocking(x, y) \ - ((struct Cyg_Device_Table_t *)x)->read_blocking(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_write_blocking(x, y) \ - ((struct Cyg_Device_Table_t *)x)->write_blocking(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_read_asynchronous(x, y) \ - ((struct Cyg_Device_Table_t *)x)->read_asynchronous(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_write_asynchronous(x, y) \ - ((struct Cyg_Device_Table_t *)x)->write_asynchronous(((struct Cyg_Device_Table_t *)x)->cookie, y) - -/* - * C API for Serial RS232 devices - */ -#define cyg_serial_rs232_set_kmode(x, y) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->set_kmode(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_serial_rs232_get_baud_rate(x, y) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->get_baud_rate(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_serial_rs232_set_baud_rate(x, y, z) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->set_baud_rate(((struct Cyg_Device_Table_t *)x)->cookie, y, z) - -#define cyg_serial_rs232_get_line_mode(x, y) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->get_line_mode(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_serial_rs232_set_line_mode(x, y, z) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->set_line_mode(((struct Cyg_Device_Table_t *)x)->cookie, y, z) - -#define cyg_serial_rs232_get_read_mode(x, y) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->get_read_mode(((struct Cyg_Device_Table_t *)x)->cookie, y) - -#define cyg_serial_rs232_set_read_mode(x, y, z) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->set_read_mode(((struct Cyg_Device_Table_t *)x)->cookie, y, z) - -#define cyg_serial_rs232_set_read_data(x, y, z, a) \ - ((struct Cyg_Device_Serial_RS232_Table_t *)((struct Cyg_Device_Table_t *)x)->ioctl)->set_read_data(((struct Cyg_Device_Table_t *)x)->cookie, y, z, a) - - - -#endif // CYGONCE_DEVS_COMMON_TABLE_H -// End of table.h - diff --git a/packages/devs/common/current/include/testaux.hxx b/packages/devs/common/current/include/testaux.hxx deleted file mode 100644 --- a/packages/devs/common/current/include/testaux.hxx +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef CYGONCE_DEVS_COMMON_TESTAUX_HXX -#define CYGONCE_DEVS_COMMON_TESTAUX_HXX - -//========================================================================== -// -// testaux.hxx -// -// Auxiliary test header file -// This file is temporary in the devs directory. -// --proven 19980514 -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): dsm -// Contributors: dsm -// Date: 1998-03-09 -// Description: -// Defines some convenience functions to get us going. In -// particular this file reserves space for NTHREADS threads, -// which can be created by calls to aux_new_thread() -// It also defines a CHECK function. -// -//####DESCRIPTIONEND#### - -#ifdef NTHREADS - -#define STACKSIZE 4096 - -static Cyg_Thread *thread[NTHREADS]; - -static char thread_obj[NTHREADS][sizeof(Cyg_Thread)]; -static char stack[NTHREADS][STACKSIZE]; - -static inline void *operator new(size_t size, void *ptr) { return ptr; }; - -static int nthreads = 0; - -static Cyg_Thread *new_thread(cyg_thread_entry *entry, CYG_ADDRWORD data) { - - CYG_ASSERT(nthreads < NTHREADS, - "Attempt to create more than NTHREADS threads"); - - thread[nthreads] = new( (void *)&thread_obj[nthreads] ) - Cyg_Thread(entry, data, STACKSIZE, (CYG_ADDRESS)stack[nthreads] ); - - thread[nthreads]->resume(); - - return thread[nthreads++]; -} -#endif // defined(NTHREADS) - -#define CHECK(b) CYG_TEST_CHECK(b,#b) - -#endif // CYGONCE_DEVS_COMMON_TESTAUX_HXX -// End of testaux.hxx diff --git a/packages/devs/common/current/src/PKGconf.mak b/packages/devs/common/current/src/PKGconf.mak deleted file mode 100644 --- a/packages/devs/common/current/src/PKGconf.mak +++ /dev/null @@ -1,41 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/common/src -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices -include ../../../../pkgconf/pkgconf.mak - -LIBRARY := libtarget.a -COMPILE := diag.cxx table.cxx -OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - diff --git a/packages/devs/common/current/src/diag.cxx b/packages/devs/common/current/src/diag.cxx deleted file mode 100644 --- a/packages/devs/common/current/src/diag.cxx +++ /dev/null @@ -1,85 +0,0 @@ -/*============================================================================= -// -// devs/diag.c -// -// Redirect diag output to the appropriate device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-11 -// Purpose: Kernel diagnostic output -// Description: Implementations of kernel diagnostic routines. -// -//####DESCRIPTIONEND#### -// -//==========================================================================*/ - -#include // Include all the possible devices - -/*---------------------------------------------------------------------------*/ - -#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE -#if defined(CYG_DEVICE_DIAG_CLASS) && defined(CYG_DEVICE_DIAG_NAME) - -extern CYG_DEVICE_DIAG_CLASS CYG_DEVICE_DIAG_NAME; - -/*---------------------------------------------------------------------------*/ -/* Write single char to output */ - -cyg_ucount8 sync_mode = 0; - -externC void diag_device_write_char(char c) -{ - Cyg_IORB iorb; - - iorb.buffer = &c; - iorb.buffer_length = 1; - if (sync_mode) { - CYG_DEVICE_DIAG_NAME.io_write_assert(&iorb); - } else { - CYG_DEVICE_DIAG_NAME.io_write_blocking(&iorb); - } -} - -externC void diag_device_start_sync() -{ - sync_mode = 1; -} - -externC void diag_device_end_sync() -{ - sync_mode = 0; -} - -#else -#error "Must define CYG_DEVICE_DIAG_CLASS and CYG_DEVICE_DIAG_NAME" -#endif // ! (defined(CYG_DEVICE_DIAG_CLASS) && defined(CYG_DEVICE_DIAG_NAME)) -#endif // CYGDBG_INFRA_DIAG_USE_DEVICE - -/*---------------------------------------------------------------------------*/ -/* End of devs/diag.c */ diff --git a/packages/devs/common/current/src/table.cxx b/packages/devs/common/current/src/table.cxx deleted file mode 100644 --- a/packages/devs/common/current/src/table.cxx +++ /dev/null @@ -1,633 +0,0 @@ -//========================================================================== -// -// devs/table.cxx -// -// Virtual Device Table without Virtual Functions -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-20 -// Purpose: Virtual Device Table -// Description: Allow packages to use devices without having to know the -// device class. -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // Include all the possible devices -#include // Common type definitions and support -#include -#include // HAL diagnostic output - -#ifdef CYG_DEVICE_TABLE - -// --------------------------------------------------------------------------- -// CYG_DEVICE_SERIAL_RS232_MN10300_1 - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_read_cancel(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.io_read_cancel(iorb); - CYG_ASSERT(ret == 0, "Read cancel failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_read_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.io_read_blocking(iorb); - CYG_ASSERT(ret == 0, "Read failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_write_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.io_write_blocking(iorb); - CYG_ASSERT(ret == 0, "Write failed to the mn10300 serial port 1."); - return ENOERR; -} - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_read_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.io_read_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Read asynchronous failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_write_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.io_write_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Write asynchronous failed to the mn10300 serial port 1."); - return ENOERR; -} -#endif - -// Device specific routines; -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_set_kmode(CYG_ADDRWORD cookie, cyg_uint32 mode) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.set_kmode(mode); - CYG_ASSERT(ret == 0, "Set kmode failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_get_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 * old_baud_rate) -{ - *old_baud_rate = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.get_baud_rate(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_set_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 baud_rate, cyg_int32 * old_baud_rate) -{ - *old_baud_rate = - CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.set_baud_rate(baud_rate); - CYG_ASSERT(*old_baud_rate >= 0, - "Set baud rate failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_get_line_mode(CYG_ADDRWORD cookie, - cyg_int32 * line_mode) -{ - *line_mode = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.get_line_mode(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_set_line_mode(CYG_ADDRWORD cookie, - cyg_int32 line_mode, cyg_int32 * old_line_mode) -{ - *old_line_mode = - CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.set_line_mode(line_mode); - CYG_ASSERT(*old_line_mode >= 0, - "Set line mode failed to the mn10300 serial port 1."); - return ENOERR; -} - -// externC Cyg_ErrNo -// Cyg_Device_Serial_RS232_mn10300_1_get_read_mode(CYG_ADDRWORD cookie, -// cyg_int32 * read_mode) -// { -// *line_mode = serial.get_read_mode(); -// return ENOERR; -// } - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_set_read_mode(CYG_ADDRWORD cookie, - cyg_int32 read_mode, cyg_int32 * old_read_mode) -{ - *old_read_mode = - CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.set_read_mode(read_mode); - CYG_ASSERT(*old_read_mode >= 0, - "Set read mode failed to the mn10300 serial port 1."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_1_set_read_data(CYG_ADDRWORD cookie, - cyg_int32 mode, const char * str, cyg_uint32 length) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME.set_read_data(mode, str, length); - CYG_ASSERT(0 == ret, "Set read data failed to the mn10300 serial port 1."); - return ENOERR; -} - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_1 - -// --------------------------------------------------------------------------- -// CYG_DEVICE_SERIAL_RS232_MN10300_2 - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_read_cancel(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.io_read_cancel(iorb); - CYG_ASSERT(ret == 0, "Read cancel failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_read_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.io_read_blocking(iorb); - CYG_ASSERT(ret == 0, "Read failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_write_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.io_write_blocking(iorb); - CYG_ASSERT(ret == 0, "Write failed to the mn10300 serial port 2."); - return ENOERR; -} - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_read_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.io_read_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Read asynchronous failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_write_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.io_write_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Write asynchronous failed to the mn10300 serial port 2."); - return ENOERR; -} -#endif - -// Device specific routines; -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_set_kmode(CYG_ADDRWORD cookie, cyg_uint32 mode) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.set_kmode(mode); - CYG_ASSERT(ret == 0, "Set kmode failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_get_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 * old_baud_rate) -{ - *old_baud_rate = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.get_baud_rate(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_set_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 baud_rate, cyg_int32 * old_baud_rate) -{ - *old_baud_rate = - CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.set_baud_rate(baud_rate); - CYG_ASSERT(*old_baud_rate >= 0, - "Set baud rate failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_get_line_mode(CYG_ADDRWORD cookie, - cyg_int32 * line_mode) -{ - *line_mode = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.get_line_mode(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_set_line_mode(CYG_ADDRWORD cookie, - cyg_int32 line_mode, cyg_int32 * old_line_mode) -{ - *old_line_mode = - CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.set_line_mode(line_mode); - CYG_ASSERT(*old_line_mode >= 0, - "Set line mode failed to the mn10300 serial port 2."); - return ENOERR; -} - -// externC Cyg_ErrNo -// Cyg_Device_Serial_RS232_mn10300_2_get_read_mode(CYG_ADDRWORD cookie, -// cyg_int32 * read_mode) -// { -// *line_mode = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.get_read_mode(); -// return ENOERR; -// } - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_set_read_mode(CYG_ADDRWORD cookie, - cyg_int32 read_mode, cyg_int32 * old_read_mode) -{ - *old_read_mode = - CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.set_read_mode(read_mode); - CYG_ASSERT(*old_read_mode >= 0, - "Set read mode failed to the mn10300 serial port 2."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_mn10300_2_set_read_data(CYG_ADDRWORD cookie, - cyg_int32 mode, const char * str, cyg_uint32 length) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME.set_read_data(mode, str, length); - CYG_ASSERT(0 == ret, "Set read data failed to the mn10300 serial port 2."); - return ENOERR; -} - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_2 - -// --------------------------------------------------------------------------- -// CYG_DEVICE_SERIAL_RS232_TX39 - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_read_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_TX39_NAME.io_read_blocking(iorb); - CYG_ASSERT(ret == 0, "Read failed to the TX39 serial port 0."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_write_blocking(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_TX39_NAME.io_write_blocking(iorb); - CYG_ASSERT(ret == 0, "Write failed to the TX39 serial port 0."); - return ENOERR; -} - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_read_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_TX39_NAME.io_read_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Read asynchronous failed to the TX39 serial port 0."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_write_asynchronous(CYG_ADDRWORD cookie, Cyg_IORB * iorb) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_TX39_NAME.io_write_asynchronous(iorb); - CYG_ASSERT(ret == 0, - "Write asynchronous failed to the TX39 serial port 0."); - return ENOERR; -} -#endif - -// Device specific routines; -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_set_kmode(CYG_ADDRWORD cookie, cyg_uint32 mode) -{ - cyg_int32 ret; - - ret = CYG_DEVICE_SERIAL_RS232_TX39_NAME.set_kmode(mode); - CYG_ASSERT(ret == 0, "Set kmode failed to the TX39 serial port 0."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_get_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 * old_baud_rate) -{ - *old_baud_rate = CYG_DEVICE_SERIAL_RS232_TX39_NAME.get_baud_rate(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_set_baud_rate(CYG_ADDRWORD cookie, - cyg_int32 baud_rate, cyg_int32 * old_baud_rate) -{ - *old_baud_rate = - CYG_DEVICE_SERIAL_RS232_TX39_NAME.set_baud_rate(baud_rate); - CYG_ASSERT(*old_baud_rate >= 0, - "Set baud rate failed to the TX39 serial port 0."); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_get_line_mode(CYG_ADDRWORD cookie, - cyg_int32 * line_mode) -{ - *line_mode = CYG_DEVICE_SERIAL_RS232_TX39_NAME.get_line_mode(); - return ENOERR; -} - -externC Cyg_ErrNo -Cyg_Device_Serial_RS232_tx39_set_line_mode(CYG_ADDRWORD cookie, - cyg_int32 line_mode, cyg_int32 * old_line_mode) -{ - *old_line_mode = - CYG_DEVICE_SERIAL_RS232_TX39_NAME.set_line_mode(line_mode); - CYG_ASSERT(*old_line_mode >= 0, - "Set line mode failed to the TX39 serial port 0."); - return ENOERR; -} - -#endif /* CYG_DEVICE_SERIAL_RS232_TX39 */ - -// --------------------------------------------------------------------------- -// HAL_DIAG - -#ifdef HAL_DIAG_INIT -externC Cyg_ErrNo -Cyg_Device_Pseudo_Hal_Diag_open( CYG_ADDRWORD cookie, Cyg_DeviceOpenMode ) -{ - HAL_DIAG_INIT(); - return ENOERR; -} -#endif - -#ifdef HAL_DIAG_READ_CHAR -externC Cyg_ErrNo -Cyg_Device_Pseudo_Hal_Diag_read_blocking( CYG_ADDRWORD cookie, Cyg_IORB *iorb ) -{ - cyg_ucount32 i; - cyg_bool exit_loop = false; - - for (i=0; (i < iorb->buffer_length) && !exit_loop; i++) - { - HAL_DIAG_READ_CHAR(* ((char*)iorb->buffer + i) ); - - // exit loop on certain characters, newline, EOF, etc. - switch (*((char*)iorb->buffer + i)) - { - case 4: - case 10: - case 13: - case 26: - exit_loop = true; - break; - default: - break; - } // switch - } // for - - iorb->xferred_length = i; - return ENOERR; -} -#endif - -#ifdef HAL_DIAG_WRITE_CHAR -externC Cyg_ErrNo -Cyg_Device_Pseudo_Hal_Diag_write_blocking( CYG_ADDRWORD cookie, Cyg_IORB *iorb ) -{ - cyg_ucount32 i; - - for (i=0; i < iorb->buffer_length; i++) - { - HAL_DIAG_WRITE_CHAR(*((char *)iorb->buffer + i)); - } // for - - iorb->xferred_length = iorb->buffer_length; - return ENOERR; -} -#endif - -// --------------------------------------------------------------------------- -// Device specific ioctl table -// -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 -struct Cyg_Device_Serial_RS232_Table_t Cyg_Device_Serial_RS232_mn10300_1_Table = -{ - &Cyg_Device_Serial_RS232_mn10300_1_set_kmode, - &Cyg_Device_Serial_RS232_mn10300_1_get_baud_rate, - &Cyg_Device_Serial_RS232_mn10300_1_set_baud_rate, - &Cyg_Device_Serial_RS232_mn10300_1_get_line_mode, - &Cyg_Device_Serial_RS232_mn10300_1_set_line_mode, - NULL, - &Cyg_Device_Serial_RS232_mn10300_1_set_read_mode, - &Cyg_Device_Serial_RS232_mn10300_1_set_read_data -}; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -struct Cyg_Device_Serial_RS232_Table_t Cyg_Device_Serial_RS232_mn10300_2_Table = -{ - &Cyg_Device_Serial_RS232_mn10300_2_set_kmode, - &Cyg_Device_Serial_RS232_mn10300_2_get_baud_rate, - &Cyg_Device_Serial_RS232_mn10300_2_set_baud_rate, - &Cyg_Device_Serial_RS232_mn10300_2_get_line_mode, - &Cyg_Device_Serial_RS232_mn10300_2_set_line_mode, - NULL, - &Cyg_Device_Serial_RS232_mn10300_2_set_read_mode, - &Cyg_Device_Serial_RS232_mn10300_2_set_read_data -}; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 -struct Cyg_Device_Serial_RS232_Table_t Cyg_Device_Serial_RS232_tx39_Table = -{ - &Cyg_Device_Serial_RS232_tx39_set_kmode, - &Cyg_Device_Serial_RS232_tx39_get_baud_rate, - &Cyg_Device_Serial_RS232_tx39_set_baud_rate, - &Cyg_Device_Serial_RS232_tx39_get_line_mode, - &Cyg_Device_Serial_RS232_tx39_set_line_mode, - NULL, NULL, NULL -}; -#endif -// --------------------------------------------------------------------------- -// Device table -// -struct Cyg_Device_Table_t Cyg_Device_Table[] = { - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 -{ "serial1", (CYG_ADDRWORD) 0, - NULL, // no open - &Cyg_Device_Serial_RS232_mn10300_1_read_cancel, - NULL, - &Cyg_Device_Serial_RS232_mn10300_1_read_blocking, - &Cyg_Device_Serial_RS232_mn10300_1_write_blocking, -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT - &Cyg_Device_Serial_RS232_mn10300_1_read_asynchronous, - &Cyg_Device_Serial_RS232_mn10300_1_write_asynchronous, -#else - NULL, NULL, -#endif - NULL, // no close - (CYG_ADDRWORD)&Cyg_Device_Serial_RS232_mn10300_1_Table -}, -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -{ "serial2", (CYG_ADDRWORD) 0, - NULL, // no open - &Cyg_Device_Serial_RS232_mn10300_2_read_cancel, - NULL, - &Cyg_Device_Serial_RS232_mn10300_2_read_blocking, - &Cyg_Device_Serial_RS232_mn10300_2_write_blocking, -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT - &Cyg_Device_Serial_RS232_mn10300_2_read_asynchronous, - &Cyg_Device_Serial_RS232_mn10300_2_write_asynchronous, -#else - NULL, NULL, -#endif - NULL, // no close - (CYG_ADDRWORD)&Cyg_Device_Serial_RS232_mn10300_2_Table -}, -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 -{ "serial0", (CYG_ADDRWORD) 0, - NULL, // no open - NULL, - NULL, - &Cyg_Device_Serial_RS232_tx39_read_blocking, - &Cyg_Device_Serial_RS232_tx39_write_blocking, -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT - &Cyg_Device_Serial_RS232_tx39_read_asynchronous, - &Cyg_Device_Serial_RS232_tx39_write_asynchronous, -#else - NULL,NULL, -#endif - NULL, // no close - (CYG_ADDRWORD)&Cyg_Device_Serial_RS232_tx39_Table -}, -#endif - -{ "haldiag", (CYG_ADDRWORD) 0, -#ifdef HAL_DIAG_INIT - &Cyg_Device_Pseudo_Hal_Diag_open, -#else - NULL, -#endif - - NULL, - NULL, - -#ifdef HAL_DIAG_READ_CHAR - &Cyg_Device_Pseudo_Hal_Diag_read_blocking, -#else - NULL, -#endif - -#ifdef HAL_DIAG_WRITE_CHAR - &Cyg_Device_Pseudo_Hal_Diag_write_blocking, -#else - NULL, -#endif - NULL }, // no close - -{ NULL, (CYG_ADDRWORD) 0, NULL, NULL, NULL, NULL } -}; - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 -CYG_ADDRWORD stdeval1_serial1 = (CYG_ADDRWORD)&Cyg_Device_Table[0]; -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -CYG_ADDRWORD stdeval1_serial2 = (CYG_ADDRWORD)&Cyg_Device_Table[1]; -#endif -#else -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -CYG_ADDRWORD stdeval1_serial2 = (CYG_ADDRWORD)&Cyg_Device_Table[0]; -#endif -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 -CYG_ADDRWORD jmr3904_serial = (CYG_ADDRWORD)&Cyg_Device_Table[0]; -#endif - -#endif - -/*---------------------------------------------------------------------------*/ -/* End of devs/table.cxx */ diff --git a/packages/devs/gdb/current/include/gdb_1.hxx b/packages/devs/gdb/current/include/gdb_1.hxx deleted file mode 100644 --- a/packages/devs/gdb/current/include/gdb_1.hxx +++ /dev/null @@ -1,105 +0,0 @@ -#ifndef CYGONCE_DEVS_GDB_1_HXX -#define CYGONCE_DEVS_GDB_1_HXX - -//========================================================================== -// -// gdb_1.hxx -// -// Header file for the pseudo gdb device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Purpose: Define Cyg_Device_GDB_1 data structure -// Description: This file contains the C++ class declaration of -// Cyg_Device_GDB_1. There can be only one as it -// inherits from a specific device. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // Device configureation file - -#ifdef CYG_DEVICE_GDB_1 -// Include Configureation options specific to the device -#include CYG_DEVICE_GDB_1 -#include CYG_DEVICE_GDB_1_INCLUDE - -#include -#include - -// ------------------------------------------------------------------------- -// Cyg_Device_GDB_1 - -#define CYG_CLASS_DEVICE_GDB_1 Cyg_Device_GDB_1 - -class CYG_CLASS_DEVICE_GDB_1 - : public CYG_DEVICE_GDB_1_CLASS -{ - -#ifdef CYG_DEVICE_INTERNAL - -private: - /* Queue of write requests */ - Cyg_IORB * gdb_write_buffer_first; - Cyg_IORB * gdb_write_buffer_last; - - static void iorb_setup(CYG_CLASS_DEVICE_GDB_1 *iorb); - static void iorb_callback(Cyg_IORB *iorb); - - char gdb_write_buf[(CYGNUM_DEVICE_GDB_BUFFER_SIZE * 2 + 5)]; - volatile cyg_uint32 gdb_write_length; - Cyg_IORB gdb_write_iorb; - -#endif - -public: - - /* Constructor */ - CYG_CLASS_DEVICE_GDB_1(); - - cyg_int32 io_write_assert(Cyg_IORB * iorb); - cyg_int32 io_write_blocking(Cyg_IORB * iorb); - cyg_int32 io_write_asynchronous(Cyg_IORB * iorb); - -}; - -// Declare exported variables -#ifdef CYG_DEVICE_GDB_1_NAME -#ifndef CYG_DEVICE_GDB_1_DO_NOT_DECLARE -extern CYG_CLASS_DEVICE_GDB_1 CYG_DEVICE_GDB_1_NAME; -#endif -#endif - -#endif // CYG_DEVICE_GDB_1 - -#endif // CYGONCE_DEVS_GDB_1_HXX -// End of gdb_1.hxx - diff --git a/packages/devs/gdb/current/include/pkgconf/gdb_1.h b/packages/devs/gdb/current/include/pkgconf/gdb_1.h deleted file mode 100644 --- a/packages/devs/gdb/current/include/pkgconf/gdb_1.h +++ /dev/null @@ -1,96 +0,0 @@ -#ifndef CYGONCE_PKGCONF_GDB_1_H -#define CYGONCE_PKGCONF_GDB_1_H -// ==================================================================== -// -// pkgconf/gdb_1.h -// -// Device configuration file for gdb 1 -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors:proven -// Date: 1998-04-24 -// Purpose: To allow the user to edit device specific configuration -// for the gdb 1 pseudo device. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_DEVICES_GDB { - display "GDB pseudo device" - parent CYGPKG_DEVICES - requires CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 - description " - If the gdb source level debugger is going to be used to - debug the application then on some target systems this will - involve the exclusive use of some hardware, for example a - serial line. Hence this device cannot be used for other - purposes, for example C library standard I/O. If the gdb - pseudo device is enabled then this provides a means of - performing output operations encapsulated within the gdb - protocol, thus allowing a single serial line or similar - device to be used for both debugging and for output. Note - that currently GDB does not support input operations. This - package is only supported on the MN10300." - } - - }}CFG_DATA */ - -/* ==================================================================== - * First we define all the options that are exportable to the user. - * These options will show/hide various methods for the class. - * These options are always device specific. - */ - -#ifdef CYG_DEVICE_INTERNAL -/* ==================================================================== - * Now define internal only options. These options dictate the struture - * of a class but have no effect on the methods declared for a class. - */ - -/* --------------------------------------------------------------------- - * Define the number of bytes to convert and output in to the base driver. - * This number will result in a buffer which is SIZE * 2 + 5 bytes. - */ -# define CYGNUM_DEVICE_GDB_BUFFER_SIZE 100 - -/* ==================================================================== - * Duplicate the device specific options to device generic options. - * DO NOT modify these options. Modify the corresponding options above. - * This is so the internal source files can be compiled from the same - * common sources. These defines can never be exported to the user. - */ - -#endif // CYG_DEVICE_INTERNAL - -#endif /* CYGONCE_PKGCONF_GDB_1_H */ -/* EOF gdb_1.h */ diff --git a/packages/devs/gdb/current/src/PKGconf.mak b/packages/devs/gdb/current/src/PKGconf.mak deleted file mode 100644 --- a/packages/devs/gdb/current/src/PKGconf.mak +++ /dev/null @@ -1,41 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/mn10300/src -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_gdb -include ../../../../pkgconf/pkgconf.mak - -LIBRARY := libtarget.a -COMPILE := gdb_1.cxx -OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - diff --git a/packages/devs/gdb/current/src/gdb_1.cxx b/packages/devs/gdb/current/src/gdb_1.cxx deleted file mode 100644 --- a/packages/devs/gdb/current/src/gdb_1.cxx +++ /dev/null @@ -1,245 +0,0 @@ -//================================================================= -// -// gdb_1.cxx -// -// Pseudo Driver for GDB -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-30 -// Description: Class methods for class Cyg_Device_GDB_1 -//####DESCRIPTIONEND#### - -#include // To see if we need to bother -#ifdef CYG_DEVICE_GDB_1 // Do we need to build this file - -#define CYG_DEVICE_INTERNAL -#include -#include // Cyg_Binary_Semaphore -#include // NULL - -#ifdef CYG_DEVICE_GDB_1_NAME // Only construct object if there is a name -CYG_CLASS_DEVICE_GDB_1 CYG_DEVICE_GDB_1_NAME; -#endif - -// ------------------------------------------------------------------------ -// Constructor for GDB device -// -CYG_CLASS_DEVICE_GDB_1::CYG_CLASS_DEVICE_GDB_1() - : CYG_DEVICE_GDB_1_CLASS() -{ - CYG_REPORT_FUNCTION(); - - // Initialize any data - - // write_buffers = NULL; - -} - -// ------------------------------------------------------------------------ -// Routines to deal with the new iorb -// - -static const char hexchars[] = "0123456789abcdef"; - -static cyg_uint32 -iorb_compute(char * in_data, cyg_uint32 length, Cyg_IORB * out) -{ - cyg_uint8 csum = 0; - cyg_ucount8 i; - char * data; - - data = (char *)out->buffer; - - if (length > CYGNUM_DEVICE_GDB_BUFFER_SIZE) { - length = CYGNUM_DEVICE_GDB_BUFFER_SIZE; - } - - data[0] = '$'; - data[1] = 'O'; - csum += data[1]; - for (i = 0; i < length; i++) { - data[(i*2)+2] = hexchars[(in_data[i] >> 4) & 0x0f]; - data[(i*2)+3] = hexchars[in_data[i] & 0x0f]; - csum += data[(i*2)+2]; - csum += data[(i*2)+3]; - } - data[(i*2)+2] = '#'; - data[(i*2)+3] = hexchars[csum >> 4]; - data[(i*2)+4] = hexchars[csum & 0x0f]; - - out->buffer_length = (i * 2) + 5; - return (length); -} - -void -CYG_CLASS_DEVICE_GDB_1::iorb_setup(CYG_CLASS_DEVICE_GDB_1 * data) -{ - Cyg_IORB * iorb; - - iorb = data->gdb_write_buffer_first; - - /* set up gdb_write_iorb */ - data->gdb_write_iorb.buffer = data->gdb_write_buf; - data->gdb_write_iorb.callback = iorb_callback; - data->gdb_write_iorb.callback_data = (CYG_ADDRWORD)data; - iorb->xferred_length = iorb_compute((char *)iorb->buffer, iorb->buffer_length, &data->gdb_write_iorb); - - /* Save the length of the original data that still needs to be sent */ - data->gdb_write_length = iorb->buffer_length - iorb->xferred_length; - - /* Start the write process */ - data->io_write(&data->gdb_write_iorb); -} - -void -CYG_CLASS_DEVICE_GDB_1::iorb_callback(Cyg_IORB *iorb) -{ - CYG_CLASS_DEVICE_GDB_1 * foo = (CYG_CLASS_DEVICE_GDB_1 *)iorb->callback_data; - cyg_uint32 length; - - if (foo->gdb_write_length) { - /* Compute the offset into the original data */ - length = iorb_compute ((char *)foo->gdb_write_buffer_first->buffer + - foo->gdb_write_buffer_first->xferred_length, foo->gdb_write_length, - &foo->gdb_write_iorb); - - foo->gdb_write_buffer_first->xferred_length += length; - foo->gdb_write_length -= length; - - foo->io_write(&foo->gdb_write_iorb); - - } else { - Cyg_IORB * done; - - /* Get the next iorb */ - done = foo->gdb_write_buffer_first; - foo->gdb_write_buffer_first = foo->gdb_write_buffer_first->next; - if (foo->gdb_write_buffer_first == NULL) { - foo->gdb_write_buffer_last = NULL; - } else { - foo->iorb_setup(foo); - } - if (done->callback) { - done->callback(done); - } - } -} - -// ------------------------------------------------------------------------ -// Asynchronous write -// - -cyg_int32 -CYG_CLASS_DEVICE_GDB_1::io_write_asynchronous(Cyg_IORB * iorb) -{ - iorb->next = NULL; - Cyg_Scheduler::lock(); - if (gdb_write_buffer_first == NULL) { - gdb_write_buffer_first = iorb; - gdb_write_buffer_last = iorb; - Cyg_Scheduler::unlock(); - iorb_setup(this); - } else { - gdb_write_buffer_last->next = iorb; - gdb_write_buffer_last = iorb; - Cyg_Scheduler::unlock(); - } - return 0; -} - -// ------------------------------------------------------------------------ -// Synchronous write -// - -static void -callback(Cyg_IORB *iorb) -{ - Cyg_Binary_Semaphore * data = (Cyg_Binary_Semaphore *)iorb->callback_data; - data->post(); -} - -cyg_int32 -CYG_CLASS_DEVICE_GDB_1::io_write_blocking(Cyg_IORB * iorb) -{ - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&write; - iorb->callback = callback; - iorb->next = NULL; - - Cyg_Scheduler::lock(); - if (gdb_write_buffer_first == NULL) { - gdb_write_buffer_last = iorb; - gdb_write_buffer_first = iorb; - } else { - gdb_write_buffer_last->next = iorb; - gdb_write_buffer_last = iorb; - Cyg_Scheduler::unlock(); - write.wait(); - return 0; - } - - Cyg_Scheduler::unlock(); - iorb_setup(this); - write.wait(); - return 0; -} - -// ------------------------------------------------------------------------ -// Assert versions. These versions bypass most of the driver code. -// These are to be used by the BSP or asserts. Only use them once -// start_sync() is called and when done normal operations is -// restarted with the end_sync() mode. -// -// Note DO NOT DO LOCKING IN THIS ROUTINE!!! -// - -cyg_int32 -CYG_CLASS_DEVICE_GDB_1::io_write_assert(Cyg_IORB * iorb) -{ - Cyg_IORB assert_iorb; - char assert_buffer[256]; - cyg_uint32 length, length_left; - - assert_iorb.callback = NULL; - assert_iorb.callback_data = 0; - assert_iorb.buffer = assert_buffer; - for (length_left = iorb->buffer_length; length_left; length_left -= length) { - length = iorb_compute((char *)iorb->buffer + iorb->xferred_length, - length_left, &assert_iorb); - iorb->xferred_length += length; - (CYG_DEVICE_GDB_1_CLASS *)this->io_write_assert(&assert_iorb); - } - - return 0; -} - -#endif // #ifdef CYG_DEVICE_GDB_1 -// EOF gdb_1.cxx diff --git a/packages/devs/serial/rs232/common/current/ChangeLog b/packages/devs/serial/rs232/common/current/ChangeLog deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/ChangeLog +++ /dev/null @@ -1,180 +0,0 @@ -1998-10-24 Hugo Tyson - - * tests/serial_test.c (entry0): - Add runtime check that the zeroth entry in the Cyg_Device_Table - is actually a "serial" device (by name). Otherwise, don't call - the routines; the API existence check in that it compiled remains - sound. - -Fri Oct 23 20:02:17 1998 Jonathan Larmour - - * tests/serial_test.c: - Add a default CYG_TEST_PASS_EXIT when there is no kernel C API, - as we depend on its presence to do the testing - -Fri Oct 23 11:52:45 BST 1998 Chris Provenzano - - * tests/set_baud_rate.c tests/get_baud_rate.c tests/serial1.c - * tests/serial2.c tests/serial3.c tests/serial4.c tests/serial5.c - * tests/serial6.c: Removed these tests as they are superceeded - by tests/serial_test.c. - - * tests/PKGconf.mak: Added serial_test.c and removed all the old - serial[x].c set_baud_rate.c and get_baud_rate.c tests. - - * tests/serial_test.c: New test to just test the API and not much - of the functionality. These tests meet or exceed the previous - existence/spelling tests of the API and therefore replace all the - serial[x].c set_baud_rate.c and get_baud_rate.c tests. - -Mon Oct 19 19:02:21 1998 Jonathan Larmour - - * include/pkgconf/serial_rs232_common.h: - Require the kernel package for this package - -Sun Sep 27 15:18:35 1998 Jesper Skov - - * tests/set_baud_rate.c: Do not change the baud rate to - 0. Undefined behavior in the current drivers. - -Sun Sep 27 13:50:38 1998 Jesper Skov - - * tests/README: Added copyright blurb. - -Fri Sep 25 21:26:08 1998 Jesper Skov - - * tests/set_baud_rate.c (entry0): Do send output if baud rate is - set to 0. This is the correct behavior. It's a problem with the - mn10300 driver. - -Fri Sep 25 20:59:54 1998 Jesper Skov - - * tests/README: Added. - -Fri Sep 25 19:47:36 1998 Jesper Skov - PR 17483 - - * tests/set_baud_rate.c: Don't send any output when baud rate is - set to 0. - -Fri Sep 25 11:25:29 1998 Jesper Skov - - * tests/serial6.c: Do null-test if required calls not available. - - * tests/serial3.c: - * tests/serial5.c: - Added some diag info to help identify these as input tests. - Removed old PR 17270 workaround since the PR 17227 fix made these - tests valid regardless of KMODE config. - - * tests/serial2.c: - * tests/serial4.c: - Added PR 17270 workaround. - - * tests/PKGconf.mak: Reintroduced input tests. - -Thu Sep 17 19:10:03 1998 Frank Ch. Eigler - - * tests/serial2.c (entry0): Reorder foo flag use to avoid race - condition. - -1998-09-14 Bart Veer - - * include/pkgconf/serial_rs232_common.h: - Change the package type to boolean, to allow all serial - devices to be disabled. - -1998-09-12 Bart Veer - - * include/pkgconf/serial_rs232_common.h: - Added missing descriptions (PR 17184) - -Fri Sep 11 12:11:19 1998 Jesper Skov - - * tests/serial2.c: - * tests/serial3.c: - * tests/serial4.c: - * tests/serial5.c: - Undid last change because of a config problem (PR 17270). - -Thu Sep 10 10:28:10 1998 Jesper Skov - - * tests/serial2.c: - * tests/serial3.c: - * tests/serial4.c: - * tests/serial5.c: - Only run actual test when CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - defined. - -Thu Sep 10 10:05:40 1998 Jesper Skov - - * tests/serial6.c: Changed test numbers from 5 to 6. - -1998-09-04 Bart Veer - - * include/pkgconf/serial_rs232_common.h: - Sorting out naming conventions. - -1998-09-03 Bart Veer - - * include/pkgconf/serial_rs232_common.h: - New file to support minimal configuration data. - -Thu Sep 3 10:03:00 1998 Tim Goodwin - - * tests/get_baud_rate.c: - * serial1.c: - * serial2.c: - * serial3.c: - * tests/serial4.c: - * tests/serial5.c: - * tests/serial6.c: - * tests/set_baud_rate.c: - - Change to cyg_thread_create() interface. - -Fri Aug 28 09:43:55 1998 Jonathan Larmour - - * tests/get_baud_rate.c, tests/serial1.c, tests/serial2.c, - tests/serial3.c, tests/serial4.c, tests/serial5.c, tests/serial6.c, - tests/set_baud_rate.c: - Change use of main() as the entry point to cyg_start() under the - new entry point scheme. Remove return codes as cyg_start() returns - void, not int. - -Wed Jul 29 17:46:34 BST 1998 Chris Provenzano - - * include/rs232.h, include/rs232.ht, include/rs232.hxx: - Comment cleanup from the code review. - - * include/rs232.h: Support baudrates up to 460800. - -Mon Jul 27 17:33:59 BST 1998 Chris Provenzano - - * Changelog: Initial ChangeLog entry. - - -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - diff --git a/packages/devs/serial/rs232/common/current/include/baud.h b/packages/devs/serial/rs232/common/current/include/baud.h deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/include/baud.h +++ /dev/null @@ -1,149 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_BAUD_H -#define CYGONCE_DEVS_SERIAL_RS232_BAUD_H - -//========================================================================== -// -// baud.h -// -// Header file for the baud rate -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-22 -// Purpose: Define B0 and other macros -// Description: This file contains a lot of macro stuff for the -// baud rate, both internal only. -// Usage: #include something that includes this. -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#ifdef CYG_DEVICE_INTERNAL - -// Now set the default baudrate -#ifndef CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE -#error "Must specify a default baud rate" -#else - -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 0) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 50) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B50 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B50 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 75) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B75 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B75 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 110) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B110 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B110 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 134) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B134 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B134 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 150) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B150 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B150 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 200) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B200 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B200 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 200) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B200 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B200 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 300) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B300 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B300 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 600) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 1200) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 1800) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1800 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1800 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 2400) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 4800) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 9600) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 19200) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 38400) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 57600) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B57600 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B57600 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 115200) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B115200 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B115200 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 230400) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B230400 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B230400 -#endif -#if (CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE == 460800) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE CYG_DEVICE_SERIAL_RS232_T1_VALUE_B460800 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE CYG_DEVICE_SERIAL_RS232_T2_VALUE_B460800 -#endif - -#ifndef CYG_DEVICE_SERIAL_RS232_T1_VALUE -#error "Invalid default baud rate." -#endif - -#endif // CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE - -#endif // CYG_DEVICE_INTERNAL - -#endif // CYGONCE_DEVS_SERIAL_RS232_BAUD_H -// End of baud.h - diff --git a/packages/devs/serial/rs232/common/current/include/pkgconf/serial_rs232_common.h b/packages/devs/serial/rs232/common/current/include/pkgconf/serial_rs232_common.h deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/include/pkgconf/serial_rs232_common.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef CYGONCE_PKGCONF_SERIAL_RS232_COMMON_H -#define CYGONCE_PKGCONF_SERIAL_RS232_COMMON_H -// ==================================================================== -// -// pkgconf/serial_rs232_common.h -// -// Configuration file for shared serial line code. -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-03 -// Purpose: To allow the user to edit configuration -// options common to all serial lines. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_DEVICES_SERIAL_RS232_COMMON { - display "Serial RS232 devices" - type bool - # parent CYGPKG_DEVICES_SERIAL - parent CYGPKG_DEVICES - requires CYGPKG_KERNEL - description " - Drivers for various RS232 devices." - doc ref/ecos-ref/part-iii.html - } - - }}CFG_DATA -*/ - -#endif /* CYGONCE_PKGCONF_SERIAL_RS232_COMMON_H */ -/* EOF serial_rs232_common.h */ diff --git a/packages/devs/serial/rs232/common/current/include/rs232.h b/packages/devs/serial/rs232/common/current/include/rs232.h deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/include/rs232.h +++ /dev/null @@ -1,94 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_H -#define CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_H - -//========================================================================== -// -// rs232.h -// -// Header file for the generic serial device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define Cyg_Device_Serial data structure -// Description: This file contains the baud rates and line modes for the -// RS232 serial devices. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -// Various baud rates -// Macro names are the same as the POSIX ones. -#define B0 0 -#define B50 1 -#define B75 2 -#define B110 3 -#define B134 4 -#define B150 5 -#define B200 6 -#define B300 7 -#define B600 8 -#define B1200 9 -#define B1800 10 -#define B2400 11 -#define B4800 12 -#define B9600 13 -#define B19200 14 -#define B38400 15 -// Non POSIX FAST baud rates. -#define B57600 16 -#define B115200 17 -#define B230400 18 -#define B460800 19 - -// Various line modes -// Macro names are the same as the POSIX ones. -#define CSIZE 0x03 // Mask for number of bits per byte -#define CS5 0x00 -#define CS6 0x01 -#define CS7 0x02 -#define CS8 0x04 -#define CSTOPB 0x04 // If set then two stop bits otherwise one -#define PARENB 0x10 // If set then parity is enabled -#define PARODD 0x20 // If set then odd parity otherwise even - -// Read mode bits -#define CYG_DEVICE_SERIAL_RS232_READ_MODE_IGN 0x01 // Ignore -#define CYG_DEVICE_SERIAL_RS232_READ_MODE_TRN 0x02 // Translate -#define CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB 0x04 // End of Buffer - -// Possible future read mode options -//#define CYG_DEVICE_SERIAL_RS232_READ_MODE_ESCAPE 0x10 -//#define CYG_DEVICE_SERIAL_RS232_READ_MODE_XOFF 0x20 -//#define CYG_DEVICE_SERIAL_RS232_READ_MODE_XON 0x40 - -#endif // CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_H -// End of rs232.h - diff --git a/packages/devs/serial/rs232/common/current/include/rs232.ht b/packages/devs/serial/rs232/common/current/include/rs232.ht deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/include/rs232.ht +++ /dev/null @@ -1,135 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HT -#define CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HT - -//========================================================================== -// -// rs232.ht -// -// Template file for rs232 serial device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Purpose: Internals to a configured device serial rs232 class. -// Description: This file contains the INTERNALS of a C++ class. -// This file is included inside the declaration of the C++ class. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -/* - * Some of these fields will be accessed by some ISR routines. Any field - * that is modified by an ISR routine must be declared volatile. - */ -#ifdef CYG_DEVICE_INTERNAL - - protected: - // Read - Cyg_IORB * volatile read_buffer; - - // Only needed for interrupt mode - #ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - Cyg_Queuet - read_buffers; - #ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - Cyg_IORB * volatile read_buffers_ll_first; - Cyg_IORB * volatile read_buffers_ll_last; - #endif - - #ifndef CYG_DEVICE_SERIAL_RS232_ONE_VECTOR - Cyg_Interrupt read_interrupt; - #endif - - #ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL -// volatile cyg_ucount32 read_throttle; -// cyg_uint8 read_throttle_size; // this can be made configurable -// cyg_uint8 read_throttle_free; -// cyg_uint8 read_throttle_queued; -// char read_throttle_buffer[256]; - #endif - #endif - - #ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - cyg_uint8 read_mode; - cyg_uint8 read_mode_eob_count; - const char * read_mode_eob_chars; -// cyg_uint8 read_mode_translate_char; -// cyg_uint8 read_mode_escape_next_char; - - #endif - - // These are actually routines in disguize - static cyg_ISR read_isr; - static cyg_DSR read_dsr; - - // Write - Cyg_IORB * volatile write_buffer; - - // Only needed for interrupt mode - #ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - Cyg_Queuet - write_buffers; - #ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - Cyg_IORB * volatile write_buffers_ll_first; - Cyg_IORB * volatile write_buffers_ll_last; - #endif - - #ifndef CYG_DEVICE_SERIAL_RS232_ONE_VECTOR - Cyg_Interrupt write_interrupt; - #endif - #endif - - // These are actually routines in disguize - static cyg_ISR write_isr; - static cyg_DSR write_dsr; - - #ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - cyg_uint8 write_mode; - volatile cyg_int8 write_char; - #endif - - // Generic - #ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - #ifdef CYG_DEVICE_SERIAL_RS232_ONE_VECTOR - Cyg_Interrupt both_interrupt; - static cyg_ISR both_isr; - static cyg_DSR both_dsr; - #endif - cyg_uint8 kmode; - #endif - - #ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - Cyg_Mutex mutex; - #endif - -#endif // CYG_DEVICE_INTERNAL -#endif // CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HT -// End of rs232.ht - diff --git a/packages/devs/serial/rs232/common/current/include/rs232.hxx b/packages/devs/serial/rs232/common/current/include/rs232.hxx deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/include/rs232.hxx +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HXX -#define CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HXX - -//========================================================================== -// -// rs232.hxx -// -// Header file for the generic serial device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-20 -// Purpose: Define Cyg_Device_Serial data structure -// Description: This file contains the C++ class declaration of -// Cyg_Device_Serial_RS232, which is the base class for all -// RS232 serial devices. -// Usage: #include "cyg/devs/serial/rs232/common/rs232.hxx" -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include -#include // assertion macros -#include // tracing macros - -#include -#include - -#include - -// ------------------------------------------------------------------------- -// Cyg_Device_Serial_RS232 - -class Cyg_Device_Serial_RS232 - : public Cyg_Device_Serial -{ - // nothing extra -}; - -#endif // CYGONCE_DEVS_SERIAL_RS232_COMMON_RS232_HXX -// End of rs232.hxx - diff --git a/packages/devs/serial/rs232/common/current/tests/PKGconf.mak b/packages/devs/serial/rs232/common/current/tests/PKGconf.mak deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/tests/PKGconf.mak +++ /dev/null @@ -1,39 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/common/tests -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_serial_rs232_common -include ../../../../../../pkgconf/pkgconf.mak - -TESTS := serial_test - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst - - - diff --git a/packages/devs/serial/rs232/common/current/tests/serial_test.c b/packages/devs/serial/rs232/common/current/tests/serial_test.c deleted file mode 100644 --- a/packages/devs/serial/rs232/common/current/tests/serial_test.c +++ /dev/null @@ -1,164 +0,0 @@ -//================================================================= -// -// serial_test.c -// -// Test that the device API for the serial device exists. -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// October 31, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-10-08 -// Description: Tests basic serial functionality. -//####DESCRIPTIONEND#### - -#include -#include // Generic test macros -#ifdef CYGPKG_KERNEL -# include -#endif - -#ifndef CYGFUN_KERNEL_API_C - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - - CYG_TEST_PASS_EXIT("N/A: Testing is not applicable " - "to this configuration"); -} - -#else - -#include // All the kernel specific stuff -#include // All the device specific stuff - -#define NTHREADS 1 -#define STACKSIZE 4096 - -static cyg_handle_t thread[NTHREADS]; -static cyg_thread thread_obj[NTHREADS]; -static char stack[NTHREADS][STACKSIZE]; - -char message1[] = "This is test message 1.\n"; -char message2[] = "This is test message 2.\n"; - -/* Only call routines that do not require user input */ -void entry0(CYG_ADDRWORD data) -{ - Cyg_IORB iorb1, iorb2; - cyg_int32 baud_rate, i; - - /* Only call routines if there is a serial device in the system */ - if ( NULL == Cyg_Device_Table[0].name || - /* strcmp is not necessarily around */ - 's' != Cyg_Device_Table[0].name[0] || - 'e' != Cyg_Device_Table[0].name[1] || - 'r' != Cyg_Device_Table[0].name[2] || - 'i' != Cyg_Device_Table[0].name[3] || - 'a' != Cyg_Device_Table[0].name[4] || - 'l' != Cyg_Device_Table[0].name[5] ) { - CYG_TEST_PASS_EXIT( "N/A: no serial device in Cyg_Device_Table" ); - return; - } - - iorb1.callback = NULL; - iorb1.buffer = message1; - iorb1.buffer_length = sizeof(message1) - 1; - cyg_write_asynchronous(Cyg_Device_Table, &iorb1); - - iorb2.buffer = message2; - iorb2.buffer_length = sizeof(message2) - 1; - cyg_write_blocking(Cyg_Device_Table, &iorb2); - - for (i = 0; i < 1000000; i++); // Delay to flush the tx buffer - - if ((cyg_serial_rs232_get_baud_rate(Cyg_Device_Table, &baud_rate )) >= 0) { - CYG_TEST_PASS_FAIL( - (cyg_serial_rs232_set_baud_rate(Cyg_Device_Table, baud_rate,&i) >= 0), - "Setting baud rate to previous baud rate."); - } else { - CYG_TEST_FAIL("Could not get baud rate."); - } - - CYG_TEST_PASS_EXIT("serial_test"); -} - -/* Make calls to the rest of the API */ -void entry_bogus(CYG_ADDRWORD data) -{ - Cyg_IORB iorb; - char buf[1024]; - cyg_uint32 old; - iorb.buffer = buf; - iorb.buffer_length = sizeof(buf); - - // Set mode to interrupt - cyg_serial_rs232_set_kmode(Cyg_Device_Table, (cyg_uint32)1); - // cyg_serial_rs232_get_kmode(Cyg_Device_Table); // Doesn't exist yet - - // These could go in the entry0 routine - cyg_serial_rs232_get_line_mode(Cyg_Device_Table, &old); - cyg_serial_rs232_set_line_mode(Cyg_Device_Table, 1, &old); - - cyg_serial_rs232_get_baud_rate(Cyg_Device_Table, &old); - cyg_serial_rs232_set_baud_rate(Cyg_Device_Table, 1, &old); - - cyg_serial_rs232_get_read_mode(Cyg_Device_Table, &old); - cyg_serial_rs232_set_read_mode(Cyg_Device_Table, 1, &old); - - cyg_serial_rs232_set_read_data(Cyg_Device_Table, 1, NULL, 0); - cyg_read_asynchronous(Cyg_Device_Table, &iorb); - cyg_read_blocking(Cyg_Device_Table, &iorb); - cyg_read_cancel(Cyg_Device_Table, &iorb); - - // cyg_serial_rs232_set_write_mode(Cyg_Device_Table, 1);// Doesn't exist yet - // cyg_serial_rs232_get_write_mode(Cyg_Device_Table);// Doesn't exist yet - cyg_write_asynchronous(Cyg_Device_Table, &iorb); - cyg_write_blocking(Cyg_Device_Table, &iorb); - // cyg_write_cancel(Cyg_Device_Table, &iorb); // Doesn't exist yet -} - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - - cyg_thread_create(4, entry0, (cyg_addrword_t)0, "serial_test", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); - cyg_thread_resume(thread[0]); - - cyg_scheduler_start(); - - CYG_TEST_FAIL_EXIT("Not reached"); - - entry_bogus(0); // To prevent selective linking from GC all the bogus calls. -} - -#endif // ifdef CYGFUN_KERNEL_API_C - -// EOF serial_test.cxx diff --git a/packages/devs/serial/rs232/mn10300/current/ChangeLog b/packages/devs/serial/rs232/mn10300/current/ChangeLog deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/ChangeLog +++ /dev/null @@ -1,306 +0,0 @@ -1998-10-24 Hugo Tyson - - * include/pkgconf/serial_mn10300.h: - Only define anything if we have the correct hardware platform and - NOT a simulator target for that platform, as well as the device - package itself being defined. - -1998-10-23 Hugo Tyson - - * tests/mn10300_1_serial_test.cxx: - Move include of testing header above the check for "can we test". - - * tests/mn10300_2_serial_test.cxx: - Move include of testing header above the check for "can we test". - Assign dummy to unused baud_rate to prevent warning; this keeps - this test as similar as possible to the others. - -Thu Oct 22 13:15:06 BST 1998 Chris Provenzano - - * include/serial_mn10300_1.hxx, include/serial_mn10300_2.hxx - * src/serial_mn10300_1.cxx, src/serial_mn10300_2.cxx - Fix PR17883. 0 byte writes hang driver. - - * mn10300_1_serial_test.cxx, mn10300_2_serial_test.cxx - Fix up some coding standard problems. - -Wed Oct 21 17:50:04 BST 1998 Chris Provenzano - - * mn10300_2_serial_out_blocking.cxx: Removed. It is no longer - pertinent. All functionality is in mn10300_2_serial_write_blocking.cxx - which is an internal test not to be sent out this release. - - * PKGconf.mak: Added two new API tests to build. - - * mn10300_1_serial_test.cxx, mn10300_2_serial_test.cxx: Two new tests - that test just the API and not much of the functionality. These tests - meet or exceed the previous existence/spelling tests of the API and - therefore replace all the serial[x].cxx tests which were removed. - -Tue Oct 20 15:54:43 1998 Jonathan Larmour - - * src/PKGconf.mak: - Remove unnecessary override of PKGCONF_CXXFLAGS - -Tue Oct 20 11:15:30 BST 1998 Chris Provenzano - - * tests/PKGconf.mak: The defaul build should only build tests that - can be run with the automated test infrastructure. I.E. None. - - * tests/README, tests/serial3.cxx, tests/serial4.cxx tests/serial5.cxx - * tests/serial7.cxx, tests/set_baud_rate.cxx: Removed trash tests. - Much better tests along with testing infrastructure are on the way. - -1998-10-19 Jesper Skov - - * include/pkgconf/serial_mn10300.h: Undid 1998-10-16 change. - -1998-10-16 Jesper Skov - - * include/pkgconf/serial_mn10300.h: Changed - CYGPKG_HAL_MN10300_STDEVAL1 to CYG_HAL_MN10300_STDEVAL1. - -Thu Oct 15 17:00:00 1998 John Dallaway - - * include/pkgconf/serial_mn10300.h: Disable dependence on HAL in CDL. - -Sun Sep 27 13:50:23 1998 Jesper Skov - - * tests/README: Added copyright blurb. - -Sun Sep 27 10:30:53 1998 Jesper Skov - - PR 17505 - - * src/serial_mn10300_1.cxx (get_baud_rate): Remove seemingly - spurious mutex.unlock. - -Fri Sep 25 20:59:46 1998 Jesper Skov - - * tests/README: Added. - -Fri Sep 25 19:58:38 1998 Jesper Skov - - * include/serial_mn10300_2.hxx: Use same serial divisors for 9600, - 19200 and 38400 baud as CygMon. - -Fri Sep 25 11:17:31 1998 Jesper Skov - - * tests/mn10300_2_get_baud_rate.cxx (entry0): Use a signed - variable to hold return value (baud_rate). - - * tests/serial6.cxx (entry1): Reduced delay. - Added some diag info. - Changed test numbers to match file. - - * tests/PKGconf.mak: Reintroduced input tests. - - * tests/serial3.c: - * tests/serial5.c: - Added some diag info to help identify these as input tests. - - * tests/serial3.c: - * tests/serial4.c: - * tests/serial5.c: - * tests/serial6.c: - Changed NULL-test condition to match default serial port - configuration. - -Wed Sep 23 14:34:22 1998 Jesper Skov - PR 17424 - - * src/serial_mn10300_1.cxx: - * src/serial_mn10300_2.cxx: - (io_write, io_read) Also do callbacks in poll-mode, if the pointer - is non-NULL. - -Tue Sep 22 14:26:35 1998 Jesper Skov - - * include/serial_mn10300_2.hxx: Extended driver class name with - _2. - -Thu Sep 17 13:01:21 1998 Jesper Skov - - * include/pkgconf/serial_mn10300_1.h: - * include/pkgconf/serial_mn10300_2.h: - Protect CYG_DEVICE_SERIAL_RS232_MN10300_x_KMODE_INTERRUPT with - CYGIMP_KERNEL_INTERRUPTS_DSRS. - Protect CYG_DEVICE_SERIAL_RS232_MUTEX with CYGPKG_KERNEL. - - * include/pkgconf/serial_mn10300.h: Put some requires in CDL. - -Thu Sep 17 09:46:03 1998 Jesper Skov - - * tests/PKGconf.mak: Removed TESTS_IN and TESTS_OTHER since they - fail. - -Tue Sep 15 02:23:06 BST 1998 Chris Provenzano - - * include/serial_mn10300_1.hxx, include/serial_mn10300_1.hxx, - * src/serial_mn10300_1.cxx, src/serial_mn10300_2.cxx: - Use positive macros instead of negative changing all - ...DO_NOT_DECLARE macros to ...DECLARE - -1998-09-12 Bart Veer - - * include/pkgconf/serial_mn10300.h: - Added missing descriptions (PR 17184) - -Fri Sep 11 10:25:20 1998 Jesper Skov - - * src/serial_mn10300_1.cxx (set_kmode): - * src/serial_mn10300_2.cxx (set_kmode): - Fixed Assertion. - - * include/serial_mn10300_2.hxx: - * include/serial_mn10300_1.hxx: - Use interrupt vectors defined by hal_intr.h. - -Thu Sep 10 11:20:08 1998 Jesper Skov - PR#17176 - - * include/serial_mn10300_1.hxx: Removed conditionals around - set_kmode. - * src/serial_mn10300_1.cxx (io_read_cancel): Made to compile - without KMODE_INTERRUPT. - (set_kmode): Added dummy function for use when only one kmode is - configured. - - * include/serial_mn10300_2.hxx: Removed conditionals around - set_kmode. - * src/serial_mn10300_2.cxx (io_read_cancel): Made to compile - without KMODE_INTERRUPT. - (set_kmode): Added dummy function for use when only one kmode is - configured. - -1998-09-04 Bart Veer - - * include/pkgconf/serial_mn10300.h: - Fixed the parent definition for the package. - -1998-09-03 Bart Veer - - * src/serial_mn10300_2.cxx: - * src/serial_mn10300_1.cxx: - * include/pkgconf/serial_mn10300.h: - Provide minimal support for configuration data. - -Thu Sep 3 15:58:13 1998 Jonathan Larmour - - * include/pkgconf/serial_mn10300.h, - include/pkgconf/serial_mn10300_2.h: - Move these files here from devs/common/current/include/pkgconf/ - renaming serial_mn10300_1.h to serial_mn10300.h - -Thu Sep 3 10:09:52 1998 Tim Goodwin - - * tests/serial7.cxx: - Comments claim this is test 2 and test 5! - -Wed Sep 2 22:11:03 1998 Jonathan Larmour - - * include/serial_mn10300.hxx, include/serial_mn10300_2.hxx: - Rename serial_mn10300.hxx to serial_mn10300_2.hxx - - * include/serial_mn10300_2.hxx, src/serial_mn10300_2.cxx: - Change all mentions of serial_mn10300.hxx to serial_mn10300_2.hxx - including things in comments - -Fri Aug 28 09:48:38 1998 Jonathan Larmour - - * tests/mn10300_2_get_baud_rate.cxx, - tests/mn10300_2_serial_out_asynchronous.cxx, - tests/mn10300_2_serial_out_blocking.cxx, tests/serial3.cxx, - tests/serial4.cxx, tests/serial5.cxx, tests/serial6.cxx, - tests/serial7.cxx, tests/set_baud_rate.cxx: - Change use of main() as the entry point to cyg_start() under the - new entry point scheme. Remove return codes as cyg_start() returns - void, not int. - -Wed Jul 29 17:48:58 BST 1998 Chris Provenzano - - * include/serial_mn10300.hxx, src/serial_mn10300_2.cxx: - Support baudrates up to 460800 - - * tests/PKGconf.mak, - * tests/get_baud_rate.cxx, tests/mn10300_2_get_baud_rate.cxx: - Rename get_baud_rate.cxx to mn10300_2_get_baud_rate.cxx - -Wed Jul 29 16:12:29 BST 1998 Chris Provenzano - - * serial/rs232/mn10300/current/tests/PKGconf.mak: - Add more tests. - - * tests/mn10300_2_serial_out_blocking.cxx: Use correct - device macro for identifying declared device. - - * tests/mn10300_2_serial_out_asynchronous.cxx: Replaces - old serial2.cxx test. Does a lot more testing too. - - * tests/serial1.cxx, tests/serial2.cxx: Remove old tests. - -Wed Jul 29 13:38:27 BST 1998 Chris Provenzano - - * serial/rs232/mn10300/current/tests/PKGconf.mak: - Add more tests. - - * src/serial_mn10300_2.cxx: If interrupt mode is configured - then make that the default mode. This is required to let - devices work with the ROM monitor as the read isr needs to - catch ^C when the kernel is running. - - * src/serial_mn10300_2.cxx: Fix interrupt mode to DTRT - when a 0 buffer_length IORB is passed to io_write(). - - * tests/mn10300_2_serial_out_blocking.cxx: Replaces old - serial1.cxx test. Does a lot more testing too. - -Tue Jul 28 21:19:17 BST 1998 Chris Provenzano - - * tests/PKGconf.mak: Sort tests by device testing guidelines - - * tests/serial1.cxx: Update test to use CYGVAR_DEVICE_TEST_NAME - Added small stress test and also test for setting of - xferred_length in returned IORB buffer. - - * tests/set_baud_rate.cxx: Some fixes to let it compile. - -Mon Jul 27 23:39:57 BST 1998 Chris Provenzano - - * include/serial_mn10300.hxx: - Remove CYG_DEVICE_..._KMODE_ASSERT configuration option. - Selective linking will DTRT for this option. - - * tests/get_baud_rate.cxx, tests/serial2.cxx, tests/serial4.cxx, - * tests/serial6.cxx, tests/serial7.cxx: - Use macro device names instead of hardcoded names. - -Mon Jul 27 17:33:59 BST 1998 Chris Provenzano - - * Changelog: Initial ChangeLog entry. - - -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - diff --git a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300.h b/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300.h deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef CYGONCE_PKGCONF_SERIAL_MN10300_H -#define CYGONCE_PKGCONF_SERIAL_MN10300_H -// ==================================================================== -// -// pkgconf/serial_mn10300.h -// -// Device configuration file for mn10300 serial devices -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): bartv -// Contributors: bartv -// Date: 1998-04-24 -// Purpose: To allow the user to edit device configuration -// options for the mn10300 serial devices -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -#include - -/* Only define options if the driver is to be present. */ -#if defined( CYGPKG_HAL_MN10300 ) && \ - !defined( CYGPKG_HAL_MN10300_SIM ) && \ - defined( CYGPKG_DEVICES_SERIAL_RS232_MN10300 ) - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_DEVICES_SERIAL_RS232_MN10300 { - display "MN10300 serial devices" - parent CYGPKG_DEVICES_SERIAL_RS232_COMMON -# requires CYGPKG_HAL_MN10300_STDEVAL1 - requires CYGPKG_KERNEL - description " - Drivers for the on-chip RS232 devices." - } - - cdl_component CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 { - display "On-chip serial device 1" - parent CYGPKG_DEVICES_SERIAL_RS232_MN10300 - requires CYGPKG_KERNEL - description " - Driver for the first on-chip RS232 device." - } - - cdl_component CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 { - display "On-chip serial device 2" - parent CYGPKG_DEVICES_SERIAL_RS232_MN10300 - requires CYGPKG_KERNEL - description " - Driver for the second on-chip RS232 device." - } - - }}CFG_DATA -*/ - -#define CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 -#define CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 - -#endif /* ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300 et al */ - -#endif /* CYGONCE_PKGCONF_SERIAL_MN10300_H */ -/* EOF serial_mn10300.h */ diff --git a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_1.h b/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_1.h deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_1.h +++ /dev/null @@ -1,167 +0,0 @@ -#ifndef CYGONCE_PKGCONF_SERIAL_MN10300_1_H -#define CYGONCE_PKGCONF_SERIAL_MN10300_1_H -// ==================================================================== -// -// pkgconf/serial_mn10300_1.h -// -// Device configuration file for mn10300 serial 1 -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors:proven -// Date: 1998-04-24 -// Purpose: To allow the user to edit device specific configuration -// for the mn10300 1 serial device. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -#include - -#ifdef CYGPKG_KERNEL -#include -#endif - -/* Only define options if the driver is to be present. */ -#ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 - -/* ==================================================================== - * First we define all the options that are exportable to the user. - * These options will show/hide various methods for the class. - * These options are always device specific. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. One must be defined. - * Both can be defined. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_POLLED -#ifdef CYGIMP_KERNEL_INTERRUPTS_DSRS -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT -#endif - -/* --------------------------------------------------------------------- - * Define if we do diag output. This could possible be another kmode. - * --proven 19980512 - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_ASSERT - -/* --------------------------------------------------------------------- - * Define the default baudrate and line mode. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE 19200 - -/* --------------------------------------------------------------------- - * Define if non binary terminal protocol modes are needed. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_MN10300_1_WRITE_MODES - - -#ifdef CYG_DEVICE_INTERNAL -/* ==================================================================== - * Now define internal only options. These options dictate the struture - * of a class but have no effect on the methods declared for a class. - */ - -/* --------------------------------------------------------------------- - * The need for queues is only necessary in interrupt mode. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT - -/* --------------------------------------------------------------------- - * Define the number of iorb read buffers the serial read_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the read_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - -/* --------------------------------------------------------------------- - * Define the number of iorb write buffers the serial write_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the write_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT - -/* ==================================================================== - * Duplicate the device specific options to device generic options. - * DO NOT modify these options. Modify the corresponding options above. - * This is so the internal source files can be compiled from the same - * common sources. These defines can never be exported to the user. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_INTERRUPT -#define CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT 1 -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_POLLED -#define CYG_DEVICE_SERIAL_RS232_KMODE_POLLED 0 -#endif - -/* --------------------------------------------------------------------- - * Define what line modes the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_LINE_MODES -#define CYG_DEVICE_SERIAL_RS232_LINE_MODES -#endif - -/* --------------------------------------------------------------------- - * Define any terminal protocols need to be supported. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_READ_MODES -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_WRITE_MODES -#define CYG_DEVICE_SERIAL_RS232_WRITE_MODES -#endif - - -#ifdef CYGPKG_KERNEL -/* --------------------------------------------------------------------- - * Define if a mutex is needed to lock out multiple threads accessing - * the serial driver. If not defined then it is assumes only one - * thread will access the driver at a given time. - */ -#define CYG_DEVICE_SERIAL_RS232_MUTEX -#endif /* CYGPKG_KERNEL */ - -#endif // CYG_DEVICE_INTERNAL - -#endif /* ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 */ - -#endif /* CYGONCE_PKGCONF_SERIAL_MN10300_1_H */ -/* EOF serial_mn10300_1.h */ diff --git a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_2.h b/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_2.h deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/include/pkgconf/serial_mn10300_2.h +++ /dev/null @@ -1,160 +0,0 @@ -#ifndef CYGONCE_PKGCONF_SERIAL_MN10300_2_H -#define CYGONCE_PKGCONF_SERIAL_MN10300_2_H -// ==================================================================== -// -// pkgconf/serial_mn10300_2.h -// -// Device configuration file for mn10300 serial 2 -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors:proven -// Date: 1998-04-24 -// Purpose: To allow the user to edit device specific configuration -// for the mn10300 2 serial device. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -#include - -#ifdef CYGPKG_KERNEL -#include -#endif - -/* Only define options if the driver is to be present. */ -#ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 - -/* ==================================================================== - * First we define all the options that are exportable to the user. - * These options will show/hide various methods for the class. - * These options are always device specific. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. One must be defined. - * Both can be defined. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_POLLED -#ifdef CYGIMP_KERNEL_INTERRUPTS_DSRS -#define CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT -#endif - -/* --------------------------------------------------------------------- - * Define the default baudrate and line mode. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE 38400 - -/* --------------------------------------------------------------------- - * Define if non binary terminal protocol modes are needed. - */ -#define CYG_DEVICE_SERIAL_RS232_MN10300_2_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_MN10300_2_WRITE_MODES - - -#ifdef CYG_DEVICE_INTERNAL -/* ==================================================================== - * Now define internal only options. These options dictate the struture - * of a class but have no effect on the methods declared for a class. - */ - -/* --------------------------------------------------------------------- - * The need for queues is only necessary in interrupt mode. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT - -/* --------------------------------------------------------------------- - * Define the number of iorb read buffers the serial read_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the read_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - -/* --------------------------------------------------------------------- - * Define the number of iorb write buffers the serial write_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the write_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT - -/* ==================================================================== - * Duplicate the device specific options to device generic options. - * DO NOT modify these options. Modify the corresponding options above. - * This is so the internal source files can be compiled from the same - * common sources. These defines can never be exported to the user. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_INTERRUPT -#define CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT 1 -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_POLLED -#define CYG_DEVICE_SERIAL_RS232_KMODE_POLLED 0 -#endif - -/* --------------------------------------------------------------------- - * Define what line modes the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_LINE_MODES -#define CYG_DEVICE_SERIAL_RS232_LINE_MODES -#endif - -/* --------------------------------------------------------------------- - * Define any terminal protocols need to be supported. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_READ_MODES -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_WRITE_MODES -#define CYG_DEVICE_SERIAL_RS232_WRITE_MODES -#endif - -#ifdef CYGPKG_KERNEL -/* --------------------------------------------------------------------- - * Define if a mutex is needed to lock out multiple threads accessing - * the serial driver. If not defined then it is assumes only one - * thread will access the driver at a given time. - */ -#define CYG_DEVICE_SERIAL_RS232_MUTEX -#endif /* CYGPKG_KERNEL */ - -#endif // CYG_DEVICE_INTERNAL - -#endif /* ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 */ - -#endif /* CYGONCE_PKGCONF_SERIAL_MN10300_2_H */ -/* EOF serial_mn10300_2.h */ diff --git a/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_1.hxx b/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_1.hxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_1.hxx +++ /dev/null @@ -1,201 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_1_HXX -#define CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_1_HXX - -//========================================================================== -// -// serial_mn10300_1.hxx -// -// Header file for the mn10300 serial port #1 -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Purpose: Define Cyg_Device_Serial_mn10300_1 data structure -// Description: This file contains the C++ class declaration of -// Cyg_Device_Serial_mn10300_1. There can be only one. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // Device configureation file - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1 -// Include Configureation options specific to the device -#include CYG_DEVICE_SERIAL_RS232_MN10300_1 - -#include -#include // assertion macros -#include // tracing macros - -#include // Cyg_ISR, Cyg_DSR -#include // intr.hxx -#include // intr.hxx -#include // vectors -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX -#include -#endif -#include - -// ------------------------------------------------------------------------- -// The mn10300 serial 1 device is CURRENTLY unique. - -#ifdef CYG_DEVICE_INTERNAL -// Define the serial registers. -#define CYG_DEVICE_SERIAL_RS232_CR ((volatile cyg_uint16 *)0x34000810) -#define CYG_DEVICE_SERIAL_RS232_ICR ((volatile cyg_uint8 *) 0x34000814) -#define CYG_DEVICE_SERIAL_RS232_TXR ((volatile cyg_uint8 *) 0x34000818) -#define CYG_DEVICE_SERIAL_RS232_RXR ((volatile cyg_uint8 *) 0x34000819) - -#define CYG_DEVICE_SERIAL_RS232_SR_ADDR 0x3400081c -#define CYG_DEVICE_SERIAL_RS232_SR_SIZE cyg_uint16 -#define CYG_DEVICE_SERIAL_RS232_SR \ - ((volatile CYG_DEVICE_SERIAL_RS232_SR_SIZE *) CYG_DEVICE_SERIAL_RS232_SR_ADDR) - -// Timer 2 provides the baud rate divisor for serial 2 exclusivly -#define TIMER1_MD ((volatile cyg_uint8 *)0x34001001) -#define TIMER1_BR ((volatile cyg_uint8 *)0x34001011) -#define TIMER2_CR ((volatile cyg_uint8 *)0x34001021) - -#define PORT3_MD ((volatile cyg_uint8 *)0x36008025) - - -#define CYG_DEVICE_SERIAL_RS232_TVEC CYG_VECTOR_SERIAL_1_TX -#define CYG_DEVICE_SERIAL_RS232_RVEC CYG_VECTOR_SERIAL_1_RX - -// Here are the values for the timers to set the various baud rates -// Timer 1 is the 8 bit timer 1 register -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600 195 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200 98 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 48 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B57600 32 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B115200 16 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B230400 8 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B460800 4 - -// Timer 2 doesn't exist and is always 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B57600 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B115200 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B230400 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B460800 0 - -// Now set the default baudrate -#ifndef CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE -#error "Must specify a default baud rate" -#else -#if ((CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE > 0) && \ - (CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE < 9600)) -#error "Baud rates less than 9600 are not supported for the mn10300 serial port 1 at this time" -#endif -#define CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE \ - CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_1_DEFAULT_BAUD_RATE - -#include - -#endif // CYG_DEVICE_INTERNAL - -// ------------------------------------------------------------------------- -// Cyg_Device_Serial_RS232_mn10300_1 - -#define CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 Cyg_Device_Serial_RS232_mn10300_1 - -class CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 - : public Cyg_Device_Serial_RS232 -{ -#ifdef CYG_DEVICE_INTERNAL -#include -#endif - -private: - /* Internal routines */ - cyg_int32 io_read(Cyg_IORB * iorb); - cyg_int32 io_write(Cyg_IORB * iorb); - void io_write_flush(void); - -public: - - /* Constructor */ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1(); - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_ASSERT - cyg_int32 io_read_assert(Cyg_IORB * iorb); - cyg_int32 io_write_assert(Cyg_IORB * iorb); -#endif - - cyg_int32 io_read_cancel(Cyg_IORB * iorb); - cyg_int32 io_write_cancel(Cyg_IORB * iorb); - cyg_int32 io_read_blocking(Cyg_IORB * iorb); - cyg_int32 io_write_blocking(Cyg_IORB * iorb); - cyg_int32 io_read_asynchronous(Cyg_IORB * iorb); - cyg_int32 io_write_asynchronous(Cyg_IORB * iorb); - - cyg_int32 set_kmode(cyg_uint32); - cyg_int32 get_kmode(void); - - cyg_int32 set_baud_rate(cyg_uint32); - cyg_int32 get_baud_rate(void); - - cyg_int32 set_line_mode(cyg_uint32); - cyg_int32 get_line_mode(void); - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_READ_MODES - cyg_int32 set_read_mode(cyg_uint32); - cyg_int32 set_read_data(cyg_uint32 /* mode */, const char * /* data */, cyg_uint32 /* count */); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_WRITE_MODES - cyg_int32 set_write_mode(cyg_uint32); -#endif -}; - -// Declare exported variables -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_DECLARE -extern CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME; -#endif -#endif - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_1 - -#endif // CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_1_HXX -// End of serial_mn10300_1.hxx - diff --git a/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_2.hxx b/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_2.hxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/include/serial_mn10300_2.hxx +++ /dev/null @@ -1,203 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_2_HXX -#define CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_2_HXX - -//========================================================================== -// -// serial_mn10300_2.hxx -// -// Header file for the mn10300 serial port #2 -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Purpose: Define Cyg_Device_Serial_mn10300_2 data structure -// Description: This file contains the C++ class declaration of -// Cyg_Device_Serial_mn10300_2. There can be only one. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // Device configureation file - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2 -// Include Configureation options specific to the device -#include CYG_DEVICE_SERIAL_RS232_MN10300_2 - -#include -#include // assertion macros -#include // tracing macros - -#include // Cyg_ISR, Cyg_DSR -#include // intr.hxx -#include // intr.hxx -#include // vectors -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX -#include -#endif -#include - -// ------------------------------------------------------------------------- -// The mn10300 serial 2 device is unique. - -#ifdef CYG_DEVICE_INTERNAL -// Define the serial registers. -#define CYG_DEVICE_SERIAL_RS232_CR ((volatile cyg_uint16 *)0x34000820) -#define CYG_DEVICE_SERIAL_RS232_ICR ((volatile cyg_uint8 *) 0x34000824) -#define CYG_DEVICE_SERIAL_RS232_TXR ((volatile cyg_uint8 *) 0x34000828) -#define CYG_DEVICE_SERIAL_RS232_RXR ((volatile cyg_uint8 *) 0x34000829) - -#define CYG_DEVICE_SERIAL_RS232_SR_ADDR 0x3400082c -#define CYG_DEVICE_SERIAL_RS232_SR_SIZE cyg_uint8 -#define CYG_DEVICE_SERIAL_RS232_SR \ - ((volatile CYG_DEVICE_SERIAL_RS232_SR_SIZE *) CYG_DEVICE_SERIAL_RS232_SR_ADDR) - -#define CYG_DEVICE_SERIAL_RS232_TR ((volatile cyg_uint8 *) 0x3400082d) - -// Timer 2 provides the baud rate divisor for serial 2 exclusivly -#define TIMER2_MD ((volatile cyg_uint8 *)0x34001002) -#define TIMER2_BR ((volatile cyg_uint8 *)0x34001012) -#define TIMER2_CR ((volatile cyg_uint8 *)0x34001022) - -#define PORT3_MD ((volatile cyg_uint8 *)0x36008025) - - -#define CYG_DEVICE_SERIAL_RS232_TVEC CYG_VECTOR_SERIAL_2_TX -#define CYG_DEVICE_SERIAL_RS232_RVEC CYG_VECTOR_SERIAL_2_RX - -// Here are the values for the timers to set the various baud rates -// Timer 1 is the serial 2 timer register (division ratio 2) -// The values for 9600, 19200 and 38400 match thos used by CygMon. -// (Matsushita suggested values in comment.) -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600 126 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200 125 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400 124 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800 124 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600 70 // 119 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200 70 // 111 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 22 // 97 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B57600 88 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B115200 64 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B230400 64 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B460800 32 - -// Timer 2 is the 8 bit timer 2 register (division ratio 1) -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 196 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 98 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 49 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 24 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 21 // 12 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 10 // 6 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 16 // 3 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B57600 2 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B115200 1 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B230400 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B460800 0 - -// Now set the default baudrate -#ifndef CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE -#error "Must specify a default baud rate" -#else -#if ((CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE > 0) && \ - (CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE < 600)) -#error "Baud rates less than 600 are not supported for the mn10300 at this time" -#endif -#define CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE \ - CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_2_DEFAULT_BAUD_RATE - -#include - -#endif // CYG_DEVICE_INTERNAL - -// ------------------------------------------------------------------------- -// Cyg_Device_Serial_RS232_mn10300_2 - -#define CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 Cyg_Device_Serial_RS232_mn10300_2 - -class CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 - : public Cyg_Device_Serial_RS232 -{ -#ifdef CYG_DEVICE_INTERNAL -#include -#endif - -protected: - /* Internal routines */ - cyg_int32 io_read(Cyg_IORB * iorb); - cyg_int32 io_write(Cyg_IORB * iorb); - void io_write_flush(void); - -public: - - /* Constructor */ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2(); - - cyg_int32 io_read_cancel(Cyg_IORB * iorb); - cyg_int32 io_write_cancel(Cyg_IORB * iorb); - - cyg_int32 io_read_assert(Cyg_IORB * iorb); - cyg_int32 io_write_assert(Cyg_IORB * iorb); - cyg_int32 io_read_blocking(Cyg_IORB * iorb); - cyg_int32 io_write_blocking(Cyg_IORB * iorb); - cyg_int32 io_read_asynchronous(Cyg_IORB * iorb); - cyg_int32 io_write_asynchronous(Cyg_IORB * iorb); - - cyg_int32 set_kmode(cyg_uint32); - cyg_int32 get_kmode(void); - - cyg_int32 set_baud_rate(cyg_uint32); - cyg_int32 get_baud_rate(void); - - cyg_int32 set_line_mode(cyg_uint32); - cyg_int32 get_line_mode(void); - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_READ_MODES - cyg_int32 set_read_mode(cyg_uint32); - cyg_int32 set_read_data(cyg_uint32 /* mode */, const char * /* data */, cyg_uint32 /* count */); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_WRITE_MODES - cyg_int32 set_write_mode(cyg_uint32); -#endif -}; - -// Declare exported variables -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_DECLARE -extern CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME; -#endif -#endif - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_2 - -#endif // CYGONCE_DEVS_SERIAL_RS232_MN10300_SERIAL_MN10300_2_HXX -// End of serial_mn10300_2.hxx - diff --git a/packages/devs/serial/rs232/mn10300/current/src/PKGconf.mak b/packages/devs/serial/rs232/mn10300/current/src/PKGconf.mak deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/src/PKGconf.mak +++ /dev/null @@ -1,41 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/mn10300/src -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_serial_rs232_mn10300 -include ../../../../../../pkgconf/pkgconf.mak - -LIBRARY := libtarget.a -COMPILE := serial_mn10300_2.cxx serial_mn10300_1.cxx -OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - diff --git a/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_1.cxx b/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_1.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_1.cxx +++ /dev/null @@ -1,1148 +0,0 @@ -//================================================================= -// -// serial_mn10300_1.cxx -// -// Driver for the mn10300 serial port #1 -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Description: Class methods for the class Cyg_Device_Serial_mn10300_1 -//####DESCRIPTIONEND#### - -#include // To see if we need to bother -#ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 // Do we need to build this file - -#define CYG_DEVICE_INTERNAL -#include -#include // Cyg_Binary_Semaphore - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_DECLARE -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME; -#endif -#endif - -static char eob_chars[] = { 4, 10, 13, 26 }; - -// ------------------------------------------------------------------------ -// Constructor for serial device -// -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1() -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - : read_interrupt(CYG_DEVICE_SERIAL_RS232_RVEC, 4, (CYG_ADDRWORD)this, read_isr, read_dsr), - write_interrupt(CYG_DEVICE_SERIAL_RS232_TVEC, 4, (CYG_ADDRWORD)this, write_isr, write_dsr) -#endif -{ - CYG_REPORT_FUNCTION(); - - // Initialize any data - read_buffer = NULL; - - // read_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - read_buffers_ll_last = NULL; - read_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - // Default to ASCII mode if READ_MODES is configured. - read_mode = 0xff; - read_mode_eob_chars = eob_chars; - read_mode_eob_count = sizeof(eob_chars); -// read_mode_translate_char = 0; -// read_mode_escape_next_char = 0; -#endif - - write_buffer = NULL; - // write_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - write_buffers_ll_last = NULL; - write_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - // Default to CR to CRLF translation - write_mode = 1; - write_char = 0; -#endif - - // Set the timers before enabling them or the serial device - *TIMER1_BR = CYG_DEVICE_SERIAL_RS232_T1_VALUE; - - // Timer1 sourced from IOCLK - *TIMER1_MD = 0x80; - - // Mode on PORT3, used for serial line controls. - *PORT3_MD = 0x01; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.attach(); - write_interrupt.attach(); - // Clear interrupts for now. - *CYG_DEVICE_SERIAL_RS232_ICR = 0x00; - /* Do not unmask the interrupt unless interrupt is the default mode */ -#endif - - // Set the control register, finallizing the settup. - // Source from timer 1, 8bit chars, enable tx and rx - *CYG_DEVICE_SERIAL_RS232_CR = 0xc084; -} - -// ------------------------------------------------------------------------ -// set_kmode() -// Set the kernel mode to (polled, interrrupt, ...) -// Only applicable if we have multiple modes. - -#if defined (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) && \ - defined (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - set_kmode(cyg_uint32 new_mode) -{ - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* Switching from polled mode to interrupt mode is easy */ - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) { - if (new_mode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - - kmode = CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT; - - /* Turn on interrupts by unmasking the appropriate vector */ - read_interrupt.unmask_interrupt(read_interrupt.get_vector()); - write_interrupt.unmask_interrupt(write_interrupt.get_vector()); - } - } - /* Switching to polled mode should flush the buffers */ - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return 0; -} - -#else - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - set_kmode(cyg_uint32 new_mode) -{ -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED == new_mode, - "Can only select polled mode" ); -#endif -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT == new_mode, - "Can only select interrupt mode" ); -#endif - - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// Baud rate - -static struct baud_rate { - cyg_uint8 tm_br; -} baud_rate_table[] = { - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B0 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B50 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B75 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B110 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B134.5 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B150 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B300 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B1200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B1800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B2400 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 }, // B4800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600 }, // B9600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200 }, // B19200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 }, // B38400 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B57600 }, // B57600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B115200 }, // B115200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B230400 }, // B230400 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B460800 } // B460800 -}; - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -get_baud_rate() -{ - cyg_ucount8 i; - cyg_uint8 tm_br; - - tm_br = *TIMER1_BR; - - for (i = 0; i < (sizeof(baud_rate_table) / sizeof(struct baud_rate)); i++) { - if (tm_br == baud_rate_table[i].tm_br) { - return(i); - } - } - - return(-1); -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -set_baud_rate(cyg_uint32 baud_rate) -{ - cyg_int32 old_baud_rate; - cyg_uint16 sc_icr; - - if (baud_rate > (sizeof(baud_rate_table) / sizeof(struct baud_rate))) { - return -1; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - /* Get the old baud rate */ - if ((old_baud_rate = this->get_baud_rate()) < 0) - old_baud_rate = 0; - - /* Turn off read and write */ - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr & 0x3fff; - - /* Turn off timer 1 */ - *TIMER1_MD = 0x00; - - *TIMER1_BR = baud_rate_table[baud_rate].tm_br; - - /* Reenable timer and serial port for valid baud rates greater than 0 */ - if (baud_rate_table[baud_rate].tm_br) { - *TIMER1_MD = 0x80; - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr | 0xc000; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return(old_baud_rate); - -} - -// ------------------------------------------------------------------------ -// Line mode -// -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -get_line_mode() -{ - cyg_uint16 sc_icr; - cyg_int32 ret; - - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - - /* bits per byte */ - if (sc_icr & 0x0080) { - ret = CS8; - } else { - ret = CS7; - } - /* Stop bits */ - if (sc_icr & 0x0008) { - ret |= CSTOPB; - } - /* Parity */ - switch (sc_icr & 0x0070) { - case 0x0000: /* No parity */ - break; - case 0x0070: /* Odd parity */ - ret |= PARODD; - /* Fall through */ - case 0x0060: /* Even parity */ - ret |= PARENB; - break; - default: - ret = -1; - break; - } - - return ret; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -set_line_mode(cyg_uint32 line_mode) -{ - cyg_int32 old_line_mode; - cyg_uint16 sc_icr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - - old_line_mode = this->get_line_mode(); - - switch(line_mode & CSIZE) { - case CS7: - sc_icr &= ~0x0080; - break; - case CS8: - sc_icr |= 0x0080; - break; - default: - return -1; - break; - } - if (line_mode & CSTOPB) { - sc_icr |= 0x0008; - } else { - sc_icr &= ~0x0008; - } - if (line_mode & PARENB) { - if (!(line_mode & PARODD)) { - sc_icr &= ~0x0010; - sc_icr |= 0x0060; - } else { - sc_icr |= 0x0070; - } - } else { - sc_icr &= ~0x0070; - } - - /* Set the new flags all in one write. */ - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return old_line_mode; - -} - -// ------------------------------------------------------------------------ -// set_read_mode() -// Set the read mode (CRNL translation, EOL detection, escape characters) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -set_read_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - if (new_mode) { - read_mode = 0xff; - } else { - read_mode = 0; - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -set_read_data(cyg_uint32 mode, const char * data, cyg_uint32 count) -{ - cyg_int32 ret = 0; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - -// SHould turn off interrupts - switch(mode) { - case CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB: - if (data == NULL) { - read_mode_eob_count = sizeof(eob_chars); - read_mode_eob_chars = eob_chars; - } else { - read_mode_eob_count = count; - read_mode_eob_chars = data; - } - break; - default: - ret = -1; - break; - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -static inline void -throttle(char ch) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - cyg_uint8 tmp; - - tmp = (data->read_throttle_free + 1) % data->read_throttle_size; - /* Check that there is space to put the character */ - if (tmp != data->read_throttle_queued) { - data->read_throttle_buffer[tmp] = ch; - data->read_throttle_free = tmp; - } - data->read_throttle = 1; -#endif -} - -// ------------------------------------------------------------------------ -// read_isr() -// -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - read_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 *)isr_data; - volatile cyg_uint8 * tty_rx, ch; - cyg_uint32 off, ret; - cyg_uint8 eob = 0; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regaurdless of kmode - data->read_interrupt.acknowledge_interrupt(vector); -#endif - - tty_rx = CYG_DEVICE_SERIAL_RS232_RXR; - ch = *tty_rx; - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - while (data->read_mode) { - cyg_ucount8 i; - - // On escape characters, skip mode checks; break - // Deal with flow control characters; return - - /* Deal with ignored characters first */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_IGN) { - if (ch == 10) - return ret; - } - /* Translate characters before checking on EOB conditions. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_TRN) { - if (ch == 13) - ch = 10; - } - /* Return a not full IORB on an EOB condition. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB) { - for (i = 0; i < data->read_mode_eob_count; i++) { - if (ch == data->read_mode_eob_chars[i]) { - eob = 1; - break; - } - } - } - break; - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - if (read_throttle == 0) { -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (data->read_buffer == NULL) { - while ((data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer))) { - if (data->read_buffer->xferred_length < data->read_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - break; - } - } - if (data->read_buffer == NULL) { - ret = Cyg_Interrupt::CALL_DSR; - throttle(ch); - return ret; - } - } -#endif - - off = data->read_buffer->xferred_length++; - *((char *)data->read_buffer->buffer + off) = ch; - - // This is still ugly --proven 19980526 - if ((data->read_buffer->xferred_length == data->read_buffer->buffer_length) || eob) { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); -#else - data->read_buffer = NULL; -#endif - ret = Cyg_Interrupt::CALL_DSR; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - while ((data->read_buffer != NULL) && - (data->read_buffer->xferred_length == data->read_buffer->buffer_length)) { - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); - ret = Cyg_Interrupt::CALL_DSR; // Probably not necessary - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - } else { - throttle(ch); - } -#endif - - return ret; - -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - read_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_read() will be called again to handle that buffer. - */ - - for (i = 0, count = data->read_buffers.min_done(); i < count; i++) { - iorb = data->read_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->read_buffers_ll_first)) { - data->read_buffers_ll_first = iorb->next; - data->read_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_read(Cyg_IORB * iorb) -{ - volatile cyg_uint16 * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_RVEC; - - iorb->next = NULL; - iorb->xferred_length = 0; - iorb->status = CYG_IORB_OK; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (read_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (read_buffers.min_free() == 0) { - if (read_buffers_ll_first) { - read_buffers_ll_last->next = iorb; - } else { - read_buffers_ll_first = iorb; - } - read_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - read_buffers.enqueue(iorb); - - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - /* We may have to enable CTR here to tell the other side to start - * sending characters --proven 19980513 */ - return 0; - } -#else - read_buffer = iorb; -#endif - -#ifndef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - /* - * Special nonblocking mode for polled only drivers. - * This is so BSPs and other non kernel things can poll for each char. - * individually. Use only if read modes don't otherwise solve the problem. - */ - if (CYG_IORB_NOBLOCK == iorb->opcode) { - if ((*tty_status & 0x0010) != 0) { - read_isr(vector, (CYG_ADDRWORD)this); - } - return 0; - } -#endif - - do { - do { - while ((*tty_status & 0x0010) == 0) continue; - } while (read_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_dsr(vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in read_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of read_dsr to know that fact. The read_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - } while (read_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// set_write_mode() -// Set the write mode (CRNL translation) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: -set_write_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - write_mode = new_mode; -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// write_isr() -// We set the mn10300 to interrupt as soon as the transmission buffer is -// empty. this is before the transmission is completed though. For proper -// flush semantics the driver should switch to getting an interrupt for -// transmission completed then check if it has completed and if not -// return HANDLED. The next interrupt should then switch back. -// --proven 19980523 -// - -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - write_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 *)isr_data; - volatile cyg_uint8 * tty_tx, ch; - cyg_uint32 off, ret; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regaurdless of kmode - data->write_interrupt.acknowledge_interrupt(vector); - - while ((data->write_buffer == NULL) || - (data->write_buffer->xferred_length == data->write_buffer->buffer_length)) { - data->write_buffer = data->write_buffers.get_next_inuse(data->write_buffer); - ret = Cyg_Interrupt::CALL_DSR; - if (!data->write_buffer) { - return ret; - } - } -#else - if (data->write_buffer->xferred_length == data->write_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - data->write_buffer = NULL; - return ret; - } -#endif - - off = data->write_buffer->xferred_length++; - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - if (data->write_mode) { - // This is for cr to cr/lf conversion - if ((ch = data->write_char)) { - data->write_char = '\0'; - } else { - if ((*((char *)data->write_buffer->buffer + off)) != '\n') { - ch = *((char *)data->write_buffer->buffer + off); - } else { - // Decrement so next pass will DTRT - data->write_buffer->xferred_length--; - data->write_char = '\n'; - ch = '\r'; - } - } - } else -#endif - ch = *((char *)data->write_buffer->buffer + off); - - tty_tx = CYG_DEVICE_SERIAL_RS232_TXR; - *tty_tx = ch; - // Do not modify any data structure after the data is written because - // it is possible an interrupt will call this routine before this - // invocation of this routine executes any code beyond this point. - return ret; -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1:: - write_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_write() will be called again to handle that buffer. - */ - - for (i = 0, count = data->write_buffers.min_done(); i < count; i++) { - iorb = data->write_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->write_buffers_ll_first)) { - data->write_buffers_ll_first = iorb->next; - data->write_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_write(Cyg_IORB * iorb) -{ - volatile CYG_DEVICE_SERIAL_RS232_SR_SIZE * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_TVEC; - - iorb->next = NULL; - iorb->xferred_length = 0; - iorb->status = CYG_IORB_OK; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (write_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (write_buffers.min_free() == 0) { - if (write_buffers_ll_first) { - write_buffers_ll_last->next = iorb; - } else { - write_buffers_ll_first = iorb; - } - write_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - write_buffers.enqueue (iorb); - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - if (write_buffer == NULL) { -// Must check that iorb isn't already done --proven 19980516 - if (iorb->buffer_length == 0) { - write_isr (vector, (CYG_ADDRWORD)this); - write_dsr (vector, 0, (CYG_ADDRWORD)this); - } else { - /* Prime serial write interrupts with first byte */ - while ((*tty_status & 0x0020) != 0) continue; - write_isr (vector, (CYG_ADDRWORD)this); - } - } - return 0; - } -#else - write_buffer = iorb; -#endif - - do { - do { - while ((*tty_status & 0x0020) != 0) continue; - } while (write_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - write_dsr (vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in write_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of write_dsr to know that fact. The write_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - - } while (write_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// Asynchronous versions are only configured with the -// interrupt version is configured -// -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_read_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_read_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_read (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_write_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_write_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_write (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} -#endif - -// ------------------------------------------------------------------------ -// Blocking versions just call the internal version with a callback. -// - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -static void -callback(Cyg_IORB *iorb) -{ - Cyg_Binary_Semaphore * data = (Cyg_Binary_Semaphore *)iorb->callback_data; - data->post(); -} -#endif - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_read_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore read(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&read; - iorb->callback = callback; - this->io_read(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - read.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_read(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_write_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&write; - iorb->callback = callback; - this->io_write(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - write.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_write(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -// Internal routine needed to flush writes in a blocking manner. -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_write_flush(void) -{ - Cyg_IORB iorb; - - iorb.buffer_length = 0; -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb.callback_data = (CYG_ADDRESS)&write; - iorb.callback = callback; - this->io_write(&iorb); - write.wait(); - } else -#endif - { - iorb.callback = NULL; - this->io_write(&iorb); - } -} - -// ------------------------------------------------------------------------ -// Cancel routines to stop an existing IO operation -// - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_read_cancel(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - Cyg_Scheduler::lock(); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.disable_interrupts(); -#endif - - // For now only allow the current iorb to be cancelable - // --proven 19980714 - - if (read_buffer == NULL) { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if ((read_buffer = read_buffers.get_next_inuse(read_buffer)) == NULL) -#endif - { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - } - } - if (((iorb == NULL) && read_buffer) || - (iorb && (read_buffer == iorb))) { - read_buffer->status = CYG_IORB_CANCELED; -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_buffer = read_buffers.get_next_inuse(read_buffer); -#endif - // Need to clear out any flush iorbs -- proven 19980714 - } else { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - read_dsr(CYG_DEVICE_SERIAL_RS232_RVEC, 0, (CYG_ADDRWORD)this); - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -// ------------------------------------------------------------------------ -// Assert versions. These versions bypass most of the driver code. -// These are to be used by the BSP or asserts. Only use them once -// start_sync() is called and when done normal operations is -// restarted with the end_sync() mode. -// -// Note DO NOT DO LOCKING IN THIS ROUTINE!!! -// - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_ASSERT -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_1::io_write_assert(Cyg_IORB * iorb) -{ - volatile cyg_uint16 * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - volatile cyg_uint8 * tty_tx = CYG_DEVICE_SERIAL_RS232_TXR; - cyg_uint8 ch; - - iorb->xferred_length = 0; - while (iorb->xferred_length < iorb->buffer_length) { - if ((ch = (*((char*)iorb->buffer + iorb->xferred_length++))) == '\n') { - while ((*tty_status & 0x0020) != 0) continue; - *tty_tx = '\r'; - } - while ((*tty_status & 0x0020) != 0) continue; - *tty_tx = ch; - } - return 0; -} - -#endif // #ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_KMODE_ASSERT - -#endif // #ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_1 -// EOF serial_mn10300_1.cxx diff --git a/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_2.cxx b/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_2.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/src/serial_mn10300_2.cxx +++ /dev/null @@ -1,1166 +0,0 @@ -//================================================================= -// -// serial_mn10300_2.cxx -// -// Driver for the mn10300 serial port #2 -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Description: Class methods for the class Cyg_Device_Serial_mn10300 -//####DESCRIPTIONEND#### - -#include // To see if we need to bother -#ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 // Do we need to build this file - -#define CYG_DEVICE_INTERNAL -#include -#include // Cyg_Binary_Semaphore - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_DECLARE -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME; -#endif -#endif - -static char eob_chars[] = { 4, 10, 13, 26 }; - -// ------------------------------------------------------------------------ -// Constructor for serial device -// -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2() -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - : read_interrupt(CYG_DEVICE_SERIAL_RS232_RVEC, 4, (CYG_ADDRWORD)this, read_isr, read_dsr), - write_interrupt(CYG_DEVICE_SERIAL_RS232_TVEC, 4, (CYG_ADDRWORD)this, write_isr, write_dsr) -#endif -{ - CYG_REPORT_FUNCTION(); - - // Initialize any data - read_buffer = NULL; - - // read_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - read_buffers_ll_last = NULL; - read_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - // Default to ASCII mode if READ_MODES is configured. - read_mode = 0xff; - read_mode_eob_chars = eob_chars; - read_mode_eob_count = sizeof(eob_chars); -// read_mode_translate_char = 0; -// read_mode_escape_next_char = 0; -#endif - - write_buffer = NULL; - // write_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - write_buffers_ll_last = NULL; - write_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - // Default to CR to CRLF translation - write_mode = 1; - write_char = 0; -#endif - - // Set the timers before enabling them or the serial device - *CYG_DEVICE_SERIAL_RS232_TR = CYG_DEVICE_SERIAL_RS232_T1_VALUE; - *TIMER2_BR = CYG_DEVICE_SERIAL_RS232_T2_VALUE; - - // Timer2 sourced from IOCLK - *TIMER2_MD = 0x80; - - // Mode on PORT3, used for serial line controls. - *PORT3_MD = 0x01; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.attach(); - write_interrupt.attach(); - // Clear interrupts for now. - *CYG_DEVICE_SERIAL_RS232_ICR = 0x00; - - /* Turn on interrupts by unmasking the vector */ - kmode = CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT; - read_interrupt.unmask_interrupt(read_interrupt.get_vector()); - write_interrupt.unmask_interrupt(write_interrupt.get_vector()); -#endif - - // Set the control register, finallizing the settup. - // Source from timer 2, 8bit chars, enable tx and rx - *CYG_DEVICE_SERIAL_RS232_CR = 0xc081; -} - -// ------------------------------------------------------------------------ -// set_kmode() -// Set the kernel mode to (polled, interrrupt, ...) -// Only applicable if we have multiple modes. - -#if defined (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) && \ - defined (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - set_kmode(cyg_uint32 new_mode) -{ - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* Switching from polled mode to interrupt mode is easy */ - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) { - if (new_mode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - - /* Turn on interrupts by unmasking the vector */ - kmode = CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT; - read_interrupt.unmask_interrupt(read_interrupt.get_vector()); - write_interrupt.unmask_interrupt(write_interrupt.get_vector()); - } - } - /* Switching to polled mode should flush the buffers */ - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - if (new_mode == CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) { - - this->io_write_flush(); - - /* Turn off interrupts by masking the vector */ - kmode = CYG_DEVICE_SERIAL_RS232_KMODE_POLLED; - read_interrupt.mask_interrupt(read_interrupt.get_vector()); - write_interrupt.mask_interrupt(write_interrupt.get_vector()); - } - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return 0; -} - -#else - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - set_kmode(cyg_uint32 new_mode) -{ -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED == new_mode, - "Can only select polled mode" ); -#endif -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT == new_mode, - "Can only select interrupt mode" ); -#endif - - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// Baud rate - -static struct baud_rate { - cyg_uint8 sc_txb; - cyg_uint8 tm_br; -} baud_rate_table[] = { - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B0 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B50 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B75 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B110 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B134.5 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B150 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B300 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 }, // B600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 }, // B1200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B1800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 }, // B2400 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 }, // B4800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 }, // B9600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 }, // B19200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 }, // B38400 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B57600, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B57600 }, // B57600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B115200,CYG_DEVICE_SERIAL_RS232_T2_VALUE_B115200}, // B115200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B230400,CYG_DEVICE_SERIAL_RS232_T2_VALUE_B230400}, // B230400 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B460800,CYG_DEVICE_SERIAL_RS232_T2_VALUE_B460800} // B460800 - -}; - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -get_baud_rate() -{ - cyg_ucount8 i; - cyg_uint8 tr, tm_br; - - tm_br = *TIMER2_BR; - tr = *CYG_DEVICE_SERIAL_RS232_TR; - - for (i = 0; i < (sizeof(baud_rate_table) / sizeof(struct baud_rate)); i++) { - if ((tr == baud_rate_table[i].sc_txb) && - (tm_br == baud_rate_table[i].tm_br)) { - return(i); - } - } - - return(-1); -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -set_baud_rate(cyg_uint32 baud_rate) -{ - cyg_int32 old_baud_rate; - cyg_uint16 sc_icr; - - if (baud_rate > (sizeof(baud_rate_table) / sizeof(struct baud_rate))) { - return -1; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - /* Get the old baud rate */ - if ((old_baud_rate = this->get_baud_rate()) < 0) - old_baud_rate = 0; - - /* Turn off read and write */ - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr & 0x3fff; - - /* Turn off timer 2 */ - *TIMER2_MD = 0x00; - - *CYG_DEVICE_SERIAL_RS232_TR = baud_rate_table[baud_rate].sc_txb; - *TIMER2_BR = baud_rate_table[baud_rate].tm_br; - - /* Reenable timer and serial port for valid baud rates greater than 0 */ - if (baud_rate_table[baud_rate].sc_txb && baud_rate_table[baud_rate].tm_br) { - *TIMER2_MD = 0x80; - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr | 0xc000; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return(old_baud_rate); - -} - -// ------------------------------------------------------------------------ -// Line mode - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -get_line_mode() -{ - cyg_uint16 sc_icr; - cyg_int32 ret; - - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - - /* bits per byte */ - if (sc_icr & 0x0080) { - ret = CS8; - } else { - ret = CS7; - } - /* Stop bits */ - if (sc_icr & 0x0008) { - ret |= CSTOPB; - } - /* Parity */ - switch (sc_icr & 0x0070) { - case 0x0000: /* No parity */ - break; - case 0x0070: /* Odd parity */ - ret |= PARODD; - /* Fall through */ - case 0x0060: /* Even parity */ - ret |= PARENB; - break; - default: - ret = -1; - break; - } - - return ret; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -set_line_mode(cyg_uint32 line_mode) -{ - cyg_int32 old_line_mode; - cyg_uint16 sc_icr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - sc_icr = *CYG_DEVICE_SERIAL_RS232_CR; - - old_line_mode = this->get_line_mode(); - - switch(line_mode & CSIZE) { - case CS7: - sc_icr &= ~0x0080; - break; - case CS8: - sc_icr |= 0x0080; - break; - default: - return -1; - break; - } - if (line_mode & CSTOPB) { - sc_icr |= 0x0008; - } else { - sc_icr &= ~0x0008; - } - if (line_mode & PARENB) { - if (!(line_mode & PARODD)) { - sc_icr &= ~0x0010; - sc_icr |= 0x0060; - } else { - sc_icr |= 0x0070; - } - } else { - sc_icr &= ~0x0070; - } - - /* Set the new flags all in one write. */ - *CYG_DEVICE_SERIAL_RS232_CR = sc_icr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return old_line_mode; - -} - -// ------------------------------------------------------------------------ -// set_read_mode() -// Set the read mode (CRNL translation, EOL detection, escape characters) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -set_read_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - if (new_mode) { - read_mode = 0xff; - } else { - read_mode = 0; - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -set_read_data(cyg_uint32 mode, const char * data, cyg_uint32 count) -{ - cyg_int32 ret = 0; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - -// SHould turn off interrupts - switch(mode) { - case CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB: - if (data == NULL) { - read_mode_eob_count = sizeof(eob_chars); - read_mode_eob_chars = eob_chars; - } else { - read_mode_eob_count = count; - read_mode_eob_chars = data; - } - break; - default: - ret = -1; - break; - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -static inline void -throttle(char ch) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - cyg_uint8 tmp; - - tmp = (data->read_throttle_free + 1) % data->read_throttle_size; - /* Check that there is space to put the character */ - if (tmp != data->read_throttle_queued) { - data->read_throttle_buffer[tmp] = ch; - data->read_throttle_free = tmp; - } - data->read_throttle = 1; -#endif -} - -// ------------------------------------------------------------------------ -// read_isr() -// -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - read_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 *)isr_data; - volatile cyg_uint8 * tty_rx, ch; - cyg_uint32 off, ret; - cyg_uint8 eob = 0; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regardless of kmode - data->read_interrupt.acknowledge_interrupt(vector); -#endif - - tty_rx = CYG_DEVICE_SERIAL_RS232_RXR; - ch = *tty_rx; - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - while (data->read_mode) { - cyg_ucount8 i; - - // On escape characters, skip mode checks; break - // Deal with flow control characters; return - - /* Deal with ignored characters first */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_IGN) { - if (ch == 10) - return ret; - } - /* Translate characters before checking on EOB conditions. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_TRN) { - if (ch == 13) - ch = 10; - } - /* Return a not full IORB on an EOB condition. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB) { - for (i = 0; i < data->read_mode_eob_count; i++) { - if (ch == data->read_mode_eob_chars[i]) { - eob = 1; - break; - } - } - } - break; - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - if (read_throttle == 0) { -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (data->read_buffer == NULL) { - while ((data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer))) { - if (data->read_buffer->xferred_length < data->read_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - break; - } - } - if (data->read_buffer == NULL) { - ret = Cyg_Interrupt::CALL_DSR; - throttle(ch); - return ret; - } - } -#endif - - off = data->read_buffer->xferred_length++; - *((char *)data->read_buffer->buffer + off) = ch; - - // This is still ugly --proven 19980526 - if ((data->read_buffer->xferred_length == data->read_buffer->buffer_length) || eob) { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); -#else - data->read_buffer = NULL; -#endif - ret = Cyg_Interrupt::CALL_DSR; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - while ((data->read_buffer != NULL) && - (data->read_buffer->xferred_length == data->read_buffer->buffer_length)) { - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); - ret = Cyg_Interrupt::CALL_DSR; // Probably not necessary - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - } else { - throttle(ch); - } -#endif - - return ret; - -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - read_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_read() will be called again to handle that buffer. - */ - - for (i = 0, count = data->read_buffers.min_done(); i < count; i++) { - iorb = data->read_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->read_buffers_ll_first)) { - data->read_buffers_ll_first = iorb->next; - data->read_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_read(Cyg_IORB * iorb) -{ - volatile cyg_uint8 * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_RVEC; - - iorb->next = NULL; - iorb->xferred_length = 0; - iorb->status = CYG_IORB_OK; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (read_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (read_buffers.min_free() == 0) { - if (read_buffers_ll_first) { - read_buffers_ll_last->next = iorb; - } else { - read_buffers_ll_first = iorb; - } - read_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - read_buffers.enqueue(iorb); - - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - /* We may have to enable CTR here to tell the other side to start - * sending characters --proven 19980513 */ - return 0; - } -#else - read_buffer = iorb; -#endif - -#ifndef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - /* - * Special nonblocking mode for polled only drivers. - * This is so BSPs and other non kernel things can poll for each char. - * individually. Use only if read modes don't otherwise solve the problem. - */ - if (CYG_IORB_NOBLOCK == iorb->opcode) { - if ((*tty_status & 0x10) != 0) { - read_isr(vector, (CYG_ADDRWORD)this); - } - return 0; - } -#endif - - do { - do { - while ((*tty_status & 0x10) == 0) continue; - } while (read_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_dsr(vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in read_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of read_dsr to know that fact. The read_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - } while (read_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// set_write_mode() -// Set the write mode (CRNL translation) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: -set_write_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - write_mode = new_mode; -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// write_isr() -// We set the mn10300 to interrupt as soon as the transmission buffer is -// empty. this is before the transmission is completed though. For proper -// flush semantics the driver should switch to getting an interrupt for -// transmission completed then check if it has completed and if not -// return HANDLED. The next interrupt should then switch back. -// --proven 19980523 -// - -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - write_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 *)isr_data; - volatile cyg_uint8 * tty_tx, ch; - cyg_uint32 off, ret; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regardless of kmode - data->write_interrupt.acknowledge_interrupt(vector); - - while ((data->write_buffer == NULL) || - (data->write_buffer->xferred_length == data->write_buffer->buffer_length)) { - data->write_buffer = data->write_buffers.get_next_inuse(data->write_buffer); - ret = Cyg_Interrupt::CALL_DSR; - if (!data->write_buffer) { - return ret; - } - } -#else - if (data->write_buffer->xferred_length == data->write_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - data->write_buffer = NULL; - return ret; - } -#endif - - off = data->write_buffer->xferred_length++; - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - if (data->write_mode) { - // This is for cr to cr/lf conversion - if ((ch = data->write_char)) { - data->write_char = '\0'; - } else { - if ((*((char *)data->write_buffer->buffer + off)) != '\n') { - ch = *((char *)data->write_buffer->buffer + off); - } else { - // Decrement so next pass will DTRT - data->write_buffer->xferred_length--; - data->write_char = '\n'; - ch = '\r'; - } - } - } else -#endif - ch = *((char *)data->write_buffer->buffer + off); - - tty_tx = CYG_DEVICE_SERIAL_RS232_TXR; - *tty_tx = ch; - // Do not modify any data structure after the data is written because - // it is possible an interrupt will call this routine before this - // invocation of this routine executes any code beyond this point. - return ret; -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2:: - write_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_write() will be called again to handle that buffer. - */ - - for (i = 0, count = data->write_buffers.min_done(); i < count; i++) { - iorb = data->write_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->write_buffers_ll_first)) { - data->write_buffers_ll_first = iorb->next; - data->write_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_write(Cyg_IORB * iorb) -{ - volatile CYG_DEVICE_SERIAL_RS232_SR_SIZE * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_TVEC; - - iorb->next = NULL; - iorb->xferred_length = 0; - iorb->status = CYG_IORB_OK; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (write_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (write_buffers.min_free() == 0) { - if (write_buffers_ll_first) { - write_buffers_ll_last->next = iorb; - } else { - write_buffers_ll_first = iorb; - } - write_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - write_buffers.enqueue (iorb); - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - if (write_buffer == NULL) { -// Must check that iorb isn't already done --proven 19980516 - if (iorb->buffer_length == 0) { - write_isr (vector, (CYG_ADDRWORD)this); - write_dsr (vector, 0, (CYG_ADDRWORD)this); - } else { - /* Prime serial write interrupts with first byte */ - while ((*tty_status & 0x20) != 0) continue; - write_isr (vector, (CYG_ADDRWORD)this); - } - } - return 0; - } -#else - write_buffer = iorb; -#endif - - do { - do { - while ((*tty_status & 0x20) != 0) continue; - } while (write_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - write_dsr (vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in write_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of write_dsr to know that fact. The write_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - } while (write_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// Asynchronous versions are only configured with the -// interrupt version is configured -// -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_read_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_read_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_read (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_write_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_write_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_write (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} -#endif - -// ------------------------------------------------------------------------ -// Blocking versions just call the internal version with a callback. -// - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -static void -callback(Cyg_IORB *iorb) -{ - Cyg_Binary_Semaphore * data = (Cyg_Binary_Semaphore *)iorb->callback_data; - data->post(); -} -#endif - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_read_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore read(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&read; - iorb->callback = callback; - this->io_read(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - read.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_read(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_write_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&write; - iorb->callback = callback; - this->io_write(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - write.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_write(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -// Internal routine needed to flush writes in a blocking manner. -void -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_write_flush(void) -{ - Cyg_IORB iorb; - - iorb.buffer_length = 0; -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb.callback_data = (CYG_ADDRESS)&write; - iorb.callback = callback; - this->io_write(&iorb); - write.wait(); - } else -#endif - { - iorb.callback = NULL; - this->io_write(&iorb); - } -} - -// ------------------------------------------------------------------------ -// Cancel routines to stop an existing IO operation -// - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_read_cancel(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - Cyg_Scheduler::lock(); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.disable_interrupts(); -#endif - - // For now only allow the current iorb to be cancelable - // --proven 19980714 - - if (read_buffer == NULL) { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if ((read_buffer = read_buffers.get_next_inuse(read_buffer)) == NULL) -#endif - { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - } - } - if (((iorb == NULL) && read_buffer) || - (iorb && (read_buffer == iorb))) { - read_buffer->status = CYG_IORB_CANCELED; -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_buffer = read_buffers.get_next_inuse(read_buffer); -#endif - // Need to clear out any flush iorbs -- proven 19980714 - } else { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_interrupt.enable_interrupts(); -#endif - read_dsr(CYG_DEVICE_SERIAL_RS232_RVEC, 0, (CYG_ADDRWORD)this); - Cyg_Scheduler::unlock(); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -// ------------------------------------------------------------------------ -// Assert versions. These versions bypass most of the driver code. -// These are to be used by the BSP or asserts. Only use them once -// start_sync() is called and when done normal operations is -// restarted with the end_sync() mode. -// -// Note DO NOT DO LOCKING IN THIS ROUTINE!!! -// - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_ASSERT -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_MN10300_2::io_write_assert(Cyg_IORB * iorb) -{ - volatile cyg_uint8 * tty_status = CYG_DEVICE_SERIAL_RS232_SR; - volatile cyg_uint8 * tty_tx = CYG_DEVICE_SERIAL_RS232_TXR; - cyg_uint8 ch; - - iorb->xferred_length = 0; - while (iorb->xferred_length < iorb->buffer_length) { - if ((ch = (*((char *)iorb->buffer + iorb->xferred_length++))) == '\n') { - while ((*tty_status & 0x20) != 0) continue; - *tty_tx = '\r'; - } - while ((*tty_status & 0x20) != 0) continue; - *tty_tx = ch; - } - return 0; -} - -#endif // #ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_KMODE_ASSERT - -#endif // #ifdef CYGPKG_DEVICES_SERIAL_RS232_MN10300_2 -// EOF serial_mn10300_2.cxx diff --git a/packages/devs/serial/rs232/mn10300/current/tests/PKGconf.mak b/packages/devs/serial/rs232/mn10300/current/tests/PKGconf.mak deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/tests/PKGconf.mak +++ /dev/null @@ -1,38 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/mn10300/tests -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_serial_rs232_mn10300 -include ../../../../../../pkgconf/pkgconf.mak - - -TESTS := $(TESTS_NOT_TO_AUTOMATE) mn10300_1_serial_test mn10300_2_serial_test - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst - diff --git a/packages/devs/serial/rs232/mn10300/current/tests/mn10300_1_serial_test.cxx b/packages/devs/serial/rs232/mn10300/current/tests/mn10300_1_serial_test.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/tests/mn10300_1_serial_test.cxx +++ /dev/null @@ -1,143 +0,0 @@ -//================================================================= -// -// mn10300_1_serial_test.cxx -// -// Test that the device API for the mn10300_1 device exists. -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// October 31, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-10-08 -// Description: Tests basic serial functionality. -//####DESCRIPTIONEND#### - -// #include -#include // For now include all the devices - -#include // Generic test macros - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME -#define CYG_DEVICE_SERIAL_RS232_NAME CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME - -#define NTHREADS 1 -#include // All the kernel specific stuff -#include - -// #define CYG_DEVICE_INTERNAL -// #include -// #include - -char message1[] = "This is test message 1.\n"; -char message2[] = "This is test message 2.\n"; - -/* Only call routines that do not require user input */ -void entry0(CYG_ADDRWORD data) -{ - Cyg_IORB iorb1, iorb2; - cyg_int32 baud_rate, i; - - iorb1.callback = NULL; - iorb1.buffer = message1; - iorb1.buffer_length = sizeof(message1) - 1; - CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb1); - - iorb2.buffer = message2; - iorb2.buffer_length = sizeof(message2) - 1; - CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb2); - - for (i = 0; i < 1000000; i++); // Delay to flush the tx buffer - - if ((baud_rate = CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate()) >= 0) { - CYG_TEST_PASS_FAIL( - (CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(baud_rate) >= 0), - "Setting baud rate to previous baud rate."); - } else { - CYG_TEST_FAIL("Could not get baud rate."); - } - - CYG_TEST_PASS_EXIT("serial_test"); -} - -/* Make calls to the rest of the API */ -void entry_bogus(CYG_ADDRWORD data) -{ - Cyg_IORB iorb; - char buf[1024]; - iorb.buffer = buf; - iorb.buffer_length = sizeof(buf); - - // Set mode to interrupt - CYG_DEVICE_SERIAL_RS232_NAME.set_kmode((cyg_uint32)1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_kmode(); // Doesn't exist yet - - // These could go in the entry0 routine - CYG_DEVICE_SERIAL_RS232_NAME.get_line_mode(); - CYG_DEVICE_SERIAL_RS232_NAME.set_line_mode(1); - - CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate(); - CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(1); - - CYG_DEVICE_SERIAL_RS232_NAME.set_read_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_read_mode(); // Doesn't exist yet - CYG_DEVICE_SERIAL_RS232_NAME.set_read_data(1, NULL, 0); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_blocking(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_cancel(&iorb); - - CYG_DEVICE_SERIAL_RS232_NAME.set_write_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_write_mode(); // Doesn't exist yet - CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb); - // CYG_DEVICE_SERIAL_RS232_NAME.io_write_cancel(&iorb);// Doesn't exist yet -} - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - - new_thread(entry0, 0); - - Cyg_Scheduler::start(); - - CYG_TEST_FAIL_EXIT("Not reached"); - - entry_bogus(0); // To prevent selective linking from GC all the bogus calls. -} - -#else // CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - CYG_TEST_PASS_EXIT("N/A: required serial device not present"); -} - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_1_NAME - -// EOF mn10300_1_serial_tests.cxx diff --git a/packages/devs/serial/rs232/mn10300/current/tests/mn10300_2_serial_test.cxx b/packages/devs/serial/rs232/mn10300/current/tests/mn10300_2_serial_test.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/mn10300/current/tests/mn10300_2_serial_test.cxx +++ /dev/null @@ -1,146 +0,0 @@ -//================================================================= -// -// mn10300_2_serial_test.cxx -// -// Test that the device API for the mn10300_2 device exists. -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// October 31, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-10-08 -// Description: Tests basic serial functionality. -//####DESCRIPTIONEND#### - -// #include -#include // For now include all the devices - -#include // Generic test macros - -#ifdef CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME -#define CYG_DEVICE_SERIAL_RS232_NAME CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME - -#define NTHREADS 1 -#include // All the kernel specific stuff -#include - -// #define CYG_DEVICE_INTERNAL -// #include -// #include - -char message1[] = "This is test message 1.\n"; -char message2[] = "This is test message 2.\n"; - -/* Only call routines that do not require user input */ -void entry0(CYG_ADDRWORD data) -{ - Cyg_IORB iorb1, iorb2; - cyg_int32 baud_rate, i; - - iorb1.callback = NULL; - iorb1.buffer = message1; - iorb1.buffer_length = sizeof(message1) - 1; -// Because the testing infrastructure currently uses the hal -// We cannot do ANY calls to the device driver. -// CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb1); - - iorb2.buffer = message2; - iorb2.buffer_length = sizeof(message2) - 1; -// CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb2); - - for (i = 0; i < 1000000; i++); // Delay to flush the tx buffer - - baud_rate = i; -// if ((baud_rate = CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate()) >= 0) { -// CYG_TEST_PASS_FAIL( -// (CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(baud_rate) >= 0), -// "Setting baud rate to previous baud rate."); -// } else { -// CYG_TEST_FAIL("Could not get baud rate."); -// } - - CYG_TEST_PASS_EXIT("serial_test"); -} - -/* Make calls to the rest of the API */ -void entry_bogus(CYG_ADDRWORD data) -{ - Cyg_IORB iorb; - char buf[1024]; - iorb.buffer = buf; - iorb.buffer_length = sizeof(buf); - - // Set mode to interrupt - CYG_DEVICE_SERIAL_RS232_NAME.set_kmode((cyg_uint32)1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_kmode(); // Doesn't exist yet - - // These could go in the entry0 routine - CYG_DEVICE_SERIAL_RS232_NAME.get_line_mode(); - CYG_DEVICE_SERIAL_RS232_NAME.set_line_mode(1); - - CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate(); - CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(1); - - CYG_DEVICE_SERIAL_RS232_NAME.set_read_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_read_mode(); // Doesn't exist yet - CYG_DEVICE_SERIAL_RS232_NAME.set_read_data(1, NULL, 0); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_blocking(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_cancel(&iorb); - - CYG_DEVICE_SERIAL_RS232_NAME.set_write_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_write_mode(); // Doesn't exist yet - CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb); - // CYG_DEVICE_SERIAL_RS232_NAME.io_write_cancel(&iorb);// Doesn't exist yet -} - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - - new_thread(entry0, 0); - - Cyg_Scheduler::start(); - - CYG_TEST_FAIL_EXIT("Not reached"); - - entry_bogus(0); // To prevent selective linking from GC all the bogus calls. -} - -#else // CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - CYG_TEST_PASS_EXIT("N/A: required serial device not present"); -} - -#endif // CYG_DEVICE_SERIAL_RS232_MN10300_2_NAME - -// EOF mn10300_2_serial_tests.cxx diff --git a/packages/devs/serial/rs232/tx39/current/ChangeLog b/packages/devs/serial/rs232/tx39/current/ChangeLog deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/ChangeLog +++ /dev/null @@ -1,196 +0,0 @@ -1998-10-24 Hugo Tyson - - * include/pkgconf/serial_tx39.h: - Only define anything if we have the correct hardware platform and - NOT a simulator target for that platform, as well as the device - package itself being defined. - -1998-10-23 Hugo Tyson - - * tests/tx39_serial_test.cxx: - Move include of testing header above the check for "can we test". - -Thu Oct 22 12:55:04 BST 1998 Chris Provenzano - - * PKGconf.mak: added new API test and delete all the old tests - - * tests/README, tests/get_baud_rate.cxx, tests/serial1.cxx - * tests/serial2.cxx, tests/serial3.cxx, tests/serial4.cxx - * tests/serial5.cxx, tests/set_baud_rate.cxx - Removed old tests. - - * tx39_serial_test.cxx: New test that test just the API and not much - of the functionality. These tests meet or exceed the previous - existence/spelling tests of the API and therefore replace all the - serial[x].cxx tests which were removed. - -Tue Oct 20 15:56:00 1998 Jonathan Larmour - - * src/PKGconf.mak: - Remove unnecessary override of PKGCONF_CXXFLAGS - -1998-10-19 Jesper Skov - - * include/pkgconf/serial_tx39.h: Undid 1998-10-16 change. - -1998-10-16 Jesper Skov - - * include/pkgconf/serial_tx39.h: Changed CYGPKG_HAL_TX39_JMR3904 - to CYG_HAL_TX39_JMR3904. - -Thu Oct 15 17:00:00 1998 John Dallaway - - * include/pkgconf/serial_tx39.h: Disable dependence on HAL - in CDL. - -Tue Sep 29 09:16:53 1998 Jesper Skov - - * tests/get_baud_rate.cxx (entry0): Removed loop that made the - test timeout on sim. - -Sun Sep 27 15:17:34 1998 Jesper Skov - - * tests/set_baud_rate.cxx: Do not change the baud rate to - 0. Undefined behavior in the current drivers. - -Sun Sep 27 13:50:01 1998 Jesper Skov - - * tests/README: Added copyright blurb. - -Fri Sep 25 20:59:10 1998 Jesper Skov - - * tests/README: Added. - -Fri Sep 25 20:30:12 1998 Jesper Skov - - * tests/set_baud_rate.cxx (entry0): Set baud_rate to 38400, not - 19200. - -Fri Sep 25 11:59:31 1998 Jesper Skov - - * tests/serial3.cxx: - * tests/serial5.cxx: - Added some diag info to help identify as input tests. - - * tests/PKGconf.mak: Reintroduced input tests. - -Wed Sep 23 16:53:57 1998 Jesper Skov - PR 17315 - - * tests/set_baud_rate.cxx: - * tests/serial5.cxx: - * tests/serial4.cxx: - * tests/serial3.cxx: - * tests/serial2.cxx: - * tests/serial1.cxx: - * tests/get_baud_rate.cxx: - Changed device name. - - * tests/PKGconf.mak: - Include tests that do not require human intervention. - -Wed Sep 23 14:36:53 1998 Jesper Skov - PR 17424 - - * src/serial_tx39.cxx (io_write, io_read): Also do callbacks in - poll-mode, if the pointer is non-NULL. - -Thu Sep 17 19:21:35 1998 Frank Ch. Eigler - - * tests/serial2.cxx (entry0): - Reorder foo flag use to avoid race condition. - -Thu Sep 17 12:53:33 1998 Jesper Skov - - * include/pkgconf/serial_tx39.h: Put requires in CDL. - Protect CYG_DEVICE_SERIAL_RS232_MUTEX - with CYGPKG_KERNEL. - Protect CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT with - CYGIMP_KERNEL_INTERRUPTS_DSRS. - -Thu Sep 17 09:45:00 1998 Jesper Skov - - * tests/get_baud_rate.cxx tests/serial1.cxx tests/serial2.cxx - tests/serial3.cxx tests/serial4.cxx tests/serial5.cxx - tests/set_baud_rate.cxx - Remove all tests. They are not mentioned in the makefile. - -Tue Sep 15 02:23:06 BST 1998 Chris Provenzano - - * include/serial_tx39.hxx, src/serial_tx39.cxx: - Use positive macros instead of negative changing all - ...DO_NOT_DECLARE macros to ...DECLARE - -1998-09-12 Bart Veer - - * include/pkgconf/serial_tx39.h: - Added missing descriptions (PR 17184) - -Fri Sep 11 11:13:18 1998 Jesper Skov - PR 17228 - - * src/serial_tx39.cxx (io_read): Made to compile when - KMODE_INTERRUPT undefined. - (io_write): Same. - (write_isr): Same. - (both_isr): Only compile when KMODE_INTERRUPT defined. - (set_kmode): Added dummy function for use when only one kmode is - configured - * include/serial_tx39.hxx: Removed conditionals around - set_kmode. - -1998-09-04 Bart Veer - - * include/pkgconf/serial_tx39.h: - Sorting out naming conventions within the devs/serial hierarchy. - -Thu Sep 3 16:00:45 1998 Jonathan Larmour - - * include/pkgconf/serial_tx39.h: - Moved here from devs/common/current/include/pkgconf/ - -Fri Aug 28 09:50:36 1998 Jonathan Larmour - - * tests/get_baud_rate.cxx, tests/serial1.cxx, tests/serial2.cxx, - tests/serial3.cxx, tests/serial4.cxx, tests/serial5.cxx, - tests/set_baud_rate.cxx: - Change use of main() as the entry point to cyg_start() under the - new entry point scheme. Remove return codes as cyg_start() returns - void, not int. - -Tue Jul 28 13:58:25 BST 1998 Chris Provenzano - - * include/serial_tx39.hxx: Declare TX39 device using the - configured name. - - * tests/PKGconf.mak: Don't compile tests right now. - All tests need to be reworked. - -Mon Jul 27 17:33:59 BST 1998 Chris Provenzano - - * Changelog: Initial ChangeLog entry. - - -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== diff --git a/packages/devs/serial/rs232/tx39/current/include/pkgconf/serial_tx39.h b/packages/devs/serial/rs232/tx39/current/include/pkgconf/serial_tx39.h deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/include/pkgconf/serial_tx39.h +++ /dev/null @@ -1,181 +0,0 @@ -#ifndef CYGONCE_PKGCONF_SERIAL_TX39_H -#define CYGONCE_PKGCONF_SERIAL_TX39_H -// ==================================================================== -// -// pkgconf/serial_tx39.h -// -// Device configuration file for tx39 serial ports -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-25 -// Purpose: To allow the user to edit device specific -// configuration options for the tx39 2 serial device. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -#include - -#ifdef CYGPKG_KERNEL -#include -#endif - -/* Only define options if the driver is to be present. */ -#if defined( CYGPKG_HAL_TX39 ) && \ - !defined( CYGPKG_HAL_TX39_SIM ) && \ - defined( CYGPKG_DEVICES_SERIAL_RS232_TX39 ) - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_DEVICES_SERIAL_RS232_TX39 { - display "TX39 serial device code" - parent CYGPKG_DEVICES_SERIAL_RS232_COMMON -# requires CYGPKG_HAL_TX39_JMR3904 - requires CYGPKG_KERNEL - description " - Driver for the on-chip RS232 device." - } - - }}CFG_DATA -*/ - -/* --------------------------------------------------------------------- - * First we define all the options that are exportable to the user. These - * options will show/hide various methods for the class. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. One must be defined. - * Both can be defined. - */ -#define CYG_DEVICE_SERIAL_RS232_TX39_KMODE_POLLED -#ifdef CYGIMP_KERNEL_INTERRUPTS_DSRS -#define CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT -#endif - -/* --------------------------------------------------------------------- - * Define if we do diag output. This could possible be another kmode. - * --proven 19980512 - */ -#define CYG_DEVICE_SERIAL_RS232_TX39_KMODE_ASSERT - -/* --------------------------------------------------------------------- - * Define the default baudrate and line mode. - */ -#define CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE 38400 - -/* --------------------------------------------------------------------- - * Define if non binary terminal protocol modes are needed. - */ -#define CYG_DEVICE_SERIAL_RS232_TX39_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_TX39_WRITE_MODES - - -#ifdef CYG_DEVICE_INTERNAL -/* ==================================================================== - * Now define internal only options. These options dictate the struture - * of a class but have no effect on the methods declared for a class. - */ - -/* --------------------------------------------------------------------- - * The need for queues is only necessary in interrupt mode. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT - -/* --------------------------------------------------------------------- - * Define the number of iorb read buffers the serial read_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the read_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - -/* --------------------------------------------------------------------- - * Define the number of iorb write buffers the serial write_isr device can - * handle at one time. Also define if the device needs to queue more iorbs - * than what the write_isr can handle. - */ -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS 4 -# define CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - -#endif // CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT - -/* ==================================================================== - * Duplicate the above options. DO NOT modify them. Modify the ones above. - * This is so the internal source files can be compiled from the same - * common sources. These defines can never be exported to the user. - */ - -/* --------------------------------------------------------------------- - * Define what kernel mode the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_INTERRUPT -#define CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT 1 -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_POLLED -#define CYG_DEVICE_SERIAL_RS232_KMODE_POLLED 0 -#endif - -/* --------------------------------------------------------------------- - * Define what line modes the driver can support. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_LINE_MODES -#define CYG_DEVICE_SERIAL_RS232_LINE_MODES -#endif - -/* --------------------------------------------------------------------- - * Define any terminal protocols need to be supported. - */ -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_READ_MODES -#define CYG_DEVICE_SERIAL_RS232_READ_MODES -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_WRITE_MODES -#define CYG_DEVICE_SERIAL_RS232_WRITE_MODES -#endif - -#ifdef CYGPKG_KERNEL -/* --------------------------------------------------------------------- - * Define if a mutex is needed to lock out multiple threads accessing - * the serial driver. If not defined then it is assumes only one - * thread will access the driver at a given time. - */ -#define CYG_DEVICE_SERIAL_RS232_MUTEX -#endif /* CYGPKG_KERNEL */ - -#endif // CYG_DEVICE_INTERNAL - -#endif /* ifdef CYGPKG_DEVICES_SERIAL_RS232_TX39 et al */ - -#endif /* CYGONCE_PKGCONF_SERIAL_TX39_H */ -/* EOF serial_tx39.h */ diff --git a/packages/devs/serial/rs232/tx39/current/include/serial_tx39.hxx b/packages/devs/serial/rs232/tx39/current/include/serial_tx39.hxx deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/include/serial_tx39.hxx +++ /dev/null @@ -1,180 +0,0 @@ -#ifndef CYGONCE_DEVS_SERIAL_RS232_TX39_SERIAL_TX39_HXX -#define CYGONCE_DEVS_SERIAL_RS232_TX39_SERIAL_TX39_HXX - -//========================================================================== -// -// serial_tx39.hxx -// -// Header file for the tx39 serial device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-04-22 -// Purpose: Define Cyg_Device_Serial_tx39 data structure -// Description: This file contains the C++ class declaration of -// Cyg_Device_Serial_tx39. There can be only one. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include // Device configureation file - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39 -// Include Configureation options specific to the device -#include CYG_DEVICE_SERIAL_RS232_TX39 - -#include -#include // assertion macros -#include // tracing macros - -#include // Cyg_ISR, Cyg_DSR -#include // intr.hxx -#include // intr.hxx - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX -#include -#endif -#include - -// ------------------------------------------------------------------------- -// The tx39 serial device registers. - -#ifdef CYG_DEVICE_INTERNAL -// Define the serial registers. -#define CYG_DEVICE_SERIAL_RS232_TX39_SLCR ((volatile cyg_uint16 *)0xfffff300) -#define CYG_DEVICE_SERIAL_RS232_TX39_SDICR ((volatile cyg_uint16 *)0xfffff308) -#define CYG_DEVICE_SERIAL_RS232_TX39_SDISR ((volatile cyg_uint16 *)0xfffff30c) -#define CYG_DEVICE_SERIAL_RS232_TX39_SFCR ((volatile cyg_uint16 *)0xfffff310) -#define CYG_DEVICE_SERIAL_RS232_TX39_SBRG ((volatile cyg_uint16 *)0xfffff314) -#define CYG_DEVICE_SERIAL_RS232_TX39_TFIFO ((volatile cyg_uint8 *)0xfffff320) -#define CYG_DEVICE_SERIAL_RS232_TX39_SFIFO ((volatile cyg_uint8 *)0xfffff330) - -#define CYG_DEVICE_SERIAL_RS232_TX39_VEC CYG_VECTOR_SIO_0 - -// Here are the values for the timers to set the various baud rates -// Timer 1 is the serial 2 timer register -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600 0x02 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200 0x02 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400 0x02 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800 0x02 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600 0x01 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200 0x01 -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 0x01 - -// Timer 2 is the 8 bit timer 2 register -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 0 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 81 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 41 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 20 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 41 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 20 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 10 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 05 - -// Now set the default baudrate -#ifndef CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE -#error "Must specify a default baud rate" -#else -#if ((CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE > 0) && \ - (CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE < 600)) -#error "Baud rates less than 600 are not supported for the tx39 at this time" -#endif -#define CYG_DEVICE_SERIAL_RS232_DEFAULT_BAUD_RATE \ - CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE -#endif // CYG_DEVICE_SERIAL_RS232_TX39_DEFAULT_BAUD_RATE - -#include - -#endif // CYG_DEVICE_INTERNAL - -// ------------------------------------------------------------------------- -// Cyg_Device_Serial_RS232_tx39 - -#define CYG_CLASS_DEVICE_SERIAL_RS232_TX39 Cyg_Device_Serial_RS232_tx39 - -class CYG_CLASS_DEVICE_SERIAL_RS232_TX39 - : public Cyg_Device_Serial_RS232 -{ -#ifdef CYG_DEVICE_INTERNAL -#define CYG_DEVICE_SERIAL_RS232_ONE_VECTOR -#include -#endif - -private: - /* Internal routines */ - cyg_int32 io_read(Cyg_IORB * iorb); - cyg_int32 io_write(Cyg_IORB * iorb); - void io_write_flush(void); - -public: - - /* Constructor */ - CYG_CLASS_DEVICE_SERIAL_RS232_TX39(); - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_ASSERT - cyg_int32 io_read_assert(Cyg_IORB * iorb); - cyg_int32 io_write_assert(Cyg_IORB * iorb); -#endif - - cyg_int32 io_read_blocking(Cyg_IORB * iorb); - cyg_int32 io_write_blocking(Cyg_IORB * iorb); - cyg_int32 io_read_asynchronous(Cyg_IORB * iorb); - cyg_int32 io_write_asynchronous(Cyg_IORB * iorb); - - cyg_int32 set_kmode(cyg_uint32); - cyg_int32 get_kmode(void); - - cyg_int32 set_baud_rate(cyg_uint32); - cyg_int32 get_baud_rate(void); - - cyg_int32 set_line_mode(cyg_uint32); - cyg_int32 get_line_mode(void); - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_READ_MODES - cyg_int32 set_read_mode(cyg_uint32); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_WRITE_MODES - cyg_int32 set_write_mode(cyg_uint32); -#endif -}; - -// Declare exported variables -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_DECLARE -extern CYG_CLASS_DEVICE_SERIAL_RS232_TX39 CYG_DEVICE_SERIAL_RS232_TX39_NAME; -#endif -#endif - -#endif // CYG_DEVICE_SERIAL_RS232_TX39 - -#endif // CYGONCE_DEVS_SERIAL_RS232_TX39_SERIAL_TX39_HXX -// End of serial_tx39.hxx - diff --git a/packages/devs/serial/rs232/tx39/current/src/PKGconf.mak b/packages/devs/serial/rs232/tx39/current/src/PKGconf.mak deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/src/PKGconf.mak +++ /dev/null @@ -1,41 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/tx39/src -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_serial_rs232_tx39 -include ../../../../../../pkgconf/pkgconf.mak - -LIBRARY := libtarget.a -COMPILE := serial_tx39.cxx -OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - diff --git a/packages/devs/serial/rs232/tx39/current/src/serial_tx39.cxx b/packages/devs/serial/rs232/tx39/current/src/serial_tx39.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/src/serial_tx39.cxx +++ /dev/null @@ -1,1092 +0,0 @@ -//================================================================= -// -// serial_tx39.cxx -// -// Drivers for the tx39 -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-05-25 -// Description: Class methods for the class Cyg_Device_Serial_tx39 -// The tx39 on chip serial port only requries one interrupt handler -// as it only has one vector for the port. The handler must check -// and multiples the read and write interrupts and then clear it. -// One unusual thing about the TX39 is that the transfer interrupt -// is not clearable if there is space to put characters in the -// tfifo. This means that when nothing is to be written the -// transfer interrupt must be disabled. -//####DESCRIPTIONEND#### - -#include // To see if we need to bother -#if defined(CYG_HAL_TX39_JMR3904) && defined(CYGPKG_DEVICES_SERIAL_RS232_TX39) - -#define CYG_DEVICE_INTERNAL -#include -#include // Cyg_Binary_Semaphore - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_NAME -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_DECLARE -CYG_CLASS_DEVICE_SERIAL_RS232_TX39 CYG_DEVICE_SERIAL_RS232_TX39_NAME; -#endif -#endif - -// ------------------------------------------------------------------------ -// Constructor for serial device -// -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::CYG_CLASS_DEVICE_SERIAL_RS232_TX39() -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - : both_interrupt(CYG_DEVICE_SERIAL_RS232_TX39_VEC, 4, (CYG_ADDRWORD)this, both_isr, both_dsr) -#endif -{ - CYG_REPORT_FUNCTION(); - - read_buffer = NULL; - - // read_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - read_buffers_ll_last = NULL; - read_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - // Default to ASCII mode if READ_MODES is configured. - read_mode = 0xff; -// read_mode_translate_char = 0; -// read_mode_escape_next_char = 0; -#endif - - write_buffer = NULL; - // write_buffers = NULL; -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - write_buffers_ll_last = NULL; - write_buffers_ll_first = NULL; -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - // Default to CR to CRLF translation - write_mode = 1; - write_char = 0; -#endif - - // Set the timers before enabling them or the serial device - *CYG_DEVICE_SERIAL_RS232_TX39_SBRG = (CYG_DEVICE_SERIAL_RS232_T1_VALUE << 8) | CYG_DEVICE_SERIAL_RS232_T2_VALUE; -// (0x0100 | 10); - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - both_interrupt.attach(); - // Clear interrupts for now. - *CYG_DEVICE_SERIAL_RS232_TX39_SDICR = 0x0000; - /* Do not unmask the interrupt unless interrupt is the default mode */ -#endif - - // Set the control registers, finallizing the settup. - // Set up FIFOs rx and tx DMA transfer levels to 4 - *CYG_DEVICE_SERIAL_RS232_TX39_SFCR = 0x0000; - - // Source from baud rate generator, 8-1-no parity. - *CYG_DEVICE_SERIAL_RS232_TX39_SLCR = 0x0020; -} - -// ------------------------------------------------------------------------ -// set_kmode() -// Set the kernel mode to (polled, interrrupt, ...) -// Only applicable if we have multiple modes. - -#if defined (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) && \ - defined (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - set_kmode(cyg_uint32 new_mode) -{ - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* Switching from polled mode to interrupt mode is easy */ - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) { - if (new_mode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - - /* Only enable read interrupts for now */ - *CYG_DEVICE_SERIAL_RS232_TX39_SDICR = 0x0001; - *CYG_DEVICE_SERIAL_RS232_TX39_SDISR = 0x0000; - - /* Turn on interrupts by unmasking the vector */ - both_interrupt.unmask_interrupt(both_interrupt.get_vector()); - } - } - /* Switching to polled mode should flush the buffers */ - else { - if (new_mode == CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) { - both_interrupt.mask_interrupt(both_interrupt.get_vector()); - *CYG_DEVICE_SERIAL_RS232_TX39_SDICR = 0x0000; - *CYG_DEVICE_SERIAL_RS232_TX39_SDISR = 0x0000; - } - } - - kmode = new_mode; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return 0; -} - -#else - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - set_kmode(cyg_uint32 new_mode) -{ -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_POLLED) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_POLLED == new_mode, - "Can only select polled mode" ); -#endif -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) - CYG_ASSERT (CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT == new_mode, - "Can only select interrupt mode" ); -#endif - - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// Baud rate - -static struct baud_rate { - cyg_uint8 bclk; - cyg_uint8 brd; -} baud_rate_table[] = { - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B0 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B50 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B75 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B110 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B134.5 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B150 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B300 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B600, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B600 }, // B600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B1200, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B1200 }, // B1200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B0, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B0 }, // B1800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B2400, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B2400 }, // B2400 - - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B4800, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B4800 }, // B4800 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B9600, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B9600 }, // B9600 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B19200, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B19200 }, // B19200 - { CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400, CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 } // B38400 -}; - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -get_baud_rate() -{ - cyg_ucount8 i; - cyg_uint8 bclk, brd; - - brd = *CYG_DEVICE_SERIAL_RS232_TX39_SBRG & 0xff; - bclk = (*CYG_DEVICE_SERIAL_RS232_TX39_SBRG >> 8) & 0xff; - - for (i = 0; i < (sizeof(baud_rate_table) / sizeof(struct baud_rate)); i++) { - if ((bclk == baud_rate_table[i].bclk) && - (brd == baud_rate_table[i].brd)) { - return(i); - } - } - - return(-1); -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -set_baud_rate(cyg_uint32 baud_rate) -{ - cyg_int32 old_baud_rate; - - if (baud_rate > (sizeof(baud_rate_table) / sizeof(struct baud_rate))) { - return -1; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - /* Get the old baud rate */ - if ((old_baud_rate = this->get_baud_rate()) < 0) - old_baud_rate = 0; - - /* Turn off read and write */ - // Cannot be done for the TX39 chip SIO - - /* Reenable timer and serial port for valid baud rates greater than 0 */ - if (baud_rate_table[baud_rate].bclk && baud_rate_table[baud_rate].brd) { - *CYG_DEVICE_SERIAL_RS232_TX39_SBRG = - (baud_rate_table[baud_rate].bclk << 8) | baud_rate_table[baud_rate].brd; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return(old_baud_rate); - -} - -// ------------------------------------------------------------------------ -// Line mode - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -get_line_mode() -{ - cyg_uint16 slcr; - cyg_int32 ret; - - slcr = *CYG_DEVICE_SERIAL_RS232_TX39_SLCR; - - /* bits per byte */ - if (slcr & 0x0001) { - ret = CS7; - } else { - ret = CS8; - } - /* Stop bits */ - if (slcr & 0x0004) { - ret |= CSTOPB; - } - /* Parity */ - if (slcr & 0x0008) { - ret |= PARENB; - if (!(slcr & 0x0010)) { - ret |= PARODD; - } - } - - return ret; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -set_line_mode(cyg_uint32 line_mode) -{ - cyg_int32 old_line_mode; - cyg_uint16 slcr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - /* - * Flush the write queue. - * Not necessary for the read queue - */ - this->io_write_flush(); - - slcr = *CYG_DEVICE_SERIAL_RS232_TX39_SLCR; - - old_line_mode = this->get_line_mode(); - - switch(line_mode & CSIZE) { - case CS8: - slcr &= ~0x0001; - break; - case CS7: - slcr |= 0x0001; - break; - default: - return -1; - break; - } - if (line_mode & CSTOPB) { - slcr |= 0x0004; - } else { - slcr &= ~0x0004; - } - if (line_mode & PARENB) { - if (line_mode & PARODD) { - slcr &= ~0x0010; - } else { - slcr |= 0x0010; - } - } else { - slcr &= ~0x0008; - } - - /* Set the new flags all in one write. */ - *CYG_DEVICE_SERIAL_RS232_TX39_SLCR = slcr; - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - - return old_line_mode; - -} - -// ------------------------------------------------------------------------ -// set_read_mode() -// Set the read mode (CRNL translation, EOL detection, escape characters) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -set_read_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - if (new_mode) { - read_mode = 0xff; - } else { - read_mode = 0; - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -static inline void -throttle(char ch) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - cyg_uint8 tmp; - - tmp = (data->read_throttle_free + 1) % data->read_throttle_size; - /* Check that there is space to put the character */ - if (tmp != data->read_throttle_queued) { - data->read_throttle_buffer[tmp] = ch; - data->read_throttle_free = tmp; - } - data->read_throttle = 1; -#endif -} - -// ------------------------------------------------------------------------ -// read_isr() -// -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - read_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_TX39 * data = (CYG_CLASS_DEVICE_SERIAL_RS232_TX39 *)isr_data; - volatile cyg_uint16 * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - volatile cyg_uint8 * sfifo = CYG_DEVICE_SERIAL_RS232_TX39_SFIFO; - cyg_uint32 off, ret; - cyg_uint8 eob = 0; - cyg_uint8 ch; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regaurdless of kmode - // data->read_interrupt.acknowledge_interrupt(vector); -#endif - - ch = *sfifo; - *sdisr = 0x0000; - -#ifdef CYG_DEVICE_SERIAL_RS232_READ_MODES - while (data->read_mode) { - // On escape characters, skip mode checks; break - // Deal with flow control characters; return - - /* Deal with ignored characters first */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_IGN) { - if (ch == 10) - return ret; - } - /* Translate characters before checking on EOB conditions. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_TRN) { - if (ch == 13) - ch = 10; - } - /* Return a not full IORB on an EOB condition. */ - if (data->read_mode & CYG_DEVICE_SERIAL_RS232_READ_MODE_EOB) { - if ((ch == 4) || (ch == 10) || (ch == 13) || (ch == 26)) { - eob = 1; - } - } - break; - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - if (read_throttle == 0) { -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (data->read_buffer == NULL) { - while ((data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer))) { - if (data->read_buffer->xferred_length < data->read_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - break; - } - } - if (data->read_buffer == NULL) { - ret = Cyg_Interrupt::CALL_DSR; - throttle(ch); - return ret; - } - } -#endif - - off = data->read_buffer->xferred_length++; - *((char *)data->read_buffer->buffer + off) = ch; - - // This is still ugly --proven 19980526 - if ((data->read_buffer->xferred_length == data->read_buffer->buffer_length) || eob) { -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); -#else - data->read_buffer = NULL; -#endif - ret = Cyg_Interrupt::CALL_DSR; - } - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - while ((data->read_buffer != NULL) && - (data->read_buffer->xferred_length == data->read_buffer->buffer_length)) { - data->read_buffer = data->read_buffers.get_next_inuse(data->read_buffer); - ret = Cyg_Interrupt::CALL_DSR; // Probably not necessary - } -#endif - -#ifdef CYG_DEVICE_SERIAL_RS232_FLOW_CONTROL - } else { - throttle(ch); - } -#endif - - return ret; - -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - read_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_TX39 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_TX39 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_read() will be called again to handle that buffer. - */ - - for (i = 0, count = data->read_buffers.min_done(); i < count; i++) { - iorb = data->read_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->read_buffers_ll_first)) { - data->read_buffers_ll_first = iorb->next; - data->read_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_read(Cyg_IORB * iorb) -{ - volatile cyg_uint16 * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_TX39_VEC; - - iorb->xferred_length = 0; - iorb->next = NULL; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_READ_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (read_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (read_buffers.min_free() == 0) { - if (read_buffers_ll_first) { - read_buffers_ll_last->next = iorb; - } else { - read_buffers_ll_first = iorb; - } - read_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - read_buffers.enqueue(iorb); - - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - /* We may have to enable CTR here to tell the other side to start - * sending characters --proven 19980513 */ - return 0; - } -#else - read_buffer = iorb; -#endif - -#ifndef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - /* - * Special nonblocking mode for polled only drivers. - * This is so BSPs and other non kernel things can poll for each char. - * individually. Use only if read modes don't otherwise solve the problem. - */ - if (CYG_IORB_NOBLOCK == iorb->opcode) { - if ((*sdisr & 0x0001) != 0x0001) { - read_isr(vector, (CYG_ADDRWORD)this); - } - return 0; - } -#endif - - do { - do { - while ((*sdisr & 0x0001) != 0x0001) continue; - } while (read_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - read_dsr(vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in read_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of read_dsr to know that fact. The read_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - } while (read_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// set_write_mode() -// Set the write mode (CRNL translation) -// Currently there are only two modes (BINARY and ASCII) - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: -set_write_mode(cyg_uint32 new_mode) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - write_mode = new_mode; -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -#endif - -// ------------------------------------------------------------------------ -// write_isr() -// - -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - write_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_TX39 * data = (CYG_CLASS_DEVICE_SERIAL_RS232_TX39 *)isr_data; - volatile cyg_uint16 * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - volatile cyg_uint8 * tfifo = CYG_DEVICE_SERIAL_RS232_TX39_TFIFO; - cyg_uint32 off, ret; - cyg_uint8 ch; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - // Clear interrupts regaurdless of kmode - // data->write_interrupt.acknowledge_interrupt(vector); - - while ((data->write_buffer == NULL) || - (data->write_buffer->xferred_length == data->write_buffer->buffer_length)) { - data->write_buffer = data->write_buffers.get_next_inuse(data->write_buffer); - ret = Cyg_Interrupt::CALL_DSR; - if (data->write_buffer == NULL) { - volatile cyg_uint16 sdicr_v; - volatile cyg_uint16* sdicr = CYG_DEVICE_SERIAL_RS232_TX39_SDICR; - - /* Turn off write interrupts */ - sdicr_v = *sdicr & ~0x0002; - *sdicr = sdicr_v; - *sdisr = 0x0000; - return ret; - } - } -#else - if (data->write_buffer->xferred_length == data->write_buffer->buffer_length) { - ret = Cyg_Interrupt::CALL_DSR; - data->write_buffer = NULL; - return ret; - } -#endif - - off = data->write_buffer->xferred_length++; - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_MODES - if (data->write_mode) { - // This is for cr to cr/lf conversion - if ((ch = data->write_char)) { - data->write_char = '\0'; - } else { - if ((*((char *)data->write_buffer->buffer + off)) != '\n') { - ch = *((char *)data->write_buffer->buffer + off); - } else { - // Decrement so next pass will DTRT - data->write_buffer->xferred_length--; - data->write_char = '\n'; - ch = '\r'; - } - } - } else -#endif - ch = *((char *)data->write_buffer->buffer + off); - - *sdisr = 0x0000; - *tfifo = ch; - - // Do not modify any data structure after the data is written because - // it is possible an interrupt will call this routine before this - // invocation of this routine executes any code beyond this point. - return ret; -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - write_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - CYG_CLASS_DEVICE_SERIAL_RS232_TX39 * data = - (CYG_CLASS_DEVICE_SERIAL_RS232_TX39 *)dsr_data; - cyg_ucount32 count, i; - Cyg_IORB * iorb; - - /* - * Note: Interrupts are not disabled but if the isr causes another - * buffer to become done since the start of this call then - * dsr_write() will be called again to handle that buffer. - */ - - for (i = 0, count = data->write_buffers.min_done(); i < count; i++) { - iorb = data->write_buffers.dequeue(); - if (iorb->callback) - iorb->callback(iorb); - } - -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - // Enqueue as many iorbs as we dequeued - for (i = 0; i < count; i++) { - if ((iorb = data->write_buffers_ll_first)) { - data->write_buffers_ll_first = iorb->next; - data->write_buffers.enqueue (iorb); - iorb->next = NULL; - } else { - break; - } - } -#endif -#endif - -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_write(Cyg_IORB * iorb) -{ - volatile cyg_uint16 * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - const cyg_vector vector = CYG_DEVICE_SERIAL_RS232_TX39_VEC; - - iorb->xferred_length = 0; - iorb->next = NULL; - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -#ifdef CYG_DEVICE_SERIAL_RS232_WRITE_BUFFERS_LL - /* - * If more iorbs are be queued than the queuet can handle then - * a separate link list needs to hold the extra. Since the DSR - * does the dequeueing from the link list we have to enqueue - * with the scheduler disabled. - * - * Note: To prevent lots of scheduler locks and unlocks we check - * the queue while the scheduler is unlocked, and only if it is - * full do we lock the scheduler and verify that the queue is - * still full. It is possible that between the check and the lock - * that the DSR could run and make some space in the queue. - * - * Note: We cannot have any iorbs on the ll if the queue is not full. - * - * Note: We cannot have a full queue and also be in polled mode. - * This is why we return after placing the iorb on the ll if the - * queue is full, as there is nothing else to do. - */ - if (write_buffers.min_free() == 0) { - - Cyg_Scheduler::lock(); - - // Check again with the scheduler locked - if (write_buffers.min_free() == 0) { - if (write_buffers_ll_first) { - write_buffers_ll_last->next = iorb; - } else { - write_buffers_ll_first = iorb; - } - write_buffers_ll_last = iorb; - Cyg_Scheduler::unlock(); - return 0; - } - Cyg_Scheduler::unlock(); - } - -#endif - - write_buffers.enqueue (iorb); - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - if (write_buffer == NULL) { - volatile cyg_uint16 sdicr_v; - volatile cyg_uint16* sdicr = CYG_DEVICE_SERIAL_RS232_TX39_SDICR; - - -// Must check that iorb isn't already done --proven 19980516 -// if (iorb->length && (iorb->ret_length == 0)) - /* Prime serial write interrupts with first byte */ -// while ((*sdisr & 0x0002) != 0x0002) continue; -// write_isr (vector, (CYG_ADDRWORD)this); - sdicr_v = *sdicr | 0x0002; - *sdicr = sdicr_v; - - } - return 0; - } -#else - write_buffer = iorb; -#endif - - do { - do { - while ((*sdisr & 0x0002) != 0x0002) continue; - } while (write_isr(vector, (CYG_ADDRWORD)this) == Cyg_Interrupt::HANDLED); -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - write_dsr (vector, 0, (CYG_ADDRWORD)this); -#else - - // Make a callback, even in poll-mode. - - // This should really be done in write_dsr, but this requires - // the iorb to be passed along as an argument (or in - // read_buffer) which a) isn't pretty, b) would require other - // callers of write_dsr to know that fact. The write_dsr would - // extract the iorb and do the below. This fix seemed cleaner - // given that it is a short term solution anyway. -jskov - - if (iorb->callback) - iorb->callback(iorb); - -#endif - } while (write_buffer); - return 0; -} - -// ------------------------------------------------------------------------ -// Multiplexor ISR and DSR routines. - -#if defined(CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) \ - && defined (CYG_DEVICE_SERIAL_RS232_ONE_VECTOR) -cyg_uint32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - both_isr(cyg_vector vector, CYG_ADDRWORD isr_data) -{ - volatile cyg_uint16 sdisr_v, * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - cyg_uint32 read_ret, write_ret, ret; - - // Read status - sdisr_v = *sdisr; - - // Default return value - ret = Cyg_Interrupt::HANDLED; - read_ret = Cyg_Interrupt::HANDLED; - write_ret = Cyg_Interrupt::HANDLED; - - // Clear interrupts regaurdless of kmode - // data->both_interrupt.acknowledge_interrupt(vector); - - if (sdisr_v & 0x0001) { - read_ret = CYG_CLASS_DEVICE_SERIAL_RS232_TX39::read_isr(vector, isr_data); - } - if (sdisr_v & 0x0002) { - write_ret = CYG_CLASS_DEVICE_SERIAL_RS232_TX39::write_isr(vector, isr_data); - } - - if ((read_ret == Cyg_Interrupt::CALL_DSR) || - (write_ret == Cyg_Interrupt::CALL_DSR)) - ret = Cyg_Interrupt::CALL_DSR; - *sdisr = 0x0000; - return ret; -} - -void -CYG_CLASS_DEVICE_SERIAL_RS232_TX39:: - both_dsr(cyg_vector vector, cyg_ucount32 dsr_count, CYG_ADDRWORD dsr_data) -{ - CYG_CLASS_DEVICE_SERIAL_RS232_TX39::read_dsr(vector, 0, dsr_data); - CYG_CLASS_DEVICE_SERIAL_RS232_TX39::write_dsr(vector, 0, dsr_data); -} -#endif - -// ------------------------------------------------------------------------ -// Asynchronous versions are only configured with the -// interrupt version is configured -// -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_read_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_read_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_read (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; - -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_write_asynchronous(Cyg_IORB * iorb) -{ - // Do we want to configure an error condition for this? --proven 19980506 - CYG_ASSERT (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT, - "Cannot do an io_write_asynchronous while in polled mode" ); - -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif - this->io_write (iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} -#endif - -// ------------------------------------------------------------------------ -// Blocking versions just call the internal version with a callback. -// - -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT -static void -callback(Cyg_IORB *iorb) -{ - Cyg_Binary_Semaphore * data = (Cyg_Binary_Semaphore *)iorb->callback_data; - data->post(); -} -#endif - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_read_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore read(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&read; - iorb->callback = callback; - this->io_read(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - read.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_read(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_write_blocking(Cyg_IORB * iorb) -{ -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.lock(); -#endif -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb->callback_data = (CYG_ADDRESS)&write; - iorb->callback = callback; - this->io_write(iorb); -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - write.wait(); - return 0; - } else -#endif - { - iorb->callback = NULL; - this->io_write(iorb); - } -#ifdef CYG_DEVICE_SERIAL_RS232_MUTEX - mutex.unlock(); -#endif - return 0; -} - -// Internal routine needed to flush writes in a blocking manner. -void -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_write_flush(void) -{ - Cyg_IORB iorb; - - iorb.buffer_length = 0; -#ifdef CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT - if (kmode == CYG_DEVICE_SERIAL_RS232_KMODE_INTERRUPT) { - Cyg_Binary_Semaphore write(0); - - // We need a callback routine to wake us up - iorb.callback_data = (CYG_ADDRESS)&write; - iorb.callback = callback; - this->io_write(&iorb); - write.wait(); - } else -#endif - { - iorb.callback = NULL; - this->io_write(&iorb); - } -} - -// ------------------------------------------------------------------------ -// Assert versions. These versions bypass most of the driver code. -// These are to be used by the BSP or asserts. Only use them once -// start_sync() is called and when done normal operations is -// restarted with the end_sync() mode. -// -// Note DO NOT DO LOCKING IN THIS ROUTINE!!! -// - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_ASSERT -cyg_int32 -CYG_CLASS_DEVICE_SERIAL_RS232_TX39::io_write_assert(Cyg_IORB * iorb) -{ - volatile cyg_uint16 sdisr_v, * sdisr = CYG_DEVICE_SERIAL_RS232_TX39_SDISR; - volatile cyg_uint8 ch, * tfifo = CYG_DEVICE_SERIAL_RS232_TX39_TFIFO; - - iorb->xferred_length = 0; - while (iorb->xferred_length < iorb->buffer_length) { - if ((ch = (*((char*)iorb->buffer + iorb->xferred_length++))) == '\n') { - while (((sdisr_v = *sdisr) & 0x0002) != 0x0002) continue; - *sdisr = (sdisr_v & ~0x0002); - *tfifo = '\r'; - } - while (((sdisr_v = *sdisr) & 0x0002) != 0x0002) continue; - *sdisr = (sdisr_v & ~0x0002); - *tfifo = ch; - } - return 0; -} - -#endif // #ifdef CYG_DEVICE_SERIAL_RS232_TX39_KMODE_ASSERT - -#endif // #ifdef CYGPKG_DEVICES_SERIAL_RS232_TX39 -// EOF serial_tx39.cxx diff --git a/packages/devs/serial/rs232/tx39/current/tests/PKGconf.mak b/packages/devs/serial/rs232/tx39/current/tests/PKGconf.mak deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/tests/PKGconf.mak +++ /dev/null @@ -1,39 +0,0 @@ -#=============================================================================== -# -# makefile -# -# devs/serial/rs232/tx39/tests -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := devices_serial_rs232_tx39 -include ../../../../../../pkgconf/pkgconf.mak - -TESTS := tx39_serial_test - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst - - - diff --git a/packages/devs/serial/rs232/tx39/current/tests/tx39_serial_test.cxx b/packages/devs/serial/rs232/tx39/current/tests/tx39_serial_test.cxx deleted file mode 100644 --- a/packages/devs/serial/rs232/tx39/current/tests/tx39_serial_test.cxx +++ /dev/null @@ -1,143 +0,0 @@ -//================================================================= -// -// tx39_serial_test.cxx -// -// Test that the device API for the tx39 device exists. -// -//================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// October 31, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): proven -// Contributors: proven -// Date: 1998-10-08 -// Description: Tests basic serial functionality. -//####DESCRIPTIONEND#### - -// #include -#include // For now include all the devices - -#include // Generic test macros - -#ifdef CYG_DEVICE_SERIAL_RS232_TX39_NAME -#define CYG_DEVICE_SERIAL_RS232_NAME CYG_DEVICE_SERIAL_RS232_TX39_NAME - -#define NTHREADS 1 -#include // All the kernel specific stuff -#include - -// #define CYG_DEVICE_INTERNAL -// #include -// #include - -char message1[] = "This is test message 1.\n"; -char message2[] = "This is test message 2.\n"; - -/* Only call routines that do not require user input */ -void entry0(CYG_ADDRWORD data) -{ - Cyg_IORB iorb1, iorb2; - cyg_int32 baud_rate, i; - - iorb1.callback = NULL; - iorb1.buffer = message1; - iorb1.buffer_length = sizeof(message1) - 1; - CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb1); - - iorb2.buffer = message2; - iorb2.buffer_length = sizeof(message2) - 1; - CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb2); - - for (i = 0; i < 1000000; i++); // Delay to flush the tx buffer - - if ((baud_rate = CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate()) >= 0) { - CYG_TEST_PASS_FAIL( - (CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(baud_rate) >= 0), - "Setting baud rate to previous baud rate."); - } else { - CYG_TEST_FAIL("Could not get baud rate."); - } - - CYG_TEST_PASS_EXIT("serial_test"); -} - -/* Make calls to the rest of the API */ -void entry_bogus(CYG_ADDRWORD data) -{ - Cyg_IORB iorb; - char buf[1024]; - iorb.buffer = buf; - iorb.buffer_length = sizeof(buf); - - // Set mode to interrupt - CYG_DEVICE_SERIAL_RS232_NAME.set_kmode((cyg_uint32)1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_kmode(); // Doesn't exist yet - - // These could go in the entry0 routine - CYG_DEVICE_SERIAL_RS232_NAME.get_line_mode(); - CYG_DEVICE_SERIAL_RS232_NAME.set_line_mode(1); - - CYG_DEVICE_SERIAL_RS232_NAME.get_baud_rate(); - CYG_DEVICE_SERIAL_RS232_NAME.set_baud_rate(1); - - CYG_DEVICE_SERIAL_RS232_NAME.set_read_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_read_mode(); // Doesn't exist yet - // CYG_DEVICE_SERIAL_RS232_NAME.set_read_data(1, NULL, 0); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_read_blocking(&iorb); - // CYG_DEVICE_SERIAL_RS232_NAME.io_read_cancel(&iorb);// Doesn't exist yet - - CYG_DEVICE_SERIAL_RS232_NAME.set_write_mode(1); - // CYG_DEVICE_SERIAL_RS232_NAME.get_write_mode(); // Doesn't exist yet - CYG_DEVICE_SERIAL_RS232_NAME.io_write_asynchronous(&iorb); - CYG_DEVICE_SERIAL_RS232_NAME.io_write_blocking(&iorb); - // CYG_DEVICE_SERIAL_RS232_NAME.io_write_cancel(&iorb);// Doesn't exist yet -} - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - - new_thread(entry0, 0); - - Cyg_Scheduler::start(); - - CYG_TEST_FAIL_EXIT("Not reached"); - - entry_bogus(0); // To prevent selective linking from GC all the bogus calls. -} - -#else // CYG_DEVICE_SERIAL_RS232_TX39_NAME - -externC void -cyg_start(void) -{ - CYG_TEST_INIT(); - CYG_TEST_PASS_EXIT("N/A: required serial device not present"); -} - -#endif // CYG_DEVICE_SERIAL_RS232_TX39_NAME - -// EOF tx39_serial_tests.cxx diff --git a/packages/devs/wallclock/current/ChangeLog b/packages/devs/wallclock/current/ChangeLog --- a/packages/devs/wallclock/current/ChangeLog +++ b/packages/devs/wallclock/current/ChangeLog @@ -1,3 +1,69 @@ +1999-04-20 Jonathan Larmour + + * tests/wallclock.cxx (cyg_start): Output message to show the test + has started + (wallclock_thread): Add call to CYG_TEST_STILL_ALIVE, so the user + can see that the test is still running. + Fix for PR 19870 + +1999-04-12 John Dallaway + + * include/pkgconf/wallclock.h: Add cdl_package doc attribute. + +1999-04-07 Jesper Skov + PR 19667 + * tests/wallclock.cxx (cyg_start): + Changed to use the new Cyg_Thread constructor. + +1999-03-22 Hugo Tyson + + * tests/wallclock.cxx: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-12 Hugo Tyson + + * tests/wallclock.cxx: + Deal with CYGNUM_HAL_MINIMUM_STACK_SIZE requirement. + + +1999-03-05 Jonathan Larmour + + * include/wallclock.hxx: + Remove dependency on cyg/kernel/ktypes.h + Tidy + + * src/emulate.cxx: + Include cyg/kernel/ktypes.h since it isn't included in wallclock.hxx + any more + +1999-03-04 Gary Thomas + + * include/pkgconf/wallclock.h: Make package stand-alone (no "DEVICES"). + +1999-02-02 Jesper Skov + PR 18970 + * tests/wallclock.cxx (LOOPS_SIM): Only do two loops on + SIM. MN10300 sim takes 1min15secs to do one loop. + +1999-01-26 Jesper Skov + (PR 18305) + * tests/wallclock.cxx: Removed MIPS specific hackery. Now + dependent on cyg_test_is_simulator state. + +1999-01-21 Jesper Skov + PR 18847 + * tests/wallclock.cxx (LOOPS_HW): Reduce run-time to 20 seconds. + +1999-01-19 Nick Garnett + + * tests/wallclock.cxx: Added test of cyg_test_is_simulator to + reduce time on simulated hardware. PR 18715. + +1998-12-17 Jesper Skov + + * tests/wallclock.cxx: Do NOP test if kernel RTC disabled. + 1998-10-23 Jesper Skov * tests/wallclock.cxx: Reduce test time on TX39 SIM. @@ -69,7 +135,7 @@ Wed Jul 22 21:04:15 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/devs/wallclock/current/include/pkgconf/wallclock.h b/packages/devs/wallclock/current/include/pkgconf/wallclock.h --- a/packages/devs/wallclock/current/include/pkgconf/wallclock.h +++ b/packages/devs/wallclock/current/include/pkgconf/wallclock.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_WALLCLOCK_H // ==================================================================== // -// pkgconf/wallclock.h +// pkgconf/wallclock.h // -// Wallclock configuration file +// Wallclock configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-07-29 -// Purpose: To allow the user to edit wallclock config options. +// Author(s): nickg +// Contributors: nickg +// Date: 1998-07-29 +// Purpose: To allow the user to edit wallclock config options. // Description: //####DESCRIPTIONEND#### // @@ -47,7 +47,6 @@ cdl_package CYGPKG_DEVICES_WALLCLOCK { display "Wallclock device" - parent CYGPKG_DEVICES requires CYGVAR_KERNEL_COUNTERS_CLOCK description " The wallclock device provides real time stamps, as opposed @@ -57,6 +56,7 @@ interacting with a suitable clock chip, or it may be emulated by using the kernel timers. " + doc ref/ecos-ref/p-cygpkg-devices-wallclock.html } }}CFG_DATA */ diff --git a/packages/devs/wallclock/current/include/wallclock.hxx b/packages/devs/wallclock/current/include/wallclock.hxx --- a/packages/devs/wallclock/current/include/wallclock.hxx +++ b/packages/devs/wallclock/current/include/wallclock.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// wallclock.hxx +// wallclock.hxx // -// Wallclock interface declaration +// Wallclock interface declaration // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,29 +25,28 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-07-14 -// Purpose: Wall Clock declarations -// Description: This file defines the interface to the wall clock device -// that provides real time stamps. This is either an interface -// to a hardware RTC like the Dallas DS12887, or it is emulated -// using the kernel clock. -// Usage: #include +// Author(s): nickg +// Contributors: nickg +// Date: 1999-03-05 +// Purpose: Wall Clock declarations +// Description: This file defines the interface to the wall clock device +// that provides real time stamps. This is either an interface +// to a hardware RTC like the Dallas DS12887, or it is emulated +// using the kernel clock. +// Usage: #include // //####DESCRIPTIONEND#### // //========================================================================== -#include -#include // assertion macros +#include // ------------------------------------------------------------------------- // Wallclock class diff --git a/packages/devs/wallclock/current/src/PKGconf.mak b/packages/devs/wallclock/current/src/PKGconf.mak --- a/packages/devs/wallclock/current/src/PKGconf.mak +++ b/packages/devs/wallclock/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/devs/wallclock/current/src/emulate.cxx b/packages/devs/wallclock/current/src/emulate.cxx --- a/packages/devs/wallclock/current/src/emulate.cxx +++ b/packages/devs/wallclock/current/src/emulate.cxx @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg +// Author(s): nickg // Contributors: nickg -// Date: 1998-07-14 -// Purpose: Wallclock emulation +// Date: 1999-03-05 +// Purpose: Wallclock emulation // //####DESCRIPTIONEND#### // @@ -45,6 +45,7 @@ #include +#include #include #include diff --git a/packages/devs/wallclock/current/tests/PKGconf.mak b/packages/devs/wallclock/current/tests/PKGconf.mak --- a/packages/devs/wallclock/current/tests/PKGconf.mak +++ b/packages/devs/wallclock/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/devs/wallclock/current/tests/wallclock.cxx b/packages/devs/wallclock/current/tests/wallclock.cxx --- a/packages/devs/wallclock/current/tests/wallclock.cxx +++ b/packages/devs/wallclock/current/tests/wallclock.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -53,12 +53,19 @@ #include +#if defined(CYGFUN_KERNEL_THREADS_TIMER) && \ + defined(CYGVAR_KERNEL_COUNTERS_CLOCK) + #include // ------------------------------------------------------------------------- // Data for the test +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#else #define STACKSIZE (2*1024) // size of thread stack +#endif char thread_stack[STACKSIZE]; @@ -71,13 +78,11 @@ Cyg_Thread *th; #define EPOCH 900000000U -#if defined(CYG_HAL_MIPS_SIM) -// Reduce time in simulated TX39 so that it runs within the timeout. -#define LOOPS 3 -#else -#define LOOPS 30 -#endif +// MN10300 sim takes 1min15secs to do one loop on 300MHz PII. +#define LOOPS_SIM 2 +#define LOOPS_HW 20 +cyg_int32 loops = LOOPS_HW; cyg_tick_count one_sec; // ------------------------------------------------------------------------- @@ -90,8 +95,10 @@ void wallclock_thread( CYG_ADDRWORD id ) Cyg_WallClock::wallclock->set_current_time( EPOCH ); - for( int i = 0; i < LOOPS; i++ ) + for( int i = 0; i < loops; i++ ) { + CYG_TEST_STILL_ALIVE(i, "tick..."); + wtime = Cyg_WallClock::wallclock->get_current_time(); if(wtime != EPOCH+i) @@ -113,15 +120,21 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting wallclock test"); + + if( cyg_test_is_simulator ) loops = LOOPS_SIM; Cyg_Clock::cyg_resolution res = Cyg_Clock::real_time_clock->get_resolution(); one_sec = ( res.divisor * 1000000000LL ) / res.dividend ; - th = new((void *)&thread) Cyg_Thread(wallclock_thread, + th = new((void *)&thread) Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + wallclock_thread, 0, - STACKSIZE, - (CYG_ADDRESS)thread_stack + "wallclock_thread", + (CYG_ADDRESS)thread_stack, + STACKSIZE ); th->resume(); @@ -131,5 +144,16 @@ cyg_start( void ) } +#else // if defined(CYGFUN_KERNEL_THREADS_TIMER) etc... + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Kernel real-time clock/threads timer disabled"); +} + +#endif // if defined(CYGFUN_KERNEL_THREADS_TIMER) etc... + // ------------------------------------------------------------------------- // EOF wallclock.cxx diff --git a/packages/devs/watchdog/current/ChangeLog b/packages/devs/watchdog/current/ChangeLog --- a/packages/devs/watchdog/current/ChangeLog +++ b/packages/devs/watchdog/current/ChangeLog @@ -1,3 +1,69 @@ +1999-04-21 Gary Thomas + + * tests/watchdog.cxx: The 'keep alive' message was interfering + with the watchdog measurement. Some rearrangement fixes this. + +1999-04-20 Jonathan Larmour + + * tests/watchdog.cxx: + Restrict number of loops, and number of seconds per loop when we + detect we are in a simulator. Do this instead of changing the + value of one_sec in the simulator, since this invalidates the test + somewhat. + Output occasional messages to reassure the user that the test is + still running. + Fix for PR 19865 + +1999-04-14 Jesper Skov + + * tests/watchdog.cxx (cyg_start): Added workaround for PR 17974. + +1999-04-12 John Dallaway + + * include/pkgconf/watchdog.h: Add cdl_package doc attribute. + +1999-04-08 Gary Thomas + + * tests/watchdog.cxx: PR 19773 - Loop over first test for better + coverage. Print some additional messages, especially if failure + detected. Reset watchdog after installing handler. + (watchdog_thread): Capture fail time before printing message. + +1999-04-07 Jesper Skov + PR 19667 + * tests/watchdog.cxx (cyg_start): + Changed to use the new Cyg_Thread constructor. + +1999-03-22 Hugo Tyson + + * tests/watchdog.cxx: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-12 Hugo Tyson + + * tests/watchdog.cxx: + Deal with CYGNUM_HAL_MINIMUM_STACK_SIZE requirement. + +1999-03-04 Gary Thomas + + * include/pkgconf/watchdog.h: Make package stand-alone (no "DEVICES") + +1999-02-20 Jonathan Larmour + + * src/mn10300.cxx: + Change CYG_VECTOR_WATCHDOG to CYGNUM_HAL_INTERRUPT_WATCHDOG in line + with HAL changes. + General QA improvements + +1999-02-03 Jesper Skov + PR 19034 + * tests/watchdog.cxx: Reduced run-time on SIM. + +1998-12-17 Jesper Skov + + * tests/watchdog.cxx: Do NOP test if kernel RTC disabled. + 1998-10-23 Jesper Skov * tests/watchdog.cxx (cyg_start): Reduce test time on TX39 SIM. @@ -98,7 +164,7 @@ 1998-07-29 Nick Garnett diff --git a/packages/devs/watchdog/current/src/PKGconf.mak b/packages/devs/watchdog/current/src/PKGconf.mak --- a/packages/devs/watchdog/current/src/PKGconf.mak +++ b/packages/devs/watchdog/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/devs/watchdog/current/src/emulate.cxx b/packages/devs/watchdog/current/src/emulate.cxx --- a/packages/devs/watchdog/current/src/emulate.cxx +++ b/packages/devs/watchdog/current/src/emulate.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// watchdog/emulate.cxx +// watchdog/emulate.cxx // -// Watchdog implementation emulation +// Watchdog implementation emulation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-07-29 -// Purpose: Watchdog class implementation -// Description: Contains an implementation of the Watchdog class for use +// Author(s): nickg +// Contributors: nickg +// Date: 1998-07-29 +// Purpose: Watchdog class implementation +// Description: Contains an implementation of the Watchdog class for use // when there is no hardware watchdog timer. Instead it is // emulated using an Alarm object. // diff --git a/packages/devs/watchdog/current/src/mn10300.cxx b/packages/devs/watchdog/current/src/mn10300.cxx --- a/packages/devs/watchdog/current/src/mn10300.cxx +++ b/packages/devs/watchdog/current/src/mn10300.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// watchdog/mn10300.cxx +// watchdog/mn10300.cxx // -// Watchdog implementation for MN10300 +// Watchdog implementation for MN10300 // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-07-29 -// Purpose: Watchdog class implementation -// Description: Contains an implementation of the Watchdog class for use -// with the MN10300 hardware watchdog timer. +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-18 +// Purpose: Watchdog class implementation +// Description: Contains an implementation of the Watchdog class for use +// with the MN10300 hardware watchdog timer. // //####DESCRIPTIONEND#### // @@ -86,7 +86,7 @@ Cyg_Watchdog Cyg_Watchdog::watchdog; // Interrupt object static Cyg_Interrupt interrupt( - CYG_VECTOR_WATCHDOG, + CYGNUM_HAL_INTERRUPT_WATCHDOG, 0, 0, watchdog_isr, @@ -108,7 +108,8 @@ Cyg_Watchdog::Cyg_Watchdog() // ------------------------------------------------------------------------- // Start the watchdog running. -void Cyg_Watchdog::start() +void +Cyg_Watchdog::start() { CYG_REPORT_FUNCTION(); @@ -128,7 +129,8 @@ void Cyg_Watchdog::start() // Reset watchdog timer. This needs to be called regularly to prevent // the watchdog firing. -void Cyg_Watchdog::reset() +void +Cyg_Watchdog::reset() { CYG_REPORT_FUNCTION(); @@ -146,7 +148,8 @@ void Cyg_Watchdog::reset() // ------------------------------------------------------------------------- // Trigger the watchdog as if the timer had expired. -void Cyg_Watchdog::trigger() +void +Cyg_Watchdog::trigger() { CYG_REPORT_FUNCTION(); @@ -173,7 +176,8 @@ void Cyg_Watchdog::trigger() // Register an action routine that will be called when the timer // triggers. -void Cyg_Watchdog::install_action( Cyg_Watchdog_Action *action ) +void +Cyg_Watchdog::install_action( Cyg_Watchdog_Action *action ) { CYG_REPORT_FUNCTION(); @@ -190,7 +194,8 @@ void Cyg_Watchdog::install_action( Cyg_W // ------------------------------------------------------------------------- // Deregister a previously registered action routine. -void Cyg_Watchdog::uninstall_action( Cyg_Watchdog_Action *action ) +void +Cyg_Watchdog::uninstall_action( Cyg_Watchdog_Action *action ) { CYG_REPORT_FUNCTION(); @@ -218,7 +223,8 @@ void Cyg_Watchdog::uninstall_action( Cyg // ------------------------------------------------------------------------- // ISR and DSR -cyg_uint32 watchdog_isr( cyg_vector vector, CYG_ADDRWORD data) +cyg_uint32 +watchdog_isr( cyg_vector vector, CYG_ADDRWORD data) { CYG_REPORT_FUNCTION(); @@ -226,13 +232,16 @@ cyg_uint32 watchdog_isr( cyg_vector vect CYG_REPORT_RETURN(); + // FIXME: why is this 0??? why not Cyg_Interrupt::HANDLED? - Jifl return 0; } -void watchdog_dsr(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data) +void +watchdog_dsr(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data) { } -#endif // defined(CYG_HAL_MN10300_MN103002) && !defined(CYGIMP_WATCHDOG_EMULATE) +#endif // defined(CYG_HAL_MN10300_MN103002) && + // !defined(CYGIMP_WATCHDOG_EMULATE) // ------------------------------------------------------------------------- // EOF watchdog/mn10300.cxx diff --git a/packages/devs/watchdog/current/tests/PKGconf.mak b/packages/devs/watchdog/current/tests/PKGconf.mak --- a/packages/devs/watchdog/current/tests/PKGconf.mak +++ b/packages/devs/watchdog/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/devs/watchdog/current/tests/watchdog.cxx b/packages/devs/watchdog/current/tests/watchdog.cxx --- a/packages/devs/watchdog/current/tests/watchdog.cxx +++ b/packages/devs/watchdog/current/tests/watchdog.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -52,13 +52,21 @@ #include #include +#include + +#if defined(CYGFUN_KERNEL_THREADS_TIMER) && \ + defined(CYGVAR_KERNEL_COUNTERS_CLOCK) #include // ------------------------------------------------------------------------- // Data for the test +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#else #define STACKSIZE (2*1024) // size of thread stack +#endif char thread_stack[STACKSIZE]; @@ -69,17 +77,23 @@ char thread[sizeof(Cyg_Thread)]; Cyg_Thread *th; -volatile cyg_count8 watchdog_state; +cyg_tick_count one_sec; +volatile bool watchdog_fired; +volatile cyg_tick_count watchdog_time; -cyg_tick_count one_sec; - +#define WATCHDOG_LOOPS_HW 5 +#define WATCHDOG_LOOPS_SIM 1 +#define WATCHDOG_SECS_PER_LOOP_HW 10 +#define WATCHDOG_SECS_PER_LOOP_SIM 2 +#define WATCHDOG_SECS_TILL_TIMEOUT 10 // ------------------------------------------------------------------------- // Action functions: void watchdog_action1( CYG_ADDRWORD data ) { - CYG_TEST_FAIL_FINISH("Watchdog triggered unexpectedly"); + watchdog_fired = true; + watchdog_time = Cyg_Clock::real_time_clock->current_value(); } void watchdog_action2( CYG_ADDRWORD data ) @@ -93,22 +107,59 @@ void watchdog_action2( CYG_ADDRWORD data void watchdog_thread( CYG_ADDRWORD id ) { + cyg_tick_count watchdog_start_time; + cyg_tick_count thread_start_time, thread_end_time; + cyg_ucount8 watchdog_loops, watchdog_secs_per_loop; + + if (cyg_test_is_simulator) { + watchdog_loops = WATCHDOG_LOOPS_SIM; + watchdog_secs_per_loop = WATCHDOG_SECS_PER_LOOP_SIM; + } else { + watchdog_loops = WATCHDOG_LOOPS_HW; + watchdog_secs_per_loop = WATCHDOG_SECS_PER_LOOP_HW; + } + + watchdog_fired = false; Cyg_Watchdog::watchdog.start(); - // First test that the watchdog does not trigger when being reset. - { + CYG_TEST_INFO("Testing that watchdog does not fire early"); + + for (cyg_ucount8 tries = 0; tries < watchdog_loops; tries++) { + diag_printf("Iteration #%d (testing over %d seconds)\n", + tries, watchdog_secs_per_loop); + + // First test that the watchdog does not trigger when being reset. Cyg_Watchdog_Action wdaction( watchdog_action1, 0 ); wdaction.install(); + Cyg_Watchdog::watchdog.reset(); + + watchdog_start_time = Cyg_Clock::real_time_clock->current_value(); + watchdog_fired = false; - for( int i = 0; i < 10; i++ ) - { + for( cyg_ucount8 i = 0; i < watchdog_secs_per_loop; i++ ) { + thread_start_time = Cyg_Clock::real_time_clock->current_value(); th->delay( one_sec-2 ); Cyg_Watchdog::watchdog.reset(); + if (watchdog_fired) { + thread_end_time = Cyg_Clock::real_time_clock->current_value(); + diag_printf("Watchdog fired prematurely after %d ticks\n", + (int)(watchdog_time - watchdog_start_time)); + diag_printf(" Thread slept for %d ticks, loop #%d\n", + (int)(thread_end_time - thread_start_time), i); + CYG_TEST_FAIL_FINISH("Watchdog triggered unexpectedly"); + break; + } else { + CYG_TEST_STILL_ALIVE(i, "Resetting watchdog..."); + Cyg_Watchdog::watchdog.reset(); + watchdog_fired = false; + watchdog_start_time = Cyg_Clock::real_time_clock->current_value(); + } } } // Now check that it triggers when not reset + CYG_TEST_INFO("Testing that watchdog fires"); { Cyg_Watchdog_Action wdaction( watchdog_action2, 0 ); @@ -116,7 +167,7 @@ void watchdog_thread( CYG_ADDRWORD id ) Cyg_Watchdog::watchdog.reset(); - th->delay( one_sec*10 ); + th->delay( one_sec*WATCHDOG_SECS_TILL_TIMEOUT ); } CYG_TEST_FAIL_FINISH("Watchdog failed to trigger"); @@ -132,17 +183,20 @@ cyg_start( void ) Cyg_Clock::cyg_resolution res = Cyg_Clock::real_time_clock->get_resolution(); -#if defined(CYG_HAL_MIPS_SIM) - // Reduce time in simulated TX39 so that it runs within the timeout. - one_sec = ( res.divisor * 200000000LL ) / res.dividend ; -#else - one_sec = ( res.divisor * 1000000000LL ) / res.dividend ; +#if !defined(CYGIMP_WATCHDOG_EMULATE) && defined(CYGPKG_HAL_MN10300_STDEVAL1) + // Workaround for PR 17974 + if( cyg_test_is_simulator ) + CYG_TEST_NA("Watchdog device not implemented in MN10300 simulator."); #endif - th = new((void *)&thread) Cyg_Thread(watchdog_thread, + one_sec = ( res.divisor * 1000000000LL ) / res.dividend ; + + th = new((void *)&thread) Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + watchdog_thread, 0, - STACKSIZE, - (CYG_ADDRESS)thread_stack + "watchdog_thread", + (CYG_ADDRESS)thread_stack, + STACKSIZE ); th->resume(); @@ -152,5 +206,16 @@ cyg_start( void ) } +#else // if defined(CYGFUN_KERNEL_THREADS_TIMER) etc... + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Kernel real-time clock/threads timer disabled"); +} + +#endif // if defined(CYGFUN_KERNEL_THREADS_TIMER) etc... + // ------------------------------------------------------------------------- // EOF watchdog.cxx diff --git a/packages/error/current/ChangeLog b/packages/error/current/ChangeLog --- a/packages/error/current/ChangeLog +++ b/packages/error/current/ChangeLog @@ -1,3 +1,7 @@ +1999-04-14 John Dallaway + + * include/pkgconf/error.h: Add cdl_package doc attribute. + 1998-09-11 Bart Veer * include/pkgconf/error.h: @@ -32,7 +36,7 @@ Wed Aug 12 11:04:27 BST 1998 Chris Prov // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/error/current/include/codes.h b/packages/error/current/include/codes.h --- a/packages/error/current/include/codes.h +++ b/packages/error/current/include/codes.h @@ -24,18 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-06-11 -// Purpose: To provide a common set of error codes -// Description: This provides a common set of error codes that all packages can +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1998-06-11 +// Purpose: To provide a common set of error codes +// Description: This provides a common set of error codes that all packages can // agree on. It doesn't preclude them defining their own error // return system, but this is a preferable system to use to help // error support be as general as possible. @@ -43,7 +43,7 @@ // We try and conform to the ANSI/POSIX error code format, namely // starting with the character 'E' // -// Usage: #include +// Usage: #include // // Example: // @@ -62,7 +62,7 @@ // CONFIGURATION #include // Configuration header -#include // externC +#include // externC // Include the error package? #ifdef CYGPKG_ERROR diff --git a/packages/error/current/include/pkgconf/error.h b/packages/error/current/include/pkgconf/error.h --- a/packages/error/current/include/pkgconf/error.h +++ b/packages/error/current/include/pkgconf/error.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-06-11 // Purpose: To configure the Common error package // Description: Does any necessary configuration of the Common error package @@ -65,6 +65,7 @@ POSIX style naming e.g. EINVAL etc. This package also provides the standard strerror() function to convert error codes to textual representation." + doc ref/ecos-ref/p-cygpkg-error.html type bool } diff --git a/packages/error/current/src/PKGconf.mak b/packages/error/current/src/PKGconf.mak --- a/packages/error/current/src/PKGconf.mak +++ b/packages/error/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/error/current/src/strerror.cxx b/packages/error/current/src/strerror.cxx --- a/packages/error/current/src/strerror.cxx +++ b/packages/error/current/src/strerror.cxx @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-06-11 -// Purpose: To provide the strerror() implementation -// Description: This implements strerror() as described in ANSI chap 7.11.6.2 -// Usage: See +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1998-06-11 +// Purpose: To provide the strerror() implementation +// Description: This implements strerror() as described in ANSI chap 7.11.6.2 +// Usage: See // //####DESCRIPTIONEND#### // diff --git a/packages/hal/arm/aeb/current/ChangeLog b/packages/hal/arm/aeb/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -0,0 +1,242 @@ +1999-04-13 Gary Thomas + + * src/aeb_misc.c: Add some testing code using a second timer. + + * include/hal_platform_setup.h: New file + +1999-04-08 John Dallaway + + * include/pkgconf/mlt_arm_aeb_rom.ldi: Fix SECTION macro which + was missed during recent macro arguments change + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Make GDB 'O' transaction + run with interrupts disabled. + +1999-03-23 John Dallaway + + * include/pkgconf/hal_arm_aeb.h: Modify display string for + consistency. + +1999-03-17 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Don't disable all + interrupts, just the serial port during output. + + * src/aeb_misc.c: Add support for "abort" button. This works + like ^C if GDB break support is compiled in. + (hal_clock_read): Only return "reasonable" deltas - hardware + sometimes gives flakey/implausible counts. + + * include/hal_platform_ints.h: Improve interrupt assignments. + +1999-03-16 Gary Thomas + + * src/hal_diag.c: + * include/plf_stub.h: + * src/plf_stub.c: Add GDB break support. + +1999-03-12 Gary Thomas + + * include/hal_cache.h (HAL_DCACHE_PURGE_ALL): Add macro. + + * include/hal_platform_ints.h: Add additional interrupt sources + (UARTs and WATCHDOG). + +1999-03-11 John Dallaway + + * include/pkgconf/*.ldi: add copyright notices + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-26 Gary Thomas + + * misc/Notes: + * misc/PKGconf.mak: Fix stubs build for new layout. + + * misc/gdb_module.c: Update version. Build with new stubs. + +1999-02-20 Jonathan Larmour + + * include/hal_platform_ints.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * src/aeb_misc.c: + Change interrupt names due to above + QA improvements + +1999-02-17 John Dallaway + + * include/pkgconf/ram.mlt: Relocate the GDB stubs + * include/pkgconf/ram.ldi: Relocate the GDB stubs + * include/pkgconf/stubs.mlt: Relocate the GDB stubs + * include/pkgconf/stubs.ldi: Relocate the GDB stubs + +1999-02-16 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Changed + __output_gdb_string to hal_output_gdb_string. + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/plf_stub.c: [added] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-08 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-08 Gary Thomas + + * include/pkgconf/rom.ldi: Add segment for ROM + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-02-02 John Dallaway + + * include/pkgconf/hal_arm_aeb.h: Correct the specified platform. + +1999-01-19 Gary Thomas + + * include/pkgconf/rom.ldi: Modified for new layouts. + + * include/pkgconf/stubs.ldi: New file. + + * misc/gdb_module.c: Start of module changed name (due to rework + of exception handling in the GDB stubs). + + * src/hal_stub.c: Reorg - move common routines to "arch" directory. + +1999-01-18 Gary Thomas + + * include/pkgconf/rom.ldi: Add configurations for GDB stubs/normal ROM. + +1999-01-15 Gary Thomas + + * misc/Notes: Update for new directory layout. + + * include/hal_diag.h: Add prototype for 'hal_diag_read_char()' + + * src/hal_stub.c: Take out memory trace buffer (debug only). + + * src/hal_diag.c: Reduce buffer size. + + * misc/PKGconf.mak (SRC): Fix path. + +1999-01-14 Gary Thomas + + * misc/PKGconf.mak: Rename 'TESTS' to 'PROGS' due to + changes in "makrules.prv". + + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: New files. + + * src/PKGconf.mak: Change to MLT script linking. + +1999-01-12 Gary Thomas + + * tests/flash_cksum.tcl: Always swap to Little Endian format. + + * src/aeb.ld: Change DATA address for ROM (GDB) configuration. + +1999-01-08 Gary Thomas + + * tests/gdb_module.c: Clean up to work in all configurations. + + * tests/PKGconf.mak (TESTS): Clean up. + +1999-01-06 Gary Thomas + + * tests/PKGconf.mak: Update to use tcl checksum program. + + * tests/Notes: Advise on required zeroes. + + * tests/gdb_module.c: Update module name/info. + +1998-12-22 Gary Thomas + + * include/hal_cache.h: New [moved] file. + +1998-12-21 Gary Thomas + + * src/aeb_misc.c (hal_clock_initialize): Set timer0 scale. + +1998-12-20 Gary Thomas + + * tests/flash_cksum.c: Handle big/little endian hosts. + + * src/hal_stub.c: Remove unused '__set_mem_fault'. + Blink LED1 with GDB I/O (semblance of life). + +1998-12-18 Gary Thomas + + * tests/gdb_module_ncs.c: + * tests/PKGconf.mak: + * tests/gdb_module.c: New file(s) used to build FLASH module + +1998-12-17 Gary Thomas + + * src/aeb.ld: Change log address to use all available RAM. + + * include/pkgconf/hal_arm_aeb.h: New file + +1998-12-16 Gary Thomas + + * include/hal_platform_ints.h: New file for platform + interrupt specifics. + + * src/hal_diag.c: + * src/aeb.ld: + * src/aeb_misc.c: Complete initial port. + +1998-12-15 Gary Thomas + + * src/hal_stub.c: + * src/hal_diag.c: + * src/PKGconf.mak: + * src/aeb.ld: + * include/hal_stub.h: + * include/hal_diag.h: + * include/pkgconf/hal_arm_aeb.h: New file. + + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/arm/aeb/current/include/hal_cache.h b/packages/hal/arm/aeb/current/include/hal_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/hal_cache.h @@ -0,0 +1,205 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-28 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 0x800 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 4 // Size of a data cache line +#define HAL_DCACHE_WAYS 4 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 0x800 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 4 // Size of a cache line +#define HAL_ICACHE_WAYS 4 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +// Cache & SRAM control +#define CYG_DEVICE_CCR ((volatile cyg_uint8 *)0xFFFFA400) +#define CYG_DEVICE_LSCR ((volatile cyg_uint8 *)0xFFFFA404) + +#define CCR_E 0x01 // Cache enabled +#define CCR_S 0x02 // SRAM mode enabled +#define CCR_F 0x04 // Flush mode enabled +#define CCR_I 0x08 // Invalidate mode + +#define LCSR_E 0x01 // Local SRAM enabled +#define LCSR_L 0x02 // Local SRAM mapped to high memory + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() \ +{ \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, CCR_E); \ +} + +// Disable the data cache +#define HAL_DCACHE_DISABLE() \ +{ \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, 0); \ +} + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() \ +{ \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, CCR_I); \ +} + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() \ +{ \ + cyg_uint32 *cache_SRAM = (cyg_uint32 *)0x60000800; \ + int i; \ + cyg_uint32 old_ccr; \ + HAL_READ_UINT32(CYG_DEVICE_CCR, old_ccr); \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, CCR_F); \ + for (i = 0; i < HAL_DCACHE_SETS; i++) { \ + *cache_SRAM = 0; \ + cache_SRAM += HAL_DCACHE_LINE_SIZE; \ + } \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, CCR_I); \ + HAL_WRITE_UINT32(CYG_DEVICE_CCR, old_ccr); \ +} + +// Purge contents of data cache +#define HAL_DCACHE_PURGE_ALL() HAL_DCACHE_INVALIDATE_ALL() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache - use Data cache controls since they +// are not separatable. + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() HAL_DCACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() HAL_DCACHE_SYNC(); HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/packages/hal/arm/aeb/current/include/hal_diag.h b/packages/hal/arm/aeb/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/hal_diag.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_DIAG_H */ diff --git a/packages/hal/arm/aeb/current/include/hal_platform_ints.h b/packages/hal/arm/aeb/current/include/hal_platform_ints.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/hal_platform_ints.h @@ -0,0 +1,69 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock assignments for AEB-1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: Define Interrupt support +// Description: The interrupt specifics for the AEB-1 board/platform are +// defined here. +// +// Usage: #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_EXT0 0 +#define CYGNUM_HAL_INTERRUPT_EXT1 1 +#define CYGNUM_HAL_INTERRUPT_EXT2 2 +#define CYGNUM_HAL_INTERRUPT_EXT3 3 +#define CYGNUM_HAL_INTERRUPT_TIMER0 6 +#define CYGNUM_HAL_INTERRUPT_TIMER1 7 +#define CYGNUM_HAL_INTERRUPT_TIMER2 8 +#define CYGNUM_HAL_INTERRUPT_UART0 9 +#define CYGNUM_HAL_INTERRUPT_UART1 10 +#define CYGNUM_HAL_INTERRUPT_UART2 11 +#define CYGNUM_HAL_INTERRUPT_WATCHDOG 12 +#define CYGNUM_HAL_INTERRUPT_unused 13 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 13 +#define CYGNUM_HAL_ISR_COUNT 14 + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER0 + +#endif // CYGONCE_HAL_PLATFORM_INTS_H diff --git a/packages/hal/arm/aeb/current/include/hal_platform_setup.h b/packages/hal/arm/aeb/current/include/hal_platform_setup.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/hal_platform_setup.h @@ -0,0 +1,77 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-13 +// Purpose: ARM/AEB-1 platform specific support routines +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#if CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE==4096 +// Override default to a more sensible value +#undef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 2048 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#define PLATFORM_SETUP1 \ + ldr r1,=segment_register_setups ;\ +10: ldr r2,[r1,#0] /* segment address */ ;\ + cmp r2,#0 ;\ + beq 20f ;\ + ldr r3,[r1,#4] /* segment start */ ;\ + str r3,[r2,#0x00] ;\ + ldr r3,[r1,#8] /* segment end */ ;\ + str r3,[r2,#0x20] ;\ + ldr r3,[r1,#12] /* segment flags */ ;\ + str r3,[r2,#0x40] ;\ + add r1,r1,#16 /* next segment */ ;\ + b 10b ;\ +segment_register_setups: ;\ + .long 0xFFFFA008,0x00008000,0x00028000,0x00007804 /* segment 2 */ ;\ + .long 0xFFFFA00C,0x00028000,0x01000000,0x00000000 /* segment 3 */ ;\ + .long 0 ;\ +20: +#else +#define PLATFORM_SETUP1 +#endif + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */ diff --git a/packages/hal/arm/aeb/current/include/pkgconf/hal_arm_aeb.h b/packages/hal/arm/aeb/current/include/pkgconf/hal_arm_aeb.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/hal_arm_aeb.h @@ -0,0 +1,81 @@ +#ifndef CYGONCE_PKGCONF_HAL_ARM_AEB_H +#define CYGONCE_PKGCONF_HAL_ARM_AEB_H +// ==================================================================== +// +// pkgconf/hal_arm_aeb.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-12-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_ARM_AEB { + display "ARM AEB-1 evaluation board" + type radio + parent CYGPKG_HAL_ARM + platform aeb + description " + The aeb HAL package provides the support needed to run + eCos on a ARM AEB-1 eval board." + } + + cdl_option CYGHWR_HAL_ARM_AEB_STARTUP { + display "Startup type" + parent CYGPKG_HAL_ARM_AEB + #type count + type enum + legal_values ram rom stubs + startup + description " + When targetting the AEB-1 eval board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM. Selection of 'stubs' is for the special case of + building the eCos GDB stubs themselves." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_ARM_AEB_STARTUP ram + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_ARM_AEB_H */ +/* EOF hal_arm_aeb.h */ diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.ldi b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0xc000, LENGTH = 0x1c000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0xc000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.mlt b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram c000 1c000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 c000 c000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.ldi b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + rom : ORIGIN = 0x04018000, LENGTH = 0x08000 + ram : ORIGIN = 0x00008000, LENGTH = 0x20000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x4018000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x8000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.mlt b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 8000 20000 0 ! +region rom 4018000 8000 1 ! +section data 0 1 1 1 1 1 0 0 8000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 4018000 4018000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.ldi b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x8000, LENGTH = 0x4000 + rom : ORIGIN = 0x4018000, LENGTH = 0x8000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x4018000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x8000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.mlt b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 8000 4000 0 ! +region rom 4018000 8000 1 ! +section data 0 1 1 1 1 1 0 0 8000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 4018000 4018000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/arm/aeb/current/include/plf_stub.h b/packages/hal/arm/aeb/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/plf_stub.h @@ -0,0 +1,82 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 1999-02-15 +// Purpose: Platform HAL stub support for ARM/AEB boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. + +extern void hal_aeb_init_serial(void); +extern int hal_aeb_get_char(void); +extern void hal_aeb_put_char(int c); +extern int hal_aeb_interruptible(int); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_aeb_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_aeb_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_aeb_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_aeb_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/arm/aeb/current/misc/Notes b/packages/hal/arm/aeb/current/misc/Notes new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/misc/Notes @@ -0,0 +1,263 @@ +=========================================================================== +####COPYRIGHTBEGIN#### + +------------------------------------------- +The contents of this file are subject to the Cygnus eCos Public License +Version 1.0 (the "License"); you may not use this file except in +compliance with the License. You may obtain a copy of the License at +http://sourceware.cygnus.com/ecos + +Software distributed under the License is distributed on an "AS IS" +basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +License for the specific language governing rights and limitations under +the License. + +The Original Code is eCos - Embedded Cygnus Operating System, released +September 30, 1998. + +The Initial Developer of the Original Code is Cygnus. Portions created +by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +------------------------------------------- + +####COPYRIGHTEND#### +=========================================================================== + +1999-01-05, revised 1999-03-11 + +How to build and install the GDB module on the AEB-1 +==================================================== + +Overview +-------- + +The ARM AEB-1 comes with tools in ROM. These include a simple FLASH +management tool and the Angel (R) monitor. eCos for the ARM AEB-1 +comes with GDB stubs suitable for programming into the onboard FLASH. +GDB is the preferred debug environment for eCos, but Angel must be +used to initially install the GDB stubs. + +Once this bootstrapping is done, you can use GDB to load and debug +programs on the AEB-1 board. + +The following steps will have you: + +* talk to the AEB-1 board with a terminal emulator (or a real + terminal!) + +* enable ARM's Angel ROM monitor + +* use GDB with Angel to download a configuration of eCos with GDB + stubs which will act as a ROM monitor + +* talk to the AEB-1 with a terminal emulator again, and tell it to + write the new module to flash + +* tell the board to use this new monitor, and then hook GDB up to it + for real debugging + +Talking to the board +-------------------- + +Connect a terminal or computer's serial port to the ARM AEB-1. On a +PC with a 9-pin serial port, you can use the cable shipped by ARM with +no modification. + +Set the terminal or terminal emulator to 9600N1 (9600 baud, no parity, +1 stop bit). + +Reset the board by pressing the little reset button on the top. You +will see the following text: + + ARM Evaluation Board Boot Monitor 0.01 (19 APR 1998) + Press ENTER within 2 seconds to stop autoboot + +Press ENTER quickly, and you will get the boot prompt: + + Boot: + + +Downloading the GDB stubs +------------------------- + +Run the angel monitor by typing the following at the Boot: prompt: + + Boot: plugin angel + Boot: angel + +Then exit the terminal emulator and start up gdb with the GDB module: + + $ arm-elf-gdb -nw loaders/arm-aeb/gdb_module.img + (gdb) set remotebaud 9600 + (gdb) target rdi s= + +On Windows, the serial port could be com1, com2, etc. On a UNIX or +Linux system, the serial port would be /dev/cua0 or /dev/cua1. +Examples are: + + (gdb) target rdi s=com1 + (gdb) target rdi s=/dev/cua0 + +Finally, load the GDB stubs image: + + (gdb) load + Loading section .rom_vectors, size 0x44 lma 0xc000 + Loading section .text, size 0x3544 lma 0xc044 + Loading section .rodata, size 0x164 lma 0xf588 + Loading section .data, size 0x110 lma 0xf6ec + Start address 0xc044 , load size 14332 + Transfer rate: 12739 bits/sec. + +(Note that the sizes may not exactly match the ones you see on your +system.) + +Once the loading is done, quit GDB: + + (gdb) quit + + +Activating the GDB stubs +------------------------ + +Connect a terminal emulator to the board again, reset the board, and +type enter within two seconds to get the Boot: prompt. This is the +same thing you did at the beginning of this procedure. + +Commit the GDB stubs module to flash: + + Boot: flashwrite 4018000 C000 8000 + +Verify that the eCos/"GDB stubs" module is now added in the list of +modules in the board: + + Boot: rommodules + +You should see the following output: + + Header Base Limit + 04000004 04000000 040034a8 BootStrap 1.00 (14 Aug 1998) + 04003a74 04003800 04003bc0 Production Test 1.00 (13 Aug 1998) + 0400e4f4 04004000 0400e60f Angel 1.02 (12 MAY 1998) + 0401ac00 04018000 0401aed8 eCos 1.2 (26 Feb 1999) GDB stubs + +Now make the eCos/"GDB stubs" module be the default monitor: + + Boot: plugin eCos + + +Running and debugging an application +------------------------------------ + +Configure eCos from scratch for the ARM AEB-1 platform, and build your +application. Remember that the AEB-1 board only has 128K of RAM. + +Exit from the terminal emulator (you will not need it anymore for +normal operations), and run gdb: + + $ arm-elf-gdb -nw executable + (gdb) set remotebaud 38400 + (gdb) target remote + (gdb) load + +You can now run your program in the usual way under GDB'S control + +Notice that the GDB stub runs at 38400 baud. + + +Building the GDB stubs +---------------------- + +We provide the GDB stubs image in the directory +loaders/arm-aeb/gdb_module.img, but here are instructions on how to +rebuild them if you should ever need to. + +1. Configure a minimal eCos system with all packages except 'infra' + disabled. If you are doing manual configuration, you can do so + with + + tcl /work2/ecc/ecc/pkgconf.tcl \ + --target=arm --platform=aeb --startup=stubs \ + --disable CYGPKG_KERNEL --disable CYGPKG_UITRON \ + --disable CYGPKG_LIBC --disable CYGPKG_LIBM \ + --disable CYGPKG_ERROR --disable CYGPKG_IO \ + --disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ + --disable CYGPKG_DEVICES_WATCHDOG + + and if you are using the Configuration Tool GUI, you can select the + ARM AEB platform, with GDB stubs startup, and enable the HAL and + INFRA packages and disable all other packages. + +2. Edit to enable GDB: + #define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + #undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + + you can use the following patch: + +--- pkgconf/hal.h~ Wed Mar 10 13:08:58 1999 ++++ pkgconf/hal.h Thu Mar 11 15:53:16 1999 +@@ -356,9 +356,9 @@ + + }}CFG_DATA */ + +-#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS ++#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +-#define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT ++#undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + + /* + * NOTE: + + +3. make misc + +The gdb_module.img file will be built in the directory +hal/arm/aeb/current/misc + + +Alternate way of loading the initial stubs +------------------------------------------ + +Using the AEB-1 module tool, install the GDB stubs from the provided +".UU" file. + +>>> This is an annotated 'terminal' session with the AEB-1 monitor: + +ARM Evaluation Board Boot Monitor 0.01 (19 APR 1998) +Press ENTER within 2 seconds to stop autoboot +Boot: help +Module is BootStrap 1.00 (14 Aug 1998) + +Help is available on: + Help Modules ROMModules UnPlug PlugIn + Kill SetEnv UnSetEnv PrintEnv DownLoad + Go GoS Boot PC FlashWrite + FlashLoad FlashErase + +Boot: download c000 +Ready to download. Use 'transmit' option on terminal emulator to download file. + + ... at this point, I told my terminal emulator (minicom) to download the ASCII file + gdb_module.img.UU (probably needs a different name on Win/NT) + I had to enter ^D when the download was complete to get the monitor to come back. + +Loaded file gdb_module.img.raw at address 0000c000, size = 13905 + +Boot: flashwrite 4018000 c000 4000 + + As above, this command actually programs the FLASH. + +Boot: rommodules +Header Base Limit +04000004 04000000 040034a8 BootStrap 1.00 (14 Aug 1998) +04003a74 04003800 04003bc0 Production Test 1.00 (13 Aug 1998) +0400e4f4 04004000 0400e60f Angel 1.02 (12 MAY 1998) +0401b608 04018000 0401b844 eCos 1.2 (26 Feb 1999) GDB stubs + + This verifies that the eCos GDB stubs are available in FLASH. + +Boot: plugin ecos + + This makes the eCos GDB stubs the default "monitor." When reset the + AEB-1 will start the GDB stubs, after the initial 2 second escape + period. diff --git a/packages/hal/arm/aeb/current/misc/PKGconf.mak b/packages/hal/arm/aeb/current/misc/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/misc/PKGconf.mak @@ -0,0 +1,69 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/aeb/misc +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +# +# This makefile is quite complicated because it needs to generate the resulting +# image file twice. This is necessary to compute the FLASH/ROM checksum needed +# by the AEB-1 monitor module structure. +# + +PACKAGE := hal_arm_aeb +include ../../../../../pkgconf/pkgconf.mak + +PROGS := gdb_module_ncs +OTHER_PROGS := gdb_module.img +WHEREAMI := misc + +CKSUM = 0 + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv + +SRC := $(COMPONENT_REPOSITORY)/$($(PACKAGE)_DIR)/misc + +gdb_module.cs: gdb_module_ncs.stamp + $(OBJCOPY) --strip-all gdb_module_ncs gdb_module.img.XX + $(OBJCOPY) --change-addresses=0xFBFF4000 gdb_module.img.XX gdb_module.img + $(OBJCOPY) -O binary gdb_module.img gdb_module.img.raw + make $(PACKAGE)_gdb_module.o CKSUM=`$(SRC)/flash_cksum.tcl gdb_module.img.raw` + $(RM) -f gdb_module.img.XX gdb_module.img.raw + +$(PACKAGE)_gdb_module.o: $(SRC)/gdb_module.c gdb_module_ncs.stamp + $(CC) -c $(INCLUDE_PATH) $(CFLAGS) -o $(PACKAGE)_gdb_module.o \ + $(SRC)/gdb_module.c -DCHECKSUM=$(CKSUM) + +gdb_module.img: gdb_module.cs gdb_module.stamp + $(OBJCOPY) --strip-all gdb_module gdb_module.img.XX + $(OBJCOPY) --change-addresses=0xFBFF4000 gdb_module.img.XX gdb_module.img + $(OBJCOPY) -O binary gdb_module.img gdb_module.img.raw + $(RM) -f gdb_module.img.XX + +gdb_module.img.UU: gdb_module.img + uuencode gdb_module.img.raw gdb_module.img.raw | tr '`' ' ' >gdb_module.img.UU + diff --git a/packages/hal/arm/aeb/current/misc/flash_cksum.tcl b/packages/hal/arm/aeb/current/misc/flash_cksum.tcl new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/misc/flash_cksum.tcl @@ -0,0 +1,140 @@ +#!/bin/sh +# the next line restarts using tclsh \ + exec tclsh "$0" ${1+"$@"} + +#=============================================================================== +# +# flash_cksum.tcl +# +# Compute the checksum for a AEB-1 flash module +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# Copyright (c) 1999 Cygnus Solutions +# +# This is copyrighted software that may only +# be reproduced, modified, or distributed +# under license from Cygnus Solutions. +# +#####COPYRIGHTEND#### +#=============================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contact(s): gthomas +# Date: 1999/01/06 +# Version: 0.01 $RcsVersion$ +# Purpose: Compute the checksum for a FLASH ROM module. +# Description: +# Requires: A working Tcl interpreter, V8.0 or later. +# Provides: Command line operation only. +# Inputs: +# Side FX: +# Outputs: +# See also: 'Notes' which describes the process of creating the GDB stubs +# module. +# Known bugs: +# Usage: +# +#####DESCRIPTIONEND#### +#=============================================================================== + +# +# This ckecksum is the 32-bit XOR of all 32 bit words in the file. +# The output of the program is a single number, suitable for use in +# a Makefile/script used to create an AEB-1 module for FLASH ROM. +# + +proc checksum { name } { + + set status [ catch { + set fd [open $name "r"] + fconfigure $fd -translation binary + set data [read $fd] + close $fd + } message] + + if { $status != 0 } { + puts "Unable to read file $name: $message" + exit 1 + } + + set sum 0 + set length [string length $data] + for { set i 0 } { $i < $length } { incr i 4 } { + # Fetch the next 32 bit word. The funky tests are to handle the case + # of zero bytes. + set char0 [string index $data [expr $i + 0]] + if { "$char0" != "" } { + scan $char0 "%c" ascii0 + } else { + set ascii0 0 + } + set char1 [string index $data [expr $i + 1]] + if { "$char1" != "" } { + scan $char1 "%c" ascii1 + } else { + set ascii1 0 + } + set char2 [string index $data [expr $i + 2]] + if { "$char2" != "" } { + scan $char2 "%c" ascii2 + } else { + set ascii2 0 + } + set char3 [string index $data [expr $i + 3]] + if { "$char3" != "" } { + scan $char3 "%c" ascii3 + } else { + set ascii3 0 + } + set word [expr $ascii0 << 24] + set word [expr $word | [expr $ascii1 << 16]] + set word [expr $word | [expr $ascii2 << 8]] + set word [expr $word | $ascii3] + set sum [expr $sum ^ $word] + # puts "sum: [format %8.8X $sum], word: [format %8.8X $word]" + } + + return $sum +} + +proc bswap { native } { + set byte0 [expr [expr $native >> 24] & 255] + set byte1 [expr [expr $native >> 16] & 255] + set byte2 [expr [expr $native >> 8] & 255] + set byte3 [expr [expr $native >> 0] & 255] + set swapped [expr $byte3 << 24] + set swapped [expr $swapped | [expr $byte2 << 16]] + set swapped [expr $swapped | [expr $byte1 << 8]] + set swapped [expr $swapped | [expr $byte0 << 0]] + # puts "native: [format %8.8X $native], swapped: [format %8.8X $swapped]" + return $swapped +} + +global tcl_platform +set byteOrder $tcl_platform(byteOrder) +# puts "platform byte order = $byteOrder" + +# Parse command line arguments +set argc 0 +array set args { } +foreach arg $argv { + set args([incr argc]) $arg +} + +if { "$argc" != "1" } { + puts "usage: flash_cksum " + exit 1 +} + +set cksum [checksum $args(1)] + +# if { "$byteOrder" == "littleEndian" } { + # puts "Swap bytes!" + set cksum [bswap $cksum] +# } + +puts "[format 0x%8.8X $cksum]" + diff --git a/packages/hal/arm/aeb/current/misc/gdb_module.c b/packages/hal/arm/aeb/current/misc/gdb_module.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/misc/gdb_module.c @@ -0,0 +1,127 @@ +//========================================================================== +// +// gdb_module.c +// +// ARM AEB-1 eval board GDB stubs (module wrapper) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-12-18 +// Description: AEB-1 FLASH module for eCos GDB stubs +//####DESCRIPTIONEND#### + +// +// This is the module 'wrapper' for the GDB stubs +// + +#include +#include +#include + +// ARM AEB-1 module stuff + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#ifndef CHECKSUM +#define CHECKSUM 0x0 +#endif + +extern char _exception_handlers, _rom_data_end; + +const char __title[] = "eCos"; +const char __help[] = "eCos 1.2 (26 Feb 1999) GDB stubs"; + +struct ModuleHeader { + cyg_uint32 magic; + cyg_uint16 flags; + cyg_uint8 major; + cyg_uint8 minor; + cyg_uint32 checksum; + cyg_uint32 ro_base; + cyg_uint32 ro_limit; + cyg_uint32 rw_base; + cyg_uint32 zi_base; + cyg_uint32 zi_limit; + cyg_uint32 self; + cyg_uint32 start; + cyg_uint32 init; + cyg_uint32 final; + cyg_uint32 service; + cyg_uint32 title; + cyg_uint32 help; + cyg_uint32 cmdtbl; + cyg_uint32 swi_base; + cyg_uint32 swi_handler; +}; + +const static struct ModuleHeader __hdr = { + 0x4D484944, // MHID + 2, // flags = auto start + 1, // major + 0, // minor + CHECKSUM, // checksum + (cyg_uint32) &_exception_handlers, // start of module (read-only) image + (cyg_uint32) &_rom_data_end, // end of image + 0, // r/w base - unused + 0, // bss base - unused + 0, // bss limit - unused + (cyg_uint32) &__hdr, // self (for module identification) + (cyg_uint32) &_exception_handlers, // startup + 0, // init - unused + 0, // final - unused + 0, // service - unused + (cyg_uint32) &__title, // title + (cyg_uint32) &__help, // help string + 0, // command table - unused + 0, // SWI table - unused + 0 // SWI handler - unused +}; + +static void +__dummy(void *p) +{ +} + +void cyg_start (void) +{ + __dummy((void *)&__hdr); // Just to keep it in! + for(;;) breakpoint(); +} +#else + +#include + +void cyg_start (void) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Stand-alone GDB stubs only"); +} +#endif + + + diff --git a/packages/hal/arm/aeb/current/misc/gdb_module_ncs.c b/packages/hal/arm/aeb/current/misc/gdb_module_ncs.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/misc/gdb_module_ncs.c @@ -0,0 +1,40 @@ +//========================================================================== +// +// gdb_module.c +// +// ARM AEB-1 eval board GDB stubs (module wrapper) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-12-18 +// Description: AEB-1 FLASH module for eCos GDB stubs +//####DESCRIPTIONEND#### + +#undef CHECKSUM +#include "gdb_module.c" + diff --git a/packages/hal/arm/aeb/current/src/PKGconf.mak b/packages/hal/arm/aeb/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/src/PKGconf.mak @@ -0,0 +1,42 @@ +#============================================================================== +# +# makefile +# +# hal/arm/aeb/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_arm_aeb +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c plf_stub.c aeb_misc.c +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + diff --git a/packages/hal/arm/aeb/current/src/aeb_misc.c b/packages/hal/arm/aeb/current/src/aeb_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/src/aeb_misc.c @@ -0,0 +1,413 @@ +//========================================================================== +// +// aeb_misc.c +// +// HAL misc board support code for ARM AEB-1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include // Register state info +#include +#include // necessary? +#include +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include // HAL ISR support +#endif + +/*------------------------------------------------------------------------*/ +// On-board timer +/*------------------------------------------------------------------------*/ + +// Timer registers +#define CYG_DEVICE_TIMER0 ((volatile cyg_uint8 *)0xFFFF1800) +#define CYG_DEVICE_TIMER1 ((volatile cyg_uint8 *)0xFFFF1804) +#define CYG_DEVICE_TIMER2 ((volatile cyg_uint8 *)0xFFFF1808) +#define CYG_DEVICE_TIMER_CTL ((volatile cyg_uint8 *)0xFFFF180C) +#define CYG_DEVICE_IOCR ((volatile cyg_uint32 *)0xFFFFA410) +#define CYG_DEVICE_CPM_PCSR ((volatile cyg_uint32 *)0xFFFFAC04) +#define CYG_DEVICE_CPM_CT0CCR ((volatile cyg_uint32 *)0xFFFFAC18) +#define CYG_DEVICE_CPM_CT1CCR ((volatile cyg_uint32 *)0xFFFFAC1C) +#define CYG_DEVICE_CPM_CT2CCR ((volatile cyg_uint32 *)0xFFFFAC20) + +#define IOCR_CT0G (0x3<<9) +#define IOCR_CT0G_EXTERNAL (0x0<<9) +#define IOCR_CT0G_PWM0 (0x1<<9) +#define IOCR_CT0G_LOW (0x2<<9) +#define IOCR_CT0G_HIGH (0x3<<9) + +#define IOCR_CT1G (0x3<<11) +#define IOCR_CT1G_EXTERNAL (0x0<<11) +#define IOCR_CT1G_PWM0 (0x1<<11) +#define IOCR_CT1G_LOW (0x2<<11) +#define IOCR_CT1G_HIGH (0x3<<11) + +#define IOCR_CT2G (0x3<<13) +#define IOCR_CT2G_EXTERNAL (0x0<<13) +#define IOCR_CT2G_PWM0 (0x1<<13) +#define IOCR_CT2G_LOW (0x2<<13) +#define IOCR_CT2G_HIGH (0x3<<13) + +#define TIMER_CTL_TYPE (0x1<<0) +#define TIMER_CTL_TYPE_BIN (0x0<<0) +#define TIMER_CTL_TYPE_BCD (0x1<<0) +#define TIMER_CTL_MODE (0x7<<1) +#define TIMER_CTL_MODE_IOTC (0x0<<1) // Interrupt on terminal count +#define TIMER_CTL_MODE_HROS (0x1<<1) // Hardware retriggerable one-shot +#define TIMER_CTL_MODE_RG (0x2<<1) // Rate generator +#define TIMER_CTL_MODE_SWG (0x3<<1) // Square-wave generator +#define TIMER_CTL_MODE_STS (0x4<<1) // Software triggered strobe +#define TIMER_CTL_MODE_HTS (0x5<<1) // Hardware triggered strobe +#define TIMER_CTL_RW (0x3<<4) +#define TIMER_CTL_RW_LATCH (0x0<<4) // Counter latch +#define TIMER_CTL_RW_LSB (0x1<<4) +#define TIMER_CTL_RW_MSB (0x2<<4) +#define TIMER_CTL_RW_BOTH (0x3<<4) +#define TIMER_CTL_SC (0x3<<6) +#define TIMER_CTL_SC_CTR0 (0x0<<6) +#define TIMER_CTL_SC_CTR1 (0x1<<6) +#define TIMER_CTL_SC_CTR2 (0x2<<6) +#define TIMER_CTL_SC_RBC (0x3<<6) + +// Interrupt controller registers +#define CYG_DEVICE_ICTL_ICR0 ((volatile cyg_uint32 *)0xFFFFA800) +#define CYG_DEVICE_ICTL_ICR1 ((volatile cyg_uint32 *)0xFFFFA804) +#define CYG_DEVICE_ICTL_ICLR ((volatile cyg_uint32 *)0xFFFFA808) +#define CYG_DEVICE_ICTL_IRQER ((volatile cyg_uint32 *)0xFFFFA80C) +#define CYG_DEVICE_ICTL_FIQER ((volatile cyg_uint32 *)0xFFFFA810) +#define CYG_DEVICE_ICTL_IRQSR ((volatile cyg_uint32 *)0xFFFFA814) +#define CYG_DEVICE_ICTL_FIQSR ((volatile cyg_uint32 *)0xFFFFA818) +#define CYG_DEVICE_ICTL_IPR ((volatile cyg_uint32 *)0xFFFFA81C) + +#define ICTL_ICR0_CH0 (0x3<<0) +#define ICTL_ICR0_CH0_HL (0x1<<0) +#define ICTL_ICR0_CH0_HL_AL (0x0<<0) // Active low +#define ICTL_ICR0_CH0_HL_AH (0x1<<0) // Active high +#define ICTL_ICR0_CH0_EL (0x2<<0) +#define ICTL_ICR0_CH0_EL_LT (0x0<<0) // Level triggered +#define ICTL_ICR0_CH0_EL_ET (0x2<<0) // Edge triggered +#define ICTL_ICR0_CH1 (0x3<<2) +#define ICTL_ICR0_CH1_HL (0x1<<2) +#define ICTL_ICR0_CH1_HL_AL (0x0<<2) // Active low +#define ICTL_ICR0_CH1_HL_AH (0x1<<2) // Active high +#define ICTL_ICR0_CH1_EL (0x2<<2) +#define ICTL_ICR0_CH1_EL_LT (0x0<<2) // Level triggered +#define ICTL_ICR0_CH1_EL_ET (0x2<<2) // Edge triggered +#define ICTL_ICR0_CH2 (0x3<<4) +#define ICTL_ICR0_CH2_HL (0x1<<4) +#define ICTL_ICR0_CH2_HL_AL (0x0<<4) // Active low +#define ICTL_ICR0_CH2_HL_AH (0x1<<4) // Active high +#define ICTL_ICR0_CH2_EL (0x2<<4) +#define ICTL_ICR0_CH2_EL_LT (0x0<<4) // Level triggered +#define ICTL_ICR0_CH2_EL_ET (0x2<<4) // Edge triggered +#define ICTL_ICR0_CH3 (0x3<<6) +#define ICTL_ICR0_CH3_HL (0x1<<6) +#define ICTL_ICR0_CH3_HL_AL (0x0<<6) // Active low +#define ICTL_ICR0_CH3_HL_AH (0x1<<6) // Active high +#define ICTL_ICR0_CH3_EL (0x2<<6) +#define ICTL_ICR0_CH3_EL_LT (0x0<<6) // Level triggered +#define ICTL_ICR0_CH3_EL_ET (0x2<<6) // Edge triggered +#define ICTL_ICR0_CH4 (0x3<<8) +#define ICTL_ICR0_CH4_HL (0x1<<8) +#define ICTL_ICR0_CH4_HL_AL (0x0<<8) // Active low +#define ICTL_ICR0_CH4_HL_AH (0x1<<8) // Active high +#define ICTL_ICR0_CH4_EL (0x2<<8) +#define ICTL_ICR0_CH4_EL_LT (0x0<<8) // Level triggered +#define ICTL_ICR0_CH4_EL_ET (0x2<<8) // Edge triggered +#define ICTL_ICR0_CH5 (0x3<<10) +#define ICTL_ICR0_CH5_HL (0x1<<10) +#define ICTL_ICR0_CH5_HL_AL (0x0<<10) // Active low +#define ICTL_ICR0_CH5_HL_AH (0x1<<10) // Active high +#define ICTL_ICR0_CH5_EL (0x2<<10) +#define ICTL_ICR0_CH5_EL_LT (0x0<<10) // Level triggered +#define ICTL_ICR0_CH5_EL_ET (0x2<<10) // Edge triggered +#define ICTL_ICR1_CH6 (0x1<<0) +#define ICTL_ICR1_CH6_HL (0x1<<0) +#define ICTL_ICR1_CH6_HL_AL (0x0<<0) // Active low +#define ICTL_ICR1_CH6_HL_AH (0x1<<0) // Active high +#define ICTL_ICR1_CH7 (0x1<<1) +#define ICTL_ICR1_CH7_HL (0x1<<1) +#define ICTL_ICR1_CH7_HL_AL (0x0<<1) // Active low +#define ICTL_ICR1_CH7_HL_AH (0x1<<1) // Active high +#define ICTL_ICR1_CH8 (0x1<<2) +#define ICTL_ICR1_CH8_HL (0x1<<2) +#define ICTL_ICR1_CH8_HL_AL (0x0<<2) // Active low +#define ICTL_ICR1_CH8_HL_AH (0x1<<2) // Active high + +// Clock control registers +#define PCSR_CT0CS (1<<3) +#define PCSR_CT1CS (1<<4) +#define PCSR_CT2CS (1<<5) +#define CT_X16 16 + +#undef _TIMERS_TESTING +#ifdef _TIMERS_TESTING +static void aeb_setup_timer1(cyg_uint32 period); +#endif + +static cyg_uint32 _period; + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt abort_interrupt; +static cyg_handle_t abort_interrupt_handle; + +// This ISR is called only for the Abort button interrupt +static int +aeb_abort_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EXT0); + return 0; // No need to run DSR +} +#endif + +void hal_clock_initialize(cyg_uint32 period) +{ + cyg_uint32 iocr; + + // Set counter GATE input low (0) to halt counter while it's being setup + HAL_READ_UINT32(CYG_DEVICE_IOCR, iocr); + iocr = (iocr & ~IOCR_CT0G) | IOCR_CT0G_LOW; + HAL_WRITE_UINT32(CYG_DEVICE_IOCR, iocr); + + // Scale timer0 clock + HAL_WRITE_UINT32(CYG_DEVICE_CPM_CT0CCR, CT_X16); + + // Initialize counter, mode 2 = rate generator + HAL_WRITE_UINT8(CYG_DEVICE_TIMER_CTL, + TIMER_CTL_TYPE_BIN| + TIMER_CTL_MODE_RG| + TIMER_CTL_RW_BOTH| + TIMER_CTL_SC_CTR0); + HAL_WRITE_UINT8(CYG_DEVICE_TIMER0, (period & 0xFF)); // LSB + HAL_WRITE_UINT8(CYG_DEVICE_TIMER0, ((period >> 8) & 0xFF)); // MSB + // Enable timer + iocr = (iocr & ~IOCR_CT0G) | IOCR_CT0G_HIGH; + HAL_WRITE_UINT32(CYG_DEVICE_IOCR, iocr); + _period = period; +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EXT0, + 99, // Priority + 0, // Data item passed to interrupt handler + aeb_abort_isr, + 0, + &abort_interrupt_handle, + &abort_interrupt); + cyg_drv_interrupt_attach(abort_interrupt_handle); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EXT0); +#endif +#ifdef _TIMERS_TESTING + aeb_setup_timer1(period/10); +#endif +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + _period = period; +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + cyg_uint32 value; + cyg_uint8 reg; + do { + HAL_WRITE_UINT8(CYG_DEVICE_TIMER_CTL, + TIMER_CTL_RW_LATCH|TIMER_CTL_SC_CTR0); + HAL_READ_UINT8(CYG_DEVICE_TIMER0, reg); // LSB + value = reg; + HAL_READ_UINT8(CYG_DEVICE_TIMER0, reg); // MSB + value |= (reg << 8); + } while (value <= 2); // Hardware malfunction? + *pvalue = _period - (value & 0xFFFF); // Note: counter is only 16 bits + // and decreases +} + +void hal_hardware_init(void) +{ + // Any hardware/platform initialization that needs to be done. + // Set all unknowns as edge triggered + HAL_WRITE_UINT32(CYG_DEVICE_ICTL_ICR0, + ICTL_ICR0_CH0_HL_AL|ICTL_ICR0_CH0_EL_ET| + ICTL_ICR0_CH1_HL_AL|ICTL_ICR0_CH1_EL_ET| + ICTL_ICR0_CH2_HL_AL|ICTL_ICR0_CH2_EL_ET| + ICTL_ICR0_CH3_HL_AL|ICTL_ICR0_CH3_EL_ET| + ICTL_ICR0_CH4_HL_AL|ICTL_ICR0_CH4_EL_ET| + ICTL_ICR0_CH5_HL_AL|ICTL_ICR0_CH5_EL_ET); + HAL_WRITE_UINT32(CYG_DEVICE_ICTL_ICR1, + ICTL_ICR1_CH6_HL_AL| + ICTL_ICR1_CH7_HL_AL| + ICTL_ICR1_CH8_HL_AL); + HAL_WRITE_UINT32(CYG_DEVICE_ICTL_ICLR, 0xFFFF); // CLear all interrupts + HAL_WRITE_UINT32(CYG_DEVICE_ICTL_IRQER, 0x0000); // All disabled + // Clear and initialize instruction cache + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_ENABLE(); +} + +// +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. + +int hal_IRQ_handler(void) +{ + // Do hardware-level IRQ handling + int irq_status, vector; + HAL_READ_UINT32(CYG_DEVICE_ICTL_IRQSR, irq_status); + for (vector = 0; vector < 16; vector++) { + if (irq_status & (1< // HAL ISR support +static cyg_interrupt timer1_interrupt; +static cyg_handle_t timer1_interrupt_handle; +static cyg_uint32 timer1_count; + +// This ISR is called only for the high speed timer under test +static int +aeb_timer1_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_TIMER1); + timer1_count++; + return 0; // No need to run DSR +} + +static void +aeb_setup_timer1(cyg_uint32 period) +{ + cyg_uint32 iocr; + + // Set counter GATE input low (0) to halt counter while it's being setup + HAL_READ_UINT32(CYG_DEVICE_IOCR, iocr); + iocr = (iocr & ~IOCR_CT1G) | IOCR_CT1G_LOW; + HAL_WRITE_UINT32(CYG_DEVICE_IOCR, iocr); + + // Scale timer0 clock + HAL_WRITE_UINT32(CYG_DEVICE_CPM_CT1CCR, CT_X16); + + // Initialize counter, mode 2 = rate generator + HAL_WRITE_UINT8(CYG_DEVICE_TIMER_CTL, + TIMER_CTL_TYPE_BIN| + TIMER_CTL_MODE_RG| + TIMER_CTL_RW_BOTH| + TIMER_CTL_SC_CTR1); + HAL_WRITE_UINT8(CYG_DEVICE_TIMER1, (period & 0xFF)); // LSB + HAL_WRITE_UINT8(CYG_DEVICE_TIMER1, ((period >> 8) & 0xFF)); // MSB + // Enable timer + iocr = (iocr & ~IOCR_CT1G) | IOCR_CT1G_HIGH; + HAL_WRITE_UINT32(CYG_DEVICE_IOCR, iocr); + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_TIMER1, + 99, // Priority + 0, // Data item passed to interrupt handler + aeb_timer1_isr, + 0, + &timer1_interrupt_handle, + &timer1_interrupt); + cyg_drv_interrupt_attach(timer1_interrupt_handle); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_TIMER1); +} +#endif + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c diff --git a/packages/hal/arm/aeb/current/src/hal_diag.c b/packages/hal/arm/aeb/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/src/hal_diag.c @@ -0,0 +1,338 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // basic machine info +#include // interrupt macros +#include // IO macros +#include +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include +#endif + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYG_HAL_STARTUP_ROM +#define HAL_DIAG_USES_HARDWARE +#endif + +/*---------------------------------------------------------------------------*/ +// AEB Serial Port (UART1) for Debug + +/*---------------------------------------------------------------------------*/ +/* From serial_16550.h */ + +// UART1, 38400 (Using raw 24MHz system clock) +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB (0) +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB (13*3) +// This is the base address of UART1 +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0xFFFF0400 + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x0C) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x14) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // modem status register, read + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; + char *msg = "\n\rAEB-1 eCos\n\r"; +#if !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || 1 + cyg_uint8 lcr; + cyg_uint8 dll, dlm; + + if (init++) return; + + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_READ_UINT8(CYG_DEVICE_SERIAL_RS232_16550_DLL, dll); + HAL_READ_UINT8(CYG_DEVICE_SERIAL_RS232_16550_DLM, dlm); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO +#else + if (init++) return; +#endif + while (*msg) hal_diag_write_char(*msg++); +} + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define DIAG_BUFSIZE 32 +#else +#define DIAG_BUFSIZE 2048 +#endif +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; + +void hal_diag_write_char(char c) +{ +#if !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || 1 + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + HAL_IO_BARRIER (); +#endif +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && 0 + hal_output_gdb_string (&c, 1); +#endif + diag_buffer[diag_bp++] = c; + if (diag_bp == DIAG_BUFSIZE) diag_bp = 0; +} + +void hal_diag_read_char(char *c) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + HAL_IO_BARRIER (); // Prevent RBR preload. + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); + HAL_IO_BARRIER (); +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port - assume GDB channel is already set up +void hal_diag_init(void) +{ +} + +// Actually send character down the wire +static void +hal_diag_write_char_serial(char c) +{ + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + HAL_IO_BARRIER (); +} + +static bool +hal_diag_read_serial(char *c) +{ + long timeout = 1000000000; // A long time... + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + if (--timeout == 0) return false; + } while ((lsr & SIO_LSR_DR) == 0); + HAL_IO_BARRIER (); // Prevent RBR preload. + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); + HAL_IO_BARRIER (); + return true; +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_UART1); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt (__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */ diff --git a/packages/hal/arm/aeb/current/src/plf_stub.c b/packages/hal/arm/aeb/current/src/plf_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/src/plf_stub.c @@ -0,0 +1,271 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas (based on the old ARM/AEB hal_stub.c) +// Contributors:gthomas, jskov +// Date: 1999-02-15 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +#include // HAL IO macros +#include // HAL interrupt macros +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include // HAL ISR support +#endif + +//----------------------------------------------------------------------------- +// Serial definitions. + +// 38400, UART1 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB (13*3) + +// This is the base address of UART1 on the AEB-1 board. +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0xFFFF0400 + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x0C) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x14) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // modem status register, read + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// Interrupt Enable Register +#define SIO_IER_RCV 0x01 +#define SIO_IER_XMT 0x02 +#define SIO_IER_LS 0x04 +#define SIO_IER_MS 0x08 + +// Modem Control Register +#define SIO_MCR_DTR 0x01 +#define SIO_MCR_RTS 0x02 +#define SIO_MCR_INT 0x08 // Enable interrupts + +#define LED (volatile char *)0xFFFF1C0C + +#define LED1 (7<<1) +#define LED2 (6<<1) +#define LED3 (5<<1) +#define LED4 (4<<1) + +#define LED_ON 0x01 +#define LED_OFF 0x00 + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#endif + +//----------------------------------------------------------------------------- + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_uint8 c; + + c = hal_aeb_get_char(); // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_UART1); + } + return 0; // No need to run DSR +} + +int +hal_aeb_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_UART1); + } else { + cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_UART1); + } + + return 0; +} +#endif + +static void dummy(void) {} + +// Initialize the current serial port. +void hal_aeb_init_serial(void) +{ + cyg_uint8 lcr; + + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + dummy(); // FIXME! - GCC bug + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_UART1, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_UART1); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_RCV); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, SIO_MCR_INT|SIO_MCR_DTR|SIO_MCR_RTS); +#endif +} + +// Write C to the current serial port. +void hal_aeb_put_char(int c) +{ + cyg_uint8 lsr; + static int led_state = LED_ON; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + *LED = led_state | LED1; + if (led_state == LED_ON) { + led_state = LED_OFF; + } else { + led_state = LED_ON; + } +} + +// Read one character from the current serial port. +int hal_aeb_get_char(void) +{ + char c; + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); + return c; +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/arm/aeb/current/tests/PKGconf.mak b/packages/hal/arm/aeb/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/tests/PKGconf.mak @@ -0,0 +1,36 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/aeb/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_aeb +include ../../../../../pkgconf/pkgconf.mak + +TESTS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/hal/arm/arch/current/ChangeLog b/packages/hal/arm/arch/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/ChangeLog @@ -0,0 +1,396 @@ +1999-04-25 Gary Thomas + + * src/vectors.S: Fix use of 'RAISE_INTR' which cannot be used in 'mov' + instruction (doesn't fit). PR 19906 + +1999-04-23 John Dallaway + + * src/PKGconf.mak: Avoid backslash in grep search pattern to + workaround PR 19923. + +1999-04-15 Jonathan Larmour + + * src/arm.ld: Define __bss_end at the end of the BSS + * src/vectors.S (start): Use __bss_end rather than _end when clearing + BSS + These fix PR 19750 + +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script + +1999-04-13 Gary Thomas + + * src/vectors.S: Use new include + which includes macros and definitions for platform specifics. + This keeps 'ifdef's out of "vectors.S" and makes cleaner code. + Major restructuring of interrupt handling to support full use + of a separate interrupt stack. + +1999-04-09 Jesper Skov + + * src/arm_stub.c: + Moved get_register and put_register to hal_stub.c. + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-22 Jonathan Larmour + + * include/arm_stub.h: Update copyright + + * src/arm_stub.c: Update copyright + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-16 Gary Thomas + + * src/hal_misc.c: Change how breakpoint is described (just a long). + + * src/vectors.S: Pass registers to ISR for GDB break support. + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-12 Gary Thomas + + * include/hal_arch.h: Add definition of 'CYGNUM_HAL_MINIMUM_STACK_SIZE' + +1999-03-11 Gary Thomas + + * include/pkgconf/hal_arm.h: Fix comment (name was incorrect) + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_ATTACH): Added. + +1999-03-09 Gary Thomas + + * src/hal_misc.c: Move declaration of __CTOR_LIST__ to avoid warning. + +1999-03-09 Gary Thomas + + * src/vectors.S: Remove warning on stack size redefine. + +1999-03-08 Gary Thomas + + * src/vectors.S: Override default stack size on AEB. + +1999-03-05 Gary Thomas + + * src/vectors.S: + * include/pkgconf/hal_arm.h: DOn't print exception info if GDB stubs enabled. + + * src/PKGconf.mak: + * src/arm.ld: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/arm.ld: + Unconditionalize use of libextras.a and add libextras.a to GROUP() + +1999-03-04 Gary Thomas + + These changes merged from 'ecos-new_devs-19990216-branch' + + (1999-02-18 Gary Thomas ) + + * src/PKGconf.mak (DRIVERS): + * src/arm.ld: Support special linking requirements for I/O drivers. + + (1999-02-16 Gary Thomas ) + + * src/arm.ld: Changes for new I/O [device drivers] subsystem. + +1999-02-26 Gary Thomas + + * src/vectors.S: Add separate interrupt stack handling. + + Fix memory region layouts for AEB allowing better error detection. + +1999-02-25 Nick Garnett + + * src/vectors.S: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception -> cyg_hal_deliver_exception + QA improvements + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * arch/current/src/hal_misc.c: + Rename deliver_exception -> cyg_hal_deliver_exception + Rename vectors due to hal_intr.h changes + QA improvements + + * arch/current/src/hal_mk_defs.c: + * arch/current/src/vectors.S + Rename vectors due to hal_intr.h changes + QA improvements + +1999-02-16 Jesper Skov + + * src/vectors.S: Changed set_debug_traps to initialize_stub. + + * src/arm_stub.c: + * include/arm_stub.h: + Cleaned up to only include arch specific stub code. + +1999-02-16 Gary Thomas + + * src/arm.ld: Changes for new I/O [device drivers] subsystem. + +1999-02-10 Gary Thomas + + * src/hal_misc.c (hal_default_isr): Add diagnostic message for PR 19145-19147 + +1999-02-05 John Dallaway + + * src/arm.ld: Add LMA_EQ_VMA macro definition. + +1999-02-04 Gary Thomas + + * src/vectors.S: Use symbolic 'raise interrupt' instead of hard coded value. + Better GDB stubs stack handling. + + * src/hal_mk_defs.c: Add symbolic symbol for 'raise interrupt' instrumentation. + +1999-02-03 Gary Thomas + + * src/hal_misc.c (cyg_hal_invoke_constructors): + * src/vectors.S (start): Use C coded 'cyg_hal_invoke_constructors()' + + * src/hal_misc.c (exception_handler): Remove debug message ...oops! + + * include/hal_arch.h (HAL_SET_GDB_REGISTERS): Restore PSR. + + * src/vectors.S: Use separate stack for GDB stubs exception handlers. + +1999-02-01 Gary Thomas + + * src/hal_misc.c: Need for 'dump exception' option. + + * src/vectors.S: Fix ROM startup machine initialization. + +1999-01-25 Gary Thomas + + * src/arm.ld: Add Copyright + +1999-01-25 Jesper Skov + + * src/arm_stub.c (__build_t_packet): Rewrote fix me text. Added PR + number, but otherwise left the note. + +1999-01-21 Gary Thomas + + * src/arm_stub.c (ins_will_execute): Computation of LS/HI + was incorrect. + +1999-01-20 Gary Thomas + + * src/arm.ld: Change "etext" to "__etext". + +1999-01-19 Gary Thomas + + * src/vectors.S: Rework exception handlers. + (start): Fix for new startup type (STUBS) + + * src/hal_misc.c (exception_handler): Allow GDB stubs to take over all + exceptions while the stubs are executing. Also move some common stubs + initialization into this file. + +1999-01-18 Gary Thomas + + * include/pkgconf/hal_arm.h: Add configurations for GDB stubs/normal ROM. + + * src/arm.ld: Include HAL/ARM specifics. + + * include/pkgconf/hal_arm.h: + * src/hal_misc.c: + * src/vectors.S: Add configure option 'CYGHWR_HAL_ARM_DUMP_EXCEPTIONS' + which is used to chose whether to print diagnostic exception dumps + or not. + +1999-01-15 Gary Thomas + + * src/hal_misc.c: Clean up warnings + + * include/hal_arch.h: + * include/hal_intr.h: Add function prototypes to avoid warnings. + + * src/arm.ld: Add definition of _stext. Take out + GLOBAL_OFFSET_TABLE. + +1999-01-14 Gary Thomas + + * src/PKGconf.mak: Set up for MLT based linker scripts. + + * src/arm.ld: New file + + * include/hal_intr.h (HAL_QUERY_INTERRUPTS): Test was backwards + +1999-01-13 Gary Thomas + + * include/hal_intr.h (HAL_TRANSLATE_VECTOR): Add new macro + +1999-01-12 Gary Thomas + + * include/basetype.h (CYG_DOUBLE_BYTEORDER): Define ordering + of words within doubles. + +1999-01-05 Gary Thomas + + * src/vectors.S: Force AEB-1 memory configuration. + +1998-12-16 Gary Thomas + + * src/arm_stub.c (ins_will_execute): Fix warning. + + * include/hal_intr.h: Add + for platform specifics. + +1998-12-15 Gary Thomas + + * src/hal_mk_defs.c: + * include/hal_io.h: + * src/vectors.S: Changes to support kernel-less configuration. + (___gccmain): Add new dummy function. + + * src/hal_misc.c: Merge in platform independent code from + old "pid/.../hal_misc.c" + +1998-12-15 Jesper Skov + + * include/hal_arch.h: Changed HAL_JMP_BUF_SIZE to + CYGARC_JMP_BUF_SIZE. + +1998-12-14 Gary Thomas + + * src/hal_misc.c (exception_handler): Change config option + to be consistent "CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS" + + * include/hal_arch.h (HAL_THREAD_INIT_CONTEXT): Set initial + PC for GDB thread info. + + * src/arm_stub.c (__build_t_packet): Fix thread id's which + must be send to GDB in big-endian. + +1998-12-10 Jesper Skov + + * include/hal_cache.h (HAL_DCACHE_UNLOCK_ALL, + HAL_ICACHE_UNLOCK_ALL): Added. + +1998-12-09 Gary Thomas + + * src/vectors.S (abort_prefetch): Clean up all exception + handlers (some were just broken). + + * src/hal_misc.c (exception_handler): Improved exception + handling for GDB stubs while accessing memory. + +1998-12-04 Gary Thomas + + * src/arm_stub.c (target_ins): Finish single step support. + +1998-12-03 Gary Thomas + + * src/vectors.S (_name): Add undefined instruction handling + (for breakpoint/single step support). Plus some rework and + general cleanup. + + * src/arm_stub.c (single_step): + * include/hal_arch.h (HAL_BREAKPOINT): Make breakpoint use + an illegal instruction rather than SWI. + +1998-12-02 Gary Thomas + + * src/arm_stub.c (ins_will_execute): Take out debug messages + + * include/pkgconf/hal_arm.h: New file + + * include/arm_stub.h: Add PSR register definitions + + * src/arm_stub.c (single_step): Support single stepping + +1998-12-01 Gary Thomas + + * src/vectors.S (reset_vector): Rework exception handing to leave + vectors in place unless GDB stubs are included (or started in + user mode via Angel) + +1998-11-26 Gary Thomas + + * src/vectors.S (_vectors): Rework to handle SWI exception + Changes to make GDB stubs work. + + * src/hal_misc.c (exception_handler): + Save registers in global "_hal_registers" + + * src/PKGconf.mak (COMPILE): Add arm_stub.c + + * include/hal_io.h: Need to include + + * include/hal_arch.h (HAL_THREAD_INIT_CONTEXT): + Clean up stack usage - no need for 56 byte padding (PPC holdover) + (HAL_BREAKPOINT): + (HAL_GET_GDB_REGISTERS): + (HAL_SET_GDB_REGISTERS): Clean up for working stubs + + * src/arm_stub.c: New file, GDB stubs support + +1998-11-18 Gary Thomas + + * src/hal_mk_defs.c: Add define for 'HAL_SavedRegisters' + + * include/hal_arch.h: cleanup comments + + * include/basetype.h: cleanup comments + + * src/vectors.S: Improved interrupt stack handling. + + * include/hal_intr.h: Add support for interrupt latency + measurement, controlled by CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY. + +1998-10-16 Bart Veer + + * src/vectors.S (__interrupt_stack): + Made the interrupt stack size configurable. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/arm/arch/current/include/arm_stub.h b/packages/hal/arm/arch/current/include/arm_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/arm_stub.h @@ -0,0 +1,74 @@ +#ifndef CYGONCE_HAL_ARM_STUB_H +#define CYGONCE_HAL_ARM_STUB_H + +/* arm_stub.h - ARM-specific definitions for generic stub + * + * Copyright (c) 1998,1999 Cygnus Solutions + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + +#define NUMREGS (16+8+2) // 16 GPR, 8 FPR (unused), 2 PS + +#define REGSIZE( _x_ ) (((_x_) < F0 || (_x_) >= FPS) ? 4 : 12) + +typedef unsigned long target_register_t; + +enum regnames { + R0, R1, R2, R3, R4, R5, R6, R7, + R8, R9, R10, FP, IP, SP, LR, PC, + F0, F1, F2, F3, F4, F5, F6, F7, + FPS, PS +}; + +#define PS_N 0x80000000 +#define PS_Z 0x40000000 +#define PS_C 0x20000000 +#define PS_V 0x10000000 + +typedef enum regnames regnames_t; + +/* Given a trap value TRAP, return the corresponding signal. */ +extern int __computeSignal (unsigned int trap_number); + +/* Return the SPARC trap number corresponding to the last-taken trap. */ +extern int __get_trap_number (void); + +/* Return the currently-saved value corresponding to register REG. */ +extern target_register_t get_register (regnames_t reg); + +/* Store VALUE in the register corresponding to WHICH. */ +extern void put_register (regnames_t which, target_register_t value); + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ +extern void set_pc (target_register_t pc); + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ +void __single_step (void); + +/* Clear the single-step state. */ +void __clear_single_step (void); + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ +extern int __is_breakpoint_function (void); + +/* Skip the current instruction. */ +extern void __skipinst (void); + +extern void __install_breakpoints (void); + +extern void __clear_breakpoints (void); + +#endif // ifndef CYGONCE_HAL_ARM_STUB_H diff --git a/packages/hal/arm/arch/current/include/basetype.h b/packages/hal/arm/arch/current/include/basetype.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/basetype.h @@ -0,0 +1,66 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: Define architecture base types. +// Usage: Included by "cyg_type.h", do not use directly + +// +//####DESCRIPTIONEND#### +// + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_LSBFIRST // Little endian +#define CYG_DOUBLE_BYTEORDER CYG_MSBFIRST // Big? endian + +//----------------------------------------------------------------------------- +// ARM does not usually use labels with underscores. Some labels generated +// by the linker do, so add an underscore where required. + +//#define CYG_LABEL_NAME(_name_) _##_name_ +#define CYG_LABEL_NAME(_name_) _name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The ARM architecture uses the default definitions of the base types, +// so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h diff --git a/packages/hal/arm/arch/current/include/hal_arch.h b/packages/hal/arm/arch/current/include/hal_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/hal_arch.h @@ -0,0 +1,295 @@ +#ifndef CYGONCE_HAL_ARCH_H +#define CYGONCE_HAL_ARCH_H + +//========================================================================== +// +// hal_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1999-02-20 +// Purpose: Define architecture abstractions +// Usage: #include + +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include // To decide on stack usage +#include + +// +// CPSR Register defines +// + +#define CPSR_IRQ_DISABLE 0x80 // IRQ disabled when =1 +#define CPSR_FIQ_DISABLE 0x40 // FIQ disabled when =1 +#define CPSR_UNDEF_MODE 0x1D +#define CPSR_SUPERVISOR_MODE 0x13 +#define CPSR_IRQ_MODE 0x12 + +#define CPSR_MODE_BITS 0x1F + +#define CPSR_INITIAL (CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) +#define CPSR_THREAD_INITIAL (CPSR_SUPERVISOR_MODE) + +//-------------------------------------------------------------------------- +// Processor saved states: +// The layout of this structure is also defined in "arm.inc", for assembly +// code, which will be generated automatically if this file changes. + +#define HAL_THREAD_CONTEXT_FIRST 0 +#define HAL_THREAD_CONTEXT_R0 (0-HAL_THREAD_CONTEXT_FIRST) +#define HAL_THREAD_CONTEXT_R4 (4-HAL_THREAD_CONTEXT_FIRST) +#define HAL_THREAD_CONTEXT_R10 (10-HAL_THREAD_CONTEXT_FIRST) +#define HAL_THREAD_CONTEXT_LAST 10 +#define HAL_NUM_THREAD_CONTEXT_REGS (HAL_THREAD_CONTEXT_LAST - \ + HAL_THREAD_CONTEXT_FIRST+1) + +// It seems that r0-r3,r12 are considered scratch by function calls + +typedef struct +{ + // These are common to all saved states + cyg_uint32 d[HAL_NUM_THREAD_CONTEXT_REGS] ; // Data regs (r0..r10) + cyg_uint32 fp; // (r11) Frame pointer + cyg_uint32 sp; // (r13) Stack pointer + cyg_uint32 lr; // (r14) Link Reg + cyg_uint32 pc; // (r15) PC place holder + // (never used) + cyg_uint32 cpsr; // Condition Reg + cyg_uint32 ip; // (r12) Previous stack + // pointer + // These are only saved for exceptions and interrupts + cyg_uint32 vector; // Vector number + cyg_uint32 msr; // Machine State Reg + +} HAL_SavedRegisters; + +//------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//------------------------------------------------------------------------- +// Bit manipulation macros + +externC int hal_lsbindex(int); +externC int hal_msbindex(int); + +#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbindex(mask) +#define HAL_MSBIT_INDEX(index, mask) index = hal_msbindex(mask) + +//------------------------------------------------------------------------- +// Context Initialization +// Initialize the context of a thread. +// Arguments: +// _sparg_ name of variable containing current sp, will be changed to new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. + +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ + CYG_MACRO_START \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_); \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \ + for( _i_ = HAL_THREAD_CONTEXT_FIRST; _i_ <= HAL_THREAD_CONTEXT_LAST; \ + _i_++ ) \ + (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[00] = (CYG_WORD)(_thread_); /* R0 = arg1 = thread ptr */ \ + (_regs_)->sp = (CYG_WORD)(_sp_); /* SP = top of stack */ \ + (_regs_)->lr = (CYG_WORD)(_entry_); /* LR = entry point */ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = [initial] entry point */\ + (_regs_)->cpsr = (CPSR_THREAD_INITIAL); /* PSR = Interrupt enabled */ \ + _sparg_ = (CYG_ADDRESS)_regs_; \ + CYG_MACRO_END + +//-------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context((CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + +//-------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//-------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen +// if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +#define HAL_BREAKPOINT(_label_) \ +asm volatile (" .globl " #_label_ ";" \ + #_label_":" \ + " .word 0xE7FFDEFE" \ + ); + +//#define HAL_BREAKINST {0xFE, 0xDE, 0xFF, 0xE7} +#define HAL_BREAKINST 0xE7FFDEFE +#define HAL_BREAKINST_SIZE 4 + +//-------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// FIX ME!! What does GDB expect? + +// GDB expects the registers in this structure: +// r0..r10, fp, ip, sp, lr, pc - 4 bytes each +// f0..f7 - 12 bytes each (N/A on ARM7) +// fps - 4 bytes (N/A on ARM7) +// ps - 4 bytes + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + +// Copy a set of registers from a HAL_SavedRegisters structure into a +// GDB ordered array. +#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \ + CYG_MACRO_START \ + CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ <= 10; _i_++ ) \ + _regval_[_i_] = (_regs_)->d[_i_]; \ + \ + _regval_[11] = (_regs_)->fp; \ + _regval_[12] = (_regs_)->ip; \ + _regval_[13] = (_regs_)->sp; \ + _regval_[14] = (_regs_)->lr; \ + _regval_[15] = (_regs_)->pc; \ + _regval_[25] = (_regs_)->cpsr; \ + for( _i_ = 0; _i_ < 8; _i_++ ) \ + _regval_[_i_+16] = 0; \ + CYG_MACRO_END + +// Copy a GDB ordered array into a HAL_SavedRegisters structure. +#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \ + CYG_MACRO_START \ + CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ <= 10; _i_++ ) \ + (_regs_)->d[_i_] = _regval_[_i_]; \ + \ + (_regs_)->fp = _regval_[11]; \ + (_regs_)->ip = _regval_[12]; \ + (_regs_)->sp = _regval_[13]; \ + (_regs_)->lr = _regval_[14]; \ + (_regs_)->pc = _regval_[15]; \ + (_regs_)->cpsr = _regval_[25]; \ + CYG_MACRO_END + +//-------------------------------------------------------------------------- +// HAL setjmp + +#define CYGARC_JMP_BUF_SIZE 16 // Actually 11, but some room left over + +typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + + +//-------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) + +//--------------------------------------------------------------------------- + +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// A minimal, optimized stack frame, rounded up - no autos +#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 20) + +// Stack needed for a context switch: this is implicit in the estimate for +// interrupts so not explicitly used below: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 20) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \ + ((4 * 20) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +// Space for the maximum number of nested interrupts, plus room to call functions +#define CYGNUM_HAL_MAX_INTERRUPT_NESTING 4 + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (CYGNUM_HAL_MAX_INTERRUPT_NESTING * CYGNUM_HAL_STACK_INTERRUPT_SIZE + \ + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +#define CYGNUM_HAL_STACK_SIZE_TYPICAL \ + (CYGNUM_HAL_STACK_SIZE_MINIMUM + \ + 16 * CYGNUM_HAL_STACK_FRAME_SIZE) + +//----------------------------------------------------------------------------- + +#endif // CYGONCE_HAL_ARCH_H +// End of hal_arch.h diff --git a/packages/hal/arm/arch/current/include/hal_intr.h b/packages/hal/arm/arch/current/include/hal_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/hal_intr.h @@ -0,0 +1,249 @@ +#ifndef CYGONCE_HAL_INTR_H +#define CYGONCE_HAL_INTR_H + +//========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas, +// jlarmour +// Date: 1999-02-20 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include +#include + +//-------------------------------------------------------------------------- +// ARM exception vectors. + +// These vectors correspond to VSRs. These values are the ones to use for +// HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESERVED_0 0 +#define CYGNUM_HAL_VECTOR_RESET 1 +#define CYGNUM_HAL_VECTOR_UNDEF_INSTRUCTION 2 +#define CYGNUM_HAL_VECTOR_SOFTWARE_INTERRUPT 3 +#define CYGNUM_HAL_VECTOR_ABORT_PREFETCH 4 +#define CYGNUM_HAL_VECTOR_ABORT_DATA 5 +#define CYGNUM_HAL_VECTOR_reserved 6 +#define CYGNUM_HAL_VECTOR_IRQ 7 +#define CYGNUM_HAL_VECTOR_FIQ 8 + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 8 +#define CYGNUM_HAL_VSR_COUNT 9 + +// Exception vectors. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() + +#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \ + CYGNUM_HAL_VECTOR_UNDEF_INSTRUCTION +#define CYGNUM_HAL_EXCEPTION_INTERRUPT \ + CYGNUM_HAL_VECTOR_SOFTWARE_INTERRUPT +#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_ABORT_PREFETCH +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_ABORT_DATA +#define CYGNUM_HAL_EXCEPTION_FIQ CYGNUM_HAL_VECTOR_FIQ + +#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION +#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_EXCEPTION_FIQ +#define CYGNUM_HAL_EXCEPTION_COUNT (CYGNUM_HAL_EXCEPTION_MAX - \ + CYGNUM_HAL_EXCEPTION_MIN + 1) + +//-------------------------------------------------------------------------- +// Static data used by HAL + +// ISR tables +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +//-------------------------------------------------------------------------- +// Default ISR + +externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +//-------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//-------------------------------------------------------------------------- +// Interrupt control macros + +// Note: This disables both FIQ and IRQ interrupts! +#define HAL_DISABLE_INTERRUPTS(_old_) \ + asm volatile ( \ + "mrs %0,cpsr;" \ + "mrs r4,cpsr;" \ + "orr r4,r4,#0xC0;" \ + "msr cpsr,r4" \ + : "=r"(_old_) \ + : \ + : "r4" \ + ); + +#define HAL_ENABLE_INTERRUPTS() \ + asm volatile ( \ + "mrs r3,cpsr;" \ + "bic r3,r3,#0xC0;" \ + "msr cpsr,r3" \ + : \ + : \ + : "r3" \ + ); + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + asm volatile ( \ + "mrs r3,cpsr;" \ + "and r4,%0,#0xC0;" \ + "bic r3,r3,#0xC0;" \ + "orr r3,r3,r4;" \ + "msr cpsr,r3" \ + : \ + : "r"(_old_) \ + : "r3", "r4" \ + ); + +#define HAL_QUERY_INTERRUPTS(_old_) \ + asm volatile ( \ + "mrs r4,cpsr;" \ + "and r4,r4,#0xC0;" \ + "eor %0,r4,#0xC0;" \ + : "=r"(_old_) \ + : \ + : "r4" \ + ); + +//-------------------------------------------------------------------------- +// Vector translation. + +#ifndef HAL_TRANSLATE_VECTOR +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ + (_index_) = (_vector_) +#endif + +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ + CYG_MACRO_START \ + if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)hal_default_isr ) \ + { \ + hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_vector_] = (CYG_ADDRWORD) _data_; \ + hal_interrupt_objects[_vector_] = (CYG_ADDRESS)_object_; \ + } \ + CYG_MACRO_END + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ + CYG_MACRO_START \ + if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)_isr_ ) \ + { \ + hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)hal_default_isr; \ + hal_interrupt_data[_vector_] = 0; \ + hal_interrupt_objects[_vector_] = 0; \ + } \ + CYG_MACRO_END + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \ + CYG_MACRO_START \ + if( _poldvsr_ != NULL ) \ + *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ + CYG_MACRO_END + +//-------------------------------------------------------------------------- +// Interrupt controller access + +externC void hal_interrupt_mask(int); +externC void hal_interrupt_unmask(int); +externC void hal_interrupt_acknowledge(int); +externC void hal_interrupt_configure(int, int, int); +externC void hal_interrupt_set_level(int, int); + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + hal_interrupt_mask( _vector_ ) +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + hal_interrupt_unmask( _vector_ ) +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + hal_interrupt_acknowledge( _vector_ ) +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ + hal_interrupt_configure( _vector_, _level_, _up_ ) +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ + hal_interrupt_set_level( _vector_, _level_ ) + +//-------------------------------------------------------------------------- +// Clock control + +externC void hal_clock_initialize(cyg_uint32); +externC void hal_clock_read(cyg_uint32 *); +externC void hal_clock_reset(cyg_uint32, cyg_uint32); + +#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize( _period_ ) +#define HAL_CLOCK_RESET( _vec_, _period_ ) hal_clock_reset( _vec_, _period_ ) +#define HAL_CLOCK_READ( _pvalue_ ) hal_clock_read( _pvalue_ ) +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( (cyg_uint32 *)_pvalue_ ) +#endif + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_INTR_H +// End of hal_intr.h diff --git a/packages/hal/arm/arch/current/include/hal_io.h b/packages/hal/arm/arch/current/include/hal_io.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/hal_io.h @@ -0,0 +1,138 @@ +#ifndef CYGONCE_HAL_IO_H +#define CYGONCE_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))) + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)) + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ + CYG_MACRO_END + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ + CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))) + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ + CYG_MACRO_END + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))) + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ + CYG_MACRO_END + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ + CYG_MACRO_END + +// Enforce a flow "barrier" to prevent optimizing compiler from reordering +// operations. +#define HAL_IO_BARRIER() + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_IO_H +// End of hal_io.h diff --git a/packages/hal/arm/arch/current/include/pkgconf/hal_arm.h b/packages/hal/arm/arch/current/include/pkgconf/hal_arm.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/include/pkgconf/hal_arm.h @@ -0,0 +1,78 @@ +#ifndef CYGONCE_PKGCONF_HAL_ARM_H +#define CYGONCE_PKGCONF_HAL_ARM_H +// ==================================================================== +// +// pkgconf/hal_arm.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-12-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_ARM { + display "ARM architecture" + type radio + parent CYGPKG_HAL + target arm + description " + The ARM architecture HAL package provides generic + support for this processor architecture. It is also + necessary to select a specific target platform HAL + package." + } + + }}CFG_DATA */ + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_DUMP_EXCEPTIONS { + display "Provide diagnostic dump for exceptions" + parent CYGPKG_HAL_ARM + requires !CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + description " + Print messages about hardware exceptions, including + raw exception frame dump and register contents." + } + + }}CFG_DATA */ +#undef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_ARM_H */ +/* EOF hal_arm.h */ diff --git a/packages/hal/arm/arch/current/src/PKGconf.mak b/packages/hal/arm/arch/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/PKGconf.mak @@ -0,0 +1,73 @@ +#============================================================================== +# +# makefile +# +# hal/powerpc/arch/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_arm +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_misc.c vectors.S context.S arm_stub.c +OTHER_OBJS := +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + +.PHONY: ldscript.clean + +$(PACKAGE)_context.o $(PACKAGE)_vectors.o: arm.inc + +arm.inc: hal_mk_defs.c ../include/hal_arch.h + $(CC) ${CFLAGS} $(INCLUDE_PATH) -S $< + grep -w 'equ' hal_mk_defs.s | sed -e's/#//' >arm.inc + $(RM) hal_mk_defs.s + +vectors.stamp: $(PACKAGE)_vectors.o + $(CP) $< $(PREFIX)/lib/vectors.o + @$(TOUCH) $@ + +vectors.clean: + $(RM) $(PREFIX)/lib/vectors.o $(PACKAGE)_vectors.o + $(RM) vectors.stamp + +ldscript.stamp: arm.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ + +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp + + + diff --git a/packages/hal/arm/arch/current/src/arm.ld b/packages/hal/arm/arch/current/src/arm.ld new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -0,0 +1,118 @@ +//============================================================================= +// +// MLT linker script for ARM +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + __etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include +#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/arm/arch/current/src/arm_stub.c b/packages/hal/arm/arch/current/src/arm_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/arm_stub.c @@ -0,0 +1,389 @@ +/* arm_stub.c - helper functions for stub, generic to all ARM processors + * + * Copyright (c) 1998,1999 Cygnus Solutions + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + +#include + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#ifdef CYG_HAL_ARM_SIM +#error "GDB Stub support not implemented for ARM SIM" +#endif + +#include +#include +#include + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include // dbg_currthread_id +#endif + +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + switch (trap_number) { + default: + return SIGTRAP; + } +} + + +/* Return the trap number corresponding to the last-taken trap. */ + +int __get_trap_number (void) +{ + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return _hal_registers->vector >> 8; +} + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support + */ + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ + +#define NULL_PTR (unsigned long *)0 +static unsigned long *ss_saved_pc = NULL_PTR; +static unsigned long ss_saved_instr; + +#define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); } + +static int +ins_will_execute(unsigned long ins) +{ + unsigned long psr = get_register(PS); // condition codes + int res = 0; + switch ((ins & 0xF0000000) >> 28) { + case 0x0: // EQ + res = (psr & PS_Z) != 0; + break; + case 0x1: // NE + res = (psr & PS_Z) == 0; + break; + case 0x2: // CS + res = (psr & PS_C) != 0; + break; + case 0x3: // CC + res = (psr & PS_C) == 0; + break; + case 0x4: // MI + res = (psr & PS_N) != 0; + break; + case 0x5: // PL + res = (psr & PS_N) == 0; + break; + case 0x6: // VS + res = (psr & PS_V) != 0; + break; + case 0x7: // VC + res = (psr & PS_V) == 0; + break; + case 0x8: // HI + res = ((psr & PS_Z) != 0) && ((psr & PS_C) == 0); + break; + case 0x9: // LS + res = ((psr & PS_Z) == 0) || ((psr & PS_C) != 0); + break; + case 0xA: // GE + res = ((psr & (PS_N|PS_V)) == (PS_N|PS_V)) || + ((psr & (PS_N|PS_V)) == 0); + break; + case 0xB: // LT + res = ((psr & (PS_N|PS_V)) == PS_N) || + ((psr & (PS_N|PS_V)) == PS_V); + break; + case 0xC: // GT + res = ((psr & (PS_N|PS_V)) == (PS_N|PS_V)) || + ((psr & (PS_N|PS_V)) == 0); + res = ((psr & PS_Z) == 0) && res; + break; + case 0xD: // LE + res = ((psr & (PS_N|PS_V)) == PS_N) || + ((psr & (PS_N|PS_V)) == PS_V); + res = ((psr & PS_Z) == PS_Z) || res; + break; + case 0xE: // AL + res = TRUE; + break; + case 0xF: // NV + res = FALSE; + break; + } + return res; +} + +static unsigned long +RmShifted(int shift) +{ + unsigned long Rm = get_register(shift & 0x00F); + int shift_count; + if ((shift & 0x010) == 0) { + shift_count = (shift & 0xF80) >> 7; + } else { + shift_count = get_register((shift & 0xF00) >> 8); + } + switch ((shift & 0x060) >> 5) { + case 0x0: // Logical left + Rm <<= shift_count; + break; + case 0x1: // Logical right + Rm >>= shift_count; + break; + case 0x2: // Arithmetic right + Rm = (unsigned long)((long)Rm >> shift_count); + break; + case 0x3: // Rotate right + if (shift_count == 0) { + // Special case, RORx + Rm >>= 1; + if (get_register(PS) & PS_C) Rm |= 0x80000000; + } else { + Rm = (Rm >> shift_count) | (Rm << (32-shift_count)); + } + break; + } + return Rm; +} + +// Decide the next instruction to be executed for a given instruction +static unsigned long * +target_ins(unsigned long *pc, unsigned long ins) +{ + unsigned long new_pc, offset, op2; + unsigned long Rn; + int i, reg_count, c; + switch ((ins & 0x0C000000) >> 26) { + case 0x0: + // Data processing + new_pc = (unsigned long)(pc+1); + if ((ins & 0x0000F000) == 0x0000F000) { + // Destination register is PC + if ((ins & 0x0FBF0000) != 0x010F0000) { + Rn = (unsigned long)get_register((ins & 0x000F0000) >> 16); + if ((ins & 0x02000000) == 0) { + op2 = RmShifted(ins & 0x00000FFF); + } else { + op2 = ins & 0x000000FF; + i = (ins & 0x00000F00) >> 8; // Rotate count + op2 = (op2 >> (i*2)) | (op2 << (32-(i*2))); + } + switch ((ins & 0x01E00000) >> 21) { + case 0x0: // AND + new_pc = Rn & op2; + break; + case 0x1: // EOR + new_pc = Rn ^ op2; + break; + case 0x2: // SUB + new_pc = Rn - op2; + break; + case 0x3: // RSB + new_pc = op2 - Rn; + break; + case 0x4: // ADD + new_pc = Rn + op2; + break; + case 0x5: // ADC + c = (get_register(PS) & PS_C) != 0; + new_pc = Rn + op2 + c; + break; + case 0x6: // SBC + c = (get_register(PS) & PS_C) != 0; + new_pc = Rn - op2 + c - 1; + break; + case 0x7: // RSC + c = (get_register(PS) & PS_C) != 0; + new_pc = op2 - Rn +c - 1; + break; + case 0x8: // TST + case 0x9: // TEQ + case 0xA: // CMP + case 0xB: // CMN + break; // PC doesn't change + case 0xC: // ORR + new_pc = Rn | op2; + break; + case 0xD: // MOV + new_pc = op2; + break; + case 0xE: // BIC + new_pc = Rn & ~op2; + break; + case 0xF: // MVN + new_pc = ~op2; + break; + } + } + } + return ((unsigned long *)new_pc); + case 0x1: + if ((ins & 0x02000010) == 0x02000010) { + // Undefined! + return (pc+1); + } else { + if ((ins & 0x00100000) == 0) { + // STR + return (pc+1); + } else { + // LDR + if ((ins & 0x0000F000) != 0x0000F000) { + // Rd not PC + return (pc+1); + } else { + Rn = (unsigned long)get_register((ins & 0x000F0000) >> 16); + if ((ins & 0x000F0000) == 0x000F0000) Rn += 8; // PC prefetch! + if (ins & 0x01000000) { + // Add/subtract offset before + if ((ins & 0x02000000) == 0) { + // Immediate offset + if (ins & 0x00800000) { + // Add offset + Rn += (ins & 0x00000FFF); + } else { + // Subtract offset + Rn -= (ins & 0x00000FFF); + } + } else { + // Offset is in a register + if (ins & 0x00800000) { + // Add offset + Rn += RmShifted(ins & 0x00000FFF); + } else { + // Subtract offset + Rn -= RmShifted(ins & 0x00000FFF); + } + } + } + return ((unsigned long *)*(unsigned long *)Rn); + } + } + } + return (pc+1); + case 0x2: // Branch, LDM/STM + if ((ins & 0x02000000) == 0) { + // LDM/STM + if ((ins & 0x00100000) == 0) { + // STM + return (pc+1); + } else { + // LDM + if ((ins & 0x00008000) == 0) { + // PC not in list + return (pc+1); + } else { + Rn = (unsigned long)get_register((ins & 0x000F0000) >> 16); + if ((ins & 0x000F0000) == 0x000F0000) Rn += 8; // PC prefetch! + offset = ins & 0x0000FFFF; + reg_count = 0; + for (i = 0; i < 15; i++) { + if (offset & (1< + +#include "arm.inc" + + .text + +// ------------------------------------------------------------------------------ +// function declaration macro + +#define FUNC_START(name) \ + .globl name; \ +name: + +// ------------------------------------------------------------------------------ +// hal_thread_switch_context +// Switch thread contexts +// R0 = address of sp of next thread to execute +// R1 = address of sp save location of current thread + +// Need to save/restore R4..R12, R13 (sp), R14 (lr) + +// Note: this is a little wasteful since r0..r3 don't need to be saved. +// They are saved here though so that the information can match the HAL_SavedRegisters + +FUNC_START(hal_thread_switch_context) + mov ip,sp // saved stack pointer + sub sp,sp,#ARMREG_SIZE // make space for saved registers + stmea sp,{r0-r10,fp,ip,lr,pc} + mrs r2,cpsr + str r2,[sp,#armreg_cpsr] + str sp,[r1] // return new stack pointer + + # Now load the destination thread by dropping through + # to hal_thread_load_context + +// ------------------------------------------------------------------------------ +// hal_thread_load_context +// Load thread context +// R0 = address of sp of next thread to execute +// Note that this function is also the second half of hal_thread_switch_context +// and is simply dropped into from it. + +FUNC_START(hal_thread_load_context) + ldr fp,[r0] // get context to restore + mrs r0,cpsr // disable IRQ's + orr r0,r0,#CPSR_IRQ_DISABLE + msr cpsr,r0 + ldr r0,[fp,#armreg_cpsr] + msr spsr,r0 + ldmfd fp,{r0-r10,fp,sp,lr} // also restores saved PSR + movs pc,lr + +// ------------------------------------------------------------------------------ +// HAL longjmp, setjmp implementations +// hal_setjmp saves only to callee save registers 4-14 +// and lr into buffer supplied in r0[arg0] + +FUNC_START(hal_setjmp) + stmea r0,{r4-r14} + mov r0,#0 + mov pc,lr; # return + +// hal_longjmp loads state from r0[arg0] and returns + +FUNC_START(hal_longjmp) + ldmfd r0,{r4-r14} + mov r0,r1; # return [arg1] + mov pc,lr + +// ------------------------------------------------------------------------------ +// end of context.S + + \ No newline at end of file diff --git a/packages/hal/arm/arch/current/src/hal_misc.c b/packages/hal/arm/arch/current/src/hal_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/hal_misc.c @@ -0,0 +1,381 @@ +/*========================================================================== +// +// hal_misc.c +// +// HAL miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1999-02-20 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +#include +#include +#ifdef CYGPKG_KERNEL +#include +#endif + +#include +#include // tracing macros +#include // assertion macros + +#include // HAL header +#include // HAL header + +externC void diag_printf(const char *fmt, ...); + +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; +extern void *__mem_fault_handler; + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +/* Force exception handling into the GDB stubs. This is done by taking over + the exception vectors while executing in the stubs. This allows for the + debugged program to handle exceptions itself, except while the GDB + processing is underway. The only vector that can't be handled this way + is the illegal instruction vector which is used for breakpoint/single-step + and must be maintained by the stubs at all times. +*/ + +#define ARM_VECTORS 8 +extern unsigned long vectors[]; // exception vectors as defined by the stubs +static unsigned long *hardware_vectors = (unsigned long *)0x20; +static unsigned long hold_vectors[ARM_VECTORS]; + +static int exception_level; + +static void +__take_over_debug_traps(void) +{ + int i; + for (i = 0; i < ARM_VECTORS; i++) { + hold_vectors[i] = hardware_vectors[i]; + hardware_vectors[i] = vectors[i]; + } +} + +static void +__restore_debug_traps(void) +{ + int i; + for (i = 0; i < ARM_VECTORS; i++) { + hardware_vectors[i] = hold_vectors[i]; + } +} +#endif + +void +exception_handler(HAL_SavedRegisters *regs) +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + if (__mem_fault_handler && + regs->vector == CYGNUM_HAL_EXCEPTION_DATA_ACCESS) { + regs->pc = (unsigned long)__mem_fault_handler; + return; // Caught an exception inside stubs + } + + if (++exception_level == 1) __take_over_debug_traps(); + + _hal_registers = regs; + __handle_exception(); + + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + + if (--exception_level == 0) __restore_debug_traps(); + +#elif defined(CYGPKG_KERNEL_EXCEPTIONS) + + cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs ); + +#else + + CYG_FAIL("Exception!!!"); + +#endif + + return; +} + +/*------------------------------------------------------------------------*/ +/* C++ support - run initial constructors */ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; + +void +cyg_hal_invoke_constructors (void) +{ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) + (*p) (); +#endif +} + +/*------------------------------------------------------------------------*/ +/* default ISR */ + +externC cyg_uint32 +hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_TRACE1(true, "Interrupt: %d", vector); + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} + +/*------------------------------------------------------------------------*/ +/* Idle thread action */ + +void +hal_idle_thread_action( cyg_uint32 count ) +{ +} + +/*-------------------------------------------------------------------------*/ +/* Misc functions */ + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +/* This function will generate a breakpoint exception. It is used at the + beginning of a program to sync up with a debugger and can be used + otherwise as a quick means to stop program execution and "break" into + the debugger. */ + +void +breakpoint(void) +{ + HAL_BREAKPOINT(breakinst); +} + + +/* This function returns the opcode for a 'trap' instruction. */ + +unsigned long +__break_opcode (void) +{ + return HAL_BREAKINST; +} +#endif + +int +hal_lsbindex(int mask) +{ + int i; + for (i = 0; i < 32; i++) { + if (mask & (1<= 0; i++) { + if (mask & (1< (unsigned int)p) { + s = (unsigned int)s - (unsigned int)p; + } + while (s > 0) { + if (base) { + diag_printf("%08X: ", (int)p - (int)base); + } else { + diag_printf("%08X: ", p); + } + for (i = 0; i < 16; i++) { + if (i < s) { + diag_printf("%02X", p[i] & 0xFF); + } else { + diag_printf(" "); + } + if ((i % 2) == 1) diag_printf(" "); + if ((i % 8) == 7) diag_printf(" "); + } + diag_printf(" |"); + for (i = 0; i < 16; i++) { + if (i < s) { + c = p[i] & 0xFF; + if ((c < 0x20) || (c >= 0x7F)) c = '.'; + } else { + c = ' '; + } + diag_printf("%c", c); + } + diag_printf("|\n"); + s -= 16; + p += 16; + } +} + +void +dump_buf(unsigned char *p, int s) +{ + dump_buf_with_offset(p, s, 0); +} + +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS +void +dump_frame(unsigned char *frame) +{ + HAL_SavedRegisters *rp = (HAL_SavedRegisters *)frame; + int i; + dump_buf(frame, 128); + diag_printf("Registers:\n"); + for (i = 0; i <= 10; i++) { + if ((i == 0) || (i == 6)) diag_printf("R%d: ", i); + diag_printf("%08X ", rp->d[i]); + if ((i == 5) || (i == 10)) diag_printf("\n"); + } + diag_printf("FP: %08X, SP: %08X, LR: %08X, PC: %08X, PSR: %08X\n", + rp->fp, rp->sp, rp->lr, rp->pc, rp->cpsr); +} +#endif + +#if 0 +void +show_frame_in(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[IN] IRQ Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void +show_frame_out(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[OUT] IRQ Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} +#endif + +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS +// Debug routines +void undefined_instruction(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[UNDEFINED INSTRUCTION] Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void software_interrupt(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[SOFTWARE INTERRUPT] Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void abort_prefetch(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[ABORT PREFETCH] Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void abort_data(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[ABORT DATA] Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void FIQ(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("[FIQ] Frame:\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} + +void exception_handler_returned(HAL_SavedRegisters *frame) +{ + int old; + HAL_DISABLE_INTERRUPTS(old); + diag_printf("Exception handler returned!\n"); + dump_frame((unsigned char *)frame); + HAL_RESTORE_INTERRUPTS(old); +} +#endif + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c diff --git a/packages/hal/arm/arch/current/src/hal_mk_defs.c b/packages/hal/arm/arch/current/src/hal_mk_defs.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/hal_mk_defs.c @@ -0,0 +1,105 @@ +/*========================================================================== +// +// hal_mk_defs.c +// +// HAL (architecture) "make defs" program +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: ARM architecture dependent definition generator +// Description: This file contains code that can be compiled by the target +// compiler and used to generate machine specific definitions +// suitable for use in assembly code. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // HAL header +#include // HAL header +#ifdef CYGPKG_KERNEL +# include +# include +#endif + +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * This technique was first used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#define DEFINE(sym, val) \ + asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val)) + +int +main(void) +{ + DEFINE(armreg_r0, offsetof(HAL_SavedRegisters, d[HAL_THREAD_CONTEXT_R0])); + DEFINE(armreg_r4, offsetof(HAL_SavedRegisters, d[HAL_THREAD_CONTEXT_R4])); + DEFINE(armreg_sp, offsetof(HAL_SavedRegisters, sp)); + DEFINE(armreg_fp, offsetof(HAL_SavedRegisters, fp)); + DEFINE(armreg_ip, offsetof(HAL_SavedRegisters, ip)); + DEFINE(armreg_lr, offsetof(HAL_SavedRegisters, lr)); + DEFINE(armreg_pc, offsetof(HAL_SavedRegisters, pc)); + DEFINE(armreg_cpsr, offsetof(HAL_SavedRegisters, cpsr)); + DEFINE(armreg_vector, offsetof(HAL_SavedRegisters, vector)); + DEFINE(ARMREG_SIZE, sizeof(HAL_SavedRegisters)); + DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT); + DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); + DEFINE(CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, + CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION); + DEFINE(CYGNUM_HAL_EXCEPTION_INTERRUPT, CYGNUM_HAL_EXCEPTION_INTERRUPT); + DEFINE(CYGNUM_HAL_EXCEPTION_CODE_ACCESS, + CYGNUM_HAL_EXCEPTION_CODE_ACCESS); + DEFINE(CYGNUM_HAL_EXCEPTION_DATA_ACCESS, + CYGNUM_HAL_EXCEPTION_DATA_ACCESS); + DEFINE(CYGNUM_HAL_VECTOR_IRQ, CYGNUM_HAL_VECTOR_IRQ); + DEFINE(CYGNUM_HAL_EXCEPTION_FIQ, CYGNUM_HAL_EXCEPTION_FIQ); +#ifdef CYGPKG_KERNEL + DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE); +#endif + DEFINE(CPSR_IRQ_DISABLE, CPSR_IRQ_DISABLE); + DEFINE(CPSR_FIQ_DISABLE, CPSR_FIQ_DISABLE); + DEFINE(CPSR_UNDEF_MODE, CPSR_UNDEF_MODE); + DEFINE(CPSR_SUPERVISOR_MODE, CPSR_SUPERVISOR_MODE); + DEFINE(CPSR_IRQ_MODE, CPSR_IRQ_MODE); + DEFINE(CPSR_MODE_BITS, CPSR_MODE_BITS); + DEFINE(CPSR_INITIAL, CPSR_INITIAL); + DEFINE(CPSR_THREAD_INITIAL, CPSR_THREAD_INITIAL); +} + + +/*------------------------------------------------------------------------*/ +// EOF hal_mk_defs.c diff --git a/packages/hal/arm/arch/current/src/vectors.S b/packages/hal/arm/arch/current/src/vectors.S new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -0,0 +1,760 @@ +// #======================================================================== +// # +// # vectors.S +// # +// # ARM exception vectors +// # +// #======================================================================== +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #======================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): nickg, gthomas +// # Contributors: nickg, gthomas +// # Date: 1999-02-20 +// # Purpose: ARM exception vectors +// # Description: This file defines the code placed into the exception +// # vectors. It also contains the first level default VSRs +// # that save and restore state for both exceptions and +// # interrupts. +// # +// #####DESCRIPTIONEND#### +// # +// #======================================================================== + +#include +#include +#ifdef CYGPKG_KERNEL // no CDL yet +#include +#else +# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +#endif +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +// The CDL should enforce this +#undef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS +#endif + +#include "arm.inc" + +#define FUNC_START(name) \ + .globl _name; \ +_name: + +#define PTR(name) \ +.##name: .word name + + + .file "vectors.S" + + +//========================================================================== +// Hardware exception vectors. +// This entire section will be copied to location 0x0000 at startup time. +// + .section ".vectors","ax" + .global __exception_handlers +__exception_handlers: + ldr pc,.reset_vector // 0x00 + ldr pc,.undefined_instruction // 0x04 + ldr pc,.software_interrupt // 0x08 start && software int + ldr pc,.abort_prefetch // 0x0C + ldr pc,.abort_data // 0x10 + .word 0 // unused + ldr pc,.IRQ // 0x18 + ldr pc,.FIQ // 0x1C + +// The layout of these pointers should match the vector table above since +// they are copied in pairs. + .global vectors +vectors: +PTR(reset_vector) +PTR(undefined_instruction) +PTR(software_interrupt) +PTR(abort_prefetch) +PTR(abort_data) + .word 0 +PTR(IRQ) +PTR(FIQ) +PTR(start) + + .text +// Startup code which will get the machine into supervisor mode + .global reset_vector + .type reset_vector,function +reset_vector: +#if defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) + mrs r7,cpsr // move back to IRQ mode + and r7,r7,#CPSR_MODE_BITS + cmp r7,#CPSR_SUPERVISOR_MODE + beq start +#endif + + PLATFORM_SETUP1 // Early stage platform initialization + // see + + mov r0,#0 // move vectors + ldr r1,.__exception_handlers + ldr r2,[r1,#0x04] // undefined instruction + str r2,[r0,#0x04] + ldr r2,[r1,#0x24] + str r2,[r0,#0x24] + ldr r2,[r1,#0x08] // software interrupt + str r2,[r0,#0x08] + ldr r2,[r1,#0x40] + str r2,[r0,#0x28] + swi // switch to supervisor mode + +// ========================================================================= +// Real startup code. We jump here from the reset vector to set up the world. + .globl start +start: + +#if defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +// If we get restarted, hang here to avoid corrupting memory + ldr r0,.init_flag + ldr r1,[r0] +1: cmp r1,#0 + bne 1b + ldr r1,init_done + str r1,[r0] +#endif + + // Reset software interrupt pointer + mov r0,#0 // move vectors + ldr r1,.__exception_handlers +#if defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) + cmp r7,#CPSR_SUPERVISOR_MODE + beq 10f +#endif + ldr r2,[r1,#0x28] // software interrupt + str r2,[r0,#0x28] +10: + ldr r2,[r1,#0x18] // IRQ + str r2,[r0,#0x18] + ldr r2,[r1,#0x38] + str r2,[r0,#0x38] + ldr r2,[r1,#0x1C] // FIQ + str r2,[r0,#0x1C] + ldr r2,[r1,#0x3C] + str r2,[r0,#0x3C] + ldr r2,[r1,#0x0C] // abort (prefetch) + str r2,[r0,#0x0C] + ldr r2,[r1,#0x2C] + str r2,[r0,#0x2C] + ldr r2,[r1,#0x10] // abort (data) + str r2,[r0,#0x10] + ldr r2,[r1,#0x30] + str r2,[r0,#0x30] + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) + // Relocate [copy] data from ROM to RAM + ldr r3,.__rom_data_start + ldr r4,.__ram_data_start + ldr r5,.__ram_data_end + cmp r4,r5 // jump if no data to move + beq 2f + sub r3,r3,#4 // loop adjustments + sub r4,r4,#4 +1: ldr r0,[r3,#4]! // copy info + str r0,[r4,#4]! + cmp r4,r5 + bne 1b +2: +#endif + + // initialize interrupt/exception environments + ldr sp,.__startup_stack + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_IRQ_MODE) + msr cpsr,r0 + ldr sp,.__exception_stack + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE) + msr cpsr,r0 + ldr sp,.__exception_stack + + // initialize CPSR (machine state register) + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) + msr cpsr,r0 + + // Note: some functions in LIBGCC1 will cause a "restore from SPSR"!! + msr spsr,r0 + + // initialize stack + ldr sp,.__startup_stack + + // clear BSS + ldr r1,.__bss_start + ldr r2,.__bss_end + mov r0,#0 + cmp r1,r2 + beq 2f + sub r1,r1,#4 +1: str r0,[r1,#4]! + cmp r1,r2 + bne 1b +2: + + // Call platform specific hardware initialization + bl hal_hardware_init + + // Run through static constructors + bl cyg_hal_invoke_constructors + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + bl initialize_stub +#endif + + // This starts up the eCos kernel + bl cyg_start +_start_hang: + b _start_hang + +init_done: + .long 0xDEADB00B + +// +// Exception handlers +// Assmumption: get here from a Supervisor context [mode] +// + +undefined_instruction: + ldr sp,.__undef_exception_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,fp,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov fp,sp +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + ldr sp,.__GDB_stack + cmp fp,sp // already on GDB stack? + bhi 10f + ldr r0,.__GDB_stack_base + cmp fp,r0 + bls 10f // no - switch to GDB stack + // (already in sp) + mov sp,fp // yes - no switch +10: +#endif + sub sp,sp,#ARMREG_SIZE // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r4} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_fp] // saved FP + str r3,[sp,#armreg_ip] // saved IP + str r4,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + add r0,ip,#ARMREG_SIZE + str fp,[sp,#armreg_sp] // SP at time of interrupt +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl undefined_instruction +#endif + mov v1,#CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION + b call_exception_handler + +software_interrupt: + ldr sp,.__startup_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov ip,sp + ldr sp,.__startup_stack // get good stack + sub sp,sp,#ARMREG_SIZE+16 // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r3} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_ip] // saved IP + str r3,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + add r0,ip,#ARMREG_SIZE + str r0,[sp,#armreg_sp] // SP at time of interrupt +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl software_interrupt +#endif + mov v1,#CYGNUM_HAL_EXCEPTION_INTERRUPT + b call_exception_handler + +abort_prefetch: + ldr sp,.__undef_exception_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,fp,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov fp,sp +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + ldr sp,.__GDB_stack + cmp fp,sp // already on GDB stack? + bhi 10f + ldr r0,.__GDB_stack_base + cmp fp,r0 + bls 10f // no - switch to GDB stack + // (already in sp) + mov sp,fp // yes - no switch +10: +#endif + sub sp,sp,#ARMREG_SIZE // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r4} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_fp] // saved FP + str r3,[sp,#armreg_ip] // saved IP + str r4,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + add r0,ip,#ARMREG_SIZE + str fp,[sp,#armreg_sp] // SP at time of interrupt +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl abort_prefetch +#endif + mov v1,#CYGNUM_HAL_EXCEPTION_CODE_ACCESS + b call_exception_handler + +abort_data: + ldr sp,.__undef_exception_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,fp,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov fp,sp +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + ldr sp,.__GDB_stack + cmp fp,sp // already on GDB stack? + bhi 10f + ldr r0,.__GDB_stack_base + cmp fp,r0 + bls 10f // no - switch to GDB stack + // (already in sp) + mov sp,fp // yes - no switch +10: +#endif + sub sp,sp,#ARMREG_SIZE // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r4} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_fp] // saved FP + str r3,[sp,#armreg_ip] // saved IP + str r4,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + add r0,ip,#ARMREG_SIZE + str fp,[sp,#armreg_sp] // SP at time of interrupt +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl abort_data +#endif + mov v1,#CYGNUM_HAL_EXCEPTION_DATA_ACCESS + b call_exception_handler + +FIQ: + ldr sp,.__startup_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov ip,sp + ldr sp,.__startup_stack // get good stack + sub sp,sp,#ARMREG_SIZE+16 // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r3} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_ip] // saved IP + str r3,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + add r0,ip,#ARMREG_SIZE + str r0,[sp,#armreg_sp] // SP at time of interrupt +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl FIQ +#endif + mov v1,#CYGNUM_HAL_EXCEPTION_FIQ + b call_exception_handler + +// +// Dispatch an exception handler. + +call_exception_handler: + str v1,[sp,#armreg_vector] + mov r0,sp + bl exception_handler +#ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + mov r0,sp + bl exception_handler_returned +#endif + +// Restore [interrupted] context + mov ip,sp // get stack pointer + + ldr lr,[ip,#armreg_lr] + ldr sp,[sp,#armreg_sp] + + mrs r0,cpsr // move back to IRQ mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_IRQ_MODE + msr cpsr,r0 + + mov sp,ip + ldr lr,[sp,#armreg_pc] + ldr r0,[sp,#armreg_cpsr] + ldr ip,[sp,#armreg_ip] + msr spsr,r0 + ldmfd sp,{r0-r10,fp} + + movs pc,lr // restore PC from LR, CPSR from SPSR + +// Handle device interrupts +// This is slightly more complicated than the other exception handlers because +// it needs to interface with the kernel (if present). + +IRQ: + // Note: I use this exception stack while saving the context because + // the current SP does not seem to be always valid in this CPU mode. + ldr sp,.__exception_stack // get good stack + sub lr,lr,#4 // PC at time of interrupt + stmfd sp!,{r0,fp,ip,lr} + mrs r0,spsr + stmfd sp!,{r0} + mov ip,sp // save SP which will vanish with + // mode switch + mrs r0,cpsr // switch to Supervisor Mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_SUPERVISOR_MODE + msr cpsr,r0 // sp,lr are now old values + mov fp,sp // save old SP + sub sp,sp,#ARMREG_SIZE // make space for frame + stmea sp,{r0-r10,fp} // save immediately visible registers + ldmfd ip,{r0-r4} // saved registers + str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt + str r1,[sp,#armreg_r0] // saved R0 + str r2,[sp,#armreg_fp] // saved FP + str r3,[sp,#armreg_ip] // saved IP + str r4,[sp,#armreg_pc] // PC at time of interrupt + str lr,[sp,#armreg_lr] // LR at time of interrupt + str fp,[sp,#armreg_sp] // SP at time of interrupt + mov v6,sp // Save pointer to register frame + +// mov r0,sp +// bl _show_frame_in + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // Switch to interrupt stack + ldr r2,.irq_level // current number of nested interrupts + ldr r0,[r2] + add r1,r0,#1 + str r1,[r2] // if was zero, switch stacks + cmp r0,#0 + moveq r1,sp // save old stack pointer + ldreq sp,.__interrupt_stack + stmeqfd sp!,{r1} +10: +#endif + + // The entire CPU state is now stashed on the stack, + // increment the scheduler lock and handle the interrupt + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + .extern cyg_scheduler_sched_lock + ldr r3,.cyg_scheduler_sched_lock + ldr r4,[r3] + add r4,r4,#1 + str r4,[r3] +#endif + + bl hal_IRQ_handler // determine interrupt source + mov v1,r0 // returned vector # + +#if defined(CYGPKG_KERNEL_INSTRUMENT) && \ + defined(CYGDBG_KERNEL_INSTRUMENT_INTR) + ldr r0,=RAISE_INTR // arg0 = type = INTR,RAISE + mov r1,v1 // arg1 = vector + mov r2,#0 // arg2 = 0 + bl cyg_instrument // call instrument function +#endif + + mov r0,v1 // vector # + ldr r1,.hal_interrupt_data + ldr r1,[r1,v1,lsl #2] // handler data + ldr r2,.hal_interrupt_handlers + ldr v3,[r2,v1,lsl #2] // handler (indexed by vector #) + mov r2,v6 // register frame + + mov lr,pc // invoke handler (call indirect + mov pc,v3 // thru v3) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // If we are returning from the last nested interrupt, move back + // to the thread stack. interrupt_end() must be called on the + // thread stack since it potentially causes a context switch. + ldr r2,.irq_level + ldr r3,[r2] + subs r1,r3,#1 + str r1,[r2] + ldreq sp,[sp] // This should be the saved stack pointer +#endif +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // The return value from the handler (in r0) will indicate whether a + // DSR is to be posted. Pass this together with a pointer to the + // interrupt object we have just used to the interrupt tidy up routine. + + ldr r1,.hal_interrupt_objects + ldr r1,[r1,v1,lsl #2] + bl interrupt_end // post any bottom layer handler + // threads and call scheduler +#endif + +// mov r0,sp +// bl show_frame_out + + mov ip,sp // get stack pointer + + ldr lr,[ip,#armreg_lr] + ldr sp,[sp,#armreg_sp] + + mrs r0,cpsr // move back to IRQ mode + bic r0,r0,#CPSR_MODE_BITS + orr r0,r0,#CPSR_IRQ_MODE + msr cpsr,r0 + + mov sp,ip + ldr lr,[sp,#armreg_pc] + ldr r0,[sp,#armreg_cpsr] + ldr ip,[sp,#armreg_ip] + msr spsr,r0 + ldmfd sp,{r0-r10,fp} + movs pc,lr // restore PC from LR, CPSR from SPSR + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +// Execute pending DSRs the interrupt stack +// Note: this can only be called from code running on a thread stack + .global hal_interrupt_stack_call_pending_DSRs +hal_interrupt_stack_call_pending_DSRs: + stmfd sp!,{r4,r5,lr} + // Disable interrupts + mrs r4,cpsr // disable IRQ's + orr r2,r4,#CPSR_IRQ_DISABLE + bic r5,r4,#CPSR_IRQ_DISABLE + msr cpsr,r2 + // Switch to interrupt stack + mov r3,sp // save old stack pointer + ldr sp,.__interrupt_stack + stmfd sp!,{r3} // stored at top of interrupt stack + ldr r2,.irq_level // current number of nested interrupts + ldr r3,[r2] + add r3,r3,#1 // bump nesting level + str r3,[r2] + msr cpsr,r5 // enable interrupts + + bl cyg_interrupt_call_pending_DSRs + + // Disable interrupts + mrs r1,cpsr // disable IRQ's + orr r2,r1,#CPSR_IRQ_DISABLE + msr cpsr,r2 + + // Move back to the thread stack. + ldr r2,.irq_level + ldr r3,[r2] + sub r3,r3,#1 // decrement nesting level + str r3,[r2] + ldr sp,[sp] // This should be the saved stack pointer + msr cpsr,r4 // restore interrupts to original state + + ldmfd sp!,{r4,r5,pc} // return +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// Dummy functions + + .global __gccmain +__gccmain: + mov pc,lr + + .global _psr +_psr: + mrs r0,cpsr + mov pc,lr + + .global _sp +_sp: + mov r0,sp + mov pc,lr + + +// +// Pointers to various objects. +// +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +PTR(__GDB_stack_base) +PTR(__GDB_stack) +#endif +PTR(__startup_stack) +PTR(__exception_stack) +PTR(__undef_exception_stack) +PTR(__bss_start) +PTR(__bss_end) +PTR(_end) +PTR(__rom_data_start) +PTR(__ram_data_start) +PTR(__ram_data_end) +PTR(hal_interrupt_handlers) +PTR(hal_interrupt_data) +PTR(hal_interrupt_objects) +PTR(__exception_handlers) +PTR(init_flag) +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +PTR(cyg_scheduler_sched_lock) +#endif +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +PTR(irq_level) +PTR(__interrupt_stack) +#endif + + +// ------------------------------------------------------------------------- +// Interrupt vector tables. +// These tables contain the isr, data and object pointers used to deliver +// interrupts to user code. + + .data + +init_flag: + .long 0 + + .extern hal_default_isr + + .globl hal_vsr_table +hal_vsr_table: + .rept CYGNUM_HAL_VSR_COUNT + .long 0 // hal_default_isr + .endr + + .globl hal_interrupt_handlers +hal_interrupt_handlers: + .rept CYGNUM_HAL_ISR_COUNT + .long hal_default_isr + .endr + + .globl hal_interrupt_data +hal_interrupt_data: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + + .globl hal_interrupt_objects +hal_interrupt_objects: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + +// ------------------------------------------------------------------------- +// Temporary interrupt stack + + .section ".bss" + +// Small stacks, only used for saving information between CPU modes +__exception_stack_base: + .rept 32 + .long 0 + .endr +__exception_stack: + .rept 32 + .long 0 + .endr +__undef_exception_stack: + +// Runtime stack used during all interrupt processing +#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 +#endif +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .balign 16 +__interrupt_stack_base: + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + .byte 0 + .endr + .balign 16 +__interrupt_stack: +irq_level: + .long 0 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + .balign 16 +__GDB_stack_base: + .rept 0x400 + .byte 0 + .endr +__GDB_stack: +#endif + .balign 16 +__startup_stack_base: +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .rept 512 +#else + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#endif + .byte 0 + .endr + .balign 16 +__startup_stack: + +// -------------------------------------------------------------------------- +// end of vectors.S diff --git a/packages/hal/arm/arch/current/tests/PKGconf.mak b/packages/hal/arm/arch/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/arch/current/tests/PKGconf.mak @@ -0,0 +1,36 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/arch/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_arch +include ../../../../../pkgconf/pkgconf.mak + +TESTS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/hal/arm/pid/current/ChangeLog b/packages/hal/arm/pid/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/ChangeLog @@ -0,0 +1,247 @@ +1999-04-13 Gary Thomas + + * include/hal_platform_setup.h: New file + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Make GDB 'O' transaction run + with interrupts disabled. + +1999-03-17 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Don't disable all interrupts, + just the ones from the diag serial port. + +1999-03-16 Gary Thomas + + * include/plf_stub.h: + * src/plf_stub.c: + * src/hal_diag.c: Add suport for GDB break. + +1999-03-12 Gary Thomas + + * include/hal_cache.h (HAL_DCACHE_PURGE_ALL): Add macro. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-20 Jonathan Larmour + + * include/hal_platform_ints.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * src/pid_misc.c: + Change interrupt names due to above + QA improvements + + +1999-02-16 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Changed + __output_gdb_string to hal_output_gdb_string. + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/plf_stub.c: [added] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-16 Gary Thomas + + * include/hal_platform_ints.h: Some interrupt assignments were wrong. + +1999-02-08 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-27 Gary Thomas + + * misc/PKGconf.mak: Fix for building on Win/NT. Also create raw binary + file suitable for putting into EPROM. + +1999-01-26 Hugo Tyson + + * include/pkgconf/stubs.ldi: + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-26 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: Fix option descriptions. + +1999-01-25 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: + * src/hal_stub.c: Add serial port parameterization (CDL) + (serial_init): Remove 'dummy' call which fixed a GCC bug. Note: + is this bug still lurking out there? + +1999-01-25 Jesper Skov + + * src/hal_diag.c: Removed HAL_IO_BARRIER macros. Not necessary on + ARM. + +1999-01-19 Gary Thomas + + * misc/PKGconf.mak: Fix for new startup types (STUBS). + + * include/pkgconf/rom.ldi: Modified for new layouts. + + * include/pkgconf/stubs.ldi: New File. + + * src/hal_stub.c: Reorg - move common routines to "arch" directory. + +1999-01-18 Gary Thomas + + * include/pkgconf/rom.ldi: Add configurations for GDB stubs/normal ROM. + +1999-01-15 Gary Thomas + + * misc/Notes: New file. + + * include/pkgconf/rom.ldi: Reorg GDB stubs memory use. + + * misc/gdb_module.c: + * misc/prog_flash.c: New program(s). + + * src/hal_stub.c: + * src/hal_diag.c: Reduce/remove trace buffers (debug only) + + * include/hal_diag.h: Add prototype for 'hal_diag_read_char()' + +1999-01-14 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: Change diag port to match GDB port. + + * misc/PKGconf.mak: Change 'TESTS' to 'PROGS' due to + changes in "makrules.prv". + + * include/pkgconf/rom.ldi: + * include/pkgconf/ram.ldi: New files. + + * src/PKGconf.mak: Change to MLT script linking. + +1999-01-08 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: + * src/hal_diag.c: Make diagnostic port configurable. + +1998-12-22 Gary Thomas + + * include/hal_cache.h: New [moved] file + +1998-12-20 Gary Thomas + + * src/hal_stub.c (cyg_hal_gdb_isr): Remove unused '__set_mem_fault' + +1998-12-16 Gary Thomas + + * include/hal_platform_ints.h: New file. + +1998-12-15 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: Fix comment. + + * src/hal_diag.c: Changes for kernel-less configuration. + + * src/pid_misc.c: Renamed from 'hal_misc.c' + + * src/PKGconf.mak (COMPILE): Rename 'hal_misc.c' to 'pid_misc.c' + to avoid confusion with "arch/current/src/hal_misc.c" which is + a truly platform independent file. + +1998-12-10 Gary Thomas + + * src/hal_misc.c (dump_frame): Change in parameter type for + caused problems with adding pointers -> huge dumps! + +1998-12-09 Gary Thomas + + * src/hal_misc.c (exception_handler_returned): Change exception + [debug] functions to have proper type for 'register frame' param. + +1998-12-03 Gary Thomas + + * tests/flash.c: + * tests/dl.c (SYNC_COUNT): Update download for improved performance + now that target FIFO is working. + + * src/hal_stub.c (serial_init): Work around compiler code generation + bug (was quietly writing over location 0x4!) + +1998-12-02 Gary Thomas + + * include/pkgconf/hal_arm_pid.h: New file + + * src/hal_misc.c (exception_handler_returned): Make quiet in GDB version + +1998-12-01 Gary Thomas + + * src/hal_stub.c (serial_init): Enable serial FIFO! + + * src/hal_diag.c (hal_diag_init): Enable serial FIFO! + Don't try to support diag via GDB port (yet). + +1998-11-26 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Allow separate debug output + even when GDB stubs are included. Remove this later - FIXME! + + * src/hal_stub.c: + * include/hal_stub.h: New files, GDB stub support + + * src/PKGconf.mak (COMPILE): Add hal_stub.c + +1998-11-18 Gary Thomas + + * tests/flash.c: + * tests/dl.c: + * tests/PKGconf.mak: Set of programs which will download and program + the FLASH on the PID7 eval board. + + * src/hal_misc.c: Add clock latency support. + + * src/pid.ld: Rework memory layout. Fix DWARF2 debugging stuff. + + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/arm/pid/current/include/hal_cache.h b/packages/hal/arm/pid/current/include/hal_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/hal_cache.h @@ -0,0 +1,169 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-28 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line +#define HAL_DCACHE_WAYS 0 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 0 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line +#define HAL_ICACHE_WAYS 0 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() + +// Disable the data cache +#define HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() + +// Purge contents of data cache +#define HAL_DCACHE_PURGE_ALL() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/packages/hal/arm/pid/current/include/hal_diag.h b/packages/hal/arm/pid/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/hal_diag.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_DIAG_H */ diff --git a/packages/hal/arm/pid/current/include/hal_platform_ints.h b/packages/hal/arm/pid/current/include/hal_platform_ints.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/hal_platform_ints.h @@ -0,0 +1,73 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: Define Interrupt support +// Description: The interrupt details for the PID are defined here. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_unused 0 +#define CYGNUM_HAL_INTERRUPT_PROGRAMMED_INTERRUPT 1 +#define CYGNUM_HAL_INTERRUPT_DEBUG_Rx 2 +#define CYGNUM_HAL_INTERRUPT_DEBUG_Tx 3 +#define CYGNUM_HAL_INTERRUPT_TIMER1 4 +#define CYGNUM_HAL_INTERRUPT_TIMER2 5 +#define CYGNUM_HAL_INTERRUPT_PC_SLOTA 6 +#define CYGNUM_HAL_INTERRUPT_PC_SLOTB 7 +#define CYGNUM_HAL_INTERRUPT_SERIALA 8 +#define CYGNUM_HAL_INTERRUPT_SERIALB 9 +#define CYGNUM_HAL_INTERRUPT_PARALLEL_PORT 10 +#define CYGNUM_HAL_INTERRUPT_ASB0 11 +#define CYGNUM_HAL_INTERRUPT_ASB1 12 +#define CYGNUM_HAL_INTERRUPT_APB0 13 +#define CYGNUM_HAL_INTERRUPT_APB1 14 +#define CYGNUM_HAL_INTERRUPT_APB2 15 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_FIQ 16 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 16 +#define CYGNUM_HAL_ISR_COUNT 17 + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER2 + +#endif // CYGONCE_HAL_PLATFORM_INTS_H diff --git a/packages/hal/arm/pid/current/include/hal_platform_setup.h b/packages/hal/arm/pid/current/include/hal_platform_setup.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/hal_platform_setup.h @@ -0,0 +1,54 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-13 +// Purpose: ARM/PID platform specific support routines +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#define MEM_RESET 0x0B000020 // Write to this location to enable RAM + +#define PLATFORM_SETUP1 \ + ldr r0,=MEM_RESET /* enable RAM */ ;\ + str r0,[r0] + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */ diff --git a/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h b/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h @@ -0,0 +1,143 @@ +#ifndef CYGONCE_PKGCONF_HAL_ARM_PID_H +#define CYGONCE_PKGCONF_HAL_ARM_PID_H +// ==================================================================== +// +// pkgconf/hal_arm_pid.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas + + +// Contributors: gthomas +// Date: 1998-12-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_ARM_PID { + display "ARM PID7 evaluation board" + type radio + parent CYGPKG_HAL_ARM + platform pid + description " + The pid HAL package provides the support needed to run + eCos on a ARM PID7 eval board." + } + + cdl_option CYGHWR_HAL_ARM_PID_STARTUP { + display "Startup type" + parent CYGPKG_HAL_ARM_PID + type enum + legal_values ram rom stubs + startup + description " + When targetting the PID eval board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM. Selection of 'stubs' is for the special case of + building the eCos GDB stubs themselves." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_ARM_PID_STARTUP ram + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_PID_DIAG_PORT { + display "Diagnostic Serial Port" + parent CYGPKG_HAL_ARM_PID + type enum + legal_values 0 1 + description " + The PID/7T board has two separate serial ports. This option + chooses which of these ports will be used." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_PID_DIAG_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_PID_DIAG_BAUD { + display "Diagnostic Serial Port Baud Rate" + parent CYGPKG_HAL_ARM_PID + type enum + legal_values 9600 19200 38400 115200 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_PID_DIAG_BAUD 38400 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_PID_GDB_PORT { + display "GDB Serial Port" + parent CYGPKG_HAL_ARM_PID + type enum + legal_values 0 1 + description " + The PID/7T board has two separate serial ports. This option + chooses which of these ports will be used to connect to a host + running GDB." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_PID_GDB_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_PID_GDB_BAUD { + display "GDB Serial Port Baud Rate" + parent CYGPKG_HAL_ARM_PID + type enum + legal_values 9600 19200 38400 115200 + description " + This option controls the baud rate used for the GDB connection." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_PID_GDB_BAUD 38400 + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_ARM_PID_H */ +/* EOF hal_arm_pid.h */ diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.ldi b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 13 10:14:27 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x00004000, LENGTH = 0x7C000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x4000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.mlt b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 4000 7c000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 4000 4000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.ldi b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.ldi @@ -0,0 +1,51 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 13 10:14:27 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// Modified for ARM/PID7T, generic ROM image + +MEMORY +{ + rom : ORIGIN = 0x04000000, LENGTH = 0x80000 + ram : ORIGIN = 0x00000800, LENGTH = 0x7F800 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x4000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x800, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} + diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.mlt b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 800 7f800 0 ! +region rom 4000000 80000 1 ! +section data 0 1 1 1 1 1 0 0 800 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 4000000 4000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.ldi b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.ldi @@ -0,0 +1,50 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 13 10:14:27 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// Modified for ARM/PID7T, GDB/stubs ROM image only + +MEMORY +{ + rom : ORIGIN = 0x04000000, LENGTH = 0x80000 + ram : ORIGIN = 0x00000800, LENGTH = 0x03800 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x4000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x800, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.mlt b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 800 3800 0 ! +region rom 4000000 80000 1 ! +section data 0 1 1 1 1 1 0 0 800 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 4000000 4000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/arm/pid/current/include/plf_stub.h b/packages/hal/arm/pid/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/plf_stub.h @@ -0,0 +1,82 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-15 +// Purpose: Platform HAL stub support for ARM/PID boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. + +extern void hal_pid_init_serial(void); +extern int hal_pid_get_char(void); +extern void hal_pid_put_char(int c); +extern int hal_pid_interruptible(int); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_pid_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_pid_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_pid_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_pid_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/arm/pid/current/misc/Notes b/packages/hal/arm/pid/current/misc/Notes new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/Notes @@ -0,0 +1,46 @@ +=========================================================================== +####COPYRIGHTBEGIN#### + +------------------------------------------- +The contents of this file are subject to the Cygnus eCos Public License +Version 1.0 (the "License"); you may not use this file except in +compliance with the License. You may obtain a copy of the License at +http://sourceware.cygnus.com/ecos + +Software distributed under the License is distributed on an "AS IS" +basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +License for the specific language governing rights and limitations under +the License. + +The Original Code is eCos - Embedded Cygnus Operating System, released +September 30, 1998. + +The Initial Developer of the Original Code is Cygnus. Portions created +by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +------------------------------------------- + +####COPYRIGHTEND#### +=========================================================================== + +15 Jan 1999 + +How to build and install the GDB module on the PID + +1. Configure a minimal eCos system with all packages except 'infra' disabled. +2. Edit to enable GDB: + #define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + #undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +3. make;make -C hal/arm/pid/current/misc +4. Download the image onto the PID board: + arm-elf-gdb -nw hal/arm/pid/current/misc/gdb_module.img + You can connect to the board using either existing GDB stubs or Angel. + This will download the stubs onto the board at 0x60000..0x64000 +5. Configure a separate eCos system with all packages enabled. +6. make misc +7. Now download the FLASH programmer tool + arm-elf-gdb -nw hal/arm/pid/current/misc/prog_flash +8. Run the tool. The GDB stubs will now be programmed into the FLASH. + +eCos GDB stubs should now be installed and set up as the default monitor when you +run from FLASH. diff --git a/packages/hal/arm/pid/current/misc/PKGconf.mak b/packages/hal/arm/pid/current/misc/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/PKGconf.mak @@ -0,0 +1,55 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/pid/misc +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_pid +include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak + +ifdef CYG_HAL_STARTUP_STUBS +PROGS := gdb_module +OTHER_PROGS := gdb_module.img +endif +ifdef CYG_HAL_STARTUP_RAM +PROGS := flash prog_flash +endif +WHEREAMI := misc + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv + +ifdef CYG_HAL_STARTUP_STUBS +gdb_module.img: gdb_module.stamp + $(OBJCOPY) --strip-all gdb_module$(EXEEXT) gdb_module.img.XX + $(OBJCOPY) --change-addresses=0xFC060000 gdb_module.img.XX gdb_module.img + $(OBJCOPY) -O binary gdb_module.img gdb_module.bin + $(RM) -f gdb_module.img.XX +endif + + + diff --git a/packages/hal/arm/pid/current/misc/dl.c b/packages/hal/arm/pid/current/misc/dl.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/dl.c @@ -0,0 +1,79 @@ +//========================================================================== +// +// dl.c +// +// ARM PID7 eval board FLASH program tool +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-11-18 +// Description: Tool used for simple handshake downloads. +//####DESCRIPTIONEND#### + +#include + +#define SYNC_COUNT 63 + +int +main(int argc, char *argv[]) +{ + int c, count, j; + char cout, cin; + FILE *in, *log; + if ((in = fopen(argv[1], "r")) == (FILE *)NULL) { + fprintf(stderr, "Can't open '%s'\n", argv[1]); + exit(1); + } + if ((log = fopen("/tmp/dl.log", "w")) == (FILE *)NULL) { + fprintf(stderr, "Can't open log file\n"); + exit(1); + } + fprintf(stderr, "Downloading '%s'\n", argv[1]); + count = 0; j = 0; + write(1, ">", 1); // Magic start + while ((c = fgetc(in)) != EOF) { + cout = c; + write(1, &cout, 1); + if (++j == SYNC_COUNT) { + read(0, &cin, 1); + if (cin != cout) { + fprintf(stderr, "Sync problem - in: %x, out: %x, byte: %x\n", cin, cout, count); + fprintf(log, "Sync problem - in: %x, out: %x, byte: %x\n", cin, cout, count); + fflush(log); + break; + } + j = 0; + } + count++; + if ((count % 256) == 255) fprintf(stderr, "%08X\n", count); + } + sleep(2); + write(1, ":", 1); + fclose(log); + exit(0); +} diff --git a/packages/hal/arm/pid/current/misc/flash.c b/packages/hal/arm/pid/current/misc/flash.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/flash.c @@ -0,0 +1,435 @@ +//========================================================================== +// +// flash.c +// +// ARM PID7 eval board FLASH program tool +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-11-18 +// Description: Tool used to program onboard FLASH image +//####DESCRIPTIONEND#### + +// +// This program will program the FLASH on the PID board +// + +#include // Configuration header + +#include +#include +#include +#include +#include + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#define SYNC_COUNT 63 + +extern void diag_printf(const char *, ...); +int identify_FLASH(void); +void write_sector(int, char *); +bool load_srecords(char (*readc)(), CYG_ADDRESS *start, int *size); + +char dbuf[256]; +char *raw = (char *)0x10000; +char *flash_buffer = (char *)0x30000; +int pos, len; + +// FUNCTIONS + +externC void +cyg_package_start( void ) +{ +#ifdef CYGPKG_LIBC + cyg_iso_c_start(); +#else + (void)main(0, NULL); +#endif +} // cyg_package_start() + +char nextch(void) +{ + return (raw[pos++]); +} + +int +main( int argc, char *argv[] ) +{ + int i, j, size; + CYG_ADDRESS entry; + char c; + diag_printf("FLASH here!\n"); + while (identify_FLASH() == 0) { + diag_printf("... Please change FLASH jumper - hit C/R to continue:"); + do { + hal_diag_read_char(&c); + } while ((c != '\r') && (c != '\n')); + diag_printf("\n"); + } + restart: + diag_printf("Ready file - hit C/R to continue:"); + while (TRUE) { + hal_diag_read_char(&c); + if (c == '>') break; + } + i = 0; j = 0; + while (1) { + hal_diag_read_char(&c); + if (c == '!') { + diag_printf("... Reset\n"); + goto restart; + } + raw[i++] = c; + if (++j == SYNC_COUNT) { + hal_diag_write_char(c); + j = 0; + } + if (c == ':') break; + } + diag_printf("\n"); + pos = 0; len = i; + if (load_srecords(nextch, &entry, &size)) { + diag_printf("Read %x bytes, entry: %x\n", size, entry); + dump_buf(flash_buffer, 128); + diag_printf("\nData loaded - hit '!' to continue:"); + while (TRUE) { + hal_diag_read_char(&c); + if (c == '!') break; + } + diag_printf("\n"); + diag_printf("...Programming FLASH\n"); + pos = 0; i = 0; + while (pos < size) { + write_sector(i++, flash_buffer+pos); + pos += 256; + } + } else { + // Display buffer around failure + dump_buf(&raw[pos-32], 64); + } + diag_printf("All done!\n"); + while (1) ; +} + +// Adapted from ARM sample code +#define SEQ_ADD1 0x5555 +#define SEQ_ADD2 0xAAAA +#define START_CMD1 0xAA +#define START_CMD2 0x55 +#define ID_CMD 0x90 +#define PROG_CMD 0xA0 +#define STOP_CMD 0xF0 + +#define MAN_ATMEL 0x1F +#define ATMEL_AT29C040_ID 0X5B +#define ATMEL_AT29C040A_ID 0XA4 +#define ATMEL_AT29C1024_ID 0X25 +#define ATMEL_SECTOR_SIZE 256 +#define ATMEL_MAX_SECTORS 2048 + +int manuf_code, device_code, sector_size, max_no_of_sectors, word_mode; +volatile char *FLASH = (volatile char *)0x04000000; + +int +identify_FLASH(void ) +{ + // Enter Software Product Identification Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = ID_CMD; + + // Wait at least 10ms + cyg_thread_delay(2); + + // Read Manufacturer and device code from the device + manuf_code = FLASH[0]; + device_code = FLASH[1]; + + diag_printf("manuf: %x, device: %x\n", manuf_code, device_code); + + // Exit Software Product Identification Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = STOP_CMD; + + // Wait at least 10ms + cyg_thread_delay(5); + + if (manuf_code != MAN_ATMEL) { + diag_printf ( "Error: Wrong Manufaturer: %02x\n",manuf_code ); + return (0); + } + + switch (device_code) { + case ATMEL_AT29C040A_ID: + diag_printf ("AT29C040A recognised\n"); + sector_size = ATMEL_SECTOR_SIZE; + max_no_of_sectors = ATMEL_MAX_SECTORS; + word_mode = FALSE; + break; + case ATMEL_AT29C1024_ID: + diag_printf ("AT29C1024 recognised\n"); + sector_size = ATMEL_SECTOR_SIZE; + max_no_of_sectors = ATMEL_MAX_SECTORS; + word_mode = TRUE; + break; + default : + diag_printf ( "Error: Unsupported device: %02x\n", device_code); + return (0); + } + return (1); +} + +void +write_sector(int num, char *buf) +{ + int i, cnt; + volatile char *wrt = (volatile int *)&FLASH[num*sector_size]; + +// diag_printf("Writing to %08x\n", wrt); + // Enter Program Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = PROG_CMD; + + // Note: write bytes as longs regardless of bus width + for (i = 0; i < sector_size; i++) { + wrt[i] = buf[i]; + } + + // Wait for sector to program + cnt = 0; + i = sector_size - 1; + while (wrt[i] != buf[i]) { + if (cnt++ > 0x01000000) break; + } +// diag_printf("Out - i: %d, wrt[i] = %08X.%08X, buf[i] = %08X, count = %x\n", i, &wrt[i], wrt[i], buf[i], cnt); + + // Verify + for (i = 0; i < sector_size; i++) { + for (cnt = 0; cnt < 10; cnt++) { + if (*wrt == *buf) break; + cyg_thread_delay(1); + } + if (cnt == 10) { + diag_printf("Can't program at 0x%08X: %02X not %02X\n", wrt, *wrt, *buf); + } + wrt++; buf++; + } +} + +// S-record download code - viciously 'adapted' from "kernel/src/sload/sload.c" + +/*---------------------------------------------------------------------------*/ +/* +// +// An srecord looks like this: +// +// byte count-+ address +// start ---+ | | data +- checksum +// | | | | +// S01000006F6B692D746573742E73726563E4 +// S315000448600000000000000000FC00005900000000E9 +// S31A0004000023C1400037DE00F023604000377B009020825000348D +// S30B0004485A0000000000004E +// S70500040000F6 +// +// S
+// +// Where +// - length (2 characters) +// is the number of bytes following upto the checksum. Note that +// this is not the number of chars following, since it takes two +// chars to represent a byte. +// - type (2 characters) +// is one of: +// 0) header record +// 1) two byte address data record +// 2) three byte address data record +// 3) four byte address data record +// 5) record containing the number of S1, S2, or S3 records +// 7) four byte address termination record +// 8) three byte address termination record +// 9) two byte address termination record +// +// - address (4, 6, or 8 characters) +// is the start address of the data following, or in the case of +// a termination record, the start address of the image +// - data (0-2n characters) +// is the data. +// - checksum (2 characters) +// is the sum of all the raw byte data in the record, from the length +// upwards, modulo 256 and subtracted from 255. +// +// Useful S-records for testing purposes: +// Start record: +// S00B0000737461303030447563 +// This sets the default address to be 0x02005000: +// S31A020050002700801481C4E0B0A15000000100000091D02000018F +// S31A0200501500000001000000010000002700801881C4E2E4A150C1 +// S311020080A42407070A090B0A0781050000E1 +// Termination record: +// S70502005000A8 +// +*/ + +#define S0 0 +#define S1 1 +#define S2 2 +#define S3 3 +#define S5 5 +#define S7 7 +#define S8 8 +#define S9 9 + +/*---------------------------------------------------------------------------*/ + +int hex2digit(char c) +{ + if( c & 0x40 ) c += 9;; + return c &0x0f; + +// return ( c <= '9' ? c - '0' : +// c <= 'Z' ? c - 'A' + 10 : +// c - 'a' + 10); +} + +/*---------------------------------------------------------------------------*/ + +bool load_srecords(char (*readc)(), + CYG_ADDRESS *start, + int *size) +{ + CYG_ADDRESS addr, load_addr; + int addrsize; + int length; + int i; + cyg_uint8 chksum, ochksum; + cyg_uint8 val; + cyg_uint8 *tdata; + char s; + char type; + char len0; + char len1; + bool first = true; + + + do { + // Skip whitespace characters until we find something that + // might be an 'S'. + do { + s = readc(); + } while( s == '\r' || s == '\n' || s == ' '); + + // Check that this is an S record + if( s != 'S' ) { + diag_printf("Invalid 'S' record\n"); + return false; + } + + // First 4 bytes are standard S + type + len + type = readc(); + len0 = readc(); + len1 = readc(); + + // decode the type + type = hex2digit(type); + + // determine address size + switch (type) { + case S0: // start records have no address + addrsize = 0; + break; + case S1: // two byte address + case S9: + addrsize = 4; + break; + case S2: // 3 byte address + case S8: + addrsize = 6; + break; + case S3: // 4 byte address + case S7: + addrsize = 8; + break; + } + + length = hex2digit (len0) << 4; + length |= hex2digit (len1); + chksum = length; + + // read the address + addr = 0; + for (i = 0; i < addrsize; i++) { + val = hex2digit(readc()); + addr = (addr << 4) | val; + } + + // calculate the checksum, which is done by the byte, not the digit + for (i = 0; i < addrsize*4; i += 8) { + chksum += ((addr >> i) & 0xff); + } + + // decide where to load this data + if (first && (type != S0)) { + load_addr = addr; + first = false; + } + + // read the data and put it directly into memory where it belongs + tdata = (cyg_uint8 *)((addr - load_addr) + flash_buffer); + if (type < S7) { + *size = (addr - load_addr); + } + val = 0; + for (i = 0; i < ((length - 1) * 2) - addrsize; i += 2 ) { + val = hex2digit (readc()) << 4; + val |= hex2digit (readc()); + chksum += val; + if( type != S0 ) *tdata++ = val; + if (type < S7) *size = *size + 1; + } + + // now get the old checksum + ochksum = hex2digit(readc()) << 4; + ochksum |= hex2digit(readc()); + chksum = ~chksum; + if (chksum != ochksum) { + diag_printf("Bad checksum - addr: %x\n", addr); + return false; + } + + } while( type < S7 ); + + *start = addr; + return true; +} diff --git a/packages/hal/arm/pid/current/misc/gdb_module.c b/packages/hal/arm/pid/current/misc/gdb_module.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/gdb_module.c @@ -0,0 +1,64 @@ +//========================================================================== +// +// gdb_module.c +// +// ARM PID7T eval board GDB stubs (module wrapper) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-12-18 +// Description: PID7T FLASH module for eCos GDB stubs +//####DESCRIPTIONEND#### + +// +// This is the module 'wrapper' for the GDB stubs +// + +#include +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +void cyg_start (void) +{ + for(;;) breakpoint(); +} +#else + +#include + +void cyg_start (void) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Stand-alone GDB stubs only"); +} +#endif + + + diff --git a/packages/hal/arm/pid/current/misc/prog_flash.c b/packages/hal/arm/pid/current/misc/prog_flash.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/misc/prog_flash.c @@ -0,0 +1,206 @@ +//========================================================================== +// +// prog_flash.c +// +// ARM PID7 eval board FLASH program tool +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1998-11-18 +// Description: Tool used to program onboard FLASH image +//####DESCRIPTIONEND#### + +// +// This program will program the FLASH on the PID board +// It is similar to 'flash' (which also downloads S records) but it always +// programs from a fixed buffer. This is sufficient to load/update the GDB +// stubs on the board. +// + +#include // Configuration header + +#include +#include +#include +#include +#include + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +extern void diag_printf(const char *, ...); +int identify_FLASH(void); +void write_sector(int, char *); + +char *flash_buffer = (char *)0x60000; +char *flash_buffer_end = (char *)0x64000; + +// FUNCTIONS + +externC void +cyg_package_start( void ) +{ +#ifdef CYGPKG_LIBC + cyg_iso_c_start(); +#else + (void)main(0, NULL); +#endif +} // cyg_package_start() + +int +main( int argc, char *argv[] ) +{ + int i; + + diag_printf("FLASH here!\n"); + while (identify_FLASH() == 0) { + diag_printf("... Please change FLASH jumper\n"); + cyg_thread_delay(5*100); + } + diag_printf("About to program FLASH using data at %x..%x\n", flash_buffer, flash_buffer_end); + diag_printf("*** Press RESET now to abort!\n"); + cyg_thread_delay(5*100); + diag_printf("\n"); + diag_printf("...Programming FLASH\n"); + i = 0; + while (flash_buffer < flash_buffer_end) { + write_sector(i++, flash_buffer); + flash_buffer += 256; + } + diag_printf("All done!\n"); + while (1) ; +} + +// Adapted from ARM sample code +#define SEQ_ADD1 0x5555 +#define SEQ_ADD2 0xAAAA +#define START_CMD1 0xAA +#define START_CMD2 0x55 +#define ID_CMD 0x90 +#define PROG_CMD 0xA0 +#define STOP_CMD 0xF0 + +#define MAN_ATMEL 0x1F +#define ATMEL_AT29C040_ID 0X5B +#define ATMEL_AT29C040A_ID 0XA4 +#define ATMEL_AT29C1024_ID 0X25 +#define ATMEL_SECTOR_SIZE 256 +#define ATMEL_MAX_SECTORS 2048 + +int manuf_code, device_code, sector_size, max_no_of_sectors, word_mode; +volatile char *FLASH = (volatile char *)0x04000000; + +int +identify_FLASH(void ) +{ + // Enter Software Product Identification Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = ID_CMD; + + // Wait at least 10ms + cyg_thread_delay(2); + + // Read Manufacturer and device code from the device + manuf_code = FLASH[0]; + device_code = FLASH[1]; + + diag_printf("manuf: %x, device: %x\n", manuf_code, device_code); + + // Exit Software Product Identification Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = STOP_CMD; + + // Wait at least 10ms + cyg_thread_delay(5); + + if (manuf_code != MAN_ATMEL) { + diag_printf ( "Error: Wrong Manufaturer: %02x\n",manuf_code ); + return (0); + } + + switch (device_code) { + case ATMEL_AT29C040A_ID: + diag_printf ("AT29C040A recognised\n"); + sector_size = ATMEL_SECTOR_SIZE; + max_no_of_sectors = ATMEL_MAX_SECTORS; + word_mode = FALSE; + break; + case ATMEL_AT29C1024_ID: + diag_printf ("AT29C1024 recognised\n"); + sector_size = ATMEL_SECTOR_SIZE; + max_no_of_sectors = ATMEL_MAX_SECTORS; + word_mode = TRUE; + break; + default : + diag_printf ( "Error: Unsupported device: %02x\n", device_code); + return (0); + } + return (1); +} + +void +write_sector(int num, char *buf) +{ + int i, cnt; + volatile char *wrt = (volatile int *)&FLASH[num*sector_size]; + +// diag_printf("Writing to %08x\n", wrt); + // Enter Program Mode + FLASH[SEQ_ADD1] = START_CMD1; + FLASH[SEQ_ADD2] = START_CMD2; + FLASH[SEQ_ADD1] = PROG_CMD; + + // Note: write bytes as longs regardless of bus width + for (i = 0; i < sector_size; i++) { + wrt[i] = buf[i]; + } + + // Wait for sector to program + cnt = 0; + i = sector_size - 1; + while (wrt[i] != buf[i]) { + if (cnt++ > 0x01000000) break; + } +// diag_printf("Out - i: %d, wrt[i] = %08X.%08X, buf[i] = %08X, count = %x\n", i, &wrt[i], wrt[i], buf[i], cnt); + + // Verify + for (i = 0; i < sector_size; i++) { + for (cnt = 0; cnt < 10; cnt++) { + if (*wrt == *buf) break; + cyg_thread_delay(1); + } + if (cnt == 10) { + diag_printf("Can't program at 0x%08X: %02X not %02X\n", wrt, *wrt, *buf); + } + wrt++; buf++; + } +} diff --git a/packages/hal/arm/pid/current/src/PKGconf.mak b/packages/hal/arm/pid/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/src/PKGconf.mak @@ -0,0 +1,38 @@ +#============================================================================== +# +# makefile +# +# hal/arm/pid/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_arm_pid +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c plf_stub.c pid_misc.c +OTHER_OBJS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/hal/arm/pid/current/src/hal_diag.c b/packages/hal/arm/pid/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/src/hal_diag.c @@ -0,0 +1,358 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include +#include // board specifics + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // basic machine info +#include // interrupt macros +#include // IO macros +#include +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include +#endif + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYG_HAL_STARTUP_ROM +#define HAL_DIAG_USES_HARDWARE +#endif + +/*---------------------------------------------------------------------------*/ +/* From serial_16550.h */ +#if CYGHWR_HAL_ARM_PID_DIAG_PORT==0 +// This is the base address of the A-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800000 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALA +#else +// This is the base address of the B-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800020 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALB +#endif + +#if CYGHWR_HAL_ARM_PID_DIAG_BAUD==9600 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x0C +#endif +#if CYGHWR_HAL_ARM_PID_DIAG_BAUD==19200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x06 +#endif +#if CYGHWR_HAL_ARM_PID_DIAG_BAUD==38400 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x03 +#endif +#if CYGHWR_HAL_ARM_PID_DIAG_BAUD==115200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x01 +#endif + +#ifndef CYG_DEVICE_SERIAL_RS232_BAUD_MSB +#error Missing/incorrect serial baud rate defined - CDL error? +#endif + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x0C) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x14) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // modem status register, read + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ +#if 1 + static int init = 0; + char *msg = "\n\rARM eCos\n\r"; +#if !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || 1 + cyg_uint8 lcr; + + if (init++) return; + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO +#endif +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && 0 + if (init++) return; +#endif + while (*msg) hal_diag_write_char(*msg++); +#endif +} + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define DIAG_BUFSIZE 32 +#else +#define DIAG_BUFSIZE 2048 +#endif +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; + +void hal_diag_write_char(char c) +{ +#if 1 +#if !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || 1 + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); +#endif +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && 0 + hal_output_gdb_string (&c, 1); +#endif + diag_buffer[diag_bp++] = c; + if (diag_bp == DIAG_BUFSIZE) diag_bp = 0; +#else + hal_output_gdb_string (&c, 1); +#endif +} + +void hal_diag_read_char(char *c) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); +} +#else // HAL_DIAG relies on GDB + +// Initialize diag port - assume GDB channel is already set up +void hal_diag_init(void) +{ +} + +// Actually send character down the wire +static void +hal_diag_write_char_serial(char c) +{ + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + HAL_IO_BARRIER (); +} + +static bool +hal_diag_read_serial(char *c) +{ + long timeout = 1000000000; // A long time... + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + if (--timeout == 0) return false; + } while ((lsr & SIO_LSR_DR) == 0); + HAL_IO_BARRIER (); // Prevent RBR preload. + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); + HAL_IO_BARRIER (); + return true; +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt (__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */ diff --git a/packages/hal/arm/pid/current/src/pid_misc.c b/packages/hal/arm/pid/current/src/pid_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/src/pid_misc.c @@ -0,0 +1,202 @@ +//========================================================================== +// +// pid_misc.c +// +// HAL misc board support code for ARM PID7 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include // Register state info +#include +#include // necessary? + +/*------------------------------------------------------------------------*/ +// On-board timer +/*------------------------------------------------------------------------*/ + +// Timer registers +#define CYG_DEVICE_TIMER_BASE 0x0A800020 +#define CYG_DEVICE_TIMER_LOAD \ + ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x00)) + // Load value, read/write +#define CYG_DEVICE_TIMER_CURRENT \ + ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x04)) + // Current value, read +#define CYG_DEVICE_TIMER_CONTROL \ + ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x08)) + // Control register, read/write +#define CYG_DEVICE_TIMER_CLEAR \ + ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x0C)) + // Clears interrrupt, write only + +// Clock/timer control register +#define CTL_ENABLE 0x80 // Bit 7: 1 - counter enabled +#define CTL_DISABLE 0x00 // 0 - counter disabled +#define CTL_FREERUN 0x00 // Bit 6: 0 - free running counter +#define CTL_PERIODIC 0x40 // 1 - periodic timer mode +#define CTL_SCALE_1 0x00 // Bits 32: 00 - Scale clock by 1 +#define CTL_SCALE_16 0x04 // 01 - Scale by 16 +#define CTL_SCALE_256 0x08 // 10 - Scale by 256 + // 12.8us/tick + +// Interrupt controller registers +#define CYG_DEVICE_ICTL_BASE 0x0A000000 +#define CYG_DEVICE_IRQ_Status \ + ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x00)) + // Current status, read only +#define CYG_DEVICE_IRQ_Enable \ + ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) + // Enable status, read only +#define CYG_DEVICE_IRQ_EnableSet \ + ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) + // Enable (1's only), write only +#define CYG_DEVICE_IRQ_EnableClear \ + ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x0C)) + // Disable (1's only), write only + +static cyg_uint32 _period; + +void hal_clock_initialize(cyg_uint32 period) +{ + //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, period); + //diag_printf("psr = %x\n", psr()); + HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, CTL_DISABLE); // Turn off + HAL_WRITE_UINT32(CYG_DEVICE_TIMER_LOAD, period); + HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, + CTL_ENABLE | CTL_PERIODIC | CTL_SCALE_16); + _period = period; +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + //diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); + HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CLEAR, 0); + _period = period; +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + cyg_uint32 value; +// diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); + HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value); + value &= 0xFFFF; + *pvalue = _period - (value & 0xFFFF); // Note: counter is only 16 bits + // and decreases +} + +void hal_hardware_init(void) +{ + // Any hardware/platform initialization that needs to be done. + HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 0xFFFF); // Clear all + // interrupt sources +} + +// +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. + +int hal_IRQ_handler(void) +{ + // Do hardware-level IRQ handling + int irq_status, vector; + HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); + //diag_init(); diag_printf("%s, status: %x\n", __PRETTY_FUNCTION__, irq_status); + for (vector = 1; vector < 16; vector++) { + if (irq_status & (1< + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +#include // HAL IO macros +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include // HAL interrupt macros +#include // HAL ISR support +#endif + +//----------------------------------------------------------------------------- +// Serial definitions. +#if CYGHWR_HAL_ARM_PID_GDB_PORT==0 +// This is the base address of the A-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800000 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALA +#else +// This is the base address of the B-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0x0D800020 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALB +#endif + +#if CYGHWR_HAL_ARM_PID_GDB_BAUD==9600 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x0C +#endif +#if CYGHWR_HAL_ARM_PID_GDB_BAUD==19200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x06 +#endif +#if CYGHWR_HAL_ARM_PID_GDB_BAUD==38400 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x03 +#endif +#if CYGHWR_HAL_ARM_PID_GDB_BAUD==115200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x01 +#endif + +#ifndef CYG_DEVICE_SERIAL_RS232_BAUD_MSB +#error Missing/incorrect serial baud rate defined - CDL error? +#endif + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x04) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x0C) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x14) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // modem status register, read + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// Interrupt Enable Register +#define SIO_IER_RCV 0x01 +#define SIO_IER_XMT 0x02 +#define SIO_IER_LS 0x04 +#define SIO_IER_MS 0x08 + +// Modem Control Register +#define SIO_MCR_DTR 0x01 +#define SIO_MCR_RTS 0x02 +#define SIO_MCR_INT 0x08 // Enable interrupts + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#endif + +//----------------------------------------------------------------------------- +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_uint8 c; + + c = hal_pid_get_char(); // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + } + return 0; // No need to run DSR +} + +int +hal_pid_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + } else { + cyg_drv_interrupt_mask(CYG_DEVICE_SERIAL_INT); + } + + return 0; +} +#endif + +// Initialize the current serial port. +void hal_pid_init_serial(void) +{ + cyg_uint8 lcr; + + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYG_DEVICE_SERIAL_INT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_RCV); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, SIO_MCR_INT|SIO_MCR_DTR|SIO_MCR_RTS); +#endif +} + +// Write C to the current serial port. +void hal_pid_put_char(int c) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); +} + +// Read one character from the current serial port. +int hal_pid_get_char(void) +{ + char c; + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); + return c; +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/arm/pid/current/tests/PKGconf.mak b/packages/hal/arm/pid/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/tests/PKGconf.mak @@ -0,0 +1,39 @@ +#=============================================================================== +# +# makefile +# +# kernel/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_pid +include ../../../../../pkgconf/pkgconf.mak + +TESTS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + + diff --git a/packages/hal/common/current/ChangeLog b/packages/hal/common/current/ChangeLog --- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,299 @@ +1999-04-27 Jesper Skov + + * include/pkgconf/hal.h: GDB_BREAK support now available for ARM + targets. +1999-04-16 Bart Veer + + * src/PKGconf.mak: + * src/dummy.c: + New file that can always be added to libextras.a without + affecting image sizes. + +1999-04-14 Jonathan Larmour + + * include/hal_stub.h: + Make sure all functions have C linkage even in C++ + +1999-04-14 Jesper Skov + PR 19845 + * src/generic-stub.c (__process_packet): Reset _register pointer + to the exception state before attempting to set up single-step + magic. + +1999-04-14 Jesper Skov + + * include/hal_stub.h: Added declaration for __stub_copy_registers. + +1999-04-14 Jesper Skov + + * src/hal_stub.c: Use HAL_xCACHE_IS_ENABLED if defined. + +1999-04-09 Jesper Skov + + * src/hal_stub.c: + Moved get_register and put_register here. Made them access the + currently selected register set. + +1999-03-22 Jonathan Larmour + + * include/dbg-threads-api.h: Update copyright + + * src/generic-stub.c: Change Cygnus Support->Cygnus Solutions + + * src/thread-packets.c: Update copyright + + * src/thread-pkts.h: Update copyright + +1999-03-19 Nick Garnett + + * tests/cache.c: Added interrupt disable and enable to cache state + change blocks, in line with similar changes to kcache1. + +1999-03-17 Jesper Skov + + * src/hal_stub.c (hal_output_gdb_string): Use disable/restore + macros to make sure it works even when interruptible() is a NOP + function. + +1999-03-10 Nick Garnett + + * include/pkgconf/hal.h: + Changed include of hal_tx39_jmr3904.h to hal_tx39.h. + +1999-03-05 Nick Garnett + + * include/drv_api.h: + * src/drv_api.c: + Fixed some typos in non-kernel configuration support. + +1999-03-04 Jesper Skov + PR 19367 + * include/pkgconf/hal.h: Exclude GDB stubs on sparc. + +1999-02-26 Jesper Skov + + * src/generic-stub.c: + * include/generic-stub.h: + Added binary download patches from libstub. + +1999-02-25 Nick Garnett + + * include/drv_api.h: + * src/drv_api.c: + Added these files to define driver API. + +1999-02-23 Nick Garnett + + * include/pkgconf/hal.h: + Added include of to get TX39 speed + configuration options. + +1999-02-20 Jonathan Larmour + + * tests/intr.c: + Rename CYGNUM_VECTOR_RTC -> CYGNUM_HAL_INTERRUPT_RTC in line with + HAL changes + +1999-02-17 Jesper Skov + + * src/hal_stub.c: + * src/generic-stub.c (__handle_exception): + Only include cyg_hal_gdb_break magic when stub is configured to + handle GDB BREAK signals. + +1999-02-17 Jesper Skov + + * src/generic-stub.c (__handle_exception): Moved special signal + handling here to avoid duplication for all architectures. + +1999-02-16 Jesper Skov + + * src/stubrom/stubrom.c: Changed set_debug_traps to initialize_stub. + + * include/hal_stub.h: [added] + * include/generic-stub.h: + * src/hal_stub.c: [added] + * src/board.h: [added] + * src/thread-pkts.h: + * src/thread-packets.c: + * src/generic-stub.c: + * src/PKGconf.mak: + Merged in latest libstub changes. Moved most eCos specific changes + into hal_stub.[ch], reducing effort required for further + merging/integration. + +1999-02-05 Jesper Skov + + * include/pkgconf/hal.h: Cleaned up the MPC8xx configuration. + +1999-01-29 Jesper Skov + + * include/pkgconf/hal.h: Added simple MPC8xx configuration. + + +1999-01-26 Hugo Tyson + + * tests/cache.c (time0): Waste much less time if running in a + simulator. Do only 40 loops instead of 4000. + In consequence the nasty meddling with MAX_STRIDE depending on + HAL_xxx_SIM package definitions can go. + +1999-01-22 Jesper Skov + + * include/pkgconf/hal.h: Renamed CYG_HAL_POWERPC_FADS to + CYGPKG_HAL_POWERPC_FADS. + +1999-01-21 Jonathan Larmour + + * include/pkgconf/hal.h: + Tidy up and update description + Add new CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG option to allow default + priority static constructors to be deferred + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + +1999-01-21 Jesper Skov + Merge with FADS branch. + + 1998-12-17 Jesper Skov + + * include/pkgconf/hal.h: Don't allow GDB BREAK support on FADS. + Define _MPC860, not _MP860. + + 1998-12-17 Jesper Skov + + * include/pkgconf/hal.h: + Added FADS entry from Kevin Hester . + + 1999-01-19 Hugo Tyson + + * include/pkgconf/hal.h: + Add CYG_KERNEL_USE_INIT_PRIORITY for SPARCLITE. + + +1999-01-18 Jesper Skov + PR 18823 + * include/pkgconf/hal.h: Don't allow GDB stubs to be configured + for Linux target. + +1999-01-18 Jesper Skov + PR 18822 + * include/pkgconf/hal.h: GDB_BREAK support not available for ARM + targets. + +1999-01-14 Gary Thomas + + * src/stubrom/PKGconf.mak: Rename 'TESTS' to 'PROGS' due to + changes in 'makrules.prv'. + +1999-01-14 Jesper Skov + + * src/stubrom/stubrom.c (cyg_start): Fix compiler warning. + + * include/dbg-threads-api.h: Include cyg_type.h to get externC + definition. + +1999-01-14 Nick Garnett + + * include/dbg-threads-api.h: Added prototype for dbg_scheduler(). + +1999-01-13 Gary Thomas + + * src/generic-stub.c (__output_hex_value): Change buffer size + [2048 was rather large] and make stack based. Also don't + allow for string to exceed buffer. + +1999-01-13 Jesper Skov + + * src/generic-stub.c (strcpy): Terminate copied string. + +1999-01-11 Jesper Skov + + * tests/intr.c (CYGNUM_KERNEL_COUNTERS_RTC_PERIOD): Added RTC data + for Linux. + +Wed Dec 9 14:07:30 GMT 1998 Chris Provenzano + + * include/pkgconf/hal.h: Compile the i386 linux target with + CYG_KERNEL_USE_INIT_PRIORITY defined. + + +1999-01-04 Jesper Skov + + * src/generic-stub.c (interruptible): Cleaned up a bit. + +1999-01-04 Jesper Skov + PR 18572 + + * tests/cache.c: Purge data cache before invalidating it. + +1998-12-09 Gary Thomas + + * src/generic-stub.c: Better handling of errors while stubs + are accessing memory on behalf of GDB. Requires support for + GCC 'computed goto label' in top-level exception handler. + +1998-12-09 Jesper Skov + + * include/pkgconf/hal.h: Removed the + CYGARC_HAL_COMMON_EXPORT_CPU_MACROS option. Causing failures in + permutation tests. + +1998-12-07 Jesper Skov + + * src/generic-stub.c (process_exception): Send an acknowledge char + on first entry so GDB doesn't timeout before resending its initial + packet. + +1998-11-26 Jesper Skov + + * include/pkgconf/hal.h: Added + CYGARC_HAL_COMMON_EXPORT_CPU_MACROS. + +1998-11-23 Jesper Skov + + * tests/cache.c: Only run with stride 1 on SIMs. + +1998-11-23 Jesper Skov + + * include/pkgconf/hal.h: Define SIM as a 603 CPU. + +1998-11-19 Jesper Skov + + * tests/intr.c: + Make the test do nothing if kernel real-time clock is enabled. + Added different timer constants for PPC SIM and HW. + +1998-11-17 Jesper Skov + + * tests/intr.c: + * include/pkgconf/hal.h: + Renamed CYG_HAL_POWERPC_MP860 to CYG_HAL_POWERPC_MPC860. + +1998-11-04 Jesper Skov + + * include/pkgconf/hal.h: Made CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT a + sub-option of CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS. + +1998-11-16 Jesper Skov + + * include/pkgconf/hal.h: Allow GDB stubs to be configured for + MN10300 HW. Allow GDB_BREAK for all but tx39. + +1998-11-04 Jesper Skov + + * include/pkgconf/hal.h: Made CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT a + sub-option of CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS. + +1998-11-04 Jesper Skov + + * src/generic-stub.c (process_packet): Flush D cache before + invalidating I cache. + +1998-11-02 Jesper Skov + + * src/generic-stub.c (__handle_exception): Check for breakpoints + set by GDB interrupt handler. + 1998-10-25 Jesper Skov * src/thread-packets.c: Fixed closing #endif comment. @@ -171,7 +467,7 @@ 1998-08-18 Nick Garnett /* externC */ + #define has_thread_void 0 #define has_thread_current 1 #define has_thread_registers 2 @@ -47,9 +49,9 @@ extern int dbg_currthread_id(void); /* get the first or next member of the list of known threads */ extern int dbg_threadlist(int startflag, - threadref * lastthreadid, - threadref * next_thread - ) ; + threadref * lastthreadid, + threadref * next_thread + ) ; /* return 1 if next_threadid has been filled in with a value */ /* return 0 if there are none or no more */ @@ -65,19 +67,19 @@ struct cygmon_thread_debug_info { threadref thread_id ; int context_exists ; /* To the point where examining its state, - registers and stack makes sense to GDB */ + registers and stack makes sense to GDB */ char * thread_display ; /* As shown in thread status window, name, state */ char * unique_thread_name ; /* human readable identifier, window label */ char * more_display ; /* more detailed info about thread. - priority, queuedepth, state, stack usage, statistics */ + priority, queuedepth, state, stack usage, statistics */ } ; extern int dbg_threadinfo( - threadref * threadid, - struct cygmon_thread_debug_info * info) ; + threadref * threadid, + struct cygmon_thread_debug_info * info) ; /* Return 1 if threadid is defined and info copied, 0 otherwise */ @@ -89,9 +91,9 @@ have already been assigned. */ extern int dbg_getthreadreg( - threadref * osthreadid, - int regcount, /* count of registers in the array */ - void * regval) ; /* fillin this array */ + threadref * osthreadid, + int regcount, /* count of registers in the array */ + void * regval) ; /* fillin this array */ /* The O.S. should scan through this list of registers which are in @@ -101,8 +103,17 @@ by osthreadid. Return 0 if the threadis process or other error. Return 1 if the setting is successful. */ extern int dbg_setthreadreg( - threadref * osthreadid, - int regcount , /* number of registers */ - void * regval) ; + threadref * osthreadid, + int regcount , /* number of registers */ + void * regval) ; + +/* Control over OS scheduler. With the scheduler locked it should not + perform any rescheduling in response to interrupts. */ +externC int dbg_scheduler( + threadref * osthreadid, + int lock, /* 0 == unlock, 1 == lock */ + int mode); /* 0 == step, 1 == continue */ + + #endif /* DBG_THREADS_API_INCLUDED */ diff --git a/packages/hal/common/current/include/drv_api.h b/packages/hal/common/current/include/drv_api.h new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/include/drv_api.h @@ -0,0 +1,194 @@ +#ifndef CYGONCE_HAL_DRV_API_H +#define CYGONCE_HAL_DRV_API_H + +/*========================================================================== +// +// drv_api.h +// +// Native API for Kernel +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Date: 1999-02-24 +// Purpose: Driver API +// Description: This file defines the API used by device drivers to access +// system services. When the kernel is present it maps directly +// to the Kernel C API. When the kernel is absent, it is provided +// by a set of HAL functions. +// +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include +#include + +#ifdef CYGPKG_KERNEL + +/*------------------------------------------------------------------------*/ +/* Kernel co-resident version of API */ + +#include + +#ifndef CYGFUN_KERNEL_API_C +#error Driver API requres Kernel API to be present +#endif + +#include + +#define cyg_drv_isr_lock cyg_interrupt_disable +#define cyg_drv_isr_unlock cyg_interrupt_enable + +#define cyg_drv_dsr_lock cyg_scheduler_lock +#define cyg_drv_dsr_unlock cyg_scheduler_unlock + +#define cyg_drv_mutex_t cyg_mutex_t +#define cyg_drv_mutex_init cyg_mutex_init +#define cyg_drv_mutex_destroy cyg_mutex_destroy +#define cyg_drv_mutex_lock cyg_mutex_lock +#define cyg_drv_mutex_trylock cyg_mutex_trylock +#define cyg_drv_mutex_unlock cyg_mutex_unlock +#define cyg_drv_mutex_release cyg_mutex_release + +#define cyg_drv_cond_t cyg_cond_t +#define cyg_drv_cond_init cyg_cond_init +#define cyg_drv_cond_destroy cyg_cond_destroy +#define cyg_drv_cond_wait cyg_cond_wait +#define cyg_drv_cond_signal cyg_cond_signal +#define cyg_drv_cond_broadcast cyg_cond_broadcast + +#define cyg_drv_interrupt_create cyg_interrupt_create +#define cyg_drv_interrupt_delete cyg_interrupt_delete +#define cyg_drv_interrupt_attach cyg_interrupt_attach +#define cyg_drv_interrupt_detach cyg_interrupt_detach +#define cyg_drv_interrupt_mask cyg_interrupt_mask +#define cyg_drv_interrupt_unmask cyg_interrupt_unmask +#define cyg_drv_interrupt_acknowledge cyg_interrupt_acknowledge +#define cyg_drv_interrupt_configure cyg_interrupt_configure +#define cyg_drv_interrupt_level cyg_interrupt_level + +#else /* CYGPKG_KERNEL */ + +/*------------------------------------------------------------------------*/ +/* Non-kernel version of API */ + +typedef CYG_ADDRWORD cyg_addrword_t; /* May hold pointer or word */ +typedef cyg_addrword_t cyg_handle_t; /* Object handle */ +typedef cyg_uint32 cyg_priority_t; /* type for priorities */ +typedef cyg_uint32 cyg_vector_t; /* Interrupt vector id */ +typedef int cyg_bool_t; + +typedef cyg_uint32 cyg_ISR_t( cyg_vector_t vector, cyg_addrword_t data); +typedef void cyg_DSR_t(cyg_vector_t vector, + cyg_ucount32 count, + cyg_addrword_t data); + + +externC void cyg_drv_isr_lock(void); +externC void cyg_drv_isr_unlock(void); + +externC void cyg_drv_dsr_lock(void); +externC void cyg_drv_dsr_unlock(void); + +typedef struct +{ + cyg_atomic lock; +} cyg_drv_mutex_t; + +externC void cyg_drv_mutex_init( cyg_drv_mutex_t *mutex ); +externC void cyg_drv_mutex_destroy( cyg_drv_mutex_t *mutex ); +externC cyg_bool_t cyg_drv_mutex_lock( cyg_drv_mutex_t *mutex ); +externC cyg_bool_t cyg_drv_mutex_trylock( cyg_drv_mutex_t *mutex ); +externC void cyg_drv_mutex_unlock( cyg_drv_mutex_t *mutex ); +externC void cyg_drv_mutex_release( cyg_drv_mutex_t *mutex ); + +typedef struct +{ + cyg_atomic wait; + cyg_drv_mutex_t *mutex; +} cyg_drv_cond_t; + +externC void cyg_drv_cond_init( cyg_drv_cond_t *cond, cyg_drv_mutex_t *mutex ); +externC void cyg_drv_cond_destroy( cyg_drv_cond_t *cond ); +externC void cyg_drv_cond_wait( cyg_drv_cond_t *cond ); +externC void cyg_drv_cond_signal( cyg_drv_cond_t *cond ); +externC void cyg_drv_cond_broadcast( cyg_drv_cond_t *cond ); + +typedef struct cyg_interrupt +{ + cyg_vector_t vector; + cyg_priority_t priority; + cyg_ISR_t *isr; + cyg_DSR_t *dsr; + CYG_ADDRWORD data; + + volatile struct cyg_interrupt *next_dsr; + cyg_int32 dsr_count; + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + struct cyg_interrupt *next; +#endif + +} cyg_interrupt; + +externC void cyg_drv_interrupt_create( + cyg_vector_t vector, + cyg_priority_t priority, + cyg_addrword_t data, + cyg_ISR_t *isr, + cyg_DSR_t *dsr, + cyg_handle_t *handle, + cyg_interrupt *intr + ); +externC void cyg_drv_interrupt_delete( cyg_handle_t interrupt ); +externC void cyg_drv_interrupt_attach( cyg_handle_t interrupt ); +externC void cyg_drv_interrupt_detach( cyg_handle_t interrupt ); + +externC void cyg_drv_interrupt_mask( cyg_vector_t vector ); +externC void cyg_drv_interrupt_unmask( cyg_vector_t vector ); +externC void cyg_drv_interrupt_acknowledge( cyg_vector_t vector ); +externC void cyg_drv_interrupt_configure( + cyg_vector_t vector, + cyg_bool_t level, + cyg_bool_t up + ); +externC void cyg_drv_interrupt_level( cyg_vector_t vector, cyg_priority_t level ); + + +enum cyg_ISR_results +{ + CYG_ISR_HANDLED = 1, /* Interrupt was handled */ + CYG_ISR_CALL_DSR = 2 /* Schedule DSR */ +}; + +#endif /* CYGPKG_KERNEL */ + +/*------------------------------------------------------------------------*/ +/* EOF drv_api.h */ +#endif // CYGONCE_HAL_DRV_API_H diff --git a/packages/hal/common/current/include/generic-stub.h b/packages/hal/common/current/include/generic-stub.h --- a/packages/hal/common/current/include/generic-stub.h +++ b/packages/hal/common/current/include/generic-stub.h @@ -1,43 +1,57 @@ /* Definitions for the generic GDB remote stub * - * Copyright (c) 1997, 1998 Cygnus Solutions + * Copyright (c) 1997, 1998, 1999 Cygnus Solutions * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. + * The contents of this file are subject to the Cygnus eCos Public + * License Version 1.0 (the "License"); you may not use this file + * except in compliance with the License. You may obtain a copy of + * the License at http://sourceware.cygnus.com/ecos/ + * + * Software distributed under the License is distributed on an + * "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or + * implied. See the License for the specific language governing rights + * and limitations under the License. + * + * The Original Code is eCos - Embedded Cygnus Operating System, + * released September 30, 1998. The Initial Developer of the Original + * Code is Cygnus. Portions created by Cygnus are Copyright (C) 1998, 1999 + * Cygnus Solutions. All Rights Reserved. */ #ifndef GENERIC_STUB_H #define GENERIC_STUB_H -/* Two typedefs must be provided before including this file. +/* Three typedefs must be provided before including this file. target_register_t should correspond to the largest register value on this target processor. - regnames_t corresponds to a type representing a register number. */ + regnames_t corresponds to a type representing a register number. + uint32 must correspond to at least a 32-bit unsigned integer type + (it may be larger). */ #ifndef ASM -struct gdb_packet; - -/* Set the current serial port being used for stub I/O to PORT. */ -extern void __set_serial_port (int port); - -/* Set the baud rate for the current serial port. */ -extern void __set_baud_rate (int baud); +#ifndef __ECOS__ +#include "dbg-serial.h" +#endif // __ECOS__ -/* Write C to the current serial port. */ -extern void putDebugChar (int c); - -/* Read one character from the current serial port. */ -extern int getDebugChar (void); - -/* Push CH back onto the debug stream. */ -extern void ungetDebugChar (int ch); +struct gdb_packet +{ + /* The checksum calculated so far. */ + uint32 checksum; + /* The checksum we've received from the remote side. */ + uint32 xmitcsum; + /* Contents of the accumulated packet. */ + char *contents; + /* Number of characters received. */ + uint32 length; + /* + * state is the current state: + * 0 = looking for start of packet + * 1 = got start of packet, looking for # terminator + * 2 = looking for first byte of checksum + * 3 = looking for second byte of checksum (indicating end of packet) + */ + char state; +}; /* Return the currently-saved value corresponding to register REG. */ extern target_register_t get_register (regnames_t reg); @@ -66,8 +80,8 @@ extern void initHardware (void); /* Skip the current instruction. */ extern void __skipinst (void); -/* If the breakpoint we hit is in the breakpoint() instruction, return a - non-zero value. */ +/* If the address in the PC register corresponds to the breakpoint() + instruction, return a non-zero value. */ extern int __is_breakpoint_function (void); /* Execute a breakpoint instruction. Restarting will cause the instruction @@ -83,14 +97,30 @@ extern void __switch_to_stub (void); /* Send an exit packet containing the specified status. */ extern void __send_exit_status (int status); -/* Copy COUNT bytes of memory from SRC to DST. A non-zero value will be - returned if a memory fault occurs during the copy. */ -extern int __read_mem_safe (unsigned char *buf, target_register_t addr, int count); -extern int __write_mem_safe (unsigned char *buf, target_register_t addr, int count); +/* Copy COUNT bytes of memory from ADDR to BUF. + ADDR is assumed to live in the user program's space. + Returns number of bytes successfully read + (caller must check to see if less than requested). */ +extern int __read_mem_safe (unsigned char *buf, + target_register_t addr, + int count); -/* Reset the board. */ -extern void __reset (void); +/* Copy COUNT bytes of memory from BUF to ADDR. + ADDR is assumed to live in the user program's space. + Returns number of bytes successfully read + (caller must check to see if less than requested). */ +extern int __write_mem_safe (unsigned char *buf, + target_register_t addr, + int count); +/* Set to a non-zero value if a memory fault occurs while + __set_mem_fault_trap () is running. */ +extern volatile int __mem_fault; + +#ifndef __ECOS__ +#if 1 +#include "stub-tservice.h" /* target dependent stub services */ +#else /* Flush the instruction cache. */ extern void flush_i_cache (void); @@ -107,15 +137,16 @@ extern int __instruction_cache (cache_co /* Perform the specified operation on the data cache. Returns 1 if the cache is enabled, 0 otherwise. */ extern int __data_cache (cache_control_t request); +#endif +#endif // __ECOS__ /* Write the 'T' packet in BUFFER. SIGVAL is the signal the program received. */ - extern void __build_t_packet (int sigval, char *buffer); /* Return 1 when a complete packet has been received, 0 if the packet is not yet complete, or -1 if an erroneous packet was NAKed. */ -int __add_char_to_packet (int character, struct gdb_packet *packet); +int __add_char_to_packet (unsigned character, struct gdb_packet *packet); typedef int (*__PFI)(int); typedef void (*__PFV)(void); @@ -126,31 +157,112 @@ typedef void (*__PFV)(void); register values; a non-zero value indicates that the exception handler should be reinvoked. */ extern volatile __PFI __process_exception_vec; + +/* __process_exit_vec is invoked when a 'k' kill packet is received + from GDB. */ extern volatile __PFV __process_exit_vec; + +/* If SIGSYSCALL is defined, and such a signal value is returned from + __computeSignal (), the function pointed to by this vector will + be invoked. + + If the return value is negative, the user program is assumed to + have received the corresponding positive signal value, and an + exception will be processed. Otherwise, the user program is + restarted from the next instruction. */ extern volatile __PFI __process_syscall_vec; + +/* A continue packet was received from GDB with a signal value. The function + pointed to by __process_signal_vec will be invoked with this signal + value. + + If a zero value is returned, we will ignore the signal, and proceed + with the continue request. Otherwise, the program will be killed + with the signal. */ extern volatile __PFI __process_signal_vec; -extern volatile __PFI __interruptible_control; + +/* If non-NULL, __init_vec is called right before the user program is + resumed. */ +extern volatile __PFV __init_vec; +/* if non-NULL, __cleanup_vec is called after the user program takes + an exception. */ +extern volatile __PFV __cleanup_vec; /* Send an 'O' packet to GDB containing STR. */ -extern int __output_gdb_string (const char *str, int string_len); +extern int __output_gdb_string (target_register_t addr, int string_len); /* Request MAXLEN bytes of input from GDB to be stored in DEST. If BLOCK is set, GDB should block until MAXLEN bytes are available to be read; otherwise, it will return immediately with whatever data is available. The return value is the number of bytes written into DEST. */ -extern int __get_gdb_input (char *dest, int maxlen, int block); +extern int __get_gdb_input (target_register_t dest, int maxlen, int block); -/* Choose which tty port should be used for GDB debugging. Note that this - function is completely target-dependent; it may do nothing at all. */ -extern void __setTty (int which); - -/* Return which port is currently being used for debugging. */ -extern int __getTty (void); - +/* Return the ASCII equivalent of C (C>=0 && C<=15). The result will be + lower-case. */ extern char __tohex (int c); -unsigned char * __mem2hex (unsigned char *mem, unsigned char *dest, int count, int may_fault); +/* Convert COUNT bytes of the memory region in MEM to a hexadecimal + string in DEST. + The resulting string will contain 2*COUNT characters. + If MAY_FAULT is non-zero, memory faults are trapped; if a fault occurs, + a NULL value will be returned. + The value returned is one byte past the end of the string written. */ +extern char *__mem2hex (char *mem, char *dest, int count, int may_fault); + +/* Given a hexadecimal string in MEM, write the equivalent bytes to DEST. + The string is assumed to contain 2*COUNT characters. + If MAY_FAULT is non-zero, memory faults are trapped; if a fault occurs, + a NULL value will be returned. + Otherwise, the value returned is one byte past the last byte written. */ +extern char *__hex2mem (char *buf, char *mem, int count, int may_fault); + +/* Set the program arguments passed into the user program's main */ +extern void __set_program_args (int argc, char **argv); + +/* Return the user program arguments passed in from GDB (via an 'A' + packet). argcPtr is a pointer into the user program, which will hold + the number of arguments; the strings are returned. */ +extern char **__get_program_args (target_register_t argcPtr); + +/* Encode PACKET as a remote protocol packet and send it to GDB; this takes + care of sending the initial '$' character, as well as the trailing '#' + and checksum, and also waits for an ACK from the remote side, resending + as necessary. */ +extern void __putpacket (char *packet); + +/* Convert the hexadecimal string pointed to by *PTR into an integer, + and store it in the value pointed to by INTVALUE. The number of + characters read from *PTR will be returned; *PTR will point to the first + non-hexadecmial character encountered. */ +extern unsigned int __hexToInt (char **ptr, target_register_t *intValue); + +/* Convert the value in INTVALUE into a string of hexadecimal + characters stored in PTR. NUMBITS are the number of bits to use + in INTVALUE. The number of characters written to PTR will be returned. */ +extern unsigned int __intToHex (char *ptr, + target_register_t intValue, + int numBits); + +/* Handle an exception, usually some sort of hardware or software trap. + This is responsible for communicating the exception to GDB. */ +extern void __handle_exception (void); + +/* Send a 'X' packet with signal SIGVAL to GDB. */ +extern void __kill_program (int sigval); + +/* Given a packet pointed to by PACKETCONTENTS, decode it and respond to + GDB appropriately. */ +extern int __process_packet (char *packetContents); + +/* Write the C-style string pointed to by STR to the GDB comm port. + Used for printing debug messages. */ +extern void __putDebugStr (char *str); + +#ifdef NO_MALLOC +#define MAX_BP_NUM 64 /* Maximum allowed # of breakpoints */ #endif -#endif +#endif /* ASM */ + +#endif /* GENERIC_STUB_H */ diff --git a/packages/hal/common/current/include/hal_stub.h b/packages/hal/common/current/include/hal_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/include/hal_stub.h @@ -0,0 +1,204 @@ +#ifndef CYGONCE_HAL_HAL_STUB_H +#define CYGONCE_HAL_HAL_STUB_H + +//============================================================================= +// +// hal_stub.h +// +// HAL header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Generic HAL stub header. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#define USE_GDBSTUB_PROTOTYPES 0 // avoid stub-tservice.h atm +#define __ECOS__ // use to mark eCos hacks + +#include // HAL_LABEL_NAME +#include // HAL header +#include +typedef cyg_uint32 uint32; + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +//----------------------------------------------------------------------------- +// Definitions for generic-stub.c + +#define __set_mem_fault_trap(x) ({__mem_fault = 0; x(); __mem_fault;}) + +//---------------------------------------------------------------------------- +// Signal definitions to avoid 'signal.h'/ +#define SIGHUP 1 /* hangup */ +#define SIGINT 2 /* interrupt */ +#define SIGQUIT 3 /* quit */ +#define SIGILL 4 /* illegal instruction (not reset when caught) */ +#define SIGTRAP 5 /* trace trap (not reset when caught) */ +#define SIGIOT 6 /* IOT instruction */ +#define SIGABRT 6 /* used by abort, replace SIGIOT in the future */ +#define SIGEMT 7 /* EMT instruction */ +#define SIGFPE 8 /* floating point exception */ +#define SIGKILL 9 /* kill (cannot be caught or ignored) */ +#define SIGBUS 10 /* bus error */ +#define SIGSEGV 11 /* segmentation violation */ +#define SIGSYS 12 /* bad argument to system call */ +#define SIGPIPE 13 /* write on a pipe with no one to read it */ +#define SIGALRM 14 /* alarm clock */ +#define SIGTERM 15 /* software termination signal from kill */ + +//---------------------------------------------------------------------------- +// Thread support. This setting is used in thread-pkts.h +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#define DEBUG_THREADS 1 +#else +#define DEBUG_THREADS 0 +#endif + +// The function stub_copy_registers() is statically defined in +// thread-packets.c, but in eCos this external stub is defined as it +// is used in dbg_gdb.cxx. +externC void __stub_copy_registers(target_register_t *dest, + target_register_t *src); + +//---------------------------------------------------------------------------- +// Memory accessor functions. +#define TARGET_HAS_OWN_MEM_FUNCS + +//---------------------------------------------------------------------------- +// Target extras?! +extern int __process_target_query(char * pkt, char * out, int maxOut); +extern int __process_target_set(char * pkt, char * out, int maxout); +extern int __process_target_packet(char * pkt, char * out, int maxout); + +//--------------------------------------------------------------------------- +// Declarations to avoid compiler warnings. + +// Set the baud rate for the current serial port. +extern void __set_baud_rate (int baud); + +// Write C to the current serial port. +extern void putDebugChar (int c); + +// Read one character from the current serial port. +extern int getDebugChar (void); + +// Push CH back onto the debug stream. +extern void ungetDebugChar (int ch); + +// Reset the board. +extern void __reset (void); + +// Multi-bp support. +extern int __set_breakpoint (target_register_t addr); +extern int __remove_breakpoint (target_register_t addr); + +/* Install the standard set of trap handlers for the stub. */ +extern void __install_traps (void); + +/* Address in text section of a breakpoint instruction. */ + +extern void CYG_LABEL_NAME(breakinst) (void); + +/* The opcode for a breakpoint instruction. */ + +extern unsigned long __break_opcode (void); + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +extern void cyg_hal_gdb_interrupt (target_register_t pc); +extern int cyg_hal_gdb_remove_break (target_register_t pc); +#endif + +//---------------------------------------------------------------------------- +// eCos extensions to the stub + +extern void hal_output_gdb_string(target_register_t str, int string_len); + +extern target_register_t registers[]; // The current saved registers. +extern target_register_t * _registers ; +extern HAL_SavedRegisters *_hal_registers; + +extern int cyg_hal_gdb_break; + +//--------------------------------------------------------------------------- +// Local strcpy/strlen functions removes libc dependency. +static inline char *strcpy( char *s, const char *t) +{ + char *r = s; + + while( *t ) *s++ = *t++; + + // Terminate the copied string. + *s = 0; + + return r; +} + +static inline int strlen( const char *s ) +{ + int r = 0; + while( *s++ ) r++; + return r; +} + +//----------------------------------------------------------------------------- +// Repeat the cache definitions here to avoid too much hackery in +// generic-stub.h +typedef enum { + CACHE_NOOP, CACHE_ENABLE, CACHE_DISABLE, CACHE_FLUSH +} cache_control_t; + +/* Perform the specified operation on the instruction cache. + Returns 1 if the cache is enabled, 0 otherwise. */ +extern int __instruction_cache (cache_control_t request); +/* Perform the specified operation on the data cache. + Returns 1 if the cache is enabled, 0 otherwise. */ +extern int __data_cache (cache_control_t request); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_HAL_STUB_H +// End of hal_stub.h diff --git a/packages/hal/common/current/include/pkgconf/hal.h b/packages/hal/common/current/include/pkgconf/hal.h --- a/packages/hal/common/current/include/pkgconf/hal.h +++ b/packages/hal/common/current/include/pkgconf/hal.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_H // ==================================================================== // -// pkgconf/hal.h +// pkgconf/hal.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-29 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): nickg, jskov +// Contributors: nickg, jskov, +// jlarmour +// Date: 1999-01-21 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### @@ -66,7 +67,7 @@ select one target architecture and one platform for that architecture. There are also a number of configuration options that are common to all HAL packages." - doc ref/ecos-ref/the-ecos-hardware-abstraction-layer-hal.html + doc ref/ecos-ref/the-ecos-hardware-abstraction-layer-hal.html } }}CFG_DATA */ @@ -271,6 +272,26 @@ }}CFG_DATA */ #define CYGPKG_HAL_EXCEPTIONS +/* {{CFG_DATA + + cdl_option CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG { + display "Stop calling constructors early" + description "This option supports environments where some constructors + must be run in the context of a thread rather than at + simple system startup time. A boolean flag named + cyg_hal_stop_constructors is set to 1 when constructors + should no longer be invoked. It is up to some other + package to deal with the rest of the constructors. + In the current version this is only possible with the + C library." + type boolean + requires CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS + parent CYGPKG_HAL_COMMON + } + + }}CFG_DATA */ + +#undef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG /* --------------------------------------------------------------------- * Options related to source-level debugging and diagnostics. @@ -293,7 +314,8 @@ requires !CYGPKG_HAL_POWERPC_SIM requires !CYGPKG_HAL_MN10300_SIM requires !CYGPKG_HAL_TX39_SIM - requires !CYGPKG_HAL_MN10300_STDEVAL1 + requires !CYGPKG_HAL_I386_LINUX + requires !CYGPKG_HAL_SPARCLITE description " This option causes a set of GDB stubs to be included into the system. On some target systems the GDB support will be @@ -303,6 +325,19 @@ itself." } + cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + display "Include GDB external break support" + parent CYGPKG_HAL_DEBUG + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires !CYGPKG_HAL_TX39_JMR3904 + requires !CYGPKG_HAL_POWERPC_FADS + description " + This option causes the GDB stub to add a serial interrupt handler + which will listen for GDB break packets. This lets you stop the + target asynchronously when using GDB, usually by hitting Control+C + or pressing the STOP button." + } + cdl_option CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT { display "Include GDB multi-threading debug support" parent CYGPKG_HAL_DEBUG @@ -312,23 +347,10 @@ to support multi-threaded source level debugging." } - cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { - display "Include GDB external break support" - parent CYGPKG_HAL_DEBUG - requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - description " - This option causes the GDB stub to add a serial interrupt handler - which will listen for GDB break packets. This lets you stop the - target asynchronously when using GDB, usually by hitting Control+C - or pressing the STOP button." - } - - }}CFG_DATA */ -#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - +#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT #define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT /* @@ -383,31 +405,6 @@ * tool; they are NOT user configuration, and you should NOT edit them. */ -/* - * Initialization options. - * - * WARNING: this option should not be enabled by end users. It - * makes use of an experimental facility in g++ which has not been - * generally distributed. - * - * The USE_INIT_PRIORITY option enables the use of the g++ init_priority - * attribute which allows the order of execution of constructors of - * static objects to be controlled. This option is not yet required by - * the current kernel, but it will be required by future versions. - */ - -#undef CYG_KERNEL_USE_INIT_PRIORITY - -#ifdef CYG_HAL_TX39 -#define CYG_KERNEL_USE_INIT_PRIORITY -#endif -#ifdef CYG_HAL_MN10300 -#define CYG_KERNEL_USE_INIT_PRIORITY -#endif -#ifdef CYG_HAL_POWERPC -#define CYG_KERNEL_USE_INIT_PRIORITY -#endif - /* * CYG_HAL_ and CYG_HAL__ are generated by * pkgconf, using the information from the targets file. @@ -422,10 +419,17 @@ #endif #ifdef CYG_HAL_POWERPC_COGENT -# define CYG_HAL_POWERPC_MP860 +# define CYG_HAL_POWERPC_MPC8xx +# define CYG_HAL_POWERPC_MPC860 +# undef CYG_HAL_POWERPC_MPC850 +# undef CYG_HAL_POWERPC_MPC823 +#endif +#ifdef CYG_HAL_POWERPC_FADS +# define CYG_HAL_POWERPC_MPC8xx +# define CYG_HAL_POWERPC_MPC860 #endif #ifdef CYG_HAL_POWERPC_SIM -# define CYG_HAL_POWERPC_MP860 +# define CYG_HAL_POWERPC_MPC603 #endif #ifdef CYG_HAL_TX39_JMR3904 @@ -439,6 +443,9 @@ # define CYG_HAL_MIPS_TX39 # define CYG_HAL_MIPS_SIM #endif +#ifdef CYG_HAL_MIPS_TX39 +#include +#endif /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_H */ diff --git a/packages/hal/common/current/src/PKGconf.mak b/packages/hal/common/current/src/PKGconf.mak --- a/packages/hal/common/current/src/PKGconf.mak +++ b/packages/hal/common/current/src/PKGconf.mak @@ -1,10 +1,10 @@ -#=============================================================================== +#============================================================================== # # makefile # # hal/common/src # -#=============================================================================== +#============================================================================== #####COPYRIGHTBEGIN#### # # ------------------------------------------- @@ -22,21 +22,31 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### -#=============================================================================== +#============================================================================== PACKAGE := hal include ../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := generic-stub.c thread-packets.c +COMPILE := generic-stub.c thread-packets.c hal_stub.c drv_api.c OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := +OTHER_TARGETS := libextras.stamp +OTHER_DEPS := hal_dummy.d +OTHER_CLEAN := libextras.clean include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src +.PHONY: libextras.clean + +libextras.stamp: hal_dummy.o + $(AR) crs $(PREFIX)/lib/libextras.a $< + @$(TOUCH) $@ + +libextras.clean: + $(RM) hal_dummy.o + $(RM) libextras.stamp diff --git a/packages/hal/common/current/src/board.h b/packages/hal/common/current/src/board.h new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/src/board.h @@ -0,0 +1,56 @@ +#ifndef CYGONCE_HAL_BOARD_H +#define CYGONCE_HAL_BOARD_H + +//============================================================================= +// +// board.h +// +// libstub board.h file for eCos HAL +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: libstub board.h file for eCos HAL +// Description: This file simplifies libstub integration. The board.h file +// for eCos simply includes the hal_stub.h file which defines +// the necessary architecture and platform information for +// any of the possible eCos target configurations. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +// Define __ECOS__; allows all eCos specific additions to be easily identified. +#define __ECOS__ + +#include + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BOARD_H +// End of board.h diff --git a/packages/hal/common/current/src/drv_api.c b/packages/hal/common/current/src/drv_api.c new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/src/drv_api.c @@ -0,0 +1,706 @@ +//========================================================================== +// +// drv_api.c +// +// Driver API for non-kernel configurations +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Nick Garnett +// Date: 1999-02-24 +// Purpose: Driver API for non-kernel configurations +// Description: These functions are used to support drivers when the kernel +// is not present. +// +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#ifndef CYGPKG_KERNEL + +#include +#include +#include + +#include +#include + +#include +#include + +//-------------------------------------------------------------------------- +// Statics + +static volatile cyg_int32 isr_disable_counter; // ISR disable counter + +volatile cyg_int32 dsr_disable_counter asm("cyg_scheduler_sched_lock"); // DSR disable counter + +static volatile cyg_interrupt *dsr_list; // List of pending DSRs + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + +cyg_interrupt *chain_list[CYGNUM_HAL_ISR_COUNT]; + +#endif + +//-------------------------------------------------------------------------- +// DSR handling functions. +// post_dsr() places a DSR on the list of DSRs to be called. +// call_dsrs() calls the DSRs. + +static void post_dsr( cyg_interrupt *intr ) +{ + CYG_INTERRUPT_STATE old_intr; + + CYG_REPORT_FUNCTION(); + + HAL_DISABLE_INTERRUPTS(old_intr); + + if( intr->dsr_count++ == 0 ) + { + intr->next_dsr = dsr_list; + dsr_list = intr; + } + + HAL_RESTORE_INTERRUPTS(old_intr); + + CYG_REPORT_RETURN(); +} + +static void call_dsrs(void) +{ + CYG_REPORT_FUNCTION(); + + while( dsr_list != NULL ) + { + volatile cyg_interrupt *intr; + cyg_int32 count; + CYG_INTERRUPT_STATE old_intr; + + HAL_DISABLE_INTERRUPTS(old_intr); + + intr = dsr_list; + dsr_list = intr->next_dsr; + count = intr->dsr_count; + intr->dsr_count = 0; + + HAL_RESTORE_INTERRUPTS(old_intr); + + intr->dsr( intr->vector, count, (CYG_ADDRWORD)intr->data ); + } + + CYG_REPORT_RETURN(); + +} + +//-------------------------------------------------------------------------- +// Interrupt end function called from HAL VSR to tidy up. This is where +// DSRs will be called if necessary. + +externC void +interrupt_end( + cyg_uint32 isr_ret, + cyg_interrupt *intr, + HAL_SavedRegisters *regs + ) +{ + CYG_REPORT_FUNCTION(); + +#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + + // Only do this if we are in a non-chained configuration. + // If we are chained, then chain_isr will do the DSR + // posting. + + if( isr_ret & CYG_ISR_CALL_DSR && intr != NULL ) post_dsr(intr); + +#endif + + if( dsr_disable_counter == 0 ) call_dsrs(); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// ISR for handling chained interrupts. + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + +cyg_uint32 chain_isr(cyg_vector_t vector, CYG_ADDRWORD data) +{ + CYG_REPORT_FUNCTION(); + + cyg_interrupt *p = *(cyg_interrupt **)data; + + while( p != NULL ) + { + if( p->vector == vector ) + { + register cyg_uint32 isr_ret = p->isr(vector, p->data); + + if( isr_ret & CYG_ISR_CALL_DSR ) post_dsr(p); + + if( isr_ret & CYG_ISR_HANDLED ) break; + } + + p = p->next; + } + + CYG_REPORT_RETURN(); + + return 0; +} + +#endif + +//-------------------------------------------------------------------------- +// ISR lock. This disables interrupts and keeps a count of the number +// times it has been called. + +externC void cyg_drv_isr_lock() +{ + CYG_INTERRUPT_STATE dummy; + + CYG_REPORT_FUNCTION(); + + HAL_DISABLE_INTERRUPTS(dummy); + + CYG_ASSERT( isr_disable_counter >= 0 , "Disable counter negative"); + + isr_disable_counter++; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Unlock ISRs. This decrements the count and re-enables interrupts if it +// goes zero. + +externC void cyg_drv_isr_unlock() +{ + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( isr_disable_counter > 0 , "Disable counter not greater than zero"); + + isr_disable_counter--; + + if ( isr_disable_counter == 0 ) + { + HAL_ENABLE_INTERRUPTS(); + } + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Lock DSR lock. Simply increment the counter. + +externC void cyg_drv_dsr_lock() +{ + CYG_REPORT_FUNCTION(); + + dsr_disable_counter++; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Unlock DSR lock. If the counter is about to go zero, call any pending +// DSRs and then zero the counter. + +externC void cyg_drv_dsr_unlock() +{ + CYG_REPORT_FUNCTION(); + + do + { + if( dsr_disable_counter == 1 ) + { + call_dsrs(); + } + + HAL_REORDER_BARRIER(); + + dsr_disable_counter = 0; + + HAL_REORDER_BARRIER(); + + // Check that no DSRs have been posted between calling + // call_dsrs() and zeroing dsr_disable_counter. If so, + // loop back and call them. + + if( dsr_list != NULL ) + { + dsr_disable_counter = 1; + continue; + } + + CYG_REPORT_RETURN(); + + return; + + } while(1); + + CYG_FAIL( "Should not be executed" ); +} + +//-------------------------------------------------------------------------- +// Initialize a mutex. + +externC void cyg_drv_mutex_init( cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + mutex->lock = 0; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Destroy a mutex. + +externC void cyg_drv_mutex_destroy( cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + mutex->lock = -1; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Lock a mutex. We check that we are not trying to lock a locked or +// destroyed mutex and if not, set it locked. + +externC cyg_bool_t cyg_drv_mutex_lock( cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( mutex->lock == 0 , "Trying to lock locked mutex"); + + mutex->lock = 1; + + CYG_REPORT_RETURN(); + + return true; +} + +//-------------------------------------------------------------------------- +// Attempt to claim a mutex, and return if it cannot be. + +externC cyg_bool_t cyg_drv_mutex_trylock( cyg_drv_mutex_t *mutex ) +{ + cyg_bool_t result = true; + + CYG_REPORT_FUNCTION(); + + if( mutex->lock == 1 ) result = false; + + CYG_REPORT_RETURN(); + + return result; +} + +//-------------------------------------------------------------------------- +// Unlock a mutex. We check that the mutex is actually locked before doing +// this. + +externC void cyg_drv_mutex_unlock( cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( mutex->lock == 1 , "Trying to unlock unlocked mutex"); + + mutex->lock = 0; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Release all threads waiting for the mutex. +// This is really for threads, so we do nothing here. + +externC void cyg_drv_mutex_release( cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Initialized a condition variable. + +externC void cyg_drv_cond_init( cyg_drv_cond_t *cond, cyg_drv_mutex_t *mutex ) +{ + CYG_REPORT_FUNCTION(); + + cond->wait = 0; + cond->mutex = mutex; + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Destroy a condition variable. + +externC void cyg_drv_cond_destroy( cyg_drv_cond_t *cond ) +{ + CYG_REPORT_FUNCTION(); + + cond->wait = -1; + cond->mutex = NULL; + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Wait for a condition variable to be signalled. We simply busy wait +// polling the condition variable's wait member until a DSR sets it to +// 0. Note that the semantics of condition variables means that the +// wakeup only happens if there is a thread actually waiting on the CV +// when the signal is sent. + +externC void cyg_drv_cond_wait( cyg_drv_cond_t *cond ) +{ + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( cond->mutex != NULL, "Uninitialized condition variable"); + CYG_ASSERT( cond->mutex->lock, "Mutex not locked"); + + cyg_drv_dsr_lock(); + + cond->wait = 1; + + while( cond->wait == 1 ) + { + // While looping we call call_dsrs() to service any DSRs that + // get posted. One of these will make the call to cond_signal + // to break us out of this loop. If we do not have the DSR + // lock claimed, then a race condition could occur and keep us + // stuck here forever. + + call_dsrs(); + } + + cyg_drv_dsr_unlock(); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Signal a condition variable. This sets the wait member to zero, which +// has no effect when there is no waiter, but will wake up any waiting +// thread. + +externC void cyg_drv_cond_signal( cyg_drv_cond_t *cond ) +{ + CYG_REPORT_FUNCTION(); + + cond->wait = 0; + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Broadcast to condition variable. This is exactly the same a signal since +// there can only be one waiter. + +externC void cyg_drv_cond_broadcast( cyg_drv_cond_t *cond ) +{ + CYG_REPORT_FUNCTION(); + + cond->wait = 0; + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Create an interrupt object. + +externC void cyg_drv_interrupt_create( + cyg_vector_t vector, + cyg_priority_t priority, + cyg_addrword_t data, + cyg_ISR_t *isr, + cyg_DSR_t *dsr, + cyg_handle_t *handle, + cyg_interrupt *intr + ) +{ + CYG_REPORT_FUNCTION(); + + intr->vector = vector; + intr->priority = priority; + intr->isr = isr; + intr->dsr = dsr; + intr->data = data; + intr->next_dsr = NULL; + intr->dsr_count = 0; + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + + intr->next = NULL; + +#endif + + *handle = (cyg_handle_t)intr; + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Delete an interrupt object. This merely ensures that it is detached from +// the vector. + +externC void cyg_drv_interrupt_delete( cyg_handle_t interrupt ) +{ + CYG_REPORT_FUNCTION(); + + cyg_drv_interrupt_detach( interrupt ); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// + +externC void cyg_drv_interrupt_attach( cyg_handle_t interrupt ) +{ + cyg_interrupt *intr = (cyg_interrupt *)interrupt; + + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( intr->vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( intr->vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_SET_LEVEL( intr->vector, intr->priority ); + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + + CYG_ASSERT( intr->next == NULL , "cyg_interrupt already on a list"); + + cyg_uint32 index; + + HAL_TRANSLATE_VECTOR( intr->vector, index ); + + if( chain_list[index] == NULL ) + { + // First Interrupt on this chain, just assign it and register + // the chain_isr with the HAL. + + chain_list[index] = intr; + + HAL_INTERRUPT_ATTACH( intr->vector, chain_isr, &chain_list[index], NULL ); + } + else + { + // There are already interrupts chained, add this one into the + // chain in priority order. + + Cyg_Interrupt **p = &chain_list[index]; + + while( *p != NULL ) + { + cyg_interrupt *n = *p; + + if( n->priority < intr->priority ) break; + + p = &n->next; + } + next = *p; + *p = intr; + } + +#else + + HAL_INTERRUPT_ATTACH( intr->vector, intr->isr, intr->data, intr ); + +#endif + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Detach an interrupt from its vector. + +externC void cyg_drv_interrupt_detach( cyg_handle_t interrupt ) +{ + cyg_interrupt *intr = (cyg_interrupt *)interrupt; + + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( intr->vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( intr->vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + + // Remove the interrupt object from the vector chain. + + cyg_uint32 index; + + HAL_TRANSLATE_VECTOR( vector, index ); + + cyg_interrupt **p = &chain_list[index]; + + while( *p != NULL ) + { + cyg_interrupt *n = *p; + + if( n == intr ) + { + *p = intr->next; + break; + } + + p = &n->next; + } + + // If this was the last one, detach the vector. + + if( chain_list[index] == NULL ) + HAL_INTERRUPT_DETACH( intr->vector, chain_isr ); + +#else + + HAL_INTERRUPT_DETACH( intr->vector, intr->isr ); + +#endif + + CYG_REPORT_RETURN(); +} + + +//-------------------------------------------------------------------------- +// Mask delivery of an interrupt at the interrupt controller. + +externC void cyg_drv_interrupt_mask( cyg_vector_t vector ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("vector=%d", vector); + + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_MASK( vector ); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Unmask delivery of an interrupt at the interrupt controller. + +externC void cyg_drv_interrupt_unmask( cyg_vector_t vector ) +{ + CYG_REPORT_FUNCTION(); + + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_UNMASK( vector ); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Acknowledge an interrupt at the controller to allow another interrupt +// to be delivered. + +externC void cyg_drv_interrupt_acknowledge( cyg_vector_t vector ) +{ +// CYG_REPORT_FUNCTION(); + + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_ACKNOWLEDGE( vector ); + +// CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Configure interrupt detection parameters. + +externC void cyg_drv_interrupt_configure( + cyg_vector_t vector, + cyg_bool_t level, + cyg_bool_t up + ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG3("vector = %d, level = %d, up = %d", vector, level, + up); + + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_CONFIGURE( vector, level, up ); + + CYG_REPORT_RETURN(); +} + +//-------------------------------------------------------------------------- +// Configure interrupt priority level. + +externC void cyg_drv_interrupt_level( cyg_vector_t vector, cyg_priority_t level ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG2("vector = %d, level = %d", vector, level); + + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); + + HAL_INTERRUPT_SET_LEVEL( vector, level ); + + CYG_REPORT_RETURN(); +} + + +// ------------------------------------------------------------------------- +// Exception delivery function called from the HAL as a result of a +// hardware exception being raised. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ) +{ + CYG_FAIL(" !!! Exception !!! "); +} + + +#endif + +//-------------------------------------------------------------------------- +// EOF drv_api.c diff --git a/packages/hal/common/current/src/dummy.c b/packages/hal/common/current/src/dummy.c new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/src/dummy.c @@ -0,0 +1,43 @@ +//========================================================================== +// +// dummy.c +// +// Guarantee the existence of libextras.a +// +//========================================================================== +//###COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.cygnus.com. +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos code, released September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): bartv +// Contributors: bartv +// Date: 1999-04-16 +// +//####DESCRIPTIONEND#### +//========================================================================== + + +// This file should contain no code or data. Its sole purpose is to +// be compiled to an empty object file and placed into libtarget.a, +// thus ensuring that that file actually exists. This simplifies +// life elsewhere. diff --git a/packages/hal/common/current/src/generic-stub.c b/packages/hal/common/current/src/generic-stub.c --- a/packages/hal/common/current/src/generic-stub.c +++ b/packages/hal/common/current/src/generic-stub.c @@ -1,6 +1,26 @@ +#include "board.h" + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +/* Eventually, this should default to ON */ +#if USE_GDBSTUB_PROTOTYPES +#include "stub-tservice.h" +#include "generic-stub.h" +#else +// Function declarations (prevents compiler warnings) +int stubhex (unsigned char ch); +static void getpacket (char *buffer); +static void unlock_thread_scheduler (void); +static uint32 crc32 (unsigned char *ptr, int len, uint32 crc); +#endif + +#include "thread-pkts.h" + /* Defines function macros if thread support is not selected in board.h */ + + /**************************************************************************** - THIS SOFTWARE IS NOT COPYRIGHTED + THIS SOFTWARE IS NOT COPYRIGHTED HP offers the following for use in the public domain. HP makes no warranty with regard to the software or it's performance and the @@ -29,14 +49,14 @@ * * NOTES: See Below $ * - * Modified for SPARC by Stu Grossman, Cygnus Support. + * Modified for SPARC by Stu Grossman, Cygnus Solutions. * Modified for generic CygMON stub support by Bob Manson, Cygnus Solutions. * * To enable debugger support, two things need to happen. One, a - * call to set_debug_traps() is necessary in order to allow any breakpoints + * call to set_debug_traps () is necessary in order to allow any breakpoints * or error conditions to be properly intercepted and reported to gdb. * Two, a breakpoint needs to be generated to begin communication. This - * is most easily accomplished by a call to breakpoint(). Breakpoint() + * is most easily accomplished by a call to breakpoint (). Breakpoint () * simulates a breakpoint by executing a trap #1. * ************* @@ -61,8 +81,8 @@ * * ? What was the last sigval ? SNN (signal NN) * - * bBB..BB Set baud rate to BB..BB OK or BNN, then sets - * baud rate + * bBB..BB Set baud rate to BB..BB OK or BNN, then sets + * baud rate * * All commands and responses are sent with a packet which includes a * checksum. A packet consists of @@ -83,85 +103,37 @@ * ****************************************************************************/ -#include - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include - -#define SIGHUP 1 /* hangup */ -#define SIGINT 2 /* interrupt */ -#define SIGQUIT 3 /* quit */ -#define SIGILL 4 /* illegal instruction (not reset when caught) */ -#define SIGTRAP 5 /* trace trap (not reset when caught) */ -#define SIGIOT 6 /* IOT instruction */ -#define SIGABRT 6 /* used by abort, replace SIGIOT in the future */ -#define SIGEMT 7 /* EMT instruction */ -#define SIGFPE 8 /* floating point exception */ -#define SIGKILL 9 /* kill (cannot be caught or ignored) */ -#define SIGBUS 10 /* bus error */ -#define SIGSEGV 11 /* segmentation violation */ -#define SIGSYS 12 /* bad argument to system call */ -#define SIGPIPE 13 /* write on a pipe with no one to read it */ -#define SIGALRM 14 /* alarm clock */ -#define SIGTERM 15 /* software termination signal from kill */ - -#include // HAL header - -#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT -#define DEBUG_THREADS 1 // FIXME: put in header file? -#else -#define DEBUG_THREADS 0 // FIXME: put in header file? -#endif - -#define uint32 cyg_uint32 -#include "thread-pkts.h" +#ifndef __ECOS__ +#include +#include +#endif // __ECOS__ /************************************************************************/ /* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/ /* at least NUMREGBYTES*2 are needed for register packets */ #define BUFMAX 2048 +static int initialized = 0; /* !0 means we've been initialized */ + static int process_exception (int sigval); static void do_nothing (void); /* and do it gracefully */ static int syscall_do_nothing (int); -static void kill_program (int sigval); -static void process_query (char *pkt); -static void process_set (char *pkt); + +void __free_program_args (void); volatile __PFI __process_exception_vec = process_exception; volatile __PFV __process_exit_vec = do_nothing; volatile __PFI __process_syscall_vec = syscall_do_nothing; volatile __PFI __process_signal_vec = NULL; -volatile __PFI __interruptible_control = NULL; +volatile __PFV __init_vec = NULL; +volatile __PFV __cleanup_vec = NULL; + +static char *__add_program_arg (int argnum, uint32 arglen); static const char hexchars[] = "0123456789abcdef"; -extern target_register_t registers[]; /* The current saved registers */ -extern target_register_t * _registers ; -extern HAL_SavedRegisters *_hal_registers; - -int __process_target_query(char * pkt, char * out, int maxOut) -{ return 0 ; } -int __process_target_set(char * pkt, char * out, int maxout) -{ return 0 ; } -int __process_target_packet(char * pkt, char * out, int maxout) -{ return 0 ; } - - -/* Return the value corresponding to register REG of the active thread. */ -static target_register_t thread_get_register (regnames_t reg) -{ - return _registers[reg]; -} - - -/* Store VALUE in the register corresponding to WHICH of the active thread. */ -static void thread_put_register (regnames_t which, target_register_t value) -{ - _registers[which] = value; -} - +static void process_query (char *pkt); +static void process_set (char *pkt); char __tohex (int c) @@ -169,55 +141,12 @@ char return hexchars [c & 15]; } -target_register_t *__our_registers; +#define __tohex(c) hexchars[(c) & 15] #ifndef NUMREGS_GDB #define NUMREGS_GDB NUMREGS #endif -static char *strcpy( char *s, const char *t) -{ - char *r = s; - - while( *t ) *s++ = *t++; - - return r; -} - -static int strlen( const char *s ) -{ - int r = 0; - while( *s++ ) r++; - return r; -} - -// Use this function to disable serial interrupts whenever reply -// characters are expected from GDB. The reason we want to control -// whether the target can be interrupted or not is simply that GDB on -// the host will be sending acknowledge characters/commands while the -// stub is running - if serial interrupts were still active, the -// characters would never reach the (polling) getDebugChar. -static void -interruptible (int state) -{ - static int current_state = 0; - - if (__interruptible_control) { - if (state) { - current_state--; - if (0 >= current_state) { - current_state = 0; - __interruptible_control (1); - } - } else { - current_state++; - if (1 == current_state) - __interruptible_control (0); - } - } -} - - /* One pushback character. */ int ungot_char = -1; @@ -234,30 +163,11 @@ readDebugChar (void) return getDebugChar (); } -struct gdb_packet -{ - /* The checksum calculated so far. */ - int checksum; - /* The checksum we've received from the remote side. */ - int xmitcsum; - /* Contents of the accumulated packet. */ - char *contents; - /* Number of characters received. */ - int length; - /* - * state is the current state: - * 0 = looking for start of packet - * 1 = got start of packet, looking for # terminator - * 2 = looking for first byte of checksum - * 3 = looking for second byte of checksum (indicating end of packet) - */ - char state; -}; - /* Convert ch from a hex digit to an int. */ int -stubhex(unsigned char ch) +stubhex (ch) + unsigned char ch; { if (ch >= 'a' && ch <= 'f') return ch-'a'+10; @@ -269,49 +179,52 @@ stubhex(unsigned char ch) } static void -getpacket(char *buffer) +getpacket (buffer) + char *buffer; { struct gdb_packet packet; packet.state = 0; packet.contents = buffer; - while (__add_char_to_packet (readDebugChar () & 0x7f, &packet) != 1) + while (__add_char_to_packet (readDebugChar () & 0xff, &packet) != 1) { /* Empty */ } } int -__add_char_to_packet (int ch, struct gdb_packet *packet) +__add_char_to_packet (ch, packet) + unsigned int ch; + struct gdb_packet *packet; { if (packet->state == 0) { if (ch == '$') - { - packet->state = 1; - packet->length = 0; - packet->checksum = 0; - packet->xmitcsum = -1; - } + { + packet->state = 1; + packet->length = 0; + packet->checksum = 0; + packet->xmitcsum = -1; + } return 0; } if (packet->state == 1) { if (ch == '#') - { - packet->contents[packet->length] = 0; - packet->state = 2; - } + { + packet->contents[packet->length] = 0; + packet->state = 2; + } else - { - if (packet->length == BUFMAX) { - packet->state = 0; - return -1; - } - packet->checksum += ch; - packet->contents[packet->length++] = ch; - } + { + if (packet->length == BUFMAX) { + packet->state = 0; + return -1; + } + packet->checksum += ch; + packet->contents[packet->length++] = ch; + } return 0; } @@ -324,29 +237,29 @@ int if (packet->state == 3) { - packet->xmitcsum |= stubhex(ch); + packet->xmitcsum |= stubhex (ch); if ((packet->checksum & 255) != packet->xmitcsum) - { - putDebugChar ('-'); /* failed checksum */ - packet->state = 0; - return -1; - } + { + putDebugChar ('-'); /* failed checksum */ + packet->state = 0; + return -1; + } else - { - putDebugChar('+'); /* successful transfer */ - /* if a sequence char is present, reply the sequence ID */ - if (packet->contents[2] == ':') - { - int count = packet->length; - int i; - putDebugChar (packet->contents[0]); - putDebugChar (packet->contents[1]); - /* remove sequence chars from buffer */ - for (i=3; i <= count; i++) - packet->contents[i-3] = packet->contents[i]; - } - return 1; - } + { + putDebugChar ('+'); /* successful transfer */ + /* if a sequence char is present, reply the sequence ID */ + if (packet->contents[2] == ':') + { + uint32 count = packet->length; + uint32 i; + putDebugChar (packet->contents[0]); + putDebugChar (packet->contents[1]); + /* remove sequence chars from buffer */ + for (i=3; i <= count; i++) + packet->contents[i-3] = packet->contents[i]; + } + return 1; + } } /* We should never get here. */ packet->state = 0; @@ -355,15 +268,14 @@ int /* send the packet in buffer. */ -static void -putpacket(unsigned char *buffer) +void +__putpacket (buffer) + char *buffer; { unsigned char checksum; - int count; + uint32 count; unsigned char ch; - interruptible (0); - /* $#. */ do { @@ -372,11 +284,11 @@ putpacket(unsigned char *buffer) count = 0; while ((ch = buffer[count])) - { - putDebugChar (ch); - checksum += ch; - count += 1; - } + { + putDebugChar (ch); + checksum += ch; + count += 1; + } putDebugChar ('#'); putDebugChar (hexchars[(checksum >> 4) & 0xf]); @@ -384,8 +296,6 @@ putpacket(unsigned char *buffer) } while ((readDebugChar () & 0x7f) != '+'); - - interruptible (1); } static char remcomInBuffer[BUFMAX]; @@ -395,88 +305,245 @@ static char remcomOutBuffer[BUFMAX]; error. */ volatile int __mem_fault = 0; -static int -__copy_mem_safe (unsigned char *dst, unsigned char *src, int count) + +#ifndef TARGET_HAS_OWN_MEM_FUNCS +/* + * _target_readmem_hook / _target_writemem_hook: + * Allow target to get involved in reading/writing memory. + * + * If these hooks are defined by the target, they will be + * called for each user program memory access. Otherwise, the stub + * will simply dereference a pointer to access user program memory. + */ + +unsigned char (*_target_readmem_hook) (unsigned char* addr); +void (*_target_writemem_hook) (unsigned char* addr, + unsigned char value); + +static unsigned char +get_target_byte (volatile unsigned char *address) { - int res; + if (_target_readmem_hook) /* target needs to control memory access */ + return _target_readmem_hook ((unsigned char *) address); + else + return *address; +} + +static void +put_target_byte (volatile unsigned char *address, unsigned char value) +{ + if (_target_writemem_hook) /* target needs to control memory access */ + _target_writemem_hook ((unsigned char *) address, value); + else + *address = value; +} + +/* These are the "arguments" to __do_read_mem and __do_write_mem, + which are passed as globals to avoid squeezing them thru + __set_mem_fault_trap. */ + +static volatile target_register_t memCount; +static volatile unsigned char *memSrc, *memDst; - __set_mem_fault_trap (1); - while (count--) - *(dst++) = *(src++); - res = __mem_fault; - __set_mem_fault_trap (0); - return res ? 1 : 0; +/* + * __do_read_mem: + * Copy from target memory to trusted memory. + */ + +static void +__do_read_mem (void) +{ + __mem_fault = 0; + while (memCount) + { + unsigned char ch = get_target_byte (memSrc++); + + if (__mem_fault) + return; + *memDst++ = ch; + memCount--; + } } +/* + * __do_write_mem: + * Copy from trusted memory to target memory. + */ + +static void +__do_write_mem (void) +{ + __mem_fault = 0; + while (memCount) + { + unsigned char ch = *memSrc++; + + put_target_byte (memDst++, ch); + if (__mem_fault) + return; + memCount--; + } +} + +/* + * __read_mem_safe: + * Get contents of target memory, abort on error. + */ + int __read_mem_safe (unsigned char *dst, target_register_t src, int count) { - return __copy_mem_safe (dst, (unsigned char*) src, count); + memCount = count; + memSrc = (unsigned char *) src; + memDst = (unsigned char *) dst; + __set_mem_fault_trap (__do_read_mem); + return count - memCount; /* return number of bytes successfully read */ } +/* + * __write_mem_safe: + * Set contents of target memory, abort on error. + */ + int __write_mem_safe (unsigned char *src, target_register_t dst, int count) { - return __copy_mem_safe ((unsigned char*) dst, src, count); + memCount = count; + memSrc = (unsigned char *) src; + memDst = (unsigned char *) dst; + __set_mem_fault_trap (__do_write_mem); + return count - memCount; /* return number of bytes successfully read */ } -/* Convert the memory pointed to by mem into hex, placing result in buf. - * Return a pointer to the last char put in buf (null), in case of mem fault, - * return 0. +#endif /* TARGET_HAS_OWN_MEM_FUNCS */ + +/* These are the "arguments" to __mem2hex_helper and __hex2mem_helper, + which are passed as globals to avoid squeezing them thru + __set_mem_fault_trap. */ + +static int hexMemCount; +static char *hexMemSrc, *hexMemDst; +static int may_fault_mode; + +/* Hamburger helper? */ +static void +__mem2hex_helper (void) +{ + __mem_fault = 0; + while (hexMemCount-- > 0) + { + unsigned char ch; + + if (may_fault_mode) + __read_mem_safe (&ch, (target_register_t) (hexMemSrc++), 1); + else + ch = *(hexMemSrc++); + if (__mem_fault) + return; + *(hexMemDst++) = hexchars[(ch >> 4) & 0xf]; + if (__mem_fault) + return; + *(hexMemDst++) = hexchars[ch & 0xf]; + if (__mem_fault) + return; + } +} + +/* Convert the memory pointed to by MEM into HEX, placing result in BUF. + * Return a pointer to the last char put in buf (NUL). In case of a memory + * fault, return 0. * If MAY_FAULT is non-zero, then we will handle memory faults by returning - * a 0, else treat a fault like any other fault in the stub. + * a 0 (and assume that MEM is a pointer into the user program), else we + * treat a fault like any other fault in the stub (and assume that MEM is + * a pointer into the stub's memory). */ -unsigned char * -__mem2hex(mem, buf, count, may_fault) - unsigned char *mem; - unsigned char *buf; +char * +__mem2hex (mem, buf, count, may_fault) + char *mem; + char *buf; int count; int may_fault; { - unsigned char ch; - - __set_mem_fault_trap(may_fault); - - while (count-- > 0) + hexMemDst = (unsigned char *) buf; + hexMemSrc = (unsigned char *) mem; + hexMemCount = count; + may_fault_mode = may_fault; + + if (may_fault) { - ch = *mem++; - if (__mem_fault) - return 0; - *buf++ = hexchars[(ch >> 4) & 0xf]; - *buf++ = hexchars[ch & 0xf]; + if (__set_mem_fault_trap (__mem2hex_helper)) + return 0; } - - *buf = 0; + else + __mem2hex_helper (); - __set_mem_fault_trap(0); + *hexMemDst = 0; - return buf; + return (char *) hexMemDst; } -/* convert the hex array pointed to by buf into binary to be placed in mem - * return a pointer to the character AFTER the last byte written */ - -static char * -hex2mem(unsigned char *buf, unsigned char *mem, int count, int may_fault) +static void +__hex2mem_helper (void) { - int i; + target_register_t i; unsigned char ch; - __set_mem_fault_trap (may_fault); - - for (i=0; i> ((numBits - 1) * 8)); if (v || (numBits == 1)) - { - v = v & 255; - *(ptr++) = __tohex ((v / 16) & 15); - *(ptr++) = __tohex (v & 15); - numChars += 2; - } + { + v = v & 255; + *(ptr++) = __tohex ((v / 16) & 15); + *(ptr++) = __tohex (v & 15); + numChars += 2; + } numBits--; } return (numChars); } +#if DEBUG_THREADS +/* + * Kernel Thread Control + * + * If the current thread is set to other than zero (or minus one), + * then ask the kernel to lock it's scheduler so that only that thread + * can run. + */ + +static unsigned char did_lock_scheduler = 0; +static unsigned char did_disable_interrupts = 0; + +/* Pointer to "kernel call" for scheduler control */ +static int (*schedlock_fn) (int, int, long) = stub_lock_scheduler; + +/* Pointer to target stub call for disabling interrupts. + Target stub will initialize this if it can. */ +int (*__disable_interrupts_hook) (int); /* don't initialize here! */ +#endif + +static void +lock_thread_scheduler (int kind) /* "step" or "continue" */ +{ +#if DEBUG_THREADS + int ret = 0; + + /* GDB will signal its desire to run a single thread + by setting _gdb_cont_thread to non-zero / non-negative. */ + if (_gdb_cont_thread <= 0) + return; + + if (schedlock_fn) /* kernel call */ + ret = (*schedlock_fn) (1, kind, _gdb_cont_thread); + + if (ret == 1) + { + did_lock_scheduler = 1; + return; + } + + if (schedlock_fn == 0 || /* no kernel scheduler call */ + ret == -1) /* kernel asks stub to handle it */ + if (__disable_interrupts_hook) /* target stub has capability */ + if ((*__disable_interrupts_hook) (1)) + { + did_disable_interrupts = 1; + return; + } +#endif /* DEBUG_THREADS */ +} + +static void +unlock_thread_scheduler () +{ +#if DEBUG_THREADS + if (did_lock_scheduler) + if (schedlock_fn) /* kernel call */ + { + (*schedlock_fn) (0, 0, _gdb_cont_thread); + /* I could check the return value, but + what would I do if it failed??? */ + did_lock_scheduler = 0; + } + if (did_disable_interrupts) + if (__disable_interrupts_hook) /* target stub call */ + { + (*__disable_interrupts_hook) (0); + /* Again, I could check the return value, but + what would I do if it failed??? */ + did_disable_interrupts = 0; + } +#endif /* DEBUG_THREADS */ +} + void __handle_exception (void) { - void breakinst(void); int sigval; - interruptible (0); +#ifdef TARGET_HAS_NEXT_STEP + if (! __next_step_done ()) + { + __clear_breakpoints (); + __install_breakpoints (); + __single_step (); + return; + } +#endif - // Expand the HAL_SavedRegisters structure into the GDB register - // array format. - HAL_GET_GDB_REGISTERS (®isters[0], _hal_registers); - _registers = ®isters[0]; +#ifdef __ECOS__ + // We need to unpack the registers before they are accessed. + if (__cleanup_vec != NULL) + __cleanup_vec (); +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + // Special case for GDB BREAKs. This flag is set by cyg_stub_cleanup. + if (cyg_hal_gdb_break) { + cyg_hal_gdb_break = 0; + sigval = SIGINT; + } else +#endif + sigval = __computeSignal (__get_trap_number ()); +#else // __ECOS__ /* reply to host that an exception has occurred */ sigval = __computeSignal (__get_trap_number ()); +#endif // __ECOS__ if (__is_breakpoint_function ()) __skipinst (); -#if 0 //def SIGSYSCALL - if(sigval == SIGSYSCALL) +#ifndef __ECOS__ + if (__cleanup_vec != NULL) + __cleanup_vec (); +#endif // !__ECOS__ + + __clear_breakpoints (); + + /* Undo effect of previous single step. */ + unlock_thread_scheduler (); + __clear_single_step (); + +#ifdef SIGSYSCALL + if (sigval == SIGSYSCALL) { int val; /* Do the skipinst FIRST. */ +#ifndef SYSCALL_PC_AFTER_INST __skipinst (); +#endif val = __process_syscall_vec (__get_syscall_num ()); - if (val == 0) - return; - else if (val < 0) - sigval = -val; + if (val < 0) + sigval = -val; + else + sigval = 0; } #endif - while (__process_exception_vec (sigval)); - + /* Indirect function call to stub, cygmon monitor or other */ + if (sigval != 0) + { + while (__process_exception_vec (sigval)) + { + /* Empty! */ + } + } - // Compact register array again. - HAL_SET_GDB_REGISTERS (_hal_registers, ®isters[0]); + __install_breakpoints (); - interruptible (1); + if (__init_vec != NULL) + __init_vec (); } -static int -process_packet (char *packet) +/* + * _get_trace_register_hook: + * This function pointer will be non-zero if the trace component + * wants to intercept requests for register values. + * + * FIXME: evidently I need a new hook for large registers... + */ + +int (*_get_trace_register_hook) (regnames_t, target_register_t *); + +int +__process_packet (char *packet) { -//diag_printf("pkt %s\n",packet); + int is_binary = 0; remcomOutBuffer[0] = 0; switch (packet[0]) { case '?': { - int sigval = __computeSignal (__get_trap_number ()); - remcomOutBuffer[0] = 'S'; - remcomOutBuffer[1] = hexchars[(sigval >> 4) & 0xf]; - remcomOutBuffer[2] = hexchars[sigval & 0xf]; - remcomOutBuffer[3] = 0; - break; + int sigval = __computeSignal (__get_trap_number ()); + remcomOutBuffer[0] = 'S'; + remcomOutBuffer[1] = hexchars[(sigval >> 4) & 0xf]; + remcomOutBuffer[2] = hexchars[sigval & 0xf]; + remcomOutBuffer[3] = 0; + break; } case 'd': @@ -616,190 +803,351 @@ process_packet (char *packet) process_set (&packet[1]); break; - case 'g': /* return the value of the CPU registers */ + case 'g': /* return the value of the CPU registers */ { - char *ptr = remcomOutBuffer; - int x; + char *ptr = remcomOutBuffer; + int regnum; + + for (regnum = 0; regnum < NUMREGS_GDB; regnum++) + { + /* We need to compensate for the value offset within the + register. */ + char dummyDat[32]; + target_register_t addr; + char *vptr; + int reg_valid = 1; + +#ifdef TARGET_HAS_LARGE_REGISTERS + if (sizeof (target_register_t) < REGSIZE (regnum)) + { + get_register_as_bytes (regnum, dummyDat); + vptr = dummyDat; + } + else +#endif + { + if (_get_trace_register_hook) + reg_valid = _get_trace_register_hook (regnum, &addr); + else + addr = get_register (regnum); + + vptr = ((char *) &addr) + sizeof (addr) - REGSIZE (regnum); + if (sizeof (addr) < REGSIZE (regnum)) + { + int off = REGSIZE (regnum) - sizeof (addr); + int x; - for (x = 0; x < NUMREGS_GDB; x++) - { - /* We need to compensate for the value offset within the - register. */ - target_register_t addr = thread_get_register (x); - char *vptr = ((char *)&addr) + sizeof(addr) - REGSIZE(x); + for (x = 0; x < off; x++) + dummyDat[x] = 0; + memcpy (dummyDat + off, &addr, sizeof (addr)); + vptr = dummyDat; + } + } + if (reg_valid) /* we have a valid reg value */ + { + ptr = __mem2hex (vptr, ptr, REGSIZE (regnum), 0); + } + else + { + /* Trace component returned a failure code. + This means that the register value is not available. + We'll fill it with 'x's, and GDB will understand. */ + memset (ptr, 'x', 2 * REGSIZE (regnum)); + ptr += 2 * REGSIZE (regnum); + } + } + break; + } - ptr = __mem2hex(vptr, ptr, REGSIZE(x), 0); - } - break; + case 'A': /* set program arguments */ + { + if (packet[1] == '\0') + { + __free_program_args (); + strcpy (remcomOutBuffer, "OK"); + } + else + { + target_register_t arglen, argnum; + char *ptr = &packet[1]; + + while (1) + { + if (__hexToInt (&ptr, &arglen) + && (*ptr++ == ',') + && __hexToInt (&ptr, &argnum) + && (*ptr++ == ',')) + { + if (arglen > 0) + { + char *s = __add_program_arg (argnum, arglen); + if (s != NULL) + { + __hex2mem (ptr, s, arglen, 0); + } + ptr += arglen * 2; + } + + if (*ptr == ',') + ptr++; + else + break; + } + else + break; + } + if (*ptr == '\0') + strcpy (remcomOutBuffer, "OK"); + else + strcpy (remcomOutBuffer, "E01"); + } } + break; case 'P': - case 'G': /* set the value of the CPU registers - return OK */ + case 'G': /* set the value of the CPU registers - return OK */ { - int x; - int sr = 0, er = NUMREGS_GDB; - char *ptr = &packet[1]; + int x; + int sr = 0, er = NUMREGS_GDB; + char *ptr = &packet[1]; + + if (packet[0] == 'P') + { + target_register_t regno; - if (packet[0] == 'P') - { - target_register_t regno; + if (__hexToInt (&ptr, ®no) + && (*ptr++ == '=')) + { + sr = regno; + er = regno + 1; + } + else + { + strcpy (remcomOutBuffer, "P01"); + break; + } + } - if (__hexToInt (&ptr, ®no) - && (*ptr++ == '=')) - { - sr = regno; - er = regno + 1; - } - else - { - strcpy (remcomOutBuffer, "P01"); - break; - } - } + for (x = sr; x < er; x++) + { + target_register_t value = 0; + char *vptr; + +#ifdef TARGET_HAS_LARGE_REGISTERS + if (sizeof (target_register_t) < REGSIZE (x)) + { + char dummyDat [32]; - for (x = sr; x < er; x++) - { - target_register_t value = 0; + __hex2mem (ptr, dummyDat, REGSIZE (x), 0); + put_register_as_bytes (x, dummyDat); + } + else +#endif + { + vptr = ((char *) &value) + sizeof (value) - REGSIZE (x); + __hex2mem (ptr, vptr, REGSIZE (x), 0); + put_register (x, value); + } + ptr += REGSIZE (x) * 2; + } - char *vptr = ((char *)&value) + sizeof(value) - REGSIZE(x); - hex2mem(ptr, vptr, REGSIZE (x), 0); - thread_put_register (x, value); - ptr += REGSIZE(x) * 2; - } - - strcpy (remcomOutBuffer, "OK"); - break; + strcpy (remcomOutBuffer, "OK"); + break; } - case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ + case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ /* Try to read %x,%x. */ { - target_register_t addr, length; - char *ptr = &packet[1]; + target_register_t addr, length; + char *ptr = &packet[1]; - if (__hexToInt(&ptr, &addr) - && *ptr++ == ',' - && __hexToInt(&ptr, &length)) - { - if (__mem2hex ((char *)addr, remcomOutBuffer, length, 1)) - break; + if (__hexToInt (&ptr, &addr) + && *ptr++ == ',' + && __hexToInt (&ptr, &length)) + { + if (__mem2hex ((char *) addr, remcomOutBuffer, length, 1)) + break; - strcpy (remcomOutBuffer, "E03"); - } - else - strcpy(remcomOutBuffer,"E01"); - break; + strcpy (remcomOutBuffer, "E03"); + } + else + strcpy (remcomOutBuffer, "E01"); + break; } + case 'X': + /* XAA..AA,LLLL: Write LLLL escaped binary bytes at address AA.AA */ + is_binary = 1; + /* fall through */ case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ /* Try to read '%x,%x:'. */ { - target_register_t addr, length; - char *ptr = &packet[1]; + target_register_t addr, length; + char *ptr = &packet[1], buf[128]; + int i; + + if (__hexToInt (&ptr, &addr) + && *ptr++ == ',' + && __hexToInt (&ptr, &length) + && *ptr++ == ':') + { + if (is_binary) + { + while (length > 0) + { + for (i = 0; i < sizeof(buf) && i < length; i++) + if ((buf[i] = *ptr++) == 0x7d) + buf[i] = 0x20 | (*ptr++ & 0xff); + + if (__write_mem_safe (buf, addr, i) != i) + break; - if (__hexToInt(&ptr, &addr) - && *ptr++ == ',' - && __hexToInt(&ptr, &length) - && *ptr++ == ':') - { - if (hex2mem(ptr, (char *)addr, length, 1)) - strcpy(remcomOutBuffer, "OK"); - else - strcpy(remcomOutBuffer, "E03"); - } - else - strcpy(remcomOutBuffer, "E02"); - break; + length -= i; + addr += i; + } + if (length <= 0) + strcpy (remcomOutBuffer, "OK"); + else + strcpy (remcomOutBuffer, "E03"); + } + else + { + if (__hex2mem (ptr, (char *) addr, length, 1) != NULL) + strcpy (remcomOutBuffer, "OK"); + else + strcpy (remcomOutBuffer, "E03"); + } + } + else + strcpy (remcomOutBuffer, "E02"); + break; } case 'S': - case 's': /* sAA..AA Step from address AA..AA(optional) */ + case 's': /* sAA..AA Step from address AA..AA (optional) */ case 'C': - case 'c': /* cAA..AA Continue at address AA..AA(optional) */ + case 'c': /* cAA..AA Continue at address AA..AA (optional) */ /* try to read optional parameter, pc unchanged if no parm */ { - char *ptr = &packet[1]; - target_register_t addr; - target_register_t foo = 99999; - target_register_t sigval; + char *ptr = &packet[1]; + target_register_t addr; + target_register_t sigval = 0; + + if (packet[0] == 'C' || packet[0] == 'S') + { + __hexToInt (&ptr, &sigval); + if (*ptr == ';') + ptr++; + } -//diag_printf("stepping\n"); - sigval = foo; - if (packet[0] == 'C' || packet[0] == 'S') - { - __hexToInt (&ptr, &sigval); - if (*ptr == ';') - ptr++; - } + if (__hexToInt (&ptr, &addr)) + set_pc (addr); + + /* Need to flush the instruction cache here, as we may have + deposited a breakpoint, and the icache probably has no way of + knowing that a data ref to some location may have changed + something that is in the instruction cache. */ + +#ifdef __ECOS__ + __data_cache (CACHE_FLUSH) ; +#endif + __instruction_cache (CACHE_FLUSH) ; - if (__hexToInt(&ptr, &addr)) - set_pc (addr); - - /* Need to flush the instruction cache here, as we may have deposited a - breakpoint, and the icache probably has no way of knowing that a data ref to - some location may have changed something that is in the instruction cache. - */ + /* If we have a function to handle signals, call it. */ + if (sigval != 0 && __process_signal_vec != NULL) + { + /* If 0 is returned, we either ignored the signal or invoked a user + handler. Otherwise, the user program should die. */ + if (! __process_signal_vec (sigval)) + sigval = 0; + } - flush_i_cache (); + if (sigval != 0) + { + sigval = SIGKILL; /* Always nuke the program */ + __kill_program (sigval); + return 0; + } - if (sigval != foo) - { - if (__process_signal_vec != NULL) - { - if (! __process_signal_vec (sigval)) - return -1; - } - sigval = SIGKILL; /* Always nuke the program */ - kill_program (sigval); - return 0; - } + /* Set machine state to force a single step. */ + if (packet[0] == 's' || packet[0] == 'S') + { + lock_thread_scheduler (0); /* 0 == single-step */ +#ifdef __ECOS__ + // PR 19845 workaround: + // Make sure the single-step magic affects the correct registers. + _registers = ®isters[0]; +#endif + __single_step (); + } + else + { + lock_thread_scheduler (1); /* 1 == continue */ + } - /* Set machine state to force a single step. */ - if (packet[0] == 's' || packet[0] == 'S') - single_step (); - - return -1; + return -1; } /* kill the program */ case 'k' : __process_exit_vec (); return 1; -#if 0 - case 't': /* Test feature */ - __asm__ (" std %f30,[%sp]"); - break; -#endif - case 'r': /* Reset */ + + case 'r': /* Reset */ __reset (); break; + case 'H': STUB_PKT_CHANGETHREAD (packet+1, remcomOutBuffer, 300) ; break ; case 'T' : STUB_PKT_THREAD_ALIVE (packet+1, remcomOutBuffer, 300) ; break ; - - case 'b': /* bBB... Set baud rate to BB... */ + case 'B': + /* breakpoint */ { - target_register_t baudrate; + target_register_t addr; + char mode; + char *ptr = &packet[1]; + if (__hexToInt (&ptr, &addr) && *(ptr++) == ',') + { + mode = *(ptr++); + if (mode == 'C') + __remove_breakpoint (addr); + else + __set_breakpoint (addr); + strcpy (remcomOutBuffer, "OK"); + } + else + { + strcpy (remcomOutBuffer, "E01"); + } + break; + } - char *ptr = &packet[1]; - if (!__hexToInt(&ptr, &baudrate)) - { - strcpy(remcomOutBuffer,"B01"); - break; - } + case 'b': /* bBB... Set baud rate to BB... */ + { + target_register_t baudrate; - putpacket ("OK"); /* Ack before changing speed */ - __set_baud_rate (baudrate); - break; + char *ptr = &packet[1]; + if (!__hexToInt (&ptr, &baudrate)) + { + strcpy (remcomOutBuffer, "B01"); + break; + } + + __putpacket ("OK"); /* Ack before changing speed */ + __set_baud_rate (baudrate); + break; } + default: + __process_target_packet (packet, remcomOutBuffer, 300); + break; } /* reply to the request */ - putpacket (remcomOutBuffer); + __putpacket (remcomOutBuffer); return 0; } @@ -807,7 +1155,7 @@ static void send_t_packet (int sigval) { __build_t_packet (sigval, remcomOutBuffer); - putpacket(remcomOutBuffer); + __putpacket (remcomOutBuffer); } /* @@ -823,18 +1171,11 @@ process_exception (int sigval) if (ungot_char < 0) send_t_packet (sigval); - /* Undo effect of previous single step. */ - clear_single_step (); - do { getpacket (remcomInBuffer); - status = process_packet (remcomInBuffer); + status = __process_packet (remcomInBuffer); } while (status == 0); - - /* Install breakpoints that may have been set to perform single stepping. */ - install_breakpoints (); - if (status < 0) return 0; else @@ -848,30 +1189,43 @@ void remcomOutBuffer[1] = hexchars[(status >> 4) & 0xf]; remcomOutBuffer[2] = hexchars[status & 0xf]; remcomOutBuffer[3] = 0; - putpacket (remcomOutBuffer); + __putpacket (remcomOutBuffer); } +/* Read up to MAXLEN bytes from the remote GDB client, and store in DEST + (which is a pointer in the user program). BLOCK indicates what mode + is being used; if it is set, we will wait for MAXLEN bytes to be + entered. Otherwise, the function will return immediately with whatever + bytes are waiting to be read. + + The value returned is the number of bytes read. A -1 indicates that an + error of some sort occurred. */ + int -__get_gdb_input (char *dest, int maxlen, int block) +__get_gdb_input (target_register_t dest, int maxlen, int block) { char buf[4]; int len, i; + char d; buf[0] = 'I'; buf[1] = '0'; buf[2] = block ? '0' : '1'; buf[3] = 0; - putpacket (buf); + __putpacket (buf); getpacket (remcomInBuffer); if (remcomInBuffer[0] != 'I') return -1; len = stubhex (remcomInBuffer[1]) * 16 + stubhex (remcomInBuffer[2]); for (i = 0; i < len; i++) { - dest[i] = stubhex (remcomInBuffer[3 + i * 2]) * 16; - dest[i] |= stubhex (remcomInBuffer[3 + i * 2 + 1]); + d = stubhex (remcomInBuffer[3 + i * 2]) * 16; + d |= stubhex (remcomInBuffer[3 + i * 2 + 1]); + __write_mem_safe (&d, dest + i, 1); } - dest[i] = '\0'; + /* Write the trailing \0. */ + d = '\0'; + __write_mem_safe (&d, dest + i, 1); return len; } @@ -882,7 +1236,7 @@ void unsigned int x; *ptr = 0; - for (x = 0; x < (sizeof(i) * 2); x++) + for (x = 0; x < (sizeof (i) * 2); x++) { *(--ptr) = hexchars[i & 15]; i = i >> 4; @@ -893,27 +1247,52 @@ void } } +/* Write the C-style string pointed to by STR to the GDB comm port. */ +void +__putDebugStr (char *str) +{ + while (*str) + { + putDebugChar (*str); + str++; + } +} + +/* Send STRING_LEN bytes of STR to GDB, using 'O' packets. + STR is assumed to be in the program being debugged. */ + int -__output_gdb_string(const char *str, int string_len) +__output_gdb_string (target_register_t str, int string_len) { - static char buf[1024]; + /* We will arbitrarily limit output packets to less than 400 bytes. */ + static char buf[400]; int x; int len; if (string_len == 0) - string_len = strlen (str); + { + /* We can't do strlen on a user pointer. */ + return -1; + } - len = string_len * 2 + 1; - - buf[0] = 'O'; - for (x = 0; x < string_len; x++) + len = string_len; + while (len > 0) { - char c = str[x]; - buf[x*2+1] = hexchars[(c >> 4) & 0xf]; - buf[x*2+2] = hexchars[c % 16]; + int packetlen = ((len < 175) ? len : 175); + buf[0] = 'O'; + for (x = 0; x < packetlen; x++) + { + char c; + + __read_mem_safe (&c, str + x, 1); + buf[x*2+1] = hexchars[(c >> 4) & 0xf]; + buf[x*2+2] = hexchars[c % 16]; + } + str += x; + len -= x; + buf[x*2+1] = 0; + __putpacket (buf); } - buf[x*2+1] = 0; - putpacket (buf); return string_len; } @@ -931,25 +1310,124 @@ syscall_do_nothing (int junk) /* Start the stub running. */ void -__switch_to_stub () +__switch_to_stub (void) { __process_exception_vec = process_exception; } +#if ! defined(BOARD_SPECIFIC_STUB_INIT) +void +initialize_stub (void) +{ + set_debug_traps (); + /* FIXME: This function should be renamed to specifically init the + hardware required by debug operations. If initHardware is implemented at + all, it should be called before main (). + */ + initHardware () ; + /* This acks any stale packets , NOT an effective solution */ + putDebugChar ('+'); +} +#endif + void ungetDebugChar (int c) { ungot_char = c; } -static void -kill_program (int sigval) +void +__kill_program (int sigval) { remcomOutBuffer[0] = 'X'; remcomOutBuffer[1] = hexchars[(sigval >> 4) & 15]; remcomOutBuffer[2] = hexchars[sigval & 15]; remcomOutBuffer[3] = 0; - putpacket (remcomOutBuffer); + __putpacket (remcomOutBuffer); +} + +#define MAX_ARG_COUNT 20 +#define MAX_ARGDATA 128 + +static char *program_argv [MAX_ARG_COUNT]; +static int program_argc; +static int last_program_arg; +static char program_argstr [MAX_ARGDATA], *argptr; +static int args_initted = 0; + +void +__free_program_args (void) +{ + last_program_arg = -1; + program_argc = 0; + program_argv [0] = NULL; + argptr = program_argstr; + args_initted = 1; +} + +static char * +__add_program_arg (int argc, uint32 len) +{ + char *res; + + if (! args_initted) + { + __free_program_args (); + } + + if ((argc >= (MAX_ARG_COUNT - 1)) + || ((argptr - program_argstr + len) > MAX_ARGDATA)) + { + return NULL; + } + + if (argc != last_program_arg) + { + if (argc >= program_argc) + { + program_argc = argc + 1; + program_argv [program_argc] = NULL; + } + program_argv [argc] = argptr; + last_program_arg = argc; + } + + res = argptr; + argptr += len; + + return res; +} + +void +__set_program_args (int argc, char **argv) +{ + int x; + + __free_program_args (); + if (argc) + { + for (x = 0; x < argc; x++) + { + uint32 len = strlen (argv[x])+1; + char *s = __add_program_arg (x, len); + + if (s == NULL) + return; + + memcpy (s, argv[x], len); + } + } +} + +char ** +__get_program_args (target_register_t argcPtr) +{ + if (!args_initted) + { + __free_program_args (); + } + __write_mem_safe ((char *) &program_argc, argcPtr, sizeof (program_argc)); + return program_argv; } /* Table used by the crc32 function to calcuate the checksum. */ @@ -962,7 +1440,10 @@ static int tableInit = 0; PTR is assumed to be a pointer in the user program. */ static uint32 -crc32 (unsigned char *ptr, int len, uint32 crc) +crc32 (ptr, len, crc) + unsigned char *ptr; + int len; + uint32 crc; { if (! tableInit) { @@ -972,11 +1453,11 @@ crc32 (unsigned char *ptr, int len, uint tableInit = 1; for (i = 0; i < 256; i++) - { - for (c = i << 24, j = 8; j > 0; --j) - c = c & 0x80000000 ? (c << 1) ^ 0x04c11db7 : (c << 1); - crc32_table[i] = c; - } + { + for (c = i << 24, j = 8; j > 0; --j) + c = c & 0x80000000 ? (c << 1) ^ 0x04c11db7 : (c << 1); + crc32_table[i] = c; + } } __mem_fault = 0; @@ -986,9 +1467,9 @@ crc32 (unsigned char *ptr, int len, uint __read_mem_safe (&ch, (target_register_t) ptr, 1); if (__mem_fault) - { - break; - } + { + break; + } crc = (crc << 8) ^ crc32_table[((crc >> 24) ^ ch) & 255]; ptr++; } @@ -1001,10 +1482,14 @@ static void process_query (char *pkt) { remcomOutBuffer[0] = '\0'; +#ifdef __ECOS__ if ('C' == pkt[0] && 'R' == pkt[1] && 'C' == pkt[2] && ':' == pkt[3]) +#else // __ECOS__ + if (strncmp (pkt, "CRC:", 4) == 0) +#endif // __ECOS__ { target_register_t startmem; target_register_t length; @@ -1012,21 +1497,21 @@ process_query (char *pkt) pkt += 4; if (__hexToInt (&pkt, &startmem) - && *(pkt++) == ',' - && __hexToInt (&pkt, &length)) - { - our_crc = crc32 ((unsigned char *) startmem, length, 0xffffffff); - if (__mem_fault) - { - strcpy (remcomOutBuffer, "E01"); - } - else - { - int numb = __intToHex (remcomOutBuffer + 1, our_crc, 32); - remcomOutBuffer[0] = 'C'; - remcomOutBuffer[numb + 1] = 0; - } - } + && *(pkt++) == ',' + && __hexToInt (&pkt, &length)) + { + our_crc = crc32 ((unsigned char *) startmem, length, 0xffffffff); + if (__mem_fault) + { + strcpy (remcomOutBuffer, "E01"); + } + else + { + int numb = __intToHex (remcomOutBuffer + 1, our_crc, 32); + remcomOutBuffer[0] = 'C'; + remcomOutBuffer[numb + 1] = 0; + } + } return; } else @@ -1036,17 +1521,20 @@ process_query (char *pkt) ch = *pkt ; subpkt = pkt + 1 ; switch (ch) - { - case 'L' : /* threadlistquery */ - STUB_PKT_GETTHREADLIST (subpkt, remcomOutBuffer, 300); - break ; - case 'P' : /* Thread or process information request */ - STUB_PKT_GETTHREADINFO (subpkt, remcomOutBuffer, 300); - break ; - default: - __process_target_query (pkt, remcomOutBuffer, 300); - break ; - } + { + case 'L' : /* threadlistquery */ + STUB_PKT_GETTHREADLIST (subpkt, remcomOutBuffer, 300); + break ; + case 'P' : /* Thread or process information request */ + STUB_PKT_GETTHREADINFO (subpkt, remcomOutBuffer, 300); + break ; + case 'C' : /* current thread query */ + STUB_PKT_CURRTHREAD(subpkt, remcomOutBuffer, sizeof(remcomOutBuffer)); + break; + default: + __process_target_query (pkt, remcomOutBuffer, 300); + break ; + } } } @@ -1063,7 +1551,7 @@ process_set (char *pkt) case 'p' : /* Set current process or thread */ /* reserve the packet id even if support is not present */ /* Dont strip the 'p' off the header, there are several variations of - this packet */ + this packet */ STUB_PKT_CHANGETHREAD (pkt, remcomOutBuffer, 300) ; break ; default: @@ -1071,5 +1559,4 @@ process_set (char *pkt) break ; } } - #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/common/current/src/hal_stub.c b/packages/hal/common/current/src/hal_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/common/current/src/hal_stub.c @@ -0,0 +1,525 @@ +//============================================================================= +// +// hal_stub.c +// +// Helper functions for stub, specific to eCos HAL +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov (based on powerpc/cogent hal_stub.c) +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Helper functions for stub, specific to eCos HAL +// Description: Parts of the GDB stub requirements are provided by +// the eCos HAL, rather than target and/or board specific +// code. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // Our header + +#include // HAL_BREAKINST +#include // HAL_xCACHE_x +#include // interrupt disable/restore + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include // dbg_currthread_id +#endif + + +//----------------------------------------------------------------------------- +// Extra eCos data. + +// Saved registers. +HAL_SavedRegisters *_hal_registers; +target_register_t * _registers; // Pointer to current set of registers +target_register_t registers[NUMREGS]; +target_register_t alt_registers[NUMREGS] ; // Thread or saved process state + +// Interrupt control. +static volatile __PFI __interruptible_control; + +//----------------------------------------------------------------------------- +// Register access + +// Return the currently-saved value corresponding to register REG of +// the exception context. +target_register_t +get_register (regnames_t reg) +{ + return _registers[reg]; +} + +// Store VALUE in the register corresponding to WHICH in the exception +// context. +void +put_register (regnames_t which, target_register_t value) +{ + _registers[which] = value; +} + +//----------------------------------------------------------------------------- +// Serial stuff + +// Write C to the current serial port. +void +putDebugChar (int c) +{ + HAL_STUB_PLATFORM_PUT_CHAR(c); +} + +// Read one character from the current serial port. +int +getDebugChar (void) +{ + return HAL_STUB_PLATFORM_GET_CHAR(); +} + +// Set the baud rate for the current serial port. +void +__set_baud_rate (int baud) +{ + HAL_STUB_PLATFORM_SET_BAUD_RATE(baud); +} + +//----------------------------------------------------------------------------- +// GDB interrupt (BREAK) support. + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + +typedef unsigned long t_inst; + +typedef struct +{ + t_inst *targetAddr; + t_inst savedInstr; +} instrBuffer; + +static instrBuffer break_buffer; + +void +cyg_hal_gdb_interrupt (target_register_t pc) +{ + if (NULL == break_buffer.targetAddr) { + break_buffer.targetAddr = (t_inst*) pc; + break_buffer.savedInstr = *(t_inst*)pc; + *(t_inst*)pc = (t_inst)HAL_BREAKINST; + + __data_cache(CACHE_FLUSH); + __instruction_cache(CACHE_FLUSH); + } +} + +int +cyg_hal_gdb_remove_break (target_register_t pc) +{ + if ((t_inst*)pc == break_buffer.targetAddr) { + *(t_inst*)pc = break_buffer.savedInstr; + break_buffer.targetAddr = NULL; + + __data_cache(CACHE_FLUSH); + __instruction_cache(CACHE_FLUSH); + return 1; + } + return 0; +} + +#endif // CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + +// Use this function to disable serial interrupts whenever reply +// characters are expected from GDB. The reason we want to control +// whether the target can be interrupted or not is simply that GDB on +// the host will be sending acknowledge characters/commands while the +// stub is running - if serial interrupts were still active, the +// characters would never reach the (polling) getDebugChar. +static void +interruptible(int state) +{ + static int __interrupts_suspended = 0; + + if (__interruptible_control) { + if (state) { + __interrupts_suspended--; + if (0 >= __interrupts_suspended) { + __interrupts_suspended = 0; + __interruptible_control(1); + } + } else { + __interrupts_suspended++; + if (1 == __interrupts_suspended) + __interruptible_control(0); + } + } +} + +//----------------------------------------------------------------------------- +// eCos stub entry and exit magic. + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +int cyg_hal_gdb_break; +#endif + +// Called at stub *entry* +static void +handle_exception_cleanup( void ) +{ + interruptible(0); + + // Expand the HAL_SavedRegisters structure into the GDB register + // array format. + HAL_GET_GDB_REGISTERS(®isters[0], _hal_registers); + _registers = ®isters[0]; + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + // FIXME: (there may be a better way to do this) + // If we hit a breakpoint set by the gdb interrupt stub, make it + // seem like an interrupt rather than having hit a breakpoint. + if (cyg_hal_gdb_remove_break(get_register (PC))) + cyg_hal_gdb_break = 1; + else + cyg_hal_gdb_break = 0; +#endif +} + +// Called at stub *exit* +static void +handle_exception_init( void ) +{ + // Compact register array again. + HAL_SET_GDB_REGISTERS(_hal_registers, ®isters[0]); + + interruptible(1); +} + + +//----------------------------------------------------------------------------- +// Initialization. + +// Signal handler. +int +cyg_hal_process_signal (int signal) +{ + // We don't care about the signal (atm). + return 0; +} + +// Install the standard set of trap handlers for the stub. +void +__install_traps (void) +{ + // Set signal handling vector so we can treat 'C' as 'c'. + __process_signal_vec = &cyg_hal_process_signal; + + __cleanup_vec = &handle_exception_cleanup; + __init_vec = &handle_exception_init; + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + // Control of GDB interrupts. + __interruptible_control = HAL_STUB_PLATFORM_INTERRUPTIBLE; +#endif + + // Nothing further to do, handle_exception will be called when an + // exception occurs. +} + +// Initialize the hardware. +void +initHardware (void) +{ + static int initialized = 0; + + if (!initialized) { + initialized = 1; + + // Get serial port initialized. + HAL_STUB_PLATFORM_INIT_SERIAL(); + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + // Get interrupt handler initialized. + HAL_STUB_PLATFORM_INIT_BREAK_IRQ(); +#endif + +#ifdef CYG_HAL_STARTUP_STUBS + // There may be extra initialization required when configured + // for stubs startup. + HAL_STUB_PLATFORM_STUBS_INIT(); +#endif + } +} + +// Reset the board. +void +__reset (void) +{ + HAL_STUB_PLATFORM_RESET(); +} + +//----------------------------------------------------------------------------- +// Breakpoint support. + +#ifndef CYGPKG_HAL_ARM +// This function will generate a breakpoint exception. It is used at +// the beginning of a program to sync up with a debugger and can be +// used otherwise as a quick means to stop program execution and +// "break" into the debugger. +void +breakpoint() +{ + HAL_BREAKPOINT(_breakinst); +} + +// This function returns the opcode for a 'trap' instruction. +unsigned long +__break_opcode () +{ + return HAL_BREAKINST; +} +#endif + +// FIXME: Add support for multiple breakpoints (libstub/bplist-dynamic.c) +int __set_breakpoint (target_register_t addr) { return 0; } +int __remove_breakpoint (target_register_t addr) { return 0; } + +//----------------------------------------------------------------------------- +// Write the 'T' packet in BUFFER. SIGVAL is the signal the program received. +void +__build_t_packet (int sigval, char *buf) +{ + target_register_t addr; + char *ptr = buf; + target_register_t *sp; + + sp = (target_register_t *) get_register (SP); + + *ptr++ = 'T'; + *ptr++ = __tohex (sigval >> 4); + *ptr++ = __tohex (sigval); + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + // Include thread ID if thread manipulation is required. + { + int id; + + *ptr++ = 't'; + *ptr++ = 'h'; + *ptr++ = 'r'; + *ptr++ = 'e'; + *ptr++ = 'a'; + *ptr++ = 'd'; + *ptr++ = ':'; + +#if (CYG_BYTEORDER == CYG_MSBFIRST) + id = dbg_currthread_id (); +#else + // FIXME: Temporary workaround for PR 18903. Thread ID must be + // big-endian in the T packet. + { + unsigned char* bep = (unsigned char*)&id; + int be_id; + + be_id = dbg_currthread_id (); + *bep++ = (be_id >> 24) & 0xff ; + *bep++ = (be_id >> 16) & 0xff ; + *bep++ = (be_id >> 8) & 0xff ; + *bep++ = (be_id & 0xff) ; + } +#endif + ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); + *ptr++ = ';'; + } +#endif + + *ptr++ = __tohex (PC >> 4); + *ptr++ = __tohex (PC); + *ptr++ = ':'; + addr = get_register (PC); + ptr = __mem2hex((char *)&addr, ptr, sizeof(addr), 0); + *ptr++ = ';'; + + *ptr++ = __tohex (SP >> 4); + *ptr++ = __tohex (SP); + *ptr++ = ':'; + ptr = __mem2hex((char *)&sp, ptr, sizeof(sp), 0); + *ptr++ = ';'; + + *ptr++ = 0; +} + + +//----------------------------------------------------------------------------- +// Cache functions. + +// Perform the specified operation on the instruction cache. +// Returns 1 if the cache is enabled, 0 otherwise. +int +__instruction_cache (cache_control_t request) +{ + int state = 1; + + switch (request) { + case CACHE_ENABLE: + HAL_ICACHE_ENABLE(); + break; + case CACHE_DISABLE: + HAL_ICACHE_DISABLE(); + state = 0; + break; + case CACHE_FLUSH: + HAL_ICACHE_SYNC(); + HAL_ICACHE_INVALIDATE_ALL(); + break; + case CACHE_NOOP: + /* fall through */ + default: + break; + } + +#ifdef HAL_ICACHE_IS_ENABLED + HAL_ICACHE_IS_ENABLED(state); +#endif + + return state; +} + +// Perform the specified operation on the data cache. +// Returns 1 if the cache is enabled, 0 otherwise. +int +__data_cache (cache_control_t request) +{ + int state = 1; + + switch (request) { + case CACHE_ENABLE: + HAL_DCACHE_ENABLE(); + break; + case CACHE_DISABLE: + HAL_DCACHE_DISABLE(); + state = 0; + break; + case CACHE_FLUSH: + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + break; + case CACHE_NOOP: + /* fall through */ + default: + break; + } + +#ifdef HAL_DCACHE_IS_ENABLED + HAL_DCACHE_IS_ENABLED(state); +#endif + + return state; +} + +//----------------------------------------------------------------------------- +// Memory accessor functions. + +void *__mem_fault_handler = (void *)0; + +/* These are the "arguments" to __do_read_mem and __do_write_mem, + which are passed as globals to avoid squeezing them thru + __set_mem_fault_trap. */ + +static volatile target_register_t memCount; + +static void +__do_copy_mem (unsigned char* src, unsigned char* dst) +{ + __mem_fault = 1; // Defaults to 'fail'. Is cleared + // when the copy loop completes. + __mem_fault_handler = &&err; + + while (memCount) + { + *dst++ = *src++; + memCount--; + } + + __mem_fault = 0; + + err: + __mem_fault_handler = (void *)0; +} + +/* + * __read_mem_safe: + * Get contents of target memory, abort on error. + */ + +int +__read_mem_safe (unsigned char *dst, target_register_t src, int count) +{ + memCount = count; + __do_copy_mem((unsigned char*) src, (unsigned char*) dst); + return count - memCount; // return number of bytes successfully read +} + +/* + * __write_mem_safe: + * Set contents of target memory, abort on error. + */ + +int +__write_mem_safe (unsigned char *src, target_register_t dst, int count) +{ + memCount = count; + __do_copy_mem((unsigned char*) src, (unsigned char*) dst); + return count - memCount; // return number of bytes successfully written +} + +//----------------------------------------------------------------------------- +// Target extras?! +int +__process_target_query(char * pkt, char * out, int maxOut) +{ return 0 ; } +int +__process_target_set(char * pkt, char * out, int maxout) +{ return 0 ; } +int +__process_target_packet(char * pkt, char * out, int maxout) +{ return 0 ; } + +// GDB string output, making sure interrupts are disabled. +// This function gets used by some diag output functions. +void +hal_output_gdb_string(target_register_t str, int string_len) +{ + unsigned long __state; + HAL_DISABLE_INTERRUPTS(__state) + __output_gdb_string(str, string_len); + HAL_RESTORE_INTERRUPTS(__state); +} + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/common/current/src/stubrom/PKGconf.mak b/packages/hal/common/current/src/stubrom/PKGconf.mak --- a/packages/hal/common/current/src/stubrom/PKGconf.mak +++ b/packages/hal/common/current/src/stubrom/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -31,11 +31,11 @@ PACKAGE := hal include ../../../../../pkgconf/pkgconf.mak -TESTS := stubrom +PROGS := stubrom WHEREAMI := src/stubrom -default: $(TESTS) +default: $(PROGS) include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv diff --git a/packages/hal/common/current/src/stubrom/stubrom.c b/packages/hal/common/current/src/stubrom/stubrom.c --- a/packages/hal/common/current/src/stubrom/stubrom.c +++ b/packages/hal/common/current/src/stubrom/stubrom.c @@ -1,8 +1,8 @@ /*========================================================================== // -// stubrom.c +// stubrom.c // -// GDB Stub ROM main +// GDB Stub ROM main // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-06-02 +// Author(s): nickg +// Contributors: nickg +// Date: 1998-06-02 // Purpose: GDB Stub ROM main -// Description: Main program for GDB stub ROM. It simply set the debug +// Description: Main program for GDB stub ROM. It simply set the debug // traps and then breakpoints so we can talk to GDB. // //####DESCRIPTIONEND#### @@ -44,7 +44,8 @@ void cyg_start (void) { - set_debug_traps(); + + initialize_stub(); for(;;) breakpoint(); diff --git a/packages/hal/common/current/src/thread-packets.c b/packages/hal/common/current/src/thread-packets.c --- a/packages/hal/common/current/src/thread-packets.c +++ b/packages/hal/common/current/src/thread-packets.c @@ -1,6 +1,8 @@ +// Define __ECOS__; allows all eCos specific additions to be easily identified. +#define __ECOS__ /* - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -13,35 +15,49 @@ * they apply. */ +// #ifdef __ECOS__ #include #if defined(CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT) \ && defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +// #endif // __ECOS__ /* FIXME: Scan this module for correct sizes of fields in packets */ -#define DEBUG_THREADS 1 -#include "cyg/hal/dbg-threads-api.h" + +#ifdef __ECOS__ +#include +#else // __ECOS__ +#include "dbg-threads-api.h" +#endif // __ECOS__ /* This file should ALWAYS define debug thread support */ /* Dont include the object in the link if you dont need the support */ /* This is NOT the internal unit debug flag, it is a feature control */ #if defined(DEBUG_THREADS) #undef DEBUG_THREADS -#define DEBUG_THREADS 1 #endif -#define UNIT_TEST 0 -#define GDB_MOCKUP 0 +#define DEBUG_THREADS 1 +#define UNIT_TEST 0 +#define GDB_MOCKUP 0 #define STUB_BUF_MAX 300 /* for range checking of packet lengths */ #include "thread-pkts.h" +#ifdef __ECOS__ // Use HAL rather than board.h in eCos -#define PKT_DEBUG 0 #include -//#include "board.h" +#else // __ECOS__ +#include "board.h" +#endif // __ECOS__ + +/* + * Export the continue and "general" (context) thread IDs from GDB. + */ +int _gdb_cont_thread ; +int _gdb_general_thread ; #if !defined(PKT_DEBUG) #define PKT_DEBUG 0 @@ -73,10 +89,10 @@ extern target_register_t alt_registers[N /* Thread or saved process state */ -void __stub_copy_registers( - target_register_t * dest, - target_register_t *src - ) +static void stub_copy_registers( + target_register_t * dest, + target_register_t *src + ) { target_register_t * limit ; limit = dest + NUMREGS ; @@ -84,6 +100,14 @@ void __stub_copy_registers( while (dest < limit) *dest++ = *src++ ; } +#ifdef __ECOS__ +void __stub_copy_registers(target_register_t * dest, + target_register_t *src) +{ + stub_copy_registers(dest, src); +} +#endif // __ECOS__ + extern int stubhex(char ch) ; /* ----- STUB_PACK_NAK ----------------------------------- */ @@ -164,13 +188,13 @@ static char * pack_hex_byte(char * pkt, return pkt ; } /* pack_hex_byte */ -#if 0 // Currenly unused by eCos stub. +#ifndef __ECOS__ /* ---- STUB_PACK_VARLEN_HEX ------------------------------------- */ /* Format a variable length stream of hex bytes */ static char * pack_varlen_hex( - char * pkt, - unsigned int value) + char * pkt, + unsigned int value) { int i ; static unsigned char n[8] ; @@ -183,17 +207,18 @@ static char * pack_varlen_hex( { i = 8 ; while (i-- >= 0 ) /* unpack nibbles into a char array */ - { - n[i] = value & 0x0f ; - value = value >> 4 ; - } + { + n[i] = value & 0x0f ; + value = value >> 4 ; + } i = 0 ; /* we had descrmented it to -1 */ while (n[i] == 0 ) i++ ; /* drop leading zeroes */ while (i++ < 8) *pkt++ = hexchars[n[i]] ; /* pack the number */ } return pkt ; } /* pack_varlen_hex */ -#endif +#endif // !__ECOS__ + /* ------ STUB_UNPACK_VARLEN_HEX -------------------------------- */ /* Parse a stream of hex bytes which may be of variable length */ @@ -205,8 +230,8 @@ static char * pack_varlen_hex( /* We assume some non-hex delimits them */ char * unpack_varlen_hex( - char * buff, /* packet to parse */ - int * result) + char * buff, /* packet to parse */ + int * result) { int nibble ; int retval ; @@ -273,13 +298,18 @@ static char * pack_raw_string(char * pkt } static char * pack_string( - char * pkt, - char * string) + char * pkt, + char * string) { char ch ; +#ifdef __ECOS__ int len = 0; char *s = string; while( *s++ ) len++; +#else // __ECOS__ + int len ; + len = strlen(string) ; +#endif // __ECOS if (len > 200 ) len = 200 ; /* Bigger than most GDB packets, junk??? */ pkt = pack_hex_byte(pkt,len) ; while (len-- > 0) @@ -352,9 +382,9 @@ void copy_threadref(threadref * dest, th int threadmatch( - threadref * dest , - threadref * src - ) + threadref * dest , + threadref * src + ) { unsigned char * srcp, * destp ; int i , result ; @@ -364,7 +394,7 @@ int threadmatch( result = 1 ; while (i-- > 0 ) result &= (*srcp++ == *destp++) ? 1 : 0 ; return result ; -} /* threadmatch */ +} /* threadmatch */ @@ -383,11 +413,11 @@ char * stub_pack_Tpkt_threadid(char * pk { pkt = pack_raw_string(pkt,Tpkt_threadtag) ; if (fmt) - pkt = pack_threadid(pkt,&thread) ; + pkt = pack_threadid(pkt,&thread) ; else - /* Until GDB lengthens its thread ids, we have to MASH - the threadid into somthing shorter. PLEASE FIX GDB */ - pkt = pack_int(pkt,threadref_to_int(&thread)) ; + /* Until GDB lengthens its thread ids, we have to MASH + the threadid into somthing shorter. PLEASE FIX GDB */ + pkt = pack_int(pkt,threadref_to_int(&thread)) ; *pkt++ = ';' ; /* terminate variable length int */ *pkt = '\0' ; /* Null terminate to allow string to be printed, no++ */ } @@ -395,11 +425,20 @@ char * stub_pack_Tpkt_threadid(char * pk return pkt ; } /* stub_pack_Tpkt_threadid */ +long stub_get_currthread (void) +{ + threadref thread ; + + if (dbg_currthread(&thread)) + return threadref_to_int(&thread) ; + else + return 0 ; +} void stub_pkt_currthread( - char * inbuf, - char * outbuf, - int bufmax) + char * inbuf, + char * outbuf, + int bufmax) { threadref thread ; char * base_out ; @@ -407,9 +446,9 @@ void stub_pkt_currthread( if (dbg_currthread(&thread)) { - *outbuf++ = 'q' ; - *outbuf++ = 'P' ; /* FIXME: Is this a reasanable code */ - outbuf = pack_threadid(outbuf,&thread) ; /* Long form */ + *outbuf++ = 'Q' ; + *outbuf++ = 'C' ; /* FIXME: Is this a reasanable code */ + outbuf = pack_int(outbuf, threadref_to_int(&thread)) ; /* Short form */ } else outbuf = stub_pack_nak(outbuf) ; *outbuf = '\0' ; /* terminate response packet */ @@ -419,25 +458,34 @@ void stub_pkt_currthread( /* ----- STUB_PKT_THREAD_ALIVE --------------------------------- */ /* Answer the thread alive query */ +static int thread_alive (int id) +{ + threadref thread ; + struct cygmon_thread_debug_info info ; + + int_to_threadref(&thread, id) ; + if (dbg_threadinfo(&thread, &info) && + info.context_exists) + return 1 ; + else + return 0 ; +} + void stub_pkt_thread_alive(char * inbuf, - char * outbuf, - int bufmax) + char * outbuf, + int bufmax) { char * prebuf = inbuf ; int result ; - threadref thread ; - struct cygmon_thread_debug_info info ; if (prebuf != (inbuf = unpack_varlen_hex(inbuf,&result))) { - int_to_threadref(&thread,result) ; - /* pack old format into internal format */ - if ((dbg_threadinfo(&thread,&info)) - && info.context_exists) - { outbuf = stub_pack_ack(outbuf) ; - *outbuf = '\0' ; - return ; - } + if (thread_alive(result)) + { + outbuf = stub_pack_ack(outbuf) ; + *outbuf = '\0' ; + return ; + } } outbuf = stub_pack_nak(outbuf) ; *outbuf = '\0' ; /* terminate the response message */ @@ -453,19 +501,19 @@ void stub_pkt_thread_alive(char * inbuf, call the function to change registers. Also, there is no forced context switch. 'p' - New format, long long threadid, no special cases - 'c' - Old format, id for continue,32 bit threadid max, possably less - -1 contimue means continue all threads + 'c' - Old format, id for continue, 32 bit threadid max, possably less + -1 means continue all threads 'g' - Old Format, id for general use (other than continue) replies: OK for success - ENN for error + ENN for error */ void stub_pkt_changethread( - char * inbuf, - char * outbuf, - int bufmax) + char * inbuf, + char * outbuf, + int bufmax) { threadref id ; int idefined = -1 ; @@ -480,34 +528,41 @@ void stub_pkt_changethread( inbuf = unpack_threadid(inbuf,&id) ; /* even if startflag */ break ; case 'c' : /* old format , specify thread for continue */ - outbuf = stub_pack_nak(outbuf) ; /* Not supported */ - break ; + if (inbuf[0] == '-' && inbuf[1] == '1') /* Hc-1 */ + _gdb_cont_thread = 0 ; + else + inbuf = unpack_varlen_hex(inbuf, &_gdb_cont_thread) ; + + if (_gdb_cont_thread == 0 || /* revert to any old thread */ + thread_alive(_gdb_cont_thread)) /* specified thread is alive */ + outbuf = stub_pack_ack(outbuf) ; + else + outbuf = stub_pack_nak(outbuf) ; + break ; case 'g' : /* old format, specify thread for general operations */ /* OLD format: parse a variable length hex string */ /* OLD format consider special thread ids */ { - int oldthreadid ; - inbuf = unpack_varlen_hex(inbuf,&oldthreadid) ; - int_to_threadref(&id,oldthreadid) ; - switch (oldthreadid) - { - case 0 : /* pick a thread, any thread */ - idefined = 2 ; /* select original interrupted context */ - break ; - case -1 : /* all threads */ - idefined = 2 ; - break ; - default : - idefined = 1 ; /* select the specified thread */ - break ; - } + inbuf = unpack_varlen_hex(inbuf, &_gdb_general_thread) ; + int_to_threadref(&id, _gdb_general_thread) ; + switch (_gdb_general_thread) + { + case 0 : /* pick a thread, any thread */ + idefined = 2 ; /* select original interrupted context */ + break ; + case -1 : /* all threads */ + idefined = 2 ; + break ; + default : + idefined = 1 ; /* select the specified thread */ + break ; + } } break ; default: outbuf = stub_pack_nak(outbuf) ; break ; } /* handle various packet formats */ - switch (idefined) { @@ -520,24 +575,27 @@ void stub_pkt_changethread( break ; case 1 : /* copy the saved registers into the backup registers */ - __stub_copy_registers(alt_registers,registers) ; + stub_copy_registers(alt_registers,registers) ; /* The OS will now update the values it has in a saved process context*/ if (dbg_getthreadreg(&id,NUMREGS,&alt_registers[0])) - { - /* switch the registers pointer */ - _registers = &alt_registers[0] ; - outbuf = stub_pack_ack(outbuf) ; - } + { + /* switch the registers pointer */ + _registers = &alt_registers[0] ; + outbuf = stub_pack_ack(outbuf) ; + } else - outbuf = stub_pack_nak(outbuf) ; + outbuf = stub_pack_nak(outbuf) ; break ; - case 2 : break ; /* switch to interrupted context */ + case 2 : + /* switch to interrupted context */ + outbuf = stub_pack_ack(outbuf) ; + break ; default: outbuf = stub_pack_nak(outbuf) ; break ; } *outbuf = '\0' ; /* Terminate response pkt */ -} /* stub_pkt-changethread */ +} /* stub_pkt_changethread */ /* ---- STUB_PKT_GETTHREADLIST ------------------------------- */ @@ -548,8 +606,8 @@ void stub_pkt_changethread( */ void stub_pkt_getthreadlist(char * inbuf, - char * outbuf, - int bufmax) + char * outbuf, + int bufmax) { char * count_ptr ; char * done_ptr ; @@ -585,16 +643,16 @@ void stub_pkt_getthreadlist(char * inbuf result = dbg_threadlist(start_flag,&lastthread,&nextthread) ; start_flag = 0 ; /* redundent but effective */ if (!result) - { *done_ptr = '1' ; /* pack the done flag */ - break ; - } + { *done_ptr = '1' ; /* pack the done flag */ + break ; + } #if 0 /* DEBUG */ if (threadmatch(&lastthread,&nextthread)) - { - output_string("FAIL: Threadlist, not incrementing\n") ; - *done_ptr = '1' ; - break ; - } + { + output_string("FAIL: Threadlist, not incrementing\n") ; + *done_ptr = '1' ; + break ; + } #endif count++ ; outbuf = pack_threadid(outbuf,&nextthread) ; @@ -616,17 +674,17 @@ Encoding: 'Q':8,'P':8,mask:16 Mask Fields - threadid:1, # always request threadid - context_exists:2, - display:4, - unique_name:8, - more_display:16 + threadid:1, # always request threadid + context_exists:2, + display:4, + unique_name:8, + more_display:16 */ void stub_pkt_getthreadinfo( - char * inbuf, - char * outbuf, - int bufmax) + char * inbuf, + char * outbuf, + int bufmax) { int mask ; int result ; @@ -654,26 +712,26 @@ void stub_pkt_getthreadinfo( outbuf = pack_int(outbuf,mask) ; outbuf = pack_threadid(outbuf,&info.thread_id) ; /* echo threadid */ if (mask & 2) /* context-exists */ - { - outbuf = pack_int(outbuf,2) ; /* tag */ - outbuf = pack_hex_byte(outbuf,2) ; /* length */ - outbuf = pack_hex_byte(outbuf,info.context_exists) ; - } + { + outbuf = pack_int(outbuf,2) ; /* tag */ + outbuf = pack_hex_byte(outbuf,2) ; /* length */ + outbuf = pack_hex_byte(outbuf,info.context_exists) ; + } if ((mask & 4) && info.thread_display)/* display */ - { - outbuf = pack_int(outbuf,4) ; /* tag */ - outbuf = pack_string(outbuf,info.thread_display) ; - } + { + outbuf = pack_int(outbuf,4) ; /* tag */ + outbuf = pack_string(outbuf,info.thread_display) ; + } if ((mask & 8) && info.unique_thread_name) /* unique_name */ - { - outbuf = pack_int(outbuf,8) ; - outbuf = pack_string(outbuf,info.unique_thread_name) ; - } + { + outbuf = pack_int(outbuf,8) ; + outbuf = pack_string(outbuf,info.unique_thread_name) ; + } if ((mask & 16) && info.more_display) /* more display */ - { - outbuf = pack_int(outbuf,16) ; /* tag 16 */ - outbuf = pack_string(outbuf,info.more_display) ; - } + { + outbuf = pack_int(outbuf,16) ; /* tag 16 */ + outbuf = pack_string(outbuf,info.more_display) ; + } } else { @@ -683,7 +741,15 @@ void stub_pkt_getthreadinfo( *outbuf = '\0' ; } /* stub_pkt_getthreadinfo */ +int stub_lock_scheduler(int lock, /* 0 to unlock, 1 to lock */ + int mode, /* 0 for step, 1 for continue */ + long id) /* current thread */ +{ + threadref thread; + int_to_threadref(&thread, id) ; + return dbg_scheduler(&thread, lock, mode) ; +} #if GDB_MOCKUP @@ -703,8 +769,8 @@ static char * unpack_short(char * buf,in } static char * pack_short( - char * buf, - unsigned int value) + char * buf, + unsigned int value) { buf = pack_hex_byte(buf,(value >> 8) & 0xff) ; buf = pack_hex_byte(buf,(value & 0xff)) ; @@ -721,15 +787,15 @@ static char * pack_short( /* ----- PACK_SETTHREAD_REQUEST ------------------------------------- */ -/* Encoding: ??? decode gdb/remote.c - 'Q':8,'p':8,idefined:8,threadid:32 ; - */ +/* Encoding: ??? decode gdb/remote.c + 'Q':8,'p':8,idefined:8,threadid:32 ; + */ char * pack_setthread_request( - char * buf, - char fmt, /* c,g or, p */ - int idformat , - threadref * threadid ) + char * buf, + char fmt, /* c,g or, p */ + int idformat , + threadref * threadid ) { *buf++ = fmt ; @@ -755,11 +821,11 @@ char * pack_setthread_request( char * pack_threadlist_request( - char * pkt, - int startflag, - int threadcount, - threadref * nextthread - ) + char * pkt, + int startflag, + int threadcount, + threadref * nextthread + ) { *pkt++ = 'q' ; *pkt++ = 'L' ; @@ -777,10 +843,10 @@ char * pack_threadlist_request( /* Encoding: 'q':8,'M':8,count:16,done:8,argthreadid:64,(threadid:64)* */ int parse_threadlist_response( - char * pkt, - threadref * original_echo, - threadref * resultlist, - int * doneflag) + char * pkt, + threadref * original_echo, + threadref * resultlist, + int * doneflag) { char * limit ; int count, resultcount , done ; @@ -789,7 +855,7 @@ int parse_threadlist_response( /* assume the 'q' and 'M chars have been stripped */ PKT_TRACE("parse-threadlist-response ",pkt) ; limit = pkt + (STUB_BUF_MAX - BUFTHREADIDSIZ) ; /* done parse past here */ - pkt = unpack_byte(pkt,&count) ; ; /* count field */ + pkt = unpack_byte(pkt,&count) ; /* count field */ pkt = unpack_nibble(pkt,&done) ; /* The first threadid is the argument threadid */ pkt = unpack_threadid(pkt,original_echo) ; /* should match query packet */ @@ -825,9 +891,9 @@ struct gdb_ext_thread_info /* Encoding: 'Q':8,'P':8,mask:32,threadid:64 */ char * pack_threadinfo_request(char * pkt, - int mode, - threadref * id - ) + int mode, + threadref * id + ) { *pkt++ = 'Q' ; *pkt++ = 'P' ; @@ -840,9 +906,9 @@ char * pack_threadinfo_request(char * pk static char * unpack_string( - char * src, - char * dest, - int length) + char * src, + char * dest, + int length) { while (length--) *dest++ = *src++ ; *dest = '\0' ; @@ -855,7 +921,9 @@ void output_threadid(char * title,thread char hexid[20] ; pack_threadid(&hexid[0],ref) ; /* Convert threead id into hex */ hexid[16] = 0 ; - output_string(title) ; output_string(&hexid[0]) ; output_string("\n"); + output_string(title) ; + output_string(&hexid[0]) ; + output_string("\n") ; } /* ------ REMOTE_UPK_THREAD_INFO_RESPONSE ------------------------------- */ @@ -870,9 +938,9 @@ void output_threadid(char * title,thread int remote_upk_thread_info_response( - char * pkt, - threadref * expectedref , - struct gdb_ext_thread_info * info) + char * pkt, + threadref * expectedref , + struct gdb_ext_thread_info * info) { int mask, length ; unsigned int tag ; @@ -909,55 +977,55 @@ int remote_upk_thread_info_response( pkt = unpack_int(pkt,&tag) ; /* tag */ pkt = unpack_byte(pkt,&length) ; /* length */ if (! (tag & mask)) /* tags out of synch with mask */ - { - output_string("FAIL: threadinfo tag mismatch\n") ; - retval = 0 ; - break ; - } + { + output_string("FAIL: threadinfo tag mismatch\n") ; + retval = 0 ; + break ; + } if (tag == TAG_THREADID) - { - output_string("unpack THREADID\n") ; - if (length != 16) - { - output_string("FAIL: length of threadid is not 16\n") ; - retval = 0 ; - break ; - } - pkt = unpack_threadid(pkt,&ref) ; - mask = mask & ~ TAG_THREADID ; - continue ; - } + { + output_string("unpack THREADID\n") ; + if (length != 16) + { + output_string("FAIL: length of threadid is not 16\n") ; + retval = 0 ; + break ; + } + pkt = unpack_threadid(pkt,&ref) ; + mask = mask & ~ TAG_THREADID ; + continue ; + } if (tag == TAG_EXISTS) - { - info->active = stub_unpack_int(pkt,length) ; - pkt += length ; - mask = mask & ~(TAG_EXISTS) ; - if (length > 8) - { - output_string("FAIL: 'exists' length too long\n"); - retval = 0 ; - break ; - } - continue ; - } + { + info->active = stub_unpack_int(pkt,length) ; + pkt += length ; + mask = mask & ~(TAG_EXISTS) ; + if (length > 8) + { + output_string("FAIL: 'exists' length too long\n") ; + retval = 0 ; + break ; + } + continue ; + } if (tag == TAG_THREADNAME) - { - pkt = unpack_string(pkt,&info->shortname[0],length) ; - mask = mask & ~TAG_THREADNAME ; - continue ; - } + { + pkt = unpack_string(pkt,&info->shortname[0],length) ; + mask = mask & ~TAG_THREADNAME ; + continue ; + } if (tag == TAG_DISPLAY) - { - pkt = unpack_string(pkt,&info->display[0],length) ; - mask = mask & ~TAG_DISPLAY ; - continue ; - } + { + pkt = unpack_string(pkt,&info->display[0],length) ; + mask = mask & ~TAG_DISPLAY ; + continue ; + } if (tag == TAG_MOREDISPLAY) - { - pkt = unpack_string(pkt,&info->more_display[0],length) ; - mask = mask & ~TAG_MOREDISPLAY ; - continue ; - } + { + pkt = unpack_string(pkt,&info->more_display[0],length) ; + mask = mask & ~TAG_MOREDISPLAY ; + continue ; + } output_string("FAIL: unknown info tag\n") ; break ; /* Not a tag we know about */ } @@ -965,7 +1033,7 @@ int remote_upk_thread_info_response( } /* parse-thread_info_response */ -/* ---- REMOTE_PACK-CURRTHREAD_REQUEST ---------------------------- */ +/* ---- REMOTE_PACK_CURRTHREAD_REQUEST ---------------------------- */ /* This is a request to emit the T packet */ /* FORMAT: 'q':8,'C' */ @@ -976,7 +1044,7 @@ char * remote_pack_currthread_request(ch *pkt++ = 'C' ; *pkt = '\0' ; return pkt ; -} /* remote_pack-currthread_request */ +} /* remote_pack_currthread_request */ /* ------- REMOTE_UPK_CURTHREAD_RESPONSE ----------------------- */ @@ -984,8 +1052,8 @@ char * remote_pack_currthread_request(ch int remote_upk_currthread_response( - char * pkt, - threadref * ref ) /* Parse a T packet */ + char * pkt, + int *thr ) /* Parse a T packet */ { int retval = 0 ; PKT_TRACE("upk-currthreadresp ",pkt) ; @@ -1000,23 +1068,23 @@ int remote_upk_currthread_response( /* Unpack as a t packet */ while (((ch = *pkt++) != ':') /* scan for : thread */ - && (ch != '\0')) /* stop at end of packet */ + && (ch != '\0')) /* stop at end of packet */ { found = 0 ; i = 0 ; while ((ch = *pkt++) == threadtag[i++]) ; if (i == 8) /* string match "thread" */ - { - pkt = unpack_varlen_hex(pkt,&quickid) ; - retval = 1; - break ; - } + { + pkt = unpack_varlen_hex(pkt,&quickid) ; + retval = 1; + break ; + } retval = 0 ; } } #else - pkt = unpack_threadid(pkt,ref) ; + pkt = unpack_threadid(pkt, thr) ; retval = 1 ; #endif return retval ; @@ -1030,9 +1098,9 @@ int remote_upk_currthread_response( char * remote_upk_simple_ack( - char * buf, - int * pkflag, - int * errcode) + char * buf, + int * pkflag, + int * errcode) { int lclerr = 0 ; char ch = *buf++ ; @@ -1054,8 +1122,8 @@ char * remote_upk_simple_ack( /* -------- PACK_THREADALIVE_REQUEST ------------------------------- */ char * pack_threadalive_request( - char * buf, - threadref * threadid) + char * buf, + threadref * threadid) { *buf++ = 'T' ; buf = pack_threadid(buf,threadid) ; @@ -1098,10 +1166,11 @@ void display_thread_info(struct gdb_ext_ static int currthread_test(threadref * thread) { int result ; + int threadid ; output_string("TEST: currthread\n") ; remote_pack_currthread_request(test_req) ; stub_pkt_currthread(test_req+2,t_response,STUB_BUF_MAX) ; - result = remote_upk_currthread_response(t_response+2,thread) ; + result = remote_upk_currthread_response(t_response+2, &threadid) ; if (result) { output_string("PASS getcurthread\n") ; @@ -1228,48 +1297,48 @@ static int threadlist_test(void) while (! done) { if (loopcount++ > 10) - { - result = 0 ; - output_string("FAIL: Threadlist test -infinite loop-\n") ; - break ; - } + { + result = 0 ; + output_string("FAIL: Threadlist test -infinite loop-\n") ; + break ; + } pack_threadlist_request(test_req,startflag,TLRSIZ,&nextthread) ; startflag = 0 ; /* clear for later iterations */ stub_pkt_getthreadlist(test_req+2,t_response,STUB_BUF_MAX); result_count = parse_threadlist_response(t_response+2, - &echo_nextthread, - &test_threadlist[0],&done) ; + &echo_nextthread, + &test_threadlist[0],&done) ; if (! threadmatch(&echo_nextthread,&nextthread)) - { - output_string("FAIL: threadlist did not echo arg thread\n"); - result = 0 ; - break ; - } + { + output_string("FAIL: threadlist did not echo arg thread\n"); + result = 0 ; + break ; + } if (result_count <= 0) - { - if (done != 0) - { output_string("FAIL threadlist_test, failed to get list"); - result = 0 ; - } - break ; - } + { + if (done != 0) + { output_string("FAIL threadlist_test, failed to get list"); + result = 0 ; + } + break ; + } if (result_count > TLRSIZ) - { - output_string("FAIL: threadlist response longer than requested\n") ; - result = 0 ; - break ; - } + { + output_string("FAIL: threadlist response longer than requested\n") ; + result = 0 ; + break ; + } /* Setup to resume next batch of thread references , set nestthread */ copy_threadref(&nextthread,&test_threadlist[result_count-1]) ; /* output_threadid("last-of-batch",&nextthread) ; */ i = 0 ; while (result_count--) - { - if (0) /* two display alternatives */ - output_threadid("truncatedisplay",&test_threadlist[i++]) ; - else - get_and_display_threadinfo(&test_threadlist[i++]) ; - } + { + if (0) /* two display alternatives */ + output_threadid("truncatedisplay",&test_threadlist[i++]) ; + else + get_and_display_threadinfo(&test_threadlist[i++]) ; + } } if (!result) @@ -1300,4 +1369,6 @@ int test_thread_support(void) } /* test-thread_support */ #endif /* UNIT_TEST */ +// #ifdef __ECOS__ #endif // ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT... +// #endif // __ECOS__ diff --git a/packages/hal/common/current/src/thread-pkts.h b/packages/hal/common/current/src/thread-pkts.h --- a/packages/hal/common/current/src/thread-pkts.h +++ b/packages/hal/common/current/src/thread-pkts.h @@ -4,7 +4,7 @@ */ /* - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -19,43 +19,52 @@ /* The DEBUG_THREADS flag is usually set in board.h */ - #if DEBUG_THREADS /* activate this in board.h */ +/* export the thread id's sent by gdb: */ +extern int _gdb_cont_thread, _gdb_general_thread ; + +extern char * stub_pack_Tpkt_threadid(char * pkt) ; + +extern long stub_get_currthread(void) ; +extern int stub_lock_scheduler(int lock, int kind, long id) ; + extern void stub_pkt_changethread(char * inbuf, - char * outbuf, - int bufmax) ; + char * outbuf, + int bufmax) ; extern void stub_pkt_getthreadlist(char * inbuf, - char * outbuf, - int bufmax) ; + char * outbuf, + int bufmax) ; extern void stub_pkt_getthreadinfo( - char * inbuf, - char * outbuf, - int bufmax) ; + char * inbuf, + char * outbuf, + int bufmax) ; extern void stub_pkt_thread_alive( - char * inbuf, - char * outbuf, - int bufmax) ; + char * inbuf, + char * outbuf, + int bufmax) ; extern void stub_pkt_currthread( - char * inbuf, - char * outbuf, - int bufmax) ; + char * inbuf, + char * outbuf, + int bufmax) ; -#define STUB_PKT_GETTHREADLIST(a,b,c) { stub_pkt_getthreadlist(a,b,c);} -#define STUB_PKT_GETTHREADINFO(a,b,c) { stub_pkt_getthreadinfo(a,b,c);} -#define STUB_PKT_CHANGETHREAD(a,b,c) { stub_pkt_changethread(a,b,c);} -#define STUB_PKT_THREAD_ALIVE(a,b,c) { stub_pkt_thread_alive(a,b,c);} -#define STUB_PKT_CURRTHREAD(a,b,c) { stub_pkt_currthread(a,b,c);} +#define STUB_PKT_GETTHREADLIST(A,B,C) { stub_pkt_getthreadlist(A,B,C); } +#define STUB_PKT_GETTHREADINFO(A,B,C) { stub_pkt_getthreadinfo(A,B,C); } +#define STUB_PKT_CHANGETHREAD(A,B,C) { stub_pkt_changethread(A,B,C); } +#define STUB_PKT_THREAD_ALIVE(A,B,C) { stub_pkt_thread_alive(A,B,C); } +#define STUB_PKT_CURRTHREAD(A,B,C) { stub_pkt_currthread(A,B,C); } +#define PACK_THREAD_ID(PTR) { PTR = stub_pack_Tpkt_threadid (PTR); } #else -#define STUB_PKT_GETTHREADLIST(a,b,c) {} -#define STUB_PKT_GETTHREADINFO(a,b,c) {} -#define STUB_PKT_CHANGETHREAD(a,b,c) {} -#define STUB_PKT_THREAD_ALIVE(a,b,c) {} -#define STUB_PKT_CURRTHREAD(a,b,c) {} +#define STUB_PKT_GETTHREADLIST(A,B,C) {} +#define STUB_PKT_GETTHREADINFO(A,B,C) {} +#define STUB_PKT_CHANGETHREAD(A,B,C) {} +#define STUB_PKT_THREAD_ALIVE(A,B,C) {} +#define STUB_PKT_CURRTHREAD(A,B,C) {} +#define PACK_THREAD_ID(PTR) {} #endif diff --git a/packages/hal/common/current/tests/PKGconf.mak b/packages/hal/common/current/tests/PKGconf.mak --- a/packages/hal/common/current/tests/PKGconf.mak +++ b/packages/hal/common/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -30,8 +30,12 @@ PACKAGE := hal include ../../../../pkgconf/pkgconf.mak +include ../../../../pkgconf/system.mak -TESTS := cache intr context +TESTS := intr context +ifndef CYG_HAL_ARM_AEB +TESTS += cache +endif include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/hal/common/current/tests/cache.c b/packages/hal/common/current/tests/cache.c --- a/packages/hal/common/current/tests/cache.c +++ b/packages/hal/common/current/tests/cache.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -40,6 +40,27 @@ #include #include +#include + +// ------------------------------------------------------------------------- +// If the HAL does not supply this, we supply our own version + +#ifndef HAL_DCACHE_PURGE_ALL + +static cyg_uint8 dca[HAL_DCACHE_SIZE + HAL_DCACHE_LINE_SIZE*2]; + +#define HAL_DCACHE_PURGE_ALL() \ +CYG_MACRO_START \ + volatile cyg_uint8 *addr = &dca[HAL_DCACHE_LINE_SIZE]; \ + volatile cyg_uint8 tmp = 0; \ + int i; \ + for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \ + { \ + tmp = addr[i]; \ + } \ +CYG_MACRO_END + +#endif // ------------------------------------------------------------------------- @@ -47,6 +68,10 @@ volatile char m[MAXSIZE]; +#ifndef MAX_STRIDE +#define MAX_STRIDE 64 +#endif + // ------------------------------------------------------------------------- static void time0(register cyg_uint32 stride) @@ -57,8 +82,11 @@ static void time0(register cyg_uint32 st register char c; // count0 = current_time(); + k = 0; + if ( cyg_test_is_simulator ) + k = 3960; - for(k=0; k<4000;k++) { + for(; k<4000;k++) { for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) { c=m[stride*j]; } @@ -75,7 +103,7 @@ void time1(void) { cyg_uint32 i; - for(i=1; i<65; i+=i) { + for(i=1; i<=MAX_STRIDE; i+=i) { time0(i); } } @@ -86,43 +114,58 @@ void time1(void) static void entry0( void ) { + register CYG_INTERRUPT_STATE oldints; + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache off"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache on Icache off"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_ENABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache on"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_ENABLE(); HAL_DCACHE_ENABLE(); - CYG_TEST_INFO("Dcache on Icache on"); + HAL_RESTORE_INTERRUPTS(oldints); + CYG_TEST_INFO("Dcache on Icache on"); time1(); - + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache off"); time1(); - CYG_TEST_PASS_FINISH("End of test"); } diff --git a/packages/hal/common/current/tests/context.c b/packages/hal/common/current/tests/context.c --- a/packages/hal/common/current/tests/context.c +++ b/packages/hal/common/current/tests/context.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/common/current/tests/intr.c b/packages/hal/common/current/tests/intr.c --- a/packages/hal/common/current/tests/intr.c +++ b/packages/hal/common/current/tests/intr.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -41,6 +41,14 @@ #include +#ifdef CYGPKG_KERNEL +#include // Need to look for the RTC config. + +// These are redefined below. +#undef CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION +#undef CYGNUM_KERNEL_COUNTERS_RTC_PERIOD +#endif + // ------------------------------------------------------------------------- #if defined(CYG_HAL_MN10300_STDEVAL1) @@ -62,7 +70,6 @@ #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 15625 #endif - #if defined(CYG_HAL_MIPS_SIM) #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 1000} @@ -70,12 +77,23 @@ #endif -#if defined(CYG_HAL_POWERPC_MP860) +#if defined(CYG_HAL_POWERPC_COGENT) #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 20625 #endif +#if defined(CYGPKG_HAL_POWERPC_SIM) + +#define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 999 + +#endif + +#if defined(CYG_HAL_I386_LINUX) +#define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 10000 +#endif #ifndef CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION @@ -97,7 +115,8 @@ volatile cyg_count32 ticks = 0; cyg_uint32 isr( cyg_uint32 vector, CYG_ADDRWORD data ) { CYG_TEST_CHECK( ISR_DATA == data , "Bad data passed to ISR"); - CYG_TEST_CHECK( CYG_VECTOR_RTC == vector , "Bad vector passed to ISR"); + CYG_TEST_CHECK( CYGNUM_HAL_INTERRUPT_RTC == vector , + "Bad vector passed to ISR"); HAL_CLOCK_RESET( vector, CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); @@ -113,14 +132,12 @@ cyg_uint32 isr( cyg_uint32 vector, CYG_A void intr_main( void ) { CYG_INTERRUPT_STATE oldints; - - CYG_TEST_INIT(); - HAL_INTERRUPT_ATTACH( CYG_VECTOR_RTC, isr, ISR_DATA, 0 ); + HAL_INTERRUPT_ATTACH( CYGNUM_HAL_INTERRUPT_RTC, isr, ISR_DATA, 0 ); HAL_CLOCK_INITIALIZE( CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); - HAL_INTERRUPT_UNMASK( CYG_VECTOR_RTC ); + HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC ); HAL_ENABLE_INTERRUPTS(); @@ -132,6 +149,7 @@ void intr_main( void ) HAL_DISABLE_INTERRUPTS(oldints); CYG_TEST_PASS_FINISH("HAL interrupt test"); + } @@ -140,7 +158,19 @@ void intr_main( void ) externC void cyg_start( void ) { + CYG_TEST_INIT(); + + // Attaching the ISR will not succeed if the kernel real-time + // clock has been configured in. +#ifndef CYGVAR_KERNEL_COUNTERS_CLOCK + intr_main(); + +#else + + CYG_TEST_PASS_FINISH("N/A: Cannot override kernel real-time clock."); + +#endif } diff --git a/packages/hal/i386/arch/current/ChangeLog b/packages/hal/i386/arch/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/ChangeLog @@ -0,0 +1,291 @@ +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script + +1999-04-08 John Dallaway + + * src/*.ld: Use double underscore substitution for period + character in SECTION_* macro names (PR 19787) + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Jesper Skov + + * include/hal_arch.h: Added stack values. + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-22 Jesper Skov + + * src/vectors.S: + * include/hal_intr.h: + Changed CYG_HAL_ to CYGPKG_HAL_ + + * include/hal_intr.h: + Include the hal_i386_linux header file. + +1999-03-22 Jesper Skov + + * include/hal_intr.h: + * include/hal_arch.h: + Cleaned up some FIX MEs. + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-16 Jesper Skov + + * include/hal_intr.h: + Cleaned up macros. + Renamed hal_ to cyg_hal_. + +1999-03-12 Jesper Skov + + * include/hal_intr.h: Default contents of vector table changed. + +1999-03-12 Gary Thomas + + * include/hal_arch.h: Add definition of 'CYGNUM_HAL_MINIMUM_STACK_SIZE' + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_IN_USE): Added. + +1999-03-08 Nick Garnett + + * src/i386.ld: + Added alignment before definition of __DEVTAB__. + +1999-03-05 Gary Thomas + + * src/i386.ld: + * src/PKGconf.mak: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/i386.ld: + Add INPUT(libextras.a), add libextras.a to GROUP() and include + new section for device driver table + +1999-02-25 Nick Garnett + + * src/i386.ld: + Removed alias for Cyg_Scheduler::sched_lock, since this is now + handled elsewhere. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception -> cyg_hal_deliver_exception + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * src/hal_misc.c: + Rename deliver_exception -> cyg_hal_deliver_exception + Rename exception_handler -> cyg_hal_exception_handler + +1999-02-08 Jesper Skov + + * include/hal_intr.h: Always allocate space for at least one + exception vector. + +1999-02-05 John Dallaway + + * src/i386.ld: Add LMA_EQ_VMA macro definition. + +1999-01-29 Jesper Skov + PR 18966 + * src/hal_misc.c (cyg_hal_invoke_constructors): Added + cyg_hal_stop_constructors code. + +1999-01-25 Jesper Skov + + * src/i386.ld: Added rel.got section. Cleaned up a bit. + +1999-01-22 Jesper Skov + + * src/hal_misc.c: Moved external declarations into top-level + scope to avoid compiler warning. + +1999-01-20 Jesper Skov + + * include/hal_arch.h: + * src/context.S: + Added setjmp/longjmp support. + + * src/hal_misc.c: Removed bogus setjmp/longjmp functions. + +1999-01-20 Jesper Skov + + * src/context.S: + * include/hal_arch.h: + * include/i386.inc: [added] + Rewrote the context switch code. + +1999-01-20 Jesper Skov + + * src/i386.ld (SECTION_bss): Added align statement. + +1999-01-14 Jesper Skov + + * src/hal_misc.c: Add bogus setjmp & longjmp functions to prevent + compiler error. + +1999-01-12 Jesper Skov + + * include/hal_intr.h: Made virtual timer the default. + +1999-01-12 Jesper Skov + + * include/hal_intr.h (HAL_CLOCK_LATENCY): Return the clock read + value. + +1999-01-12 Jesper Skov + + * include/hal_intr.h: Made all Linux stuff CYG_HAL_I386_LINUX + conditional. + + * include/hal_cache.h: Added HAL_DCACHE_UNLOCK_ALL (empty) macro. + +1999-01-12 Jesper Skov + + * include/pkgconf/hal_i386.h: Added. + +1999-01-11 Jesper Skov + + * include/hal_arch.h: Fix HAL_SavedRegisters struct definition. + + * include/hal_intr.h: Made interrupt enable/disable macros behave + more like the macros used for real HW CPUs. + +1999-01-11 Jesper Skov + + * include/hal_intr.h: Removed IN_OUT target conditional. + +1999-01-11 Jesper Skov + + * include/hal_intr.h: + * include/hal_io.h: + Cleaned up some more. + + * include/hal_diag.h: Moved to i386/linux + + * include/hal_arch.h: + * include/basetype.h: + Comment fix. + +1999-01-08 Jesper Skov + + * include/basetype.h (CYG_LABEL_NAME): Added. + +1999-01-07 Jesper Skov + + * include/hal_intr.h (HAL_CLOCK_INITIALIZE): Use _period_ + argument. + Added CYG_VECTOR_ definitions. + Added choice for real/virtual time (no config yet). + +1999-01-07 Jesper Skov + + * src/vectors.S: + * src/hal_misc.c: + * src/context.S: + * include/hal_io.h: + * include/hal_cache.h: + * include/hal_arch.h: + * include/basetype.h: + * include/hal_diag.h: + Changed comment style & removed tabs. + +1999-01-07 Jesper Skov + + * src/hal_misc.c (cyg_hal_invoke_constructors): Match new link + behavior. + +1999-01-07 Jesper Skov + + * src/vectors.S: Added. Simple stub for now. + + * src/crt_end.c: + * src/crtbegin.c: + Removed. + + * src/PKGconf.mak: + * include/hal_intr.h: + Cleaned up. + +1999-01-06 Jesper Skov + + * src/crtbegin.c: + * src/crt_end.c: + * include/hal_intr.h: + * include/hal_diag.h: + * include/hal_arch.h: + Fixed remaining warnings. + + * include/hal_intr.h (HAL_CLOCK_INITIALIZE): Changed timeout + value. + +1999-01-06 Jesper Skov + + * include/hal_intr.h: Move extern declarations into global scope, + extern"C" doesn't work in sub-scopes. + * include/hal_arch.h: Use CYG_MACRO_START/END, not HAL_... + +1998-12-18 Jesper Skov + + * include/hal_intr.h: + * include/hal_arch.h: + Fixed compiler warnings. + Use CYG_MACRO_START/END. + Added new HAL macros. + +Wed Dec 9 14:09:47 GMT 1998 Chris Provenzano + + * src/crtbegin.c: Added. + * src/crt_begin.c: Removed. + * src/PKGconf.mak: Compile crtbegin.c to create the correct file + for linking. This is to turn on init-priority for i386 linux target. + + The default i386 linker script looks for the file named crtbegin.o + and then looks for the .ctors section within that file to + determine where to put the sorted constructors. + +Mon Nov 9 15:18:11 GMT 1998 Chris Provenzano + + Initial i386 linux port. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/i386/arch/current/include/basetype.h b/packages/hal/i386/arch/current/include/basetype.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/basetype.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven +// Date: 1998-10-02 +// Purpose: Define architecture base types. +// Usage: Included by "cyg_type.h", do not use directly +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_LSBFIRST // Little endian + +//----------------------------------------------------------------------------- +// I386 does not usually use labels with underscores. Some labels generated +// by the linker do, so add an underscore where required. + +#define CYG_LABEL_NAME(_name_) _##_name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The I386 architecture uses the default definitions of the base types, +// so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h diff --git a/packages/hal/i386/arch/current/include/hal_arch.h b/packages/hal/i386/arch/current/include/hal_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/hal_arch.h @@ -0,0 +1,250 @@ +#ifndef CYGONCE_HAL_HAL_ARCH_H +#define CYGONCE_HAL_HAL_ARCH_H + +//============================================================================= +// +// hal_arch.h +// +// Architecture specific abstractions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven +// Date: 1998-10-05 +// Purpose: Define architecture abstractions +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +//----------------------------------------------------------------------------- +// Processor saved states. This structure is also defined in i386.inc for +// assembly code. Do not change this without changing that (or vice versa). + +typedef struct +{ + cyg_uint32 esp; + cyg_uint32 next_context; // only used when dropping through... + cyg_uint32 ebp; // ...from switch_ to load_context + cyg_uint32 ebx; + cyg_uint32 esi; + cyg_uint32 edi; +} HAL_SavedRegisters; + +//----------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//----------------------------------------------------------------------------- +// Bit manipulation routines + +externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); +externC cyg_uint32 hal_msbit_index(cyg_uint32 mask); + +#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask); + +#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); + +//----------------------------------------------------------------------------- +// Context Initialization +// Initialize the context of a thread. +// Arguments: +// _sp_ name of variable containing current sp, will be written with new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. + +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ + CYG_MACRO_START \ + register CYG_WORD* _sp_ = ((CYG_WORD*)_sparg_); \ + register HAL_SavedRegisters *_regs_; \ + \ + /* The 'ret' executed at the end of hal_thread_load_context will */ \ + /* use the last entry on the stack as a return pointer (_entry_). */ \ + /* Cyg_HardwareThread::thread_entry expects one argument at stack */ \ + /* offset 4 (_thread_). The (0xDEADBEEF) entry is the return addr */ \ + /* for thread_entry (which is never used). */ \ + *(--_sp_) = (CYG_WORD)(_thread_); \ + *(--_sp_) = (CYG_WORD)(0xDEADBEEF); \ + *(--_sp_) = (CYG_WORD)(_entry_); \ + \ + _regs_ = (HAL_SavedRegisters *) \ + ((unsigned long)_sp_ - sizeof(HAL_SavedRegisters)); \ + _regs_->esp = (CYG_WORD) _sp_; \ + _regs_->ebx = (CYG_WORD)(_id_); \ + _regs_->ebp = (CYG_WORD)(_id_); \ + _regs_->esi = (CYG_WORD)(_id_); \ + _regs_->edi = (CYG_WORD)(_id_); \ + (_sparg_) = (CYG_ADDRESS) _regs_; \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + +//----------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//----------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen +// if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +// #define HAL_BREAKPOINT(_label_) + +// #define HAL_BREAKINST + +// #define HAL_BREAKINST_SIZE + +//----------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + +// Copy a set of registers from a HAL_SavedRegisters structure into a +// GDB ordered array. +#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) + +// Copy a GDB ordered array into a HAL_SavedRegisters structure. +#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) + +//----------------------------------------------------------------------------- +// HAL setjmp + +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_EBP 1 +#define CYGARC_JMP_BUF_EBX 2 +#define CYGARC_JMP_BUF_ESI 3 +#define CYGARC_JMP_BUF_EDI 4 +#define CYGARC_JMP_BUF_PC 5 + +#define CYGARC_JMP_BUF_SIZE 6 + +typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + +//----------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +//externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#define HAL_IDLE_THREAD_ACTION(_count_) + +//----------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Stack frame overhead per call. 3 local registers (edi, esi, ebx) and +// return address. +#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 4) + +// Stack needed for a context switch (i386reg_context_size from i386.inc) +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 24) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \ + ((6*4 /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +// We have lots of registers so no particular amount is added in for +// typical local variable usage. + +// We define a minimum stack size as the minimum any thread could ever +// legitimately get away with. We can throw asserts if users ask for less +// than this. Allow enough for three interrupt sources - clock, serial and +// one other + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can therefore be much smaller + +# define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (2*CYGNUM_HAL_STACK_FRAME_SIZE + 2*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + +#else + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large +# define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (((2+3)*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + \ + (2*CYGNUM_HAL_STACK_FRAME_SIZE)) +#endif + +// Now make a reasonable choice for a typical thread size. Pluck figures +// from thin air and say 15 call frames with an average of 16 words of +// automatic variables per call frame +#define CYGNUM_HAL_STACK_SIZE_TYPICAL \ + (CYGNUM_HAL_STACK_SIZE_MINIMUM + \ + 15 * (CYGNUM_HAL_STACK_FRAME_SIZE+(16*4))) + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_HAL_ARCH_H +// End of hal_arch.h diff --git a/packages/hal/i386/arch/current/include/hal_cache.h b/packages/hal/i386/arch/current/include/hal_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/hal_cache.h @@ -0,0 +1,162 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:proven +// Date: 1998-10-29 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 4096 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line +#define HAL_DCACHE_WAYS 2 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 4096 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line +#define HAL_ICACHE_WAYS 2 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() + +// Disable the data cache +#define HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/packages/hal/i386/arch/current/include/hal_intr.h b/packages/hal/i386/arch/current/include/hal_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/hal_intr.h @@ -0,0 +1,367 @@ +#ifndef CYGONCE_HAL_HAL_INTR_H +#define CYGONCE_HAL_HAL_INTR_H + +//========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors: proven, jskov +// Date: 1999-02-20 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: +// #include +// ... +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +#include + +#ifdef CYGPKG_HAL_I386_LINUX +#include // CYGSEM_HAL_I386_LINUX_REAL_TIME +#endif + +//-------------------------------------------------------------------------- +// Interrupt vectors. + +#define CYGNUM_HAL_VECTOR_NMI 0 + +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_VECTOR_NMI + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 0 +#define CYGNUM_HAL_VSR_COUNT ( CYGNUM_HAL_VSR_MAX + 1 ) + +#define CYGNUM_HAL_EXCEPTION_MIN 0 +#define CYGNUM_HAL_EXCEPTION_MAX 0 +#define CYGNUM_HAL_EXCEPTION_COUNT ( CYGNUM_HAL_EXCEPTION_MAX + 1 ) + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_COUNT ( CYGNUM_HAL_ISR_MAX + 1 ) + + +#ifdef CYGPKG_HAL_I386_LINUX +// Additional vectors on Linux. These match the Linux signals. +#define CYGNUM_HAL_VECTOR_SIGHUP 1 +#define CYGNUM_HAL_VECTOR_SIGINT 2 +#define CYGNUM_HAL_VECTOR_SIGQUIT 3 +#define CYGNUM_HAL_VECTOR_SIGILL 4 +#define CYGNUM_HAL_VECTOR_SIGTRAP 5 +#define CYGNUM_HAL_VECTOR_SIGIOT 6 +#define CYGNUM_HAL_VECTOR_SIGBUS 7 +#define CYGNUM_HAL_VECTOR_SIGFPE 8 +#define CYGNUM_HAL_VECTOR_SIGKILL 9 +#define CYGNUM_HAL_VECTOR_SIGUSR1 10 +#define CYGNUM_HAL_VECTOR_SIGSEGV 11 +#define CYGNUM_HAL_VECTOR_SIGUSR2 12 +#define CYGNUM_HAL_VECTOR_SIGPIPE 13 +#define CYGNUM_HAL_VECTOR_SIGALRM 14 +#define CYGNUM_HAL_VECTOR_SIGTERM 15 +#define CYGNUM_HAL_VECTOR_SIGCHLD 17 +#define CYGNUM_HAL_VECTOR_SIGCONT 18 +#define CYGNUM_HAL_VECTOR_SIGSTOP 19 +#define CYGNUM_HAL_VECTOR_SIGTSTP 20 +#define CYGNUM_HAL_VECTOR_SIGTTIN 21 +#define CYGNUM_HAL_VECTOR_SIGTTOU 22 +#define CYGNUM_HAL_VECTOR_SIGURG 23 +#define CYGNUM_HAL_VECTOR_SIGXCPU 24 +#define CYGNUM_HAL_VECTOR_SIGXFSZ 25 +#define CYGNUM_HAL_VECTOR_SIGVTALRM 26 +#define CYGNUM_HAL_VECTOR_SIGPROF 27 +#define CYGNUM_HAL_VECTOR_SIGWINCH 28 +#define CYGNUM_HAL_VECTOR_SIGIO 29 +#define CYGNUM_HAL_VECTOR_SIGPWR 30 + +#undef CYGNUM_HAL_ISR_MAX +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_VECTOR_SIGPWR + +// Generic exception vector names +#define CYGNUM_HAL_EXCEPTION_INTERRUPT CYGNUM_HAL_VECTOR_SIGINT +#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION CYGNUM_HAL_VECTOR_SIGILL +#define CYGNUM_HAL_EXCEPTION_TRAP CYGNUM_HAL_VECTOR_SIGTRAP +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_SIGBUS +#define CYGNUM_HAL_EXCEPTION_FPU CYGNUM_HAL_VECTOR_SIGFPE +#define CYGNUM_HAL_EXCEPTION_STACK_OVERFLOW CYGNUM_HAL_VECTOR_SIGSEGV + +#undef CYGNUM_HAL_EXCEPTION_MAX +#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_EXCEPTION_STACK_OVERFLOW + +// The vector used by the Real time clock +#ifdef CYGSEM_HAL_I386_LINUX_REAL_TIME +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_SIGALRM +#else +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_SIGVTALRM +#endif + +#endif // ifdef CYGPKG_HAL_I386_LINUX + + +//-------------------------------------------------------------------------- +// Static data used by HAL + +// ISR tables +externC volatile CYG_ADDRESS cyg_hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD cyg_hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS cyg_hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +externC volatile CYG_ADDRESS cyg_hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + + +#ifdef CYGPKG_HAL_I386_LINUX +// Interrupt controler emulation variables. +externC volatile int cyg_hal_interrupts_disabled; +externC volatile int cyg_hal_interrupts_deferred; +externC volatile int cyg_hal_interrupts_unhandled[CYGNUM_HAL_ISR_COUNT]; +#endif + +//-------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//-------------------------------------------------------------------------- +// Interrupt control macros + +#ifdef CYGPKG_HAL_I386_LINUX + +externC void cyg_hal_default_interrupt_vsr(int vector); +externC void cyg_hal_default_exception_vsr(int vector); +externC int cyg_hal_sys_sigprocmask(int, const long*, long*); + +#define HAL_ENABLE_INTERRUPTS() \ + CYG_MACRO_START \ + cyg_ucount8 _i_; \ + cyg_hal_interrupts_disabled = 0; \ + if (cyg_hal_interrupts_deferred) { \ + cyg_hal_interrupts_deferred = 0; \ + for (_i_ = CYGNUM_HAL_ISR_MIN; _i_ <= CYGNUM_HAL_ISR_MAX; _i_++) { \ + if (cyg_hal_interrupts_unhandled[_i_]) { \ + cyg_hal_default_interrupt_vsr(_i_); \ + } \ + } \ + } \ + CYG_MACRO_END + +#define HAL_DISABLE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + (_old_) = cyg_hal_interrupts_disabled++; \ + CYG_MACRO_END + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + cyg_ucount8 _i_; \ + cyg_hal_interrupts_disabled = (_old_); \ + if (0 == cyg_hal_interrupts_disabled) { \ + if (cyg_hal_interrupts_deferred) { \ + cyg_hal_interrupts_deferred = 0; \ + for (_i_ = CYGNUM_HAL_ISR_MIN; _i_ <= CYGNUM_HAL_ISR_MAX; \ + _i_++){ \ + if (cyg_hal_interrupts_unhandled[_i_]) { \ + cyg_hal_default_interrupt_vsr(_i_); \ + } \ + } \ + } \ + } \ + CYG_MACRO_END + +#define HAL_QUERY_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + (_old_) = !cyg_hal_interrupts_disabled; \ + CYG_MACRO_END + +// FIXME: Must interract with the disable/enable macro. +// --proven 19981005 +#define LINUX_SIG_UNBLOCK 1 +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + CYG_MACRO_START \ + long _old_, _new_; \ + _new_ = 0xffffffff; \ + cyg_hal_interrupts_unhandled[_vector_] = 0; \ + cyg_hal_sys_sigprocmask(LINUX_SIG_UNBLOCK, &_new_, &_old_); \ + CYG_MACRO_END + +#endif // ifdef CYGPKG_HAL_I386_LINUX + + +//--------------------------------------------------------------------------- +// Translate a vector number into an ISR table index. + +#ifdef CYGPKG_HAL_I386_LINUX +// The native linux port doesn't support chained interrupts --proven 19981005 +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_) +#endif + +//--------------------------------------------------------------------------- +// Interrupt and VSR attachment macros +externC cyg_uint32 cyg_hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if (cyg_hal_interrupt_handlers[_index_] \ + ==(CYG_ADDRESS)&cyg_hal_default_isr) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR((_vector_), _index_); \ + \ + if (cyg_hal_interrupt_handlers[_index_] \ + ==(CYG_ADDRESS)&cyg_hal_default_isr) \ + { \ + cyg_hal_interrupt_handlers[_index_] = (CYG_ADDRESS)(_isr_); \ + cyg_hal_interrupt_data[_index_] = (CYG_ADDRWORD)(_data_); \ + cyg_hal_interrupt_objects[_index_] = (CYG_ADDRESS)(_object_); \ + } \ + CYG_MACRO_END + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR((_vector_), _index_); \ + \ + if (cyg_hal_interrupt_handlers[_index_] \ + == (CYG_ADDRESS)(_isr_)) \ + { \ + cyg_hal_interrupt_handlers[_index_] = \ + (CYG_ADDRESS)&cyg_hal_default_isr; \ + cyg_hal_interrupt_data[_index_] = 0; \ + cyg_hal_interrupt_objects[_index_] = 0; \ + } \ + CYG_MACRO_END + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *((CYG_ADDRESS *)(_pvsr_)) = cyg_hal_vsr_table[(_vector_)]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \ + CYG_MACRO_START \ + if( (_poldvsr_) != NULL ) \ + *(CYG_ADDRESS *)(_poldvsr_) = cyg_hal_vsr_table[(_vector_)]; \ + cyg_hal_vsr_table[(_vector_)] = (CYG_ADDRESS)(_vsr_); \ + CYG_MACRO_END + +//--------------------------------------------------------------------------- +// Interrupt controller access + +#ifdef CYGPKG_HAL_I386_LINUX + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + CYG_MACRO_START \ + /* Use sigblock to mask a vector */ \ + CYG_EMPTY_STATEMENT; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + CYG_MACRO_START \ + /* Use sigunblock to mask a vector */ \ + CYG_EMPTY_STATEMENT; \ + CYG_MACRO_END + +// The native linux port doesn't have configurable interrupts. +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) + +// The native linux port doesn't have interrupt levels. +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) + +#endif // ifdef CYGPKG_HAL_I386_LINUX + + +//--------------------------------------------------------------------------- +// Clock control + +#ifdef CYGPKG_HAL_I386_LINUX + +struct hal_timeval { + long tv_sec; + long tv_usec; +}; +struct hal_itimerval { + struct hal_timeval it_interval; + struct hal_timeval it_value; +}; + +externC int cyg_hal_sys_setitimer(int, const struct hal_itimerval*, + struct hal_itimerval*); +externC int cyg_hal_sys_getitimer(int, struct hal_itimerval*); + +#ifdef CYGSEM_HAL_I386_LINUX_REAL_TIME +#define CYGNUM_HAL_TIMER_TYPE 0 // ITIMER_REAL +#else +#define CYGNUM_HAL_TIMER_TYPE 1 // ITIMER_VIRTUAL +#endif + +#define HAL_CLOCK_INITIALIZE( _period_ ) \ + CYG_MACRO_START \ + struct hal_itimerval new_itimerval, old; \ + \ + new_itimerval.it_interval.tv_sec = 0; \ + new_itimerval.it_interval.tv_usec = (_period_); \ + new_itimerval.it_value.tv_sec = 0; \ + new_itimerval.it_value.tv_usec = (_period_); \ + /* Use setitimer to set the realtime clock */ \ + cyg_hal_sys_setitimer(CYGNUM_HAL_TIMER_TYPE, &new_itimerval, &old); \ + CYG_MACRO_END + +// The clock reinitializes itself. +#define HAL_CLOCK_RESET( _vector_, _period_ ) + +// This timer counts down, so subtract from set value. +#define HAL_CLOCK_READ( _pvalue_ ) \ + CYG_MACRO_START \ + struct hal_itimerval old_itimerval; \ + cyg_hal_sys_getitimer(CYGNUM_HAL_TIMER_TYPE, &old_itimerval); \ + *(_pvalue_) = old_itimerval.it_interval.tv_usec - \ + old_itimerval.it_value.tv_usec; \ + CYG_MACRO_END + +#define HAL_CLOCK_LATENCY( _pvalue_ ) \ + HAL_CLOCK_READ((_pvalue_)) + +#endif // ifdef CYGPKG_HAL_I386_LINUX + +//--------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_INTR_H +// End of hal_intr.h diff --git a/packages/hal/i386/arch/current/include/hal_io.h b/packages/hal/i386/arch/current/include/hal_io.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/hal_io.h @@ -0,0 +1,151 @@ +#ifndef CYGONCE_HAL_HAL_IO_H +#define CYGONCE_HAL_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include +// ... +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \ + CYG_MACRO_END + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ + } \ + CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \ + CYG_MACRO_END + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ + } \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \ + CYG_MACRO_END + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ + } \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_IO_H +// End of hal_io.h diff --git a/packages/hal/i386/arch/current/include/i386.inc b/packages/hal/i386/arch/current/include/i386.inc new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/i386.inc @@ -0,0 +1,65 @@ +##============================================================================= +## +## i386.inc +## +## i386 assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 1999-01-20 +## Purpose: i386 definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the i386 +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#------------------------------------------------------------------------------ +# Exception, interrupt and thread context save area layout +# The layout of this structure is also defined in "hal_arch.h", for C +# code. Do not change this without changing that (or vice versa). + + # See SYSV ABI4, i386 supplement (page 37-38) + # http://www.sco.com/products/layered/develop/devspecs/abi386-4.pdf + + # Callee save registers (eax, ecx, and edx are scratch registers) + .equ i386reg_esp, 0 + .equ i386reg_next_context, 4 # only used when dropping through... + .equ i386reg_ebp, 8 # ...from switch_ to load_context. + .equ i386reg_ebx, 12 + .equ i386reg_esi, 16 + .equ i386reg_edi, 20 + .equ i386reg_context_size, 24 + +#------------------------------------------------------------------------------ +# end of i386.inc diff --git a/packages/hal/i386/arch/current/include/pkgconf/hal_i386.h b/packages/hal/i386/arch/current/include/pkgconf/hal_i386.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/include/pkgconf/hal_i386.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_PKGCONF_HAL_I386_H +#define CYGONCE_PKGCONF_HAL_I386_H +// ==================================================================== +// +// pkgconf/hal_i386.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-01-12 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_I386 { + display "i386 architecture" + type radio + parent CYGPKG_HAL + target i386 + description " + The i386 architecture HAL package provides generic + support for this processor architecture. It is also + necessary to select a specific target platform HAL + package." + } + + }}CFG_DATA */ + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_I386_H */ +/* EOF hal_i386.h */ diff --git a/packages/hal/i386/arch/current/src/PKGconf.mak b/packages/hal/i386/arch/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/src/PKGconf.mak @@ -0,0 +1,64 @@ +#============================================================================== +# +# makefile +# +# hal/i386/arch/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# October 31, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_i386 +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_misc.c context.S +OTHER_OBJS := +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + +.PHONY: ldscript.clean + +vectors.stamp: $(PACKAGE)_vectors.o + $(CP) $< $(PREFIX)/lib/vectors.o + @$(TOUCH) $@ + +vectors.clean: + $(RM) $(PREFIX)/lib/vectors.o $(PACKAGE)_vectors.o + $(RM) vectors.stamp + +ldscript.stamp: i386.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ + +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp + diff --git a/packages/hal/i386/arch/current/src/context.S b/packages/hal/i386/arch/current/src/context.S new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/src/context.S @@ -0,0 +1,177 @@ +##============================================================================= +## +## context.S +## +## i386 context switch code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 1999-01-20 +## Purpose: i386 context switch code +## Description: This file contains implementations of the thread context +## switch routines. It also contains the longjmp() and setjmp() +## routines. +## Based on PowerPC context.S, using data from SYSV ABI4, i386 +## supplement (page 37-38) +## http://www.sco.com/products/layered/develop/devspecs/abi386-4.pdf +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include "cyg/hal/i386.inc" + +#------------------------------------------------------------------------------ +# function declaration macro + +#define FUNC_START(name) \ + .globl name; \ +name: + +#------------------------------------------------------------------------------ +# hal_thread_switch_context +# Switch thread contexts +# : 0(%esp) : return address +# : 4(%esp) : address of sp of next thread to execute +# : 8(%esp) : address of sp save location of current thread +# +# %eax, %ecx, and %edx are ours to abuse. + +FUNC_START(hal_thread_switch_context) + movl 4(%esp),%eax # next context ptr + movl 8(%esp),%edx # this context ptr + + # Make room on the stack for the context + movl %esp,%ecx # keep original SP + sub $i386reg_context_size,%esp + + # Save next context ptr in this context. Necessary because + # hal_thread_load_context expects to find the ptr on the stack, + # not in a register as on PPC. + movl %eax,i386reg_next_context(%esp) + + # Save registers + movl %ecx,i386reg_esp(%esp) # original esp + movl %ebp,i386reg_ebp(%esp) + movl %ebx,i386reg_ebx(%esp) + movl %esi,i386reg_esi(%esp) + movl %edi,i386reg_edi(%esp) + + # Store the context ptr + movl %esp,(%edx) + + # Now fall through to hal_thread_load_context + + +#------------------------------------------------------------------------------ +# hal_thread_load_context +# Load thread context +# : 4(%esp) = i386reg_next_context(%esp) = address of sp of thread to execute +# Note that this function is also the second half of hal_thread_switch_context +# and is simply dropped into from it. +# +# %eax, %ecx, and %edx are ours to abuse. + +FUNC_START(hal_thread_load_context) + movl i386reg_next_context(%esp),%eax # get new context ptr + movl (%eax),%eax + + # Restore registers + movl i386reg_ebp(%eax),%ebp + movl i386reg_ebx(%eax),%ebx + movl i386reg_esi(%eax),%esi + movl i386reg_edi(%eax),%edi + movl i386reg_esp(%eax),%esp + + ret + + +#------------------------------------------------------------------------------ +# HAL longjmp, setjmp implementations +# hal_setjmp saves only to callee save registers ebp, ebx, esi, edi and +# and esp+pc into buffer supplied in 4(esp) +# Note: These definitions are repeated in hal_arch.h. If changes are required +# remember to update both sets. + +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_EBP 1 +#define CYGARC_JMP_BUF_EBX 2 +#define CYGARC_JMP_BUF_ESI 3 +#define CYGARC_JMP_BUF_EDI 4 +#define CYGARC_JMP_BUF_PC 5 + +#define CYGARC_JMP_BUF_SIZE 6 + +FUNC_START(hal_setjmp) + # Get jmpbuf pointer + movl 4(%esp),%eax + + # Save regular registers + movl %ebp,CYGARC_JMP_BUF_EBP*4(%eax) + movl %ebx,CYGARC_JMP_BUF_EBX*4(%eax) + movl %esi,CYGARC_JMP_BUF_ESI*4(%eax) + movl %edi,CYGARC_JMP_BUF_EDI*4(%eax) + + # Stack and PC + movl %esp,CYGARC_JMP_BUF_SP*4(%eax) + movl 0(%esp),%ebx + movl %ebx,CYGARC_JMP_BUF_PC*4(%eax) + + # Return 0 + xor %eax,%eax + ret + + +# hal_longjmp loads state from 4(esp) and returns to PC stored in state + +FUNC_START(hal_longjmp) + # Get return value + movl 8(%esp),%eax + + # Get jmpbuf pointer + movl 4(%esp),%ecx + + # Restore regular registers + movl CYGARC_JMP_BUF_EBP*4(%ecx),%ebp + movl CYGARC_JMP_BUF_EBX*4(%ecx),%ebx + movl CYGARC_JMP_BUF_ESI*4(%ecx),%esi + movl CYGARC_JMP_BUF_EDI*4(%ecx),%edi + + # Restore stack pointer + movl CYGARC_JMP_BUF_SP*4(%ecx),%esp + + # Put return address on stack + movl CYGARC_JMP_BUF_PC*4(%ecx),%edx + movl %edx,0(%esp) + + ret + +#----------------------------------------------------------------------------- +# End of context.S diff --git a/packages/hal/i386/arch/current/src/hal_misc.c b/packages/hal/i386/arch/current/src/hal_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/src/hal_misc.c @@ -0,0 +1,150 @@ +//=========================================================================== +// +// hal_misc.c +// +// HAL miscellaneous functions +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: proven +// Date: 1999-02-20 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//=========================================================================== + +#include + +#include + +#include + +//--------------------------------------------------------------------------- + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; + +void +cyg_hal_invoke_constructors (void) +{ +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) + (*p) (); +#endif +} + +//--------------------------------------------------------------------------- +// Determine the index of the ls bit of the supplied mask. + +cyg_uint32 +hal_lsbit_index(cyg_uint32 mask) +{ + cyg_uint32 n = mask; + + static const signed char tab[64] = + { -1, 0, 1, 12, 2, 6, 0, 13, 3, 0, 7, 0, 0, 0, 0, 14, 10, + 4, 0, 0, 8, 0, 0, 25, 0, 0, 0, 0, 0, 21, 27 , 15, 31, 11, + 5, 0, 0, 0, 0, 0, 9, 0, 0, 24, 0, 0 , 20, 26, 30, 0, 0, 0, + 0, 23, 0, 19, 29, 0, 22, 18, 28, 17, 16, 0 + }; + + n &= ~(n-1UL); + n = (n<<16)-n; + n = (n<<6)+n; + n = (n<<4)+n; + + return tab[n>>26]; +} + +//--------------------------------------------------------------------------- +// Determine the index of the ms bit of the supplied mask. + +cyg_uint32 +hal_msbit_index(cyg_uint32 mask) +{ + cyg_uint32 x = mask; + cyg_uint32 w; + + // Phase 1: make word with all ones from that one to the right. + x |= x >> 16; + x |= x >> 8; + x |= x >> 4; + x |= x >> 2; + x |= x >> 1; + + // Phase 2: calculate number of "1" bits in the word. + w = (x & 0x55555555) + ((x >> 1) & 0x55555555); + w = (w & 0x33333333) + ((w >> 2) & 0x33333333); + w = w + (w >> 4); + w = (w & 0x000F000F) + ((w >> 8) & 0x000F000F); + return (cyg_uint32)((w + (w >> 16)) & 0xFF); + +} + +//--------------------------------------------------------------------------- +// First level C exception handler. + +void +cyg_hal_exception_handler(HAL_SavedRegisters *regs) +{ + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + +#ifdef CYGIMP_EXCEPTIONS + + cyg_hal_deliver_exception( regs->vector>>8, (CYG_ADDRWORD)regs ); + +#endif + + return; +} + +//--------------------------------------------------------------------------- +// End of hal_misc.c diff --git a/packages/hal/i386/arch/current/src/i386.ld b/packages/hal/i386/arch/current/src/i386.ld new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/src/i386.ld @@ -0,0 +1,139 @@ +//========================================================================== +// +// i386.ld +// +// Linker script for i386 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-01-18 +// Purpose: i386 Linker script +// +//####DESCRIPTIONEND#### +// +//========================================================================== +STARTUP(vectors.o) +ENTRY(_start) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 8 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + + +#define SECTIONS_BEGIN + +#define SECTION_vectors(_region_, _vma_, _lma_) \ + .vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP(*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = .; \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { _FIXUP_START_ = ABSOLUTE(.); *(.fixup) _FIXUP_END_ = ABSOLUTE(.);} \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { _EXCEPT_START_ = ABSOLUTE(.); *(.gcc_except_table) \ + _EXCEPT_END_ = ABSOLUTE(.);} \ + > _region_ + +#define SECTION_rel__got(_region_, _vma_, _lma_) \ + .rel.got _vma_ : _lma_ \ + { FORCE_OUTPUT; \ + *(.rel.got) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE(.); *(.data*) \ + _GOT1_START_ = ABSOLUTE(.); *(.got1) _GOT1_END_ = ABSOLUTE(.); \ + /* Put .ctors and .dtors next to the .got2 section, so that */ \ + /* the pointers get relocated with -mrelocatable. */ \ + . = ALIGN(8); __CTOR_LIST__ = ABSOLUTE(.); \ + KEEP(*(SORT(.ctors*))) __CTOR_END__ = ABSOLUTE(.); \ + __DTOR_LIST__ = ABSOLUTE(.); \ + KEEP(*(SORT(.dtors*))) __DTOR_END__ = ABSOLUTE(.); \ + . = ALIGN(8); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE(.); *(.got2) _GOT2_END_ = ABSOLUTE(.); \ + _GOT_START_ = ABSOLUTE(.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE(. + 32768); \ + _SDA_BASE_ = ABSOLUTE(.); *(.got.plt) *(.got) \ + _GOT_END_ = ABSOLUTE(.); *(.dynamic) *(.eh_frame) \ + /* We want the small data sections together, so single-instruction */ \ + /* offsets can access them all, and initialized data all before */ \ + /* uninitialized, so we can shorten the on-disk segment size. */ \ + _SDATA_START_ = ABSOLUTE(.); *(.sdata) } \ + > _region_ \ + __rom_data_start = LOADADDR(.data); \ + __ram_data_end = .; PROVIDE(__ram_data_end = .); \ + _edata = .; PROVIDE (edata = .); + +#define SECTION_sbss(_region_, _vma_, _lma_) \ + .sbss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + _SBSS_START_ = ABSOLUTE(.); *(.sbss) _SBSS_END_ = ABSOLUTE(.); \ + *(.scommon) } \ + > _region_ + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.dynbss) *(.bss) *(COMMON) } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include +#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/i386/arch/current/src/vectors.S b/packages/hal/i386/arch/current/src/vectors.S new file mode 100644 --- /dev/null +++ b/packages/hal/i386/arch/current/src/vectors.S @@ -0,0 +1,74 @@ +##============================================================================= +## +## vectors.S +## +## x86 exception vectors +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 1999-01-07 +## Purpose: x86 exception vectors +## Description: This file defines the code placed into the exception +## vectors. It also contains the first level default VSRs +## that save and restore state for both exceptions and +## interrupts. +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#============================================================================== + + .file "vectors.S" + +# The Linux synthetic target defines its own startup. +#ifdef CYGPKG_HAL_I386_LINUX + .extern _linux_entry + .text + .globl _start + +_start: + jmp _linux_entry + +#else ## ifdef CYGPKG_HAL_I386_LINUX +#============================================================================== +# Real startup code. We jump here from the various reset vectors to set up the +# world. + + .text + .globl _start + +_start: +#error "Not defined." + +#endif ## ifndef CYGPKG_HAL_I386_LINUX + +#------------------------------------------------------------------------------ +# end of vectors.S diff --git a/packages/hal/i386/linux/current/ChangeLog b/packages/hal/i386/linux/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/ChangeLog @@ -0,0 +1,217 @@ +1999-04-08 John Dallaway + + * include/pkgconf/mlt_*.*: Use double underscore substitution + for period character in SECTION_* macro names (PR 19787) + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-22 Jesper Skov + + * src/linux.S: Added comment. + Doh! Managed to break compilation with a comment... + +1999-03-16 Jesper Skov + PR 19483 + * src/linux.S (cyg_hal_hardware_init): Fiddled some more with the + bits to no avail. + + * src/hal_startup.c: + Renamed hal_ to cyg_hal_. + Added exception handling. + +1999-03-12 Jesper Skov + + * src/hal_startup.c (cyg_hal_isr_init): Initialize ISR table with + pointers to default ISR routine. + +1999-03-12 Jesper Skov + PR 19486 + * src/linux.S (cyg_hal_hardware_init): Only enable zero divide + exceptions. + +1999-03-11 Jesper Skov + + * src/hal_startup.c: + * src/entry.c: + Renamed hal_isr_init to cyg_hal_isr_init. + + * src/hal_startup.c: Also catch SIGFPE. + + * src/entry.c: Call cyg_hal_hardware_init. + + * src/linux.S: [added] + * src/PKGconf.mak: + Added file to hold startup assembly code. + +1999-03-11 John Dallaway + + * include/pkgconf/*.ldi: add copyright notices + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-25 Nick Garnett + + * src/hal_startup.c: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + +1999-02-22 Jesper Skov + + * src/syscall-i386-linux-1.0.S: Added copyright header. + +1999-02-20 Jonathan Larmour + + * src/hal_startup.c: + Rename hal_interrupts_deffered -> hal_interrupts_deferred + Rename CYG_ISR/VSR_* -> CYGNUM_HAL_ISR/VSR_* in line with HAL changes + Rename CYG_VECTOR_RTC -> CYGNUM_HAL_INTERRUPT_RTC + + * src/syscall-i386-linux-1.0.S: + Add a FIX ME + +1999-02-08 John Dallaway + + * include/pkgconf/ram.mlt: New memory layout save file + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-29 Jesper Skov + + * include/pkgconf/hal_i386_linux.h: Changed CDL type back to radio + to get consistent ConfigTool output. + +1999-01-27 Jesper Skov + + * include/pkgconf/ram.ldi: Commented out the rel_got change. + +1999-01-25 Jesper Skov + + * include/pkgconf/ram.ldi: Added rel.got section. + +1999-01-22 Jesper Skov + + * src/hal_startup.c: Moved external declarations into top-level + scope to avoid compiler warning. + +1999-01-19 Jesper Skov + + * include/pkgconf/hal_i386_linux.h: Removed startup + config. Changed linux entry to dummy instead of bool. + +1999-01-12 Jesper Skov + + * include/pkgconf/hal_i386_linux.h: Added config for real-time + timer. + +1999-01-12 Jesper Skov + + * src/hal_diag.c: Removed hal_diag_write_line. + + * src/entry.c: Removed main/argv stuff. + +1999-01-12 Jesper Skov + + * include/pkgconf/hal_i386_linux.h: Added. + +1999-01-11 Jesper Skov + + * src/hal_startup.c (hal_default_vsr): + * src/linux.ld (cyg_hal_sched_lock): + Added C-symbol reference to the scheduler lock. + +1999-01-11 Jesper Skov + + * src/hal_startup.c (hal_default_vsr): Allow interrupt disable + count to be bigger than 1. + +1999-01-11 Jesper Skov + + * src/linux.ld: Added fix me. Remember to clean up. + + * src/hal_startup.c: Removed bogus include statement. + Added CYGPKG_KERNEL config handling. + + * src/hal_diag.c: Removed bogus include statements and functions. + +1999-01-07 Jesper Skov + + * src/hal_startup.c (hal_isr_init): Use CYG_VECTOR_RTC rather than + hardcoded value. + +1999-01-07 Jesper Skov + + * src/syscall-i386-linux-1.0.S: + * src/hal_diag.c: + * src/PKGconf.mak: + Removed tabs & fixed comment style. + +1999-01-07 Jesper Skov + + * src/PKGconf.mak: Cleaned up. + + * src/entry.c: Added (from proven's crtbegin.c). + + * src/linux.ld: Added. + + * src/hal_startup.cxx: (Deleted) + * src/hal_startup.c: (Added) + Changed code to C, cleaned up. + +1999-01-06 Jesper Skov + + * src/hal_diag.c: Fixed warnings. Output chars in batches to avoid + problems with pkgtest - also improves performance. + +1999-01-06 Jesper Skov + + * src/syscall-i386-linux-1.0.S: Set behavior to match __ELF__. + +1998-12-18 Jesper Skov + + * src/syscall-i386-linux-1.0.S: + * src/hal_startup.cxx: + Fixed compiler warnings. + +Fri Dec 4 13:49:03 GMT 1998 + + * src/syscall-i386-linux-1.0.S: Fix to work with Bart's latest tools. + For some reason it doesn't define __ELF__ but, we really don't care. + +Mon Nov 9 15:18:11 GMT 1998 Chris Provenzano + + Initial i386 linux port. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/i386/linux/current/include/hal_diag.h b/packages/hal/i386/linux/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/include/hal_diag.h @@ -0,0 +1,69 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven +// Date: 1998-10-05 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include "cyg/hal/hal_diag.h" +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include + +//----------------------------------------------------------------------------- +// functions implemented in hal_diag.c + +externC void hal_diag_init( void ); + +externC void hal_diag_read_char(char *c); + +externC void hal_diag_write_char(char c); + +//----------------------------------------------------------------------------- + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H diff --git a/packages/hal/i386/linux/current/include/pkgconf/hal_i386_linux.h b/packages/hal/i386/linux/current/include/pkgconf/hal_i386_linux.h new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/include/pkgconf/hal_i386_linux.h @@ -0,0 +1,78 @@ +#ifndef CYGONCE_PKGCONF_HAL_I386_LINUX_H +#define CYGONCE_PKGCONF_HAL_I386_LINUX_H +// ==================================================================== +// +// pkgconf/hal_i386_linux.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-01-12 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_I386_LINUX { + display "Linux i386 Synthetic Target" + type radio + parent CYGPKG_HAL_I386 + platform linux + description " + The Linux i386 Synthetic Target HAL package provides the + support needed to run eCos binaries on top of the i386 + Linux kernel." + } + + cdl_option CYGSEM_HAL_I386_LINUX_REAL_TIME { + display "Use Linux real-time timer" + parent CYGPKG_HAL_I386_LINUX + description " + By default the eCos timer will driven by a virtual timer, + meaning that it will only tick when the Linux task is + executing. This prevents (to some degree) time skew in + the eCos kernel due to heavy load on Linux. By checking + this option, the eCos timer can be driven by the Linux + real-time timer instead." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_I386_LINUX_STARTUP ram +#undef CYGSEM_HAL_I386_LINUX_REAL_TIME + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_I386_LINUX_H */ +/* EOF hal_i386_linux.h */ diff --git a/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.ldi b/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.ldi @@ -0,0 +1,54 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x00000000, LENGTH = 0x800000 +} + +// The rel__got section doesn't result in any output but the linker +// complains if it is not present. It is necessary when compiling +// with CYGIMP_LIBC_MALLOC_CXX_DELETE_CALLS_FREE=true but causes +// problems with BFD when this option is false. + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0x0, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) +// SECTION_rel__got (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.mlt b/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 800000 0 ! +section vectors 0 1 0 1 1 1 1 1 0 0 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! diff --git a/packages/hal/i386/linux/current/src/PKGconf.mak b/packages/hal/i386/linux/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/PKGconf.mak @@ -0,0 +1,46 @@ +#============================================================================== +# +# makefile +# +# hal/i386/linux/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# October 31, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + + +PACKAGE := hal_i386_linux +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c hal_startup.c syscall-i386-linux-1.0.S entry.c \ + linux.S +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := + +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/hal/i386/linux/current/src/entry.c b/packages/hal/i386/linux/current/src/entry.c new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/entry.c @@ -0,0 +1,58 @@ +//========================================================================== +// +// entry.c +// +// Entry code for Linux synthetic target. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven, jskov +// Date: 1999-01-06 +// Purpose: Entry point for Linux synthetic target. +// +//####DESCRIPTIONEND#### +// +//========================================================================= + +#include + +externC void cyg_hal_isr_init( void ); +externC void cyg_hal_invoke_constructors( void ); +externC void cyg_start( void ); +externC void cyg_hal_hardware_init( void ); + +void _linux_entry( void ) +{ + // Should get argc argv + cyg_hal_hardware_init(); + cyg_hal_isr_init(); + cyg_hal_invoke_constructors(); + cyg_start(); +} + +//----------------------------------------------------------------------------- +// End of entry.c diff --git a/packages/hal/i386/linux/current/src/hal_diag.c b/packages/hal/i386/linux/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/hal_diag.c @@ -0,0 +1,78 @@ +//============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven +// Date: 1998-10-05 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include // base types + +#include + +//----------------------------------------------------------------------------- + +void hal_diag_init( void ) +{ +} + +externC unsigned long cyg_hal_sys_write(int, const void*, long); +externC unsigned long cyg_hal_sys_read(int, void*, long); + +// Write characters to a buffer which is flushed at newline/overflow to +// improve performance. +void hal_diag_write_char(char __c) +{ + static cyg_int32 __index = 0; + static cyg_uint8 __buffer[128]; + + __buffer[__index++] = __c; + + if ('\n' == __c || 128 == __index) { + cyg_hal_sys_write(1, &__buffer[0], __index); + __index = 0; + } +} + +void hal_diag_read_char(char *c) +{ + cyg_hal_sys_read(0, c, 1); +} + +//----------------------------------------------------------------------------- +// End of hal_diag.c diff --git a/packages/hal/i386/linux/current/src/hal_startup.c b/packages/hal/i386/linux/current/src/hal_startup.c new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/hal_startup.c @@ -0,0 +1,171 @@ +//============================================================================= +// +// hal_startup.c +// +// HAL bootstrap code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven, jskov +// Date: 1998-10-06 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGPKG_KERNEL +#include +#include // cyg_scheduler_lock +#endif + +#include // interrupt stuff +#include // Architecture specific definitions + +#include // diag_printf +#include // ASSERTION macros + + +//---------------------------------------------------------------------------- +// ISR tables +volatile CYG_ADDRESS cyg_hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +volatile CYG_ADDRWORD cyg_hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +volatile CYG_ADDRESS cyg_hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +volatile CYG_ADDRESS cyg_hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +// Interrupts start disabled +volatile int cyg_hal_interrupts_disabled = 1; +volatile int cyg_hal_interrupts_deferred; +volatile int cyg_hal_interrupts_unhandled[CYGNUM_HAL_ISR_COUNT]; + +//----------------------------------------------------------------------------- + +typedef cyg_uint32 (*callsig_t)(int vector, cyg_uint32); + +externC void interrupt_end(CYG_ADDRESS, CYG_ADDRESS, CYG_ADDRESS); +extern volatile cyg_uint32 cyg_scheduler_sched_lock; + +externC void cyg_hal_default_interrupt_vsr(int vector) +{ + callsig_t func; + cyg_uint32 ret; + + if (cyg_hal_interrupts_disabled) { + cyg_hal_interrupts_unhandled[vector] = 1; + cyg_hal_interrupts_deferred = 1; + return; + } + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // Increment the scheduler lock when the kernel is present. + cyg_scheduler_sched_lock++; +#endif + + cyg_hal_interrupts_unhandled[vector] = 0; + func = (callsig_t) cyg_hal_interrupt_handlers[vector]; + ret = func(vector, cyg_hal_interrupt_data[vector]); + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // We only need to call _interrupt_end() when there is a kernel + // present to do any tidying up. + interrupt_end(ret, cyg_hal_interrupt_objects[vector], (CYG_ADDRESS) NULL); +#endif +} + +externC void cyg_hal_default_exception_vsr(int vector) +{ +#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ + defined(CYGPKG_HAL_EXCEPTIONS) + + { + int __pre_state = cyg_hal_interrupts_disabled++; + + cyg_hal_deliver_exception( vector, 0 ); + + cyg_hal_interrupts_disabled = __pre_state; + } + +#else + + CYG_FAIL("Exception!!!"); + +#endif +} + +//--------------------------------------------------------------------------- +// Default ISR + +externC cyg_uint32 +cyg_hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + diag_printf("Interrupt: %d\n", vector); + + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} + +//----------------------------------------------------------------------------- +// Initialization on the VSRs. +struct hal_sigaction { + void (*hal_handler)(int); + long hal_mask; + int hal_flags; + void (*hal_bogus)(int); +} act, oact; +extern int cyg_hal_sys_sigaction(int, const struct hal_sigaction*, + struct hal_sigaction*); +externC void cyg_hal_isr_init(void) +{ + int i; + + // ISR setup + for (i = 0; i < CYGNUM_HAL_ISR_COUNT; i++) { + cyg_hal_interrupt_handlers[i] = (CYG_ADDRESS) &cyg_hal_default_isr; + } + + // Interrupt VSR setup + act.hal_handler = cyg_hal_default_interrupt_vsr; + act.hal_mask = 0; + act.hal_flags = 0; + cyg_hal_sys_sigaction(CYGNUM_HAL_INTERRUPT_RTC, &act, &oact); + + // Exception VSR setup + act.hal_handler = cyg_hal_default_exception_vsr; + act.hal_mask = 0; + act.hal_flags = 0; + cyg_hal_sys_sigaction(CYGNUM_HAL_VECTOR_SIGSEGV, &act, &oact); + cyg_hal_sys_sigaction(CYGNUM_HAL_VECTOR_SIGBUS, &act, &oact); + cyg_hal_sys_sigaction(CYGNUM_HAL_VECTOR_SIGFPE, &act, &oact); +} + +//----------------------------------------------------------------------------- +// End of hal_startup.c diff --git a/packages/hal/i386/linux/current/src/linux.S b/packages/hal/i386/linux/current/src/linux.S new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/linux.S @@ -0,0 +1,74 @@ +##============================================================================= +## +## linux.S +## +## Linux setup +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 1999-03-11 +## Purpose: Linux setup +## Description: This file contains any code needed to initialize the +## CPU on an i386/Linux synthetic target. +## +######DESCRIPTIONEND#### +## +##============================================================================= + + .globl cyg_hal_hardware_init +cyg_hal_hardware_init: + push %ebp + mov %esp,%ebp + sub $0x4,%esp + + ## FIXME: The below turns out to have no effect. At some point + ## before the cause_fpe test of signal2.c gets executes, the + ## flags have been reverted. Don't know what's causing it. Are + ## magic Linux calls required perhaps? + ## Maybe it is because a segv happens before the FPE.. + + ## Enable floating point exceptions. Bit mask: + ## 1 - invalid operation + ## 2 - denormalized operand + ## 4 - zero divide + ## 8 - overflow + ## 16 - underflow + ## 32 - precision + fstcw -4(%ebp) + movl -4(%ebp),%eax + andb $(~0x04),%al + movl %eax,-4(%ebp) + fldcw -4(%ebp) + + mov %ebp,%esp + pop %ebp + ret + +#------------------------------------------------------------------------------ +# end of linux.S diff --git a/packages/hal/i386/linux/current/src/syscall-i386-linux-1.0.S b/packages/hal/i386/linux/current/src/syscall-i386-linux-1.0.S new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/src/syscall-i386-linux-1.0.S @@ -0,0 +1,577 @@ +//============================================================================= +// +// syscall-i386-linux-1.0.S +// +// Linux system call interface functions for i386. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// October 31, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): proven +// Contributors:proven +// Date: 1998-10-06 +// Description: Machine dependent syscalls for i386/i486/i586 +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +// Force __ELF__ for eCos/Linux. +#ifndef __ELF__ +#define __ELF__ +#endif + +#ifndef _SYS_SYSCALL_H +#define _SYS_SYSCALL_H + +#define SYS_setup 0 // Used only by init, to get system going. +#define SYS_exit 1 +#define SYS_fork 2 +#define SYS_read 3 +#define SYS_write 4 +#define SYS_open 5 +#define SYS_close 6 +#define SYS_waitpid 7 +#define SYS_creat 8 +#define SYS_link 9 +#define SYS_unlink 10 +#define SYS_execve 11 +#define SYS_chdir 12 +#define SYS_time 13 +#define SYS_prev_mknod 14 +#define SYS_chmod 15 +#define SYS_chown 16 +#define SYS_break 17 +#define SYS_oldstat 18 +#define SYS_lseek 19 +#define SYS_getpid 20 +#define SYS_mount 21 +#define SYS_umount 22 +#define SYS_setuid 23 +#define SYS_getuid 24 +#define SYS_stime 25 +#define SYS_ptrace 26 +#define SYS_alarm 27 +#define SYS_oldfstat 28 +#define SYS_pause 29 +#define SYS_utime 30 +#define SYS_stty 31 +#define SYS_gtty 32 +#define SYS_access 33 +#define SYS_nice 34 +#define SYS_ftime 35 +#define SYS_sync 36 +#define SYS_kill 37 +#define SYS_rename 38 +#define SYS_mkdir 39 +#define SYS_rmdir 40 +#define SYS_dup 41 +#define SYS_pipe 42 +#define SYS_times 43 +#define SYS_prof 44 +#define SYS_brk 45 +#define SYS_setgid 46 +#define SYS_getgid 47 +#define SYS_signal 48 +#define SYS_geteuid 49 +#define SYS_getegid 50 +#define SYS_acct 51 +#define SYS_phys 52 +#define SYS_lock 53 +#define SYS_ioctl 54 +#define SYS_fcntl 55 +#define SYS_mpx 56 +#define SYS_setpgid 57 +#define SYS_ulimit 58 +#define SYS_oldolduname 59 +#define SYS_umask 60 +#define SYS_chroot 61 +#define SYS_prev_ustat 62 +#define SYS_dup2 63 +#define SYS_getppid 64 +#define SYS_getpgrp 65 +#define SYS_setsid 66 +#define SYS_sigaction 67 +#define SYS_siggetmask 68 +#define SYS_sigsetmask 69 +#define SYS_setreuid 70 +#define SYS_setregid 71 +#define SYS_sigsuspend 72 +#define SYS_sigpending 73 +#define SYS_sethostname 74 +#define SYS_setrlimit 75 +#define SYS_getrlimit 76 +#define SYS_getrusage 77 +#define SYS_gettimeofday 78 +#define SYS_settimeofday 79 +#define SYS_getgroups 80 +#define SYS_setgroups 81 +#define SYS_select 82 +#define SYS_symlink 83 +#define SYS_oldlstat 84 +#define SYS_readlink 85 +#define SYS_uselib 86 +#define SYS_swapon 87 +#define SYS_reboot 88 +#define SYS_readdir 89 +#define SYS_mmap 90 +#define SYS_munmap 91 +#define SYS_truncate 92 +#define SYS_ftruncate 93 +#define SYS_fchmod 94 +#define SYS_fchown 95 +#define SYS_getpriority 96 +#define SYS_setpriority 97 +#define SYS_profil 98 +#define SYS_statfs 99 +#define SYS_fstatfs 100 +#define SYS_ioperm 101 +#define SYS_socketcall 102 +#define SYS_klog 103 +#define SYS_setitimer 104 +#define SYS_getitimer 105 +#define SYS_prev_stat 106 +#define SYS_prev_lstat 107 +#define SYS_prev_fstat 108 +#define SYS_olduname 109 +#define SYS_iopl 110 +#define SYS_vhangup 111 +#define SYS_idle 112 +#define SYS_vm86 113 +#define SYS_wait4 114 +#define SYS_swapoff 115 +#define SYS_sysinfo 116 +#define SYS_ipc 117 +#define SYS_fsync 118 +#define SYS_sigreturn 119 +#define SYS_clone 120 +#define SYS_setdomainname 121 +#define SYS_uname 122 +#define SYS_modify_ldt 123 +#define SYS_adjtimex 124 +#define SYS_mprotect 125 +#define SYS_sigprocmask 126 +#define SYS_create_module 127 +#define SYS_init_module 128 +#define SYS_delete_module 129 +#define SYS_get_kernel_syms 130 +#define SYS_quotactl 131 +#define SYS_getpgid 132 +#define SYS_fchdir 133 +#define SYS_bdflush 134 +#define SYS_sysfs 135 +#define SYS_personality 136 +#define SYS_afs_syscall 137 // Syscall for Andrew File System +#define SYS_setfsuid 138 +#define SYS_setfsgid 139 +#define SYS__llseek 140 +#define SYS_getdents 141 +#define SYS__newselect 142 +#define SYS_flock 143 +#define SYS_syscall_flock 143 +#define SYS_msync 144 +#define SYS_readv 145 +#define SYS_syscall_readv 145 +#define SYS_writev 146 +#define SYS_syscall_writev 146 +#define SYS_getsid 147 +#define SYS_fdatasync 148 +#define SYS__sysctl 149 +#define SYS_mlock 150 +#define SYS_munlock 151 +#define SYS_mlockall 152 +#define SYS_munlockall 153 +#define SYS_sched_setparam 154 +#define SYS_sched_getparam 155 +#define SYS_sched_setscheduler 156 +#define SYS_sched_getscheduler 157 +#define SYS_sched_yield 158 +#define SYS_sched_get_priority_max 159 +#define SYS_sched_get_priority_min 160 +#define SYS_sched_rr_get_interval 161 +#define SYS_nanosleep 162 +#define SYS_mremap 163 + +#endif // + + +#ifdef __ELF__ + +#define NAME(X) cyg_hal_sys_##X +#define END(X) 1: ; .type NAME(X),@function ; .size NAME(X),1b - NAME(X) + +#else + +#define NAME(X) _cyg_hal_sys_##X +#define END(X) + +#endif + +#define SYSCALL0(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %ebx; \ + ret; \ + \ + END(x) + +#define SYSCALL1(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + mov 8(%esp), %ebx; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %ebx; \ + ret; \ + \ + END(x) + +#define SYSCALL2(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + mov 8(%esp), %ebx; \ + mov 12(%esp), %ecx; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %ebx; \ + ret; \ + \ + END(x) + +#define STATCALL2(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + mov 8(%esp), %ebx; \ + mov 12(%esp), %ecx; \ + lea SYS_prev_##x, %eax; \ + int $0x80; \ + pop %ebx; \ + ret; \ + END(x) + +#define SYSCALL3(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + mov 8(%esp), %ebx; \ + mov 12(%esp), %ecx; \ + mov 16(%esp), %edx; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %ebx; \ + ret; \ + END(x) + + +#define SYSCALL4(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + push %esi; \ + mov 12(%esp), %ebx; \ + mov 16(%esp), %ecx; \ + mov 20(%esp), %edx; \ + mov 24(%esp), %esi; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %esi; \ + pop %ebx; \ + ret; \ + END(x) + +#define SYSCALL5(x) \ + .globl NAME(x) ; \ + \ +NAME(x): \ + \ + push %ebx; \ + push %esi; \ + push %edi; \ + mov 16(%esp), %ebx; \ + mov 20(%esp), %ecx; \ + mov 24(%esp), %edx; \ + mov 28(%esp), %esi; \ + mov 32(%esp), %edi; \ + lea SYS_##x, %eax; \ + int $0x80; \ + pop %edi; \ + pop %esi; \ + pop %ebx; \ + ret; \ + END(x) + +//========================================================================= +// exit 1 select 82 +// fork 2 socketcall 102 +// read 3 readv 145 +// write 4 writev 146 +// open 5 +// creat 8 +// link 9 +// unlink 10 +// execve 11 +// chdir 12 +// chmod 15 +// chown 16 +// lseek 19 +// rename 38 +// dup 41 +// pipe 42 +// ioctl 54 +// fcntl 55 +// dup2 63 +// readdir 89 +// ftruncate 93 +// fchmod 94 +// fchown 95 +// + +// Initial asm stuff for all functions. + .text + .align 2 + + +//========================================================================== +// machdep_sys_gettimeofday() +SYSCALL3(gettimeofday) + +//========================================================================== +// machdep_sys_setitimer() +SYSCALL3(sigaction) + +//========================================================================== +// machdep_sys_setitimer() +SYSCALL3(setitimer) + +//========================================================================== +// machdep_sys_getitimer() +SYSCALL2(getitimer) + + + + + + +//========================================================================== +// machdep_sys_read() +SYSCALL3(read) + +//========================================================================== +// machdep_sys_write() +SYSCALL3(write) + +//========================================================================== +// machdep_sys_open() +SYSCALL3(open) + +//========================================================================== +// machdep_sys_close() +SYSCALL1(close) + +//========================================================================== +// machdep_sys_creat() +SYSCALL2(creat) + +//========================================================================== +// machdep_sys_dup2() +SYSCALL2(dup2) + +//========================================================================== +// machdep_sys_fcntl() +SYSCALL3(fcntl) + +//========================================================================== +// machdep_sys_fchown() +SYSCALL3(fchown) + +//========================================================================== +// machdep_sys_fchmod() +SYSCALL2(fchmod) + +//========================================================================== +// machdep_sys_ioctl() +SYSCALL3(ioctl) + +//========================================================================== +// machdep_sys_chown() +SYSCALL3(chown) + +//========================================================================== +// machdep_sys_chmod() +SYSCALL2(chmod) + +//========================================================================== +// machdep_sys_chdir() +SYSCALL1(chdir) + +//========================================================================== +// machdep_sys_unlink() +SYSCALL1(unlink) + +//========================================================================== +// machdep_sys_link() +SYSCALL2(link) + +//========================================================================== +// machdep_sys_rename() +SYSCALL2(rename) + +//========================================================================== +// machdep_sys_lseek() +SYSCALL3(lseek) + +//========================================================================== +// machdep_sys_pipe() +SYSCALL1(pipe) + +//========================================================================== +// machdep_sys_dup() +SYSCALL1(dup) + +//========================================================================== +// machdep_sys_fork() +SYSCALL0(fork) + +//========================================================================== +// machdep_sys_execve() +SYSCALL3(execve) + +//========================================================================== +// machdep_sys_stat() +#ifdef __ELF__ +STATCALL2(stat) +#else +SYSCALL2(stat) +#endif + +//========================================================================== +// machdep_sys_fstat() +#ifdef __ELF__ +STATCALL2(fstat) +#else +SYSCALL2(fstat) +#endif + +//========================================================================== +// machdep_sys_fstat() +#ifdef __ELF__ +STATCALL2(lstat) +#else +SYSCALL2(lstat) +#endif + +//========================================================================== +// machdep_sys_ftruncate() +SYSCALL2(ftruncate) + +//========================================================================== +// Nonstandard calls used to make the system work +// +// ========================================================================== +// machdep_sys_select() + + .globl NAME(select) + +NAME(select): + + push %ebx + lea 8(%esp), %ebx + lea SYS_select, %eax + int $0x80 + pop %ebx + ret + END(select) + +//========================================================================== +// machdep_sys_wait4() +SYSCALL4(wait4) + +//========================================================================== +// machdep_sys_readdir() +SYSCALL3(readdir) + +//========================================================================== +// machdep_sys_socketcall() +SYSCALL2(socketcall) + + +SYSCALL1(exit) +SYSCALL3(sigprocmask) + +//========================================================================== +// machdep_sys_sigsuspend() + + .globl NAME(sigsuspend) + +NAME(sigsuspend): + + push %ebp + mov %esp,%ebp + push %edi + push %esi + push %ebx + mov 8(%ebp), %edx + mov (%edx), %edx + lea SYS_sigsuspend, %eax + int $0x80 + pop %ebx + pop %esi + pop %edi + mov %ebp,%esp + pop %ebp + ret + END(sigsuspend) + +//========================================================================== +// machdep_sys_readv() +#ifdef HAVE_SYSCALL_READV +SYSCALL3(readv) +#endif + +//========================================================================== +// machdep_sys_writev() +#ifdef HAVE_SYSCALL_WRITEV +SYSCALL3(writev) +#endif + diff --git a/packages/hal/mips/arch/current/ChangeLog b/packages/hal/mips/arch/current/ChangeLog --- a/packages/hal/mips/arch/current/ChangeLog +++ b/packages/hal/mips/arch/current/ChangeLog @@ -1,3 +1,351 @@ +1999-04-30 Jesper Skov + + * src/hal_misc.c: Added vector decoding to the below. + +1999-04-30 Hugo Tyson + + * src/hal_misc.c (hal_init_ctrlc_intr): Chain onto the old value + of the ISR when attaching the ctrl-c ISR; this allows chained + interrupts to work (otherwise a stack-wrecking interrupt loop + occurs). + +1999-04-29 Hugo Tyson + + * include/pkgconf/hal_tx39.h (CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR): + New config option, on by default. + + * src/hal_misc.c (hal_ctrlc_isr): Enable these features on + CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR new config option. + +1999-04-20 Jonathan Larmour + + * include/hal_intr.h: Don't sync TRR if platform sim - it doesn't need + it + + * include/pkgconf/hal_tx39.h: + Allow CYGARC_TX39_PR19846 to override + CYGHWR_HAL_MIPS_TX3904_TRR_REQUIRES_SYNC so that we can do something + sensible in the simulators + + Related to PR 19846 + +1999-04-15 Jonathan Larmour + + * src/tx39.ld: Define __bss_end at the end of the BSS + * src/hal_misc.c (hal_zero_bss): Stop at __bss_end rather than _end + when clearing BSS + These fix PR 19750 + +1999-04-15 Jonathan Larmour + + * src/hal_misc.c: + * src/vectors.S: + Separate parts of cyg_hal_invoke_constructors() out into new functions + cyg_hal_enable_caches() and cyg_hal_debug_init() so that + cyg_hal_invoke_constructors() can be called again safely if + necessary + Related fix to that of PR19642 + +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script + +1999-04-13 Jonathan Larmour + + * include/hal_intr.h (HAL_CLOCK_READ): + Add workaround for tx39 bug - needs to sync and wait for the + write buffer to clear before reading the clock. + Submitted by akira.yokosawa@toshiba.co.jp + + * include/pkgconf/hal_tx39.h + (CYGHWR_HAL_MIPS_TX3904_TRR_REQUIRES_SYNC): Define this by default + to implement above + +1999-04-12 Jonathan Larmour + + * include/hal_intr.h (HAL_VSR_SET_TO_ECOS_HANDLER): Added. + (HAL_VSR_SET): Cast types to CYG_ADDRESS to prevent warnings + + Part of fix for PRs 19731/19607 + +1999-04-09 Jesper Skov + + * src/mips-stub.c: + Moved get_register and put_register to hal_stub.c. + +1999-04-08 John Dallaway + + * src/*.ld: Use double underscore substitution for period + character in SECTION_* macro names (PR 19787) + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-31 Nick Garnett + + * include/hal_cache.h: Added include of hal.h and a test that a + valid set of macros have been added. + Also moved address used in HAL_DCACHE_INVALIDATE_ALL() to + 0x9fc00000, which is the cached ROM space. + +1999-03-24 Nick Garnett + + * src/vectors.S: + Added options to allow different settings for DRAM initialization. + Fixed some ifdef bugs. + + * src/hal_misc.c (cyg_hal_invoke_constructors): + Added ifdefs to control enabling and disabling of timeout + exceptions. + + * include/pkgconf/hal_tx39.h: + Added translations from the user friendly CPU speed settings into + the real CPU frequencies in Hz. + + * include/hal_intr.h: + Added HAL_TX39_DEBUG_TOE_ENABLE() and ...DISABLE, to switch + timeout exceptions on and off. + +1999-03-23 Nick Garnett + + * include/hal_arch.h: + Modified stack size definitions to be more accurate. + +1999-03-22 Jonathan Larmour + + * include/mips-regs.h: Update copyright + + * include/mips-stub.h: Update copyright + + * src/mips-stub.c: Update copyright + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-17 Jonathan Larmour + + * src/hal_misc.c (cyg_hal_user_break): Remove #warning - it doesn't + really provide any useful info, and may unnecessarily worry a user + since it fires in normal situations + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-16 Nick Garnett + + * src/vectors.S: Removed definition of idle thread stack. + +1999-03-15 Nick Garnett + + * include/hal_cache.h: + Changed implementation of HAL_DCACHE_INVALIDATE_ALL() to read from + ROM space rather than RAM. This fixes PR 19510. + +1999-03-12 Nick Garnett + + * src/vectors.S: Modified ROMC and SCS settings in line with + Toshiba's suggestions for compatibility with other CPU variants. + +1999-03-12 Gary Thomas + + * include/hal_arch.h: Add definition for 'CYGNUM_HAL_MINIMUM_STACK_SIZE' + +1999-03-11 Nick Garnett + + * src/hal_misc.c: + Disabled use of stand-alone ^C detection interrupt. This is now + done in the serial driver. Added cyg_hal_is_break() and + cyg_hal_user_break() to detect and provoke ^C processing. These + are used by the serial driver and will one day interact with the + BSP/Cygmon/GDB stubs to do the right thing. + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_IN_USE): Added. + +1999-03-10 Nick Garnett + + * include/pkgconf/hal_tx39.h: + * src/vectors.S: + Changed names used to control CPU frequency into something more + generic. Moved definition into hal_tx39.h from hal_tx39_jmr3904.h. + +1999-03-09 Jesper Skov + PR 19370 + * src/hal_misc.c (cyg_hal_invoke_constructors): Changed + constructor loop. + +1999-03-05 Gary Thomas + + * src/tx39.ld: + * src/PKGconf.mak: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/tx39.ld: + Add INPUT(libextras.a), include libextras.a in GROUP() and include + new __DEVTAB__ section for new device drivers + +1999-02-25 Nick Garnett + + * src/vectors.S: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + Added some code to initialize DRAM in ROM-only configurations. + +1999-02-23 Nick Garnett + + * src/hal_misc.c: + Added support for SIGINT-causing magic breakpoint. This involves + passing a third, hidden argument to hal_ctrlc_isr() which is a + pointer to the saved CPU state. + + * src/vectors.S: + Added support for 66MHz part (untested). + Added support for SIGINT-causing magic breakpoint to allow + continuation after ^C. This also relies on CYGMON changes. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception() -> cyg_hal_deliver_exception() + QA improvements + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * src/hal_misc.c: + Rename deliver_exception() -> cyg_hal_deliver_exception() + Rename CYG_VECTOR_SIO_0 -> CYGNUM_HAL_INTERRUPT_SIO_0 + +1999-02-16 Jesper Skov + + * src/vectors.S: Added call to initialize_stub. + + * src/mips-stub.c: + * include/mips-stub.h: + Cleaned up to only include arch specific stub code. + + * include/hal_arch.h (HAL_BREAKPOINT): Added SIM breakpoint code + from (now dead) jmr3904/.../hal_stub.c. + +1999-02-05 John Dallaway + + * src/mips.ld: Rename to tx39.ld since this is the target name + * src/PKGconf.mak: Process tx39.ld instead of mips.ld + +1999-02-05 John Dallaway + + * src/mips.ld: Add LMA_EQ_VMA macro definition. + +1999-02-03 Jesper Skov + + * src/hal_misc.c: + * include/hal_cache.h: + Moved nested external declarations into top-level scope to avoid + compiler warnings. + +1999-02-02 Nick Garnett + + * include/hal_cache.h : + In HAL_ICACHE_INVALIDATE_ALL() and HAL_ICACHE_INVALIDATE(), fixed + typos in passing arguments to asm sections. + Fixes PR 18951. + +1999-01-26 Hugo Tyson + + * src/mips.ld: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-21 Jonathan Larmour + + * src/hal_misc.c (cyg_hal_invoke_constructors): + Add code to deal with CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + Tidy up and update description header + Shorten needlessly long lines + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + +1999-01-15 Hugo Tyson + + * src/mips.ld: + Provide alternate definition of macro SECTION_rom_vectors() for + RAM startup (CYG_HAL_STARTUP_RAM) so that minimal sim testing + works. Note: this is an instance where two definitions (of + identical "API") of a macro occur in the prototype .ld + file; the MLT is required not to be confused by this. + +1999-01-15 John Dallaway + + * src/mips.ld: add section macro for .vsr_table + +1999-01-13 John Dallaway + + * src/mips.ld: add section macro for .rel.dyn + +1999-01-13 John Dallaway + + * src/mips.ld: new linker script for MLT + * src/PKGconf.mak: add mips.ld rules for MLT + +1999-01-13 Gary Thomas + + * include/basetype.h: CYG_DOUBLE_BYTEORDER now in + +1999-01-12 Gary Thomas + + * include/basetype.h (CYG_DOUBLE_BYTEORDER): Define ordering + for words within doubles. + +1999-01-12 Nick Garnett + + * include/hal_cache.h: + Modified HAL_DCACHE_INVALIDATE_ALL() to correctly touch all cache + lines twice to ensure that the cache and memory are + consistent. This is the best we can do without direct support for + invalidation. + + * src/hal_misc.c: Altered call to patch_dbg_syscalls() to pass + pointer to base of vector rather than a single vector entry. + +1998-12-15 Jesper Skov + PR 18543 + + * include/hal_cache.h (HAL_DCACHE_INVALIDATE): Fixed variable + name. + +1998-12-15 Jesper Skov + + * include/hal_arch.h: + * src/context.S (hal_setjmp, hal_longjump): + Added CYGARC definitions for jmpbuf entries. + Corrected jmpbuf size. + +1998-12-10 Jesper Skov + + * include/hal_cache.h (HAL_DCACHE_UNLOCK_ALL, + HAL_ICACHE_UNLOCK_ALL): Added. + +1998-11-26 Jesper Skov + + * include/mips-regs.h: + * src/mips-stub.c: + Added use of CYGARC_HAL_COMMON_EXPORT_CPU_MACROS. + +1998-11-18 Gary Thomas + + * include/hal_intr.h: Add support for interrupt latency + measurements, controlled by CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY. + 1998-10-27 Jesper Skov PR 18033 @@ -241,7 +589,7 @@ 1998-07-23 Nick Garnett , do not use directly -// +// //####DESCRIPTIONEND#### // diff --git a/packages/hal/mips/arch/current/include/hal_arch.h b/packages/hal/mips/arch/current/include/hal_arch.h --- a/packages/hal/mips/arch/current/include/hal_arch.h +++ b/packages/hal/mips/arch/current/include/hal_arch.h @@ -1,13 +1,13 @@ #ifndef CYGONCE_HAL_HAL_ARCH_H #define CYGONCE_HAL_HAL_ARCH_H -//============================================================================= +//========================================================================== // -// hal_arch.h +// hal_arch.h // -// Architecture specific abstractions +// Architecture specific abstractions // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -25,26 +25,27 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-05 -// Purpose: Define architecture abstractions -// Usage: #include -// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Usage: #include +// //####DESCRIPTIONEND#### // -//============================================================================= +//========================================================================== +#include #include -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Processor saved states: // The layout of this structure is also defined in "mips.inc", for assembly // code. Do not change this without changing that (or vice versa). @@ -71,16 +72,16 @@ typedef struct cyg_uint32 config; /* Config register */ } HAL_SavedRegisters; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Exception handling function. // This function is defined by the kernel according to this prototype. It is // invoked from the HAL to deal with any CPU exceptions that the HAL does // not want to deal with itself. It usually invokes the kernel's exception // delivery mechanism. -externC void deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Bit manipulation macros externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); @@ -90,7 +91,7 @@ externC cyg_uint32 hal_msbit_index(cyg_u #define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Context Initialization // Initialize the context of a thread. // Arguments: @@ -99,24 +100,24 @@ externC cyg_uint32 hal_msbit_index(cyg_u // _entry_ entry point address. // _id_ bit pattern used in initializing registers, for debugging. -#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ -{ \ - register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ - register HAL_SavedRegisters *_regs_; \ - int _i_; \ - _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \ - for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ - (_regs_)->d[29] = (CYG_WORD)(_sp_); /* SP = top of stack */ \ - (_regs_)->d[04] = (CYG_WORD)(_thread_); /* R4 = arg1 = thread ptr */ \ - (_regs_)->lo = 0; /* LO = 0 */ \ - (_regs_)->hi = 0; /* HI = 0 */ \ - (_regs_)->d[30] = (CYG_WORD)(_sp_); /* FP = top of stack */ \ - (_regs_)->d[31] = (CYG_WORD)(_entry_); /* LR(d[31]) = entry point */ \ - (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \ - _sparg_ = (CYG_ADDRESS)_regs_; \ +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ +{ \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \ + for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[29] = (CYG_WORD)(_sp_); /* SP = top of stack */ \ + (_regs_)->d[04] = (CYG_WORD)(_thread_); /* R4 = arg1 = thread ptr */ \ + (_regs_)->lo = 0; /* LO = 0 */ \ + (_regs_)->hi = 0; /* HI = 0 */ \ + (_regs_)->d[30] = (CYG_WORD)(_sp_); /* FP = top of stack */ \ + (_regs_)->d[31] = (CYG_WORD)(_entry_); /* LR(d[31]) = entry point*/ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \ + _sparg_ = (CYG_ADDRESS)_regs_; \ } -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Context switch macros. // The arguments are pointers to locations where the stack pointer // of the current thread is to be stored, and from where the sp of the @@ -127,12 +128,13 @@ externC void hal_thread_load_context( CY __attribute__ ((noreturn)); #define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ - hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_); + hal_thread_switch_context( (CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); #define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Execution reorder barrier. // When optimizing the compiler can reorder code. In multithreaded systems // where the order of actions is vital, this can sometimes cause problems. @@ -142,29 +144,49 @@ externC void hal_thread_load_context( CY #define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Breakpoint support -// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen if -// executed. -// HAL_BREAKINST is the value of the breakpoint instruction and HAL_BREAKINST_SIZE -// is its size in bytes. +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to +// happen if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. +#ifdef CYG_HAL_MIPS_SIM +#define HAL_BREAKPOINT(_label_) \ + /* This code causes a fake breakpoint. */ \ + asm volatile ( \ + "lui $24,0x0000;" \ + "ori $24,0x0024;" \ + "mtc0 $24,$13;" \ + "lui $25,%%hi(1f);" \ + "ori $25,$25,%%lo(1f);" \ + "j other_vector;" \ + "nop;" \ + ".global " #_label_ ";" \ + #_label_":" \ + "1: nop;" \ + : \ + : \ + : "t8", "t9" \ + ); +#else #define HAL_BREAKPOINT(_label_) \ -asm volatile (" .globl " #_label_ ";" \ +asm volatile (" .globl " #_label_ ";" \ #_label_":" \ - " break 5" \ + " break 5" \ ); +#endif // CYG_HAL_MIPS_SIM #define HAL_BREAKINST 0x0005000d #define HAL_BREAKINST_SIZE 4 -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Thread register state manipulation for GDB support. // Translate a stack pointer as saved by the thread context macros above into // a pointer to a HAL_SavedRegisters structure. -#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ (_regs_) = (HAL_SavedRegisters *)(_sp_) // Copy a set of registers from a HAL_SavedRegisters structure into a @@ -202,17 +224,32 @@ asm volatile (" .globl " #_label_ ";" (_regs_)->pc = _regval_[37]; \ } -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // HAL setjmp +// Note: These definitions are repeated in hal_arch.h. If changes are +// required remember to update both sets. -#define HAL_JMP_BUF_SIZE 11 +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_R16 1 +#define CYGARC_JMP_BUF_R17 2 +#define CYGARC_JMP_BUF_R18 3 +#define CYGARC_JMP_BUF_R19 4 +#define CYGARC_JMP_BUF_R20 5 +#define CYGARC_JMP_BUF_R21 6 +#define CYGARC_JMP_BUF_R22 7 +#define CYGARC_JMP_BUF_R23 8 +#define CYGARC_JMP_BUF_R28 9 +#define CYGARC_JMP_BUF_R30 10 +#define CYGARC_JMP_BUF_R31 11 -typedef cyg_uint32 hal_jmp_buf[HAL_JMP_BUF_SIZE]; +#define CYGARC_JMP_BUF_SIZE 12 + +typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE]; externC int hal_setjmp(hal_jmp_buf env); externC void hal_longjmp(hal_jmp_buf env, int val); -//----------------------------------------------------------------------------- +//------------------------------------------------------------------------- // Idle thread code. // This macro is called in the idle thread loop, and gives the HAL the // chance to insert code. Typical idle thread behaviour might be to halt the @@ -222,8 +259,53 @@ externC void hal_idle_thread_action(cyg_ #define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// We define quite large stack needs for SPARClite, for it requires 576 +// bytes (144 words) to process an interrupt and thread-switch, and +// momentarily, but needed in case of recursive interrupts, it needs 208 +// words - if a sequence of saves to push out other regsets is interrupted. + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Worst case stack frame size: return link + 5 pushed registers. +#define CYGNUM_HAL_STACK_FRAME_SIZE (24) + +// Stack needed for a context switch: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (42*4) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can be much smaller + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \ + CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \ + CYGNUM_HAL_STACK_FRAME_SIZE*4) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (2048) + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large. + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096) + +#endif + +//-------------------------------------------------------------------------- #endif // CYGONCE_HAL_HAL_ARCH_H // End of hal_arch.h - - diff --git a/packages/hal/mips/arch/current/include/hal_cache.h b/packages/hal/mips/arch/current/include/hal_cache.h --- a/packages/hal/mips/arch/current/include/hal_cache.h +++ b/packages/hal/mips/arch/current/include/hal_cache.h @@ -3,9 +3,9 @@ //============================================================================= // -// hal_cache.h +// hal_cache.h // -// HAL cache control API +// HAL cache control API // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,28 +25,29 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Cache control API -// Description: The macros defined here provide the HAL APIs for handling +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling // cache control operations. // Usage: -// #include -// ... -// +// #include +// ... +// // //####DESCRIPTIONEND#### // //============================================================================= +#include #include //============================================================================= @@ -101,6 +102,9 @@ // Undo a previous lock operation //#define HAL_DCACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Data cache line control @@ -154,6 +158,9 @@ // Undo a previous lock operation //#define HAL_ICACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Instruction cache line control @@ -203,10 +210,10 @@ // Disable the data cache #define HAL_DCACHE_DISABLE() \ { \ - asm volatile ("mfc0 $2,$3;" \ + asm volatile ("mfc0 $2,$3;" \ "la $3,0xFFFFFFEF;" \ "and $2,$2,$3;" \ - "mtc0 $2,$3;" \ + "mtc0 $2,$3;" \ : \ : \ : "$2", "$3" \ @@ -215,17 +222,20 @@ } // Invalidate the entire cache -// We do this by reading a word from each line to invalidate the current -// cache contents. +// The TX39 only has hit-invalidate on the DCACHE, not +// index-invalidate, so we cannot just empty the cache out without +// knowing what is in it. This is annoying. So, the best we can do is +// fill the cache with data that is unlikely to be there +// otherwise. Hence we read bytes from the ROM space since this is +// most likely to be code, and will not get out of sync even if it is not. #define HAL_DCACHE_INVALIDATE_ALL() \ { \ - extern char __ram_data_start; \ - CYG_WORD *addr = (CYG_WORD *)&__ram_data_start; \ - CYG_WORD sum = 0; \ + CYG_BYTE volatile *addr = (CYG_BYTE *)(0x9fc00000); \ + CYG_BYTE volatile tmp = 0; \ int i; \ - for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \ + for( i = 0; i < (HAL_DCACHE_SIZE*2); i += HAL_DCACHE_LINE_SIZE ) \ { \ - sum += addr[i]; \ + tmp = addr[i]; \ } \ } @@ -267,6 +277,9 @@ ); \ } +// Unlock entire cache +#define HAL_DCACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Data cache line control @@ -286,7 +299,7 @@ HAL_DCACHE_DISABLE(); \ for( ; _addr_ <= _addr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ { \ - asm volatile ("cache 17,0(%0)" : : "r"(addr) ); \ + asm volatile ("cache 17,0(%0)" : : "r"(_addr_) ); \ } \ HAL_DCACHE_ENABLE(); \ } @@ -338,11 +351,11 @@ // Invalidate the entire cache #define HAL_ICACHE_INVALIDATE_ALL() \ { \ - register CYG_ADDRESS addr; \ + register CYG_ADDRESS _addr_; \ HAL_ICACHE_DISABLE(); \ - for( addr = 0; addr < HAL_ICACHE_SIZE; addr += HAL_ICACHE_LINE_SIZE ) \ + for( _addr_ = 0; _addr_ < HAL_ICACHE_SIZE; _addr_ += HAL_ICACHE_LINE_SIZE ) \ { \ - asm volatile ("cache 0,0(%0)" : : "r"(addr) ); \ + asm volatile ("cache 0,0(%0)" : : "r"(_addr_) ); \ } \ HAL_ICACHE_ENABLE(); \ } @@ -379,6 +392,9 @@ ); \ } +// Unlock entire cache +#define HAL_ICACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Instruction cache line control @@ -390,7 +406,7 @@ HAL_ICACHE_DISABLE(); \ for( ; _addr_ <= _addr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ { \ - asm volatile ("cache 0,0(%0)" : : "r"(addr) ); \ + asm volatile ("cache 0,0(%0)" : : "r"(_addr_) ); \ } \ HAL_ICACHE_ENABLE(); \ } @@ -398,5 +414,14 @@ #endif //----------------------------------------------------------------------------- +// Check that a supported configuration has actually defined some macros. + +#ifndef HAL_DCACHE_ENABLE + +#error Unsupported MIPS configuration + +#endif + +//----------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_CACHE_H // End of hal_cache.h diff --git a/packages/hal/mips/arch/current/include/hal_intr.h b/packages/hal/mips/arch/current/include/hal_intr.h --- a/packages/hal/mips/arch/current/include/hal_intr.h +++ b/packages/hal/mips/arch/current/include/hal_intr.h @@ -1,13 +1,13 @@ #ifndef CYGONCE_HAL_HAL_INTR_H #define CYGONCE_HAL_HAL_INTR_H -//============================================================================= +//========================================================================== // -// hal_intr.h +// hal_intr.h // -// HAL Interrupt and clock support +// HAL Interrupt and clock support // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -25,63 +25,101 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define Interrupt support -// Description: The macros defined here provide the HAL APIs for handling -// interrupts and the clock. +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. // // Usage: -// #include -// ... -// +// #include +// ... +// // //####DESCRIPTIONEND#### // -//============================================================================= +//========================================================================== #include #include #include -//----------------------------------------------------------------------------- -// MIPS exception vectors. +//-------------------------------------------------------------------------- +// MIPS vectors. -// Exception vectors. -// These are the exception codes presented in the -// Cause register and correspond to VSRs. +// These are the exception codes presented in the Cause register and +// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET -#define CYG_VECTOR_INTERRUPT 0 -#define CYG_VECTOR_TLB_MOD 1 -#define CYG_VECTOR_TLB_LOAD_REFILL 2 -#define CYG_VECTOR_TLB_STORE_REFILL 3 -#define CYG_VECTOR_LOAD_ADDRESS 4 -#define CYG_VECTOR_STORE_ADDRESS 5 -#define CYG_VECTOR_IBE 6 -#define CYG_VECTOR_DBE 7 -#define CYG_VECTOR_SYSTEM_CALL 8 -#define CYG_VECTOR_BREAKPOINT 9 -#define CYG_VECTOR_RESERVED_INSTRUCTION 10 -#define CYG_VECTOR_COPROCESSOR 11 -#define CYG_VECTOR_OVERFLOW 12 -#define CYG_VECTOR_RESERVED_13 13 +// External interrupt +#define CYGNUM_HAL_VECTOR_INTERRUPT 0 +// TLB modification exception +#define CYGNUM_HAL_VECTOR_TLB_MOD 1 +// TLB miss (Load or IFetch) +#define CYGNUM_HAL_VECTOR_TLB_LOAD_REFILL 2 +// TLB miss (Store) +#define CYGNUM_HAL_VECTOR_TLB_STORE_REFILL 3 +// Address error (Load or Ifetch) +#define CYGNUM_HAL_VECTOR_LOAD_ADDRESS 4 +// Address error (store) +#define CYGNUM_HAL_VECTOR_STORE_ADDRESS 5 +// Bus error (Ifetch) +#define CYGNUM_HAL_VECTOR_IBE 6 +// Bus error (data load or store) +#define CYGNUM_HAL_VECTOR_DBE 7 +// System call +#define CYGNUM_HAL_VECTOR_SYSTEM_CALL 8 +// Break point +#define CYGNUM_HAL_VECTOR_BREAKPOINT 9 +// Reserved instruction +#define CYGNUM_HAL_VECTOR_RESERVED_INSTRUCTION 10 +// Coprocessor unusable +#define CYGNUM_HAL_VECTOR_COPROCESSOR 11 +// Arithmetic overflow +#define CYGNUM_HAL_VECTOR_OVERFLOW 12 +// Reserved +#define CYGNUM_HAL_VECTOR_RESERVED_13 13 +// Floating point exception - not applicable yet +// #define CYGNUM_HAL_VECTOR_FPE 15 -#define CYG_VSR_MIN 0 -#define CYG_VSR_MAX 13 -#define CYG_VSR_COUNT 14 +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 13 +#define CYGNUM_HAL_VSR_COUNT 14 + +// Exception vectors. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() -#define CYG_EXCEPTION_MIN 1 -#define CYG_EXCEPTION_MAX 13 -#define CYG_EXCEPTION_COUNT 14 +#define CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_ACCESS CYGNUM_HAL_VECTOR_TLB_MOD +#define CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS \ + CYGNUM_HAL_VECTOR_TLB_LOAD_REFILL +#define CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_WRITE \ + CYGNUM_HAL_VECTOR_TLB_STORE_REFILL +#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \ + CYGNUM_HAL_VECTOR_LOAD_ADDRESS +#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_WRITE \ + CYGNUM_HAL_VECTOR_STORE_ADDRESS +#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_IBE +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_DBE +#define CYGNUM_HAL_EXCEPTION_SYSTEM_CALL CYGNUM_HAL_VECTOR_SYSTEM_CALL +#define CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP CYGNUM_HAL_VECTOR_BREAKPOINT +#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \ + CYGNUM_HAL_VECTOR_RESERVED_INSTRUCTION +#define CYGNUM_HAL_EXCEPTION_COPROCESSOR CYGNUM_HAL_VECTOR_COPROCESSOR +#define CYGNUM_HAL_EXCEPTION_OVERFLOW CYGNUM_HAL_VECTOR_OVERFLOW + +// Min/Max exception numbers and how many there are +#define CYGNUM_HAL_EXCEPTION_MIN 1 +#define CYGNUM_HAL_EXCEPTION_MAX 13 +#define CYGNUM_HAL_EXCEPTION_COUNT 13 // Interrupt vectors. @@ -90,58 +128,59 @@ // These are decoded via the IP bits of the cause // register when an external interrupt is delivered. -#define CYG_VECTOR_INT_1 0 -#define CYG_VECTOR_INT_2 1 -#define CYG_VECTOR_INT_3 2 -#define CYG_VECTOR_INT_4 3 -#define CYG_VECTOR_INT_5 4 -#define CYG_VECTOR_INT_6 5 -#define CYG_VECTOR_INT_7 6 -#define CYG_VECTOR_DMAC1_CH3 7 -#define CYG_VECTOR_DMAC1_CH2 8 -#define CYG_VECTOR_DMAC0_CH1 9 -#define CYG_VECTOR_DMAC0_CH0 10 -#define CYG_VECTOR_SIO_0 11 -#define CYG_VECTOR_SIO_1 12 -#define CYG_VECTOR_TMR_0 13 -#define CYG_VECTOR_TMR_1 14 -#define CYG_VECTOR_TMR_2 15 -#define CYG_VECTOR_INT_0 16 +#define CYGNUM_HAL_INTERRUPT_1 0 +#define CYGNUM_HAL_INTERRUPT_2 1 +#define CYGNUM_HAL_INTERRUPT_3 2 +#define CYGNUM_HAL_INTERRUPT_4 3 +#define CYGNUM_HAL_INTERRUPT_5 4 +#define CYGNUM_HAL_INTERRUPT_6 5 +#define CYGNUM_HAL_INTERRUPT_7 6 +#define CYGNUM_HAL_INTERRUPT_DMAC1_CH3 7 +#define CYGNUM_HAL_INTERRUPT_DMAC1_CH2 8 +#define CYGNUM_HAL_INTERRUPT_DMAC0_CH1 9 +#define CYGNUM_HAL_INTERRUPT_DMAC0_CH0 10 +#define CYGNUM_HAL_INTERRUPT_SIO_0 11 +#define CYGNUM_HAL_INTERRUPT_SIO_1 12 +#define CYGNUM_HAL_INTERRUPT_TMR_0 13 +#define CYGNUM_HAL_INTERRUPT_TMR_1 14 +#define CYGNUM_HAL_INTERRUPT_TMR_2 15 +#define CYGNUM_HAL_INTERRUPT_0 16 -#define CYG_ISR_MIN 0 -#define CYG_ISR_MAX 16 -#define CYG_ISR_COUNT 17 +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 16 +#define CYGNUM_HAL_ISR_COUNT 17 // The vector used by the Real time clock -#define CYG_VECTOR_RTC CYG_VECTOR_TMR_0 +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TMR_0 #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Static data used by HAL // ISR tables -externC volatile CYG_ADDRESS hal_interrupt_handlers[CYG_ISR_COUNT]; -externC volatile CYG_ADDRWORD hal_interrupt_data[CYG_ISR_COUNT]; -externC volatile CYG_ADDRESS hal_interrupt_objects[CYG_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; // VSR table -externC volatile CYG_ADDRESS hal_vsr_table[CYG_VSR_MAX+1]; +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_MAX+1]; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Default ISR externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt state storage typedef cyg_uint32 CYG_INTERRUPT_STATE; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt control macros -// Beware of the nops in this code. These fill load/store delay slots to prevent -// following code being run in the wrong state. +// Beware of the nops in this code. These fill load/store delay slots to +// prevent following code being run in the wrong state. #define HAL_DISABLE_INTERRUPTS(_old_) \ { \ @@ -196,7 +235,7 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; ); \ } -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Vector translation. // For chained interrupts we only have a single vector though which all // are passed. For unchained interrupts we have a vector per interrupt. @@ -211,20 +250,31 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt and VSR attachment macros -#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ -{ \ - cyg_uint32 _index_; \ - HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ - \ - if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ - { \ - hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \ - hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \ - hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \ - } \ +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \ + hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \ + } \ } #define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ @@ -244,36 +294,54 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; *(_pvsr_) = (void (*)())hal_vsr_table[_vector_]; -#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \ - if( _poldvsr_ != NULL ) *_poldvsr_ = (void (*)())hal_vsr_table[_vector_]; \ - hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL) \ + *(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ +CYG_MACRO_END + +// This is an ugly name, but what it means is: grab the VSR back to eCos +// internal handling, or if you like, the default handler. But if +// cooperating with GDB and CygMon, the default behaviour is to pass most +// exceptions to CygMon. This macro undoes that so that eCos handles the +// exception. So use it with care. -//----------------------------------------------------------------------------- +externC void __default_exception_vsr(void); +externC void __default_interrupt_vsr(void); + +#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ + HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT \ + ? (CYG_ADDRESS)__default_interrupt_vsr \ + : (CYG_ADDRESS)__default_exception_vsr, \ + _poldvsr_ ); \ +CYG_MACRO_END + +//-------------------------------------------------------------------------- // Interrupt controller access #if defined(CYG_HAL_MIPS_TX3904) || defined(CYG_HAL_MIPS_SIM) -#define TX3904_ILR0 0xFFFFC010 -#define TX3904_CConR 0xFFFFE000 +#define CYG_HAL_MIPS_TX3904_ILR0 0xFFFFC010 +#define CYG_HAL_MIPS_TX3904_CConR 0xFFFFE000 // Array which stores the configured priority levels for the configured // interrupts. -externC volatile CYG_BYTE hal_interrupt_level[CYG_ISR_COUNT]; +externC volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT]; -#define HAL_INTERRUPT_MASK( _vector_ ) \ -{ \ - HAL_IO_REGISTER _reg_ = TX3904_ILR0; \ - CYG_WORD32 _ilr_; \ - _reg_ += (_vector_)&0xC; \ - HAL_READ_UINT32( _reg_, _ilr_ ); \ - _ilr_ &= ~(7 << (((_vector_)&0x3)<<3)); \ - HAL_WRITE_UINT32( _reg_, _ilr_ ); \ +#define HAL_INTERRUPT_MASK( _vector_ ) \ +{ \ + HAL_IO_REGISTER _reg_ = CYG_HAL_MIPS_TX3904_ILR0; \ + CYG_WORD32 _ilr_; \ + _reg_ += (_vector_)&0xC; \ + HAL_READ_UINT32( _reg_, _ilr_ ); \ + _ilr_ &= ~(7 << (((_vector_)&0x3)<<3)); \ + HAL_WRITE_UINT32( _reg_, _ilr_ ); \ } #define HAL_INTERRUPT_UNMASK( _vector_ ) \ { \ - HAL_IO_REGISTER _reg_ = TX3904_ILR0; \ + HAL_IO_REGISTER _reg_ = CYG_HAL_MIPS_TX3904_ILR0; \ CYG_WORD32 _ilr_; \ _reg_ += (_vector_)&0xC; \ HAL_READ_UINT32( _reg_, _ilr_ ); \ @@ -283,28 +351,30 @@ externC volatile CYG_BYTE hal_interrupt_ #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ { \ - if( _vector_ <= CYG_VECTOR_INT_7 || _vector_ == CYG_VECTOR_INT_0 ) \ + if( _vector_ <= CYGNUM_HAL_INTERRUPT_7 || \ + _vector_ == CYGNUM_HAL_INTERRUPT_0 ) \ { \ cyg_uint32 _val_ = _vector_ + 1; \ - if( _val_ == CYG_VECTOR_INT_0 + 1 ) _val_ = 0; \ - HAL_WRITE_UINT8( TX3904_CConR+1, _val_); \ + if( _val_ == CYGNUM_HAL_INTERRUPT_0 + 1 ) _val_ = 0; \ + HAL_WRITE_UINT8( CYG_HAL_MIPS_TX3904_CConR+1, _val_); \ } \ } #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ { \ - if( _vector_ <= CYG_VECTOR_INT_7 || _vector_ == CYG_VECTOR_INT_0 ) \ + if( _vector_ <= CYGNUM_HAL_INTERRUPT_7 || \ + _vector_ == CYGNUM_HAL_INTERRUPT_0 ) \ { \ cyg_uint32 _val_ = 0; \ if( _up_ ) _val_ |= 1; \ if( !(_level_) ) _val_ |= 2; \ - HAL_WRITE_UINT16( TX3904_CConR+2, _val_ ); \ + HAL_WRITE_UINT16( CYG_HAL_MIPS_TX3904_CConR+2, _val_ ); \ } \ } #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ { \ - HAL_IO_REGISTER _reg_ = TX3904_ILR0; \ + HAL_IO_REGISTER _reg_ = CYG_HAL_MIPS_TX3904_ILR0; \ CYG_WORD32 _ilr_; \ _reg_ += (_vector_)&0xC; \ HAL_READ_UINT32( _reg_, _ilr_ ); \ @@ -319,37 +389,64 @@ externC volatile CYG_BYTE hal_interrupt_ #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Clock control #if defined(CYG_HAL_MIPS_TX3904) || defined(CYG_HAL_MIPS_SIM) -#define TX3904_TIMER_BASE 0xFFFFF000 -#define TX3904_TIMER_CR (TX3904_TIMER_BASE + 0x00) -#define TX3904_TIMER_SR (TX3904_TIMER_BASE + 0x04) -#define TX3904_TIMER_CPR (TX3904_TIMER_BASE + 0x08) -#define TX3904_TIMER_IMR (TX3904_TIMER_BASE + 0x10) -#define TX3904_TIMER_DR (TX3904_TIMER_BASE + 0x20) -#define TX3904_TIMER_RR (TX3904_TIMER_BASE + 0xF0) +#define CYG_HAL_MIPS_TX3904_TIMER_BASE 0xFFFFF000 +#define CYG_HAL_MIPS_TX3904_TIMER_CR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0x00) +#define CYG_HAL_MIPS_TX3904_TIMER_SR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0x04) +#define CYG_HAL_MIPS_TX3904_TIMER_CPR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0x08) +#define CYG_HAL_MIPS_TX3904_TIMER_IMR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0x10) +#define CYG_HAL_MIPS_TX3904_TIMER_DR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0x20) +#define CYG_HAL_MIPS_TX3904_TIMER_RR (CYG_HAL_MIPS_TX3904_TIMER_BASE + 0xF0) -#define HAL_CLOCK_INITIALIZE( _period_ ) \ -{ \ - HAL_WRITE_UINT32( TX3904_TIMER_DR, 0x000000003 ); \ - HAL_WRITE_UINT32( TX3904_TIMER_CPR, _period_ ); \ - HAL_WRITE_UINT32( TX3904_TIMER_SR, 0x00000000 ); \ - HAL_WRITE_UINT32( TX3904_TIMER_IMR, 0x00008001 ); \ - HAL_WRITE_UINT32( TX3904_TIMER_CR, 0x000000C0 ); \ +#define HAL_CLOCK_INITIALIZE( _period_ ) \ +{ \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_DR, 0x00000003 ); \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_CPR, _period_ ); \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_SR, 0x00000000 ); \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_IMR, 0x00008001 ); \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_CR, 0x000000C0 ); \ +} + +#define HAL_CLOCK_RESET( _vector_, _period_ ) \ +{ \ + HAL_WRITE_UINT32( CYG_HAL_MIPS_TX3904_TIMER_SR, 0x00000000 ); \ } -#define HAL_CLOCK_RESET( _vector_, _period_ ) \ -{ \ - HAL_WRITE_UINT32( TX3904_TIMER_SR, 0x00000000 ); \ -} +#if defined(CYGHWR_HAL_MIPS_TX3904_TRR_REQUIRES_SYNC) && \ + !defined(CYG_HAL_MIPS_SIM) + +// We need to sync and check the coprocessor 0 condition - this indicates +// whether data is present in the write buffer. We need to wait until +// that data to be written is flushed out. This works around a tx39 bug. +// gcc will insert a NOP after the asm insns. -#define HAL_CLOCK_READ( _pvalue_ ) \ -{ \ - HAL_READ_UINT32( TX3904_TIMER_RR, *(_pvalue_) ); \ -} +# define HAL_CLOCK_READ( _pvalue_ ) \ +CYG_MACRO_START \ + asm volatile ( \ + "sync; nop; 1: ; bc0f 1b" \ + : \ + : \ + : "$0" \ + ); \ + HAL_READ_UINT32( CYG_HAL_MIPS_TX3904_TIMER_RR, *(_pvalue_) ); \ +CYG_MACRO_END + +#else + +# define HAL_CLOCK_READ( _pvalue_ ) \ +CYG_MACRO_START \ + HAL_READ_UINT32( CYG_HAL_MIPS_TX3904_TIMER_RR, *(_pvalue_) ); \ +CYG_MACRO_END + +#endif + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_) +#endif #else @@ -357,6 +454,37 @@ externC volatile CYG_BYTE hal_interrupt_ #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- +// Timeout exception support. This is only enabled on the real TX39 hardware. + +#if defined(CYG_HAL_MIPS_TX3904) + +#define HAL_TX39_DEBUG_TOE_ENABLE() \ +{ \ + HAL_IO_REGISTER _reg_ = CYG_HAL_MIPS_TX3904_CConR; \ + CYG_WORD32 _cconr_; \ + HAL_READ_UINT32( _reg_, _cconr_); \ + _cconr_ |= 0x04000000; \ + HAL_WRITE_UINT32( _reg_, _cconr_); \ +} + +#define HAL_TX39_DEBUG_TOE_DISABLE() \ +{ \ + HAL_IO_REGISTER _reg_ = CYG_HAL_MIPS_TX3904_CConR; \ + CYG_WORD32 _cconr_; \ + HAL_READ_UINT32( _reg_, _cconr_); \ + _cconr_ &= 0xFBFFFFFF; \ + HAL_WRITE_UINT32( _reg_, _cconr_); \ +} + +#else + +#define HAL_TX39_DEBUG_TOE_ENABLE() + +#define HAL_TX39_DEBUG_TOE_DISABLE() + +#endif + +//-------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_HAL_INTR_H // End of hal_intr.h diff --git a/packages/hal/mips/arch/current/include/hal_io.h b/packages/hal/mips/arch/current/include/hal_io.h --- a/packages/hal/mips/arch/current/include/hal_io.h +++ b/packages/hal/mips/arch/current/include/hal_io.h @@ -3,9 +3,9 @@ //============================================================================= // -// hal_io.h +// hal_io.h // -// HAL device IO register support. +// HAL device IO register support. // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,24 +25,24 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define IO register support -// Description: The macros defined here provide the HAL APIs for handling +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling // device IO control registers. // // Usage: -// #include -// ... -// +// #include +// ... +// // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mips/arch/current/include/mips-regs.h b/packages/hal/mips/arch/current/include/mips-regs.h --- a/packages/hal/mips/arch/current/include/mips-regs.h +++ b/packages/hal/mips/arch/current/include/mips-regs.h @@ -1,6 +1,6 @@ /* mips-regs.h - register defines for MIPS processors * - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -13,6 +13,9 @@ * they apply. */ +#include + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS /* This value must agree with NUMREGS in mips-stub.h. */ @@ -26,180 +29,180 @@ /* General register names for assembly code. */ -#define zero $0 -#define at $1 /* assembler temporary */ -#define v0 $2 /* value holders */ -#define v1 $3 -#define a0 $4 /* arguments */ -#define a1 $5 -#define a2 $6 -#define a3 $7 -#define t0 $8 /* temporaries */ -#define t1 $9 -#define t2 $10 -#define t3 $11 -#define t4 $12 -#define t5 $13 -#define t6 $14 -#define t7 $15 -#define s0 $16 /* saved registers */ -#define s1 $17 -#define s2 $18 -#define s3 $19 -#define s4 $20 -#define s5 $21 -#define s6 $22 -#define s7 $23 -#define t8 $24 /* temporaries */ -#define t9 $25 -#define k0 $26 /* kernel registers */ -#define k1 $27 -#define gp $28 /* global pointer */ -#define sp $29 /* stack pointer */ -#define s8 $30 /* saved register */ -#define fp $30 /* frame pointer (obsolete usage) */ -#define ra $31 /* return address */ +#define zero $0 +#define at $1 /* assembler temporary */ +#define v0 $2 /* value holders */ +#define v1 $3 +#define a0 $4 /* arguments */ +#define a1 $5 +#define a2 $6 +#define a3 $7 +#define t0 $8 /* temporaries */ +#define t1 $9 +#define t2 $10 +#define t3 $11 +#define t4 $12 +#define t5 $13 +#define t6 $14 +#define t7 $15 +#define s0 $16 /* saved registers */ +#define s1 $17 +#define s2 $18 +#define s3 $19 +#define s4 $20 +#define s5 $21 +#define s6 $22 +#define s7 $23 +#define t8 $24 /* temporaries */ +#define t9 $25 +#define k0 $26 /* kernel registers */ +#define k1 $27 +#define gp $28 /* global pointer */ +#define sp $29 /* stack pointer */ +#define s8 $30 /* saved register */ +#define fp $30 /* frame pointer (obsolete usage) */ +#define ra $31 /* return address */ /* MIPS registers, numbered in the order in which gdb expects to see them. */ -#define ZERO 0 -#define AT 1 -#define V0 2 -#define V1 3 -#define A0 4 -#define A1 5 -#define A2 6 -#define A3 7 +#define ZERO 0 +#define AT 1 +#define V0 2 +#define V1 3 +#define A0 4 +#define A1 5 +#define A2 6 +#define A3 7 -#define T0 8 -#define T1 9 -#define T2 10 -#define T3 11 -#define T4 12 -#define T5 13 -#define T6 14 -#define T7 15 +#define T0 8 +#define T1 9 +#define T2 10 +#define T3 11 +#define T4 12 +#define T5 13 +#define T6 14 +#define T7 15 -#define S0 16 -#define S1 17 -#define S2 18 -#define S3 19 -#define S4 20 -#define S5 21 -#define S6 22 -#define S7 23 +#define S0 16 +#define S1 17 +#define S2 18 +#define S3 19 +#define S4 20 +#define S5 21 +#define S6 22 +#define S7 23 -#define T8 24 -#define T9 25 -#define K0 26 -#define K1 27 -#define GP 28 -#define SP 29 -#define S8 30 -#define RA 31 +#define T8 24 +#define T9 25 +#define K0 26 +#define K1 27 +#define GP 28 +#define SP 29 +#define S8 30 +#define RA 31 -#define SR 32 -#define LO 33 -#define HI 34 -#define BAD_VA 35 -#define CAUSE 36 -#define PC 37 +#define SR 32 +#define LO 33 +#define HI 34 +#define BAD_VA 35 +#define CAUSE 36 +#define PC 37 /* System Control Coprocessor (CP0) exception processing registers */ -#define C0_CONTEXT $4 /* Context */ -#define C0_BADVADDR $8 /* Bad Virtual Address */ -#define C0_COUNT $9 /* Count */ -#define C0_COMPARE $11 /* Compare */ -#define C0_STATUS $12 /* Processor Status */ -#define C0_CAUSE $13 /* Exception Cause */ -#define C0_EPC $14 /* Exception PC */ -#define C0_XCONTEXT $20 /* XContext */ -#define C0_ECC $26 /* ECC */ -#define C0_CACHEERR $27 /* CacheErr */ -#define C0_ERROREPC $30 /* ErrorEPC */ +#define C0_CONTEXT $4 /* Context */ +#define C0_BADVADDR $8 /* Bad Virtual Address */ +#define C0_COUNT $9 /* Count */ +#define C0_COMPARE $11 /* Compare */ +#define C0_STATUS $12 /* Processor Status */ +#define C0_CAUSE $13 /* Exception Cause */ +#define C0_EPC $14 /* Exception PC */ +#define C0_XCONTEXT $20 /* XContext */ +#define C0_ECC $26 /* ECC */ +#define C0_CACHEERR $27 /* CacheErr */ +#define C0_ERROREPC $30 /* ErrorEPC */ /* Status register fields */ -#define SR_CUMASK 0xf0000000 /* Coprocessor usable bits */ -#define SR_CU3 0x80000000 /* Coprocessor 3 usable */ -#define SR_CU2 0x40000000 /* coprocessor 2 usable */ -#define SR_CU1 0x20000000 /* Coprocessor 1 usable */ -#define SR_CU0 0x10000000 /* Coprocessor 0 usable */ +#define SR_CUMASK 0xf0000000 /* Coprocessor usable bits */ +#define SR_CU3 0x80000000 /* Coprocessor 3 usable */ +#define SR_CU2 0x40000000 /* coprocessor 2 usable */ +#define SR_CU1 0x20000000 /* Coprocessor 1 usable */ +#define SR_CU0 0x10000000 /* Coprocessor 0 usable */ -#define SR_FR 0x04000000 /* Enable 32 floating-point registers */ -#define SR_RE 0x02000000 /* Reverse Endian in user mode */ +#define SR_FR 0x04000000 /* Enable 32 floating-point registers */ +#define SR_RE 0x02000000 /* Reverse Endian in user mode */ -#define SR_BEV 0x00400000 /* Bootstrap Exception Vector */ -#define SR_TS 0x00200000 /* TLB shutdown (reserved on R4600) */ -#define SR_SR 0x00100000 /* Soft Reset */ +#define SR_BEV 0x00400000 /* Bootstrap Exception Vector */ +#define SR_TS 0x00200000 /* TLB shutdown (reserved on R4600) */ +#define SR_SR 0x00100000 /* Soft Reset */ -#define SR_CH 0x00040000 /* Cache Hit */ -#define SR_CE 0x00020000 /* ECC register modifies check bits */ -#define SR_DE 0x00010000 /* Disable cache errors */ +#define SR_CH 0x00040000 /* Cache Hit */ +#define SR_CE 0x00020000 /* ECC register modifies check bits */ +#define SR_DE 0x00010000 /* Disable cache errors */ -#define SR_IMASK 0x0000ff00 /* Interrupt Mask */ -#define SR_IMASK8 0x00000000 /* Interrupt Mask level=8 */ -#define SR_IMASK7 0x00008000 /* Interrupt Mask level=7 */ -#define SR_IMASK6 0x0000c000 /* Interrupt Mask level=6 */ -#define SR_IMASK5 0x0000e000 /* Interrupt Mask level=5 */ -#define SR_IMASK4 0x0000f000 /* Interrupt Mask level=4 */ -#define SR_IMASK3 0x0000f800 /* Interrupt Mask level=3 */ -#define SR_IMASK2 0x0000fc00 /* Interrupt Mask level=2 */ -#define SR_IMASK1 0x0000fe00 /* Interrupt Mask level=1 */ -#define SR_IMASK0 0x0000ff00 /* Interrupt Mask level=0 */ +#define SR_IMASK 0x0000ff00 /* Interrupt Mask */ +#define SR_IMASK8 0x00000000 /* Interrupt Mask level=8 */ +#define SR_IMASK7 0x00008000 /* Interrupt Mask level=7 */ +#define SR_IMASK6 0x0000c000 /* Interrupt Mask level=6 */ +#define SR_IMASK5 0x0000e000 /* Interrupt Mask level=5 */ +#define SR_IMASK4 0x0000f000 /* Interrupt Mask level=4 */ +#define SR_IMASK3 0x0000f800 /* Interrupt Mask level=3 */ +#define SR_IMASK2 0x0000fc00 /* Interrupt Mask level=2 */ +#define SR_IMASK1 0x0000fe00 /* Interrupt Mask level=1 */ +#define SR_IMASK0 0x0000ff00 /* Interrupt Mask level=0 */ -#define SR_IBIT8 0x00008000 /* (Intr5) */ -#define SR_IBIT7 0x00004000 /* (Intr4) */ -#define SR_IBIT6 0x00002000 /* (Intr3) */ -#define SR_IBIT5 0x00001000 /* (Intr2) */ -#define SR_IBIT4 0x00000800 /* (Intr1) */ -#define SR_IBIT3 0x00000400 /* (Intr0) */ -#define SR_IBIT2 0x00000200 /* (Software Interrupt 1) */ -#define SR_IBIT1 0x00000100 /* (Software Interrupt 0) */ +#define SR_IBIT8 0x00008000 /* (Intr5) */ +#define SR_IBIT7 0x00004000 /* (Intr4) */ +#define SR_IBIT6 0x00002000 /* (Intr3) */ +#define SR_IBIT5 0x00001000 /* (Intr2) */ +#define SR_IBIT4 0x00000800 /* (Intr1) */ +#define SR_IBIT3 0x00000400 /* (Intr0) */ +#define SR_IBIT2 0x00000200 /* (Software Interrupt 1) */ +#define SR_IBIT1 0x00000100 /* (Software Interrupt 0) */ -#define SR_KX 0x00000080 /* xtlb in kernel mode */ -#define SR_SX 0x00000040 /* mips3 & xtlb in supervisor mode */ -#define SR_UX 0x00000020 /* mips3 & xtlb in user mode */ +#define SR_KX 0x00000080 /* xtlb in kernel mode */ +#define SR_SX 0x00000040 /* mips3 & xtlb in supervisor mode */ +#define SR_UX 0x00000020 /* mips3 & xtlb in user mode */ -#define SR_KSU_MASK 0x00000018 /* ksu mode mask */ -#define SR_KSU_USER 0x00000010 /* user mode */ -#define SR_KSU_SUPV 0x00000008 /* supervisor mode */ -#define SR_KSU_KERN 0x00000000 /* kernel mode */ +#define SR_KSU_MASK 0x00000018 /* ksu mode mask */ +#define SR_KSU_USER 0x00000010 /* user mode */ +#define SR_KSU_SUPV 0x00000008 /* supervisor mode */ +#define SR_KSU_KERN 0x00000000 /* kernel mode */ -#define SR_ERL 0x00000004 /* error level */ -#define SR_EXL 0x00000002 /* exception level */ -#define SR_IE 0x00000001 /* interrupt enable */ +#define SR_ERL 0x00000004 /* error level */ +#define SR_EXL 0x00000002 /* exception level */ +#define SR_IE 0x00000001 /* interrupt enable */ /* Cause register fields */ -#define CAUSE_BD 0x80000000 /* Branch Delay */ -#define CAUSE_CEMASK 0x30000000 /* Coprocessor Error */ -#define CAUSE_CESHIFT 28 /* Right justify CE */ -#define CAUSE_IPMASK 0x0000ff00 /* Interrupt Pending */ -#define CAUSE_IPSHIFT 8 /* Right justify IP */ -#define CAUSE_IP8 0x00008000 /* (Intr5) */ -#define CAUSE_IP7 0x00004000 /* (Intr4) */ -#define CAUSE_IP6 0x00002000 /* (Intr3) */ -#define CAUSE_IP5 0x00001000 /* (Intr2) */ -#define CAUSE_IP4 0x00000800 /* (Intr1) */ -#define CAUSE_IP3 0x00000400 /* (Intr0) */ -#define CAUSE_SW2 0x00000200 /* (Software Interrupt 1) */ -#define CAUSE_SW1 0x00000100 /* (Software Interrupt 0) */ -#define CAUSE_EXCMASK 0x0000007c /* Exception Code */ -#define CAUSE_EXCSHIFT 2 /* Right justify EXC */ +#define CAUSE_BD 0x80000000 /* Branch Delay */ +#define CAUSE_CEMASK 0x30000000 /* Coprocessor Error */ +#define CAUSE_CESHIFT 28 /* Right justify CE */ +#define CAUSE_IPMASK 0x0000ff00 /* Interrupt Pending */ +#define CAUSE_IPSHIFT 8 /* Right justify IP */ +#define CAUSE_IP8 0x00008000 /* (Intr5) */ +#define CAUSE_IP7 0x00004000 /* (Intr4) */ +#define CAUSE_IP6 0x00002000 /* (Intr3) */ +#define CAUSE_IP5 0x00001000 /* (Intr2) */ +#define CAUSE_IP4 0x00000800 /* (Intr1) */ +#define CAUSE_IP3 0x00000400 /* (Intr0) */ +#define CAUSE_SW2 0x00000200 /* (Software Interrupt 1) */ +#define CAUSE_SW1 0x00000100 /* (Software Interrupt 0) */ +#define CAUSE_EXCMASK 0x0000007c /* Exception Code */ +#define CAUSE_EXCSHIFT 2 /* Right justify EXC */ /* Exception Codes */ -#define EXC_INT 0 /* External interrupt */ -#define EXC_MOD 1 /* TLB modification exception */ -#define EXC_TLBL 2 /* TLB miss (Load or Ifetch) */ -#define EXC_TLBS 3 /* TLB miss (Store) */ -#define EXC_ADEL 4 /* Address error (Load or Ifetch) */ -#define EXC_ADES 5 /* Address error (Store) */ -#define EXC_IBE 6 /* Bus error (Ifetch) */ -#define EXC_DBE 7 /* Bus error (data load or store) */ -#define EXC_SYS 8 /* System call */ -#define EXC_BP 9 /* Break point */ -#define EXC_RI 10 /* Reserved instruction */ -#define EXC_CPU 11 /* Coprocessor unusable */ -#define EXC_OVF 12 /* Arithmetic overflow */ -#define EXC_TRAP 13 /* Trap exception */ -#define EXC_FPE 15 /* Floating Point Exception */ +#define EXC_INT 0 /* External interrupt */ +#define EXC_MOD 1 /* TLB modification exception */ +#define EXC_TLBL 2 /* TLB miss (Load or Ifetch) */ +#define EXC_TLBS 3 /* TLB miss (Store) */ +#define EXC_ADEL 4 /* Address error (Load or Ifetch) */ +#define EXC_ADES 5 /* Address error (Store) */ +#define EXC_IBE 6 /* Bus error (Ifetch) */ +#define EXC_DBE 7 /* Bus error (data load or store) */ +#define EXC_SYS 8 /* System call */ +#define EXC_BP 9 /* Break point */ +#define EXC_RI 10 /* Reserved instruction */ +#define EXC_CPU 11 /* Coprocessor unusable */ +#define EXC_OVF 12 /* Arithmetic overflow */ +#define EXC_TRAP 13 /* Trap exception */ +#define EXC_FPE 15 /* Floating Point Exception */ - +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS diff --git a/packages/hal/mips/arch/current/include/mips-stub.h b/packages/hal/mips/arch/current/include/mips-stub.h --- a/packages/hal/mips/arch/current/include/mips-stub.h +++ b/packages/hal/mips/arch/current/include/mips-stub.h @@ -1,6 +1,9 @@ +#ifndef CYGONCE_HAL_MIPS_STUB_H +#define CYGONCE_HAL_MIPS_STUB_H + /* mips-stub.h - MIPS-specific definitions for generic stub * - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -24,35 +27,19 @@ #endif enum regnames { - ZERO, AT, V0, V1, A0, A1, A2, A3, - T0, T1, T2, T3, T4, T5, T6, T7, - S0, S1, S2, S3, S4, S5, S6, S7, - T8, T9, K0, K1, GP, SP, S8, RA, - SR, LO, HI, BAD, CAUSE, PC, - CONFIG = 84, CACHE, DEBUG, DEPC, EPC + ZERO, AT, V0, V1, A0, A1, A2, A3, + T0, T1, T2, T3, T4, T5, T6, T7, + S0, S1, S2, S3, S4, S5, S6, S7, + T8, T9, K0, K1, GP, SP, S8, RA, + SR, LO, HI, BAD, CAUSE, PC, + CONFIG = 84, CACHE, DEBUG, DEPC, EPC }; typedef enum regnames regnames_t; -#include - -/* If ENABLED is non-zero, supply a memory fault handler that traps - subsequent memory errors and sets _mem_err to 1. Otherwise, memory - faults are processed as exceptions. */ -extern void __set_mem_fault_trap (int enable); - -/* Write C to the current serial port. */ -extern void putDebugChar (int c); - -/* Read one character from the current serial port. */ -extern int getDebugChar (void); - /* Given a trap value TRAP, return the corresponding signal. */ extern int __computeSignal (unsigned int trap_number); -/* Install the standard set of trap handlers for the stub. */ -extern void __install_traps (void); - /* Return the SPARC trap number corresponding to the last-taken trap. */ extern int __get_trap_number (void); @@ -66,31 +53,13 @@ extern void put_register (regnames_t whi as needed. */ extern void set_pc (target_register_t pc); -/* Flush the instruction cache. */ -extern void flush_i_cache (void); - -/* Reset the board. */ -extern void __reset (void); - -/* Set the baud rate for the current serial port. */ -extern void __set_baud_rate (int baud); - -/* Initialize the hardware. */ -extern void initHardware (void); - /* Set things up so that the next user resume will execute one instruction. This may be done by setting breakpoints or setting a single step flag in the saved user registers, for example. */ -void single_step (void); +void __single_step (void); /* Clear the single-step state. */ -void clear_single_step (void); - -struct gdb_packet; - -/* Return 1 when a complete packet has been received, 0 if the packet - is not yet complete, or -1 if an erroneous packet was NAKed. */ -int __add_char_to_packet (int character, struct gdb_packet *packet); +void __clear_single_step (void); /* If the breakpoint we hit is in the breakpoint() instruction, return a non-zero value. */ @@ -99,18 +68,8 @@ extern int __is_breakpoint_function (voi /* Skip the current instruction. */ extern void __skipinst (void); -/* Write the 'T' packet in BUFFER. SIGVAL is the signal the program - received. */ - -extern void __build_t_packet (int sigval, char *buffer); - -extern void install_breakpoints (void); +extern void __install_breakpoints (void); -/* Address in text section of a breakpoint instruction. */ - -extern void _breakinst (void); +extern void __clear_breakpoints (void); -/* The opcode for a breakpoint instruction. */ - -extern unsigned long __break_opcode (void); - +#endif // ifndef CYGONCE_HAL_MIPS_STUB_H diff --git a/packages/hal/mips/arch/current/include/mips.inc b/packages/hal/mips/arch/current/include/mips.inc --- a/packages/hal/mips/arch/current/include/mips.inc +++ b/packages/hal/mips/arch/current/include/mips.inc @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mips/arch/current/include/mips_opcode.h b/packages/hal/mips/arch/current/include/mips_opcode.h --- a/packages/hal/mips/arch/current/include/mips_opcode.h +++ b/packages/hal/mips/arch/current/include/mips_opcode.h @@ -15,8 +15,8 @@ * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. + * This product includes software developed by the University of + * California, Berkeley and its contributors. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. @@ -33,7 +33,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * from: @(#)mips_opcode.h 7.1 (Berkeley) 3/19/92 + * from: @(#)mips_opcode.h 7.1 (Berkeley) 3/19/92 * via: mips_opcode.h,v 1.1 1994/03/10 16:15:10 (algorithmics) */ @@ -53,65 +53,65 @@ typedef union { #ifdef MIPSEL struct { - unsigned imm: 16; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; + unsigned imm: 16; + unsigned rt: 5; + unsigned rs: 5; + unsigned op: 6; } IType; struct { - unsigned target: 26; - unsigned op: 6; + unsigned target: 26; + unsigned op: 6; } JType; struct { - unsigned func: 6; - unsigned shamt: 5; - unsigned rd: 5; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; + unsigned func: 6; + unsigned shamt: 5; + unsigned rd: 5; + unsigned rt: 5; + unsigned rs: 5; + unsigned op: 6; } RType; struct { - unsigned func: 6; - unsigned fd: 5; - unsigned fs: 5; - unsigned ft: 5; - unsigned fmt: 4; - unsigned : 1; /* always '1' */ - unsigned op: 6; /* always '0x11' */ + unsigned func: 6; + unsigned fd: 5; + unsigned fs: 5; + unsigned ft: 5; + unsigned fmt: 4; + unsigned : 1; /* always '1' */ + unsigned op: 6; /* always '0x11' */ } FRType; #else struct { - unsigned op: 6; - unsigned rs: 5; - unsigned rt: 5; - unsigned imm: 16; + unsigned op: 6; + unsigned rs: 5; + unsigned rt: 5; + unsigned imm: 16; } IType; struct { - unsigned op: 6; - unsigned target: 26; + unsigned op: 6; + unsigned target: 26; } JType; struct { - unsigned op: 6; - unsigned rs: 5; - unsigned rt: 5; - unsigned rd: 5; - unsigned shamt: 5; - unsigned func: 6; + unsigned op: 6; + unsigned rs: 5; + unsigned rt: 5; + unsigned rd: 5; + unsigned shamt: 5; + unsigned func: 6; } RType; struct { - unsigned op: 6; /* always '0x11' */ - unsigned : 1; /* always '1' */ - unsigned fmt: 4; - unsigned func: 6; - unsigned ft: 5; - unsigned fs: 5; - unsigned fd: 5; + unsigned op: 6; /* always '0x11' */ + unsigned : 1; /* always '1' */ + unsigned fmt: 4; + unsigned func: 6; + unsigned ft: 5; + unsigned fs: 5; + unsigned fd: 5; } FRType; #endif } InstFmt; @@ -119,177 +119,177 @@ typedef union { /* * Values for the 'op' field. */ -#define OP_SPECIAL 000 -#define OP_REGIMM 001 -#define OP_J 002 -#define OP_JAL 003 -#define OP_BEQ 004 -#define OP_BNE 005 -#define OP_BLEZ 006 -#define OP_BGTZ 007 +#define OP_SPECIAL 000 +#define OP_REGIMM 001 +#define OP_J 002 +#define OP_JAL 003 +#define OP_BEQ 004 +#define OP_BNE 005 +#define OP_BLEZ 006 +#define OP_BGTZ 007 -#define OP_ADDI 010 -#define OP_ADDIU 011 -#define OP_SLTI 012 -#define OP_SLTIU 013 -#define OP_ANDI 014 -#define OP_ORI 015 -#define OP_XORI 016 -#define OP_LUI 017 +#define OP_ADDI 010 +#define OP_ADDIU 011 +#define OP_SLTI 012 +#define OP_SLTIU 013 +#define OP_ANDI 014 +#define OP_ORI 015 +#define OP_XORI 016 +#define OP_LUI 017 -#define OP_COP0 020 -#define OP_COP1 021 -#define OP_COP2 022 -#define OP_BEQL 024 -#define OP_BNEL 025 -#define OP_BLEZL 026 -#define OP_BGTZL 027 +#define OP_COP0 020 +#define OP_COP1 021 +#define OP_COP2 022 +#define OP_BEQL 024 +#define OP_BNEL 025 +#define OP_BLEZL 026 +#define OP_BGTZL 027 -#define OP_DADDI 030 -#define OP_DADDIU 031 -#define OP_LDL 032 -#define OP_LDR 033 +#define OP_DADDI 030 +#define OP_DADDIU 031 +#define OP_LDL 032 +#define OP_LDR 033 -#define OP_LB 040 -#define OP_LH 041 -#define OP_LWL 042 -#define OP_LW 043 -#define OP_LBU 044 -#define OP_LHU 045 -#define OP_LWR 046 -#define OP_LWU 047 +#define OP_LB 040 +#define OP_LH 041 +#define OP_LWL 042 +#define OP_LW 043 +#define OP_LBU 044 +#define OP_LHU 045 +#define OP_LWR 046 +#define OP_LWU 047 -#define OP_SB 050 -#define OP_SH 051 -#define OP_SWL 052 -#define OP_SW 053 -#define OP_SDL 054 -#define OP_SDR 055 -#define OP_SWR 056 -#define OP_CACHE 057 +#define OP_SB 050 +#define OP_SH 051 +#define OP_SWL 052 +#define OP_SW 053 +#define OP_SDL 054 +#define OP_SDR 055 +#define OP_SWR 056 +#define OP_CACHE 057 -#define OP_LL 060 -#define OP_LWC1 061 -#define OP_LWC2 062 -#define OP_LLD 064 -#define OP_LDC1 065 -#define OP_LDC2 066 -#define OP_LD 067 +#define OP_LL 060 +#define OP_LWC1 061 +#define OP_LWC2 062 +#define OP_LLD 064 +#define OP_LDC1 065 +#define OP_LDC2 066 +#define OP_LD 067 -#define OP_SC 070 -#define OP_SWC1 071 -#define OP_SWC2 072 -#define OP_SCD 074 -#define OP_SDC1 075 -#define OP_SDC2 076 -#define OP_SD 077 +#define OP_SC 070 +#define OP_SWC1 071 +#define OP_SWC2 072 +#define OP_SCD 074 +#define OP_SDC1 075 +#define OP_SDC2 076 +#define OP_SD 077 /* * Values for the 'func' field when 'op' == OP_SPECIAL. */ -#define OP_SLL 000 -#define OP_SRL 002 -#define OP_SRA 003 -#define OP_SLLV 004 -#define OP_SRLV 006 -#define OP_SRAV 007 +#define OP_SLL 000 +#define OP_SRL 002 +#define OP_SRA 003 +#define OP_SLLV 004 +#define OP_SRLV 006 +#define OP_SRAV 007 -#define OP_JR 010 -#define OP_JALR 011 -#define OP_SYSCALL 014 -#define OP_BREAK 015 -#define OP_SYNC 017 +#define OP_JR 010 +#define OP_JALR 011 +#define OP_SYSCALL 014 +#define OP_BREAK 015 +#define OP_SYNC 017 -#define OP_MFHI 020 -#define OP_MTHI 021 -#define OP_MFLO 022 -#define OP_MTLO 023 -#define OP_DSLLV 024 -#define OP_DSRLV 026 -#define OP_DSRAV 027 +#define OP_MFHI 020 +#define OP_MTHI 021 +#define OP_MFLO 022 +#define OP_MTLO 023 +#define OP_DSLLV 024 +#define OP_DSRLV 026 +#define OP_DSRAV 027 -#define OP_MULT 030 -#define OP_MULTU 031 -#define OP_DIV 032 -#define OP_DIVU 033 -#define OP_DMULT 034 -#define OP_DMULTU 035 -#define OP_DDIV 036 -#define OP_DDIVU 037 +#define OP_MULT 030 +#define OP_MULTU 031 +#define OP_DIV 032 +#define OP_DIVU 033 +#define OP_DMULT 034 +#define OP_DMULTU 035 +#define OP_DDIV 036 +#define OP_DDIVU 037 -#define OP_ADD 040 -#define OP_ADDU 041 -#define OP_SUB 042 -#define OP_SUBU 043 -#define OP_AND 044 -#define OP_OR 045 -#define OP_XOR 046 -#define OP_NOR 047 +#define OP_ADD 040 +#define OP_ADDU 041 +#define OP_SUB 042 +#define OP_SUBU 043 +#define OP_AND 044 +#define OP_OR 045 +#define OP_XOR 046 +#define OP_NOR 047 -#define OP_SLT 052 -#define OP_SLTU 053 -#define OP_DADD 054 -#define OP_DADDU 055 -#define OP_DSUB 056 -#define OP_DSUBU 057 +#define OP_SLT 052 +#define OP_SLTU 053 +#define OP_DADD 054 +#define OP_DADDU 055 +#define OP_DSUB 056 +#define OP_DSUBU 057 -#define OP_TGE 060 -#define OP_TGEU 061 -#define OP_TLT 062 -#define OP_TLTU 063 -#define OP_TEQ 064 -#define OP_TNE 066 +#define OP_TGE 060 +#define OP_TGEU 061 +#define OP_TLT 062 +#define OP_TLTU 063 +#define OP_TEQ 064 +#define OP_TNE 066 -#define OP_DSLL 070 -#define OP_DSRL 072 -#define OP_DSRA 073 -#define OP_DSLL32 074 -#define OP_DSRL32 076 -#define OP_DSRA32 077 +#define OP_DSLL 070 +#define OP_DSRL 072 +#define OP_DSRA 073 +#define OP_DSLL32 074 +#define OP_DSRL32 076 +#define OP_DSRA32 077 /* * Values for the 'func' field when 'op' == OP_REGIMM. */ -#define OP_BLTZ 000 -#define OP_BGEZ 001 -#define OP_BLTZL 002 -#define OP_BGEZL 003 +#define OP_BLTZ 000 +#define OP_BGEZ 001 +#define OP_BLTZL 002 +#define OP_BGEZL 003 -#define OP_TGEI 010 -#define OP_TGEIU 011 -#define OP_TLTI 012 -#define OP_TLTIU 013 -#define OP_TEQI 014 -#define OP_TNEI 016 +#define OP_TGEI 010 +#define OP_TGEIU 011 +#define OP_TLTI 012 +#define OP_TLTIU 013 +#define OP_TEQI 014 +#define OP_TNEI 016 -#define OP_BLTZAL 020 -#define OP_BGEZAL 021 -#define OP_BLTZALL 022 -#define OP_BGEZALL 023 +#define OP_BLTZAL 020 +#define OP_BGEZAL 021 +#define OP_BLTZALL 022 +#define OP_BGEZALL 023 /* * Values for the 'rs' field when 'op' == OP_COPz. */ -#define OP_MF 000 -#define OP_DMF 001 -#define OP_CF 002 -#define OP_MT 004 -#define OP_DMT 005 -#define OP_CT 006 -#define OP_BC 010 +#define OP_MF 000 +#define OP_DMF 001 +#define OP_CF 002 +#define OP_MT 004 +#define OP_DMT 005 +#define OP_CT 006 +#define OP_BC 010 /* * Values for the 'rt' field when 'op' == OP_COPz and 'rt' == OP_BC. */ -#define COPz_BCF 0x00 -#define COPz_BCT 0x01 -#define COPz_BCFL 0x02 -#define COPz_BCTL 0x03 +#define COPz_BCF 0x00 +#define COPz_BCT 0x01 +#define COPz_BCFL 0x02 +#define COPz_BCTL 0x03 /* * Instructions with specal significance to debuggers. */ -#define BREAK_INSTR 0x0005000d /* instruction code for break */ -#define NOP_INSTR 0x00000000 /* instruction code for no-op */ +#define BREAK_INSTR 0x0005000d /* instruction code for break */ +#define NOP_INSTR 0x00000000 /* instruction code for no-op */ #endif /* _MIPS_OPCODE_H */ diff --git a/packages/hal/mips/arch/current/include/pkgconf/hal_tx39.h b/packages/hal/mips/arch/current/include/pkgconf/hal_tx39.h --- a/packages/hal/mips/arch/current/include/pkgconf/hal_tx39.h +++ b/packages/hal/mips/arch/current/include/pkgconf/hal_tx39.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_TX39_H // ==================================================================== // -// pkgconf/hal_tx39.h +// pkgconf/hal_tx39.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### @@ -56,8 +56,62 @@ select a specific target platform HAL package." } + cdl_option CYGHWR_HAL_MIPS_CPU_FREQ { + display "CPU frequency" + type count + legal_values 0 to 1000000 + parent CYGPKG_HAL_TX39 + description " + This option contains the frequency of the CPU in MegaHertz. + Choose the frequency to match the processor you have. This + may affect thing like serial device, interval clock and + memory access speed settings." + } + + cdl_option CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR { + display "Install an Interrupt Service Routine to catch HALT requests" + type bool + parent CYGPKG_HAL_TX39 + description " + This option enables startup code to install a default ISR on the + serial debug connection which reads characters looking for the + HALT character control-C (\003). This allows a running program + to be interrupted from GDB. This option only has effect if eCos + is configured to run with the Cygmon ROM monitor on the JMR3904 + development board. Interrupts must be enabled for the code to + work. The serial device drivers, if enabled, do take over the + ISR and function correctly." + } + }}CFG_DATA */ + +#define CYGHWR_HAL_MIPS_CPU_FREQ 50 + +#define CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR + +/* -------------------------------------------------------------------*/ +/* Workaround for TX3904 Timer TRR register problem */ +/* */ +/* We do it conditionally so that it is possible to override it on */ +/* the command line, for example, for a simulator build */ +#ifndef CYGARC_TX39_PR19846 +# define CYGHWR_HAL_MIPS_TX3904_TRR_REQUIRES_SYNC +#endif + + +/* -------------------------------------------------------------------*/ +/* translate the user defined CPU frequency into a the real number of */ +/* cycles. */ + +#if (CYGHWR_HAL_MIPS_CPU_FREQ == 50) +#define CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL 49152000 +#elif (CYGHWR_HAL_MIPS_CPU_FREQ == 66) +#define CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL 66355200 +#else +#error Unsupported TX39 CPU frequency +#endif + /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_TX39_H */ /* EOF hal_tx39.h */ diff --git a/packages/hal/mips/arch/current/src/PKGconf.mak b/packages/hal/mips/arch/current/src/PKGconf.mak --- a/packages/hal/mips/arch/current/src/PKGconf.mak +++ b/packages/hal/mips/arch/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -34,9 +34,9 @@ include ../../../../../pkgconf/pkgconf.m LIBRARY := libtarget.a COMPILE := hal_misc.c context.S mips-stub.c OTHER_OBJS := -OTHER_TARGETS := vectors.stamp -OTHER_DEPS := $(PACKAGE)_vectors.d -OTHER_CLEAN := vectors.clean +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src @@ -51,4 +51,16 @@ vectors.clean: $(PACKAGE)_vectors.o: $(BUILD_TREE)/pkgconf/pkgconf.mak \ $(BUILD_TREE)/pkgconf/makevars $(PACKAGE_RULES_FILE) +.PHONY: ldscript.clean +ldscript.stamp: tx39.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ + +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp diff --git a/packages/hal/mips/arch/current/src/context.S b/packages/hal/mips/arch/current/src/context.S --- a/packages/hal/mips/arch/current/src/context.S +++ b/packages/hal/mips/arch/current/src/context.S @@ -21,7 +21,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -177,24 +177,41 @@ hal_thread_load_context: #------------------------------------------------------------------------------ # HAL longjmp, setjmp implementations -# hal_setjmp saves only to callee save registers 13-31, r1[sp],r2 -# and lr into buffer supplied in r3[arg0] +# hal_setjmp saves only to callee save registers 16-23, 28, 30, 31[ra], 29[sp] +# into buffer supplied in a0[arg0] +# Note: These definitions are repeated in hal_arch.h. If changes are required +# remember to update both sets. + +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_R16 1 +#define CYGARC_JMP_BUF_R17 2 +#define CYGARC_JMP_BUF_R18 3 +#define CYGARC_JMP_BUF_R19 4 +#define CYGARC_JMP_BUF_R20 5 +#define CYGARC_JMP_BUF_R21 6 +#define CYGARC_JMP_BUF_R22 7 +#define CYGARC_JMP_BUF_R23 8 +#define CYGARC_JMP_BUF_R28 9 +#define CYGARC_JMP_BUF_R30 10 +#define CYGARC_JMP_BUF_R31 11 + +#define CYGARC_JMP_BUF_SIZE 12 .globl hal_setjmp .ent hal_setjmp hal_setjmp: - sw $31,44(a0) # ra (link) - sw $30,40(a0) - sw $28,36(a0) # gp, optimize out? - sw $23,32(a0) - sw $22,28(a0) - sw $21,24(a0) - sw $20,20(a0) - sw $19,16(a0) - sw $18,12(a0) - sw $17,8(a0) - sw $16,4(a0) - sw sp,0(a0) # $29 + sw $31,CYGARC_JMP_BUF_R31*4(a0) # ra (link) + sw $30,CYGARC_JMP_BUF_R30*4(a0) + sw $28,CYGARC_JMP_BUF_R28*4(a0) # gp, optimize out? + sw $23,CYGARC_JMP_BUF_R23*4(a0) + sw $22,CYGARC_JMP_BUF_R22*4(a0) + sw $21,CYGARC_JMP_BUF_R21*4(a0) + sw $20,CYGARC_JMP_BUF_R20*4(a0) + sw $19,CYGARC_JMP_BUF_R19*4(a0) + sw $18,CYGARC_JMP_BUF_R18*4(a0) + sw $17,CYGARC_JMP_BUF_R17*4(a0) + sw $16,CYGARC_JMP_BUF_R16*4(a0) + sw sp,CYGARC_JMP_BUF_SP*4(a0) # $29 li v0,0 jr ra nop # delay slot @@ -203,18 +220,18 @@ hal_setjmp: .globl hal_longjmp .ent hal_longjmp hal_longjmp: - lw $31,44(a0) # ra (link) - lw $30,40(a0) - lw $28,36(a0) # gp, optimize out? - lw $23,32(a0) - lw $22,28(a0) - lw $21,24(a0) - lw $20,20(a0) - lw $19,16(a0) - lw $18,12(a0) - lw $17,8(a0) - lw $16,4(a0) - lw sp,0(a0) # $29 + lw $31,CYGARC_JMP_BUF_R31*4(a0) # ra (link) + lw $30,CYGARC_JMP_BUF_R30*4(a0) + lw $28,CYGARC_JMP_BUF_R28*4(a0) # gp, optimize out? + lw $23,CYGARC_JMP_BUF_R23*4(a0) + lw $22,CYGARC_JMP_BUF_R22*4(a0) + lw $21,CYGARC_JMP_BUF_R21*4(a0) + lw $20,CYGARC_JMP_BUF_R20*4(a0) + lw $19,CYGARC_JMP_BUF_R19*4(a0) + lw $18,CYGARC_JMP_BUF_R18*4(a0) + lw $17,CYGARC_JMP_BUF_R17*4(a0) + lw $16,CYGARC_JMP_BUF_R16*4(a0) + lw sp,CYGARC_JMP_BUF_SP*4(a0) # $29 move v0,a1 jr ra nop # delay slot @@ -223,5 +240,3 @@ hal_longjmp: #------------------------------------------------------------------------------ # end of context.S - - \ No newline at end of file diff --git a/packages/hal/mips/arch/current/src/hal_misc.c b/packages/hal/mips/arch/current/src/hal_misc.c --- a/packages/hal/mips/arch/current/src/hal_misc.c +++ b/packages/hal/mips/arch/current/src/hal_misc.c @@ -1,10 +1,10 @@ -//============================================================================= +//========================================================================== // -// hal_misc.c +// hal_misc.c // -// HAL miscellaneous functions +// HAL miscellaneous functions // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -22,23 +22,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-05 -// Purpose: HAL miscellaneous functions -// Description: This file contains miscellaneous functions provided by the -// HAL. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-01-21 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. // //####DESCRIPTIONEND#### // -//===========================================================================*/ +//========================================================================*/ #include @@ -52,8 +52,8 @@ #include // Cache handling -/*---------------------------------------------------------------------------*/ -/* First level C exception handler. */ +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ externC void __handle_exception (void); @@ -76,7 +76,7 @@ externC void exception_handler(HAL_Saved // pointer to the saved registers. We should also divert // breakpoint and other debug vectors into the debug stubs. - deliver_exception( regs->vector>>2, (CYG_ADDRWORD)regs ); + cyg_hal_deliver_exception( regs->vector>>2, (CYG_ADDRWORD)regs ); #else @@ -86,8 +86,8 @@ externC void exception_handler(HAL_Saved return; } -/*---------------------------------------------------------------------------*/ -/* default ISR */ +/*------------------------------------------------------------------------*/ +/* default ISR */ externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) { @@ -96,17 +96,18 @@ externC cyg_uint32 hal_default_isr(CYG_A return 0; } -/*---------------------------------------------------------------------------*/ -/* data copy and bss zero functions */ +/*------------------------------------------------------------------------*/ +/* data copy and bss zero functions */ typedef void (CYG_ROM_ADDRESS)(void); -#ifdef CYG_HAL_STARTUP_ROM +extern char __ram_data_start; +extern char __ram_data_end; +extern CYG_ROM_ADDRESS __rom_data_start; + +#ifdef CYG_HAL_STARTUP_ROM void hal_copy_data(void) { - extern char __ram_data_start; - extern char __ram_data_end; - extern CYG_ROM_ADDRESS __rom_data_start; char *p = &__ram_data_start; char *q = (char *)&__rom_data_start; @@ -115,109 +116,98 @@ void hal_copy_data(void) } #endif +extern CYG_ROM_ADDRESS __bss_start; +extern CYG_ROM_ADDRESS __bss_end; + void hal_zero_bss(void) { - extern CYG_ROM_ADDRESS __bss_start; - extern CYG_ROM_ADDRESS _end; char *p = (char *)&__bss_start; - while( p != (char *)&_end ) + while( p != (char *)&__bss_end ) *p++ = 0; } -/*---------------------------------------------------------------------------*/ +/*------------------------------------------------------------------------*/ -void fake_ctor(void) {}; +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern void patch_dbg_syscalls(void * vector); void -cyg_hal_invoke_constructors (void) +cyg_hal_invoke_constructors(void) { -#ifdef CYG_KERNEL_USE_INIT_PRIORITY + pfunc p; - typedef void (*pfunc) (void); - extern pfunc __CTOR_LIST__[]; +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static long i = 0; + long j = (long)(__CTOR_LIST__[0]); + + cyg_hal_stop_constructors=0; + for ( ; i < j; i++ ) + { + p = __CTOR_LIST__[j - i]; + p (); + if (cyg_hal_stop_constructors) { + i++; + break; + } + } +#else long i = (long)(__CTOR_LIST__[0]); - pfunc p; for ( ; i > 0; i-- ) { p = __CTOR_LIST__[i]; p (); } - -#else +#endif +} // cyg_hal_invoke_constructors() - typedef void (CYG_CODE_ADDRESS)(); - extern CYG_CODE_ADDRESS __sched_text_start; - extern CYG_CODE_ADDRESS __sched_text_end; - extern CYG_CODE_ADDRESS __clock_text_start; - extern CYG_CODE_ADDRESS __clock_text_end; - extern CYG_CODE_ADDRESS __thread_text_start; - extern CYG_CODE_ADDRESS __thread_text_end; - - typedef void (*pfunc) (); - extern pfunc __CTOR_LIST__[]; - pfunc *p; - - for (p = __CTOR_LIST__+1; *p != 0; p++) - { - CYG_ADDRESS *pp = (CYG_ADDRESS *)*p; - - if( pp > (CYG_ADDRESS *)&__sched_text_start && - pp < (CYG_ADDRESS *)&__sched_text_end ) - { - (*p) (); - *p = fake_ctor; - } - } - - for (p = __CTOR_LIST__+1; *p != 0; p++) - { - CYG_ADDRESS *pp = (CYG_ADDRESS *)*p; - - if( pp > (CYG_ADDRESS *)&__clock_text_start && - pp < (CYG_ADDRESS *)&__clock_text_end ) - { - (*p) (); - *p = fake_ctor; - } - } - - for (p = __CTOR_LIST__+1; *p != 0; p++) - { - CYG_ADDRESS *pp = (CYG_ADDRESS *)*p; - - if( pp > (CYG_ADDRESS *)&__thread_text_start && - pp < (CYG_ADDRESS *)&__thread_text_end ) - { - (*p) (); - *p = fake_ctor; - } - } - - for (p = __CTOR_LIST__+1; *p != 0; p++) - { - (*p) (); - *p = fake_ctor; - } - -#endif - +void +cyg_hal_enable_caches(void) +{ #ifdef CYG_HAL_MIPS_TX3904 // On the real hardware we also enable the cache. // doing this here is a temporary measure until we // have a proper platform specific place to do it. +#if !defined(CYGHWR_HAL_TX39_JMR3904_ENABLE_TOE) + HAL_ICACHE_INVALIDATE_ALL(); HAL_ICACHE_ENABLE(); HAL_DCACHE_INVALIDATE_ALL(); HAL_DCACHE_ENABLE(); + HAL_TX39_DEBUG_TOE_DISABLE(); + +#else + + // If TOE is enabled, caches are disabled by default + // until spurious Bus Timeout problem is fixed. + + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_DISABLE(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_DISABLE(); + + HAL_TX39_DEBUG_TOE_ENABLE(); + #endif - -#if defined(CYG_HAL_USE_ROM_MONITOR) && \ - !defined(CYGDBG_INFRA_DIAG_USE_DEVICE) && \ + +#endif +} // cyg_hal_enable_caches() + +void +cyg_hal_debug_init(void) +{ +#ifdef CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR +#if defined(CYG_HAL_USE_ROM_MONITOR) && \ + !defined(CYGDBG_INFRA_DIAG_USE_DEVICE) && \ defined(CYG_HAL_TX39_JMR3904) { @@ -226,19 +216,19 @@ cyg_hal_invoke_constructors (void) } #endif +#endif // CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR + #if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ defined(CYG_HAL_USE_ROM_MONITOR) && \ defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) { - extern void patch_dbg_syscalls(void * vector); -#define DBG_SYSCALL_VEC_NUM 15 - patch_dbg_syscalls( (void *)(&hal_vsr_table[DBG_SYSCALL_VEC_NUM]) ); + patch_dbg_syscalls( (void *)(&hal_vsr_table[0]) ); } #endif -} +} // cyg_hal_debug_init() -/*---------------------------------------------------------------------------*/ -/* Determine the index of the ls bit of the supplied mask. */ +/*------------------------------------------------------------------------*/ +/* Determine the index of the ls bit of the supplied mask. */ cyg_uint32 hal_lsbit_index(cyg_uint32 mask) { @@ -259,8 +249,8 @@ cyg_uint32 hal_lsbit_index(cyg_uint32 ma return tab[n>>26]; } -/*---------------------------------------------------------------------------*/ -/* Determine the index of the ms bit of the supplied mask. */ +/*------------------------------------------------------------------------*/ +/* Determine the index of the ms bit of the supplied mask. */ cyg_uint32 hal_msbit_index(cyg_uint32 mask) { @@ -283,8 +273,8 @@ cyg_uint32 hal_msbit_index(cyg_uint32 ma } -/*---------------------------------------------------------------------------*/ -/* Idle thread action */ +/*------------------------------------------------------------------------*/ +/* Idle thread action */ void hal_idle_thread_action( cyg_uint32 count ) { @@ -337,10 +327,50 @@ void hal_idle_thread_action( cyg_uint32 #endif } -/*---------------------------------------------------------------------------*/ -/* This code installs an interrupt handler to capture Ctrl-C. */ -/* It's here for lack of anywhere more suitable to put it. */ - +/*------------------------------------------------------------------------*/ +/* Functions to support the detection and execution of a user provoked */ +/* program break. These are usually called from interrupt routines. */ + +cyg_bool cyg_hal_is_break(char *buf, int size) +{ + while( size ) + if( buf[--size] == 0x03 ) return true; + + return false; +} + +void cyg_hal_user_break( CYG_ADDRWORD *regs ) +{ +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) + + // Ctrl-C: breakpoint. + extern void breakpoint(void); + breakpoint(); + +#elif defined(CYG_HAL_USE_ROM_MONITOR) && defined(CYG_HAL_USE_ROM_MONITOR_GDB_STUBS) + + // Ctrl-C: breakpoint. + typedef void bpt_fn(void); + bpt_fn *bfn = ((bpt_fn **)0x80000100)[61]; + bfn(); + +#elif defined(CYG_HAL_USE_ROM_MONITOR) && defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) + + // Ctrl-C: breakpoint. + typedef void install_bpt_fn(void *epc); + HAL_SavedRegisters *sreg = (HAL_SavedRegisters *)regs; + install_bpt_fn *ibp = (install_bpt_fn *)hal_vsr_table[35]; + if( ibp != NULL ) ibp((void *)sreg->pc); + +#endif + +} + +/*------------------------------------------------------------------------*/ +/* This code installs an interrupt handler to capture Ctrl-C. */ +/* It's here for lack of anywhere more suitable to put it. */ + +#ifdef CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR #if defined(CYG_HAL_USE_ROM_MONITOR) && \ !defined(CYGDBG_INFRA_DIAG_USE_DEVICE) && \ defined(CYG_HAL_TX39_JMR3904) @@ -359,8 +389,12 @@ void hal_idle_thread_action( cyg_uint32 #define BRG_T2 0x0100 #define BRG_T4 0x0200 #define BRG_T5 0x0300 - -static cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) + +typedef cyg_uint32 (*original_isr_ptr_t)(CYG_ADDRWORD vector, CYG_ADDRWORD data); +static original_isr_ptr_t original_isr_ptr; +static CYG_ADDRWORD original_data, original_object; + +static cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data, CYG_ADDRWORD* regs) { char c; CYG_WORD16 disr; @@ -375,34 +409,13 @@ static cyg_uint32 hal_ctrlc_isr(CYG_ADDR HAL_READ_UINT8( DIAG_RFIFO, c ); HAL_WRITE_UINT16( DIAG_SLDISR , disr ); - -#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) - if( c == 3 ) - { - // Ctrl-C: breakpoint. - extern void breakpoint(void); - breakpoint(); - } -#elif defined(CYG_HAL_USE_ROM_MONITOR) && defined(CYG_HAL_USE_ROM_MONITOR_GDB_STUBS) - if( c == 3 ) - { - // Ctrl-C: breakpoint. -// HAL_BREAKPOINT(_breakinst); - typedef void bpt_fn(void); - bpt_fn *bfn = ((bpt_fn **)0x80000100)[61]; - - bfn(); - } -#elif defined(CYG_HAL_USE_ROM_MONITOR) && defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) - if( c == 3 ) - { - // Ctrl-C: breakpoint. - HAL_BREAKPOINT(_breakinst1); - } -#endif + + if( cyg_hal_is_break( &c , 1 ) ) + cyg_hal_user_break( regs ); + return 0; } - - return 0; + /* else */ + return (*original_isr_ptr)(vector, data); } @@ -410,9 +423,20 @@ static void hal_init_ctrlc_intr(void) { CYG_WORD16 dicr; - HAL_INTERRUPT_ATTACH( CYG_VECTOR_SIO_0, hal_ctrlc_isr, NULL, NULL ); + cyg_uint32 index; + HAL_TRANSLATE_VECTOR(CYGNUM_HAL_INTERRUPT_SIO_0, index); + + original_data = hal_interrupt_data[index]; + original_object = hal_interrupt_objects[index]; + original_isr_ptr = (original_isr_ptr_t) hal_interrupt_handlers[index]; - HAL_INTERRUPT_UNMASK( CYG_VECTOR_SIO_0 ); + hal_interrupt_handlers[index] = + (CYG_ADDRESS)hal_default_isr; + + HAL_INTERRUPT_ATTACH( CYGNUM_HAL_INTERRUPT_SIO_0, hal_ctrlc_isr, original_data, + original_object ); + + HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_SIO_0 ); HAL_READ_UINT16( DIAG_SLDICR , dicr ); dicr = 0x0001; @@ -420,6 +444,7 @@ static void hal_init_ctrlc_intr(void) } #endif +#endif // CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR -/*---------------------------------------------------------------------------*/ -/* End of hal_misc.c */ +/*------------------------------------------------------------------------*/ +/* End of hal_misc.c */ diff --git a/packages/hal/mips/arch/current/src/mips-stub.c b/packages/hal/mips/arch/current/src/mips-stub.c --- a/packages/hal/mips/arch/current/src/mips-stub.c +++ b/packages/hal/mips/arch/current/src/mips-stub.c @@ -1,6 +1,6 @@ /* mips-stub.c - helper functions for stub, generic to all MIPS processors * - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -15,40 +15,17 @@ #include -#include "cyg/hal/hal_stub.h" +#include #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#include "cyg/hal/hal_arch.h" -#include -#include +#include -#define SIGHUP 1 /* hangup */ -#define SIGINT 2 /* interrupt */ -#define SIGQUIT 3 /* quit */ -#define SIGILL 4 /* illegal instruction (not reset when caught) */ -#define SIGTRAP 5 /* trace trap (not reset when caught) */ -#define SIGIOT 6 /* IOT instruction */ -#define SIGABRT 6 /* used by abort, replace SIGIOT in the future */ -#define SIGEMT 7 /* EMT instruction */ -#define SIGFPE 8 /* floating point exception */ -#define SIGKILL 9 /* kill (cannot be caught or ignored) */ -#define SIGBUS 10 /* bus error */ -#define SIGSEGV 11 /* segmentation violation */ -#define SIGSYS 12 /* bad argument to system call */ -#define SIGPIPE 13 /* write on a pipe with no one to read it */ -#define SIGALRM 14 /* alarm clock */ -#define SIGTERM 15 /* software termination signal from kill */ +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include - -/* Saved registers. */ - -HAL_SavedRegisters *_hal_registers; - -target_register_t * _registers; /* A pointer to the current set of registers */ -target_register_t registers[NUMREGS]; -target_register_t alt_registers[NUMREGS] ; /* Thread or saved process state */ - +#include +#include /* Given a trap value TRAP, return the corresponding signal. */ @@ -105,7 +82,6 @@ int __computeSignal (unsigned int trap_n } } - /* Return the trap number corresponding to the last-taken trap. */ int __get_trap_number (void) @@ -113,21 +89,6 @@ int __get_trap_number (void) return (get_register (CAUSE) & CAUSE_EXCMASK) >> CAUSE_EXCSHIFT; } -// Return the currently-saved value corresponding to register REG of -// the exception context. -target_register_t get_register (regnames_t reg) -{ - return registers[reg]; -} - -// Store VALUE in the register corresponding to WHICH in the exception -// context. -void put_register (regnames_t which, target_register_t value) -{ - registers[which] = value; -} - - /* Set the currently-saved pc register value to PC. This also updates NPC as needed. */ @@ -156,14 +117,14 @@ static struct This may be done by setting breakpoints or setting a single step flag in the saved user registers, for example. */ -void single_step (void) +void __single_step (void) { InstFmt inst; t_inst *pc = (t_inst *) get_register (PC); - instrBuffer.targetAddr = pc + 1; /* set default */ + instrBuffer.targetAddr = pc + 1; /* set default */ - inst.word = *pc; /* read the next instruction */ + inst.word = *pc; /* read the next instruction */ //diag_printf("pc %08x %08x\n",pc,inst.word); @@ -208,7 +169,7 @@ void single_step (void) case OP_JAL: instrBuffer.targetAddr = (t_inst *)((inst.JType.target<<2) - + ((get_register (PC) + 4)&0xf0000000)); + + ((get_register (PC) + 4)&0xf0000000)); break; case OP_BEQ: @@ -216,7 +177,7 @@ void single_step (void) if (get_register (inst.IType.rs) == get_register (inst.IType.rt)) instrBuffer.targetAddr = (t_inst *)(((signed short)inst.IType.imm<<2) - + (get_register (PC) + 4)); + + (get_register (PC) + 4)); else instrBuffer.targetAddr = (t_inst *)(get_register (PC) + 8); break; @@ -225,7 +186,7 @@ void single_step (void) if (get_register (inst.IType.rs) != get_register (inst.IType.rt)) instrBuffer.targetAddr = (t_inst *)(((signed short)inst.IType.imm<<2) - + (get_register (PC) + 4)); + + (get_register (PC) + 4)); else instrBuffer.targetAddr = (t_inst *)(get_register (PC) + 8); break; @@ -246,7 +207,7 @@ void single_step (void) instrBuffer.targetAddr = (t_inst *)(get_register (PC) + 8); break; -#if 0 /* no floating point support at the moment */ +#if 0 /* no floating point support at the moment */ case OP_COP1: if (inst.RType.rs == OP_BC) switch (inst.RType.rt) { @@ -278,7 +239,7 @@ void single_step (void) /* Clear the single-step state. */ -void clear_single_step (void) +void __clear_single_step (void) { //diag_printf("clear_ss ta %08x\n",instrBuffer.targetAddr); if (instrBuffer.targetAddr != NULL) @@ -290,7 +251,7 @@ void clear_single_step (void) } -void install_breakpoints () +void __install_breakpoints () { //diag_printf("install_bpt ta %08x\n",instrBuffer.targetAddr); if (instrBuffer.targetAddr != NULL) @@ -302,6 +263,10 @@ void install_breakpoints () } } +void __clear_breakpoints (void) +{ +} + /* If the breakpoint we hit is in the breakpoint() instruction, return a non-zero value. */ @@ -309,7 +274,7 @@ void install_breakpoints () int __is_breakpoint_function () { - return get_register (PC) == (target_register_t)&_breakinst; + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); } @@ -319,60 +284,7 @@ int void __skipinst (void) { - put_register (PC, get_register (PC) + 4); -} - - -/* Write the 'T' packet in BUFFER. SIGVAL is the signal the program - received. */ - -void __build_t_packet (int sigval, char *buf) -{ - target_register_t addr; - char *ptr = buf; - target_register_t *sp; - - sp = (target_register_t *) get_register (SP); - - *ptr++ = 'T'; - *ptr++ = __tohex (sigval >> 4); - *ptr++ = __tohex (sigval); - - -#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT - // Include thread ID if thread manipulation is required. - { - int id; - extern int dbg_currthread_id(void); // FIXME: get from header instead - - *ptr++ = 't'; - *ptr++ = 'h'; - *ptr++ = 'r'; - *ptr++ = 'e'; - *ptr++ = 'a'; - *ptr++ = 'd'; - *ptr++ = ':'; - - id = dbg_currthread_id (); - ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); - *ptr++ = ';'; - } -#endif - - *ptr++ = __tohex (PC >> 4); - *ptr++ = __tohex (PC); - *ptr++ = ':'; - addr = get_register (PC); - ptr = __mem2hex((char *)&addr, ptr, sizeof(addr), 0); - *ptr++ = ';'; - - *ptr++ = __tohex (SP >> 4); - *ptr++ = __tohex (SP); - *ptr++ = ':'; - ptr = __mem2hex((char *)&sp, ptr, sizeof(sp), 0); - *ptr++ = ';'; - - *ptr++ = 0; + put_register (PC, get_register (PC) + 4); } #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/mips/arch/current/src/tx39.ld b/packages/hal/mips/arch/current/src/tx39.ld new file mode 100644 --- /dev/null +++ b/packages/hal/mips/arch/current/src/tx39.ld @@ -0,0 +1,161 @@ +//=========================================================================== +// +// MLT linker script for TX39 +// adapted from packages\hal\mips\jmr3904\v1_1\src\jmr3904.ld +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +#include + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 8 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#if defined(CYG_HAL_STARTUP_RAM) + +/* this version for RAM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + /* debug and reset vector not used in RAM version */ \ + KEEP(*(.debug_vector)) \ + KEEP (*(.reset_vector)) } \ + > _region_ + +#elif defined(CYG_HAL_STARTUP_ROM) + +/* this version for ROM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.reset_vector)) \ + . = ALIGN(0x100); KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + . = ALIGN(0x100); KEEP(*(.debug_vector)) } \ + > _region_ + +#endif /* ROM startup version of ROM vectors */ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = ABSOLUTE(.); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_vsr_table(_region_, _vma_, _lma_) \ + .vsr_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.vsr_table) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_rel__dyn(_region_, _vma_, _lma_) \ + .rel.dyn _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rel.dyn) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); \ + *(.data*) *(.data1) \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (8); \ + SORT (CONSTRUCTORS) *(.ctors*) *(.dtors*) \ + . = ALIGN (8); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + . = ALIGN (8); \ + _GOT_START = ABSOLUTE (.); _gp = ABSOLUTE (.); __global = _gp; _GLOBAL_OFFSET_TABLE_ = ABSOLUTE (.); _SDA_BASE_ = ABSOLUTE (.); \ + *(.got.plt) *(.got) _GOT_END_ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) *(.eh_frame) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + .debug 0 : { *(.debug) } \ + .line 0 : { *(.line) } \ + .debug_srcinfo 0 : { *(.debug_srcinfo) } \ + .debug_sfnames 0 : { *(.debug_sfnames) } \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + .debug_weaknames 0 : { *(.debug_weaknames) } \ + .debug_funcnames 0 : { *(.debug_funcnames) } \ + .debug_typenames 0 : { *(.debug_typenames) } \ + .debug_varnames 0 : { *(.debug_varnames) } + +#include CYGHWR_MEMORY_LAYOUT_LDI + +#ifndef CYGPKG_HAL_TX39_SIM +hal_vsr_table = 0x80000100; +#endif diff --git a/packages/hal/mips/arch/current/src/vectors.S b/packages/hal/mips/arch/current/src/vectors.S --- a/packages/hal/mips/arch/current/src/vectors.S +++ b/packages/hal/mips/arch/current/src/vectors.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -69,7 +69,30 @@ #elif defined(CYG_HAL_STARTUP_ROM) # define INITIAL_SR 0x1040ff00 /* as above + ROM vectors used */ #endif - + +## ROM timing characteristics dependent on the clock speed. + +#if (CYGHWR_HAL_MIPS_CPU_FREQ == 50) +#define ROM_CCR0_INIT 0x00000420 +#define DRAM_DREFC_INIT 0x00000180 +#elif (CYGHWR_HAL_MIPS_CPU_FREQ == 66) +#define ROM_CCR0_INIT 0x00000520 +#define DRAM_DREFC_INIT 0x00000200 +#else +#error Unsupported clock frequency +#endif + +## DRAM configuration dependent on the DRAM device used. + ## for 16MByte (4MBit (x4bit) x 8) 0x08024030 + ## for 4MByte (1MBit (x4bit) x 8) 0x08013020 + ## for 8MByte (1MBit (x4bit) x 8 x 2 banks) 0x08013020 + +#if defined CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT +#define DRAM_CONFIG_INIT CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT +#else +#define DRAM_CONFIG_INIT 0x08024030 +#endif + ##----------------------------------------------------------------------------- ## Hardware supplied vectors @@ -152,31 +175,77 @@ utlb_vector: # These mappings need to be set up before we # can use the stack and make calls to other # functions - + + # If we have been started from Cygmon, it should have + # already done a lot of this, but it should do no harm + # to reinitialize the following registers. + # SCS0,1 base addr of ISA & PCI la a0,0xffffe010 la a1,0x20201410 sw a1,0(a0) la a0,0xffffe014 - la a1,0x0000fcfc + la a1,0xfffffcfc sw a1,0(a0) # ROM configuration + .set at la a0,0xffff9000 - la a1,0x1fc00400 + lw a1,0(a0) + and a1,a1,0xffff0004 # keep hardware defaults + or a1,ROM_CCR0_INIT # install our values sw a1,0(a0) + .set noat # SRAM config la a0,0xffff9100 la a1,0x00000000 sw a1,0(a0) + # ISA bus setup + la a0,0xb2100000 + la a1,4 + sb a1,0(a0) + + # Clear IMR (to cope with JMON) + la a0,0xffffc004 + la a1,0x00000000 + sw a1,0(a0) + +#if defined(CYG_HAL_STARTUP_ROM) + + # Only do this in ROM configurations. + + # DRAM Configuration + la a0, 0xffff8000 + la a1, DRAM_CONFIG_INIT + sw a1, 0(a0) + + # DBMR0 + la a0, 0xffff8004 + la a1, 0x00000000 + sw a1, 0(a0) + + # DWR0 + la a0, 0xffff8008 + la a1, 0x00000000 + sw a1, 0(a0) + + # DREFC - Depends on clock requency + la a0, 0xffff8800 + la a1, DRAM_DREFC_INIT + sw a1, 0(a0) + +#endif + + # Set up PIO0 for output la a0,0xfffff500 la a1,0xff sb a1,0(a0) la a1,0 sb a1,4(a0) + #endif # Load Global Pointer register. @@ -263,7 +332,21 @@ utlb_vector: .extern cyg_hal_invoke_constructors jal cyg_hal_invoke_constructors + nop + + .extern cyg_hal_enable_caches + jal cyg_hal_enable_caches + nop + + .extern cyg_hal_debug_init + jal cyg_hal_debug_init + nop + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + .extern initialize_stub + jal initialize_stub nop +#endif # Call cyg_start @@ -475,8 +558,8 @@ 9: la gp,_gp #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT - .extern _18Cyg_Scheduler_Base$sched_lock - la v0,_18Cyg_Scheduler_Base$sched_lock + .extern cyg_scheduler_sched_lock + la v0,cyg_scheduler_sched_lock lw a0,0(v0) addi a0,a0,1 sw a0,0(v0) @@ -546,7 +629,9 @@ 8: lw a1,0(a1) # Data pointer move a0,s2 # pass interrupt number - + + move a2,s0 # arg3 = saved register dump + jalr t2 # call ISR via t2 nop # (delay slot) @@ -687,16 +772,6 @@ interrupt_translation_table: __interrupt_stack: .long 0,0,0,0,0,0,0,0 - -#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT - - .globl idle_thread_stack -idle_thread_stack: - .rept CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE - .byte 0 - .endr - -#endif ##----------------------------------------------------------------------------- ## VSR table. diff --git a/packages/hal/mips/arch/current/tests/PKGconf.mak b/packages/hal/mips/arch/current/tests/PKGconf.mak --- a/packages/hal/mips/arch/current/tests/PKGconf.mak +++ b/packages/hal/mips/arch/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mips/jmr3904/current/ChangeLog b/packages/hal/mips/jmr3904/current/ChangeLog --- a/packages/hal/mips/jmr3904/current/ChangeLog +++ b/packages/hal/mips/jmr3904/current/ChangeLog @@ -1,3 +1,119 @@ +1999-04-29 Hugo Tyson + + * src/hal_diag.c (hal_diag_write_char): Only include the code to + read the '+' from GDB and test for ^C there if not installing the + default isr to catch these: CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR. + +1999-04-08 John Dallaway + + * include/pkgconf/mlt_*.*: Use double underscore substitution + for period character in SECTION_* macro names (PR 19787) + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-24 Nick Garnett + + * include/pkgconf/hal_tx39_jmr3904.h: + Added some edit-only options for controlling DRAM setup and bus + timeout detection. These should only be used by experts, so they + are not presently exported as full config options. + +1999-03-23 Nick Garnett + + * src/hal_diag.c (hal_diag_write_char): Backed off Gary's change. + +1999-03-18 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Don't disable all interrupts, + just the ones for the appropriate UART. + +1999-03-11 Nick Garnett + + * src/hal_diag.c (hal_diag_write_char): + Enabled code to process ACK characters and force a breakpoint. + This is temporary, it needs to use cyg_hal_is_break() and + cyg_hal_user_break(). + +1999-03-10 Bart Veer + + * src/hal_diag.c (hal_diag_init): + Fixed names of symbols used for the frequency option. + +1999-03-10 Nick Garnett + + * src/hal_diag.c: + * include/pkgconf/hal_tx39_jmr3904.h: + Removed frequency options and made them more generic to all MIPS + targets. Changed names where applicable. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-23 Nick Garnett + + * src/hal_diag.c: + Added support for 66MHz part. + Disabled handling of GDB O packet acknowledgement, this is now + done by hal_ctrlc_isr() which also checks for ^C. + + * include/pkgconf/hal_tx39_jmr3904.h: + Added support for 66MHz part. + +1999-02-20 Jonathan Larmour + + * src/hal_diag.c (hal_diag_write_char): + Rename CYG_VECTOR_EXTERNAL_2 -> CYGNUM_HAL_INTERRUPT_EXTERNAL_2 + in line with HAL changes + +1999-02-16 Jesper Skov + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/plf_stub.c: [added] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-05 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-13 John Dallaway + + * include/pkgconf/ram.ldi: add .rel.dyn output section + * include/pkgconf/rom.ldi: add .rel.dyn output section + +1999-01-13 John Dallaway + + * src/jmr3904.ld: remove for MLT + * src/PKGconf.mak: remove jmr3904.ld rules for MLT + * include/pkgconf/ram.ldi: new linker script fragment for MLT + * include/pkgconf/rom.ldi: new linker script fragment for MLT + +1998-11-16 Jesper Skov + + * src/hal_stub.c (set_debug_traps): Call initHardware. + (__flush_d_cache): Added. + 1998-10-25 Jesper Skov * src/hal_stub.c: Fixed #endif comment. @@ -130,7 +246,7 @@ 1998-07-23 Nick Garnett +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mips/jmr3904/current/include/hal_stub.h b/packages/hal/mips/jmr3904/current/include/hal_stub.h deleted file mode 100644 --- a/packages/hal/mips/jmr3904/current/include/hal_stub.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef CYGONCE_HAL_HAL_STUB_H -#define CYGONCE_HAL_HAL_STUB_H - -//============================================================================= -// -// hal_stub.h -// -// General header for HAL GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors: nickg -// Date: 1998-06-08 -// Purpose: HAL stub support. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include - -#include -#include - -//----------------------------------------------------------------------------- -#endif // CYGONCE_HAL_HAL_STUB_H -// End of hal_stub.h - - diff --git a/packages/hal/mips/jmr3904/current/include/pkgconf/hal_tx39_jmr3904.h b/packages/hal/mips/jmr3904/current/include/pkgconf/hal_tx39_jmr3904.h --- a/packages/hal/mips/jmr3904/current/include/pkgconf/hal_tx39_jmr3904.h +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/hal_tx39_jmr3904.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_TX39_JMR3904_H // ==================================================================== // -// pkgconf/hal_tx39_jmr3904.h +// pkgconf/hal_tx39_jmr3904.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### @@ -76,10 +76,32 @@ eCos application be blown into EPROMs or equivalent technology." } - + }}CFG_DATA */ + #define CYGHWR_HAL_TX39_JMR3904_STARTUP ram /* -------------------------------------------------------------------*/ +/* Manually edited configuration option, these should only be touched */ +/* by experts who understand the consequences. */ + +/* DRAM Configuration */ +/* for 16MByte (4MBit (x4bit) x 8) 0x08024030 */ +/* for 4MByte (1MBit (x4bit) x 8) 0x08013020 */ +/* for 8MByte (1MBit (x4bit) x 8 x 2 banks) 0x08013020 */ + +#define CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT 0x08024030 // 16MByte +//#define CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT 0x08013020 // 4 or 8MByte + +/* Bus Timeout Detection */ + +/* Note: If you enable this option the caches are disabled by default. + * If you enable caches in your code, Spurious Bus Time Outs might + * fire. + */ + +// #define CYGHWR_HAL_TX39_JMR3904_ENABLE_TOE + +/* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_TX39_JMR3904_H */ /* EOF hal_tx39_jmr3904.h */ diff --git a/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.ldi b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 17:05:29 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x80008000, LENGTH = 0x78000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x80008000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rel__dyn (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.mlt b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 80008000 78000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 80008000 80008000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn ! +section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.ldi b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.ldi @@ -0,0 +1,49 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 10:44:34 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x80000200, LENGTH = 0x7fe00 + rom : ORIGIN = 0xbfc00000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xbfc00000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rel__dyn (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x80000200, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.mlt b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_tx39_jmr3904_rom.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 80000200 7fe00 0 ! +region rom bfc00000 80000 1 ! +section data 0 1 1 1 1 1 0 0 80000200 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 bfc00000 bfc00000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn ! +section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/mips/jmr3904/current/include/plf_stub.h b/packages/hal/mips/jmr3904/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/plf_stub.h @@ -0,0 +1,80 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform HAL stub support for MIPS/JMR3904 boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. +extern void hal_jmr_init_serial( void ); +extern int hal_jmr_get_char( void ); +extern void hal_jmr_put_char( int c ); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_jmr_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_jmr_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_jmr_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/mips/jmr3904/current/src/PKGconf.mak b/packages/hal/mips/jmr3904/current/src/PKGconf.mak --- a/packages/hal/mips/jmr3904/current/src/PKGconf.mak +++ b/packages/hal/mips/jmr3904/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,24 +32,10 @@ PACKAGE := hal_tx39_jmr3904 include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_diag.c jmr3904.S hal_stub.c +COMPILE := hal_diag.c jmr3904.S plf_stub.c OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - -.PHONY: ldscript.clean - -ldscript.stamp: jmr3904.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - diff --git a/packages/hal/mips/jmr3904/current/src/hal_diag.c b/packages/hal/mips/jmr3904/current/src/hal_diag.c --- a/packages/hal/mips/jmr3904/current/src/hal_diag.c +++ b/packages/hal/mips/jmr3904/current/src/hal_diag.c @@ -1,8 +1,8 @@ /*============================================================================= // -// hal_diag.c +// hal_diag.c // -// HAL diagnostic output code +// HAL diagnostic output code // //============================================================================= //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 // Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. +// Description: Implementations of HAL diagnostic output support. // //####DESCRIPTIONEND#### // @@ -115,10 +115,18 @@ void hal_diag_init() HAL_WRITE_UINT16( DIAG_SLDICR , 0x0000 ); HAL_WRITE_UINT16( DIAG_SFCR , 0x0000 ); - -// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 20 ); - HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 10 ); -// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 5 ); + +#if CYGHWR_HAL_MIPS_CPU_FREQ == 50 +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 20 ); // 9600 bps +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 10 ); // 19200 bps + HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 5 ); // 38400 bps +#elif CYGHWR_HAL_MIPS_CPU_FREQ == 66 +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 27 ); // 9600 bps +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T0 | 54 ); // 19200 bps + HAL_WRITE_UINT16( DIAG_SBRG , BRG_T0 | 27 ); // 38400 bps +#else +#error Unsupported CPU frequency +#endif //hal_diag_led(0x10); #endif } @@ -206,15 +214,13 @@ void hal_diag_write_char(char c) if( c == '\n' || pos == sizeof(line) ) { - CYG_INTERRUPT_STATE old; -// CYG_ADDRWORD old; // Disable interrupts. This prevents GDB trying to interrupt us // while we are in the middle of sending a packet. The serial // receive interrupt will be seen when we re-enable interrupts // later. - - HAL_DISABLE_INTERRUPTS(old); + CYG_INTERRUPT_STATE oldstate; + HAL_DISABLE_INTERRUPTS(oldstate); while(1) { @@ -240,12 +246,22 @@ void hal_diag_write_char(char c) hal_diag_write_char_serial0(hex[(csum>>4)&0xF]); hal_diag_write_char_serial0(hex[csum&0xF]); -#if 1 +#ifndef CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR hal_diag_read_char_serial0( &c1 ); + if( c1 == '+' ) break; + + // FIXME: Need to make the following use + // cyg_hal_is_break() and cyg_hal_user_break(). + + if( c1 == 3 ) + HAL_BREAKPOINT(_breakinst); +#endif // ! CYGDBG_HAL_MIPS_INSTALL_CTRL_C_ISR +#if 0 + // We must ack the interrupt caused by that read to avoid // confusing the GDB stub ROM. -// HAL_INTERRUPT_ACKNOWLEDGE( CYG_VECTOR_EXTERNAL_2 ); +// HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SIO_0 ); if( c1 == '+' ) break; @@ -291,7 +307,7 @@ void hal_diag_write_char(char c) hal_diag_drain_serial0(); // And re-enable interrupts - HAL_RESTORE_INTERRUPTS(old); + HAL_RESTORE_INTERRUPTS( oldstate ); } #endif diff --git a/packages/hal/mips/jmr3904/current/src/hal_stub.c b/packages/hal/mips/jmr3904/current/src/hal_stub.c deleted file mode 100644 --- a/packages/hal/mips/jmr3904/current/src/hal_stub.c +++ /dev/null @@ -1,258 +0,0 @@ -/* hal-stub.c - helper functions for stub, specific to ECC HAL - * - * Copyright (c) 1998 Cygnus Support - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. - */ - -#include - -//#include -//#include "board.h" - -#include - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include -#include -#include -#include - -/*---------------------------------------------------------------------------*/ - -#define DIAG_BASE 0xfffff300 -#define DIAG_SLCR (DIAG_BASE+0x00) -#define DIAG_SLSR (DIAG_BASE+0x04) -#define DIAG_SLDICR (DIAG_BASE+0x08) -#define DIAG_SLDISR (DIAG_BASE+0x0C) -#define DIAG_SFCR (DIAG_BASE+0x10) -#define DIAG_SBRG (DIAG_BASE+0x14) -#define DIAG_TFIFO (DIAG_BASE+0x20) -#define DIAG_RFIFO (DIAG_BASE+0x30) - -#define BRG_T0 0x0000 -#define BRG_T2 0x0100 -#define BRG_T4 0x0200 -#define BRG_T5 0x0300 - -/*---------------------------------------------------------------------------*/ - -/* External data */ - -extern int output_debug; /* dvemon.c */ -extern int (*read_vector) (int, char *, int); /* read.c */ -extern int (*write_vector) (int, char *, int); /* write.c */ - -/* External functions */ - -//int outbyte (unsigned char byte); /* dvemon.c */ -//unsigned char inbyte (); /* dvemon.c */ -//void general_exception (void); /* tx39-exc.S */ - - -/* Local data */ - - -/* If ENABLED is non-zero, supply a memory fault handler that traps - subsequent memory errors and sets _mem_err to 1. Otherwise, memory - faults are processed as exceptions. */ - -void __set_mem_fault_trap (int enable) {} - -static int serial_initialized = 0; - -static void serial_init() -{ -//hal_diag_led(0x10); - HAL_WRITE_UINT16( DIAG_SLCR , 0x0020 ); - - HAL_WRITE_UINT16( DIAG_SLDICR , 0x0000 ); - - HAL_WRITE_UINT16( DIAG_SFCR , 0x0000 ); - -// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 20 ); -// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 10 ); - HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 5 ); - - serial_initialized = 1; - -//hal_diag_led(0x10); -} - -/* Write C to the current serial port. */ - -void putDebugChar (int c) -{ -#ifdef CYG_HAL_MIPS_SIM - -#else - CYG_WORD16 disr; - -//hal_diag_led(0x20); - - if( !serial_initialized ) serial_init(); - - for(;;) - { - HAL_READ_UINT16( DIAG_SLDISR , disr ); - - if( disr & 0x0002 ) break; - } - - disr = disr & ~0x0002; - - HAL_WRITE_UINT8( DIAG_TFIFO, c ); - - HAL_WRITE_UINT16( DIAG_SLDISR , disr ); - -//hal_diag_led(0x20); -// HAL_DIAG_WRITE_CHAR( c ); -#endif -} - -/* Read one character from the current serial port. */ - -int getDebugChar (void) -{ -#ifdef CYG_HAL_MIPS_SIM - static char input[] = "+$s#73"; - static int i = 0; - return input[i++]; -#else - char c; - - CYG_WORD16 disr; - - if( !serial_initialized ) serial_init(); - -//hal_diag_led(0x40); - for(;;) - { - - HAL_READ_UINT16( DIAG_SLDISR , disr ); - - if( disr & 0x0001 ) break; - } - - disr = disr & ~0x0001; - - HAL_READ_UINT8( DIAG_RFIFO, c ); - - HAL_WRITE_UINT16( DIAG_SLDISR , disr ); - -//hal_diag_led(0x40); - -// HAL_DIAG_READ_CHAR(c); -// diag_printf("<%02x:%c>",c); - - return c; - -#endif -} - - -/* Install the standard set of trap handlers for the stub. */ - -void __install_traps (void) -{ - // Nothing to do, the HAL will call handle_exception when one occurs. -} - -/* Flush the instruction cache. */ -void flush_i_cache (void) { HAL_ICACHE_INVALIDATE_ALL(); } - - -/* Reset the board. */ -void __reset (void) {} - - -/* Set the baud rate for the current serial port. */ -void __set_baud_rate (int baud) {} - - -/* Initialize the hardware. */ -void initHardware (void) {} - -#if 0 -/* Alternate read function for use when stub is running. It - reads the data for standard input from the remote GDB. */ - -int dve_read (int fd, char *buf, int nbytes) -{ - __get_gdb_input (buf, nbytes, 1); -} - -/* Alternate write function for use when stub is running. It - writes the data for standard output to the remote GDB. */ - -int dve_write (int fd, char *buf, int nbytes) -{ - __output_gdb_string (buf, nbytes); -} - -#endif - -/* Install traps and otherwise initialize stub. */ - -void set_debug_traps (void) -{ -// output_debug = 0; /* disable control-O prefixing on output */ - initialize_stub (); /* will call __install_traps and initHardware */ -// read_vector = dve_read; /* alternate read() function for stub */ -// write_vector = dve_write; /* alternate write() function for stub */ -} - - -/* This function will generate a breakpoint exception. It is used at the - beginning of a program to sync up with a debugger and can be used - otherwise as a quick means to stop program execution and "break" into - the debugger. */ - -void -breakpoint() -{ -#ifdef CYG_HAL_MIPS_SIM - - // This code causes a fake breakpoint. - asm volatile ( - "lui $24,0x0000;" - "ori $24,0x0024;" - "mtc0 $24,$13;" - "lui $25,%%hi(1f);" - "ori $25,$25,%%lo(1f);" - "j other_vector;" - "nop;" - ".global _breakinst;" - "_breakinst:" - "1: nop;" - : - : - : "t8", "t9" - ); - -#else - - HAL_BREAKPOINT(_breakinst); - -#endif - -} - - -/* This function returns the opcode for a 'break 5' instruction. */ - -unsigned long __break_opcode () -{ - return HAL_BREAKINST; -} - -#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/mips/jmr3904/current/src/jmr3904.S b/packages/hal/mips/jmr3904/current/src/jmr3904.S --- a/packages/hal/mips/jmr3904/current/src/jmr3904.S +++ b/packages/hal/mips/jmr3904/current/src/jmr3904.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mips/jmr3904/current/src/jmr3904.ld b/packages/hal/mips/jmr3904/current/src/jmr3904.ld deleted file mode 100644 --- a/packages/hal/mips/jmr3904/current/src/jmr3904.ld +++ /dev/null @@ -1,230 +0,0 @@ -/*========================================================================== -// -// jmr3904.ld -// -// Linker script for JMR3904 board -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: JMR3904 Linker script -// Description: This script is passed to the linker to define the memory -// of the JMR-TX3904 board. -// -//####DESCRIPTIONEND#### -// -//========================================================================*/ - -STARTUP(vectors.o) -ENTRY(reset_vector) - -GROUP(libtarget.a libgcc.a) - -#include - -#if defined(CYG_HAL_STARTUP_RAM) -# if defined(CYG_HAL_USE_ROM_MONITOR) -# define LOAD_BASE 0x80008000 -# define DATA_BASE -# else -# define LOAD_BASE 0x80000000 -# define DATA_BASE -# endif -# define AT(x) -#elif defined(CYG_HAL_STARTUP_ROM) -# define LOAD_BASE 0xBFC00000 -# define DATA_BASE 0x80000200 -#endif - -SECTIONS -{ - /*------------------------------------------------------------*/ - - /* Start of ROM */ - . = LOAD_BASE; - - .rom_vectors : - { -#if defined(CYG_HAL_STARTUP_RAM) -#if !defined(CYG_HAL_USE_ROM_MONITOR) - KEEP(*(.utlb_vector)) - . = ALIGN(0x80); - KEEP(*(.other_vector)) - . = ALIGN(0x100); - KEEP(*(.vsr_table)) /* VSR table at 0x80000100 */ - /* debug and reset vector not used in RAM version */ - KEEP(*(.debug_vector)) - KEEP(*(.reset_vector)) -#endif -#elif defined(CYG_HAL_STARTUP_ROM) - KEEP(*(.reset_vector)) - . = ALIGN(0x100); - KEEP(*(.utlb_vector)) - . = ALIGN(0x80); - KEEP(*(.other_vector)) - . = ALIGN(0x100); - KEEP(*(.debug_vector)) -#endif - } - - /*------------------------------------------------------------*/ - - .text : - { - _stext = .; -#ifndef CYG_KERNEL_USE_INIT_PRIORITY - __sched_text_start = .; - *sched.o(.text*) - __sched_text_end = .; - __clock_text_start = .; - *clock.o(.text*) - __clock_text_end = .; - __thread_text_start = .; - *thread.o(.text*) - __thread_text_end = .; -#endif - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - *(.init) - - } - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } - .rodata : { *(.rodata*) } - .rodata1 : { *(.rodata1) } - .fixup : { *(.fixup) } - .gcc_except_table : { *(.gcc_except_table) } - - /*------------------------------------------------------------*/ - -/* __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); */ - __rom_data_start = ALIGN(8); - .data DATA_BASE : - AT( __rom_data_start ) - { - __ram_data_start = .; - *(.data*) - *(.data1) - _GOT1_START_ = .; - *(.got1) - _GOT1_END_ = .; - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. */ - _GOT2_START_ = .; - *(.got2) - _GOT2_END_ = .; - . = ALIGN(8); -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - SORT(CONSTRUCTORS) - *(.ctors*) - *(.dtors*) -#else - CONSTRUCTORS - *(.ctors*) - *(.dtors*) -#endif - . = ALIGN(8); - _GOT_START_ = .; - _gp = .; - __global = _gp; - _GLOBAL_OFFSET_TABLE_ = .; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - _GOT_END_ = .; - *(.dynamic) - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - *(.sdata*) - *(.sbss*) - *(.eh_frame) - } - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - - /*------------------------------------------------------------*/ - - . = ALIGN(4); - __bss_start = .; - .bss : - { - *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - - /*------------------------------------------------------------*/ - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to - the beginning of the section so we begin them at 0. */ - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - -} - -#if !(defined(CYG_HAL_STARTUP_RAM) && !defined(CYG_HAL_USE_ROM_MONITOR)) - -hal_vsr_table = 0x80000100; - -#endif - -// End of jmr3904.ld diff --git a/packages/hal/mips/jmr3904/current/src/plf_stub.c b/packages/hal/mips/jmr3904/current/src/plf_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/src/plf_stub.c @@ -0,0 +1,151 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, jskov (based on the old tx39 hal_stub.c) +// Contributors:nickg, jskov +// Date: 1999-02-12 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +#include // HAL IO macros +#include // diag output. FIXME + +//----------------------------------------------------------------------------- +// Serial definitions. +#define DIAG_BASE 0xfffff300 +#define DIAG_SLCR (DIAG_BASE+0x00) +#define DIAG_SLSR (DIAG_BASE+0x04) +#define DIAG_SLDICR (DIAG_BASE+0x08) +#define DIAG_SLDISR (DIAG_BASE+0x0C) +#define DIAG_SFCR (DIAG_BASE+0x10) +#define DIAG_SBRG (DIAG_BASE+0x14) +#define DIAG_TFIFO (DIAG_BASE+0x20) +#define DIAG_RFIFO (DIAG_BASE+0x30) + +#define BRG_T0 0x0000 +#define BRG_T2 0x0100 +#define BRG_T4 0x0200 +#define BRG_T5 0x0300 + +//----------------------------------------------------------------------------- + +// Initialize the current serial port. +void hal_jmr_init_serial( void ) +{ +//hal_diag_led(0x10); + HAL_WRITE_UINT16( DIAG_SLCR , 0x0020 ); + + HAL_WRITE_UINT16( DIAG_SLDICR , 0x0000 ); + + HAL_WRITE_UINT16( DIAG_SFCR , 0x0000 ); + +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 20 ); +// HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 10 ); + HAL_WRITE_UINT16( DIAG_SBRG , BRG_T2 | 5 ); + +//hal_diag_led(0x10); +} + +// Write C to the current serial port. +void hal_jmr_put_char( int c ) +{ + CYG_WORD16 disr; + +//hal_diag_led(0x20); + + for(;;) + { + HAL_READ_UINT16( DIAG_SLDISR , disr ); + + if( disr & 0x0002 ) break; + } + + disr = disr & ~0x0002; + + HAL_WRITE_UINT8( DIAG_TFIFO, c ); + + HAL_WRITE_UINT16( DIAG_SLDISR , disr ); + +//hal_diag_led(0x20); +// HAL_DIAG_WRITE_CHAR( c ); +} + +// Read one character from the current serial port. +int hal_jmr_get_char( void ) +{ +#ifdef CYG_HAL_MIPS_SIM + // FIXME: ask nickg if this can go to /dev/null + static char input[] = "+$s#73"; + static int i = 0; + return input[i++]; +#else + char c; + + CYG_WORD16 disr; + +//hal_diag_led(0x40); + for(;;) + { + + HAL_READ_UINT16( DIAG_SLDISR , disr ); + + if( disr & 0x0001 ) break; + } + + disr = disr & ~0x0001; + + HAL_READ_UINT8( DIAG_RFIFO, c ); + + HAL_WRITE_UINT16( DIAG_SLDISR , disr ); + +//hal_diag_led(0x40); + +// HAL_DIAG_READ_CHAR(c); +// diag_printf("<%02x:%c>",c); + + return c; + +#endif +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/mips/jmr3904/current/tests/PKGconf.mak b/packages/hal/mips/jmr3904/current/tests/PKGconf.mak --- a/packages/hal/mips/jmr3904/current/tests/PKGconf.mak +++ b/packages/hal/mips/jmr3904/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mips/sim/current/ChangeLog b/packages/hal/mips/sim/current/ChangeLog --- a/packages/hal/mips/sim/current/ChangeLog +++ b/packages/hal/mips/sim/current/ChangeLog @@ -1,3 +1,56 @@ +1999-04-08 John Dallaway + + * include/pkgconf/mlt_*.*: Use double underscore substitution + for period character in SECTION_* macro names (PR 19787) + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-04 Gary Thomas + + * include/pkgconf/hal_tx39_sim.h: Take out DEVICES dependencies. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-16 Jesper Skov + + * include/hal_stub.h: Removed. + +1999-02-05 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-15 John Dallaway + + * include/pkgconf/ram.ldi: add .vsr_table output section + +1999-01-13 John Dallaway + + * include/pkgconf/ram.ldi: add .rel.dyn output section + +1999-01-13 John Dallaway + + * src/sim.ld: remove for MLT + * src/PKGconf.mak: remove sim.ld rules for MLT + * include/pkgconf/ram.ldi: new linker script fragment for MLT + 1998-10-23 Jesper Skov * include/pkgconf/hal_tx39_sim.h: Allow wallclock and watchdog @@ -81,7 +134,7 @@ 1998-07-23 Nick Garnett +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mips/sim/current/include/hal_stub.h b/packages/hal/mips/sim/current/include/hal_stub.h deleted file mode 100644 --- a/packages/hal/mips/sim/current/include/hal_stub.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef CYGONCE_HAL_HAL_STUB_H -#define CYGONCE_HAL_HAL_STUB_H - -//============================================================================= -// -// hal_atub.h -// -// General header for HAL GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors: nickg -// Date: 1998-06-08 -// Purpose: HAL stub support. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include - -#include -#include - -//----------------------------------------------------------------------------- -#endif // CYGONCE_HAL_HAL_STUB_H -// End of hal_stub.h - - diff --git a/packages/hal/mips/sim/current/include/pkgconf/hal_tx39_sim.h b/packages/hal/mips/sim/current/include/pkgconf/hal_tx39_sim.h --- a/packages/hal/mips/sim/current/include/pkgconf/hal_tx39_sim.h +++ b/packages/hal/mips/sim/current/include/pkgconf/hal_tx39_sim.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_TX39_SIM_H // ==================================================================== // -// pkgconf/hal_tx39_sim.h +// pkgconf/hal_tx39_sim.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### @@ -50,9 +50,6 @@ type radio parent CYGPKG_HAL_TX39 platform sim - requires !CYGPKG_DEVICES_GDB - requires !CYGPKG_DEVICES_SERIAL_RS232_COMMON - requires !CYGPKG_DEVICES_SERIAL_RS232_TX39 description " The minimal simulator HAL package is provided for when only a simple simulation of the processor architecture is diff --git a/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.ldi b/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.ldi @@ -0,0 +1,49 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 10:41:43 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x80000000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x80000000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_vsr_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rel__dyn (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.mlt b/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/sim/current/include/pkgconf/mlt_tx39_sim_ram.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 80000000 80000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 80000000 80000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 vsr_table vsr_table ! +section vsr_table 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn ! +section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/mips/sim/current/src/PKGconf.mak b/packages/hal/mips/sim/current/src/PKGconf.mak --- a/packages/hal/mips/sim/current/src/PKGconf.mak +++ b/packages/hal/mips/sim/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -34,23 +34,8 @@ include ../../../../../pkgconf/pkgconf.m LIBRARY := libtarget.a COMPILE := hal_diag.c sim.S OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - -.PHONY: ldscript.clean - -ldscript.stamp: sim.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - - diff --git a/packages/hal/mips/sim/current/src/hal_diag.c b/packages/hal/mips/sim/current/src/hal_diag.c --- a/packages/hal/mips/sim/current/src/hal_diag.c +++ b/packages/hal/mips/sim/current/src/hal_diag.c @@ -1,8 +1,8 @@ /*============================================================================= // -// hal_diag.c +// hal_diag.c // -// HAL diagnostic output code +// HAL diagnostic output code // //============================================================================= //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 // Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. +// Description: Implementations of HAL diagnostic output support. // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mips/sim/current/src/sim.S b/packages/hal/mips/sim/current/src/sim.S --- a/packages/hal/mips/sim/current/src/sim.S +++ b/packages/hal/mips/sim/current/src/sim.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mips/sim/current/src/sim.ld b/packages/hal/mips/sim/current/src/sim.ld deleted file mode 100644 --- a/packages/hal/mips/sim/current/src/sim.ld +++ /dev/null @@ -1,221 +0,0 @@ -/*========================================================================== -// -// sim.ld -// -// Linker script for MIPS simulator -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: MIPS simulator Linker script -// Description: This script is passed to the linker to define the memory -// of the MIPS simulator. -// -//####DESCRIPTIONEND#### -// -//========================================================================*/ - -STARTUP(vectors.o) -ENTRY(reset_vector) - -GROUP(libtarget.a libgcc.a) - -#include - -#if defined(CYG_HAL_STARTUP_RAM) -#define LOAD_BASE 0x80000000 -#define DATA_BASE -#define AT(x) -#elif defined(CYG_HAL_STARTUP_ROM) -#define LOAD_BASE 0xBFC00000 -#define DATA_BASE 0x80000200 -#endif - -/* - * Allocate the stack to be at the top of memory, since the stack - * grows down - */ - -/*__interrupt_stack = DATA_BASE + 0x00100000; */ - -SECTIONS -{ - /*------------------------------------------------------------*/ - - /* Start of ROM */ - . = LOAD_BASE; - - .rom_vectors : - { -#if defined(CYG_HAL_STARTUP_RAM) - KEEP(*(.utlb_vector)) - . = ALIGN(0x80); - KEEP(*(.other_vector)) - /* debug and reset vector not used in RAM version */ - KEEP(*(.debug_vector)) - KEEP(*(.reset_vector)) -#elif defined(CYG_HAL_STARTUP_ROM) - KEEP(*(.reset_vector)) - . = ALIGN(0x100); - KEEP(*(.utlb_vector)) - . = ALIGN(0x80); - KEEP(*(.debug_vector)) - . = ALIGN(0x100); - KEEP(*(.other_vector)) -#endif - } - - /*------------------------------------------------------------*/ - - .text : - { - _stext = .; -#ifndef CYG_KERNEL_USE_INIT_PRIORITY - __sched_text_start = .; - *sched.o(.text*) - __sched_text_end = .; - __clock_text_start = .; - *clock.o(.text*) - __clock_text_end = .; - __thread_text_start = .; - *thread.o(.text*) - __thread_text_end = .; -#endif - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - *(.init) - - } - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } - .rodata : { *(.rodata*) } - .rodata1 : { *(.rodata1) } - .fixup : { *(.fixup) } - .gcc_except_table : { *(.gcc_except_table) } - - /*------------------------------------------------------------*/ - -/* __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); */ - __rom_data_start = ALIGN(8); - .data DATA_BASE : - { - __ram_data_start = .; - *(.data*) - *(.data1) - _GOT1_START_ = .; - *(.got1) - _GOT1_END_ = .; - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. */ - _GOT2_START_ = .; - *(.got2) -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - SORT(CONSTRUCTORS) - *(.ctors*) - *(.dtors*) -#else - CONSTRUCTORS - *(.ctors*) - *(.dtors*) -#endif - _GOT2_END_ = .; - . = ALIGN(8); - _gp = .; - __global = _gp; - _GLOBAL_OFFSET_TABLE_ = .; - _GOT_START_ = .; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - _GOT_END_ = .; - *(.dynamic) - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - *(.sdata*) - *(.sbss*) - } - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - - /*------------------------------------------------------------*/ - - . = ALIGN(4); - __bss_start = .; - .bss : - { - *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - - /*------------------------------------------------------------*/ - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to - the beginning of the section so we begin them at 0. */ - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - -} - -//hal_vsr_table = 0x80000100; - -// End of sim.ld diff --git a/packages/hal/mips/sim/current/tests/PKGconf.mak b/packages/hal/mips/sim/current/tests/PKGconf.mak --- a/packages/hal/mips/sim/current/tests/PKGconf.mak +++ b/packages/hal/mips/sim/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mn10300/arch/current/ChangeLog b/packages/hal/mn10300/arch/current/ChangeLog --- a/packages/hal/mn10300/arch/current/ChangeLog +++ b/packages/hal/mn10300/arch/current/ChangeLog @@ -1,3 +1,281 @@ +1999-04-15 Jonathan Larmour + + * src/mn10300.ld: Define __bss_end at the end of the BSS + * src/vectors.S (_start): Use __bss_end rather than _end when clearing + BSS + These fix PR 19750 + +1999-04-15 Jonathan Larmour + + * src/hal_misc.c: + * src/vectors.S: + Separate parts of cyg_hal_invoke_constructors() out into new functions + cyg_hal_enable_caches() and cyg_hal_debug_init() so that + cyg_hal_invoke_constructors() can be called again safely if + necessary + Fix for PR19642 + +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script. + +1999-04-09 Jesper Skov + + * src/mn10300_stub.c: + Moved get_register and put_register to hal_stub.c. + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-31 Nick Garnett + + * include/hal_arch.h (HAL_THREAD_INIT_CONTEXT): Align initial SP + to a 4 byte boundary. Fixes PR 19695. + + * include/hal_cache.h: Added include of hal.h and a test that a + valid set of macros have been added. + +1999-03-26 Gary Thomas + + * include/hal_arch.h (CYGNUM_HAL_STACK_SIZE_MINIMUM): Be a little + more generous since this stack should allow at least a kernel API + call which could be at least 4 levels deep. + +1999-03-23 Nick Garnett + + * include/hal_arch.h: + Modified stack size definitions to be more accurate. + +1999-03-22 Jonathan Larmour + + * include/mn10300_stub.h: Update copyright + + * src/mn10300_stub.c: Update copyright + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-19 Nick Garnett + + * src/hal_misc.c: + * src/vectors.S: + Fixed problem with taking breakpoints after watchdog interrupts + and memory access exceptions. See the comments in + __default_nmi_vsr in vector.S for details. + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-12 Gary Thomas + + * include/hal_arch.h: Add definition of 'CYGNUM_HAL_MINIMUM_STACK_SIZE' + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_ATTACH): Added. + +1999-03-08 Nick Garnett + + * src/mn10300.ld: + Added alignment before definition of __DEVTAB__. + +1999-03-05 Gary Thomas + + * src/PKGconf.mak: + * src/mn10300.ld: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/mn10300.ld: + Unconditionalize use of libextras.a and add to GROUP() + +1999-02-25 Nick Garnett + + * src/hal_misc.c: + Now tests for whether the kernel is present before trying to use + patch_dbg_syscalls(). + + * include/hal_intr.h (HAL_INTERRUPT_CONFIGURE): fixed some compile + bugs in this macro. + + * src/vectors.S: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception() -> cyg_hal_deliver_exception() + QA improvements + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + QA improvements + + * src/hal_misc.c: + Rename deliver_exception() -> cyg_hal_deliver_exception() + Rename CYG_VECTOR_* according to hal_intr.h changes above + QA improvements + + * src/vectors.S: + Rename exception_handler() -> cyg_hal_exception_handler() + +1999-02-16 Jesper Skov + + * src/vectors.S: Changed set_debug_traps to initialize_stub. + + * src/mn10300_stub.c: + * include/mn10300_stub.h: + Cleaned up to only include arch specific stub code. + +1999-02-15 Jesper Skov + + * include/basetype.h: Added CYG_LABEL_NAME macro. + +1999-02-11 Nick Garnett + + * include/hal_cache.h (HAL_DCACHE_STORE): + Added "register" keywords to the variables used in this macro. If + these are not in registers then when the cache is disabled, they + can be stranded in the cache and the random values in main memory + are used instead. This is only a problem when optimization is + disabled; under optimization the compiler puts these variables + into registers as a matter of course. + Fixes PR 19165. + (HAL_DCACHE_SYNC): Divide cache size by number of ways to + calculate correct size to pass to HAL_DCACHE_STORE(). + +1999-02-05 John Dallaway + + * src/mn10300.ld: Add LMA_EQ_VMA macro definition. + +1999-02-01 Nick Garnett + + * include/hal_cache.h: Fixed implementation of HAL_DCACHE_STORE() so + that it now works, and changed implementation of HAL_DCACHE_SYNC() + to use it. + Fixes PR 18577 and is a better fix to 18849. + +1999-01-27 Nick Garnett + + * include/hal_intr.h: + * src/vectors.S: + Allow for NMI vectors in ISR table when using chained + interrupts. This largely consists of moving the interrupt vector + slots up by 3 entries. + +1999-01-26 Hugo Tyson + + * src/mn10300.ld: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-25 Jesper Skov + + * src/mn10300_stub.c (__build_t_packet): Rewrote fix me text. Added PR + number, but otherwise left the note. + +1999-01-25 Nick Garnett + + * include/hal_cache.h (HAL_DCACHE_SYNC): Add implementation of + this macro to enable test programs to work. + Fixes PR 18849. + +1999-01-21 Jonathan Larmour + + * src/hal_misc.c (cyg_hal_invoke_constructors): + Add code to deal with CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + Tidy up and update description header + Shorten needlessly long lines + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + +1999-01-14 John Dallaway + + * src/mn10300.ld: do not define _hal_vsr_table for minimal + simulator builds + +1999-01-13 Gary Thomas + + * include/basetype.h: CYG_DOUBLE_BYTEORDER now in + +1999-01-13 John Dallaway + + * src/mn10300.ld: define FOLLOWING () macro to simplify + hand editing of linker script fragments + +1999-01-12 Gary Thomas + + * include/basetype.h (CYG_DOUBLE_BYTEORDER): Define ordering + for words within doubles. + +1999-01-12 Nick Garnett + + * src/hal_misc.c: Altered call to patch_dbg_syscalls() to pass + pointer to base of vector rather than a single vector entry. + +1999-01-12 John Dallaway + + * src/mn10300.ld: new linker script for MLT + * src/PKGconf.mak: add mn10300.ld rules for MLT + +1998-12-15 Jesper Skov + + * include/hal_arch.h: + * src/context.S (_hal_setjmp, _hal_longjmp): + Added CYGARC definitions for jmpbuf entries. + +1998-12-10 Jesper Skov + + * include/hal_cache.h (HAL_DCACHE_UNLOCK_ALL, + HAL_ICACHE_UNLOCK_ALL): Added. + +1998-11-25 Jesper Skov + + * include/hal_arch.h (HAL_REORDER_BARRIER): Changed to same form + as on the other archs. + +1998-11-18 Gary Thomas + + * include/hal_intr.h: Add support for interrupt latency + measurement, controlled by CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY. + +1998-11-09 Jesper Skov + + * src/vectors.S (__default_interrupt_vsr): Added GDB break + support. + Added call to GDB initialization during startup. + + * src/mn10300_stub.c: Changed instruction word type. + +1998-11-06 Jesper Skov + + * src/PKGconf.mak: + Added stub to object list. + + * include/mn10300_stub.h: + * src/mn10300_stub.c: + Added GDB stub. + + * src/hal_misc.c (exception_handler): Added GDB stub call. + +1998-11-06 Jesper Skov + + * include/basetype.h (CYG_BYTEORDER): Fixed comment. + +1998-11-16 Nick Garnett + + * include/hal_cache.h: + Added volatile keyword to appropriate places to prevent compiler + optimizing out cache control register access. + 1998-10-21 Nick Garnett * include/hal_intr.h (HAL_CLOCK_READ): @@ -218,7 +496,7 @@ 1998-08-17 Nick Garnett -// +// Date: 1999-02-18 +// Purpose: Define architecture abstractions +// Usage: #include +// //####DESCRIPTIONEND#### // -//============================================================================= +//========================================================================== +#include #include -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Processor saved states: typedef struct HAL_SavedRegisters @@ -74,16 +74,16 @@ typedef struct HAL_SavedRegisters } HAL_SavedRegisters; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Exception handling function. // This function is defined by the kernel according to this prototype. It is // invoked from the HAL to deal with any CPU exceptions that the HAL does // not want to deal with itself. It usually invokes the kernel's exception // delivery mechanism. -externC void deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Bit manipulation routines externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); @@ -93,7 +93,7 @@ externC cyg_uint32 hal_msbit_index(cyg_u #define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Context Initialization // Initialize the context of a thread. // Arguments: @@ -106,7 +106,8 @@ externC cyg_uint32 hal_msbit_index(cyg_u #define HAL_THREAD_INIT_CONTEXT( _sp_, _thread_, _entry_, _id_ ) \ { \ register HAL_SavedRegisters *_regs_; \ - _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)*2); \ + _regs_ = (HAL_SavedRegisters *)(((CYG_ADDRWORD)(_sp_)&(~3)) - \ + sizeof(HAL_SavedRegisters)*2); \ _regs_->d0 = (CYG_WORD)(_thread_); \ _regs_->d1 = (_id_)|0xddd1; \ _regs_->d2 = (_id_)|0xddd2; \ @@ -123,7 +124,7 @@ externC cyg_uint32 hal_msbit_index(cyg_u _sp_ = (CYG_ADDRESS)_regs_; \ } -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Context switch macros. // The arguments are pointers to locations where the stack pointer // of the current thread is to be stored, and from where the sp of the @@ -134,28 +135,29 @@ externC void hal_thread_load_context( CY __attribute__ ((noreturn)); #define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ - hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_); + hal_thread_switch_context((CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); #define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Execution reorder barrier. // When optimizing the compiler can reorder code. In multithreaded systems // where the order of actions is vital, this can sometimes cause problems. // This macro may be inserted into places where reordering should not happen. -#define HAL_REORDER_BARRIER() asm ( "" ) +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Breakpoint support -// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen if -// executed. -// HAL_BREAKINST is the value of the breakpoint instruction and HAL_BREAKINST_SIZE -// is its size in bytes. +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to +// happen if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. #define HAL_BREAKPOINT(_label_) \ -asm volatile (" .globl " #_label_ ";" \ +asm volatile (" .globl " #_label_ ";" \ #_label_":" \ ".byte 0xFF" \ ); @@ -164,37 +166,37 @@ asm volatile (" .globl " #_label_ ";" #define HAL_BREAKINST_SIZE 1 -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Thread register state manipulation for GDB support. // Translate a stack pointer as saved by the thread context macros above into // a pointer to a HAL_SavedRegisters structure. -#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ (_regs_) = (HAL_SavedRegisters *)(_sp_) // Copy a set of registers from a HAL_SavedRegisters structure into a // GDB ordered array. -#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \ -{ \ - CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ - \ - _regval_[0] = (_regs_)->d0; \ - _regval_[1] = (_regs_)->d1; \ - _regval_[2] = (_regs_)->d2; \ - _regval_[3] = (_regs_)->d3; \ - _regval_[4] = (_regs_)->a0; \ - _regval_[5] = (_regs_)->a1; \ - _regval_[6] = (_regs_)->a2; \ - _regval_[7] = (_regs_)->a3; \ - \ - _regval_[8] = (CYG_ADDRWORD)(_regs_) + \ - sizeof(HAL_SavedRegisters); \ - _regval_[9] = (_regs_)->pc; \ - _regval_[10] = (_regs_)->mdr; \ - _regval_[11] = (_regs_)->psw; \ - \ - _regval_[12] = (_regs_)->lar; \ - _regval_[13] = (_regs_)->lir; \ +#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \ +{ \ + CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ + \ + _regval_[0] = (_regs_)->d0; \ + _regval_[1] = (_regs_)->d1; \ + _regval_[2] = (_regs_)->d2; \ + _regval_[3] = (_regs_)->d3; \ + _regval_[4] = (_regs_)->a0; \ + _regval_[5] = (_regs_)->a1; \ + _regval_[6] = (_regs_)->a2; \ + _regval_[7] = (_regs_)->a3; \ + \ + _regval_[8] = (CYG_ADDRWORD)(_regs_) + \ + sizeof(HAL_SavedRegisters); \ + _regval_[9] = (_regs_)->pc; \ + _regval_[10] = (_regs_)->mdr; \ + _regval_[11] = (_regs_)->psw; \ + \ + _regval_[12] = (_regs_)->lar; \ + _regval_[13] = (_regs_)->lir; \ } // Copy a GDB ordered array into a HAL_SavedRegisters structure. @@ -223,17 +225,26 @@ asm volatile (" .globl " #_label_ ";" */ \ } -//----------------------------------------------------------------------------- +//------------------------------------------------------------------------- // HAL setjmp +// Note: These definitions are repeated in context.S. If changes are required +// remember to update both sets. -#define HAL_JMP_BUF_SIZE 6 +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_D2 1 +#define CYGARC_JMP_BUF_D3 2 +#define CYGARC_JMP_BUF_A2 3 +#define CYGARC_JMP_BUF_A3 4 +#define CYGARC_JMP_BUF_LR 5 -typedef cyg_uint32 hal_jmp_buf[HAL_JMP_BUF_SIZE]; +#define CYGARC_JMP_BUF_SIZE 6 + +typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE]; externC int hal_setjmp(hal_jmp_buf env); externC void hal_longjmp(hal_jmp_buf env, int val); -//----------------------------------------------------------------------------- +//------------------------------------------------------------------------- // Idle thread code. // This macro is called in the idle thread loop, and gives the HAL the // chance to insert code. Typical idle thread behaviour might be to halt the @@ -244,5 +255,52 @@ externC void hal_longjmp(hal_jmp_buf env #define HAL_IDLE_THREAD_ACTION(_count_) //----------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// We define quite large stack needs for SPARClite, for it requires 576 +// bytes (144 words) to process an interrupt and thread-switch, and +// momentarily, but needed in case of recursive interrupts, it needs 208 +// words - if a sequence of saves to push out other regsets is interrupted. + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Worst case stack frame size: return link + 4 args + 4 pushed registers. +#define CYGNUM_HAL_STACK_FRAME_SIZE (40) + +// Stack needed for a context switch: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (60) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (128) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can be much smaller + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \ + CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \ + CYGNUM_HAL_STACK_FRAME_SIZE*16) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (2048) + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large. + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096) + +#endif + +//-------------------------------------------------------------------------- #endif // CYGONCE_HAL_HAL_ARCH_H -// End of hal_arch.h +// EOF hal_arch.h diff --git a/packages/hal/mn10300/arch/current/include/hal_cache.h b/packages/hal/mn10300/arch/current/include/hal_cache.h --- a/packages/hal/mn10300/arch/current/include/hal_cache.h +++ b/packages/hal/mn10300/arch/current/include/hal_cache.h @@ -3,9 +3,9 @@ //============================================================================= // -// hal_cache.h +// hal_cache.h // -// HAL cache control API +// HAL cache control API // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,28 +25,29 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Cache control API -// Description: The macros defined here provide the HAL APIs for handling +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling // cache control operations. // Usage: -// #include -// ... -// +// #include +// ... +// // //####DESCRIPTIONEND#### // //============================================================================= +#include #include //============================================================================= @@ -98,6 +99,9 @@ // Undo a previous lock operation //#define HAL_DCACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Data cache line control @@ -151,6 +155,9 @@ // Undo a previous lock operation //#define HAL_ICACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Instruction cache line control @@ -185,7 +192,7 @@ //----------------------------------------------------------------------------- // Control registers -#define HAL_CHCTR ((CYG_ADDRWORD *)0x20000070) +#define HAL_CHCTR ((volatile CYG_ADDRWORD *)0x20000070) #define HAL_CHCTR_ICEN 0x0001 #define HAL_CHCTR_DCEN 0x0002 @@ -197,8 +204,8 @@ #define HAL_CHCTR_ICWMD 0x0300 #define HAL_CHCTR_DCWMD 0x3000 -#define HAL_DCACHE_PURGE_WAY0 ((CYG_ADDRWORD *)0x28400000) -#define HAL_DCACHE_PURGE_WAY1 ((CYG_ADDRWORD *)0x28401000) +#define HAL_DCACHE_PURGE_WAY0 ((volatile CYG_BYTE *)0x28400000) +#define HAL_DCACHE_PURGE_WAY1 ((volatile CYG_BYTE *)0x28401000) //----------------------------------------------------------------------------- // Global control of data cache @@ -223,10 +230,10 @@ #define HAL_DCACHE_INVALIDATE_ALL() \ { \ CYG_ADDRWORD chctr, chctr1; \ - chctr1 = *HAL_CHCTR; \ - HAL_DCACHE_DISABLE(); \ + chctr = chctr1 = *HAL_CHCTR; \ + chctr &= ~HAL_CHCTR_DCEN; \ + *HAL_CHCTR = chctr; \ while( *HAL_CHCTR & HAL_CHCTR_DCBUSY ); \ - chctr = *HAL_CHCTR; \ chctr |= HAL_CHCTR_DCINV; \ *HAL_CHCTR = chctr; \ while( *HAL_CHCTR & HAL_CHCTR_DCBUSY ); \ @@ -234,7 +241,7 @@ } // Synchronize the contents of the cache with memory. -#define HAL_DCACHE_SYNC() +#define HAL_DCACHE_SYNC() HAL_DCACHE_STORE( 0, HAL_DCACHE_SIZE/HAL_DCACHE_WAYS ) // Set the data cache refill burst size //#define HAL_DCACHE_BURST_SIZE(_size_) @@ -260,6 +267,9 @@ // Undo a previous lock operation //#define HAL_DCACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Data cache line control @@ -277,20 +287,20 @@ // Write dirty cache lines to memory for the given address range. #define HAL_DCACHE_STORE( _base_ , _size_ ) \ { \ - volatile CYG_ADDRWORD *way0 = HAL_DCACHE_PURGE_WAY0; \ - volatile CYG_ADDRWORD *way1 = HAL_DCACHE_PURGE_WAY1; \ + volatile register CYG_BYTE *way0 = HAL_DCACHE_PURGE_WAY0; \ + volatile register CYG_BYTE *way1 = HAL_DCACHE_PURGE_WAY1; \ int i; \ - CYG_ADDRWORD chctr; \ + register CYG_ADDRWORD chctr; \ chctr = *HAL_CHCTR; \ HAL_DCACHE_DISABLE(); \ while( *HAL_CHCTR & HAL_CHCTR_DCBUSY ); \ \ way0 += ((CYG_ADDRWORD)_base_) & 0x000007f0; \ way1 += ((CYG_ADDRWORD)_base_) & 0x000007f0; \ - for( i = 0; i < _size_ ; i += HAL_DCACHE_LINE_SIZE ) \ + for( i = 0; i < (_size_) ; i += HAL_DCACHE_LINE_SIZE ) \ { \ - *way0 = 0; \ - *way1 = 0; \ + *(CYG_ADDRWORD *)way0 = 0; \ + *(CYG_ADDRWORD *)way1 = 0; \ way0 += HAL_DCACHE_LINE_SIZE; \ way1 += HAL_DCACHE_LINE_SIZE; \ } \ @@ -354,6 +364,9 @@ // Undo a previous lock operation //#define HAL_ICACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Instruction cache line control @@ -362,6 +375,14 @@ #endif +//----------------------------------------------------------------------------- +// Check that a supported configuration has actually defined some macros. + +#ifndef HAL_DCACHE_ENABLE + +#error Unsupported MN10300 configuration + +#endif //----------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_CACHE_H diff --git a/packages/hal/mn10300/arch/current/include/hal_intr.h b/packages/hal/mn10300/arch/current/include/hal_intr.h --- a/packages/hal/mn10300/arch/current/include/hal_intr.h +++ b/packages/hal/mn10300/arch/current/include/hal_intr.h @@ -1,13 +1,12 @@ #ifndef CYGONCE_HAL_HAL_INTR_H #define CYGONCE_HAL_HAL_INTR_H - -//============================================================================= +//========================================================================== +// +// hal_intr.h // -// hal_intr.h +// HAL Interrupt and clock support // -// HAL Interrupt and clock support -// -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -25,34 +24,33 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define Interrupt support -// Description: The macros defined here provide the HAL APIs for handling -// interrupts and the clock. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-18 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// Usage: +// #include +// ... // -// Usage: -// #include -// ... -// // //####DESCRIPTIONEND#### // -//============================================================================= +//========================================================================== #include #include -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // The MN10300 has a somewhat complex interrupt structure. Besides the // reset and NMI vectors there are seven maskable interrupt vectors @@ -76,344 +74,353 @@ // 7*4 = 1228 bytes for the tables. // -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt vectors. // The level-specific hardware vectors -#define CYG_VECTOR_0 0 -#define CYG_VECTOR_1 1 -#define CYG_VECTOR_2 2 -#define CYG_VECTOR_3 3 -#define CYG_VECTOR_4 4 -#define CYG_VECTOR_5 5 -#define CYG_VECTOR_6 6 -#define CYG_VECTOR_NMI 7 -#define CYG_VECTOR_TRAP 8 +// These correspond to VSRs and are the values to use for HAL_VSR_GET/SET +#define CYGNUM_HAL_VECTOR_0 0 +#define CYGNUM_HAL_VECTOR_1 1 +#define CYGNUM_HAL_VECTOR_2 2 +#define CYGNUM_HAL_VECTOR_3 3 +#define CYGNUM_HAL_VECTOR_4 4 +#define CYGNUM_HAL_VECTOR_5 5 +#define CYGNUM_HAL_VECTOR_6 6 +#define CYGNUM_HAL_VECTOR_NMI 7 +#define CYGNUM_HAL_VECTOR_TRAP 8 -#define CYG_VSR_MIN 0 -#define CYG_VSR_MAX 8 -#define CYG_VSR_COUNT 9 +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 8 +#define CYGNUM_HAL_VSR_COUNT 9 + +// Exception vectors. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() -#define CYG_EXCEPTION_MIN 0 -#define CYG_EXCEPTION_MAX 3 -#define CYG_EXCEPTION_COUNT 4 +#define CYGNUM_HAL_EXCEPTION_NMI 0 +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS \ + CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR +#define CYGNUM_HAL_EXCEPTION_TRAP 3 + +#define CYGNUM_HAL_EXCEPTION_MIN 0 +#define CYGNUM_HAL_EXCEPTION_MAX 3 +#define CYGNUM_HAL_EXCEPTION_COUNT 4 #if defined(CYG_HAL_MN10300_MN103000) // The decoded interrupts -#define CYG_VECTOR_NMIRQ 0 -#define CYG_VECTOR_WATCHDOG 1 -#define CYG_VECTOR_SYSTEM_ERROR 2 -#define CYG_VECTOR_RESERVED_3 3 +#define CYGNUM_HAL_INTERRUPT_NMIRQ 0 +#define CYGNUM_HAL_INTERRUPT_WATCHDOG 1 +#define CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR 2 +#define CYGNUM_HAL_INTERRUPT_RESERVED_3 3 -#define CYG_VECTOR_RESERVED_4 4 -#define CYG_VECTOR_RESERVED_5 5 -#define CYG_VECTOR_RESERVED_6 6 -#define CYG_VECTOR_RESERVED_7 7 +#define CYGNUM_HAL_INTERRUPT_RESERVED_4 4 +#define CYGNUM_HAL_INTERRUPT_RESERVED_5 5 +#define CYGNUM_HAL_INTERRUPT_RESERVED_6 6 +#define CYGNUM_HAL_INTERRUPT_RESERVED_7 7 -#define CYG_VECTOR_TIMER_0 8 -#define CYG_VECTOR_TIMER_1 9 -#define CYG_VECTOR_TIMER_2 10 -#define CYG_VECTOR_TIMER_3 11 +#define CYGNUM_HAL_INTERRUPT_TIMER_0 8 +#define CYGNUM_HAL_INTERRUPT_TIMER_1 9 +#define CYGNUM_HAL_INTERRUPT_TIMER_2 10 +#define CYGNUM_HAL_INTERRUPT_TIMER_3 11 -#define CYG_VECTOR_TIMER_4 12 -#define CYG_VECTOR_TIMER_5 13 -#define CYG_VECTOR_TIMER_6 14 -#define CYG_VECTOR_TIMER_7 15 +#define CYGNUM_HAL_INTERRUPT_TIMER_4 12 +#define CYGNUM_HAL_INTERRUPT_TIMER_5 13 +#define CYGNUM_HAL_INTERRUPT_TIMER_6 14 +#define CYGNUM_HAL_INTERRUPT_TIMER_7 15 -#define CYG_VECTOR_TIMER_8 16 -#define CYG_VECTOR_TIMER_8_COMPARE_A 17 -#define CYG_VECTOR_TIMER_8_COMPARE_B 18 -#define CYG_VECTOR_RESERVED_19 19 +#define CYGNUM_HAL_INTERRUPT_TIMER_8 16 +#define CYGNUM_HAL_INTERRUPT_TIMER_8_COMPARE_A 17 +#define CYGNUM_HAL_INTERRUPT_TIMER_8_COMPARE_B 18 +#define CYGNUM_HAL_INTERRUPT_RESERVED_19 19 -#define CYG_VECTOR_TIMER_9 20 -#define CYG_VECTOR_TIMER_9_COMPARE_A 21 -#define CYG_VECTOR_TIMER_9_COMPARE_B 22 -#define CYG_VECTOR_RESERVED_23 23 +#define CYGNUM_HAL_INTERRUPT_TIMER_9 20 +#define CYGNUM_HAL_INTERRUPT_TIMER_9_COMPARE_A 21 +#define CYGNUM_HAL_INTERRUPT_TIMER_9_COMPARE_B 22 +#define CYGNUM_HAL_INTERRUPT_RESERVED_23 23 -#define CYG_VECTOR_TIMER_10 24 -#define CYG_VECTOR_TIMER_10_COMPARE_A 25 -#define CYG_VECTOR_TIMER_10_COMPARE_B 26 -#define CYG_VECTOR_TIMER_10_COMPARE_C 27 +#define CYGNUM_HAL_INTERRUPT_TIMER_10 24 +#define CYGNUM_HAL_INTERRUPT_TIMER_10_COMPARE_A 25 +#define CYGNUM_HAL_INTERRUPT_TIMER_10_COMPARE_B 26 +#define CYGNUM_HAL_INTERRUPT_TIMER_10_COMPARE_C 27 -#define CYG_VECTOR_TIMER_11 28 -#define CYG_VECTOR_TIMER_11_COMPARE_A 29 -#define CYG_VECTOR_TIMER_11_COMPARE_B 30 -#define CYG_VECTOR_TIMER_11_COMPARE_C 31 +#define CYGNUM_HAL_INTERRUPT_TIMER_11 28 +#define CYGNUM_HAL_INTERRUPT_TIMER_11_COMPARE_A 29 +#define CYGNUM_HAL_INTERRUPT_TIMER_11_COMPARE_B 30 +#define CYGNUM_HAL_INTERRUPT_TIMER_11_COMPARE_C 31 -#define CYG_VECTOR_TIMER_12 32 -#define CYG_VECTOR_TIMER_12_COMPARE_A 33 -#define CYG_VECTOR_TIMER_12_COMPARE_B 34 -#define CYG_VECTOR_TIMER_12_COMPARE_C 35 +#define CYGNUM_HAL_INTERRUPT_TIMER_12 32 +#define CYGNUM_HAL_INTERRUPT_TIMER_12_COMPARE_A 33 +#define CYGNUM_HAL_INTERRUPT_TIMER_12_COMPARE_B 34 +#define CYGNUM_HAL_INTERRUPT_TIMER_12_COMPARE_C 35 -#define CYG_VECTOR_TIMER_11_COMPARE_D 36 -#define CYG_VECTOR_TIMER_12_COMPARE_D 37 -#define CYG_VECTOR_RESERVED_38 38 -#define CYG_VECTOR_RESERVED_39 39 +#define CYGNUM_HAL_INTERRUPT_TIMER_11_COMPARE_D 36 +#define CYGNUM_HAL_INTERRUPT_TIMER_12_COMPARE_D 37 +#define CYGNUM_HAL_INTERRUPT_RESERVED_38 38 +#define CYGNUM_HAL_INTERRUPT_RESERVED_39 39 -#define CYG_VECTOR_DMA0 40 -#define CYG_VECTOR_RESERVED_41 41 -#define CYG_VECTOR_RESERVED_42 42 -#define CYG_VECTOR_RESERVED_43 43 +#define CYGNUM_HAL_INTERRUPT_DMA0 40 +#define CYGNUM_HAL_INTERRUPT_RESERVED_41 41 +#define CYGNUM_HAL_INTERRUPT_RESERVED_42 42 +#define CYGNUM_HAL_INTERRUPT_RESERVED_43 43 -#define CYG_VECTOR_DMA1 44 -#define CYG_VECTOR_RESERVED_45 45 -#define CYG_VECTOR_RESERVED_46 46 -#define CYG_VECTOR_RESERVED_47 47 +#define CYGNUM_HAL_INTERRUPT_DMA1 44 +#define CYGNUM_HAL_INTERRUPT_RESERVED_45 45 +#define CYGNUM_HAL_INTERRUPT_RESERVED_46 46 +#define CYGNUM_HAL_INTERRUPT_RESERVED_47 47 -#define CYG_VECTOR_DMA2 48 -#define CYG_VECTOR_RESERVED_49 49 -#define CYG_VECTOR_RESERVED_50 50 -#define CYG_VECTOR_RESERVED_51 51 +#define CYGNUM_HAL_INTERRUPT_DMA2 48 +#define CYGNUM_HAL_INTERRUPT_RESERVED_49 49 +#define CYGNUM_HAL_INTERRUPT_RESERVED_50 50 +#define CYGNUM_HAL_INTERRUPT_RESERVED_51 51 -#define CYG_VECTOR_DMA3 52 -#define CYG_VECTOR_RESERVED_53 53 -#define CYG_VECTOR_RESERVED_54 54 -#define CYG_VECTOR_RESERVED_55 55 +#define CYGNUM_HAL_INTERRUPT_DMA3 52 +#define CYGNUM_HAL_INTERRUPT_RESERVED_53 53 +#define CYGNUM_HAL_INTERRUPT_RESERVED_54 54 +#define CYGNUM_HAL_INTERRUPT_RESERVED_55 55 -#define CYG_VECTOR_SERIAL_0_RX 56 -#define CYG_VECTOR_SERIAL_0_TX 57 -#define CYG_VECTOR_RESERVED_58 58 -#define CYG_VECTOR_RESERVED_59 59 +#define CYGNUM_HAL_INTERRUPT_SERIAL_0_RX 56 +#define CYGNUM_HAL_INTERRUPT_SERIAL_0_TX 57 +#define CYGNUM_HAL_INTERRUPT_RESERVED_58 58 +#define CYGNUM_HAL_INTERRUPT_RESERVED_59 59 -#define CYG_VECTOR_SERIAL_1_RX 60 -#define CYG_VECTOR_SERIAL_1_TX 61 -#define CYG_VECTOR_RESERVED_62 62 -#define CYG_VECTOR_RESERVED_63 63 +#define CYGNUM_HAL_INTERRUPT_SERIAL_1_RX 60 +#define CYGNUM_HAL_INTERRUPT_SERIAL_1_TX 61 +#define CYGNUM_HAL_INTERRUPT_RESERVED_62 62 +#define CYGNUM_HAL_INTERRUPT_RESERVED_63 63 -#define CYG_VECTOR_EXTERNAL_0 64 -#define CYG_VECTOR_RESERVED_65 65 -#define CYG_VECTOR_RESERVED_66 66 -#define CYG_VECTOR_RESERVED_67 67 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_0 64 +#define CYGNUM_HAL_INTERRUPT_RESERVED_65 65 +#define CYGNUM_HAL_INTERRUPT_RESERVED_66 66 +#define CYGNUM_HAL_INTERRUPT_RESERVED_67 67 -#define CYG_VECTOR_EXTERNAL_1 68 -#define CYG_VECTOR_RESERVED_69 69 -#define CYG_VECTOR_RESERVED_70 70 -#define CYG_VECTOR_RESERVED_71 71 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_1 68 +#define CYGNUM_HAL_INTERRUPT_RESERVED_69 69 +#define CYGNUM_HAL_INTERRUPT_RESERVED_70 70 +#define CYGNUM_HAL_INTERRUPT_RESERVED_71 71 -#define CYG_VECTOR_EXTERNAL_2 72 -#define CYG_VECTOR_RESERVED_73 73 -#define CYG_VECTOR_RESERVED_74 74 -#define CYG_VECTOR_RESERVED_75 75 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_2 72 +#define CYGNUM_HAL_INTERRUPT_RESERVED_73 73 +#define CYGNUM_HAL_INTERRUPT_RESERVED_74 74 +#define CYGNUM_HAL_INTERRUPT_RESERVED_75 75 -#define CYG_VECTOR_EXTERNAL_3 76 -#define CYG_VECTOR_RESERVED_77 77 -#define CYG_VECTOR_RESERVED_78 78 -#define CYG_VECTOR_RESERVED_79 79 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_3 76 +#define CYGNUM_HAL_INTERRUPT_RESERVED_77 77 +#define CYGNUM_HAL_INTERRUPT_RESERVED_78 78 +#define CYGNUM_HAL_INTERRUPT_RESERVED_79 79 -#define CYG_VECTOR_EXTERNAL_4 80 -#define CYG_VECTOR_RESERVED_81 81 -#define CYG_VECTOR_RESERVED_82 82 -#define CYG_VECTOR_RESERVED_83 83 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_4 80 +#define CYGNUM_HAL_INTERRUPT_RESERVED_81 81 +#define CYGNUM_HAL_INTERRUPT_RESERVED_82 82 +#define CYGNUM_HAL_INTERRUPT_RESERVED_83 83 -#define CYG_VECTOR_EXTERNAL_5 84 -#define CYG_VECTOR_RESERVED_85 85 -#define CYG_VECTOR_RESERVED_86 86 -#define CYG_VECTOR_RESERVED_87 87 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_5 84 +#define CYGNUM_HAL_INTERRUPT_RESERVED_85 85 +#define CYGNUM_HAL_INTERRUPT_RESERVED_86 86 +#define CYGNUM_HAL_INTERRUPT_RESERVED_87 87 -#define CYG_VECTOR_EXTERNAL_6 88 -#define CYG_VECTOR_RESERVED_89 89 -#define CYG_VECTOR_RESERVED_90 90 -#define CYG_VECTOR_RESERVED_91 91 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_6 88 +#define CYGNUM_HAL_INTERRUPT_RESERVED_89 89 +#define CYGNUM_HAL_INTERRUPT_RESERVED_90 90 +#define CYGNUM_HAL_INTERRUPT_RESERVED_91 91 -#define CYG_VECTOR_EXTERNAL_7 92 -#define CYG_VECTOR_RESERVED_93 93 -#define CYG_VECTOR_RESERVED_94 94 -#define CYG_VECTOR_RESERVED_95 95 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_7 92 +#define CYGNUM_HAL_INTERRUPT_RESERVED_93 93 +#define CYGNUM_HAL_INTERRUPT_RESERVED_94 94 +#define CYGNUM_HAL_INTERRUPT_RESERVED_95 95 -#define CYG_VECTOR_AD_CONVERSION 96 -#define CYG_VECTOR_RESERVED_97 97 -#define CYG_VECTOR_RESERVED_98 98 -#define CYG_VECTOR_RESERVED_99 99 +#define CYGNUM_HAL_INTERRUPT_AD_CONVERSION 96 +#define CYGNUM_HAL_INTERRUPT_RESERVED_97 97 +#define CYGNUM_HAL_INTERRUPT_RESERVED_98 98 +#define CYGNUM_HAL_INTERRUPT_RESERVED_99 99 -#define CYG_ISR_MIN 0 -#define CYG_ISR_MAX 99 +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 99 -#define CYG_ISR_COUNT 100 +#define CYGNUM_HAL_ISR_COUNT 100 #elif defined(CYG_HAL_MN10300_MN103002) // The decoded interrupts -#define CYG_VECTOR_NMIRQ 0 -#define CYG_VECTOR_WATCHDOG 1 -#define CYG_VECTOR_SYSTEM_ERROR 2 -#define CYG_VECTOR_RESERVED_3 3 +#define CYGNUM_HAL_INTERRUPT_NMIRQ 0 +#define CYGNUM_HAL_INTERRUPT_WATCHDOG 1 +#define CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR 2 +#define CYGNUM_HAL_INTERRUPT_RESERVED_3 3 -#define CYG_VECTOR_RESERVED_4 4 -#define CYG_VECTOR_RESERVED_5 5 -#define CYG_VECTOR_RESERVED_6 6 -#define CYG_VECTOR_RESERVED_7 7 +#define CYGNUM_HAL_INTERRUPT_RESERVED_4 4 +#define CYGNUM_HAL_INTERRUPT_RESERVED_5 5 +#define CYGNUM_HAL_INTERRUPT_RESERVED_6 6 +#define CYGNUM_HAL_INTERRUPT_RESERVED_7 7 -#define CYG_VECTOR_TIMER_0 8 -#define CYG_VECTOR_RESERVED_9 9 -#define CYG_VECTOR_RESERVED_10 10 -#define CYG_VECTOR_RESERVED_11 11 +#define CYGNUM_HAL_INTERRUPT_TIMER_0 8 +#define CYGNUM_HAL_INTERRUPT_RESERVED_9 9 +#define CYGNUM_HAL_INTERRUPT_RESERVED_10 10 +#define CYGNUM_HAL_INTERRUPT_RESERVED_11 11 -#define CYG_VECTOR_TIMER_1 12 -#define CYG_VECTOR_RESERVED_13 13 -#define CYG_VECTOR_RESERVED_14 14 -#define CYG_VECTOR_RESERVED_15 15 +#define CYGNUM_HAL_INTERRUPT_TIMER_1 12 +#define CYGNUM_HAL_INTERRUPT_RESERVED_13 13 +#define CYGNUM_HAL_INTERRUPT_RESERVED_14 14 +#define CYGNUM_HAL_INTERRUPT_RESERVED_15 15 -#define CYG_VECTOR_TIMER_2 16 -#define CYG_VECTOR_RESERVED_17 17 -#define CYG_VECTOR_RESERVED_18 18 -#define CYG_VECTOR_RESERVED_19 19 +#define CYGNUM_HAL_INTERRUPT_TIMER_2 16 +#define CYGNUM_HAL_INTERRUPT_RESERVED_17 17 +#define CYGNUM_HAL_INTERRUPT_RESERVED_18 18 +#define CYGNUM_HAL_INTERRUPT_RESERVED_19 19 -#define CYG_VECTOR_TIMER_3 20 -#define CYG_VECTOR_RESERVED_21 21 -#define CYG_VECTOR_RESERVED_22 22 -#define CYG_VECTOR_RESERVED_23 23 +#define CYGNUM_HAL_INTERRUPT_TIMER_3 20 +#define CYGNUM_HAL_INTERRUPT_RESERVED_21 21 +#define CYGNUM_HAL_INTERRUPT_RESERVED_22 22 +#define CYGNUM_HAL_INTERRUPT_RESERVED_23 23 -#define CYG_VECTOR_TIMER_4 24 -#define CYG_VECTOR_RESERVED_25 25 -#define CYG_VECTOR_RESERVED_26 26 -#define CYG_VECTOR_RESERVED_27 27 +#define CYGNUM_HAL_INTERRUPT_TIMER_4 24 +#define CYGNUM_HAL_INTERRUPT_RESERVED_25 25 +#define CYGNUM_HAL_INTERRUPT_RESERVED_26 26 +#define CYGNUM_HAL_INTERRUPT_RESERVED_27 27 -#define CYG_VECTOR_TIMER_5 28 -#define CYG_VECTOR_RESERVED_29 29 -#define CYG_VECTOR_RESERVED_30 30 -#define CYG_VECTOR_RESERVED_31 31 +#define CYGNUM_HAL_INTERRUPT_TIMER_5 28 +#define CYGNUM_HAL_INTERRUPT_RESERVED_29 29 +#define CYGNUM_HAL_INTERRUPT_RESERVED_30 30 +#define CYGNUM_HAL_INTERRUPT_RESERVED_31 31 -#define CYG_VECTOR_TIMER_6 32 -#define CYG_VECTOR_RESERVED_33 33 -#define CYG_VECTOR_RESERVED_34 34 -#define CYG_VECTOR_RESERVED_35 35 +#define CYGNUM_HAL_INTERRUPT_TIMER_6 32 +#define CYGNUM_HAL_INTERRUPT_RESERVED_33 33 +#define CYGNUM_HAL_INTERRUPT_RESERVED_34 34 +#define CYGNUM_HAL_INTERRUPT_RESERVED_35 35 -#define CYG_VECTOR_TIMER_6_COMPARE_A 36 -#define CYG_VECTOR_RESERVED_37 37 -#define CYG_VECTOR_RESERVED_38 38 -#define CYG_VECTOR_RESERVED_39 39 +#define CYGNUM_HAL_INTERRUPT_TIMER_6_COMPARE_A 36 +#define CYGNUM_HAL_INTERRUPT_RESERVED_37 37 +#define CYGNUM_HAL_INTERRUPT_RESERVED_38 38 +#define CYGNUM_HAL_INTERRUPT_RESERVED_39 39 -#define CYG_VECTOR_TIMER_6_COMPARE_B 40 -#define CYG_VECTOR_RESERVED_41 41 -#define CYG_VECTOR_RESERVED_42 42 -#define CYG_VECTOR_RESERVED_43 43 +#define CYGNUM_HAL_INTERRUPT_TIMER_6_COMPARE_B 40 +#define CYGNUM_HAL_INTERRUPT_RESERVED_41 41 +#define CYGNUM_HAL_INTERRUPT_RESERVED_42 42 +#define CYGNUM_HAL_INTERRUPT_RESERVED_43 43 -#define CYG_VECTOR_RESERVED_44 44 -#define CYG_VECTOR_RESERVED_45 45 -#define CYG_VECTOR_RESERVED_46 46 -#define CYG_VECTOR_RESERVED_47 47 +#define CYGNUM_HAL_INTERRUPT_RESERVED_44 44 +#define CYGNUM_HAL_INTERRUPT_RESERVED_45 45 +#define CYGNUM_HAL_INTERRUPT_RESERVED_46 46 +#define CYGNUM_HAL_INTERRUPT_RESERVED_47 47 -#define CYG_VECTOR_DMA0 48 -#define CYG_VECTOR_RESERVED_49 49 -#define CYG_VECTOR_RESERVED_50 50 -#define CYG_VECTOR_RESERVED_51 51 +#define CYGNUM_HAL_INTERRUPT_DMA0 48 +#define CYGNUM_HAL_INTERRUPT_RESERVED_49 49 +#define CYGNUM_HAL_INTERRUPT_RESERVED_50 50 +#define CYGNUM_HAL_INTERRUPT_RESERVED_51 51 -#define CYG_VECTOR_DMA1 52 -#define CYG_VECTOR_RESERVED_53 53 -#define CYG_VECTOR_RESERVED_54 54 -#define CYG_VECTOR_RESERVED_55 55 +#define CYGNUM_HAL_INTERRUPT_DMA1 52 +#define CYGNUM_HAL_INTERRUPT_RESERVED_53 53 +#define CYGNUM_HAL_INTERRUPT_RESERVED_54 54 +#define CYGNUM_HAL_INTERRUPT_RESERVED_55 55 -#define CYG_VECTOR_DMA2 56 -#define CYG_VECTOR_RESERVED_57 57 -#define CYG_VECTOR_RESERVED_58 58 -#define CYG_VECTOR_RESERVED_59 59 +#define CYGNUM_HAL_INTERRUPT_DMA2 56 +#define CYGNUM_HAL_INTERRUPT_RESERVED_57 57 +#define CYGNUM_HAL_INTERRUPT_RESERVED_58 58 +#define CYGNUM_HAL_INTERRUPT_RESERVED_59 59 -#define CYG_VECTOR_DMA3 60 -#define CYG_VECTOR_RESERVED_61 61 -#define CYG_VECTOR_RESERVED_62 62 -#define CYG_VECTOR_RESERVED_63 63 +#define CYGNUM_HAL_INTERRUPT_DMA3 60 +#define CYGNUM_HAL_INTERRUPT_RESERVED_61 61 +#define CYGNUM_HAL_INTERRUPT_RESERVED_62 62 +#define CYGNUM_HAL_INTERRUPT_RESERVED_63 63 -#define CYG_VECTOR_SERIAL_0_RX 64 -#define CYG_VECTOR_RESERVED_65 65 -#define CYG_VECTOR_RESERVED_66 66 -#define CYG_VECTOR_RESERVED_67 67 +#define CYGNUM_HAL_INTERRUPT_SERIAL_0_RX 64 +#define CYGNUM_HAL_INTERRUPT_RESERVED_65 65 +#define CYGNUM_HAL_INTERRUPT_RESERVED_66 66 +#define CYGNUM_HAL_INTERRUPT_RESERVED_67 67 -#define CYG_VECTOR_SERIAL_0_TX 68 -#define CYG_VECTOR_RESERVED_69 69 -#define CYG_VECTOR_RESERVED_70 70 -#define CYG_VECTOR_RESERVED_71 71 +#define CYGNUM_HAL_INTERRUPT_SERIAL_0_TX 68 +#define CYGNUM_HAL_INTERRUPT_RESERVED_69 69 +#define CYGNUM_HAL_INTERRUPT_RESERVED_70 70 +#define CYGNUM_HAL_INTERRUPT_RESERVED_71 71 -#define CYG_VECTOR_SERIAL_1_RX 72 -#define CYG_VECTOR_RESERVED_73 73 -#define CYG_VECTOR_RESERVED_74 74 -#define CYG_VECTOR_RESERVED_75 75 +#define CYGNUM_HAL_INTERRUPT_SERIAL_1_RX 72 +#define CYGNUM_HAL_INTERRUPT_RESERVED_73 73 +#define CYGNUM_HAL_INTERRUPT_RESERVED_74 74 +#define CYGNUM_HAL_INTERRUPT_RESERVED_75 75 -#define CYG_VECTOR_SERIAL_1_TX 76 -#define CYG_VECTOR_RESERVED_77 77 -#define CYG_VECTOR_RESERVED_78 78 -#define CYG_VECTOR_RESERVED_79 79 +#define CYGNUM_HAL_INTERRUPT_SERIAL_1_TX 76 +#define CYGNUM_HAL_INTERRUPT_RESERVED_77 77 +#define CYGNUM_HAL_INTERRUPT_RESERVED_78 78 +#define CYGNUM_HAL_INTERRUPT_RESERVED_79 79 -#define CYG_VECTOR_SERIAL_2_RX 80 -#define CYG_VECTOR_RESERVED_81 81 -#define CYG_VECTOR_RESERVED_82 82 -#define CYG_VECTOR_RESERVED_83 83 +#define CYGNUM_HAL_INTERRUPT_SERIAL_2_RX 80 +#define CYGNUM_HAL_INTERRUPT_RESERVED_81 81 +#define CYGNUM_HAL_INTERRUPT_RESERVED_82 82 +#define CYGNUM_HAL_INTERRUPT_RESERVED_83 83 -#define CYG_VECTOR_SERIAL_2_TX 84 -#define CYG_VECTOR_RESERVED_85 85 -#define CYG_VECTOR_RESERVED_86 86 -#define CYG_VECTOR_RESERVED_87 87 +#define CYGNUM_HAL_INTERRUPT_SERIAL_2_TX 84 +#define CYGNUM_HAL_INTERRUPT_RESERVED_85 85 +#define CYGNUM_HAL_INTERRUPT_RESERVED_86 86 +#define CYGNUM_HAL_INTERRUPT_RESERVED_87 87 -#define CYG_VECTOR_RESERVED_88 88 -#define CYG_VECTOR_RESERVED_89 89 -#define CYG_VECTOR_RESERVED_90 90 -#define CYG_VECTOR_RESERVED_91 91 +#define CYGNUM_HAL_INTERRUPT_RESERVED_88 88 +#define CYGNUM_HAL_INTERRUPT_RESERVED_89 89 +#define CYGNUM_HAL_INTERRUPT_RESERVED_90 90 +#define CYGNUM_HAL_INTERRUPT_RESERVED_91 91 -#define CYG_VECTOR_EXTERNAL_0 92 -#define CYG_VECTOR_RESERVED_93 93 -#define CYG_VECTOR_RESERVED_94 94 -#define CYG_VECTOR_RESERVED_95 95 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_0 92 +#define CYGNUM_HAL_INTERRUPT_RESERVED_93 93 +#define CYGNUM_HAL_INTERRUPT_RESERVED_94 94 +#define CYGNUM_HAL_INTERRUPT_RESERVED_95 95 -#define CYG_VECTOR_EXTERNAL_1 96 -#define CYG_VECTOR_RESERVED_97 97 -#define CYG_VECTOR_RESERVED_98 98 -#define CYG_VECTOR_RESERVED_99 99 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_1 96 +#define CYGNUM_HAL_INTERRUPT_RESERVED_97 97 +#define CYGNUM_HAL_INTERRUPT_RESERVED_98 98 +#define CYGNUM_HAL_INTERRUPT_RESERVED_99 99 -#define CYG_VECTOR_EXTERNAL_2 100 -#define CYG_VECTOR_RESERVED_101 101 -#define CYG_VECTOR_RESERVED_102 102 -#define CYG_VECTOR_RESERVED_103 103 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_2 100 +#define CYGNUM_HAL_INTERRUPT_RESERVED_101 101 +#define CYGNUM_HAL_INTERRUPT_RESERVED_102 102 +#define CYGNUM_HAL_INTERRUPT_RESERVED_103 103 -#define CYG_VECTOR_EXTERNAL_3 104 -#define CYG_VECTOR_RESERVED_105 105 -#define CYG_VECTOR_RESERVED_106 106 -#define CYG_VECTOR_RESERVED_107 107 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_3 104 +#define CYGNUM_HAL_INTERRUPT_RESERVED_105 105 +#define CYGNUM_HAL_INTERRUPT_RESERVED_106 106 +#define CYGNUM_HAL_INTERRUPT_RESERVED_107 107 -#define CYG_VECTOR_EXTERNAL_4 108 -#define CYG_VECTOR_RESERVED_109 109 -#define CYG_VECTOR_RESERVED_110 110 -#define CYG_VECTOR_RESERVED_111 111 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_4 108 +#define CYGNUM_HAL_INTERRUPT_RESERVED_109 109 +#define CYGNUM_HAL_INTERRUPT_RESERVED_110 110 +#define CYGNUM_HAL_INTERRUPT_RESERVED_111 111 -#define CYG_VECTOR_EXTERNAL_5 112 -#define CYG_VECTOR_RESERVED_113 113 -#define CYG_VECTOR_RESERVED_114 114 -#define CYG_VECTOR_RESERVED_115 115 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_5 112 +#define CYGNUM_HAL_INTERRUPT_RESERVED_113 113 +#define CYGNUM_HAL_INTERRUPT_RESERVED_114 114 +#define CYGNUM_HAL_INTERRUPT_RESERVED_115 115 -#define CYG_VECTOR_EXTERNAL_6 116 -#define CYG_VECTOR_RESERVED_117 117 -#define CYG_VECTOR_RESERVED_118 118 -#define CYG_VECTOR_RESERVED_119 119 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_6 116 +#define CYGNUM_HAL_INTERRUPT_RESERVED_117 117 +#define CYGNUM_HAL_INTERRUPT_RESERVED_118 118 +#define CYGNUM_HAL_INTERRUPT_RESERVED_119 119 -#define CYG_VECTOR_EXTERNAL_7 120 -#define CYG_VECTOR_RESERVED_121 121 -#define CYG_VECTOR_RESERVED_122 122 -#define CYG_VECTOR_RESERVED_123 123 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_7 120 +#define CYGNUM_HAL_INTERRUPT_RESERVED_121 121 +#define CYGNUM_HAL_INTERRUPT_RESERVED_122 122 +#define CYGNUM_HAL_INTERRUPT_RESERVED_123 123 -#define CYG_ISR_MIN 0 -#define CYG_ISR_MAX 123 +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 123 -#define CYG_ISR_COUNT (3+((CYG_ISR_MAX+1)/4)) +#define CYGNUM_HAL_ISR_COUNT (3+((CYGNUM_HAL_ISR_MAX+1)/4)) #endif // The vector used by the Real time clock #ifdef CYG_HAL_MN10300_SIM -# define CYG_VECTOR_RTC CYG_VECTOR_TIMER_5 -//# define CYG_VECTOR_RTC CYG_VECTOR_EXTERNAL_1 +# define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER_5 +//# define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_EXTERNAL_1 #else # ifdef CYG_HAL_MN10300_MN103000 -# define CYG_VECTOR_RTC CYG_VECTOR_TIMER_8 +# define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER_8 # endif # ifdef CYG_HAL_MN10300_MN103002 -# define CYG_VECTOR_RTC CYG_VECTOR_TIMER_5 +# define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER_5 # endif #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Timer control registers. // On simulator we use simulated external interrupt @@ -459,26 +466,26 @@ #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Static data used by HAL // ISR tables -externC volatile CYG_ADDRESS hal_interrupt_handlers[CYG_ISR_COUNT]; -externC volatile CYG_ADDRWORD hal_interrupt_data[CYG_ISR_COUNT]; -externC volatile CYG_ADDRESS hal_interrupt_objects[CYG_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; // VSR table -externC volatile CYG_ADDRESS hal_vsr_table[CYG_VSR_COUNT]; +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; // MN10300 interrupt control registers, mapped by linker script. externC volatile cyg_uint16 mn10300_interrupt_control[0x300/2]; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt state storage typedef cyg_uint32 CYG_INTERRUPT_STATE; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt control macros #define HAL_DISABLE_INTERRUPTS(_old_) \ @@ -520,7 +527,7 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; : "=d"(_old_) \ ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Translate a vector number into an ISR table index. // If we have chained interrupts we have just a single ISR per priority // level. On the MN103000 there are several interrupts per controller, @@ -530,16 +537,21 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN -#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ -{ \ - /* ICRs are 16 bit regs at 32 bit spacing */ \ - cyg_ucount16 _ix_ = ((_vector_)>>2)<<1; \ - \ - /* read the appropriate interrupt control register */ \ - cyg_uint16 _icr_ = mn10300_interrupt_control[_ix_]; \ - \ - /* extract interrupt priority level */ \ - _index_ = (_icr_ >> 12) & 0x7; \ +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ +{ \ + if( _vector_ <= CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR ) \ + (_index_) = (_vector_); \ + else \ + { \ + /* ICRs are 16 bit regs at 32 bit spacing */ \ + cyg_ucount16 _ix_ = ((_vector_)>>2)<<1; \ + \ + /* read the appropriate interrupt control register */ \ + cyg_uint16 _icr_ = mn10300_interrupt_control[_ix_]; \ + \ + /* extract interrupt priority level */ \ + _index_ = CYGNUM_HAL_INTERRUPT_RESERVED_3 + ((_icr_ >> 12) & 0x7); \ + } \ } #else @@ -550,21 +562,30 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #elif defined(CYG_HAL_MN10300_MN103002) -//#define HAL_TRANSLATE_VECTOR(_vector_,_index_) _index_ = ((_vector_)>>2) - -#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ - _index_ = (((_vector_)<=CYG_VECTOR_SYSTEM_ERROR) ? \ - (_vector_) : \ - (((_vector_)>>2)+CYG_VECTOR_RESERVED_3)) +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ + _index_ = (((_vector_)<=CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR) ? \ + (_vector_) : \ + (((_vector_)>>2)+CYGNUM_HAL_INTERRUPT_RESERVED_3)) #endif #endif -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt and VSR attachment macros +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)NULL ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + #define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ { \ cyg_uint32 _index_; \ @@ -601,7 +622,7 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt controller access // Read interrupt control registers back after writing to them. This // ensures that the written value is not sitting in the store buffers @@ -659,19 +680,20 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ { \ - cyg_vector _v_ = _vector_; \ + cyg_uint32 _v_ = _vector_; \ + cyg_uint16 _val_ = 0; \ + cyg_uint16 _reg_; \ + \ /* adjust vector to bit offset in EXTMD */ \ - _v_ -= CYG_VECTOR_EXTERNAL_0; \ + _v_ -= CYGNUM_HAL_INTERRUPT_EXTERNAL_0; \ _v_ >>= 1; \ \ - cyg_uint16 _val_ = 0; \ - \ /* set bits according to requirements */ \ if( _up_ ) _val_ |= 1; \ if( !(_level_) ) _val_ |= 2; \ \ /* get EXTMD */ \ - cyg_uint16 _reg_ = mn10300_interrupt_control[0x180>>1]; \ + _reg_ = mn10300_interrupt_control[0x180>>1]; \ \ /* clear old value and set new */ \ _reg_ &= ~(3<<_v_); \ @@ -698,7 +720,7 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; _icr_ = mn10300_interrupt_control[_index_]; \ } -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Clock control @@ -807,7 +829,17 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; \ *(_pvalue_) = CYGNUM_KERNEL_COUNTERS_RTC_PERIOD - ((t5<<16) + t4); \ } + +// FIXME: above line should not use CYGNUM_KERNEL_COUNTERS_RTC_PERIOD since +// this means the HAL gets configured by kernel options even when the +// kernel is disabled! + #endif // CYG_HAL_MN10300_SIM -//----------------------------------------------------------------------------- + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY(_pvalue_) HAL_CLOCK_READ(_pvalue_) +#endif + +//-------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_HAL_INTR_H -// End of hal_intr.h +// EOF hal_intr.h diff --git a/packages/hal/mn10300/arch/current/include/hal_io.h b/packages/hal/mn10300/arch/current/include/hal_io.h --- a/packages/hal/mn10300/arch/current/include/hal_io.h +++ b/packages/hal/mn10300/arch/current/include/hal_io.h @@ -3,9 +3,9 @@ //============================================================================= // -// hal_io.h +// hal_io.h // -// HAL device IO register support. +// HAL device IO register support. // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,24 +25,24 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define IO register support -// Description: The macros defined here provide the HAL APIs for handling +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling // device IO control registers. // // Usage: -// #include -// ... -// +// #include +// ... +// // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mn10300/arch/current/include/mn10300_stub.h b/packages/hal/mn10300/arch/current/include/mn10300_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/arch/current/include/mn10300_stub.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_MN10300_STUB_H +#define CYGONCE_HAL_MN10300_STUB_H + +/* mn10300_stub.h - MN10300-specific definitions for generic stub + * + * Copyright (c) 1998,1999 Cygnus Solutions + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + +#define NUMREGS 32 + +#define REGSIZE( _x_ ) (4) + +typedef unsigned long target_register_t; + +enum regnames { + D0, D1, D2, D3, A0, A1, A2, A3, + SP, PC, MDR, PSW, LIR, LAR +}; + +typedef enum regnames regnames_t; + +/* Given a trap value TRAP, return the corresponding signal. */ +extern int __computeSignal (unsigned int trap_number); + +/* Return the SPARC trap number corresponding to the last-taken trap. */ +extern int __get_trap_number (void); + +/* Return the currently-saved value corresponding to register REG. */ +extern target_register_t get_register (regnames_t reg); + +/* Store VALUE in the register corresponding to WHICH. */ +extern void put_register (regnames_t which, target_register_t value); + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ +extern void set_pc (target_register_t pc); + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ +void __single_step (void); + +/* Clear the single-step state. */ +void __clear_single_step (void); + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ +extern int __is_breakpoint_function (void); + +/* Skip the current instruction. */ +extern void __skipinst (void); + +extern void __install_breakpoints (void); + +extern void __clear_breakpoints (void); + +#endif // ifndef CYGONCE_HAL_MN10300_STUB_H diff --git a/packages/hal/mn10300/arch/current/include/pkgconf/hal_mn10300.h b/packages/hal/mn10300/arch/current/include/pkgconf/hal_mn10300.h --- a/packages/hal/mn10300/arch/current/include/pkgconf/hal_mn10300.h +++ b/packages/hal/mn10300/arch/current/include/pkgconf/hal_mn10300.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_MN10300_H // ==================================================================== // -// pkgconf/hal_mn10300.h +// pkgconf/hal_mn10300.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### diff --git a/packages/hal/mn10300/arch/current/src/PKGconf.mak b/packages/hal/mn10300/arch/current/src/PKGconf.mak --- a/packages/hal/mn10300/arch/current/src/PKGconf.mak +++ b/packages/hal/mn10300/arch/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,14 +32,16 @@ PACKAGE := hal_mn10300 include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_misc.c context.S +COMPILE := hal_misc.c context.S mn10300_stub.c OTHER_OBJS := -OTHER_TARGETS := vectors.stamp -OTHER_DEPS := $(PACKAGE)_vectors.d -OTHER_CLEAN := vectors.clean +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src +.PHONY: ldscript.clean + vectors.stamp: $(PACKAGE)_vectors.o $(CP) $< $(PREFIX)/lib/vectors.o @$(TOUCH) $@ @@ -51,3 +53,14 @@ vectors.clean: $(PACKAGE)_vectors.o: $(BUILD_TREE)/pkgconf/pkgconf.mak \ $(BUILD_TREE)/pkgconf/makevars $(PACKAGE_RULES_FILE) +ldscript.stamp: mn10300.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ + +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp diff --git a/packages/hal/mn10300/arch/current/src/context.S b/packages/hal/mn10300/arch/current/src/context.S --- a/packages/hal/mn10300/arch/current/src/context.S +++ b/packages/hal/mn10300/arch/current/src/context.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -94,7 +94,19 @@ ## HAL longjmp(), setjmp() implementations ## These implementations omit the usual movm [d2,d3,a2,a3],(sp) ## Which is the first instruction of all C compiled functions. +## Note: These definitions are repeated in hal_arch.h. If changes are required +## remember to update both sets. +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_D2 1 +#define CYGARC_JMP_BUF_D3 2 +#define CYGARC_JMP_BUF_A2 3 +#define CYGARC_JMP_BUF_A3 4 +#define CYGARC_JMP_BUF_LR 5 + +#define CYGARC_JMP_BUF_SIZE 6 + + # This just preserves the callee save registers # namely a2,a3,d2,d3 # setjmp cannot use movm to do this as we need to keep @@ -102,14 +114,14 @@ .globl _hal_setjmp _hal_setjmp: # d0=env mov d0,a0 # env - mov d2,(4,a0) - mov d3,(8,a0) - mov a2,(12,a0) - mov a3,(16,a0) + mov d2,(CYGARC_JMP_BUF_D2*4,a0) + mov d3,(CYGARC_JMP_BUF_D3*4,a0) + mov a2,(CYGARC_JMP_BUF_A2*4,a0) + mov a3,(CYGARC_JMP_BUF_A3*4,a0) mov mdr,d1 # link saved by call (also in (0,sp)) - mov d1,(20,a0) + mov d1,(CYGARC_JMP_BUF_LR*4,a0) mov sp,a1 - mov a1,(0,a0) # a1==(caller''s sp) + mov a1,(CYGARC_JMP_BUF_SP*4,a0) # a1==(caller''s sp) clr d0 # return 0 ret [],0 @@ -118,13 +130,13 @@ .globl _hal_longjmp _hal_longjmp: mov d0,a0 - mov (4,a0),d2 - mov (8,a0),d3 - mov (12,a0),a2 - mov (16,a0),a3 - mov (20,a0),d0 + mov (CYGARC_JMP_BUF_D2*4,a0),d2 + mov (CYGARC_JMP_BUF_D3*4,a0),d3 + mov (CYGARC_JMP_BUF_A2*4,a0),a2 + mov (CYGARC_JMP_BUF_A3*4,a0),a3 + mov (CYGARC_JMP_BUF_LR*4,a0),d0 ## mov d0,mdr - mov (0,a0),a1 # stashed (caller''s sp) + mov (CYGARC_JMP_BUF_SP*4,a0),a1 # stashed (caller''s sp) mov a1,sp mov d0,(0,sp) # put link on stack mov d1,d0 # return arg1 diff --git a/packages/hal/mn10300/arch/current/src/hal_misc.c b/packages/hal/mn10300/arch/current/src/hal_misc.c --- a/packages/hal/mn10300/arch/current/src/hal_misc.c +++ b/packages/hal/mn10300/arch/current/src/hal_misc.c @@ -1,10 +1,10 @@ -/*============================================================================= +/*========================================================================== // -// hal_misc.c +// hal_misc.c // -// HAL miscellaneous functions +// HAL miscellaneous functions // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -22,23 +22,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-11-12 -// Purpose: HAL miscellaneous functions -// Description: This file contains miscellaneous functions provided by the -// HAL. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-18 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. // //####DESCRIPTIONEND#### // -//===========================================================================*/ +//========================================================================*/ #include @@ -50,24 +50,57 @@ #include -/*---------------------------------------------------------------------------*/ +#if 0 +void trace( CYG_ADDRWORD tag, CYG_ADDRWORD a1, CYG_ADDRWORD a2) +{ + CYG_ADDRWORD **pp = (CYG_ADDRWORD **)0x48100000; + CYG_ADDRWORD *ix = (CYG_ADDRWORD *)0x4810000C; + CYG_ADDRWORD *p = *pp; + *p++ = tag; + *ix = *ix + 1; + *p++ = *ix; + *p++ = a1; + *p++ = a2; + *pp = p; +} +#endif + +/*------------------------------------------------------------------------*/ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif void -cyg_hal_invoke_constructors (void) +cyg_hal_invoke_constructors(void) { typedef void (*pfunc) (void); extern pfunc _CTOR_LIST__[]; extern pfunc _CTOR_END__[]; - pfunc *p; + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &_CTOR_END__[-1]; -#ifdef CYG_KERNEL_USE_INIT_PRIORITY + cyg_hal_stop_constructors = 0; + for (; p >= _CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + for (p = &_CTOR_END__[-1]; p >= _CTOR_LIST__; p--) (*p) (); -#else - for (p = _CTOR_LIST__; p != _CTOR_END__; p++) - (*p) (); -#endif +#endif + +} // cyg_hal_invoke_constructors() +void +cyg_hal_enable_caches(void) +{ #ifdef CYG_HAL_MN10300_STDEVAL1 // On the real hardware we also enable the cache. @@ -85,23 +118,29 @@ cyg_hal_invoke_constructors (void) #endif -#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ +} // cyg_hal_enable_caches() + +void +cyg_hal_debug_init(void) +{ +#if defined(CYGPKG_KERNEL) && \ + defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ defined(CYG_HAL_USE_ROM_MONITOR) && \ defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) { extern CYG_ADDRESS hal_virtual_vector_table[32]; extern void patch_dbg_syscalls(void * vector); -#define DBG_SYSCALL_VEC_NUM 15 - patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[DBG_SYSCALL_VEC_NUM]) ); + patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[0]) ); } #endif } -/*---------------------------------------------------------------------------*/ -/* Determine the index of the ls bit of the supplied mask. */ +/*------------------------------------------------------------------------*/ +/* Determine the index of the ls bit of the supplied mask. */ -cyg_uint32 hal_lsbit_index(cyg_uint32 mask) +cyg_uint32 +hal_lsbit_index(cyg_uint32 mask) { cyg_uint32 n = mask; @@ -120,10 +159,11 @@ cyg_uint32 hal_lsbit_index(cyg_uint32 ma return tab[n>>26]; } -/*---------------------------------------------------------------------------*/ -/* Determine the index of the ms bit of the supplied mask. */ +/*------------------------------------------------------------------------*/ +/* Determine the index of the ms bit of the supplied mask. */ -cyg_uint32 hal_msbit_index(cyg_uint32 mask) +cyg_uint32 +hal_msbit_index(cyg_uint32 mask) { cyg_uint32 x = mask; cyg_uint32 w; @@ -144,61 +184,60 @@ cyg_uint32 hal_msbit_index(cyg_uint32 ma } -/*---------------------------------------------------------------------------*/ -/* First level C exception handler. */ +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; + +void +cyg_hal_exception_handler(HAL_SavedRegisters *regs) +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + + // Set the pointer to the registers of the current exception + // context. At entry the GDB stub will expand the + // HAL_SavedRegisters structure into a (bigger) register array. + _hal_registers = regs; + + __handle_exception(); + +#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) + + CYG_WORD vector = regs->vector; -void exception_handler(HAL_SavedRegisters *regs) -{ + if( vector == CYGNUM_HAL_INTERRUPT_WATCHDOG ) + { + // Special case the watchdog timer exception, look for an + // ISR for it and call it if present. Otherwise pass on to + // the exception system. + + cyg_uint32 (*isr)(CYG_ADDRWORD,CYG_ADDRWORD); + cyg_uint32 index; + + HAL_TRANSLATE_VECTOR( CYGNUM_HAL_INTERRUPT_WATCHDOG, index ); + + isr = (cyg_uint32 (*)(CYG_ADDRWORD,CYG_ADDRWORD)) + (hal_interrupt_handlers[index]); + + if( isr != 0 ) + { + isr(CYGNUM_HAL_INTERRUPT_WATCHDOG, + hal_interrupt_data[CYGNUM_HAL_INTERRUPT_WATCHDOG] + ); + return; + } + } + +#if defined(CYGPKG_HAL_EXCEPTIONS) + // We should decode the vector and pass a more appropriate // value as the second argument. For now we simply pass a // pointer to the saved registers. We should also divert // breakpoint and other debug vectors into the debug stubs. -#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) - - CYG_WORD vector = regs->vector; - - if( vector == 0 ) - { - // An NMI vector, decode it from the NMIGR - - cyg_uint32 nmigr = mn10300_interrupt_control[0]; - - // Write back to clear interrupt bits - mn10300_interrupt_control[0] = nmigr; - - if( nmigr & 0x0002 ) - { - // Special case the watchdog timer exception, look for an - // ISR for it and call it if present. Otherwise pass on to - // the exception system. - - cyg_uint32 (*isr)(CYG_ADDRWORD,CYG_ADDRWORD); - cyg_uint32 index; - - HAL_TRANSLATE_VECTOR( CYG_VECTOR_WATCHDOG, index ); - - isr = (cyg_uint32 (*)(CYG_ADDRWORD,CYG_ADDRWORD)) - (hal_interrupt_handlers[index]); - - if( isr != 0 ) - { - isr(CYG_VECTOR_WATCHDOG, - hal_interrupt_data[CYG_VECTOR_WATCHDOG] - ); - return; - } - vector = CYG_VECTOR_WATCHDOG; - } - // Check for system error - else if( nmigr & 0x0004 ) vector = CYG_VECTOR_SYSTEM_ERROR; - - // otherwise it is an NMI and vector is correct. - } - -#if defined(CYGPKG_HAL_EXCEPTIONS) - - deliver_exception( vector, (CYG_ADDRWORD)regs ); + cyg_hal_deliver_exception( vector, (CYG_ADDRWORD)regs ); #endif @@ -207,5 +246,5 @@ void exception_handler(HAL_SavedRegister return; } -/*---------------------------------------------------------------------------*/ -/* End of hal_misc.c */ +/*------------------------------------------------------------------------*/ +/* End of hal_misc.c */ diff --git a/packages/hal/mn10300/arch/current/src/mn10300.ld b/packages/hal/mn10300/arch/current/src/mn10300.ld new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/arch/current/src/mn10300.ld @@ -0,0 +1,118 @@ +//=========================================================================== +// +// MLT linker script for MN10300 +// adapted from packages\hal\mn10300\stdeval1\v1_1\src\stdeval1.ld +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +#include +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = ABSOLUTE(.); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) \ + . = ALIGN(4); \ + ___DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) ___DEVTAB_END__ = ABSOLUTE (.); \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + _GOT_START = ABSOLUTE (.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE (.) + 32768; _SDA_BASE_ = ABSOLUTE (.); \ + *(.got.plt) *(.got) _GOT_END_ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include CYGHWR_MEMORY_LAYOUT_LDI + +_mn10300_interrupt_control = 0x34000100; +_mn10300_interrupt_vectors = 0x20000000; + +#if (defined (CYG_HAL_STARTUP_RAM) && ! defined (CYGPKG_HAL_MN10300_SIM)) +#define VSR_BASE 0x48000000 +_hal_vsr_table = VSR_BASE; +_hal_virtual_vector_table = VSR_BASE + 0x80; +#endif diff --git a/packages/hal/mn10300/arch/current/src/mn10300_stub.c b/packages/hal/mn10300/arch/current/src/mn10300_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/arch/current/src/mn10300_stub.c @@ -0,0 +1,376 @@ +/* mn10300_stub.c - helper functions for mn10300 stub. + * + * Copyright (c) 1998,1999 Cygnus Solutions + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. + */ + +#include + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include // dbg_currthread_id +#endif + +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + return SIGTRAP; +} + + +/* Return the trap number corresponding to the last-taken trap. */ + +int __get_trap_number (void) +{ + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return _hal_registers->vector; +} + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support. Lifted from CygMon. + */ + +#define NUM_SS_BPTS 2 +static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; +static unsigned char break_mem_data [NUM_SS_BPTS]; + +/* Set a single-step breakpoint at ADDR. Up to two such breakpoints + can be set; WHICH specifies which one to set (0 or 1). */ + +static void +set_single_bp (int which, unsigned char *addr) +{ + if (0 == break_mem[which]) { + break_mem[which] = (target_register_t) addr; + break_mem_data[which] = *addr; + *addr = HAL_BREAKINST; + } +} + +/* Clear any single-step breakpoint(s) that may have been set. */ + +void __clear_single_step (void) +{ + int x; + for (x = 0; x < NUM_SS_BPTS; x++) + { + unsigned char* addr = (unsigned char*) break_mem[x]; + if (addr) { + *addr = break_mem_data[x]; + break_mem[x] = 0; + } + } +} + +/* Read a 16-bit displacement from address 'p'. The + value is stored little-endian. */ + +static short +read_disp16(unsigned char *p) +{ + return (short)(p[0] | (p[1] << 8)); +} + +/* Read a 32-bit displacement from address 'p'. The + value is stored little-endian. */ + +static int +read_disp32(unsigned char *p) +{ + return (int)(p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24)); +} + + +/* Get the contents of An register. */ + +static unsigned int +get_areg (int n) +{ + switch (n) + { + case 0: + return get_register (A0); + case 1: + return get_register (A1); + case 2: + return get_register (A2); + case 3: + return get_register (A3); + } + return 0; +} + + +/* Table of instruction sizes, indexed by first byte of instruction, + used to determine the address of the next instruction for single stepping. + If an entry is zero, special code must handle the case (for example, + branches or multi-byte opcodes). */ + +static char opcode_size[256] = +{ + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ + /*------------------------------------------------*/ +/* 0 */ 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, +/* 1 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, +/* 2 */ 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, +/* 3 */ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, +/* 4 */ 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, +/* 5 */ 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, +/* 6 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, +/* 7 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, +/* 8 */ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, +/* 9 */ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, +/* a */ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, +/* b */ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, +/* c */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, +/* d */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +/* e */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, +/* f */ 0, 2, 2, 2, 2, 2, 2, 1, 0, 3, 0, 4, 0, 6, 7, 1 +}; + +/* Set breakpoint(s) to simulate a single step from the current PC. */ + +void __single_step (void) +{ + unsigned char *pc = (unsigned char *) get_register (PC); + unsigned int opcode; + int displ; + + opcode = *pc; + + /* Check the table for the simple cases. */ + displ = opcode_size[opcode]; + if (displ != 0) + { + set_single_bp (0, pc + displ); + return; + } + + /* Handle the more complicated cases. */ + switch (opcode) + { + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + case 0xca: + /* + * bxx (d8,PC) + */ + displ = *((signed char *)pc + 1); + set_single_bp (0, pc + 2); + if (displ < 0 || displ > 2) + set_single_bp (1, pc + displ); + break; + + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + case 0xd9: + case 0xda: + /* + * lxx (d8,PC) + */ + if (pc != (unsigned char*) get_register (LAR)) + set_single_bp (0, (unsigned char *) get_register (LAR)); + set_single_bp (1, pc + 1); + break; + + case 0xdb: + /* + * setlb requires special attention. It loads the next four instruction + * bytes into the LIR register, so we can't insert a breakpoint in any + * of those locations. + */ + set_single_bp (0, pc + 5); + break; + + case 0xcc: + case 0xcd: + /* + * jmp (d16,PC) or call (d16,PC) + */ + displ = read_disp16((char *)(pc + 1)); + set_single_bp (0, pc + displ); + break; + + case 0xdc: + case 0xdd: + /* + * jmp (d32,PC) or call (d32,PC) + */ + displ = read_disp32((char *)(pc + 1)); + set_single_bp (0, pc + displ); + break; + + case 0xde: + /* + * retf + */ + set_single_bp (0, (unsigned char *) get_register (MDR)); + break; + + case 0xdf: + /* + * ret + */ + displ = *((char *)pc + 2); + set_single_bp (0, (unsigned char *) read_disp32 ((unsigned char *) + get_register (SP) + displ)); + break; + + case 0xf0: + /* + * Some branching 2-byte instructions. + */ + opcode = *(pc + 1); + if (opcode >= 0xf0 && opcode <= 0xf7) + { + /* jmp (An) / calls (An) */ + set_single_bp (0, (unsigned char *) get_areg (opcode & 3)); + + } + else if (opcode == 0xfc) + { + /* rets */ + set_single_bp (0, (unsigned char *) read_disp32 ((unsigned char *) + get_register (SP))); + + } + else if (opcode == 0xfd) + { + /* rti */ + set_single_bp (0, (unsigned char *) read_disp32 ((unsigned char *) + get_register (SP) + 4)); + + } + else + set_single_bp (0, pc + 2); + + break; + + case 0xf8: + /* + * Some branching 3-byte instructions. + */ + opcode = *(pc + 1); + if (opcode >= 0xe8 && opcode <= 0xeb) + { + displ = *((signed char *)pc + 2); + set_single_bp (0, pc + 3); + if (displ < 0 || displ > 3) + set_single_bp (1, pc + displ); + + } + else + set_single_bp (0, pc + 3); + break; + + case 0xfa: + opcode = *(pc + 1); + if (opcode == 0xff) + { + /* calls (d16,PC) */ + displ = read_disp16((char *)(pc + 2)); + set_single_bp (0, pc + displ); + } + else + set_single_bp (0, pc + 4); + break; + + case 0xfc: + opcode = *(pc + 1); + if (opcode == 0xff) + { + /* calls (d32,PC) */ + displ = read_disp32((char *)(pc + 2)); + set_single_bp (0, pc + displ); + } + else + set_single_bp (0, pc + 6); + break; + + } +} + +void __install_breakpoints (void) +{ + /* NOP since single-step HW exceptions are used instead of + breakpoints. */ +} + +void __clear_breakpoints (void) {} + + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ + +int +__is_breakpoint_function () +{ + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); +} + + +/* Skip the current instruction. */ + +void __skipinst (void) +{ + unsigned char *pc = (char *) get_register (PC); + + switch (*pc) + { + case 0xff: // breakpoint instruction + pc++; + break; + case 0xf0: // Assume syscall trap (0xf0, 0x20) + pc += 2; + break; + default: + pc++; // Assume all other instructions + break; // are one byte + } + + put_register (PC, (target_register_t) pc); +} + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/mn10300/arch/current/src/vectors.S b/packages/hal/mn10300/arch/current/src/vectors.S --- a/packages/hal/mn10300/arch/current/src/vectors.S +++ b/packages/hal/mn10300/arch/current/src/vectors.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -236,7 +236,7 @@ 8: # Clear BSS mov __bss_start,a0 - mov _end,a1 + mov __bss_end,a1 cmp a0,a1 beq 8f @@ -295,7 +295,18 @@ 8: .extern _cyg_hal_invoke_constructors call _cyg_hal_invoke_constructors,[],0 - # Call cyg_start + .extern _cyg_hal_enable_caches + call _cyg_hal_enable_caches,[],0 + + .extern _cyg_hal_debug_init + call _cyg_hal_debug_init,[],0 + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + .extern _initialize_stub + call _initialize_stub,[],0 +#endif + + # Call cyg_start clr d0 mov d0,(4,sp) @@ -341,14 +352,14 @@ 2: #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT - .extern __18Cyg_Scheduler_Base.sched_lock - + .extern cyg_scheduler_sched_lock + # Increment the scheduler lock .macro increment_sched_lock reg=d0 - mov (__18Cyg_Scheduler_Base.sched_lock),\reg + mov (cyg_scheduler_sched_lock),\reg inc \reg - mov \reg,(__18Cyg_Scheduler_Base.sched_lock) + mov \reg,(cyg_scheduler_sched_lock) .endm #else @@ -364,10 +375,10 @@ 2: #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN -#define CYG_ISR_TABLE_SIZE 7 - #if defined(CYG_HAL_MN10300_MN103000) +#define CYG_ISR_TABLE_SIZE 7 + # decode the interrupt .macro decode_interrupt dreg,areg,dreg1 mov _mn10300_interrupt_control,\areg @@ -384,6 +395,8 @@ 2: #elif defined(CYG_HAL_MN10300_MN103002) +#define CYG_ISR_TABLE_SIZE 10 + # decode the interrupt .macro decode_interrupt dreg,areg,dreg1 mov _mn10300_interrupt_control,\areg @@ -391,6 +404,7 @@ 2: mov (0,a2),\dreg # dreg = vector priority mov \dreg1,(0,a2) # store real vector in saved state asl 2,\dreg # dreg = byte index of isr + add 12,\dreg # skip NMI vectors .endm #endif @@ -470,7 +484,7 @@ 8: # call. On the MN103000 this needs to be shifted right by # two to derive the vector. On the MN103002 this correponds # exactly to the vector used to attach it. - + #if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR) # Call cyg_instrument to record that this interrupt is being raised. @@ -483,6 +497,18 @@ 8: add 16,sp # pop space #endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + .extern _cyg_hal_gdb_isr + add -16,sp # make space for return link + args + mov (0,a2),d0 # d0 = vector + mov (56,a2),d1 # d1 = pc + calls _cyg_hal_gdb_isr # call GDB isr function + cmp 0x00,d0 # Call ISR proper? + beq 2f # (d0 is 0 when skipping + # to avoid DSR call) + add 16,sp # pop space +#endif #ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING @@ -520,6 +546,12 @@ 8: # should still contain the vector byte index. Similarly, # A2 should still point to the saved machine state. +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + # If interrupt was caused by GDB, the ISR call above + # is skipped by jumping here. +2: +#endif + #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK # If we are returning from the last nested interrupt, move back @@ -579,7 +611,11 @@ hal_lsbit_table: ##----------------------------------------------------------------------------- ## Default NMI VSR - .globl _exception_handler +#define NMICR 0x34000100 +#define DCR 0x20000030 +#define ISR 0x20000034 + + .globl _cyg_hal_exception_handler .text .globl __default_nmi_vsr @@ -588,19 +624,62 @@ hal_lsbit_table: # We come here with all the registers saved # on the stack. + # Decode the cause of the NMI and cancel all the bits in all + # the registers. We need to clear any bits set in the ISR and + # then clear any bits set in the NMICR. Note that we can only + # access the ISR if the DCR:DE bit is set. + + movhu (NMICR),d0 # D0 = NMI Control register + + movhu (DCR),d1 # D1 = Debug Control Register + mov d1,d2 # D2 = copy of DCR + movhu (ISR),d3 # D3 = Interrupt Status Register + + or 0x0010,d1 # Set DE bit + movhu d1,(DCR) + + movhu d3,(ISR) # clear ISR bits + + movhu d2,(DCR) # restore DCR to original value + + movhu d0,(NMICR) # clear NMI bits + and 0x7,d0 # LS 3 bits only + + mov hal_lsbit_table,a0 + movbu (d0,a0),d1 # D1 = NMI code + ## 0 = NMI + ## 1 = Watchdog + ## 2 = System Error + + + # It appears that there is an undocumented extra bit + # in the PSW that masks the delivery of NMIs. It is in + # the upper 16 bits of the register that we cannot access + # directly. So, to clear it, we must set up a fake interrupt + # state and do an RTI to load the PSW. We need to do this if + # we are going to be able to set breakpoints in NMI handlers. + # Note that the AM33 has a documented NMID at bit 17 of the + # extended PSW (along with instructions to access it). + + mov PSW,d3 # D3 = PSW + and 0xFFFF,d3 + mov 1f,d2 # D2 = Next PC + movm [d2,d3],(sp) # Push + rti # and load into CPU +1: + mov sp,a1 # a1 = saved state mov a1,d0 # d0 = arg1 = saved state add -16,sp # return link + args - mov 0,d1 # 0 == NMI trap mov d1,(16,sp) # save in spare save slot - calls _exception_handler # call C code + calls _cyg_hal_exception_handler # call C code add 16,sp # pop args movm (sp),[d2,d3,a2,a3,other] # pop all registers add 4,sp rti - + ##----------------------------------------------------------------------------- ## Default TRAP VSR @@ -614,7 +693,7 @@ hal_lsbit_table: add -8,sp # return link + arg mov 3,d1 # 3 == TRAP trap mov d1,(0,sp) # save in spare save slot - calls _exception_handler # call C code + calls _cyg_hal_exception_handler # call C code add 8,sp # pop args movm (sp),[d2,d3,a2,a3,other] # pop all registers add 4,sp diff --git a/packages/hal/mn10300/arch/current/tests/PKGconf.mak b/packages/hal/mn10300/arch/current/tests/PKGconf.mak --- a/packages/hal/mn10300/arch/current/tests/PKGconf.mak +++ b/packages/hal/mn10300/arch/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mn10300/sim/current/ChangeLog b/packages/hal/mn10300/sim/current/ChangeLog --- a/packages/hal/mn10300/sim/current/ChangeLog +++ b/packages/hal/mn10300/sim/current/ChangeLog @@ -1,3 +1,57 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-04 Gary Thomas + + * include/pkgconf/hal_mn10300_sim.h: Take out DEVICES dependencies. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-16 Jesper Skov + + * include/hal_stub.h: Removed. + +1999-02-05 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + + * src/PKGconf.mak (COMPILE): + Remove obsolete and in fact empty file sim.S + + * src/sim.S: + Removed. + +1999-01-14 John Dallaway + + * include/pkgconf/ram.ldi: correct the start address + +1999-01-12 John Dallaway + + * src/sim.ld: remove for MLT + * src/PKGconf.mak: remove sim.ld rules for MLT + * include/pkgconf/ram.ldi: new linker script fragment for MLT + +1998-11-06 Jesper Skov + + * include/hal_stub.h: Added for GDB stub support. + 1998-10-23 Jesper Skov * include/pkgconf/hal_mn10300_sim.h: Allow wallclock and watchdog @@ -81,7 +135,7 @@ Mon Aug 17 22:21:34 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/mn10300/sim/current/include/hal_diag.h b/packages/hal/mn10300/sim/current/include/hal_diag.h --- a/packages/hal/mn10300/sim/current/include/hal_diag.h +++ b/packages/hal/mn10300/sim/current/include/hal_diag.h @@ -3,9 +3,9 @@ /*============================================================================= // -// hal_diag.h +// hal_diag.h // -// HAL Support for Kernel Diagnostic Routines +// HAL Support for Kernel Diagnostic Routines // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,19 +25,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: HAL Support for Kernel Diagnostic Routines -// Description: Diagnostic routines for use during kernel development. -// Usage: #include +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mn10300/sim/current/include/pkgconf/hal_mn10300_sim.h b/packages/hal/mn10300/sim/current/include/pkgconf/hal_mn10300_sim.h --- a/packages/hal/mn10300/sim/current/include/pkgconf/hal_mn10300_sim.h +++ b/packages/hal/mn10300/sim/current/include/pkgconf/hal_mn10300_sim.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_MN10300_SIM_H // ==================================================================== // -// pkgconf/hal_mn10300_sim.h +// pkgconf/hal_mn10300_sim.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### @@ -50,9 +50,6 @@ type radio parent CYGPKG_HAL_MN10300 platform sim - requires !CYGPKG_DEVICES_GDB - requires !CYGPKG_DEVICES_SERIAL_RS232_COMMON - requires !CYGPKG_DEVICES_SERIAL_RS232_MN10300 description " The minimal simulator HAL package is provided for use when only a simple simulation of the processor architecture is diff --git a/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.ldi b/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 12 11:09:07 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x40000000, LENGTH = 0x200000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x40000000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.mlt b/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_sim_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 48000000 200000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 48000000 48000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/mn10300/sim/current/src/PKGconf.mak b/packages/hal/mn10300/sim/current/src/PKGconf.mak --- a/packages/hal/mn10300/sim/current/src/PKGconf.mak +++ b/packages/hal/mn10300/sim/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,25 +32,11 @@ PACKAGE := hal_mn10300_sim include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_diag.c sim.S +COMPILE := hal_diag.c OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src -.PHONY: ldscript.clean - -ldscript.stamp: sim.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - - diff --git a/packages/hal/mn10300/sim/current/src/hal_diag.c b/packages/hal/mn10300/sim/current/src/hal_diag.c --- a/packages/hal/mn10300/sim/current/src/hal_diag.c +++ b/packages/hal/mn10300/sim/current/src/hal_diag.c @@ -1,8 +1,8 @@ /*============================================================================= // -// hal_diag.c +// hal_diag.c // -// HAL diagnostic output code +// HAL diagnostic output code // //============================================================================= //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-03-13 +// Author(s): dsm +// Contributors: dsm +// Date: 1998-03-13 // Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. +// Description: Implementations of HAL diagnostic output support. // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mn10300/sim/current/src/sim.S b/packages/hal/mn10300/sim/current/src/sim.S deleted file mode 100644 diff --git a/packages/hal/mn10300/sim/current/src/sim.ld b/packages/hal/mn10300/sim/current/src/sim.ld deleted file mode 100644 --- a/packages/hal/mn10300/sim/current/src/sim.ld +++ /dev/null @@ -1,106 +0,0 @@ -STARTUP(vectors.o) -ENTRY(reset_vector) - -GROUP(libtarget.a libgcc.a) - -#include - -#define LOAD_BASE 0x40000000 -#define DATA_BASE - -SECTIONS -{ - - /* Start of ROM */ - . = LOAD_BASE; - - .rom_vectors : - { - KEEP(*(.vectors)) - } - - .text : - { - _stext = .; - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - *(.init) - - } - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } - .rodata : { *(.rodata*) } - .rodata1 : { *(.rodata1) } - .fixup : { *(.fixup) } - .gcc_except_table : { *(.gcc_except_table) } - - __rom_data_start = ALIGN(4); - .data DATA_BASE : - AT( __rom_data_start ) - { - __ram_data_start = .; - *(.data*) - *(.data1) - _GOT1_START_ = .; - *(.got1) - _GOT1_END_ = .; - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. */ - _GOT2_START_ = .; - *(.got2) - _GOT2_END_ = .; - . = ALIGN(4); -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - __CTOR_LIST__ = .; - KEEP(*(SORT(.ctors*))) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - KEEP(*(SORT(.dtors*))) - __DTOR_END__ = .; -#else - __CTOR_LIST__ = .; - KEEP(*sched.o(.ctors*)) - KEEP(*clock.o(.ctors*)) - KEEP(*thread.o(.ctors*)) - KEEP(*(.ctors*)) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - KEEP(*(.dtors)) - __DTOR_END__ = .; -#endif - _GOT_START_ = .; - _GLOBAL_OFFSET_TABLE_ = . + 32768; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - _GOT_END_ = .; - *(.dynamic) - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - *(.sdata*) - *(.sbss*) - } - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - . = ALIGN(4); - __bss_start = .; - .bss : - { - *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - -} - -_mn10300_interrupt_control = 0x34000100; -_mn10300_interrupt_vectors = 0x20000000; diff --git a/packages/hal/mn10300/sim/current/tests/PKGconf.mak b/packages/hal/mn10300/sim/current/tests/PKGconf.mak --- a/packages/hal/mn10300/sim/current/tests/PKGconf.mak +++ b/packages/hal/mn10300/sim/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/mn10300/stdeval1/current/ChangeLog b/packages/hal/mn10300/stdeval1/current/ChangeLog --- a/packages/hal/mn10300/stdeval1/current/ChangeLog +++ b/packages/hal/mn10300/stdeval1/current/ChangeLog @@ -1,3 +1,82 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Nick Garnett + + * src/hal_diag.c (hal_diag_write_char): Backed off Gary's change. + +1999-03-18 Gary Thomas + + * src/hal_diag.c (hal_diag_write_char): Don't disable all interrupts + in this routine, just the appropriate one from the UART. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-20 Jonathan Larmour + + * src/hal_diag.c (hal_diag_write_char): + Rename CYG_VECTOR_EXTERNAL_2 -> CYGNUM_HAL_INTERRUPT_EXTERNAL_2 + + * src/plf_stub.c: + Rename CYG_VECTOR_* -> CYGNUM_HAL_INTERRUPT_* in line with + arch/hal_intr.h changes + +1999-02-16 Jesper Skov + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/plf_stub.c: [added] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-05 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-13 John Dallaway + + * include/pkgconf/rom.ldi: use FOLLOWING () macro + +1999-01-12 John Dallaway + + * src/stdeval1.ld: remove for MLT + * src/PKGconf.mak: remove stdeval1.ld rules for MLT + * include/pkgconf/ram.ldi: new linker script fragment for MLT + * include/pkgconf/rom.ldi: new linker script fragment for MLT + +1998-11-09 Jesper Skov + + * src/hal_stub.c (cyg_hal_gdb_isr, interruptible, serial_init): + Added GDB break support. + +1998-11-06 Jesper Skov + + * include/hal_stub.h: + * src/hal_stub.c: + Added GDB stub. + + * src/PKGconf.mak: Added stub to the object list. + 1998-10-19 Jesper Skov * include/pkgconf/hal_mn10300_stdeval1.h: Undid 1998-10-16 change. @@ -109,7 +188,7 @@ Mon Aug 17 22:20:05 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/mn10300/stdeval1/current/include/hal_diag.h b/packages/hal/mn10300/stdeval1/current/include/hal_diag.h --- a/packages/hal/mn10300/stdeval1/current/include/hal_diag.h +++ b/packages/hal/mn10300/stdeval1/current/include/hal_diag.h @@ -3,9 +3,9 @@ /*============================================================================= // -// hal_diag.h +// hal_diag.h // -// HAL Support for Kernel Diagnostic Routines +// HAL Support for Kernel Diagnostic Routines // //============================================================================= //####COPYRIGHTBEGIN#### @@ -25,19 +25,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: HAL Support for Kernel Diagnostic Routines -// Description: Diagnostic routines for use during kernel development. -// Usage: #include "cyg/hal/hal_diag.h" +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include "cyg/hal/hal_diag.h" // //####DESCRIPTIONEND#### // diff --git a/packages/hal/mn10300/stdeval1/current/include/pkgconf/hal_mn10300_stdeval1.h b/packages/hal/mn10300/stdeval1/current/include/pkgconf/hal_mn10300_stdeval1.h --- a/packages/hal/mn10300/stdeval1/current/include/pkgconf/hal_mn10300_stdeval1.h +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/hal_mn10300_stdeval1.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_HAL_MN10300_STDEVAL1_H // ==================================================================== // -// pkgconf/hal_mn10300_stdeval1.h +// pkgconf/hal_mn10300_stdeval1.h // -// HAL configuration file +// HAL configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): bartv -// Contributors: bartv -// Date: 1998-09-02 -// Purpose: To allow the user to edit HAL configuration options. +// Author(s): bartv +// Contributors: bartv +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. // Description: // //####DESCRIPTIONEND#### diff --git a/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.ldi b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 12 10:55:38 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x48008000, LENGTH = 0x1f8000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x48008000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.mlt b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 48008000 1f8000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 48008000 48008000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.ldi b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// MLT linker script export - Tue Jan 13 10:14:27 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + rom : ORIGIN = 0x40000000, LENGTH = 0x80000 + ram : ORIGIN = 0x48000000, LENGTH = 0x200000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x40000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x48000000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.mlt b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_stdeval1_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region rom 40000000 80000 1 ! +region ram 48000000 200000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 40000000 40000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! +section data 0 1 1 1 1 1 0 0 48000000 bss ! +section bss 0 4 0 1 0 0 0 0 ! diff --git a/packages/hal/mn10300/stdeval1/current/include/plf_stub.h b/packages/hal/mn10300/stdeval1/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/plf_stub.h @@ -0,0 +1,82 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform HAL stub support for MN10300/stdeval1 boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. +extern void hal_stdeval1_init_serial( void ); +extern int hal_stdeval1_get_char( void ); +extern void hal_stdeval1_put_char( int c ); +extern int hal_stdeval1_interruptible(int state); +extern void hal_stdeval1_init_break_irq( void ); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_stdeval1_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_stdeval1_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_stdeval1_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_stdeval1_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() hal_stdeval1_init_break_irq() + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/mn10300/stdeval1/current/src/PKGconf.mak b/packages/hal/mn10300/stdeval1/current/src/PKGconf.mak --- a/packages/hal/mn10300/stdeval1/current/src/PKGconf.mak +++ b/packages/hal/mn10300/stdeval1/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -33,24 +33,12 @@ PACKAGE := hal_mn10300_stdeval1 include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_diag.c stdeval1.S +COMPILE := hal_diag.c stdeval1.S plf_stub.c OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src -.PHONY: ldscript.clean -ldscript.stamp: stdeval1.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - diff --git a/packages/hal/mn10300/stdeval1/current/src/hal_diag.c b/packages/hal/mn10300/stdeval1/current/src/hal_diag.c --- a/packages/hal/mn10300/stdeval1/current/src/hal_diag.c +++ b/packages/hal/mn10300/stdeval1/current/src/hal_diag.c @@ -1,8 +1,8 @@ /*============================================================================= // -// hal_diag.c +// hal_diag.c // -// HAL diagnostic output code +// HAL diagnostic output code // //============================================================================= //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 // Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. +// Description: Implementations of HAL diagnostic output support. // //####DESCRIPTIONEND#### // @@ -412,14 +412,13 @@ void hal_diag_write_char(char c) if( c == '\n' || pos == sizeof(line) ) { - CYG_INTERRUPT_STATE old; - // Disable interrupts. This prevents GDB trying to interrupt us // while we are in the middle of sending a packet. The serial // receive interrupt will be seen when we re-enable interrupts // later. - - HAL_DISABLE_INTERRUPTS(old); + + CYG_INTERRUPT_STATE oldstate; + HAL_DISABLE_INTERRUPTS(oldstate); while(1) { @@ -452,7 +451,7 @@ void hal_diag_write_char(char c) // We must ack the interrupt caused by that read to avoid // confusing the GDB stub ROM. - HAL_INTERRUPT_ACKNOWLEDGE( CYG_VECTOR_EXTERNAL_2 ); + HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_EXTERNAL_2 ); if( c1 == '+' ) break; @@ -487,7 +486,7 @@ void hal_diag_write_char(char c) hal_diag_drain_serial(); // And re-enable interrupts - HAL_RESTORE_INTERRUPTS(old); + HAL_RESTORE_INTERRUPTS(oldstate); } diff --git a/packages/hal/mn10300/stdeval1/current/src/plf_stub.c b/packages/hal/mn10300/stdeval1/current/src/plf_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/src/plf_stub.c @@ -0,0 +1,175 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, jskov (based on the old mn10300 hal_stub.c) +// Contributors:nickg, jskov +// Date: 1999-02-12 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +#include // HAL IO macros +#include // HAL interrupt macros + +//--------------------------------------------------------------------------- +// MN10300 Serial line +// We use serial1 on MN103002 +#define SERIAL1_CR ((volatile cyg_uint16 *)0x34000810) +#define SERIAL1_ICR ((volatile cyg_uint8 *) 0x34000814) +#define SERIAL1_TXR ((volatile cyg_uint8 *) 0x34000818) +#define SERIAL1_RXR ((volatile cyg_uint8 *) 0x34000819) +#define SERIAL1_SR ((volatile cyg_uint16 *)0x3400081c) + +// Timer 1 provided baud rate divisor +#define TIMER1_MD ((volatile cyg_uint8 *)0x34001001) +#define TIMER1_BR ((volatile cyg_uint8 *)0x34001011) +#define TIMER1_CR ((volatile cyg_uint8 *)0x34001021) + +#define PORT3_MD ((volatile cyg_uint8 *)0x36008025) + +// Mystery register +#define TMPSCNT ((volatile cyg_uint8 *)0x34001071) + +#define SIO1_LSTAT_TRDY 0x20 +#define SIO1_LSTAT_RRDY 0x10 + + +//--------------------------------------------------------------------------- + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +// This ISR is called from the interrupt handler. This should only +// happen when there is no serial driver, so the code shouldn't mess +// anything up. +int cyg_hal_gdb_isr(cyg_uint32 vector, target_register_t pc) +{ + if ( CYGNUM_HAL_INTERRUPT_SERIAL_1_RX == vector ) { + cyg_uint8 c; + + HAL_READ_UINT8 (SERIAL1_RXR, c); + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX); + if( 3 == c ) + { + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (pc); + + // Interrupt handled. Don't call ISR proper. At return + // from the VSR, execution will stop at the breakpoint + // just set. + return 0; + } + } + + // Not caused by GDB. Call ISR proper. + return 1; +} + +int hal_stdeval1_interruptible(int state) +{ + if (state) { + HAL_WRITE_UINT8 (SERIAL1_ICR, 0); + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX) + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX) + } else { + HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX) + } + return 0; +} + +void hal_stdeval1_init_break_irq( void ) +{ + // Enable serial receive interrupts. + HAL_WRITE_UINT8 (SERIAL1_ICR, 0); + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX) + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_1_RX) + HAL_ENABLE_INTERRUPTS(); +} +#endif + +// Initialize the current serial port. +void hal_stdeval1_init_serial( void ) +{ + // 48 translates to 38400 baud. + HAL_WRITE_UINT8 (TIMER1_BR, 48); + + // Timer1 sourced from IOCLK + HAL_WRITE_UINT8 (TIMER1_MD, 0x80); + + // Mode on PORT3, used for serial line controls. + HAL_WRITE_UINT8 (PORT3_MD, 0x01); + + // No interrupts for now. + HAL_WRITE_UINT8 (SERIAL1_ICR, 0x00); + + // Source from timer 1, 8bit chars, enable tx and rx + HAL_WRITE_UINT16 (SERIAL1_CR, 0xc084); +} + +// Write C to the current serial port. +void hal_stdeval1_put_char( int c ) +{ + cyg_uint16 sr; + + do { + HAL_READ_UINT16 (SERIAL1_SR, sr); + } while ((sr & SIO1_LSTAT_TRDY) != 0); + + HAL_WRITE_UINT8 (SERIAL1_TXR, c); +} + +// Read one character from the current serial port. +int hal_stdeval1_get_char( void ) +{ + char c; + cyg_uint16 sr; + + do { + HAL_READ_UINT16 (SERIAL1_SR, sr); + } while ((sr & SIO1_LSTAT_RRDY) == 0); + + HAL_READ_UINT8 (SERIAL1_RXR, c); + + return c; +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/mn10300/stdeval1/current/src/stdeval1.S b/packages/hal/mn10300/stdeval1/current/src/stdeval1.S --- a/packages/hal/mn10300/stdeval1/current/src/stdeval1.S +++ b/packages/hal/mn10300/stdeval1/current/src/stdeval1.S @@ -0,0 +1,40 @@ +##============================================================================= +## +## stdeval1.S +## +## +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors: nickg +## Date: +## Purpose: +## Description: +## +## +######DESCRIPTIONEND#### + diff --git a/packages/hal/mn10300/stdeval1/current/src/stdeval1.ld b/packages/hal/mn10300/stdeval1/current/src/stdeval1.ld deleted file mode 100644 --- a/packages/hal/mn10300/stdeval1/current/src/stdeval1.ld +++ /dev/null @@ -1,121 +0,0 @@ -STARTUP(vectors.o) -ENTRY(reset_vector) - -GROUP(libtarget.a libgcc.a) - -#include - -#ifdef CYG_HAL_STARTUP_ROM -#define LOAD_BASE 0x40000000 -#define DATA_BASE 0x48000000 -#define VSR_BASE -#endif -#ifdef CYG_HAL_STARTUP_RAM -# define LOAD_BASE 0x48008000 -# define DATA_BASE -# define VSR_BASE 0x48000000 -#endif - - -SECTIONS -{ - - /* Start of ROM */ - . = LOAD_BASE; - - .rom_vectors : - { - KEEP(*(.vectors)) - } - - .text : - { - _stext = .; - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - *(.init) - - } - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } - .rodata : { *(.rodata*) } - .rodata1 : { *(.rodata1) } - .fixup : { *(.fixup) } - .gcc_except_table : { *(.gcc_except_table) } - -/* __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); */ - __rom_data_start = ALIGN(4); - .data DATA_BASE : - AT( __rom_data_start ) - { - __ram_data_start = .; - *(.data*) - *(.data1) - _GOT1_START_ = .; - *(.got1) - _GOT1_END_ = .; - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. */ - _GOT2_START_ = .; - *(.got2) - _GOT2_END_ = .; - . = ALIGN(4); -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - __CTOR_LIST__ = .; - KEEP(*(SORT(.ctors*))) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - KEEP(*(SORT(.dtors*))) - __DTOR_END__ = .; -#else - __CTOR_LIST__ = .; - *sched.o(.ctors*) - *clock.o(.ctors*) - *thread.o(.ctors*) - *(.ctors*) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - *(.dtors) - __DTOR_END__ = .; -#endif - _GOT_START_ = .; - _GLOBAL_OFFSET_TABLE_ = . + 32768; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - _GOT_END_ = .; - *(.dynamic) - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - *(.sdata*) - *(.sbss*) - } - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - . = ALIGN(4); - __bss_start = .; - .bss : - { - *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - -} - -_mn10300_interrupt_control = 0x34000100; -_mn10300_interrupt_vectors = 0x20000000; - -#ifdef CYG_HAL_STARTUP_RAM -_hal_vsr_table = VSR_BASE; -_hal_virtual_vector_table = VSR_BASE+0x80; -#endif diff --git a/packages/hal/mn10300/stdeval1/current/tests/PKGconf.mak b/packages/hal/mn10300/stdeval1/current/tests/PKGconf.mak --- a/packages/hal/mn10300/stdeval1/current/tests/PKGconf.mak +++ b/packages/hal/mn10300/stdeval1/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/arch/current/ChangeLog b/packages/hal/powerpc/arch/current/ChangeLog --- a/packages/hal/powerpc/arch/current/ChangeLog +++ b/packages/hal/powerpc/arch/current/ChangeLog @@ -1,3 +1,647 @@ +1999-04-19 Jesper Skov + PR 19861 + * src/vectors.S (_start): Rewrote the hal_zero_bss code in + assembly. When compiling with -O0 the C function accesses the + previous stack frame upon return, causing a crash. + +1999-04-15 Jonathan Larmour + + * src/powerpc.ld: Define __bss_start/__bss_end around the BSS, and + __sbss_start/__sbss_end around the SBSS + * src/vectors.S (_start): Call C function to clear BSS. + * src/hal_misc.c (hal_zero_bss): Use __bss_end rather than _end when + clearing BSS. Clear SBSS similarly but separately since the MLT + may have them in non-contiguous parts of memory. + + These fix PR 19750 + +1999-04-14 Jesper Skov + + * include/hal_cache.h: Added HAL_xCACHE_IS_ENABLED macros. + +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script + +1999-04-09 Jesper Skov + + * src/ppc_stub.c: + Moved get_register and put_register to hal_stub.c. + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-04-07 Gary Thomas + + * include/hal_arch.h (CYGNUM_HAL_STACK_SIZE_xxx): Increase to more + realistic values. PR 19748. + +1999-03-31 Jesper Skov + PR 19741 + * src/vectors.S: + * src/ppc_stub.c (__computeSignal): + Added some comments about the use of MSR/SRR1. Masked out reserved + bits of MSR before restoring it. + +1999-03-23 Jesper Skov + + * include/hal_arch.h: Added stack values. + +1999-03-22 Jonathan Larmour + + * include/ppc_stub.h: Update copyright + + * src/ppc_stub.c: Update copyright + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-22 Jesper Skov + + * tests/intr0.c: + * include/ppc.inc: + * include/hal_arch.h: + Cleaned up some FIX MEs. + +1999-03-18 Jesper Skov + + * include/ppc.inc: Removed exception safety margin. + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-16 Jesper Skov + + * src/hal_misc.c: Moved extern declarations out of function body + to avoid compiler warnings. + +1999-03-12 Jesper Skov + + * include/hal_arch.h (CYGNUM_HAL_MINIMUM_STACK_SIZE): Increased to + 2kB for safety. + + * include/ppc.inc: Reduced exception stack frame safety gap + to 64 bytes. + +1999-03-12 Gary Thomas + + * include/hal_arch.h (CYGNUM_HAL_MINIMUM_STACK_SIZE): + Added HAL stack size definition. + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_IN_USE): Added. + +1999-03-08 Nick Garnett + + * src/powerpc.ld: + Added alignment before definition of __DEVTAB__. + +1999-03-08 Jesper Skov + + * include/hal_intr.h: Removed workaround. + +1999-03-05 Jesper Skov + + * include/hal_intr.h (cyg_hal_interrupt_set_level): Disable this + function as a temporary workaround to PR 19400. + +1999-03-05 Gary Thomas + + * src/PKGconf.mak: + * src/powerpc.ld: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/powerpc.ld: + Add INPUT(libextras.a), add libextras.a to GROUP() and include + new section for device driver table + +1999-02-26 Jesper Skov + + * include/hal_intr.h: Removed FIX ME. + +1999-02-26 Jesper Skov + + * include/hal_intr.h: + * src/ppc_stub.c (__computeSignal): + Renamed CYGNUM_HAL_HWVECTOR_DECREMENTER to + CYGNUM_HAL_VECTOR_DECREMENTER. + +1999-02-25 Nick Garnett + + * src/vectors.S: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + +1999-02-23 Jesper Skov + + * src/ppc_stub.c (__computeSignal): Renamed + CYGNUM_HAL_VECTOR_DECREMENTER to CYGNUM_HAL_HWVECTOR_DECREMENTER. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception() -> cyg_hal_deliver_exception() + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + Add decoded exception vectors (decoded from PROGRAM exception) + QA improvements + + * include/ppc_regs.h: + Add defines for access to SRR0 and SRR1 registers + + * src/hal_intr.c: + Rename CYG_VECTOR_* according to hal_intr.h changes above + QA improvements + + * src/hal_misc.c: + Decode PROGRAM vector using SSR1 register + QA improvements + + * src/ppc_stub.c: + Rename CYG_VECTOR_* according to hal_intr.h changes above + + * src/quicc_smc.c: + Add a FIX ME + + * src/vectors.S: + Rename exception_handler -> cyg_hal_exception_handler + + * tests/intr0.c: + Rename CYG_VECTOR_* -> CYGNUM_HAL_INTERRUPT_* due to hal_intr.h + changes above + +1999-02-17 Jesper Skov + + * src/ppc_stub.c (__computeSignal): Moved special GDB signal + handling to generic-stub.c. + +1999-02-17 Jesper Skov + + * src/hal_misc.c (hal_default_isr): Always print out vector number + in hal_default_interrupt. + +1999-02-16 Jesper Skov + + * src/vectors.S: Changed set_debug_traps to initialize_stub. + + * src/ppc_stub.c: + * include/ppc_stub.h: + Cleaned up to only include arch specific stub code. + +1999-02-05 Jesper Skov + + * src/ppc_stub.c: + * src/hal_misc.c: + * src/hal_intr.c: + * src/vectors.S: + * include/ppc_regs.h: + * include/hal_intr.h: + * include/hal_cache.h: + Cleaned up the MPC823/850 code. + +1999-02-05 Jesper Skov + + * include/hal_intr.h (HAL_CLOCK_LATENCY): Return 0 when the result + is due to a bogus timer interrupt. + +1999-02-05 John Dallaway + + * src/powerpc.ld: Add LMA_EQ_VMA macro definition. + +1999-01-29 Jesper Skov + + * src/hal_misc.c: + * src/ppc_stub.c: + * src/vectors.S: + * include/ppc_regs.h: + * include/hal_intr.h: + * include/hal_cache.h: + Added MPC823/850 support. Some of it needs cleaning up a bit. + +1999-01-22 Jesper Skov + PR 18879 + * include/quicc_smc.h: + * src/quicc_smc.c: + Fix compiler warnings. + +1999-01-22 Jesper Skov + + * include/quicc_smc.h: + * src/ppc_860.h: + * src/quicc_smc.c: + Added UNSUPPORTED headers. + +1999-01-21 Jonathan Larmour + + * src/hal_misc.c (cyg_hal_invoke_constructors): + Add code to deal with CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + Tidy up and update description header + Shorten needlessly long lines + + * src/vectors.S: + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + Tidy up and update description header + Shorten needlessly long lines + +1999-01-21 Jesper Skov + Merge with FADS branch. + + 1998-12-17 Jesper Skov + + * src/ppc_860.h: Added as private header. + + * src/PKGconf.mak (COMPILE): Added quicc_smc.c. + + * include/quicc_smc.h: Prefix exported names with cyg_. + + * src/quicc_smc.c: Use ppc_860.h as a private header. + Made all but the necessary functions static. Prefixed the rest + with cyg_. + Moved the RS232 interface enabling here from hal_diag since it + is apparently required by both hal_stub and hal_diag. + +1999-01-20 Jesper Skov + + * src/powerpc.ld (SECTION_bss): Added align statement. + +1999-01-20 Jesper Skov + + * src/vectors.S: Changed _STUB to _STUBS. + +1999-01-19 Jesper Skov + + * src/vectors.S: + * src/hal_misc.c (hal_enable_caches): + Also support HAL_STARTUP_STUB. + +1999-01-15 Jesper Skov + + * src/hal_misc.c: + * src/hal_intr.c: + Move external declarations out of functions. + +1999-01-14 Jesper Skov + + * src/vectors.S (_start): Copy data to RAM before calling C + functions (or "don't initialize the MMU with random data"). + + * src/hal_misc.c: ROM is cache inhibited. + +1999-01-13 Gary Thomas + + * include/basetype.h: CYG_DOUBLE_BYTEORDER now in + +1999-01-12 Gary Thomas + + * include/basetype.h (CYG_DOUBLE_BYTEORDER): Define ordering + for words within double. + +1999-01-11 Jesper Skov + + * include/hal_io.h: Fixed indentation. + +1999-01-05 Jesper Skov + + * include/hal_intr.h (HAL_CLOCK_RESET): Undid below change; + doesn't always work. + +1998-12-15 Jesper Skov + + * include/hal_intr.h (HAL_CLOCK_RESET): Add rather than store to + avoid wall-clock drift. + +1998-12-11 Jesper Skov + + * src/vectors.S: Cleaned up code to use r14/r15 during + interrupt/exception handling, which is necessary to support + -msdata. + Put hal tables in sdata section when smaller than threshold. + +1998-12-11 Jesper Skov + + * include/hal_cache.h: Defined three more macros. + +1998-12-10 Jesper Skov + + * include/hal_cache.h: Defined three more macros. + +1998-12-10 Jesper Skov + + * src/vectors.S: Make the program exception jump to ROM if no GDB + stub was configured. + +1998-12-10 Jesper Skov + + * include/hal_cache.h: Added HAL_ICACHE_UNLOCK_ALL and + HAL_DCACHE_UNLOCK_ALL for sim (unused). + +1998-12-10 Jesper Skov + + * include/hal_cache.h: Defined cache locking macros. Changed + invalidate macros not to unlock. + + * include/ppc_regs.h: Added some instruction cache definitions. + + * src/hal_misc.c (hal_enable_caches): Unlock caches before + invalidating. + +1998-12-09 Jesper Skov + + * src/hal_misc.c (hal_enable_caches): Don't enable caches when + configured for ROM. + +1998-12-09 Jesper Skov + + * include/ppc_regs.h: TBx_W are SPR registers. + + * src/vectors.S (_init_CPU, _start): Added a few sync instructions. + +1998-12-08 Jesper Skov + + * include/ppc_regs.h (CYGARC_REG_IMM_OR_CSNT): Fixed typo. + +1998-12-08 Jesper Skov + + * include/ppc_regs.h: Added more definitions. + +1998-12-07 Jesper Skov + + * src/vectors.S (_init_CPU): Proper solution to the problem of + MMU/cache initialization. + +1998-12-07 Jesper Skov + + * src/vectors.S (_start): Map RAM before accessing it. Only + disable MMU just before (re)programming it. + +1998-12-04 Jesper Skov + + * src/hal_intr.c: + * src/hal_intr.cxx: + * src/PKGconf.mak: + Renamed hal_intr.cxx to hal_intr.c. + +1998-12-04 Jesper Skov + + * tests/intr0.c: Improved somewhat. Also fixes PR 18440. + + * src/hal_intr.cxx: + * src/PKGconf.mak: + Added hal_intr.cxx. + + * include/ppc_regs.h: More register definitions. + + * include/hal_intr.h: Handle decrementer in HAL_INTERRUPT_ mask + and configure macros. + Added declarations for interrupt arbiters. + +1998-12-02 Jesper Skov + PR 18425 + + * src/vectors.S: + * include/ppc_regs.h: + * include/hal_intr.h: + Prefixed remaining definitions used by hal_intr.h. + + * include/hal_intr.h: + Added more definitions. Fixed wrong TBx_R values. + +1998-12-01 Jesper Skov + + * tests/PKGconf.mak: + * tests/intr0.c: + First simple test of 860 specific interrupt handling. + + * src/vectors.S (__default_interrupt_vsr): Don't shift decoded + vector number. + + * src/hal_misc.c (hal_clear_MMU): Added. + (hal_MMU_init): Call hal_clear_MMU to ensure a sane MMU state. + + * include/ppc_regs.h: Added even more definitions. + + * include/hal_intr.h: Fixed interrupt functions to deal with + interleaved IRQ/LVL vectors. + +1998-11-30 Jesper Skov + + * src/vectors.S (__default_interrupt_vsr): Always call + cyg_hal_gdb_isr when GDB_BREAK support is enabled. + Added comment about nesting. + +1998-11-30 Jesper Skov + + * include/ppc_regs.h: Added a few more definitions. + + * src/vectors.S (decode_interrupt): Added 1st level arbitration + for MPC860. + + * include/hal_intr.h: Added (properly ordered) LVL vectors. + Changed if/else to switch/case. + Added configuration of priorities/level. + +1998-11-30 Jesper Skov + + * src/vectors.S (decode_interrupt): Update the vector in the state + frame. + +1998-11-27 Jesper Skov + + * include/ppc_regs.h: Added more 860 IMM registers. + + * include/hal_io.h: Changed HAL_IO_BARRIER so it can be used from + C++. + + * include/hal_intr.h: First part of 860 interrupt controller + support. + + * src/vectors.S: + * include/hal_intr.h: + Exchanged extern and decrementer interrupt ISR vectors to allow + more sensible extension. + +1998-11-27 Jesper Skov + + * src/hal_misc.c: The memory map descriptor table is now weakly + defined so applications can override it. + +1998-11-26 Jesper Skov + + * include/ppc_regs.h: + * src/hal_misc.c (hal_map_memory): + Added handling of Guarded attribute. + +1998-11-26 Jesper Skov + + * include/hal_arch.h: Added definition for magic constant. + +1998-11-26 Jesper Skov + + * src/vectors.S: + * include/hal_arch.h: + * include/ppc.inc: + Moved SPR definitions to ppc_regs.h. + +1998-11-26 Jesper Skov + + * src/vectors.S: + * src/ppc_stub.c: + * src/hal_misc.c: + Changes due to ppc_regs.h cleanup. + + * src/ppc_stub.h: Added convenience definition for SP register. + + * include/ppc_regs.h: Got rid of GDB register definitions. + Cleaned up a bit. + + * include/ppc_regs.h: + * include/hal_cache.h: + Prefixed register names with CYGARC_REG_ to avoid name space + pollution. + + * include/hal_arch.h: + * src/context.S: + Replaced magic constants in jmpbuf with defines. + +1998-11-25 Jesper Skov + + * src/vectors.S (__start): Got rid of a few magic constants. + + * include/hal_intr.h (HAL_CLOCK_INITIALIZE, + HAL_CLOCK_RESET): Cleaned up a bit. + + * include/ppc_regs.h: Added DC_ADR_ and TBU/TBL macros. + + * include/hal_cache.h: Got rid of a few magic constants. + Changed types in cyg_memdesc_t. + * src/hal_misc.c (hal_map_memory): Changed argument types. + + * include/hal_arch.h: Changed a few comments. + +1998-11-23 Jesper Skov + + * src/vectors.S: Cleaned up CYG_MSR definition. + + * src/hal_misc.c (mem_map): Added mapping for SIM. + (hal_map_memory): Added 603 BAT mapping. + + * include/ppc_regs.h: Added definitions for BATs. + +1998-11-19 Jesper Skov + + * include/ppc_regs.h: + * include/hal_cache.h: + Use operand constants to pass macro values to assembly code. + +1998-11-18 Jesper Skov + + * src/context.S: + * include/ppc.inc: + * include/hal_arch.h: + Improved GDB thread info output by making a context switch frame + look like an exception/interrupt frame. + +1998-11-18 Gary Thomas + + * include/hal_intr.h: Add support for interrupt latency + measurements, controlled by CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY. + +1998-11-18 Jesper Skov + + * include/ppc.inc: Renamed CYG_HAL_POWERPC_MP860 to + CYG_HAL_POWERPC_MPC860. + +1998-11-17 Jesper Skov + + * hal/powerpc/arch/current/include/hal_cache.h + * hal/powerpc/arch/current/include/hal_intr.h + * hal/powerpc/arch/current/include/ppc_regs.h + * hal/powerpc/arch/current/src/hal_misc.c + * hal/powerpc/arch/current/src/ppc_stub.c + * hal/powerpc/arch/current/src/vectors.S + Renamed CYG_HAL_POWERPC_MP860 to CYG_HAL_POWERPC_MPC860. + +1998-11-16 Jesper Skov + + * src/vectors.S: + * include/hal_intr.h: + Added vector translation. + + * src/vectors.S: Use r14 instead of r15 in interrupt handler. + +1998-11-09 Jesper Skov + + * include/hal_cache.h: Added memory mapping structure. + + * src/hal_misc.c (hal_MMU_init): Cleaned up memory mapping. + +1998-11-09 Jesper Skov + + * src/hal_misc.c (hal_enable_caches): Also disable serialization. + + * include/ppc_regs.h: Added more register definitions. + +1998-11-06 Jesper Skov + + * src/vectors.S: Don't enable MMU when target is SIM. Caches are + not used anyway, and there's a serious performance hit. + (added comment). + +1998-11-04 Jesper Skov + + * include/hal_cache.h: Proper separation of SIM and MPC860 cache + defines. + +1998-11-04 Jesper Skov + + * src/ppc_stub.c (cyg_hal_gdb_interrupt, + cyg_hal_gdb_remove_break): Add cache flushes after fiddling with + the program data. + + * src/vectors.S (__default_interrupt_vsr, + __default_exception_vsr): Enable MMU on entry. + +1998-11-04 Jesper Skov + + * src/vectors.S: Make calls to MMU init function and cache + enabling function. Enable MMU. + + * src/hal_misc.c (hal_map_memory, hal_MMU_init, + hal_enable_caches): Added. + + * include/ppc_regs.h: Added MMU register definitions. + + * include/hal_cache.h: Enabled cache macros and made them work + properly. + +1998-11-02 Jesper Skov + + * include/ppc_stub.h: + * src/ppc_stub.c (cyg_hal_gdb_interrupt, + cyg_hal_gdb_remove_break): New names for the new GDB BREAK support + functions. + +1998-11-02 Jesper Skov + + * src/vectors.S (__default_interrupt_vsr): Fill r15 before doing + cyg_hal_gdb_isr call, or it might be skipped. + cyg_hal_gdb_isr now takes PC as first argument. + + * src/ppc_stub.c: + * src/ppc_stub.h: + Added proper GDB interrupt support. + 1998-10-27 Jesper Skov * src/vectors.S: Also save registers 13-15 in minimum context for @@ -416,7 +1060,7 @@ Mon Aug 17 16:23:46 1998 Jesper Skov < // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/arch/current/include/basetype.h b/packages/hal/powerpc/arch/current/include/basetype.h --- a/packages/hal/powerpc/arch/current/include/basetype.h +++ b/packages/hal/powerpc/arch/current/include/basetype.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/arch/current/include/hal_arch.h b/packages/hal/powerpc/arch/current/include/hal_arch.h --- a/packages/hal/powerpc/arch/current/include/hal_arch.h +++ b/packages/hal/powerpc/arch/current/include/hal_arch.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -43,6 +43,7 @@ // //============================================================================= +#include #include //----------------------------------------------------------------------------- @@ -59,10 +60,13 @@ typedef struct cyg_uint32 lr; // Link Reg cyg_uint32 ctr; // Count Reg + // These are saved for exceptions and interrupts, but may also + // be saved in a context switch if thread-aware debugging is enabled. + cyg_uint32 msr; // Machine State Reg + cyg_uint32 pc; // Program Counter + // These are only saved for exceptions and interrupts cyg_uint32 vector; // Vector number - cyg_uint32 msr; // Machine State Reg - cyg_uint32 pc; // Program Counter // These are only saved for exceptions, and are not restored // when continued. @@ -71,8 +75,7 @@ typedef struct cyg_uint32 dsisr; // DSISR cyg_uint32 pvr; // Processor Version - // maybe add BATs, and SRs too - // maybe also add FP registers + // Eventually add BATs, SRs and FP registers too. } HAL_SavedRegisters; //----------------------------------------------------------------------------- @@ -82,7 +85,7 @@ typedef struct // not want to deal with itself. It usually invokes the kernel's exception // delivery mechanism. -externC void deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); //----------------------------------------------------------------------------- // Bit manipulation macros @@ -101,28 +104,33 @@ externC void deliver_exception( CYG_WORD asm ( "cntlzw %1,%0" : "=r" (mask) : "r" (index) ); //----------------------------------------------------------------------------- +// eABI +#define CYGARC_PPC_STACK_FRAME_SIZE 56 // size of a stack frame + +//----------------------------------------------------------------------------- // Context Initialization // Initialize the context of a thread. // Arguments: -// _sp_ name of variable containing current sp, will be written with new sp +// _sparg_ name of variable containing current sp, will be written with new sp // _thread_ thread object address, passed as argument to entry point // _entry_ entry point address. // _id_ bit pattern used in initializing registers, for debugging. -#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ - CYG_MACRO_START \ - register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ - register HAL_SavedRegisters *_regs_; \ - int _i_; \ - _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \ - for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ - (_regs_)->d[01] = (CYG_WORD)(_sp_); /* SP = top of stack */ \ - (_regs_)->d[03] = (CYG_WORD)(_thread_); /* R3 = arg1 = thread ptr */ \ - (_regs_)->cr = 0; /* CR = 0 */ \ - (_regs_)->xer = 0; /* XER = 0 */ \ - (_regs_)->lr = (CYG_WORD)(_entry_); /* LR = entry point */ \ - (_regs_)->ctr = 0; /* CTR = 0 */ \ - _sparg_ = (CYG_ADDRESS)_regs_; \ +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ + CYG_MACRO_START \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-CYGARC_PPC_STACK_FRAME_SIZE; \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \ + for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[01] = (CYG_WORD)(_sp_); /* SP = top of stack */ \ + (_regs_)->d[03] = (CYG_WORD)(_thread_); /* R3 = arg1 = thread ptr */ \ + (_regs_)->cr = 0; /* CR = 0 */ \ + (_regs_)->xer = 0; /* XER = 0 */ \ + (_regs_)->lr = (CYG_WORD)(_entry_); /* LR = entry point */ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* set PC for thread dbg */ \ + (_regs_)->ctr = 0; /* CTR = 0 */ \ + _sparg_ = (CYG_ADDRESS)_regs_; \ CYG_MACRO_END //----------------------------------------------------------------------------- @@ -211,15 +219,40 @@ asm volatile (" .globl " #_label_ ";" //----------------------------------------------------------------------------- // HAL setjmp +// Note: These definitions are repeated in context.S. If changes are required +// remember to update both sets. -#define HAL_JMP_BUF_SIZE 23 +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_R2 1 +#define CYGARC_JMP_BUF_R13 2 +#define CYGARC_JMP_BUF_R14 3 +#define CYGARC_JMP_BUF_R15 4 +#define CYGARC_JMP_BUF_R16 5 +#define CYGARC_JMP_BUF_R17 6 +#define CYGARC_JMP_BUF_R18 7 +#define CYGARC_JMP_BUF_R19 8 +#define CYGARC_JMP_BUF_R20 9 +#define CYGARC_JMP_BUF_R21 10 +#define CYGARC_JMP_BUF_R22 11 +#define CYGARC_JMP_BUF_R23 12 +#define CYGARC_JMP_BUF_R24 13 +#define CYGARC_JMP_BUF_R25 14 +#define CYGARC_JMP_BUF_R26 15 +#define CYGARC_JMP_BUF_R27 16 +#define CYGARC_JMP_BUF_R28 17 +#define CYGARC_JMP_BUF_R29 18 +#define CYGARC_JMP_BUF_R30 19 +#define CYGARC_JMP_BUF_R31 20 +#define CYGARC_JMP_BUF_LR 21 +#define CYGARC_JMP_BUF_CR 22 -typedef cyg_uint32 hal_jmp_buf[HAL_JMP_BUF_SIZE]; +#define CYGARC_JMP_BUF_SIZE 23 + +typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE]; externC int hal_setjmp(hal_jmp_buf env); externC void hal_longjmp(hal_jmp_buf env, int val); - //----------------------------------------------------------------------------- // Idle thread code. // This macro is called in the idle thread loop, and gives the HAL the @@ -231,7 +264,63 @@ externC void hal_idle_thread_action(cyg_ #define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) //----------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Stack frame overhead per call. The PPC ABI defines regs 13..31 as callee +// saved. callee saved variables are irrelevant for us as they would contain +// automatic variables, so we only count the caller-saved regs here +// So that makes r0..r12 + cr, xer, lr, ctr: +#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 17) + +// Stack needed for a context switch (ppcref_context_size from ppc.inc) +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 38) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \ + ((43*4 /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +// We have lots of registers so no particular amount is added in for +// typical local variable usage. + +// We define a minimum stack size as the minimum any thread could ever +// legitimately get away with. We can throw asserts if users ask for less +// than this. Allow enough for three interrupt sources - clock, serial and +// one other + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can therefore be much smaller + +# define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (16*CYGNUM_HAL_STACK_FRAME_SIZE + 2*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + +#else + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large +# define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (((2+3)*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + \ + (16*CYGNUM_HAL_STACK_FRAME_SIZE)) +#endif + +// Now make a reasonable choice for a typical thread size. Pluck figures +// from thin air and say 30 call frames with an average of 16 words of +// automatic variables per call frame +#define CYGNUM_HAL_STACK_SIZE_TYPICAL \ + (CYGNUM_HAL_STACK_SIZE_MINIMUM + \ + 30 * (CYGNUM_HAL_STACK_FRAME_SIZE+(16*4))) + +//----------------------------------------------------------------------------- #endif // CYGONCE_HAL_ARCH_H // End of hal_arch.h - - diff --git a/packages/hal/powerpc/arch/current/include/hal_cache.h b/packages/hal/powerpc/arch/current/include/hal_cache.h --- a/packages/hal/powerpc/arch/current/include/hal_cache.h +++ b/packages/hal/powerpc/arch/current/include/hal_cache.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -49,9 +49,22 @@ #include #include + #include //============================================================================= +// Memory mapping +typedef struct { + CYG_ADDRESS virtual_addr; + CYG_ADDRESS physical_addr; + cyg_int32 size; + cyg_uint8 flags; +} cyg_memdesc_t; + +#define CYGARC_MEMDESC_CI 1 // cache inhibit +#define CYGARC_MEMDESC_GUARDED 2 // guarded + +//============================================================================= // PowerPC simulator #ifdef CYG_HAL_POWERPC_SIM @@ -87,6 +100,12 @@ // Synchronize the contents of the cache with memory. #define HAL_DCACHE_SYNC() +// Query the state of the data cache +#define HAL_DCACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + // Set the data cache refill burst size //#define HAL_DCACHE_BURST_SIZE(_size_) @@ -103,6 +122,9 @@ // Undo a previous lock operation //#define HAL_DCACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Data cache line control @@ -146,6 +168,12 @@ // Synchronize the contents of the cache with memory. #define HAL_ICACHE_SYNC() +// Query the state of the instruction cache +#define HAL_ICACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + // Set the instruction cache refill burst size //#define HAL_ICACHE_BURST_SIZE(_size_) @@ -156,23 +184,25 @@ // Undo a previous lock operation //#define HAL_ICACHE_UNLOCK(_base_, _size_) +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + //----------------------------------------------------------------------------- // Instruction cache line control // Invalidate cache lines in the given range without writing to memory. //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) -#endif - //============================================================================= -// Motorola MP860 +// Motorola MPC8xx -#ifdef CYG_HAL_POWERPC_MP860 +#elif defined(CYG_HAL_POWERPC_MPC8xx) //----------------------------------------------------------------------------- // Cache dimensions +#if defined(CYG_HAL_POWERPC_MPC860) // Data cache #define HAL_DCACHE_SIZE 4096 // Size of data cache in bytes #define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line @@ -182,6 +212,19 @@ #define HAL_ICACHE_SIZE 4096 // Size of cache in bytes #define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line #define HAL_ICACHE_WAYS 2 // Associativity of the cache +#endif // defined(CYG_HAL_POWERPC_MPC860) + +#if defined(CYG_HAL_POWERPC_MPC823) || defined(CYG_HAL_POWERPC_MPC850) +// Data cache +#define HAL_DCACHE_SIZE 1024 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line +#define HAL_DCACHE_WAYS 2 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 2048 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line +#define HAL_ICACHE_WAYS 2 // Associativity of the cache +#endif // defined(CYG_HAL_POWERPC_MPC823) || defined(CYG_HAL_POWERPC_MPC850) #define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) #define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) @@ -189,59 +232,52 @@ //----------------------------------------------------------------------------- // Global control of data cache -// FIXME: -// The revision A.2 MPC860 might do all sorts of horrible things to -// the cache contents in a few specific (and unlikely) -// situations. However, as I don't feel like being bitten by these, -// leave caches disabled at all times. -#if 1 -// Enable the data cache -#define HAL_DCACHE_ENABLE() - -// Disable the data cache -#define HAL_DCACHE_DISABLE() - -// Invalidate the entire cache -#define HAL_DCACHE_INVALIDATE_ALL() - -// Synchronize the contents of the cache with memory. -#define HAL_DCACHE_SYNC() -#else // Enable the data cache #define HAL_DCACHE_ENABLE() \ asm volatile ("sync;" \ - "mtspr 568, %0;" /* DC_CST */ \ - : : "r" (DC_CMD_CE)) + "mtspr %0, %1;" \ + : : "I" (CYGARC_REG_DC_CST), "r" (CYGARC_REG_DC_CMD_CE)) // Disable the data cache #define HAL_DCACHE_DISABLE() \ asm volatile ("sync;" \ - "mtspr 568, %0;" /* DC_CST */ \ - : : "r" (DC_CMD_CD)) + "mtspr %0, %1;" \ + : : "I" (CYGARC_REG_DC_CST), "r" (CYGARC_REG_DC_CMD_CD)) // Invalidate the entire cache -#define HAL_DCACHE_INVALIDATE_ALL() \ - asm volatile ("sync;" \ - "mtspr 568, %0;" /* DC_CST */ \ - : : "r" (DC_CMD_IA)) +// Note: Any locked lines will not be invalidated. +#define HAL_DCACHE_INVALIDATE_ALL() \ + asm volatile ("sync;" \ + "mtspr %0, %1;" \ + : : "I" (CYGARC_REG_DC_CST), \ + "r" (CYGARC_REG_DC_CMD_IA)) // Synchronize the contents of the cache with memory. -#define HAL_DCACHE_SYNC() \ - CYG_MACRO_START \ - int i; \ - int cmd = DC_CMD_FL; \ - for (i = 0; i < HAL_DCACHE_SETS; i++){ \ - asm volatile ("sync;" \ - "mtspr 569, %0;" /* DC_ADR */ \ - "mtspr 568, %2;" /* DC_CST */ \ - "mtspr 569, %1;" /* DC_ADR */ \ - "mtspr 568, %2;" /* DC_CST */ \ - : /* no output */ \ - : "r" (i << 4), "r" (0x1000 | (i << 4)), \ - "r" (cmd)); \ - } \ +#define HAL_DCACHE_SYNC() \ + CYG_MACRO_START \ + cyg_int32 i; \ + for (i = 0; i < HAL_DCACHE_SETS; i++){ \ + asm volatile ("sync;" \ + "mtspr %0, %2;" \ + "mtspr %1, %4;" \ + "mtspr %0, %3;" \ + "mtspr %1, %4;" \ + : /* no output */ \ + : /* %0 */ "I" (CYGARC_REG_DC_ADR), \ + /* %1 */ "I" (CYGARC_REG_DC_CST), \ + /* %2 */ "r" (CYGARC_REG_DC_ADR_WAY0 \ + |(i << CYGARC_REG_DC_ADR_SETID_SHIFT)), \ + /* %3 */ "r" (CYGARC_REG_DC_ADR_WAY1 \ + |(i << CYGARC_REG_DC_ADR_SETID_SHIFT)), \ + /* %4 */ "r" (CYGARC_REG_DC_CMD_FL)); \ + } \ CYG_MACRO_END -#endif + +// Query the state of the data cache +#define HAL_DCACHE_IS_ENABLED(_state_) \ + asm volatile ("mfspr %0, %1;" \ + "rlwinm %0,%0,1,31,31;" \ + : "=r" (_state_) : "I" (CYGARC_REG_DC_CST)) // Set the data cache refill burst size //#define HAL_DCACHE_BURST_SIZE(_size_) @@ -252,12 +288,62 @@ //#define HAL_DCACHE_WRITETHRU_MODE 0 //#define HAL_DCACHE_WRITEBACK_MODE 1 -// Load the contents of the given address range into the data cache -// and then lock the cache so that it stays there. -//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. + +// Restrictions: This implementation only allows a single area to be +// locked at any one time. This area must be 2kB or less in size. + +// Implementation: Flush entire cache, then invalidate it. This +// ensures that the fetched data go into way0. +#define HAL_DCACHE_LOCK(_base_, _size_) \ + CYG_MACRO_START \ + cyg_int32 __scratch; \ + cyg_uint32 __base = (cyg_uint32)(_base_); \ + cyg_int32 __l = ((__base / HAL_DCACHE_LINE_SIZE) % HAL_DCACHE_SETS); \ + cyg_int32 __count = ((_size_) / HAL_DCACHE_LINE_SIZE); \ + HAL_DCACHE_DISABLE(); \ + HAL_DCACHE_SYNC (); \ + HAL_DCACHE_INVALIDATE_ALL (); \ + HAL_DCACHE_ENABLE(); \ + do { \ + asm volatile ("lbz %0,0(%1);" \ + "sync;" \ + "mtspr %2, %4;" \ + "mtspr %3, %5;" \ + : /* %0 */ "=r" (__scratch) \ + : /* %1 */ "b" (__base), \ + /* %2 */ "I" (CYGARC_REG_DC_ADR), \ + /* %3 */ "I" (CYGARC_REG_DC_CST), \ + /* %4 */ "r" (CYGARC_REG_DC_ADR_WAY0 \ + |(__l< 0) { \ + asm volatile ("dcbf 0,%0;sync;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END + // Invalidate cache lines in the given range without writing to memory. -//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) +#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) \ + CYG_MACRO_START \ + cyg_uint32 __base = (cyg_uint32) (_base_); \ + cyg_int32 __size = (cyg_int32) (_size_); \ + while (__size > 0) { \ + asm volatile ("dcbi 0,%0;sync;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END // Write dirty cache lines to memory for the given address range. -//#define HAL_DCACHE_STORE( _base_ , _size_ ) +#define HAL_DCACHE_STORE( _base_ , _size_ ) \ + CYG_MACRO_START \ + cyg_uint32 __base = (cyg_uint32) (_base_); \ + cyg_int32 __size = (cyg_int32) (_size_); \ + while (__size > 0) { \ + asm volatile ("dcbst 0,%0;sync;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END // Preread the given range into the cache with the intention of reading // from it later. -//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) +#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) \ + CYG_MACRO_START \ + cyg_uint32 __base = (cyg_uint32) (_base_); \ + cyg_int32 __size = (cyg_int32) (_size_); \ + while (__size > 0) { \ + asm volatile ("dcbt 0,%0;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END // Preread the given range into the cache with the intention of writing // to it later. -//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) +#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) \ + CYG_MACRO_START \ + cyg_uint32 __base = (cyg_uint32) (_base_); \ + cyg_int32 __size = (cyg_int32) (_size_); \ + while (__size > 0) { \ + asm volatile ("dcbtst 0,%0;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END // Allocate and zero the cache lines associated with the given range. -//#define HAL_DCACHE_ZERO( _base_ , _size_ ) +#define HAL_DCACHE_ZERO( _base_ , _size_ ) \ + CYG_MACRO_START \ + cyg_uint32 __base = (cyg_uint32) (_base_); \ + cyg_int32 __size = (cyg_int32) (_size_); \ + while (__size > 0) { \ + asm volatile ("dcbz 0,%0;" : : "r" (__base)); \ + __base += HAL_DCACHE_LINE_SIZE; \ + __size -= HAL_DCACHE_LINE_SIZE; \ + } \ + CYG_MACRO_END //----------------------------------------------------------------------------- // Global control of Instruction cache -// FIXME: -// The revision A.2 MPC860 might do all sorts of horrible things to -// the cache contents in a few specific (and unlikely) -// situations. However, as I don't feel like being bitten by these, -// leave caches disabled at all times. -#if 1 // Enable the instruction cache -#define HAL_ICACHE_ENABLE() +#define HAL_ICACHE_ENABLE() \ + asm volatile ("isync;" \ + "mtspr %0, %1;" \ + "isync" \ + : : "I" (CYGARC_REG_IC_CST), "r" (CYGARC_REG_IC_CMD_CE)) // Disable the instruction cache -#define HAL_ICACHE_DISABLE() +#define HAL_ICACHE_DISABLE() \ + asm volatile ("isync;" \ + "mtspr %0, %1;" \ + "isync" \ + : : "I" (CYGARC_REG_IC_CST), "r" (CYGARC_REG_IC_CMD_CD)) // Invalidate the entire cache -#define HAL_ICACHE_INVALIDATE_ALL() +#define HAL_ICACHE_INVALIDATE_ALL() \ + asm volatile ("isync;" \ + "mtspr %0, %1;" \ + "isync" \ + : : "I" (CYGARC_REG_IC_CST), \ + "r" (CYGARC_REG_IC_CMD_IA)) // Synchronize the contents of the cache with memory. #define HAL_ICACHE_SYNC() -#else -// Enable the instruction cache -#define HAL_ICACHE_ENABLE() \ - asm volatile ("mtspr 560, %0;" /* IC_CST */ \ - "isync" \ - : : "r" (IC_CMD_CE)) -// Disable the instruction cache -#define HAL_ICACHE_DISABLE() \ - asm volatile ("mtspr 560, %0;" /* IC_CST */ \ - "isync" \ - : : "r" (IC_CMD_CD)) - -// Invalidate the entire cache -#define HAL_ICACHE_INVALIDATE_ALL() \ - asm volatile ("mtspr 560, %0;" /* IC_CST */ \ - "isync" \ - : : "r" (IC_CMD_IA)) - -// Synchronize the contents of the cache with memory. -#define HAL_ICACHE_SYNC() -#endif +// Query the state of the instruction cache +#define HAL_ICACHE_IS_ENABLED(_state_) \ + asm volatile ("mfspr %0, %1;" \ + "rlwinm %0,%0,1,31,31;" \ + : "=r" (_state_) : "I" (CYGARC_REG_IC_CST)) // Set the instruction cache refill burst size //#define HAL_ICACHE_BURST_SIZE(_size_) + // Load the contents of the given address range into the instruction cache // and then lock the cache so that it stays there. -//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Restrictions: This implementation only allows a single area to be +// locked at any one time. This area must be 2kB or less in size. + +// Implementation: Flush entire cache, then invalidate it. This +// ensures that the fetched data go into way0. + +#define HAL_ICACHE_LOCK(_base_, _size_) \ + CYG_MACRO_START \ + unsigned long __base = \ + ((unsigned long) (_base_)) & ~(HAL_ICACHE_LINE_SIZE-1); \ + int __count = ((_size_) / HAL_ICACHE_LINE_SIZE); \ + do { \ + asm volatile ("mtspr %0, %2;" \ + "mtspr %1, %3;" \ + "isync;" \ + : /* no output */ \ + : /* %0 */ "I" (CYGARC_REG_IC_ADR), \ + /* %1 */ "I" (CYGARC_REG_IC_CST), \ + /* %2 */ "r" (__base), \ + /* %3 */ "r" (CYGARC_REG_IC_CMD_LL)); \ + __base += HAL_ICACHE_LINE_SIZE; \ + } while (__count--); \ + CYG_MACRO_END // Undo a previous lock operation -//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Implementation: Unlocks entire cache. +#define HAL_ICACHE_UNLOCK(_base_, _size_) \ + HAL_ICACHE_UNLOCK_ALL() + +// Unlock entire cache +#define HAL_ICACHE_UNLOCK_ALL() \ + CYG_MACRO_START \ + asm volatile ("sync;" \ + "mtspr %0, %1;" \ + : : "I" (CYGARC_REG_IC_CST), \ + "r" (CYGARC_REG_IC_CMD_UA)); \ + CYG_MACRO_END //----------------------------------------------------------------------------- // Instruction cache line control diff --git a/packages/hal/powerpc/arch/current/include/hal_intr.h b/packages/hal/powerpc/arch/current/include/hal_intr.h --- a/packages/hal/powerpc/arch/current/include/hal_intr.h +++ b/packages/hal/powerpc/arch/current/include/hal_intr.h @@ -1,13 +1,13 @@ #ifndef CYGONCE_HAL_INTR_H #define CYGONCE_HAL_INTR_H -//============================================================================= +//========================================================================== // // hal_intr.h // // HAL Interrupt and clock support // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -25,118 +25,240 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define Interrupt support -// Description: The macros defined here provide the HAL APIs for handling -// interrupts and the clock. +// Author(s): nickg +// Contributors: nickg, jskov, +// jlarmour +// Date: 1999-02-19 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. // // Usage: -// #include -// ... +// #include +// ... // // //####DESCRIPTIONEND#### // -//============================================================================= +//========================================================================== #include #include -//----------------------------------------------------------------------------- -// PowerPC exception vectors. +#include // register definitions +#include // io macros +#include // CYG_FAIL + +//-------------------------------------------------------------------------- +// PowerPC exception vectors. These correspond to VSRs and are the values +// to use for HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESERVED_0 0 +#define CYGNUM_HAL_VECTOR_RESET 1 +#define CYGNUM_HAL_VECTOR_MACHINE_CHECK 2 +#define CYGNUM_HAL_VECTOR_DSI 3 +#define CYGNUM_HAL_VECTOR_ISI 4 +#define CYGNUM_HAL_VECTOR_INTERRUPT 5 +#define CYGNUM_HAL_VECTOR_ALIGNMENT 6 +#define CYGNUM_HAL_VECTOR_PROGRAM 7 +#define CYGNUM_HAL_VECTOR_FP_UNAVAILABLE 8 +#define CYGNUM_HAL_VECTOR_DECREMENTER 9 +#define CYGNUM_HAL_VECTOR_RESERVED_A 10 +#define CYGNUM_HAL_VECTOR_RESERVED_B 11 +#define CYGNUM_HAL_VECTOR_SYSTEM_CALL 12 +#define CYGNUM_HAL_VECTOR_TRACE 13 +#define CYGNUM_HAL_VECTOR_FP_ASSIST 14 + +#define CYGNUM_HAL_VSR_MIN CYGNUM_HAL_VECTOR_RESERVED_0 +#define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_FP_ASSIST +#define CYGNUM_HAL_VSR_COUNT ( CYGNUM_HAL_VSR_MAX + 1 ) + +// The decoded interrupts. +// Define decrementer as the first interrupt since it is guaranteed to +// be defined on all PowerPCs. External may expand into several interrupts +// depending on interrupt controller capabilities. +#define CYGNUM_HAL_INTERRUPT_DECREMENTER 0 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL 1 + +// CYGNUM_HAL_ISR_COUNT must match CYG_ISR_TABLE_SIZE defined in vectors.S. +#define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_INTERRUPT_DECREMENTER +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_EXTERNAL +#define CYGNUM_HAL_ISR_COUNT ( CYGNUM_HAL_ISR_MAX + 1 ) + +// Exception vectors. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() -#define CYG_VECTOR_RESERVED_0 0 -#define CYG_VECTOR_RESET 1 -#define CYG_VECTOR_MACHINE_CHECK 2 -#define CYG_VECTOR_DSI 3 -#define CYG_VECTOR_ISI 4 -#define CYG_VECTOR_INTERRUPT 5 -#define CYG_VECTOR_ALIGNMENT 6 -#define CYG_VECTOR_PROGRAM 7 -#define CYG_VECTOR_FP_UNAVAILABLE 8 -#define CYG_VECTOR_DECREMENTER 9 -#define CYG_VECTOR_RESERVED_A 10 -#define CYG_VECTOR_RESERVED_B 11 -#define CYG_VECTOR_SYSTEM_CALL 12 -#define CYG_VECTOR_TRACE 13 -#define CYG_VECTOR_FP_ASSIST 14 +#define CYGNUM_HAL_EXCEPTION_RESERVED_0 CYGNUM_HAL_VECTOR_RESERVED_0 +#define CYGNUM_HAL_EXCEPTION_MACHINE_CHECK CYGNUM_HAL_VECTOR_MACHINE_CHECK +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_DSI +#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_ISI +#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \ + CYGNUM_HAL_VECTOR_ALIGNMENT +#define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL CYGNUM_HAL_VECTOR_FP_UNAVAILABLE +#define CYGNUM_HAL_EXCEPTION_RESERVED_A CYGNUM_HAL_VECTOR_RESERVED_A +#define CYGNUM_HAL_EXCEPTION_RESERVED_B CYGNUM_HAL_VECTOR_RESERVED_B +#define CYGNUM_HAL_EXCEPTION_SYSTEM_CALL CYGNUM_HAL_VECTOR_SYSTEM_CALL +#define CYGNUM_HAL_EXCEPTION_TRACE CYGNUM_HAL_VECTOR_TRACE +#define CYGNUM_HAL_EXCEPTION_FP_ASSIST CYGNUM_HAL_VECTOR_FP_ASSIST + +// decoded exception vectors +#define CYGNUM_HAL_EXCEPTION_TRAP (-1) +#define CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION (-2) +#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION (-3) +#define CYGNUM_HAL_EXCEPTION_FPU (-4) + +#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_EXCEPTION_FPU +#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VECTOR_FP_ASSIST +#define CYGNUM_HAL_EXCEPTION_COUNT \ + ( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 ) + + +#ifdef CYG_HAL_POWERPC_MPC8xx +// Additional exceptions on the MPC8xx +#define CYGNUM_HAL_VECTOR_RESERVED_F 15 +#define CYGNUM_HAL_VECTOR_SW_EMUL 16 +#define CYGNUM_HAL_VECTOR_ITLB_MISS 17 +#define CYGNUM_HAL_VECTOR_DTLB_MISS 18 +#define CYGNUM_HAL_VECTOR_ITLB_ERROR 19 +#define CYGNUM_HAL_VECTOR_DTLB_ERROR 20 +#define CYGNUM_HAL_VECTOR_RESERVED_15 21 +#define CYGNUM_HAL_VECTOR_RESERVED_16 22 +#define CYGNUM_HAL_VECTOR_RESERVED_17 23 +#define CYGNUM_HAL_VECTOR_RESERVED_18 24 +#define CYGNUM_HAL_VECTOR_RESERVED_19 25 +#define CYGNUM_HAL_VECTOR_RESERVED_1A 26 +#define CYGNUM_HAL_VECTOR_RESERVED_1B 27 +#define CYGNUM_HAL_VECTOR_DATA_BP 28 +#define CYGNUM_HAL_VECTOR_INSTRUCTION_BP 29 +#define CYGNUM_HAL_VECTOR_PERIPHERAL_BP 30 +#define CYGNUM_HAL_VECTOR_NMI 31 -#ifdef CYG_HAL_POWERPC_MP860 -#define CYG_VECTOR_RESERVED_F 15 -#define CYG_VECTOR_SW_EMUL 16 -#define CYG_VECTOR_ITLB_MISS 17 -#define CYG_VECTOR_DTLB_MISS 18 -#define CYG_VECTOR_ITLB_ERROR 19 -#define CYG_VECTOR_DTLB_ERROR 20 -#define CYG_VECTOR_RESERVED_15 21 -#define CYG_VECTOR_RESERVED_16 22 -#define CYG_VECTOR_RESERVED_17 23 -#define CYG_VECTOR_RESERVED_18 24 -#define CYG_VECTOR_RESERVED_19 25 -#define CYG_VECTOR_RESERVED_1A 26 -#define CYG_VECTOR_RESERVED_1B 27 -#define CYG_VECTOR_DATA_BP 28 -#define CYG_VECTOR_INSTRUCTION_BP 29 -#define CYG_VECTOR_PERIPHERAL_BP 30 -#define CYG_VECTOR_NMI 31 +#define CYGNUM_HAL_EXCEPTION_RESERVED_F CYGNUM_HAL_VECTOR_RESERVED_F +#define CYGNUM_HAL_EXCEPTION_SW_EMUL CYGNUM_HAL_VECTOR_SW_EMUL +#define CYGNUM_HAL_EXCEPTION_CODE_TLBMISS_ACCESS CYGNUM_HAL_VECTOR_ITLB_MISS +#define CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS CYGNUM_HAL_VECTOR_DTLB_MISS +#define CYGNUM_HAL_EXCEPTION_CODE_TLBERROR_ACCESS \ + CYGNUM_HAL_VECTOR_ITLB_ERROR +#define CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_ACCESS \ + CYGNUM_HAL_VECTOR_DTLB_ERROR +#define CYGNUM_HAL_EXCEPTION_RESERVED_15 CYGNUM_HAL_VECTOR_RESERVED_15 +#define CYGNUM_HAL_EXCEPTION_RESERVED_16 CYGNUM_HAL_VECTOR_RESERVED_16 +#define CYGNUM_HAL_EXCEPTION_RESERVED_17 CYGNUM_HAL_VECTOR_RESERVED_17 +#define CYGNUM_HAL_EXCEPTION_RESERVED_18 CYGNUM_HAL_VECTOR_RESERVED_18 +#define CYGNUM_HAL_EXCEPTION_RESERVED_19 CYGNUM_HAL_VECTOR_RESERVED_19 +#define CYGNUM_HAL_EXCEPTION_RESERVED_1A CYGNUM_HAL_VECTOR_RESERVED_1A +#define CYGNUM_HAL_EXCEPTION_RESERVED_1B CYGNUM_HAL_VECTOR_RESERVED_1B +#define CYGNUM_HAL_EXCEPTION_DATA_BP CYGNUM_HAL_VECTOR_DATA_BP +#define CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP CYGNUM_HAL_VECTOR_INSTRUCTION_BP +#define CYGNUM_HAL_EXCEPTION_PERIPHERAL_BP CYGNUM_HAL_VECTOR_PERIPHERAL_BP +#define CYGNUM_HAL_EXCEPTION_NMI CYGNUM_HAL_VECTOR_NMI + +#undef CYGNUM_HAL_EXCEPTION_MAX +#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_EXCEPTION_NMI + +// The first level of external interrupts +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ0 1 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL0 2 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ1 3 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL1 4 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ2 5 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL2 6 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ3 7 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL3 8 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ4 9 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL4 10 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ5 11 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL5 12 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ6 13 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL6 14 +#define CYGNUM_HAL_INTERRUPT_SIU_IRQ7 15 +#define CYGNUM_HAL_INTERRUPT_SIU_LVL7 16 + +// Further decoded interrups +#define CYGNUM_HAL_INTERRUPT_SIU_TB_A 17 +#define CYGNUM_HAL_INTERRUPT_SIU_TB_B 18 +#define CYGNUM_HAL_INTERRUPT_SIU_PIT 19 +#define CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC 20 +#define CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR 21 +#define CYGNUM_HAL_INTERRUPT_SIU_PCMCIA_A_IRQ 22 +#define CYGNUM_HAL_INTERRUPT_SIU_PCMCIA_A_CHLVL 23 +#define CYGNUM_HAL_INTERRUPT_SIU_PCMCIA_B_IRQ 24 +#define CYGNUM_HAL_INTERRUPT_SIU_PCMCIA_B_CHLVL 25 +#define CYGNUM_HAL_INTERRUPT_SIU_CPM 26 + +// Even further... +#define CYGNUM_HAL_INTERRUPT_CPM_PC15 27 +#define CYGNUM_HAL_INTERRUPT_CPM_SCC1 28 +#define CYGNUM_HAL_INTERRUPT_CPM_SCC2 29 +#define CYGNUM_HAL_INTERRUPT_CPM_SCC3 30 +#define CYGNUM_HAL_INTERRUPT_CPM_SCC4 31 +#define CYGNUM_HAL_INTERRUPT_CPM_PC14 32 +#define CYGNUM_HAL_INTERRUPT_CPM_TIMER1 33 +#define CYGNUM_HAL_INTERRUPT_CPM_PC13 34 +#define CYGNUM_HAL_INTERRUPT_CPM_PC12 35 +#define CYGNUM_HAL_INTERRUPT_CPM_SDMA 36 +#define CYGNUM_HAL_INTERRUPT_CPM_IDMA1 37 +#define CYGNUM_HAL_INTERRUPT_CPM_IDMA2 38 +#define CYGNUM_HAL_INTERRUPT_CPM_RESERVED_13 39 +#define CYGNUM_HAL_INTERRUPT_CPM_TIMER2 40 +#define CYGNUM_HAL_INTERRUPT_CPM_RISCTT 41 +#define CYGNUM_HAL_INTERRUPT_CPM_I2C 42 +#define CYGNUM_HAL_INTERRUPT_CPM_PC11 43 +#define CYGNUM_HAL_INTERRUPT_CPM_PC10 44 +#define CYGNUM_HAL_INTERRUPT_CPM_RESERVED_0D 45 +#define CYGNUM_HAL_INTERRUPT_CPM_TIMER3 46 +#define CYGNUM_HAL_INTERRUPT_CPM_PC9 47 +#define CYGNUM_HAL_INTERRUPT_CPM_PC8 48 +#define CYGNUM_HAL_INTERRUPT_CPM_PC7 49 +#define CYGNUM_HAL_INTERRUPT_CPM_RESERVED_08 50 +#define CYGNUM_HAL_INTERRUPT_CPM_TIMER4 51 +#define CYGNUM_HAL_INTERRUPT_CPM_PC6 52 +#define CYGNUM_HAL_INTERRUPT_CPM_SPI 53 +#define CYGNUM_HAL_INTERRUPT_CPM_SMC1 54 +#define CYGNUM_HAL_INTERRUPT_CPM_SMC2_PIP 55 +#define CYGNUM_HAL_INTERRUPT_CPM_PC5 56 +#define CYGNUM_HAL_INTERRUPT_CPM_PC4 57 +#define CYGNUM_HAL_INTERRUPT_CPM_ERROR 58 + +#define CYGNUM_HAL_INTERRUPT_CPM_FIRST CYGNUM_HAL_INTERRUPT_CPM_PC15 +#define CYGNUM_HAL_INTERRUPT_CPM_LAST CYGNUM_HAL_INTERRUPT_CPM_ERROR + +#undef CYGNUM_HAL_ISR_MAX +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_CPM_LAST #endif - - -#define CYG_VSR_MIN 0 -#define CYG_VSR_MAX 14 -#define CYG_VSR_COUNT 15 - -#define CYG_ISR_MIN 0 -#define CYG_ISR_MAX 14 -#define CYG_ISR_COUNT 15 +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_DECREMENTER -#ifdef CYG_HAL_POWERPC_MP860 -#define CYG_EXCEPTION_MIN 0 -#define CYG_EXCEPTION_MAX 31 -#define CYG_EXCEPTION_COUNT 32 -#else -#define CYG_EXCEPTION_MIN 0 -#define CYG_EXCEPTION_MAX 14 -#define CYG_EXCEPTION_COUNT 15 -#endif - - -// The vector used by the Real time clock -#define CYG_VECTOR_RTC CYG_VECTOR_DECREMENTER - -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Static data used by HAL // ISR tables -externC volatile CYG_ADDRESS hal_interrupt_handlers[CYG_ISR_COUNT]; -externC volatile CYG_ADDRWORD hal_interrupt_data[CYG_ISR_COUNT]; -externC volatile CYG_ADDRESS hal_interrupt_objects[CYG_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; +// VSR table +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; -// VSR table -externC volatile CYG_ADDRESS hal_vsr_table[CYG_VSR_COUNT]; - -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Default ISR externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt state storage typedef cyg_uint32 CYG_INTERRUPT_STATE; -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt control macros #define HAL_DISABLE_INTERRUPTS(_old_) \ @@ -191,20 +313,34 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; : "r4" \ ); -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Vector translation. -// Only one vector is available for external interrupts. No translation -// required. + +#ifndef HAL_TRANSLATE_VECTOR +// Basic PowerPC configuration only has two vectors; decrementer and +// external. Isr tables/chaining use same vector decoder. +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ + (_index_) = (_vector_) +#endif -#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_) - +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros -//----------------------------------------------------------------------------- -// Interrupt and VSR attachment macros +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END #define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ CYG_MACRO_START \ - cyg_uint32 _index_ = ((_vector_)>>3)&1; \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ \ if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \ { \ @@ -216,7 +352,8 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ CYG_MACRO_START \ - cyg_uint32 _index_ = ((_vector_)>>3)&1; \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ \ if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \ { \ @@ -237,11 +374,465 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ CYG_MACRO_END -//----------------------------------------------------------------------------- +//-------------------------------------------------------------------------- // Interrupt controller access -// These are not defined since individual interrupts cannot be masked -// without the help of an external interrupt controller. +#ifdef CYG_HAL_POWERPC_MPC860 + +// FIXME: Should probably be put in a separate .inl file?!? + +static __inline__ void +cyg_hal_interrupt_mask ( cyg_uint32 vector ) +{ + switch (vector) { + case CYGNUM_HAL_INTERRUPT_SIU_IRQ0 ... CYGNUM_HAL_INTERRUPT_SIU_LVL7: + { + // SIU interrupt vectors + cyg_uint32 simask; + + HAL_READ_UINT32 (CYGARC_REG_IMM_SIMASK, simask); + simask &= ~(((cyg_uint32) CYGARC_REG_IMM_SIMASK_IRQ0) + >> (vector - CYGNUM_HAL_INTERRUPT_SIU_IRQ0)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_SIMASK, simask); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_A: + { + // TimeBase A interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr &= ~(CYGARC_REG_IMM_TBSCR_REFAE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_B: + { + // TimeBase B interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr &= ~(CYGARC_REG_IMM_TBSCR_REFBE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_PIT: + { + // Periodic Interrupt + cyg_uint16 piscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + piscr &= ~(CYGARC_REG_IMM_PISCR_PIE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC: + { + // Real Time Clock Second + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc &= ~(CYGARC_REG_IMM_RTCSC_SIE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR: + { + // Real Time Clock Alarm + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc &= ~(CYGARC_REG_IMM_RTCSC_ALE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + // PCMCIA_A_IRQ + // PCMCIA_A_CHLVL + // PCMCIA_B_IRQ + // PCMCIA_B_CHLVL + case CYGNUM_HAL_INTERRUPT_SIU_CPM: + { + // Communications Processor Module + cyg_uint16 cicr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr); + cicr &= ~(CYGARC_REG_IMM_CICR_IEN); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr); + break; + } + case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST: + { + // CPM interrupts + cyg_uint32 cimr; + + HAL_READ_UINT32 (CYGARC_REG_IMM_CIMR, cimr); + cimr &= ~(((cyg_uint32) 0x80000000) + >> (vector - CYGNUM_HAL_INTERRUPT_CPM_FIRST)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_CIMR, cimr); + break; + } + default: + CYG_FAIL("Unknown Interrupt!!!"); + break; + } +} + +static __inline__ void +cyg_hal_interrupt_unmask ( cyg_uint32 vector ) +{ + switch (vector) { + case CYGNUM_HAL_INTERRUPT_SIU_IRQ0 ... CYGNUM_HAL_INTERRUPT_SIU_LVL7: + { + // SIU interrupt vectors + cyg_uint32 simask; + + HAL_READ_UINT32 (CYGARC_REG_IMM_SIMASK, simask); + simask |= (((cyg_uint32) CYGARC_REG_IMM_SIMASK_IRQ0) + >> (vector - CYGNUM_HAL_INTERRUPT_SIU_IRQ0)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_SIMASK, simask); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_A: + { + // TimeBase A interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= CYGARC_REG_IMM_TBSCR_REFAE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_B: + { + // TimeBase B interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= CYGARC_REG_IMM_TBSCR_REFBE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_PIT: + { + // Periodic Interrupt + cyg_uint16 piscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + piscr |= CYGARC_REG_IMM_PISCR_PIE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC: + { + // Real Time Clock Second + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc |= CYGARC_REG_IMM_RTCSC_SIE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR: + { + // Real Time Clock Alarm + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc |= CYGARC_REG_IMM_RTCSC_ALE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + // PCMCIA_A_IRQ + // PCMCIA_A_CHLVL + // PCMCIA_B_IRQ + // PCMCIA_B_CHLVL + case CYGNUM_HAL_INTERRUPT_SIU_CPM: + { + // Communications Processor Module + cyg_uint16 cicr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr); + cicr |= CYGARC_REG_IMM_CICR_IEN; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr); + break; + } + case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST: + { + // CPM interrupts + cyg_uint32 cimr; + + HAL_READ_UINT32 (CYGARC_REG_IMM_CIMR, cimr); + cimr |= (((cyg_uint32) 0x80000000) + >> (vector - CYGNUM_HAL_INTERRUPT_CPM_FIRST)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_CIMR, cimr); + break; + } + default: + CYG_FAIL("Unknown Interrupt!!!"); + break; + } +} + +static __inline__ void +cyg_hal_interrupt_acknowledge ( cyg_uint32 vector ) +{ + switch (vector) { + case CYGNUM_HAL_INTERRUPT_SIU_IRQ0 ... CYGNUM_HAL_INTERRUPT_SIU_LVL7: + { + // SIU interrupt vectors + cyg_uint32 sipend; + + // When IRQx is configured as an edge interrupt it needs to be + // cleared. Write to INTx and IRQ/level bits are ignore so + // it's safe to do always. + HAL_READ_UINT32 (CYGARC_REG_IMM_SIPEND, sipend); + sipend |= (((cyg_uint32) CYGARC_REG_IMM_SIPEND_IRQ0) + >> (vector - CYGNUM_HAL_INTERRUPT_SIU_IRQ0)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_SIPEND, sipend); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_A: + { + // TimeBase A interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= CYGARC_REG_IMM_TBSCR_REFA; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_TB_B: + { + // TimeBase B interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= CYGARC_REG_IMM_TBSCR_REFB; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_PIT: + { + // Periodic Interrupt + cyg_uint16 piscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + piscr |= CYGARC_REG_IMM_PISCR_PS; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC: + { + // Real Time Clock Second + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc |= CYGARC_REG_IMM_RTCSC_SEC; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR: + { + // Real Time Clock Alarm + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc |= CYGARC_REG_IMM_RTCSC_ALR; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + // PCMCIA_A_IRQ + // PCMCIA_A_CHLVL + // PCMCIA_B_IRQ + // PCMCIA_B_CHLVL + case CYGNUM_HAL_INTERRUPT_SIU_CPM: + // Communications Processor Module + // The CPM interrupts must be acknowledged individually. + break; + case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST: + { + // CPM interrupts + cyg_uint32 cisr; + + HAL_READ_UINT32 (CYGARC_REG_IMM_CISR, cisr); + cisr |= (((cyg_uint32) 0x80000000) + >> (vector - CYGNUM_HAL_INTERRUPT_CPM_FIRST)); + HAL_WRITE_UINT32 (CYGARC_REG_IMM_CISR, cisr); + break; + } + default: + CYG_FAIL("Unknown Interrupt!!!"); + break; + } +} + +static __inline__ void +cyg_hal_interrupt_configure ( cyg_uint32 vector, + cyg_bool level, + cyg_bool up ) +{ + switch (vector) { + case CYGNUM_HAL_INTERRUPT_SIU_IRQ0: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ1: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ2: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ3: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ4: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ5: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ6: + case CYGNUM_HAL_INTERRUPT_SIU_IRQ7: + { + // External interrupts + cyg_uint32 siel, bit; + + CYG_ASSERT( level || !up, "Only falling edge is supported"); + + bit = (((cyg_uint32) CYGARC_REG_IMM_SIEL_IRQ0) + >> (vector - CYGNUM_HAL_INTERRUPT_SIU_IRQ0)); + + HAL_READ_UINT32 (CYGARC_REG_IMM_SIEL, siel); + siel &= ~bit; + if (!level) { + // Set edge detect bit. + siel |= bit; + } + HAL_WRITE_UINT32 (CYGARC_REG_IMM_SIEL, siel); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_LVL0: + case CYGNUM_HAL_INTERRUPT_SIU_LVL1: + case CYGNUM_HAL_INTERRUPT_SIU_LVL2: + case CYGNUM_HAL_INTERRUPT_SIU_LVL3: + case CYGNUM_HAL_INTERRUPT_SIU_LVL4: + case CYGNUM_HAL_INTERRUPT_SIU_LVL5: + case CYGNUM_HAL_INTERRUPT_SIU_LVL6: + case CYGNUM_HAL_INTERRUPT_SIU_LVL7: + case CYGNUM_HAL_INTERRUPT_SIU_TB_A: + case CYGNUM_HAL_INTERRUPT_SIU_TB_B: + case CYGNUM_HAL_INTERRUPT_SIU_PIT: + case CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC: + case CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR: + // PCMCIA_A_IRQ + // PCMCIA_A_CHLVL + // PCMCIA_B_IRQ + // PCMCIA_B_CHLVL + case CYGNUM_HAL_INTERRUPT_SIU_CPM: + case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST: + // These cannot be configured. + break; + + default: + CYG_FAIL("Unknown Interrupt!!!"); + break; + } +} + +static __inline__ void +cyg_hal_interrupt_set_level ( cyg_uint32 vector, cyg_uint32 level ) +{ + // Note: highest priority has the lowest numerical value. + CYG_ASSERT( level >= CYGARC_SIU_PRIORITY_HIGH, "Invalid priority"); + CYG_ASSERT( level <= CYGARC_SIU_PRIORITY_LOW, "Invalid priority"); + + switch (vector) { + case CYGNUM_HAL_INTERRUPT_SIU_IRQ0 ... CYGNUM_HAL_INTERRUPT_SIU_LVL7: + // These cannot be configured. + break; + case CYGNUM_HAL_INTERRUPT_SIU_TB_A: + case CYGNUM_HAL_INTERRUPT_SIU_TB_B: + { + // TimeBase A+B interrupt + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr &= ~(CYGARC_REG_IMM_TBSCR_IRQMASK); + tbscr |= CYGARC_REG_IMM_TBSCR_IRQ0 >> level; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_PIT: + { + // Periodic Interrupt + cyg_uint16 piscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + piscr &= ~(CYGARC_REG_IMM_PISCR_IRQMASK); + piscr |= CYGARC_REG_IMM_PISCR_IRQ0 >> level; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + break; + } + case CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC: + case CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR: + { + // Real Time Clock Second & Real Time Clock Alarm + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + rtcsc &= ~(CYGARC_REG_IMM_RTCSC_IRQMASK); + rtcsc |= CYGARC_REG_IMM_RTCSC_IRQ0 >> level; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + break; + } + // PCMCIA_A_IRQ + // PCMCIA_A_CHLVL + // PCMCIA_B_IRQ + // PCMCIA_B_CHLVL + case CYGNUM_HAL_INTERRUPT_SIU_CPM: + { + // Communications Processor Module + cyg_uint16 cicr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr); + cicr &= ~(CYGARC_REG_IMM_CICR_IRQMASK); + cicr |= level << CYGARC_REG_IMM_CICR_IRQ_SHIFT; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr); + break; + } + case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST: + // CPM interrupt levels are for internal priority. All interrupts + // fed to the CPU use the CPM level set above. + // FIXME: Control of SCdP ordering. + break; + default: + CYG_FAIL("Unknown Interrupt!!!"); + break; + } +} + +// The decrementer interrupt cannnot be masked, configured or acknowledged. + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + CYG_MACRO_START \ + if (CYGNUM_HAL_INTERRUPT_DECREMENTER != (_vector_)) \ + cyg_hal_interrupt_mask ( (_vector_) ); \ + CYG_MACRO_END + +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + CYG_MACRO_START \ + if (CYGNUM_HAL_INTERRUPT_DECREMENTER != (_vector_)) \ + cyg_hal_interrupt_unmask ( (_vector_) ); \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + CYG_MACRO_START \ + if (CYGNUM_HAL_INTERRUPT_DECREMENTER != (_vector_)) \ + cyg_hal_interrupt_acknowledge ( (_vector_) ); \ + CYG_MACRO_END + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ + CYG_MACRO_START \ + if (CYGNUM_HAL_INTERRUPT_DECREMENTER != (_vector_)) \ + cyg_hal_interrupt_configure ( (_vector_), (_level_), (_up_) ); \ + CYG_MACRO_END + +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ + CYG_MACRO_START \ + if (CYGNUM_HAL_INTERRUPT_DECREMENTER != (_vector_)) \ + cyg_hal_interrupt_set_level ( (_vector_) , (_level_) ); \ + CYG_MACRO_END + +#else + +// No interrupt configuration possible without interrupt controller. #define HAL_INTERRUPT_MASK( _vector_ ) @@ -253,28 +844,40 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) -//----------------------------------------------------------------------------- +#endif + +//-------------------------------------------------------------------------- +// Interrupt arbiters + +#ifdef CYG_HAL_POWERPC_MPC860 + +externC cyg_uint32 hal_arbitration_isr_tb (CYG_ADDRWORD vector, + CYG_ADDRWORD data); +externC cyg_uint32 hal_arbitration_isr_pit (CYG_ADDRWORD vector, + CYG_ADDRWORD data); +externC cyg_uint32 hal_arbitration_isr_rtc (CYG_ADDRWORD vector, + CYG_ADDRWORD data); +externC cyg_uint32 hal_arbitration_isr_cpm (CYG_ADDRWORD vector, + CYG_ADDRWORD data); + +#endif // ifdef CYG_HAL_POWERPC_MPC860 + +//-------------------------------------------------------------------------- // Clock control #define HAL_CLOCK_INITIALIZE( _period_ ) \ - CYG_MACRO_START \ - cyg_uint32 period = _period_; \ asm volatile ( \ "mtdec %0;" \ : \ - : "r"(period) \ - ); \ - CYG_MACRO_END + : "r"(_period_) \ + ); #define HAL_CLOCK_RESET( _vector_, _period_ ) \ - CYG_MACRO_START \ - cyg_uint32 period = _period_; \ asm volatile ( \ "mtdec %0;" \ : \ - : "r"(period) \ - ); \ - CYG_MACRO_END + : "r"(_period_) \ + ); #define HAL_CLOCK_READ( _pvalue_ ) \ CYG_MACRO_START \ @@ -286,6 +889,24 @@ typedef cyg_uint32 CYG_INTERRUPT_STATE; *(_pvalue_) = CYGNUM_KERNEL_COUNTERS_RTC_PERIOD-result; \ CYG_MACRO_END -//----------------------------------------------------------------------------- +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY( _pvalue_ ) \ + CYG_MACRO_START \ + register cyg_int32 result; \ + asm volatile( \ + "mfdec %0;" \ + : "=r"(result) \ + ); \ + /* Pending DEC interrupts cannot be discarded. If dec is */ \ + /* positive it''s because a DEC interrupt occured while */ \ + /* eCos was getting ready to run. Just return 0 in that */ \ + /* case. */ \ + if (result > 0) \ + result = 0; \ + *(_pvalue_) = -result; \ + CYG_MACRO_END +#endif + +//-------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_INTR_H // End of hal_intr.h diff --git a/packages/hal/powerpc/arch/current/include/hal_io.h b/packages/hal/powerpc/arch/current/include/hal_io.h --- a/packages/hal/powerpc/arch/current/include/hal_io.h +++ b/packages/hal/powerpc/arch/current/include/hal_io.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -53,7 +53,7 @@ //----------------------------------------------------------------------------- // Enforce in-order IO for all HAL reads/writes using this macro. #define HAL_IO_BARRIER() \ - asm volatile ( "eieio" ::: "memory") + asm volatile ( "eieio" : : : "memory" ) //----------------------------------------------------------------------------- // IO Register address. @@ -65,17 +65,17 @@ typedef volatile CYG_ADDRWORD HAL_IO_REG // BYTE Register access. // Individual and vectorized access to 8 bit registers. -#define HAL_READ_UINT8( _register_, _value_ ) \ - CYG_MACRO_START \ - ((_value_) = *((volatile CYG_BYTE *)(_register_))); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END +#define HAL_READ_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END -#define HAL_WRITE_UINT8( _register_, _value_ ) \ - CYG_MACRO_START \ - (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ CYG_MACRO_START \ @@ -101,16 +101,16 @@ typedef volatile CYG_ADDRWORD HAL_IO_REG // Individual and vectorized access to 16 bit registers. #define HAL_READ_UINT16( _register_, _value_ ) \ - CYG_MACRO_START \ - ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END #define HAL_WRITE_UINT16( _register_, _value_ ) \ - CYG_MACRO_START \ - (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END + CYG_MACRO_START \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ CYG_MACRO_START \ @@ -135,16 +135,16 @@ typedef volatile CYG_ADDRWORD HAL_IO_REG // Individual and vectorized access to 32 bit registers. #define HAL_READ_UINT32( _register_, _value_ ) \ - CYG_MACRO_START \ - ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END #define HAL_WRITE_UINT32( _register_, _value_ ) \ - CYG_MACRO_START \ - (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \ - HAL_IO_BARRIER (); \ - CYG_MACRO_END + CYG_MACRO_START \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ CYG_MACRO_START \ diff --git a/packages/hal/powerpc/arch/current/include/pkgconf/hal_powerpc.h b/packages/hal/powerpc/arch/current/include/pkgconf/hal_powerpc.h --- a/packages/hal/powerpc/arch/current/include/pkgconf/hal_powerpc.h +++ b/packages/hal/powerpc/arch/current/include/pkgconf/hal_powerpc.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/arch/current/include/ppc.inc b/packages/hal/powerpc/arch/current/include/ppc.inc --- a/packages/hal/powerpc/arch/current/include/ppc.inc +++ b/packages/hal/powerpc/arch/current/include/ppc.inc @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -83,25 +83,6 @@ .equ sp, r1 #------------------------------------------------------------------------------ -# The names of some special purpose registers - - .equ dsisr, 18 - .equ dar , 19 - .equ dec , 22 - .equ sprg0, 272 - .equ sprg1, 273 - .equ sprg2, 274 - .equ sprg3, 275 - .equ pvr , 287 - .equ hid0 , 1008 - -#ifdef CYG_HAL_POWERPC_MP860 - .equ ic_cst,560 - .equ dc_cst,568 - .equ der , 149 -#endif - -#------------------------------------------------------------------------------ # Some useful coding macros # Load immediate word, has to be done with 2 instructions @@ -110,27 +91,30 @@ ori \reg,\reg,\val@L .endm +#ifdef CYG_HAL_POWERPC_MPC603 # Move from HID0 hw control register .macro mfhid0 reg - mfspr \reg,hid0 + mfspr \reg,HID0 .endm +#endif #------------------------------------------------------------------------------ # Exception, interrupt and thread context save area layout +# The layout of this structure is also defined in "hal_arch.h", for C +# code. Do not change this without changing that (or vice versa). - # These first 36 words are common to all - # saved states + # These first 39 words are common to all saved states .equ ppcreg_regs, 0 # 32 integer registers .equ ppcreg_cr, 32*4 .equ ppcreg_xer, 33*4 .equ ppcreg_lr, 34*4 .equ ppcreg_ctr, 35*4 - .equ ppcreg_context_size, 36*4 + .equ ppcreg_msr, 36*4 # MSR at time of exception + .equ ppcreg_pc, 37*4 # PC at time of exception + .equ ppcreg_context_size, 38*4 # The following are only saved on exceptions and interrupts - .equ ppcreg_vector, 36*4 # exception vector - .equ ppcreg_msr, 37*4 # MSR at time of exception - .equ ppcreg_pc, 38*4 # PC at time of exception + .equ ppcreg_vector, 38*4 # exception vector # The following are only saved on exceptions, and are for information # only. They are not restored with the rest of the state. @@ -140,13 +124,11 @@ .equ ppcreg_pvr, 42*4 # processor version .equ ppcreg_exception_size, 43*4 - # FIXME possibly need BAT and segment registers here too - # FIXME also decide what to do with FP state. + # Eventually add BATs, SRs and FP registers too. .equ ppc_stack_frame_size, 56 # size of a stack frame - .equ ppc_exception_safety, 0x100 # safety net for exceptions - .equ ppc_exception_decrement, ppcreg_exception_size+ppc_exception_safety + .equ ppc_exception_decrement, ppcreg_exception_size #------------------------------------------------------------------------------ diff --git a/packages/hal/powerpc/arch/current/include/ppc_regs.h b/packages/hal/powerpc/arch/current/include/ppc_regs.h --- a/packages/hal/powerpc/arch/current/include/ppc_regs.h +++ b/packages/hal/powerpc/arch/current/include/ppc_regs.h @@ -1,111 +1,108 @@ #ifndef CYGONCE_HAL_PPC_REGS_H #define CYGONCE_HAL_PPC_REGS_H -// ppc_regs.h - register defines for PowerPC processors -// -// Copyright (c) 1998 Cygnus Support +//========================================================================== +// +// ppc_regs.h +// +// PowerPC CPU definitions +// +//========================================================================== +//####COPYRIGHTBEGIN#### // -// The authors hereby grant permission to use, copy, modify, distribute, -// and license this software and its documentation for any purpose, provided -// that existing copyright notices are retained in all copies and that this -// notice is included verbatim in any distributions. No written agreement, -// license, or royalty fee is required for any of the authorized uses. -// Modifications to this software may be copyrighted by their authors -// and need not follow the licensing terms described here, provided that -// the new terms are clearly indicated on the first page of each file where -// they apply. - -// PPC registers, numbered in the order in which gdb expects to see them. +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-02-19 +// Purpose: Provide PPC register definitions +// Description: Provide PPC register definitions +// The short difinitions (sans CYGARC_REG_) are exported only +// if CYGARC_HAL_COMMON_EXPORT_CPU_MACROS is defined. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== -#define R0 0 -#define R1 1 -#define R2 2 -#define R3 3 -#define R4 4 -#define R5 5 -#define R6 6 -#define R7 7 -#define R8 8 -#define R9 9 -#define R10 10 -#define R11 11 -#define R12 12 -#define R13 13 -#define R14 14 -#define R15 15 -#define R16 16 -#define R17 17 -#define R18 18 -#define R19 19 -#define R20 20 -#define R21 21 -#define R22 22 -#define R23 23 -#define R24 24 -#define R25 25 -#define R26 26 -#define R27 27 -#define R28 28 -#define R29 29 -#define R30 30 -#define R31 31 +#include -#define F0 32 -#define F1 33 -#define F2 34 -#define F3 35 -#define F4 36 -#define F5 37 -#define F6 38 -#define F7 39 -#define F8 40 -#define F9 41 -#define F10 42 -#define F11 43 -#define F12 44 -#define F13 45 -#define F14 46 -#define F15 47 -#define F16 48 -#define F17 49 -#define F18 50 -#define F19 51 -#define F20 52 -#define F21 53 -#define F22 54 -#define F23 55 -#define F24 56 -#define F25 57 -#define F26 58 -#define F27 59 -#define F28 60 -#define F29 61 -#define F30 62 -#define F31 63 +//-------------------------------------------------------------------------- +// SPR access macros. +#define CYGARC_MTSPR(_spr_, _v_) \ + asm volatile ("mtspr %0, %1;" :: "I" (_spr_), "r" (_v_)); +#define CYGARC_MFSPR(_spr_, _v_) \ + asm volatile ("mfspr %0, %1;" : "=r" (_v_) : "I" (_spr_)); + +//-------------------------------------------------------------------------- +// TB access macros. +#define CYGARC_MTTB(_tbr_, _v_) \ + asm volatile ("mttb %0, %1;" :: "I" (_tbr_), "r" (_v_)); +#define CYGARC_MFTB(_tbr_, _v_) \ + asm volatile ("mftb %0, %1;" : "=r" (_v_) : "I" (_tbr_)); + +//-------------------------------------------------------------------------- +// Generic Definitions +//-------------------------------------------------------------------------- -#define PC 64 -#define PS 65 -#define CND 66 -#define LR 67 -#define CNT 68 -#define XER 69 -#define MQ 70 +//-------------------------------------------------------------------------- +// Some SPRs +#define CYGARC_REG_DSISR 18 +#define CYGARC_REG_DAR 19 +#define CYGARC_REG_DEC 22 +#define CYGARC_REG_SRR0 26 +#define CYGARC_REG_SRR1 27 +#define CYGARC_REG_SPRG0 272 +#define CYGARC_REG_SPRG1 273 +#define CYGARC_REG_SPRG2 274 +#define CYGARC_REG_SPRG3 275 +#define CYGARC_REG_PVR 287 -// For convenience -#define SP R1 +#define CYGARC_REG_TBL_W 284 +#define CYGARC_REG_TBU_W 285 -#ifdef CYG_HAL_POWERPC_MP860 -// General purpose registers. No floating point registers on MP860. -#define FIRST_GP_REG R0 -#define LAST_GP_REG R31 +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define DSISR CYGARC_REG_DSISR +#define DAR CYGARC_REG_DAR +#define DEC CYGARC_REG_DEC +#define SRR0 CYGARC_REG_SRR0 +#define SRR1 CYGARC_REG_SRR1 +#define SPRG0 CYGARC_REG_SPRG0 +#define SPRG1 CYGARC_REG_SPRG1 +#define SPRG2 CYGARC_REG_SPRG2 +#define SPRG3 CYGARC_REG_SPRG3 +#define PVR CYGARC_REG_PVR -// CPU state registers. -#define FIRST_CS_REG PC -#define LAST_CS_REG MQ +#define TBL_W CYGARC_REG_TBL_W +#define TBU_W CYGARC_REG_TBU_W #endif - +//-------------------------------------------------------------------------- // MSR bits +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS #define MSR_LE 0x00000001 // little-endian mode enable #define MSR_RI 0x00000002 // recoverable exception #define MSR_DR 0x00000010 // data address translation @@ -121,49 +118,359 @@ #define MSR_EE 0x00008000 // external interrupt enable #define MSR_ILE 0x00010000 // exception little-endian mode #define MSR_POW 0x00040000 // power management enable +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +//-------------------------------------------------------------------------- +// Time Base Registers +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define TBL_R 268 +#define TBU_R 269 +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- +// MPC603 Specific Definitions +//-------------------------------------------------------------------------- +#ifdef CYG_HAL_POWERPC_MPC603 + +//-------------------------------------------------------------------------- +// Cache +#define CYGARC_REG_HID0 1008 + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define HID0 CYGARC_REG_HID0 +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS -#ifdef CYG_HAL_POWERPC_MP860 -// Instruction cache control. -#define IC_CST 560 -#define IC_ADR 561 -#define IC_DAT 562 +//-------------------------------------------------------------------------- +// BATs +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define IBAT0U 528 +#define IBAT0L 529 +#define IBAT1U 530 +#define IBAT1L 531 +#define IBAT2U 532 +#define IBAT2L 533 +#define IBAT3U 534 +#define IBAT3L 535 + +#define DBAT0U 536 +#define DBAT0L 537 +#define DBAT1U 538 +#define DBAT1L 539 +#define DBAT2U 540 +#define DBAT2L 541 +#define DBAT3U 542 +#define DBAT3L 543 + +#define UBAT_BEPIMASK 0xfffe0000 // effective address mask +#define UBAT_BLMASK 0x00001ffc // block length mask +#define UBAT_VS 0x00000002 // supervisor mode valid bit +#define UBAT_VP 0x00000001 // problem mode valid bit + +#define LBAT_BRPNMASK 0xfffe0000 // real address mask +#define LBAT_W 0x00000040 // write-through +#define LBAT_I 0x00000020 // caching-inhibited +#define LBAT_M 0x00000010 // memory coherence +#define LBAT_G 0x00000008 // guarded + +#define LBAT_PP_NA 0x00000000 // no access +#define LBAT_PP_RO 0x00000001 // read-only +#define LBAT_PP_RW 0x00000002 // read/write +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +#endif // ifdef CYG_HAL_POWERPC_MPC603 -#define IC_CMD_CE 0x02000000 // cache enable -#define IC_CMD_CD 0x04000000 // cache disable -#define IC_CMD_LL 0x06000000 // load & lock -#define IC_CMD_UL 0x08000000 // unlock line -#define IC_CMD_UA 0x0a000000 // unlock all -#define IC_CMD_IA 0x0c000000 // invalidate all +//-------------------------------------------------------------------------- +// MPC8xx Generic Definitions +//-------------------------------------------------------------------------- +#ifdef CYG_HAL_POWERPC_MPC8xx + +//-------------------------------------------------------------------------- +// Instruction cache control. +#define CYGARC_REG_IC_CST 560 +#define CYGARC_REG_IC_ADR 561 +#define CYGARC_REG_IC_DAT 562 + +#define CYGARC_REG_IC_CMD_CE 0x02000000 // cache enable +#define CYGARC_REG_IC_CMD_CD 0x04000000 // cache disable +#define CYGARC_REG_IC_CMD_LL 0x06000000 // load & lock +#define CYGARC_REG_IC_CMD_UL 0x08000000 // unlock line +#define CYGARC_REG_IC_CMD_UA 0x0a000000 // unlock all +#define CYGARC_REG_IC_CMD_IA 0x0c000000 // invalidate all +#define CYGARC_REG_IC_ADR_SETID_SHIFT 4 // set id is bits 21-27 +#define CYGARC_REG_IC_ADR_WAY0 0x00000000 // select way0 +#define CYGARC_REG_IC_ADR_WAY1 0x00001000 // select way1 + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define IC_CST CYGARC_REG_IC_CST +#define IC_ADR CYGARC_REG_IC_ADR +#define IC_DAT CYGARC_REG_IC_DAT + +#define IC_CMD_CE CYGARC_REG_IC_CMD_CE +#define IC_CMD_CD CYGARC_REG_IC_CMD_CD +#define IC_CMD_LL CYGARC_REG_IC_CMD_LL +#define IC_CMD_UL CYGARC_REG_IC_CMD_UL +#define IC_CMD_UA CYGARC_REG_IC_CMD_UA +#define IC_CMD_IA CYGARC_REG_IC_CMD_IA + +#define IC_ADR_SETID_SHIFT CYGARC_REG_IC_ADR_SETID_SHIFT +#define IC_ADR_WAY0 CYGARC_REG_IC_ADR_WAY0 +#define IC_ADR_WAY1 CYGARC_REG_IC_ADR_WAY1 +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- // Data cache control. -#define DC_CST 568 -#define DC_ADR 569 -#define DC_DAT 570 +#define CYGARC_REG_DC_CST 568 +#define CYGARC_REG_DC_ADR 569 +#define CYGARC_REG_DC_DAT 570 + +#define CYGARC_REG_DC_CMD_CE 0x02000000 // cache enable +#define CYGARC_REG_DC_CMD_CD 0x04000000 // cache disable +#define CYGARC_REG_DC_CMD_LL 0x06000000 // lock line +#define CYGARC_REG_DC_CMD_UL 0x08000000 // unlock line +#define CYGARC_REG_DC_CMD_UA 0x0a000000 // unlock all +#define CYGARC_REG_DC_CMD_IA 0x0c000000 // invalidate all +#define CYGARC_REG_DC_CMD_FL 0x0e000000 // flush line +#define CYGARC_REG_DC_CMD_SW 0x01000000 // set writethrough +#define CYGARC_REG_DC_CMD_CW 0x03000000 // clear writethrough +#define CYGARC_REG_DC_CMD_SS 0x05000000 // set little endian swap +#define CYGARC_REG_DC_CMD_CS 0x07000000 // clear little endian swap + +#define CYGARC_REG_DC_ADR_SETID_SHIFT 4 // set id is bits 21-27 +#define CYGARC_REG_DC_ADR_WAY0 0x00000000 // select way0 +#define CYGARC_REG_DC_ADR_WAY1 0x00001000 // select way1 + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define DC_CST CYGARC_REG_DC_CST +#define DC_ADR CYGARC_REG_DC_ADR +#define DC_DAT CYGARC_REG_DC_DAT + +#define DC_CMD_CE CYGARC_REG_DC_CMD_CE +#define DC_CMD_CD CYGARC_REG_DC_CMD_CD +#define DC_CMD_LL CYGARC_REG_DC_CMD_LL +#define DC_CMD_UL CYGARC_REG_DC_CMD_UL +#define DC_CMD_UA CYGARC_REG_DC_CMD_UA +#define DC_CMD_IA CYGARC_REG_DC_CMD_IA +#define DC_CMD_FL CYGARC_REG_DC_CMD_FL +#define DC_CMD_SW CYGARC_REG_DC_CMD_SW +#define DC_CMD_CW CYGARC_REG_DC_CMD_CW +#define DC_CMD_SS CYGARC_REG_DC_CMD_SS +#define DC_CMD_CS CYGARC_REG_DC_CMD_CS + +#define DC_ADR_SETID_SHIFT CYGARC_REG_DC_ADR_SETID_SHIFT +#define DC_ADR_WAY0 CYGARC_REG_DC_ADR_WAY0 +#define DC_ADR_WAY1 CYGARC_REG_DC_ADR_WAY1 +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- +// MMU control. +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define M_CASID 793 // current address space id register + +#define MI_CTR 784 // instruction MMU control +#define MI_EPN 787 // instruction MMU effective page num +#define MI_TWC 789 // instruction MMU tablewalk count +#define MI_RPN 790 // instruction MMU real page num +#define MI_DCAM 816 // instruction MMU CAM read +#define MI_DRAM0 817 // instruction MMU RAM read 0 +#define MI_DRAM1 818 // instruction MMU RAM read 1 + +#define MI_EPN_EPNMASK 0xfffff000 // effective page no mask +#define MI_EPN_EV 0x00000200 // entry valid + +#define MI_RPN_RPNMASK 0xfffff000 // real page no mask +#define MI_RPN_PPRWRW 0x000008f0 // page protection (rw/rw, page valid) +#define MI_RPN_LPS 0x00000008 // large page size +#define MI_RPN_SH 0x00000004 // shared page (1 = no ASID cmp) +#define MI_RPN_CI 0x00000002 // cache inhibited +#define MI_RPN_V 0x00000001 // entry valid + +#define MI_TWC_PS8MB 0x0000000c // page size = 8MB +#define MI_TWC_G 0x00000010 // guarded +#define MI_TWC_WT 0x00000002 // writethrough +#define MI_TWC_V 0x00000001 // entry valid + +#define MI_CTR_INDX_SHIFT 8 // the ITLB_INDX starts at bit 23 + +#define MD_CTR 792 // data MMU control +#define MD_EPN 795 // data MMU effective page num +#define MD_TWC 797 // data MMU tablewalk count +#define MD_RPN 798 // data MMU real page num +#define MD_DCAM 824 // data MMU CAM read +#define MD_DRAM0 825 // data MMU RAM read 0 +#define MD_DRAM1 826 // data MMU RAM read 1 + +#define MD_RPN_CHANGED 0x00000100 // page changed +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- +// Internal Memory Map. +#define CYGARC_REG_IMMR 638 // internal memory map base register +#define CYGARC_REG_IMMR_BASEMASK 0xffff0000 // imm base location mask (rw) +#define CYGARC_REG_IMMR_PARTNUM 0x0000ff00 // part number mask (ro) +#define CYGARC_REG_IMMR_MASKNUM 0x000000ff // mask number mask (ro) + +#define CYGARC_REG_IMM_BASE 0xff000000 // the internal memory map base + +// system protection control +#define CYGARC_REG_IMM_SYPCR (CYGARC_REG_IMM_BASE + 0x004) +#define CYGARC_REG_IMM_SYPCR_SWTC_MASK 0xffff0000 +#define CYGARC_REG_IMM_SYPCR_BMT_MASK 0x0000ff00 +#define CYGARC_REG_IMM_SYPCR_BME 0x00000080 +#define CYGARC_REG_IMM_SYPCR_SWF 0x00000008 +#define CYGARC_REG_IMM_SYPCR_SWE 0x00000004 +#define CYGARC_REG_IMM_SYPCR_SWRI 0x00000002 +#define CYGARC_REG_IMM_SYPCR_SWP 0x00000001 + +// interrupt pend register +#define CYGARC_REG_IMM_SIPEND (CYGARC_REG_IMM_BASE + 0x010) +#define CYGARC_REG_IMM_SIPEND_IRQ0 0x80000000 // irq0 is bit 0... + +// interrupt mask +#define CYGARC_REG_IMM_SIMASK (CYGARC_REG_IMM_BASE + 0x014) +#define CYGARC_REG_IMM_SIMASK_IRQ0 0x80000000 // ... irq n is bit n*2 -#define DC_CMD_CE 0x02000000 // cache enable -#define DC_CMD_CD 0x04000000 // cache disable -#define DC_CMD_LL 0x06000000 // lock line -#define DC_CMD_UL 0x08000000 // unlock line -#define DC_CMD_UA 0x0a000000 // unlock all -#define DC_CMD_IA 0x0c000000 // invalidate all -#define DC_CMD_FL 0x0e000000 // flush line -#define DC_CMD_SW 0x01000000 // set writethrough -#define DC_CMD_CW 0x03000000 // clear writethrough -#define DC_CMD_SS 0x05000000 // set little endian swap -#define DC_CMD_CS 0x07000000 // clear little endian swap +// interrupt edge level mask +#define CYGARC_REG_IMM_SIEL (CYGARC_REG_IMM_BASE + 0x018) +#define CYGARC_REG_IMM_SIEL_IRQ0 0x80000000 + +// interrupt vector +#define CYGARC_REG_IMM_SIVEC (CYGARC_REG_IMM_BASE + 0x01c) + +// memory controller +#define CYGARC_REG_IMM_BR0 (CYGARC_REG_IMM_BASE + 0x100) +#define CYGARC_REG_IMM_OR0 (CYGARC_REG_IMM_BASE + 0x104) +#define CYGARC_REG_IMM_BR1 (CYGARC_REG_IMM_BASE + 0x108) +#define CYGARC_REG_IMM_OR1 (CYGARC_REG_IMM_BASE + 0x10c) +#define CYGARC_REG_IMM_BR2 (CYGARC_REG_IMM_BASE + 0x110) +#define CYGARC_REG_IMM_OR2 (CYGARC_REG_IMM_BASE + 0x114) +#define CYGARC_REG_IMM_BR3 (CYGARC_REG_IMM_BASE + 0x118) +#define CYGARC_REG_IMM_OR3 (CYGARC_REG_IMM_BASE + 0x11c) +#define CYGARC_REG_IMM_BR4 (CYGARC_REG_IMM_BASE + 0x120) +#define CYGARC_REG_IMM_OR4 (CYGARC_REG_IMM_BASE + 0x124) +#define CYGARC_REG_IMM_BR5 (CYGARC_REG_IMM_BASE + 0x128) +#define CYGARC_REG_IMM_OR5 (CYGARC_REG_IMM_BASE + 0x12c) +#define CYGARC_REG_IMM_BR6 (CYGARC_REG_IMM_BASE + 0x130) +#define CYGARC_REG_IMM_OR6 (CYGARC_REG_IMM_BASE + 0x134) +#define CYGARC_REG_IMM_BR7 (CYGARC_REG_IMM_BASE + 0x138) +#define CYGARC_REG_IMM_OR7 (CYGARC_REG_IMM_BASE + 0x13c) + +#define CYGARC_REG_IMM_BR_BA_MASK 0xffff8000 // base address +#define CYGARC_REG_IMM_BR_AT_MASK 0x00007000 // address type +#define CYGARC_REG_IMM_BR_PS_8 0x00000400 // port size 8 bits +#define CYGARC_REG_IMM_BR_PS_16 0x00000800 // port size 16 bits +#define CYGARC_REG_IMM_BR_PS_32 0x00000000 // port size 32 bits +#define CYGARC_REG_IMM_BR_PARE 0x00000200 // parity enable +#define CYGARC_REG_IMM_BR_WP 0x00000100 // write protect +#define CYGARC_REG_IMM_BR_MS_GPCM 0x00000000 // machine select G.P.C.M +#define CYGARC_REG_IMM_BR_MS_UPMA 0x00000080 // machine select U.P.M.A +#define CYGARC_REG_IMM_BR_MS_UPMB 0x000000c0 // machine select U.P.M.B +#define CYGARC_REG_IMM_BR_V 0x00000001 // valid bit + +#define CYGARC_REG_IMM_OR_AM 0xffff8000 // address mask +#define CYGARC_REG_IMM_OR_ATM 0x00007000 // address type mask +#define CYGARC_REG_IMM_OR_CSNT 0x00000800 // GPCM:chip select negation time +#define CYGARC_REG_IMM_OR_SAM 0x00000800 // UPMx:start address multiplex +#define CYGARC_REG_IMM_OR_ACS_0 0x00000000 // GPCM:CS output immediately +#define CYGARC_REG_IMM_OR_ACS_4 0x00000400 // GPCM:CS output 1/4 clock later +#define CYGARC_REG_IMM_OR_ACS_2 0x00000600 // GPCM:CS output 1/2 clock later +#define CYGARC_REG_IMM_OR_G5LA 0x00000400 // UPMx:general-purpose line 5 A +#define CYGARC_REG_IMM_OR_G5LS 0x00000200 // UPMx:general-purpose line 5 S +#define CYGARC_REG_IMM_OR_BI 0x00000100 // burst inhibit +#define CYGARC_REG_IMM_OR_SCY_MASK 0x000000f0 // cycle length in clocks +#define CYGARC_REG_IMM_OR_SCY_SHIFT 4 +#define CYGARC_REG_IMM_OR_SETA 0x00000008 // external transfer ack +#define CYGARC_REG_IMM_OR_TRLX 0x00000004 // timing relaxed +#define CYGARC_REG_IMM_OR_EHTR 0x00000002 // extended hold time on read + +// timebase status and control +#define CYGARC_REG_IMM_TBSCR (CYGARC_REG_IMM_BASE + 0x200) +#define CYGARC_REG_IMM_TBSCR_REFA 0x0080 // reference interrupt status A +#define CYGARC_REG_IMM_TBSCR_REFB 0x0040 // reference interrupt status B +#define CYGARC_REG_IMM_TBSCR_REFAE 0x0008 // reference interrupt enable A +#define CYGARC_REG_IMM_TBSCR_REFBE 0x0004 // reference interrupt enable B +#define CYGARC_REG_IMM_TBSCR_TBF 0x0002 // timebase freeze +#define CYGARC_REG_IMM_TBSCR_TBE 0x0001 // timebase enable +#define CYGARC_REG_IMM_TBSCR_IRQ0 0x8000 // highest interrupt level +#define CYGARC_REG_IMM_TBSCR_IRQMASK 0xff00 // irq priority mask + +// timebase reference register 0 +#define CYGARC_REG_IMM_TBREF0 (CYGARC_REG_IMM_BASE + 0x204) +// timebase reference register 1 +#define CYGARC_REG_IMM_TBREF1 (CYGARC_REG_IMM_BASE + 0x208) + +// real time clock +#define CYGARC_REG_IMM_RTCSC (CYGARC_REG_IMM_BASE + 0x220) +#define CYGARC_REG_IMM_RTCSC_SEC 0x0080 // once per second interrupt +#define CYGARC_REG_IMM_RTCSC_ALR 0x0040 // alarm interrupt +#define CYGARC_REG_IMM_RTCSC_38K 0x0010 // source select +#define CYGARC_REG_IMM_RTCSC_SIE 0x0008 // second interrupt enable +#define CYGARC_REG_IMM_RTCSC_ALE 0x0004 // alarm interrupt enable +#define CYGARC_REG_IMM_RTCSC_RTF 0x0002 // real time clock freeze +#define CYGARC_REG_IMM_RTCSC_RTE 0x0001 // real time clock enable +#define CYGARC_REG_IMM_RTCSC_IRQ0 0x8000 // highest interrupt level +#define CYGARC_REG_IMM_RTCSC_IRQMASK 0xff00 // irq priority mask + +// periodic interrupt status & ctrl +#define CYGARC_REG_IMM_PISCR (CYGARC_REG_IMM_BASE + 0x240) +#define CYGARC_REG_IMM_PISCR_PS 0x0080 // periodic interrupt status +#define CYGARC_REG_IMM_PISCR_PIE 0x0004 // periodic interrupt enable +#define CYGARC_REG_IMM_PISCR_PITF 0x0002 // periodic interrupt timer freeze +#define CYGARC_REG_IMM_PISCR_PTE 0x0001 // periodic timer enable +#define CYGARC_REG_IMM_PISCR_IRQ0 0x8000 // highest interrupt level +#define CYGARC_REG_IMM_PISCR_IRQMASK 0xff00 // irq priority mask + +// periodic interrupt timer count +#define CYGARC_REG_IMM_PITC (CYGARC_REG_IMM_BASE + 0x244) +#define CYGARC_REG_IMM_PITC_COUNT_SHIFT 16 // count is stored in bits 0-15 + +// system clock control +#define CYGARC_REG_IMM_SCCR (CYGARC_REG_IMM_BASE + 0x280) +#define CYGARC_REG_IMM_SCCR_TBS 0x02000000 // timebase source +#define CYGARC_REG_IMM_SCCR_RTDIV 0x01000000 // rtc clock divide +#define CYGARC_REG_IMM_SCCR_RTSEL 0x00800000 // rtc clock select + +// CPM interrupt vector register +#define CYGARC_REG_IMM_CIVR (CYGARC_REG_IMM_BASE + 0x930) +#define CYGARC_REG_IMM_CIVR_IACK 0x0001 // set this to update register +#define CYGARC_REG_IMM_CIVR_VECTOR_SHIFT 11 // vector is at bits 0-4 + +// CPM interrupt configuration reg +#define CYGARC_REG_IMM_CICR (CYGARC_REG_IMM_BASE + 0x940) +#define CYGARC_REG_IMM_CICR_IEN 0x00000080 // interrupt enable +#define CYGARC_REG_IMM_CICR_IRQMASK 0x0000e000 // irq priority mask +#define CYGARC_REG_IMM_CICR_IRQ_SHIFT 13 + +// CPM interrupt mask register +#define CYGARC_REG_IMM_CIMR (CYGARC_REG_IMM_BASE + 0x948) +// CPM interrupt in-service register +#define CYGARC_REG_IMM_CISR (CYGARC_REG_IMM_BASE + 0x94C) -// Internal Memory Map -#define IMM_BASE 0xff000000 // The 860 internal memory map base +#define CYGARC_SIU_PRIORITY_LOW 7 // the lowest irq priority +#define CYGARC_SIU_PRIORITY_HIGH 0 // the highest irq priority + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//----------------------------------------------------------------------------- +// Development Support. +#define CYGARC_REG_DER 149 -#define IMM_SIPEND (IMM_BASE + 0x010) // Interrupt Pend Register -#define IMM_SIMASK (IMM_BASE + 0x014) // Interrupt Mask -#define IMM_SIEL (IMM_BASE + 0x018) // Interrupt Edge Level Mask -#define IMM_SIVEC (IMM_BASE + 0x01c) // Interrupt Vector +#define CYGARC_REG_ICTRL 158 // instruction support control reg +#define CYGARC_REG_ICTRL_SERSHOW 0x00000000 // serialized, show cycles +#define CYGARC_REG_ICTRL_NOSERSHOW 0x00000007 //non-serialized&no show cycles + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#define DER CYGARC_REG_DER -#define IMM_TBSCR (IMM_BASE + 0x200) // Timebase Status and Control -#endif +#define ICTRL CYGARC_REG_ICTRL +#define ICTRL_SERSHOW CYGARC_REG_ICTRL_SERSHOW +#define ICTRL_NOSERSHOW CYGARC_REG_ICTRL_NOSERSHOW +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +#endif // ifdef CYG_HAL_POWERPC_MPC8xx #endif // ifdef CYGONCE_HAL_PPC_REGS_H diff --git a/packages/hal/powerpc/arch/current/include/ppc_stub.h b/packages/hal/powerpc/arch/current/include/ppc_stub.h --- a/packages/hal/powerpc/arch/current/include/ppc_stub.h +++ b/packages/hal/powerpc/arch/current/include/ppc_stub.h @@ -3,7 +3,7 @@ /* ppc_stub.h - PowerPC-specific definitions for generic stub * - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -34,27 +34,14 @@ enum regnames { PC, PS, CND, LR, CNT, XER, MQ }; -typedef enum regnames regnames_t; - -#include +// For convenience +#define SP R1 -/* If ENABLED is non-zero, supply a memory fault handler that traps - subsequent memory errors and sets _mem_err to 1. Otherwise, memory - faults are processed as exceptions. */ -extern void __set_mem_fault_trap (int enable); - -/* Write C to the current serial port. */ -extern void putDebugChar (int c); - -/* Read one character from the current serial port. */ -extern int getDebugChar (void); +typedef enum regnames regnames_t; /* Given a trap value TRAP, return the corresponding signal. */ extern int __computeSignal (unsigned int trap_number); -/* Install the standard set of trap handlers for the stub. */ -extern void __install_traps (void); - /* Return the SPARC trap number corresponding to the last-taken trap. */ extern int __get_trap_number (void); @@ -68,31 +55,13 @@ extern void put_register (regnames_t whi as needed. */ extern void set_pc (target_register_t pc); -/* Flush the instruction cache. */ -extern void flush_i_cache (void); - -/* Reset the board. */ -extern void __reset (void); - -/* Set the baud rate for the current serial port. */ -extern void __set_baud_rate (int baud); - -/* Initialize the hardware. */ -extern void initHardware (void); - /* Set things up so that the next user resume will execute one instruction. This may be done by setting breakpoints or setting a single step flag in the saved user registers, for example. */ -void single_step (void); +void __single_step (void); /* Clear the single-step state. */ -void clear_single_step (void); - -struct gdb_packet; - -/* Return 1 when a complete packet has been received, 0 if the packet - is not yet complete, or -1 if an erroneous packet was NAKed. */ -int __add_char_to_packet (int character, struct gdb_packet *packet); +void __clear_single_step (void); /* If the breakpoint we hit is in the breakpoint() instruction, return a non-zero value. */ @@ -101,19 +70,8 @@ extern int __is_breakpoint_function (voi /* Skip the current instruction. */ extern void __skipinst (void); -/* Write the 'T' packet in BUFFER. SIGVAL is the signal the program - received. */ - -extern void __build_t_packet (int sigval, char *buffer); - -extern void install_breakpoints (void); +extern void __install_breakpoints (void); -/* Address in text section of a breakpoint instruction. */ - -extern void _breakinst (void); - -/* The opcode for a breakpoint instruction. */ - -extern unsigned long __break_opcode (void); +extern void __clear_breakpoints (void); #endif // ifndef CYGONCE_HAL_PPC_STUB_H diff --git a/packages/hal/powerpc/arch/current/include/quicc_smc.h b/packages/hal/powerpc/arch/current/include/quicc_smc.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/include/quicc_smc.h @@ -0,0 +1,40 @@ +#ifndef CYGONCE_QUICC_SMC_H +#define CYGONCE_QUICC_SMC_H +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// The style of programming used in this file may not comply with the +// eCos programming guidelines. Please do not use as a base for other +// files. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Contributed by: Kevin Hester +// Maintained by: +// See also: +// Motorola's "Example Software Initializing the SMC as a UART" package +// (smc2.zip) at: +// http://www.mot.com/SPS/RISC/netcomm/tools/index.html#MPC860_table +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= + +extern void cyg_smc2_init(unsigned long baudRate); +extern void cyg_smc2_putchar(char); +extern char cyg_smc2_getchar(void); + +#endif + + diff --git a/packages/hal/powerpc/arch/current/src/PKGconf.mak b/packages/hal/powerpc/arch/current/src/PKGconf.mak --- a/packages/hal/powerpc/arch/current/src/PKGconf.mak +++ b/packages/hal/powerpc/arch/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,14 +32,16 @@ PACKAGE := hal_powerpc include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_misc.c context.S ppc_stub.c +COMPILE := hal_misc.c context.S ppc_stub.c hal_intr.c quicc_smc.c OTHER_OBJS := -OTHER_TARGETS := vectors.stamp -OTHER_DEPS := $(PACKAGE)_vectors.d -OTHER_CLEAN := vectors.clean +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src +.PHONY: ldscript.clean + vectors.stamp: $(PACKAGE)_vectors.o $(CP) $< $(PREFIX)/lib/vectors.o @$(TOUCH) $@ @@ -51,4 +53,15 @@ vectors.clean: $(PACKAGE)_vectors.o: $(BUILD_TREE)/pkgconf/pkgconf.mak \ $(BUILD_TREE)/pkgconf/makevars $(PACKAGE_RULES_FILE) +ldscript.stamp: powerpc.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp + diff --git a/packages/hal/powerpc/arch/current/src/context.S b/packages/hal/powerpc/arch/current/src/context.S --- a/packages/hal/powerpc/arch/current/src/context.S +++ b/packages/hal/powerpc/arch/current/src/context.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -105,16 +105,25 @@ FUNC_START(hal_thread_switch_context) .set _reg,_reg+1 .endr - stw r0,0(sp) # R0 - stw r5,4(sp) # R5 = real SP, save in R1 slot - stw r2,8(sp) # R2 = TOC + stw r0,ppcreg_regs+0*4(sp) # R0 + stw r5,ppcreg_regs+1*4(sp) # R5 = real SP, save in R1 slot + stw r2,ppcreg_regs+2*4(sp) # R2 = TOC # CR cannot be treated as a special register since GCC will only # do partial restore of CR at function exit, depending on which # of CR2, CR3, and CR4 have been used in the given function. mfcr r5 # save CR. stw r5,ppcreg_cr(sp) - + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + # Make the thread context look like an exception context if thread- + # aware debugging is required. This state does not need restoring. + mflr r5 + stw r5,ppcreg_pc(sp) # pc of caller + mfmsr r5 + stw r5,ppcreg_msr(sp) # msr (or PS) +#endif + save_special # save special regs mflr r5 # save LR == return link for this fn @@ -151,13 +160,11 @@ FUNC_START(hal_thread_load_context) .set _reg,_reg+1 .endr - lwz r0,0(sp) # R0 - lwz r2,8(sp) # R2 = TOC - lwz r3,12(sp) # load r3 -# lwz r4,16(sp) # load r4 -# lwz r5,20(sp) # load r5 + lwz r0,ppcreg_regs+0*4(sp) # R0 + lwz r2,ppcreg_regs+2*4(sp) # R2 = TOC + lwz r3,ppcreg_regs+3*4(sp) # load r3 - lwz sp,4(sp) # finally restore true SP + lwz sp,ppcreg_regs+1*4(sp) # finally restore true SP blr # jump to LR @@ -165,69 +172,95 @@ FUNC_START(hal_thread_load_context) # HAL longjmp, setjmp implementations # hal_setjmp saves only to callee save registers 13-31, r1[sp],r2, cr[2-4] # and lr into buffer supplied in r3[arg0] +# Note: These definitions are repeated in hal_arch.h. If changes are required +# remember to update both sets. + +#define CYGARC_JMP_BUF_SP 0 +#define CYGARC_JMP_BUF_R2 1 +#define CYGARC_JMP_BUF_R13 2 +#define CYGARC_JMP_BUF_R14 3 +#define CYGARC_JMP_BUF_R15 4 +#define CYGARC_JMP_BUF_R16 5 +#define CYGARC_JMP_BUF_R17 6 +#define CYGARC_JMP_BUF_R18 7 +#define CYGARC_JMP_BUF_R19 8 +#define CYGARC_JMP_BUF_R20 9 +#define CYGARC_JMP_BUF_R21 10 +#define CYGARC_JMP_BUF_R22 11 +#define CYGARC_JMP_BUF_R23 12 +#define CYGARC_JMP_BUF_R24 13 +#define CYGARC_JMP_BUF_R25 14 +#define CYGARC_JMP_BUF_R26 15 +#define CYGARC_JMP_BUF_R27 16 +#define CYGARC_JMP_BUF_R28 17 +#define CYGARC_JMP_BUF_R29 18 +#define CYGARC_JMP_BUF_R30 19 +#define CYGARC_JMP_BUF_R31 20 +#define CYGARC_JMP_BUF_LR 21 +#define CYGARC_JMP_BUF_CR 22 + +#define CYGARC_JMP_BUF_SIZE 23 FUNC_START(hal_setjmp) mfcr r5 - stw r5,88(r3) + stw r5, CYGARC_JMP_BUF_CR*4(r3) mflr r5 - stw r5,84(r3) - stw r31,80(r3) - stw r30,76(r3) - stw r29,72(r3) - stw r28,68(r3) - stw r27,64(r3) - stw r26,60(r3) - stw r25,56(r3) - stw r24,52(r3) - stw r23,48(r3) - stw r22,44(r3) - stw r21,40(r3) - stw r20,36(r3) - stw r19,32(r3) - stw r18,28(r3) - stw r17,24(r3) - stw r16,20(r3) - stw r15,16(r3) - stw r14,12(r3) - stw r13,8(r3) - stw r2,4(r3) # TOC, optimize out? - stw sp,0(r3) + stw r5, CYGARC_JMP_BUF_LR*4(r3) + stw r31,CYGARC_JMP_BUF_R31*4(r3) + stw r30,CYGARC_JMP_BUF_R30*4(r3) + stw r29,CYGARC_JMP_BUF_R29*4(r3) + stw r28,CYGARC_JMP_BUF_R28*4(r3) + stw r27,CYGARC_JMP_BUF_R27*4(r3) + stw r26,CYGARC_JMP_BUF_R26*4(r3) + stw r25,CYGARC_JMP_BUF_R25*4(r3) + stw r24,CYGARC_JMP_BUF_R24*4(r3) + stw r23,CYGARC_JMP_BUF_R23*4(r3) + stw r22,CYGARC_JMP_BUF_R22*4(r3) + stw r21,CYGARC_JMP_BUF_R21*4(r3) + stw r20,CYGARC_JMP_BUF_R20*4(r3) + stw r19,CYGARC_JMP_BUF_R19*4(r3) + stw r18,CYGARC_JMP_BUF_R18*4(r3) + stw r17,CYGARC_JMP_BUF_R17*4(r3) + stw r16,CYGARC_JMP_BUF_R16*4(r3) + stw r15,CYGARC_JMP_BUF_R15*4(r3) + stw r14,CYGARC_JMP_BUF_R14*4(r3) + stw r13,CYGARC_JMP_BUF_R13*4(r3) + stw r2, CYGARC_JMP_BUF_R2*4(r3) # TOC, optimize out? + stw sp, CYGARC_JMP_BUF_SP*4(r3) li r3,0 # return 0 blr # hal_longjmp loads state from r3[arg0] and returns # and lr into buffer supplied in r3[arg0] - + FUNC_START(hal_longjmp) - lwz r5,88(r3) + lwz r5,CYGARC_JMP_BUF_CR*4(r3) mtcr r5 - lwz r5,84(r3) + lwz r5,CYGARC_JMP_BUF_LR*4(r3) mtlr r5 - lwz r31,80(r3) - lwz r30,76(r3) - lwz r29,72(r3) - lwz r28,68(r3) - lwz r27,64(r3) - lwz r26,60(r3) - lwz r25,56(r3) - lwz r24,52(r3) - lwz r23,48(r3) - lwz r22,44(r3) - lwz r21,40(r3) - lwz r20,36(r3) - lwz r19,32(r3) - lwz r18,28(r3) - lwz r17,24(r3) - lwz r16,20(r3) - lwz r15,16(r3) - lwz r14,12(r3) - lwz r13,8(r3) - lwz r2,4(r3) - lwz sp,0(r3) + lwz r31,CYGARC_JMP_BUF_R31*4(r3) + lwz r30,CYGARC_JMP_BUF_R30*4(r3) + lwz r29,CYGARC_JMP_BUF_R29*4(r3) + lwz r28,CYGARC_JMP_BUF_R28*4(r3) + lwz r27,CYGARC_JMP_BUF_R27*4(r3) + lwz r26,CYGARC_JMP_BUF_R26*4(r3) + lwz r25,CYGARC_JMP_BUF_R25*4(r3) + lwz r24,CYGARC_JMP_BUF_R24*4(r3) + lwz r23,CYGARC_JMP_BUF_R23*4(r3) + lwz r22,CYGARC_JMP_BUF_R22*4(r3) + lwz r21,CYGARC_JMP_BUF_R21*4(r3) + lwz r20,CYGARC_JMP_BUF_R20*4(r3) + lwz r19,CYGARC_JMP_BUF_R19*4(r3) + lwz r18,CYGARC_JMP_BUF_R18*4(r3) + lwz r17,CYGARC_JMP_BUF_R17*4(r3) + lwz r16,CYGARC_JMP_BUF_R16*4(r3) + lwz r15,CYGARC_JMP_BUF_R15*4(r3) + lwz r14,CYGARC_JMP_BUF_R14*4(r3) + lwz r13,CYGARC_JMP_BUF_R13*4(r3) + lwz r2, CYGARC_JMP_BUF_R2*4(r3) + lwz sp, CYGARC_JMP_BUF_SP*4(r3) mr r3,r4 # return r4[arg1] blr - - #------------------------------------------------------------------------------ # end of context.S diff --git a/packages/hal/powerpc/arch/current/src/hal_intr.c b/packages/hal/powerpc/arch/current/src/hal_intr.c new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/src/hal_intr.c @@ -0,0 +1,225 @@ +//========================================================================== +// +// hal_intr.c +// +// PowerPC interrupt handlers +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-02-20 +// Purpose: PowerPC interrupt handlers +// Description: This file contains code to handle interrupt related issues +// on the PowerPC. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + +// These are the Cyg_Interrupt::HANDLED/CALL_DSR values. +#define Cyg_InterruptHANDLED 1 +#define Cyg_InterruptCALL_DSR 2 + +//#include // hal_call_isr +//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +// FIXME: This function should be in hal/common/.../include/hal_intr.inl +// or similar. +#include // hal_interrupt_x tables + +typedef cyg_uint32 cyg_ISR(cyg_uint32 vector, CYG_ADDRWORD data); + +extern void cyg_interrupt_post_dsr( CYG_ADDRWORD intr_obj ); + +static inline cyg_uint32 +hal_call_isr (cyg_uint32 vector) +{ + cyg_ISR *isr; + CYG_ADDRWORD data; + cyg_uint32 isr_ret; + + isr = (cyg_ISR*) hal_interrupt_handlers[vector]; + data = hal_interrupt_data[vector]; + + isr_ret = (*isr) (vector, data); + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + if (isr_ret & Cyg_InterruptCALL_DSR) { + cyg_interrupt_post_dsr (hal_interrupt_objects[vector]); + } +#endif + + return isr_ret & Cyg_InterruptHANDLED; +} + +//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +#ifdef CYG_HAL_POWERPC_MPC860 + +// Since the interrupt sources do not have fixed vectors on the 860 +// SIU, some arbitration is required. + +// More than one interrupt source can be programmed to use the same +// vector, so all sources on the same vector have to be queried to +// find the one raising the interrupt. This functionality has not been +// implemented, but the arbiter functions for each of the SIU +// interrupt sources can be called in sequence without change. + + + +// Timebase interrupt can be caused by match on either reference A +// or B. +// Note: If only one interrupt source is assigned per vector, and only +// reference interrupt A or B is used, this ISR is not +// necessary. Attach the timerbase reference A or B ISR directly to +// the LVLx vector instead. +externC cyg_uint32 +hal_arbitration_isr_tb (CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + cyg_uint32 isr_ret; + cyg_uint16 tbscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + if (tbscr & CYGARC_REG_IMM_TBSCR_REFA) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_SIU_TB_A); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + if (tbscr & CYGARC_REG_IMM_TBSCR_REFB) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_SIU_TB_B); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + return 0; +} + +// Periodic interrupt. +// Note: If only one interrupt source is assigned per vector, this ISR +// is not necessary. Attach the periodic interrupt ISR directly to the +// LVLx vector instead. +externC cyg_uint32 +hal_arbitration_isr_pit (CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + cyg_uint32 isr_ret; + cyg_uint16 piscr; + + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + if (piscr & CYGARC_REG_IMM_PISCR_PS) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_SIU_PIT); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + return 0; +} + +// Real time clock interrupts can be caused by the alarm or +// once-per-second. +// Note: If only one interrupt source is assigned per vector, and only +// the alarm or once-per-second interrupt is used, this ISR is not +// necessary. Attach the alarm or once-per-second ISR directly to the +// LVLx vector instead. +externC cyg_uint32 +hal_arbitration_isr_rtc (CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + cyg_uint32 isr_ret; + cyg_uint16 rtcsc; + + HAL_READ_UINT16 (CYGARC_REG_IMM_RTCSC, rtcsc); + if (rtcsc & CYGARC_REG_IMM_RTCSC_SEC) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_SIU_RTC_SEC); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + if (rtcsc & CYGARC_REG_IMM_RTCSC_ALR) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_SIU_RTC_ALR); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + return 0; +} + +// Communication Processor Module interrupt can be caused by any of +// the CPM sources. +externC cyg_uint32 +hal_arbitration_isr_cpm (CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + cyg_uint32 isr_ret; + cyg_uint16 civr; + + HAL_WRITE_UINT16 (CYGARC_REG_IMM_CIVR, CYGARC_REG_IMM_CIVR_IACK); + HAL_READ_UINT16 (CYGARC_REG_IMM_CIVR, civr); + civr >>= CYGARC_REG_IMM_CIVR_VECTOR_SHIFT; + if (civr) { + isr_ret = hal_call_isr (CYGNUM_HAL_INTERRUPT_CPM_LAST - civr); + + CYG_ASSERT (isr_ret & Cyg_InterruptHANDLED, + "Interrupt not handled"); + +#ifndef CYGSEM_HAL_COMMON_INTERRUPTS_CHECK_ALL_SOURCES + return isr_ret; +#endif + } + + return 0; +} + +#endif // ifdef CYG_HAL_POWERPC_MPC860 + +// ------------------------------------------------------------------------- +// EOF hal_intr.c diff --git a/packages/hal/powerpc/arch/current/src/hal_misc.c b/packages/hal/powerpc/arch/current/src/hal_misc.c --- a/packages/hal/powerpc/arch/current/src/hal_misc.c +++ b/packages/hal/powerpc/arch/current/src/hal_misc.c @@ -1,10 +1,10 @@ -//============================================================================= +//========================================================================== // // hal_misc.c // // HAL miscellaneous functions // -//============================================================================= +//========================================================================== //####COPYRIGHTBEGIN#### // // ------------------------------------------- @@ -22,51 +22,74 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### -//============================================================================= +//========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-11-12 -// Purpose: HAL miscellaneous functions -// Description: This file contains miscellaneous functions provided by the -// HAL. +// Author(s): nickg, jskov +// Contributors: nickg, jskov, +// jlarmour +// Date: 1999-02-20 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. // //####DESCRIPTIONEND#### // -//============================================================================= +//=========================================================================== #include +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include // SPR definitions + #include #include // tracing macros #include // assertion macros +#include // diag_printf #include // HAL header +#include // HAL cache +#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ + defined(CYGPKG_HAL_EXCEPTIONS) +# include // HAL interrupts/exceptions +#endif //--------------------------------------------------------------------------- +// Functions used during initialization. -void cyg_hal_invoke_constructors (void) -{ - static int initialized = 0; +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; - if (! initialized) - { - typedef void (*pfunc) (void); - extern pfunc __CTOR_LIST__[]; - extern pfunc __CTOR_END__[]; - pfunc *p; - - initialized = 1; - - for (p = &__CTOR_END__[0]-1; p >= __CTOR_LIST__; p--){ - (*p) (); +void +cyg_hal_invoke_constructors (void) +{ +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; } } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) + (*p) (); +#endif } // Override any __eabi the compiler might generate. We don't want @@ -80,7 +103,8 @@ externC void __handle_exception (void); externC HAL_SavedRegisters *_hal_registers; -void exception_handler(HAL_SavedRegisters *regs) +void +cyg_hal_exception_handler(HAL_SavedRegisters *regs) { #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS @@ -91,14 +115,37 @@ void exception_handler(HAL_SavedRegister __handle_exception(); -#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && defined(CYGPKG_HAL_EXCEPTIONS) +#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ + defined(CYGPKG_HAL_EXCEPTIONS) + int vector = regs->vector>>8; // We should decode the vector and pass a more appropriate // value as the second argument. For now we simply pass a // pointer to the saved registers. We should also divert // breakpoint and other debug vectors into the debug stubs. - deliver_exception( regs->vector>>8, (CYG_ADDRWORD)regs ); + if (vector==CYGNUM_HAL_VECTOR_PROGRAM) { + int srr1; + CYGARC_MFSPR(CYGARC_REG_SRR1, srr1); // get srr1 + + switch ((srr1 >> 17) & 0xf) { + case 1: + vector = CYGNUM_HAL_EXCEPTION_TRAP; + break; + case 2: + vector = CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION; + break; + case 4: + vector = CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION; + break; + case 8: + vector = CYGNUM_HAL_EXCEPTION_FPU; + break; + default: + CYG_FAIL("Unknown PROGRAM exception!!"); + } + } + cyg_hal_deliver_exception( vector, (CYG_ADDRWORD)regs ); #else @@ -112,9 +159,11 @@ void exception_handler(HAL_SavedRegister //--------------------------------------------------------------------------- // Default ISR -externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +externC cyg_uint32 +hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) { - CYG_TRACE1(true, "Interrupt: %d", vector); + diag_printf("Interrupt: %d\n", vector); + CYG_FAIL("Spurious Interrupt!!!"); return 0; } @@ -122,9 +171,282 @@ externC cyg_uint32 hal_default_isr(CYG_A //--------------------------------------------------------------------------- // Idle thread action -void hal_idle_thread_action( cyg_uint32 count ) +void +hal_idle_thread_action( cyg_uint32 count ) { } //--------------------------------------------------------------------------- +// Use MMU resources to map memory regions. +// Takes and returns an int used to ID the MMU resource to use. This ID +// is increased as resources are used and should be used for subsequent +// invocations. +static int +hal_map_memory (int id,CYG_ADDRESS virt, CYG_ADDRESS phys, + cyg_int32 size, cyg_uint8 flags) +{ +#ifdef CYG_HAL_POWERPC_MPC603 + { + // Use BATs to map the memory. + cyg_uint32 ubat, lbat; + + ubat = (virt & UBAT_BEPIMASK) | UBAT_VS | UBAT_VP; + lbat = (phys & LBAT_BRPNMASK); + if (flags & CYGARC_MEMDESC_CI) + lbat |= LBAT_I; + if (flags & CYGARC_MEMDESC_GUARDED) + lbat |= LBAT_G; + + // There are 4 BATs, size is programmable. + while (id < 4 && size > 0) { + cyg_uint32 blk_size = 128*1024; + cyg_uint32 bl = 0; + while (blk_size < 256*1024*1024 && blk_size < size) { + blk_size *= 2; + bl = (bl << 1) | 1; + } + ubat = (ubat & ~UBAT_BLMASK) | (bl << 2); + + switch (id) { + case 0: + CYGARC_MTSPR (IBAT0U, ubat); + CYGARC_MTSPR (IBAT0L, lbat); + CYGARC_MTSPR (DBAT0U, ubat); + CYGARC_MTSPR (DBAT0L, lbat); + break; + case 1: + CYGARC_MTSPR (IBAT1U, ubat); + CYGARC_MTSPR (IBAT1L, lbat); + CYGARC_MTSPR (DBAT1U, ubat); + CYGARC_MTSPR (DBAT1L, lbat); + break; + case 2: + CYGARC_MTSPR (IBAT2U, ubat); + CYGARC_MTSPR (IBAT2L, lbat); + CYGARC_MTSPR (DBAT2U, ubat); + CYGARC_MTSPR (DBAT2L, lbat); + break; + case 3: + CYGARC_MTSPR (IBAT3U, ubat); + CYGARC_MTSPR (IBAT3L, lbat); + CYGARC_MTSPR (DBAT3U, ubat); + CYGARC_MTSPR (DBAT3L, lbat); + break; + } + + size -= blk_size; + id++; + } + } +#endif + + +#ifdef CYG_HAL_POWERPC_MPC8xx + { + // The MPC8xx CPUs do not have BATs. Fortunately we don't + // currently use the MMU, so we can simulate BATs by using the + // TLBs. + + cyg_uint32 epn, rpn, ctr, twc; + int max_tlbs; + +#if defined(CYG_HAL_POWERPC_MPC860) + // There are 32 TLBs. + max_tlbs = 32; +#endif +#if defined(CYG_HAL_POWERPC_MPC823) || defined(CYG_HAL_POWERPC_MPC850) + // There are 8 TLBs. + max_tlbs = 8; +#endif + + epn = (virt & MI_EPN_EPNMASK) | MI_EPN_EV; + rpn = ((phys & MI_RPN_RPNMASK) + | MI_RPN_PPRWRW | MI_RPN_LPS | MI_RPN_SH | MI_RPN_V); + if (flags & CYGARC_MEMDESC_CI) + rpn |= MI_RPN_CI; + + twc = MI_TWC_PS8MB | MI_TWC_V; + if (flags & CYGARC_MEMDESC_GUARDED) + twc |= MI_TWC_G; + + // Ignore attempts to use more than max_tlbs. + while (id < max_tlbs && size > 0) { + ctr = id << MI_CTR_INDX_SHIFT; + + // Instruction TLB. + CYGARC_MTSPR (MI_TWC, twc); + CYGARC_MTSPR (MI_CTR, ctr); + CYGARC_MTSPR (MI_EPN, epn); + CYGARC_MTSPR (MI_RPN, rpn); + + // Data TLB. + { + cyg_uint32 drpn; + + // Need to mark data page as changed or an exception + // will be generated on first write to the page. + drpn = rpn | MD_RPN_CHANGED; + + CYGARC_MTSPR (MD_TWC, twc); + CYGARC_MTSPR (MD_CTR, ctr); + CYGARC_MTSPR (MD_EPN, epn); + CYGARC_MTSPR (MD_RPN, drpn); + } + + // Move to next 8MB block. + size -= 8*1024*1024; + epn += 8*1024*1024; + rpn += 8*1024*1024; + id++; + } + } +#endif + + return id; +} + + +// Initialize MMU to a sane (NOP) state. +static void +hal_clear_MMU (void) +{ +#ifdef CYG_HAL_POWERPC_MPC603 + { + cyg_uint32 ubat, lbat; + + // Initialize BATs with 0 -- VS&VP are unset, making all matches fail + ubat = 0; + lbat = 0; + + CYGARC_MTSPR (IBAT0U, ubat); + CYGARC_MTSPR (IBAT0L, lbat); + CYGARC_MTSPR (DBAT0U, ubat); + CYGARC_MTSPR (DBAT0L, lbat); + CYGARC_MTSPR (IBAT1U, ubat); + CYGARC_MTSPR (IBAT1L, lbat); + CYGARC_MTSPR (DBAT1U, ubat); + CYGARC_MTSPR (DBAT1L, lbat); + CYGARC_MTSPR (IBAT2U, ubat); + CYGARC_MTSPR (IBAT2L, lbat); + CYGARC_MTSPR (DBAT2U, ubat); + CYGARC_MTSPR (DBAT2L, lbat); + CYGARC_MTSPR (IBAT3U, ubat); + CYGARC_MTSPR (IBAT3L, lbat); + CYGARC_MTSPR (DBAT3U, ubat); + CYGARC_MTSPR (DBAT3L, lbat); + } +#endif + +#ifdef CYG_HAL_POWERPC_MPC8xx + { + // Initialize TLBs with 0, Valid bits unset. + + cyg_uint32 ctr; + int id; + int max_tlbs; + +#if defined(CYG_HAL_POWERPC_MPC860) + // There are 32 TLBs. + max_tlbs = 32; +#endif +#if defined(CYG_HAL_POWERPC_MPC823) || defined(CYG_HAL_POWERPC_MPC850) + // There are 8 TLBs. + max_tlbs = 8; +#endif + + CYGARC_MTSPR (M_CASID, 0); + + for (id = 0; id < max_tlbs; id++) { + ctr = id << MI_CTR_INDX_SHIFT; + + // Instruction TLBs. + CYGARC_MTSPR (MI_TWC, 0); + CYGARC_MTSPR (MI_CTR, ctr); + CYGARC_MTSPR (MI_EPN, 0); + CYGARC_MTSPR (MI_RPN, 0); + // Data TLBs. + CYGARC_MTSPR (MD_TWC, 0); + CYGARC_MTSPR (MD_CTR, ctr); + CYGARC_MTSPR (MD_EPN, 0); + CYGARC_MTSPR (MD_RPN, 0); + } + } +#endif +} + +// The memory map is weakly defined, allowing the application to redefine +// it if necessary. The regions defined below are the minimum requirements. +cyg_memdesc_t cyg_hal_mem_map[] CYGBLD_ATTRIB_WEAK = { +#ifdef CYGPKG_HAL_POWERPC_COGENT + // Mapping for the Cogent CMA101/102 boards. + {0xfff00000, 0xfff00000, 0x00100000, + CYGARC_MEMDESC_CI}, // ROM region + {0xff000000, 0xff000000, 0x00100000, + CYGARC_MEMDESC_CI}, // MCP registers + {0x0e000000, 0x0e000000, 0x01000000, + CYGARC_MEMDESC_CI}, // IO registers + {0x00000000, 0x00000000, 0x00800000, + 0}, // Main memory +#endif +#ifdef CYGPKG_HAL_POWERPC_SIM + // Mapping for the simulator. This is only used for special debugging: + // CYG_MSR in vectors.S must be changed to enable the MMU. + {0x00000000, 0x00000000, 0x00800000, + 0}, // Main memory + {0xf0000000, 0xf0000000, 0x00020000, + CYGARC_MEMDESC_CI}, // diag registers +#endif + {0, 0, 0, 0} // Table end +}; + +externC void hal_MMU_init (void) +{ + int id = 0; + int i = 0; + + hal_clear_MMU (); + + while (cyg_hal_mem_map[i].size) { + id = hal_map_memory (id, + cyg_hal_mem_map[i].virtual_addr, + cyg_hal_mem_map[i].physical_addr, + cyg_hal_mem_map[i].size, + cyg_hal_mem_map[i].flags); + i++; + } +} + +//--------------------------------------------------------------------------- +// Initial cache enabling +externC void +hal_enable_caches(void) +{ +#ifdef CYGPKG_HAL_POWERPC_COGENT + // Initialize caches. + HAL_ICACHE_UNLOCK_ALL(); + HAL_DCACHE_UNLOCK_ALL(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_DCACHE_INVALIDATE_ALL(); + + // Enable caches. +#if defined(CYG_HAL_STARTUP_RAM) + // Cogent board doesn't support burst access to the ROM and on the + // MPC8xx caches require burst. + HAL_ICACHE_ENABLE(); + HAL_DCACHE_ENABLE(); +#endif +#endif + +#ifdef CYG_HAL_POWERPC_MPC8xx + // Disable serialization + { + cyg_uint32 ictrl; + CYGARC_MFSPR (ICTRL, ictrl); + ictrl |= ICTRL_NOSERSHOW; + CYGARC_MTSPR (ICTRL, ictrl); + } +#endif +} + +//--------------------------------------------------------------------------- // End of hal_misc.c diff --git a/packages/hal/powerpc/arch/current/src/powerpc.ld b/packages/hal/powerpc/arch/current/src/powerpc.ld new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/src/powerpc.ld @@ -0,0 +1,138 @@ +/*========================================================================== +// +// powerpc.ld +// +// Linker script for PowerPC +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-01-18 +// Purpose: PowerPC Linker script +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 8 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + + +#define SECTIONS_BEGIN + +#define SECTION_vectors(_region_, _vma_, _lma_) \ + .vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP(*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = .; \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { __FIXUP_START__ = ABSOLUTE(.); *(.fixup) __FIXUP_END__ = ABSOLUTE(.);}\ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { __EXCEPT_START__ = ABSOLUTE(.); *(.gcc_except_table) \ + __EXCEPT_END__ = ABSOLUTE(.);} \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE(.); *(.data*) \ + __GOT1_START__ = ABSOLUTE(.); *(.got1) __GOT1_END__ = ABSOLUTE(.); \ + /* Put .ctors and .dtors next to the .got2 section, so that */ \ + /* the pointers get relocated with -mrelocatable. */ \ + . = ALIGN(8); __CTOR_LIST__ = ABSOLUTE(.); \ + KEEP(*(SORT(.ctors*))) __CTOR_END__ = ABSOLUTE(.); \ + __DTOR_LIST__ = ABSOLUTE(.); \ + KEEP(*(SORT(.dtors*))) __DTOR_END__ = ABSOLUTE(.); \ + . = ALIGN(8); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __GOT2_START__ = ABSOLUTE(.); *(.got2) __GOT2_END__ = ABSOLUTE(.); \ + __GOT_START = ABSOLUTE(.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE(. + 32768); \ + _SDA_BASE_ = ABSOLUTE(.); *(.got.plt) *(.got) \ + __GOT_END__ = ABSOLUTE(.); *(.dynamic) \ + /* We want the small data sections together, so single-instruction */ \ + /* offsets can access them all, and initialized data all before */ \ + /* uninitialized, so we can shorten the on-disk segment size. */ \ + __SDATA_START__ = ABSOLUTE(.); *(.sdata) \ + __SDATA2_START__ = ABSOLUTE(.); *(.sdata2) } \ + > _region_ \ + __rom_data_start = LOADADDR(.data); \ + __ram_data_end = .; PROVIDE(__ram_data_end = .); \ + _edata = .; PROVIDE (edata = .); + +#define SECTION_sbss(_region_, _vma_, _lma_) \ + .sbss _vma_ : _lma_ \ + { __sbss_start = ABSOLUTE (.); \ + __SBSS_START__ = ABSOLUTE(.); *(.sbss) __SBSS_END__ = ABSOLUTE(.); \ + __SBSS2_START__ = ABSOLUTE(.); *(.sbss2) __SBSS2_END__ = ABSOLUTE(.); \ + *(.scommon) \ + __sbss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + FORCE_OUTPUT; *(.dynbss) *(.bss) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include +#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/powerpc/arch/current/src/ppc_860.h b/packages/hal/powerpc/arch/current/src/ppc_860.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/src/ppc_860.h @@ -0,0 +1,1297 @@ +#ifndef CYGONCE_PPC_860_H +#define CYGONCE_PPC_860_H + +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// The style of programming used in this file may not comply with the +// eCos programming guidelines. Please do not use as a base for other +// files. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Contributed by: Kevin Hester +// Maintained by: +// See also: +// Motorola's "Example Software Initializing the SMC as a UART" package +// (smc2.zip) at: +// http://www.mot.com/SPS/RISC/netcomm/tools/index.html#MPC860_table +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= + +#include + +/****************************************************************************** +* +* Definitions of Parameter RAM entries for each peripheral and mode +* +******************************************************************************/ + +/*---------------------------------------------------------------------------*/ +/* HDLC parameter RAM (SCC) */ +/*---------------------------------------------------------------------------*/ + +struct hdlc_pram + +{ + + /*-------------------*/ + /* SCC parameter RAM */ + /*-------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*-----------------------------*/ + /* HDLC specific parameter RAM */ + /*-----------------------------*/ + + cyg_uint8 RESERVED1[4]; /* Reserved area */ + cyg_uint32 c_mask; /* CRC constant */ + cyg_uint32 c_pres; /* CRC preset */ + cyg_uint16 disfc; /* discarded frame counter */ + cyg_uint16 crcec; /* CRC error counter */ + cyg_uint16 abtsc; /* abort sequence counter */ + cyg_uint16 nmarc; /* nonmatching address rx cnt */ + cyg_uint16 retrc; /* frame retransmission cnt */ + cyg_uint16 mflr; /* maximum frame length reg */ + cyg_uint16 max_cnt; /* maximum length counter */ + cyg_uint16 rfthr; /* received frames threshold */ + cyg_uint16 rfcnt; /* received frames count */ + cyg_uint16 hmask; /* user defined frm addr mask */ + cyg_uint16 haddr1; /* user defined frm address 1 */ + cyg_uint16 haddr2; /* user defined frm address 2 */ + cyg_uint16 haddr3; /* user defined frm address 3 */ + cyg_uint16 haddr4; /* user defined frm address 4 */ + cyg_uint16 tmp; /* temp */ + cyg_uint16 tmp_mb; /* temp */ +}; + + +/*-------------------------------------------------------------------------*/ +/* ASYNC HDLC parameter RAM (SCC) */ +/*-------------------------------------------------------------------------*/ + +struct async_hdlc_pram + +{ + + /*-------------------*/ + /* SCC parameter RAM */ + /*-------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*-----------------------------------*/ + /* ASYNC HDLC specific parameter RAM */ + /*-----------------------------------*/ + + cyg_uint8 RESERVED2[4]; /* Reserved area */ + cyg_uint32 c_mask; /* CRC constant */ + cyg_uint32 c_pres; /* CRC preset */ + cyg_uint16 bof; /* begining of flag character */ + cyg_uint16 eof; /* end of flag character */ + cyg_uint16 esc; /* control escape character */ + cyg_uint8 RESERVED3[4]; /* Reserved area */ + cyg_uint16 zero; /* zero */ + cyg_uint8 RESERVED4[2]; /* Reserved area */ + cyg_uint16 rfthr; /* received frames threshold */ + cyg_uint8 RESERVED5[4]; /* Reserved area */ + cyg_uint32 txctl_tbl; /* Tx ctl char mapping table */ + cyg_uint32 rxctl_tbl; /* Rx ctl char mapping table */ + cyg_uint16 nof; /* Number of opening flags */ +}; + + +/*--------------------------------------------------------------------------*/ +/* UART parameter RAM (SCC) */ +/*--------------------------------------------------------------------------*/ + +/*----------------------------------------*/ +/* bits in uart control characters table */ +/*----------------------------------------*/ + +#define CC_INVALID 0x8000 /* control character is valid */ +#define CC_REJ 0x4000 /* don't store char in buffer */ +#define CC_CHAR 0x00ff /* control character */ + +/*------*/ +/* UART */ +/*------*/ + +struct uart_pram + +{ + /*-------------------*/ + /* SCC parameter RAM */ + /*-------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rx_temp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*------------------------------*/ + /* UART specific parameter RAM */ + /*------------------------------*/ + + cyg_uint8 RESERVED6[8]; /* Reserved area */ + cyg_uint16 max_idl; /* maximum idle characters */ + cyg_uint16 idlc; /* rx idle counter (internal) */ + cyg_uint16 brkcr; /* break count register */ + + cyg_uint16 parec; /* Rx parity error counter */ + cyg_uint16 frmec; /* Rx framing error counter */ + cyg_uint16 nosec; /* Rx noise counter */ + cyg_uint16 brkec; /* Rx break character counter */ + cyg_uint16 brkln; /* Reaceive break length */ + + cyg_uint16 uaddr1; /* address character 1 */ + cyg_uint16 uaddr2; /* address character 2 */ + cyg_uint16 rtemp; /* temp storage */ + cyg_uint16 toseq; /* Tx out of sequence char */ + cyg_uint16 cc[8]; /* Rx control characters */ + cyg_uint16 rccm; /* Rx control char mask */ + cyg_uint16 rccr; /* Rx control char register */ + cyg_uint16 rlbc; /* Receive last break char */ +}; + + +/*--------------------------------------------------------------------------- +* BISYNC parameter RAM (SCC) +*--------------------------------------------------------------------------*/ + +struct bisync_pram + +{ + /*-------------------*/ + /* SCC parameter RAM */ + /*-------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*--------------------------------*/ + /* BISYNC specific parameter RAM */ + /*--------------------------------*/ + + cyg_uint8 RESERVED7[4]; /* Reserved area */ + cyg_uint32 crcc; /* CRC Constant Temp Value */ + cyg_uint16 prcrc; /* Preset Receiver CRC-16/LRC */ + cyg_uint16 ptcrc; /* Preset Transmitter CRC-16/LRC */ + cyg_uint16 parec; /* Receive Parity Error Counter */ + cyg_uint16 bsync; /* BISYNC SYNC Character */ + cyg_uint16 bdle; /* BISYNC DLE Character */ + cyg_uint16 cc[8]; /* Rx control characters */ + cyg_uint16 rccm; /* Receive Control Character Mask */ +}; + + +/*-------------------------------------------------------------------------*/ +/* Transparent mode parameter RAM (SCC) */ +/*-------------------------------------------------------------------------*/ + +struct transparent_pram + +{ + /*--------------------*/ + /* SCC parameter RAM */ + /*--------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*-------------------------------------*/ + /* TRANSPARENT specific parameter RAM */ + /*-------------------------------------*/ + + cyg_uint32 crc_p; /* CRC Preset */ + cyg_uint32 crc_c; /* CRC constant */ +}; + + +/*-------------------------------------------------------------------------*/ +/* Ethernet parameter RAM (SCC) */ +/*-------------------------------------------------------------------------*/ + +struct ethernet_pram + +{ + /*--------------------*/ + /* SCC parameter RAM */ + /*--------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint32 rcrc; /* temp receive CRC */ + cyg_uint32 tcrc; /* temp transmit CRC */ + + /*---------------------------------*/ + /* ETHERNET specific parameter RAM */ + /*---------------------------------*/ + + cyg_uint32 c_pres; /* preset CRC */ + cyg_uint32 c_mask; /* constant mask for CRC */ + cyg_uint32 crcec; /* CRC error counter */ + cyg_uint32 alec; /* alighnment error counter */ + cyg_uint32 disfc; /* discard frame counter */ + cyg_uint16 pads; /* short frame PAD characters */ + cyg_uint16 ret_lim; /* retry limit threshold */ + cyg_uint16 ret_cnt; /* retry limit counter */ + cyg_uint16 mflr; /* maximum frame length reg */ + cyg_uint16 minflr; /* minimum frame length reg */ + cyg_uint16 maxd1; /* maximum DMA1 length reg */ + cyg_uint16 maxd2; /* maximum DMA2 length reg */ + cyg_uint16 maxd; /* rx max DMA */ + cyg_uint16 dma_cnt; /* rx dma counter */ + cyg_uint16 max_b; /* max bd byte count */ + cyg_uint16 gaddr1; /* group address filter 1 */ + cyg_uint16 gaddr2; /* group address filter 2 */ + cyg_uint16 gaddr3; /* group address filter 3 */ + cyg_uint16 gaddr4; /* group address filter 4 */ + cyg_uint32 tbuf0_data0; /* save area 0 - current frm */ + cyg_uint32 tbuf0_data1; /* save area 1 - current frm */ + cyg_uint32 tbuf0_rba0; + cyg_uint32 tbuf0_crc; + cyg_uint16 tbuf0_bcnt; + cyg_uint16 paddr_h; /* physical address (MSB) */ + cyg_uint16 paddr_m; /* physical address */ + cyg_uint16 paddr_l; /* physical address (LSB) */ + cyg_uint16 p_per; /* persistence */ + cyg_uint16 rfbd_ptr; /* rx first bd pointer */ + cyg_uint16 tfbd_ptr; /* tx first bd pointer */ + cyg_uint16 tlbd_ptr; /* tx last bd pointer */ + cyg_uint32 tbuf1_data0; /* save area 0 - next frame */ + cyg_uint32 tbuf1_data1; /* save area 1 - next frame */ + cyg_uint32 tbuf1_rba0; + cyg_uint32 tbuf1_crc; + cyg_uint16 tbuf1_bcnt; + cyg_uint16 tx_len; /* tx frame length counter */ + cyg_uint16 iaddr1; /* individual address filter 1*/ + cyg_uint16 iaddr2; /* individual address filter 2*/ + cyg_uint16 iaddr3; /* individual address filter 3*/ + cyg_uint16 iaddr4; /* individual address filter 4*/ + cyg_uint16 boff_cnt; /* back-off counter */ + cyg_uint16 taddr_h; /* temp address (MSB) */ + cyg_uint16 taddr_m; /* temp address */ + cyg_uint16 taddr_l; /* temp address (LSB) */ +}; + + +/*------------------------------------------------------------------*/ +/* QMC definitions */ +/*------------------------------------------------------------------*/ + + +struct global_qmc_pram { + + cyg_uint32 mcbase; /* Multichannel Base pointer */ + cyg_uint16 qmcstate; /* Multichannel Controller state */ + cyg_uint16 mrblr; /* Maximum Receive Buffer Length */ + cyg_uint16 tx_s_ptr; /* TSATTx Pointer */ + cyg_uint16 rxptr; /* Current Time slot entry in TSATRx */ + cyg_uint16 grfthr; /* Global Receive frame threshold */ + cyg_uint16 grfcnt; /* Global Receive Frame Count */ + cyg_uint32 intbase; /* Multichannel Base address */ + cyg_uint32 intptr; /* Pointer to interrupt queue */ + cyg_uint16 rx_s_ptr; /* TSATRx Pointer */ + cyg_uint16 txptr; /* Current Time slot entry in TSATTx */ + cyg_uint32 c_mask32; /* CRC Constant (debb20e3) */ + cyg_uint16 tsatrx[32]; /* Time Slot Assignment Table Rx */ + cyg_uint16 tsattx[32]; /* Time Slot Assignment Table Tx */ + cyg_uint16 c_mask16; /* CRC Constant (f0b8) */ + +}; + + + /*------------------------------------------*/ + /* QMC HDLC channel specific parameter RAM */ + /*------------------------------------------*/ + +struct qmc_hdlc_pram { + + cyg_uint16 tbase; /* Tx Buffer Descriptors Base Address */ + cyg_uint16 chamr; /* Channel Mode Register */ + cyg_uint32 tstate; /* Tx Internal State */ + cyg_uint32 txintr; /* Tx Internal Data Pointer */ + cyg_uint16 tbptr; /* Tx Buffer Descriptor Pointer */ + cyg_uint16 txcntr; /* Tx Internal Byte Count */ + cyg_uint32 tupack; /* (Tx Temp) */ + cyg_uint32 zistate; /* Zero Insertion machine state */ + cyg_uint32 tcrc; /* Temp Transmit CRC */ + cyg_uint16 intmsk; /* Channel's interrupt mask flags */ + cyg_uint16 bdflags; + cyg_uint16 rbase; /* Rx Buffer Descriptors Base Address */ + cyg_uint16 mflr; /* Max Frame Length Register */ + cyg_uint32 rstate; /* Rx Internal State */ + cyg_uint32 rxintr; /* Rx Internal Data Pointer */ + cyg_uint16 rbptr; /* Rx Buffer Descriptor Pointer */ + cyg_uint16 rxbyc; /* Rx Internal Byte Count */ + cyg_uint32 rpack; /* (Rx Temp) */ + cyg_uint32 zdstate; /* Zero Deletion machine state */ + cyg_uint32 rcrc; /* Temp Transmit CRC */ + cyg_uint16 maxc; /* Max_length counter */ + cyg_uint16 tmp_mb; /* Temp */ +}; + + + /*-------------------------------------------------*/ + /* QMC Transparent channel specific parameter RAM */ + /*-------------------------------------------------*/ + +struct qmc_tran_pram { + + cyg_uint16 tbase; /* Tx Bufer Descriptors Base Address */ + cyg_uint16 chamr; /* Channel Mode Register */ + cyg_uint32 tstate; /* Tx Internal State */ + cyg_uint32 txintr; /* Tx Internal Data Pointer */ + cyg_uint16 tbptr; /* Tx Buffer Descriptor Pointer */ + cyg_uint16 txcntr; /* Tx Internal Byte Count */ + cyg_uint32 tupack; /* (Tx Temp) */ + cyg_uint32 zistate; /* Zero Insertion machine state */ + cyg_uint32 RESERVED8; + cyg_uint16 intmsk; /* Channel's interrupt mask flags */ + cyg_uint16 bdflags; + cyg_uint16 rbase; /* Rx Buffer Descriptors Base Address */ + cyg_uint16 tmrblr; /* Max receive buffer length */ + cyg_uint32 rstate; /* Rx Internal State */ + cyg_uint32 rxintr; /* Rx Internal Data Pointer */ + cyg_uint16 rbptr; /* Rx Buffer Descriptor Pointer */ + cyg_uint16 rxbyc; /* Rx Internal Byte Count */ + cyg_uint32 rpack; /* (Rx Temp) */ + cyg_uint32 zdstate; /* Zero Deletion machine state */ + cyg_uint32 RESERVED9; /* Temp Transmit CRC */ + cyg_uint16 trnsync; /* Max_length counter */ + cyg_uint16 RESERVED10; /* Temp */ + +}; + +/*----------------------------------------------------------*/ +/* allows multiprotocol array declaration in the memory map */ +/*----------------------------------------------------------*/ + +struct qmc_chan_pram +{ + union + { + struct qmc_hdlc_pram h; + struct qmc_tran_pram t; + }h_or_t; +}; + + + +/*--------------------------------------------------------------------*/ +/* SMC UART parameter RAM */ +/*--------------------------------------------------------------------*/ + +struct smc_uart_pram + +{ + cyg_uint16 rbase; /* Rx BD Base Address */ + cyg_uint16 tbase; /* Tx BD Base Address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint16 max_idl; /* Maximum IDLE Characters */ + cyg_uint16 idlc; /* Temporary IDLE Counter */ + cyg_uint16 brkln; /* Last Rx Break Length */ + cyg_uint16 brkec; /* Rx Break Condition Counter */ + cyg_uint16 brkcr; /* Break Count Register (Tx) */ + cyg_uint16 r_mask; /* Temporary bit mask */ +}; + + +/*--------------------------------------------------------------------------*/ +/* SMC Transparent mode parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct smc_trnsp_pram + +{ + cyg_uint16 rbase; /* Rx BD Base Address */ + cyg_uint16 tbase; /* Tx BD Base Address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint16 RESERVED11[5]; /* Reserved */ +}; + + +/*--------------------------------------------------------------------------*/ +/* SPI parameter RAM */ +/*--------------------------------------------------------------------------*/ + +#define SPI_R 0x8000 /* Ready bit in BD */ + +struct spi_pram + +{ + cyg_uint16 rbase; /* Rx BD Base Address */ + cyg_uint16 tbase; /* Tx BD Base Address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ +}; + + +/*--------------------------------------------------------------------------*/ +/* I2C parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct i2c_pram + +{ + /*--------------------*/ + /* I2C parameter RAM */ + /*--------------------*/ + + cyg_uint16 rbase; /* RX BD base address */ + cyg_uint16 tbase; /* TX BD base address */ + cyg_uint8 rfcr; /* Rx function code */ + cyg_uint8 tfcr; /* Tx function code */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ +}; + + +/*--------------------------------------------------------------------------*/ +/* PIP Centronics parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct centronics_pram + +{ + cyg_uint16 rbase; /* Rx BD Base Address */ + cyg_uint16 tbase; /* Tx BD Base Address */ + cyg_uint8 fcr; /* function code */ + cyg_uint8 smask; /* Status Mask */ + cyg_uint16 mrblr; /* Rx buffer length */ + cyg_uint32 rstate; /* Rx internal state */ + cyg_uint32 rptr; /* Rx internal data pointer */ + cyg_uint16 rbptr; /* rb BD Pointer */ + cyg_uint16 rcount; /* Rx internal byte count */ + cyg_uint32 rtemp; /* Rx temp */ + cyg_uint32 tstate; /* Tx internal state */ + cyg_uint32 tptr; /* Tx internal data pointer */ + cyg_uint16 tbptr; /* Tx BD pointer */ + cyg_uint16 tcount; /* Tx byte count */ + cyg_uint32 ttemp; /* Tx temp */ + cyg_uint16 max_sl; /* Maximum Silence period */ + cyg_uint16 sl_cnt; /* Silence Counter */ + cyg_uint16 char1; /* CONTROL char 1 */ + cyg_uint16 char2; /* CONTROL char 2 */ + cyg_uint16 char3; /* CONTROL char 3 */ + cyg_uint16 char4; /* CONTROL char 4 */ + cyg_uint16 char5; /* CONTROL char 5 */ + cyg_uint16 char6; /* CONTROL char 6 */ + cyg_uint16 char7; /* CONTROL char 7 */ + cyg_uint16 char8; /* CONTROL char 8 */ + cyg_uint16 rccm; /* Rx Control Char Mask */ + cyg_uint16 rccr; /* Rx Char Control Register */ +}; + + +/*--------------------------------------------------------------------------*/ +/* IDMA parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct idma_pram + +{ + cyg_uint16 ibase; /* IDMA BD Base Address */ + cyg_uint16 dcmr; /* DMA Channel Mode Register */ + cyg_uint32 sapr; /* Source Internal Data Pointer */ + cyg_uint32 dapr; /* Destination Internal Data Pointer */ + cyg_uint16 ibptr; /* Buffer Descriptor Pointer */ + cyg_uint16 write_sp; /* No description given in manual */ + cyg_uint32 s_byte_c; /* Internal Source Byte Count */ + cyg_uint32 d_byte_c; /* Internal Destination Byte Count */ + cyg_uint32 s_state; /* Internal State */ + cyg_uint32 itemp0; /* Temp Data Storage */ + cyg_uint32 itemp1; /* Temp Data Storage */ + cyg_uint32 itemp2; /* Temp Data Storage */ + cyg_uint32 itemp3; /* Temp Data Storage */ + cyg_uint32 sr_mem; /* Data Storage for Peripherial Write */ + cyg_uint16 read_sp; /* No description given in manual */ + cyg_uint16 nodesc0; /* Diff Between Source and Destination Residue*/ + cyg_uint16 nodesc1; /* Temp Storage Address Pointer */ + cyg_uint16 nodesc2; /* SR_MEM Byte Count */ + cyg_uint32 d_state; /* Internal State */ +}; + + + +/*--------------------------------------------------------------------------*/ +/* RISC timer parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct timer_pram + +{ + /*----------------------------*/ + /* RISC timers parameter RAM */ + /*----------------------------*/ + + cyg_uint16 tm_base; /* RISC timer table base adr */ + cyg_uint16 tm_ptr; /* RISC timer table pointer */ + cyg_uint16 r_tmr; /* RISC timer mode register */ + cyg_uint16 r_tmv; /* RISC timer valid register */ + cyg_uint32 tm_cmd; /* RISC timer cmd register */ + cyg_uint32 tm_cnt; /* RISC timer internal cnt */ +}; + + +/*--------------------------------------------------------------------------*/ +/* ROM Microcode parameter RAM */ +/*--------------------------------------------------------------------------*/ + +struct ucode_pram + +{ + /*---------------------------*/ + /* RISC ucode parameter RAM */ + /*---------------------------*/ + + cyg_uint16 rev_num; /* Ucode Revision Number */ + cyg_uint16 d_ptr; /* MISC Dump area pointer */ + cyg_uint32 temp1; /* MISC Temp1 */ + cyg_uint32 temp2; /* MISC Temp2 */ +}; + + +/*---------------------------------------------------------------------------*/ +/* Example structuring of user data area of memory at 0x2000 (base of DPRAM) */ +/* Note that this area can also be used by microcodes and the QMC channel */ +/* specific parameter ram. */ +/*---------------------------------------------------------------------------*/ + +struct user_data + +{ + + volatile cyg_uint8 udata_bd_ucode[0x200]; /* user data bd's or Ucode (small) */ + volatile cyg_uint8 udata_bd_ucode2[0x200]; /* user data bd's or Ucode (medium) */ + volatile cyg_uint8 udata_bd_ucode3[0x400]; /* user data bd's or Ucode (large) */ + volatile cyg_uint8 udata_bd[0x700]; /* user data bd's*/ + volatile cyg_uint8 ucode_ext[0x100]; /* Ucode Extension ram*/ + volatile cyg_uint8 RESERVED12[0x0c00]; /* Reserved area */ + +}; + + + +/***************************************************************************/ +/* */ +/* Definitions of Embedded PowerPC (EPPC) internal memory structures, */ +/* including registers and dual-port RAM */ +/* */ +/***************************************************************************/ + +typedef struct eppc + +{ + /*-----------------------------------*/ + /* BASE + 0x0000: INTERNAL REGISTERS */ + /*-----------------------------------*/ + + /*-----*/ + /* SIU */ + /*-----*/ + + volatile cyg_uint32 siu_mcr; /* module configuration reg */ + volatile cyg_uint32 siu_sypcr; /* System protection cnt */ + cyg_uint8 RESERVED13[0x6]; + volatile cyg_uint16 siu_swsr; /* sw service */ + volatile cyg_uint32 siu_sipend; /* Interrupt pend reg */ + volatile cyg_uint32 siu_simask; /* Interrupt mask reg */ + volatile cyg_uint32 siu_siel; /* Interrupt edge level mask reg */ + volatile cyg_uint32 siu_sivec; /* Interrupt vector */ + volatile cyg_uint32 siu_tesr; /* Transfer error status */ + volatile cyg_uint8 RESERVED14[0xc]; /* Reserved area */ + volatile cyg_uint32 dma_sdcr; /* SDMA configuration reg */ + cyg_uint8 RESERVED15[0x4c]; + + /*--------*/ + /* PCMCIA */ + /*--------*/ + + volatile cyg_uint32 pcmcia_pbr0; /* PCMCIA Base Reg: Window 0 */ + volatile cyg_uint32 pcmcia_por0; /* PCMCIA Option Reg: Window 0 */ + volatile cyg_uint32 pcmcia_pbr1; /* PCMCIA Base Reg: Window 1 */ + volatile cyg_uint32 pcmcia_por1; /* PCMCIA Option Reg: Window 1 */ + volatile cyg_uint32 pcmcia_pbr2; /* PCMCIA Base Reg: Window 2 */ + volatile cyg_uint32 pcmcia_por2; /* PCMCIA Option Reg: Window 2 */ + volatile cyg_uint32 pcmcia_pbr3; /* PCMCIA Base Reg: Window 3 */ + volatile cyg_uint32 pcmcia_por3; /* PCMCIA Option Reg: Window 3 */ + volatile cyg_uint32 pcmcia_pbr4; /* PCMCIA Base Reg: Window 4 */ + volatile cyg_uint32 pcmcia_por4; /* PCMCIA Option Reg: Window 4 */ + volatile cyg_uint32 pcmcia_pbr5; /* PCMCIA Base Reg: Window 5 */ + volatile cyg_uint32 pcmcia_por5; /* PCMCIA Option Reg: Window 5 */ + volatile cyg_uint32 pcmcia_pbr6; /* PCMCIA Base Reg: Window 6 */ + volatile cyg_uint32 pcmcia_por6; /* PCMCIA Option Reg: Window 6 */ + volatile cyg_uint32 pcmcia_pbr7; /* PCMCIA Base Reg: Window 7 */ + volatile cyg_uint32 pcmcia_por7; /* PCMCIA Option Reg: Window 7 */ + volatile cyg_uint8 RESERVED16[0x20]; /* Reserved area */ + volatile cyg_uint32 pcmcia_pgcra; /* PCMCIA Slot A Control Reg */ + volatile cyg_uint32 pcmcia_pgcrb; /* PCMCIA Slot B Control Reg */ + volatile cyg_uint32 pcmcia_pscr; /* PCMCIA Status Reg */ + volatile cyg_uint8 RESERVED17[0x4]; /* Reserved area */ + volatile cyg_uint32 pcmcia_pipr; /* PCMCIA Pins Value Reg */ + volatile cyg_uint8 RESERVED18[0x4]; /* Reserved area */ + volatile cyg_uint32 pcmcia_per; /* PCMCIA Enable Reg */ + volatile cyg_uint8 RESERVED19[0x4]; /* Reserved area */ + + /*------*/ + /* MEMC */ + /*------*/ + + volatile cyg_uint32 memc_br0; /* base register 0 */ + volatile cyg_uint32 memc_or0; /* option register 0 */ + volatile cyg_uint32 memc_br1; /* base register 1 */ + volatile cyg_uint32 memc_or1; /* option register 1 */ + volatile cyg_uint32 memc_br2; /* base register 2 */ + volatile cyg_uint32 memc_or2; /* option register 2 */ + volatile cyg_uint32 memc_br3; /* base register 3 */ + volatile cyg_uint32 memc_or3; /* option register 3 */ + volatile cyg_uint32 memc_br4; /* base register 3 */ + volatile cyg_uint32 memc_or4; /* option register 3 */ + volatile cyg_uint32 memc_br5; /* base register 3 */ + volatile cyg_uint32 memc_or5; /* option register 3 */ + volatile cyg_uint32 memc_br6; /* base register 3 */ + volatile cyg_uint32 memc_or6; /* option register 3 */ + volatile cyg_uint32 memc_br7; /* base register 3 */ + volatile cyg_uint32 memc_or7; /* option register 3 */ + volatile cyg_uint8 RESERVED20[0x24]; /* Reserved area */ + volatile cyg_uint32 memc_mar; /* Memory address */ + volatile cyg_uint32 memc_mcr; /* Memory command */ + volatile cyg_uint8 RESERVED21[0x4]; /* Reserved area */ + volatile cyg_uint32 memc_mamr; /* Machine A mode */ + volatile cyg_uint32 memc_mbmr; /* Machine B mode */ + volatile cyg_uint16 memc_mstat; /* Memory status */ + volatile cyg_uint16 memc_mptpr; /* Memory preidic timer prescalar */ + volatile cyg_uint32 memc_mdr; /* Memory data */ + volatile cyg_uint8 RESERVED22[0x80]; /* Reserved area */ + + /*---------------------------*/ + /* SYSTEM INTEGRATION TIMERS */ + /*---------------------------*/ + + volatile cyg_uint16 simt_tbscr; /* Time base stat&ctr */ + volatile cyg_uint8 RESERVED23[0x2]; /* Reserved area */ + volatile cyg_uint32 simt_tbreff0; /* Time base reference 0 */ + volatile cyg_uint32 simt_tbreff1; /* Time base reference 1 */ + volatile cyg_uint8 RESERVED24[0x14]; /* Reserved area */ + volatile cyg_uint16 simt_rtcsc; /* Realtime clk stat&cntr 1 */ + volatile cyg_uint8 RESERVED25[0x2]; /* Reserved area */ + volatile cyg_uint32 simt_rtc; /* Realtime clock */ + volatile cyg_uint32 simt_rtsec; /* Realtime alarm seconds */ + volatile cyg_uint32 simt_rtcal; /* Realtime alarm */ + volatile cyg_uint8 RESERVED26[0x10]; /* Reserved area */ + volatile cyg_uint32 simt_piscr; /* PIT stat&ctrl */ + volatile cyg_uint32 simt_pitc; /* PIT counter */ + volatile cyg_uint32 simt_pitr; /* PIT */ + volatile cyg_uint8 RESERVED27[0x34]; /* Reserved area */ + + /*---------------*/ + /* CLOCKS, RESET */ + /*---------------*/ + + volatile cyg_uint32 clkr_sccr; /* System clk cntrl */ + volatile cyg_uint32 clkr_plprcr; /* PLL reset&ctrl */ + volatile cyg_uint32 clkr_rsr; /* reset status */ + cyg_uint8 RESERVED28[0x74]; /* Reserved area */ + + /*--------------------------------*/ + /* System Integration Timers Keys */ + /*--------------------------------*/ + + volatile cyg_uint32 simt_tbscrk; /* Timebase Status&Ctrl Key */ + volatile cyg_uint32 simt_tbreff0k; /* Timebase Reference 0 Key */ + volatile cyg_uint32 simt_tbreff1k; /* Timebase Reference 1 Key */ + volatile cyg_uint32 simt_tbk; /* Timebase and Decrementer Key */ + cyg_uint8 RESERVED29[0x10]; /* Reserved area */ + volatile cyg_uint32 simt_rtcsck; /* Real-Time Clock Status&Ctrl Key */ + + volatile cyg_uint32 simt_rtck; /* Real-Time Clock Key */ + volatile cyg_uint32 simt_rtseck; /* Real-Time Alarm Seconds Key */ + volatile cyg_uint32 simt_rtcalk; /* Real-Time Alarm Key */ + cyg_uint8 RESERVED30[0x10]; /* Reserved area */ + volatile cyg_uint32 simt_piscrk; /* Periodic Interrupt Status&Ctrl Key */ + volatile cyg_uint32 simt_pitck; /* Periodic Interrupt Count Key */ + cyg_uint8 RESERVED31[0x38]; /* Reserved area */ + + /*----------------------*/ + /* Clock and Reset Keys */ + /*----------------------*/ + + volatile cyg_uint32 clkr_sccrk; /* System Clock Control Key */ + volatile cyg_uint32 clkr_plprcrk; /* PLL, Low Power and Reset Control Key */ + volatile cyg_uint32 clkr_rsrk; /* Reset Status Key */ + cyg_uint8 RESERVED32[0x4d4]; /* Reserved area */ + + /*-----*/ + /* I2C */ + /*-----*/ + + volatile cyg_uint8 i2c_i2mod; /* i2c mode */ + cyg_uint8 RESERVED33[3]; + volatile cyg_uint8 i2c_i2add; /* i2c address */ + cyg_uint8 RESERVED34[3]; + volatile cyg_uint8 i2c_i2brg; /* i2c brg */ + cyg_uint8 RESERVED35[3]; + volatile cyg_uint8 i2c_i2com; /* i2c command */ + cyg_uint8 RESERVED36[3]; + volatile cyg_uint8 i2c_i2cer; /* i2c event */ + cyg_uint8 RESERVED37[3]; + volatile cyg_uint8 i2c_i2cmr; /* i2c mask */ + volatile cyg_uint8 RESERVED38[0x8b]; /* Reserved area */ + + /*-----*/ + /* DMA */ + /*-----*/ + + volatile cyg_uint8 RESERVED39[0x4]; /* Reserved area */ + volatile cyg_uint32 dma_sdar; /* SDMA address reg */ + volatile cyg_uint8 RESERVED40[0x2]; /* Reserved area */ + volatile cyg_uint8 dma_sdsr; /* SDMA status reg */ + volatile cyg_uint8 RESERVED41[0x3]; /* Reserved area */ + volatile cyg_uint8 dma_sdmr; /* SDMA mask reg */ + volatile cyg_uint8 RESERVED42[0x1]; /* Reserved area */ + volatile cyg_uint8 dma_idsr1; /* IDMA1 status reg */ + volatile cyg_uint8 RESERVED43[0x3]; /* Reserved area */ + volatile cyg_uint8 dma_idmr1; /* IDMA1 mask reg */ + volatile cyg_uint8 RESERVED44[0x3]; /* Reserved area */ + volatile cyg_uint8 dma_idsr2; /* IDMA2 status reg */ + volatile cyg_uint8 RESERVED45[0x3]; /* Reserved area */ + volatile cyg_uint8 dma_idmr2; /* IDMA2 mask reg */ + volatile cyg_uint8 RESERVED46[0x13]; /* Reserved area */ + + /*--------------------------*/ + /* CPM Interrupt Controller */ + /*--------------------------*/ + + volatile cyg_uint16 cpmi_civr; /* CP interrupt vector reg */ + volatile cyg_uint8 RESERVED47[0xe]; /* Reserved area */ + volatile cyg_uint32 cpmi_cicr; /* CP interrupt configuration reg */ + volatile cyg_uint32 cpmi_cipr; /* CP interrupt pending reg */ + volatile cyg_uint32 cpmi_cimr; /* CP interrupt mask reg */ + volatile cyg_uint32 cpmi_cisr; /* CP interrupt in-service reg */ + + /*----------*/ + /* I/O port */ + /*----------*/ + + volatile cyg_uint16 pio_padir; /* port A data direction reg */ + volatile cyg_uint16 pio_papar; /* port A pin assignment reg */ + volatile cyg_uint16 pio_paodr; /* port A open drain reg */ + volatile cyg_uint16 pio_padat; /* port A data register */ + volatile cyg_uint8 RESERVED48[0x8]; /* Reserved area */ + volatile cyg_uint16 pio_pcdir; /* port C data direction reg */ + volatile cyg_uint16 pio_pcpar; /* port C pin assignment reg */ + volatile cyg_uint16 pio_pcso; /* port C special options */ + volatile cyg_uint16 pio_pcdat; /* port C data register */ + volatile cyg_uint16 pio_pcint; /* port C interrupt cntrl reg */ + cyg_uint8 RESERVED49[6]; + volatile cyg_uint16 pio_pddir; /* port D Data Direction reg */ + volatile cyg_uint16 pio_pdpar; /* port D pin assignment reg */ + cyg_uint8 RESERVED50[2]; + volatile cyg_uint16 pio_pddat; /* port D data reg */ + volatile cyg_uint8 RESERVED51[0x8]; /* Reserved area */ + + /*-----------*/ + /* CPM Timer */ + /*-----------*/ + + volatile cyg_uint16 timer_tgcr; /* timer global configuration reg */ + volatile cyg_uint8 RESERVED52[0xe]; /* Reserved area */ + volatile cyg_uint16 timer_tmr1; /* timer 1 mode reg */ + volatile cyg_uint16 timer_tmr2; /* timer 2 mode reg */ + volatile cyg_uint16 timer_trr1; /* timer 1 referance reg */ + volatile cyg_uint16 timer_trr2; /* timer 2 referance reg */ + volatile cyg_uint16 timer_tcr1; /* timer 1 capture reg */ + volatile cyg_uint16 timer_tcr2; /* timer 2 capture reg */ + volatile cyg_uint16 timer_tcn1; /* timer 1 counter reg */ + volatile cyg_uint16 timer_tcn2; /* timer 2 counter reg */ + volatile cyg_uint16 timer_tmr3; /* timer 3 mode reg */ + volatile cyg_uint16 timer_tmr4; /* timer 4 mode reg */ + volatile cyg_uint16 timer_trr3; /* timer 3 referance reg */ + volatile cyg_uint16 timer_trr4; /* timer 4 referance reg */ + volatile cyg_uint16 timer_tcr3; /* timer 3 capture reg */ + volatile cyg_uint16 timer_tcr4; /* timer 4 capture reg */ + volatile cyg_uint16 timer_tcn3; /* timer 3 counter reg */ + volatile cyg_uint16 timer_tcn4; /* timer 4 counter reg */ + volatile cyg_uint16 timer_ter1; /* timer 1 event reg */ + volatile cyg_uint16 timer_ter2; /* timer 2 event reg */ + volatile cyg_uint16 timer_ter3; /* timer 3 event reg */ + volatile cyg_uint16 timer_ter4; /* timer 4 event reg */ + volatile cyg_uint8 RESERVED53[0x8]; /* Reserved area */ + + /*----*/ + /* CP */ + /*----*/ + + volatile cyg_uint16 cp_cr; /* command register */ + volatile cyg_uint8 RESERVED54[0x2]; /* Reserved area */ + volatile cyg_uint16 cp_rccr; /* main configuration reg */ + volatile cyg_uint8 RESERVED55; /* Reserved area */ + volatile cyg_uint8 cp_resv1; /* Reserved reg */ + volatile cyg_uint32 cp_resv2; /* Reserved reg */ + volatile cyg_uint16 cp_rctr1; /* ram break register 1 */ + volatile cyg_uint16 cp_rctr2; /* ram break register 2 */ + volatile cyg_uint16 cp_rctr3; /* ram break register 3 */ + volatile cyg_uint16 cp_rctr4; /* ram break register 4 */ + volatile cyg_uint8 RESERVED56[0x2]; /* Reserved area */ + volatile cyg_uint16 cp_rter; /* RISC timers event reg */ + volatile cyg_uint8 RESERVED57[0x2]; /* Reserved area */ + volatile cyg_uint16 cp_rtmr; /* RISC timers mask reg */ + volatile cyg_uint8 RESERVED58[0x14]; /* Reserved area */ + + /*-----*/ + /* BRG */ + /*-----*/ + + volatile cyg_uint32 brgc1; /* BRG1 configuration reg */ + volatile cyg_uint32 brgc2; /* BRG2 configuration reg */ + volatile cyg_uint32 brgc3; /* BRG3 configuration reg */ + volatile cyg_uint32 brgc4; /* BRG4 configuration reg */ + + /*---------------*/ + /* SCC registers */ + /*---------------*/ + + struct scc_regs + + { + volatile cyg_uint32 scc_gsmr_l; /* SCC Gen mode (LOW) */ + volatile cyg_uint32 scc_gsmr_h; /* SCC Gen mode (HIGH) */ + volatile cyg_uint16 scc_psmr; /* protocol specific mode register */ + volatile cyg_uint8 RESERVED59[0x2]; /* Reserved area */ + volatile cyg_uint16 scc_todr; /* SCC transmit on demand */ + volatile cyg_uint16 scc_dsr; /* SCC data sync reg */ + volatile cyg_uint16 scc_scce; /* SCC event reg */ + volatile cyg_uint8 RESERVED60[0x2]; /* Reserved area */ + volatile cyg_uint16 scc_sccm; /* SCC mask reg */ + volatile cyg_uint8 RESERVED61[0x1]; /* Reserved area */ + volatile cyg_uint8 scc_sccs; /* SCC status reg */ + volatile cyg_uint8 RESERVED62[0x8]; /* Reserved area */ + + } scc_regs[4]; + + + /*-----*/ + /* SMC */ + /*-----*/ + + struct smc_regs + + { + volatile cyg_uint8 RESERVED63[0x2]; /* Reserved area */ + volatile cyg_uint16 smc_smcmr; /* SMC mode reg */ + volatile cyg_uint8 RESERVED64[0x2]; /* Reserved area */ + volatile cyg_uint8 smc_smce; /* SMC event reg */ + volatile cyg_uint8 RESERVED65[0x3]; /* Reserved area */ + volatile cyg_uint8 smc_smcm; /* SMC mask reg */ + volatile cyg_uint8 RESERVED66[0x5]; /* Reserved area */ + + } smc_regs[2]; + + + /*-----*/ + /* SPI */ + /*-----*/ + + volatile cyg_uint16 spi_spmode; /* SPI mode reg */ + volatile cyg_uint8 RESERVED67[0x4]; /* Reserved area */ + volatile cyg_uint8 spi_spie; /* SPI event reg */ + volatile cyg_uint8 RESERVED68[0x3]; /* Reserved area */ + volatile cyg_uint8 spi_spim; /* SPI mask reg */ + volatile cyg_uint8 RESERVED69[0x2]; /* Reserved area */ + volatile cyg_uint8 spi_spcom; /* SPI command reg */ + volatile cyg_uint8 RESERVED70[0x4]; /* Reserved area */ + + /*-----*/ + /* PIP */ + /*-----*/ + + volatile cyg_uint16 pip_pipc; /* pip configuration reg */ + volatile cyg_uint8 RESERVED71[0x2]; /* Reserved area */ + volatile cyg_uint16 pip_ptpr; /* pip timing parameters reg */ + volatile cyg_uint32 pip_pbdir; /* port b data direction reg */ + volatile cyg_uint32 pip_pbpar; /* port b pin assignment reg */ + volatile cyg_uint8 RESERVED72[0x2]; /* Reserved area */ + volatile cyg_uint16 pip_pbodr; /* port b open drain reg */ + volatile cyg_uint32 pip_pbdat; /* port b data reg */ + volatile cyg_uint8 RESERVED73[0x18]; /* Reserved area */ + + + /*------------------*/ + /* Serial Interface */ + /*------------------*/ + + volatile cyg_uint32 si_simode; /* SI mode register */ + volatile cyg_uint8 si_sigmr; /* SI global mode register */ + volatile cyg_uint8 RESERVED74; /* Reserved area */ + volatile cyg_uint8 si_sistr; /* SI status register */ + volatile cyg_uint8 si_sicmr; /* SI command register */ + volatile cyg_uint8 RESERVED75[0x4]; /* Reserved area */ + volatile cyg_uint32 si_sicr; /* SI clock routing */ + volatile cyg_uint32 si_sirp; /* SI ram pointers */ + volatile cyg_uint8 RESERVED76[0x10c]; /* Reserved area */ + volatile cyg_uint8 si_siram[0x200]; /* SI routing ram */ + volatile cyg_uint8 RESERVED77[0x1200]; /* Reserved area */ + + /*-----------------------------------------------------------------*/ + /* BASE + 0x2000: user data memory, microcode, or QMC channel PRAM */ + /*-----------------------------------------------------------------*/ + + union + { + struct qmc_chan_pram qcp[64]; + struct user_data ud; + cyg_uint8 RESERVED[0x1c00]; + } qcp_or_ud; + + + /*-----------------------------------------------------------------------*/ + /* BASE + 0x3c00: PARAMETER RAM. This main union defines 4 memory blocks */ + /* of an identical size. See the Parameter RAM definition in the MPC860 */ + /* user's manual. */ + /*-----------------------------------------------------------------------*/ + + /*------------------------*/ + /* Base + 0x3C00 (page 1) */ + /* + 0x3D00 (page 2) */ + /* + 0x3E00 (page 3) */ + /* + 0x3F00 (page 4) */ + /*------------------------*/ + + union + + { + struct page_of_pram + + { + /*------------------------------------------------------------*/ + /* scc parameter area - 1st memory block (protocol dependent) */ + /*------------------------------------------------------------*/ + + union + + { + struct hdlc_pram h; + struct uart_pram u; + struct bisync_pram b; + struct transparent_pram t; + struct async_hdlc_pram a; + cyg_uint8 RESERVED78[0x80]; + + } scc; + + /*----------------------------------------------------------------*/ + /* Other protocol areas for the rest of the memory blocks in each */ + /* page. */ + /*----------------------------------------------------------------*/ + + union + + { + /*---------------------------------------------------------------*/ + /* This structure defines the rest of the blocks on the 1st page */ + /*---------------------------------------------------------------*/ + + struct + + { + struct i2c_pram i2c; /* I2C */ + struct idma_pram idma1; /* IDMA1 */ + + } i2c_idma; + + /*---------------------------------------------------------------*/ + /* This structure defines the rest of the blocks on the 2nd page */ + /*---------------------------------------------------------------*/ + + struct + + { + struct spi_pram spi; /* SPI */ + struct timer_pram timer; /* Timers */ + struct idma_pram idma2; /* IDMA2 */ + + } spi_timer_idma; + + /*---------------------------------------------------------------*/ + /* This structure defines the rest of the blocks on the 3rd page */ + /*---------------------------------------------------------------*/ + + struct + + { + union + + { + struct smc_uart_pram u1; /* SMC1 */ + struct smc_trnsp_pram t1; /* SMC1 */ + cyg_uint8 RESERVED78[0x80]; /* declare full block */ + + } psmc1; + + } smc_dsp1; + + + /*---------------------------------------------------------------*/ + /* This structure defines the rest of the blocks on the 4th page */ + /*---------------------------------------------------------------*/ + + struct + + { + union + + { + struct smc_uart_pram u2; /* SMC2 */ + struct smc_trnsp_pram t2; /* SMC2 */ + struct centronics_pram c; /* Uses SM2's space */ + cyg_uint8 RESERVED79[0x80]; /* declare full block */ + + } psmc2; + + } smc_dsp2; + + cyg_uint8 RESERVED80[0x80]; /* declare full block */ + + } other; + + } pg; + + /*---------------------------------------------------------------*/ + /* When selecting Ethernet as protocol for an SCC, this protocol */ + /* uses a complete page of Parameter RAM memory. */ + /*---------------------------------------------------------------*/ + + struct ethernet_pram enet_scc; + + /*---------------------------------------------------------------*/ + /* When using QMC as a mode for an SCC, the QMC global parameter */ + /* ram uses from SCC BASE to BASE+AC. */ + /*---------------------------------------------------------------*/ + + struct global_qmc_pram gqp; + + /*--------------------------------------------------------*/ + /* declaration to guarantee a page of memory is allocated */ + /*--------------------------------------------------------*/ + + cyg_uint8 RESERVED83[0x100]; + + } PRAM[4]; /* end of union */ + +} EPPC; + + +/***************************************************************************/ +/* General Global Definitions */ +/***************************************************************************/ + + +#define PAGE1 0 /* SCC1 Index into SCC Param RAM Array */ +#define PAGE2 1 /* SCC2 Index into SCC Param RAM Array */ +#define PAGE3 2 /* SCC3 Index into SCC Param RAM Array */ +#define PAGE4 3 /* SCC4 Index into SCC Param RAM Array */ + +#define SCC1_REG 0 /* SCC1 Index into SCC Regs Array */ +#define SCC2_REG 1 /* SCC2 Index into SCC Regs Array */ +#define SCC3_REG 2 /* SCC3 Index into SCC Regs Array */ +#define SCC4_REG 3 /* SCC4 Index into SCC Regs Array */ + + +/*--------------------------------*/ +/* KEEP ALIVE POWER REGISTERS KEY */ +/*--------------------------------*/ + +#define KEEP_ALIVE_KEY 0x55ccaa33 + + +#define SMC2_REG 1 /* SMC Regs Array Index for SMC2 */ + +/*-------------------------*/ +/* Single buffer component */ +/*-------------------------*/ + +typedef struct BufferPool + +{ + cyg_uint8 RxBuffer; + cyg_uint8 TxBuffer; + +} LB; + + +/*--------------------------*/ +/* Buffer Descriptor Format */ +/*--------------------------*/ + +typedef struct BufferDescriptor + +{ + cyg_uint16 bd_cstatus; /* control and status */ + cyg_uint16 bd_length; /* transfer length */ + cyg_uint8 *bd_addr; /* buffer address */ + +} BD; + + +/*-------------------------------*/ +/* Buffer Descriptor Ring format */ +/*-------------------------------*/ + +typedef struct BufferDescRings + +{ + volatile BD RxBD; /* Rx BD ring */ + volatile BD TxBD; /* Tx BD ring */ + +} BDRINGS; + + +#endif diff --git a/packages/hal/powerpc/arch/current/src/ppc_stub.c b/packages/hal/powerpc/arch/current/src/ppc_stub.c --- a/packages/hal/powerpc/arch/current/src/ppc_stub.c +++ b/packages/hal/powerpc/arch/current/src/ppc_stub.c @@ -1,6 +1,6 @@ /* ppc_stub.c - helper functions for stub, generic to all PowerPC processors * - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -19,72 +19,47 @@ #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#ifdef CYG_HAL_POWERPC_SIM -#error "GDB Stub support not implemented for PPC SIM" -#endif +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include #include #include #include -#include #ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT #include // dbg_currthread_id #endif -#define SIGHUP 1 /* hangup */ -#define SIGINT 2 /* interrupt */ -#define SIGQUIT 3 /* quit */ -#define SIGILL 4 /* illegal instruction (not reset when caught) */ -#define SIGTRAP 5 /* trace trap (not reset when caught) */ -#define SIGIOT 6 /* IOT instruction */ -#define SIGABRT 6 /* used by abort, replace SIGIOT in the future */ -#define SIGEMT 7 /* EMT instruction */ -#define SIGFPE 8 /* floating point exception */ -#define SIGKILL 9 /* kill (cannot be caught or ignored) */ -#define SIGBUS 10 /* bus error */ -#define SIGSEGV 11 /* segmentation violation */ -#define SIGSYS 12 /* bad argument to system call */ -#define SIGPIPE 13 /* write on a pipe with no one to read it */ -#define SIGALRM 14 /* alarm clock */ -#define SIGTERM 15 /* software termination signal from kill */ - -/* Saved registers. */ - -HAL_SavedRegisters *_hal_registers; - -target_register_t * _registers; /* A pointer to the current set of registers */ -target_register_t registers[NUMREGS]; -target_register_t alt_registers[NUMREGS] ; /* Thread or saved process state */ - - /* Given a trap value TRAP, return the corresponding signal. */ int __computeSignal (unsigned int trap_number) { switch (trap_number) { - case CYG_VECTOR_MACHINE_CHECK: + case CYGNUM_HAL_VECTOR_MACHINE_CHECK: /* Machine check */ - case CYG_VECTOR_DSI: + case CYGNUM_HAL_VECTOR_DSI: /* Data access */ return SIGSEGV; - case CYG_VECTOR_ISI: + case CYGNUM_HAL_VECTOR_ISI: /* Instruction access (Ifetch) */ - case CYG_VECTOR_ALIGNMENT: + case CYGNUM_HAL_VECTOR_ALIGNMENT: /* Data access */ return SIGBUS; - case CYG_VECTOR_INTERRUPT: + case CYGNUM_HAL_VECTOR_INTERRUPT: /* External interrupt */ return SIGINT; - case CYG_VECTOR_TRACE: + case CYGNUM_HAL_VECTOR_TRACE: /* Instruction trace */ return SIGTRAP; - case CYG_VECTOR_PROGRAM: + case CYGNUM_HAL_VECTOR_PROGRAM: + // The register PS contains the value of SRR1 at the time of + // exception entry. Bits 11-15 contain information about the + // cause of the exception. Bits 16-31 the PS (MSR) state. switch ((get_register (PS) >> 17) & 0xf){ case 1: /* trap */ return SIGTRAP; @@ -97,50 +72,50 @@ int __computeSignal (unsigned int trap_n return SIGTERM; } - case CYG_VECTOR_RESERVED_A: - case CYG_VECTOR_RESERVED_B: + case CYGNUM_HAL_VECTOR_RESERVED_A: + case CYGNUM_HAL_VECTOR_RESERVED_B: return SIGILL; - case CYG_VECTOR_FP_UNAVAILABLE: + case CYGNUM_HAL_VECTOR_FP_UNAVAILABLE: /* FPU disabled */ - case CYG_VECTOR_FP_ASSIST: + case CYGNUM_HAL_VECTOR_FP_ASSIST: /* FPU assist */ return SIGFPE; - case CYG_VECTOR_DECREMENTER: + case CYGNUM_HAL_VECTOR_DECREMENTER: /* Decrementer alarm */ return SIGALRM; - case CYG_VECTOR_SYSTEM_CALL: + case CYGNUM_HAL_VECTOR_SYSTEM_CALL: /* System call */ return SIGSYS; -#ifdef CYG_HAL_POWERPC_MP860 - case CYG_VECTOR_SW_EMUL: +#if defined(CYG_HAL_POWERPC_MPC8xx) + case CYGNUM_HAL_VECTOR_SW_EMUL: /* A SW_EMUL is generated instead of PROGRAM for illegal instructions. */ return SIGILL; - case CYG_VECTOR_DATA_BP: - case CYG_VECTOR_INSTRUCTION_BP: - case CYG_VECTOR_PERIPHERAL_BP: - case CYG_VECTOR_NMI: + case CYGNUM_HAL_VECTOR_DATA_BP: + case CYGNUM_HAL_VECTOR_INSTRUCTION_BP: + case CYGNUM_HAL_VECTOR_PERIPHERAL_BP: + case CYGNUM_HAL_VECTOR_NMI: /* Developer port debugging exceptions. */ return SIGTRAP; - case CYG_VECTOR_ITLB_MISS: - case CYG_VECTOR_DTLB_MISS: + case CYGNUM_HAL_VECTOR_ITLB_MISS: + case CYGNUM_HAL_VECTOR_DTLB_MISS: /* Software reload of TLB required. */ return SIGTRAP; - case CYG_VECTOR_ITLB_ERROR: + case CYGNUM_HAL_VECTOR_ITLB_ERROR: /* Invalid instruction access. */ return SIGBUS; - case CYG_VECTOR_DTLB_ERROR: + case CYGNUM_HAL_VECTOR_DTLB_ERROR: /* Invalid data access. */ return SIGSEGV; -#endif +#endif // defined(CYG_HAL_POWERPC_MPC8xx) default: return SIGTERM; @@ -157,21 +132,6 @@ int __get_trap_number (void) return _hal_registers->vector >> 8; } -// Return the currently-saved value corresponding to register REG of -// the exception context. -target_register_t get_register (regnames_t reg) -{ - return registers[reg]; -} - -// Store VALUE in the register corresponding to WHICH in the exception -// context. -void put_register (regnames_t which, target_register_t value) -{ - registers[which] = value; -} - - /* Set the currently-saved pc register value to PC. This also updates NPC as needed. */ @@ -191,7 +151,7 @@ void set_pc (target_register_t pc) static target_register_t irq_state; -void single_step (void) +void __single_step (void) { target_register_t msr = get_register (PS); @@ -206,7 +166,7 @@ void single_step (void) /* Clear the single-step state. */ -void clear_single_step (void) +void __clear_single_step (void) { target_register_t msr = get_register (PS); @@ -222,12 +182,16 @@ void clear_single_step (void) } -void install_breakpoints (void) +void __install_breakpoints (void) { /* NOP since single-step HW exceptions are used instead of breakpoints. */ } +void __clear_breakpoints (void) +{ +} + /* If the breakpoint we hit is in the breakpoint() instruction, return a non-zero value. */ @@ -235,7 +199,7 @@ void install_breakpoints (void) int __is_breakpoint_function () { - return get_register (PC) == (target_register_t)&_breakinst; + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); } @@ -248,56 +212,4 @@ void __skipinst (void) put_register (PC, get_register (PC) + 4); } - -/* Write the 'T' packet in BUFFER. SIGVAL is the signal the program - received. */ - -void __build_t_packet (int sigval, char *buf) -{ - target_register_t addr; - char *ptr = buf; - target_register_t *sp; - - sp = (target_register_t *) get_register (SP); - - *ptr++ = 'T'; - *ptr++ = __tohex (sigval >> 4); - *ptr++ = __tohex (sigval); - -#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT - // Include thread ID if thread manipulation is required. - { - int id; - - *ptr++ = 't'; - *ptr++ = 'h'; - *ptr++ = 'r'; - *ptr++ = 'e'; - *ptr++ = 'a'; - *ptr++ = 'd'; - *ptr++ = ':'; - - id = dbg_currthread_id (); - ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); - *ptr++ = ';'; - } -#endif - - - *ptr++ = __tohex (PC >> 4); - *ptr++ = __tohex (PC); - *ptr++ = ':'; - addr = get_register (PC); - ptr = __mem2hex((char *)&addr, ptr, sizeof(addr), 0); - *ptr++ = ';'; - - *ptr++ = __tohex (SP >> 4); - *ptr++ = __tohex (SP); - *ptr++ = ':'; - ptr = __mem2hex((char *)&sp, ptr, sizeof(sp), 0); - *ptr++ = ';'; - - *ptr++ = 0; -} - #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/powerpc/arch/current/src/quicc_smc.c b/packages/hal/powerpc/arch/current/src/quicc_smc.c new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/src/quicc_smc.c @@ -0,0 +1,446 @@ +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// The style of programming used in this file may not comply with the +// eCos programming guidelines. Please do not use as a base for other +// files. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Contributed by: Kevin Hester +// Maintained by: +// See also: +// Motorola's "Example Software Initializing the SMC as a UART" package +// (smc2.zip) at: +// http://www.mot.com/SPS/RISC/netcomm/tools/index.html#MPC860_table +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= +/*------------------------------------------------------------------------- +* FILENAME: smc2.c +* +* DESCRIPTION: +* +* The code in this module provides echo capability on SMC2. It's +* intent is to provide the beginnings of a debug port that is +* mostly compiler independent. If an ASCII terminal is connected +* at 9600,N,8,1 on Port 2 (PB3) on the ADS board with no hardware +* control, characters typed on the keyboard will be received by +* SMC2 and echoed back out the RS232 port to the ASCII terminal. +* This function was designed and tested on an ADS860 +* development board. Note that if a different baud rate is +* required, there is a header file on the netcomm website under +* the General Software category that is labelled "Asynchronous +* Baud Rate Tables". +* +* REFERENCES: +* +* 1) MPC860 Users Manual +* 2) PowerPC Microprocessor Family: The Programming Environments for +* 32-Bit Microprocessors +* +* HISTORY: +* +* 27 APR 98 jay initial release +* +*-------------------------------------------------------------------------*/ + +#include +#include "ppc_860.h" + +/***********************/ +/* Global Declarations */ +/***********************/ + +static EPPC *IMMR; /* IMMR base pointer */ +static BDRINGS *RxTxBD; /* buffer descriptors base pointer */ +static LB *SMC2Buffers; /* SMC2 base pointers */ + +/*---------------------*/ +/* Function Prototypes */ +/*---------------------*/ + +//static char SMC2Poll(void); +static void InitBDs(void); +//static void EchoChar(void); +static unsigned long GetIMMR(void); + + +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: cyg_smc2_init +* +* DESCRIPTION: +* +* EXTERNAL EFFECT: +* +* PARAMETERS: None +* +* RETURNS: None +* +*---------------------------------------------------------------------------*/ + +void cyg_smc2_init(unsigned long baudRate) + +{ + unsigned long *bcsr1; + unsigned long clockRate = 20 * 1000 * 1000; // 20Mhz + unsigned long divider = clockRate / (baudRate * 16) - 1; + + /*------------------------*/ + /* Establish IMMR pointer */ + /*------------------------*/ + + IMMR = (EPPC *)(GetIMMR() & 0xFFFF0000); /* MPC8xx internal register + map */ + + /*-----------------------------------------------*/ + /* Enable RS232 interface on ADS board via BCSR1 */ + /* Get the base address of BCSR */ + /*-----------------------------------------------*/ + + bcsr1 = (unsigned long *) ((IMMR->memc_br1 & 0xffff0000) + 4); + *bcsr1 &= ~(1 << 18); // turn on RS232 port 2 + + + /*-----------------------*/ + /* Allow SMC2 TX, RX out */ + /*-----------------------*/ + + IMMR->pip_pbpar |= (0x0C00); + IMMR->pip_pbdir &= 0xF3FF; + + /*------------------------------------------------*/ + /* Set Baud Rate to 9600 for 40MHz System Clock. */ + /* Enable BRG Count. */ + /*------------------------------------------------*/ + + IMMR->brgc2 = ((divider << 1) | 0x10000); + + IMMR->si_simode &= ~(0xF0000000); /* SCM2: NMSI mode */ + IMMR->si_simode |= 0x10000000; /* SCM2: Tx/Rx Clocks are BRG2 */ + + + /*----------------------------------------*/ + /* Set RXBD table start at Dual Port +800 */ + /*----------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.rbase = (unsigned short) (unsigned) &RxTxBD->RxBD; + + /*----------------------------------------*/ + /* Set TXBD table start at Dual Port +808 */ + /*----------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.tbase = (unsigned short) (unsigned) &RxTxBD->TxBD; + + /*---------------------------------------*/ + /* Initialize Rx and Tx Params for SMC2: */ + /* Spin until cpcr flag is cleared */ + /*---------------------------------------*/ + + for(IMMR->cp_cr = 0x00d1; IMMR->cp_cr & 0x0001;) ; + + + /*--------------------------------------*/ + /* Set RFCR,TFCR -- Rx,Tx Function Code */ + /* Normal Operation and Motorola byte */ + /* ordering */ + /*--------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.rfcr = 0x18; + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.tfcr = 0x18; + + /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/ + /* Protocol Specific Parameters */ + /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/ + + /*---------------------------*/ + /* MRBLR = MAX buffer length */ + /*---------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.mrblr = 1; + + /*------------------------------------*/ + /* MAX_IDL = Disable MAX Idle Feature */ + /*------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.max_idl = 0; + + /*-------------------------------------*/ + /* BRKEC = No break condition occurred */ + /*-------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.brkec = 0; + + /*---------------------------------------*/ + /* BRKCR = 1 break char sent on top XMIT */ + /*---------------------------------------*/ + + IMMR->PRAM[PAGE4].pg.other.smc_dsp2.psmc2.u2.brkcr = 1; + + /*--------------------*/ + /* Initialize the BDs */ + /*--------------------*/ + + InitBDs(); + + IMMR->smc_regs[SMC2_REG].smc_smce = 0xFF; /* Clear any pending events */ + + /*--------------------------------------------------*/ + /* SMC_SMCM = Mask all interrupts, use polling mode */ + /*--------------------------------------------------*/ + + IMMR->smc_regs[SMC2_REG].smc_smcm = 0; + + IMMR->cpmi_cicr = 0; /* Disable all CPM interrups */ + IMMR->cpmi_cipr = 0xFFFFFFFF; /* Clear all pending interrupt events */ + IMMR->cpmi_cimr = 0; /* Mask all event interrupts */ + + /*------------------------------------*/ + /* 8-bit mode, no parity, 1 stop-bit */ + /* UART SMC Mode */ + /* Normal operation (no loopback), */ + /* SMC Transmitter/Receiver Enabled */ + /*------------------------------------*/ + + IMMR->smc_regs[SMC2_REG].smc_smcmr = 0x4823; + +} + + + +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: InitBDs +* +* DESCRIPTION: This function initializes the Tx and Rx Buffer Descriptors. +* +* EXTERNAL EFFECT: RxTxBD +* +* PARAMETERS: None +* +* RETURNS: None +* +*---------------------------------------------------------------------------*/ + +static void InitBDs(void) + +{ + /*--------------------------------------------------------------------*/ + /* We add 64 bytes to the start of the buffer descriptors because */ + /* this code was also tested on the monitor version of SDS debugger. */ + /* The monitor program on our target uses most of the first 64 bytes */ + /* for buffer descriptors. If you are not using the SDS monitor with */ + /* Motorola's ADS development board, you can delete 64 below and */ + /* start at the beginning of this particular block of Dual Port RAM. */ + /*--------------------------------------------------------------------*/ + + /*----------------------------------*/ + /* Get pointer to BD area on DP RAM */ + /*----------------------------------*/ + + RxTxBD = (BDRINGS *)(IMMR->qcp_or_ud.ud.udata_bd + 64); + + /*-------------------------------------------------------------------*/ + /* Establish the buffer pool in Dual Port RAM. We do this because the*/ + /* pool size is only 2 bytes (1 for Rx and 1 for Tx) and to avoid */ + /* disabling data cache for the memory region where BufferPool would */ + /* reside. The CPM does not recognize data in buffer pools once it */ + /* been cached. It's acesses are direct through DMA to external */ + /* memory. */ + /*-------------------------------------------------------------------*/ + + SMC2Buffers = (LB *)(IMMR->qcp_or_ud.ud.udata_bd + 80); + + /*-----------------------------------*/ + /* Setup Receiver Buffer Descriptors */ + /*-----------------------------------*/ + + RxTxBD->RxBD.bd_cstatus = 0xA000; /* Enable, Last BD */ + RxTxBD->RxBD.bd_length = 1; + RxTxBD->RxBD.bd_addr = &(SMC2Buffers->RxBuffer); + + + /*--------------------------------------*/ + /* Setup Transmitter Buffer Descriptors */ + /*--------------------------------------*/ + + RxTxBD->TxBD.bd_cstatus = 0x2000; /* Buffer not yet ready; Last BD */ + RxTxBD->TxBD.bd_length = 1; + RxTxBD->TxBD.bd_addr = &(SMC2Buffers->TxBuffer); + +} /* END InitBDs */ + + +#if 0 // static unused function. -jskov 19990122 +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: EchoChar +* +* DESCRIPTION: This function facilitates the echoing of a received character. +* +* EXTERNAL EFFECT: RxTxBD +* +* PARAMETERS: None +* +* RETURNS: None +* +*---------------------------------------------------------------------------*/ + +static void EchoChar(void) + +{ + char mych; + + mych = cyg_smc2_getchar(); + cyg_smc2_putchar(mych); + +} /* end EchoChar */ +#endif + +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: cyg_smc2_putchar +* +* DESCRIPTION: Output a character to SMC2 +* +* EXTERNAL EFFECT: RxTxBD +* +* PARAMETERS: ch - input character +* +* RETURNS: None +* +*---------------------------------------------------------------------------*/ + +void cyg_smc2_putchar(char ch) + +{ + /*-----------------------------------*/ + /* Loop until transmission completed */ + /*-----------------------------------*/ + + while (RxTxBD->TxBD.bd_cstatus & 0x8000); + + /*------------*/ + /* Store data */ + /*------------*/ + + *(RxTxBD->TxBD.bd_addr) = ch; + RxTxBD->TxBD.bd_length = 1; + + /*---------------*/ + /* Set Ready bit */ + /*---------------*/ + + RxTxBD->TxBD.bd_cstatus |= 0x8000; + +} + + + +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: cyg_smc2_getchar +* +* DESCRIPTION: Get a character from SMC2 +* +* EXTERNAL EFFECT: RxTxBD +* +* PARAMETERS: NONE +* +* RETURNS: A character from SMC2 +* +*---------------------------------------------------------------------------*/ + +char cyg_smc2_getchar(void) + +{ + + char ch; /* output character from SMC2 */ + + /*--------------------*/ + /* Loop if RxBD empty */ + /*--------------------*/ + + while (RxTxBD->RxBD.bd_cstatus & 0x8000); + + /*--------------*/ + /* Receive data */ + /*--------------*/ + + ch = *(RxTxBD->RxBD.bd_addr); + + /*----------------------*/ + /* Set Buffer Empty bit */ + /*----------------------*/ + + RxTxBD->RxBD.bd_cstatus |= 0x8000; + + return ch; + +} + + +#if 0 // static unused function. -jskov 19990122 +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: SMC2Poll +* +* DESCRIPTION: Poll SMC2 RxBD and check to see if a character was received +* +* EXTERNAL EFFECT: NONE +* +* PARAMETERS: NONE +* +* RETURNS: A one if there is a character available in the receive buffer, +* else zero. +* +*---------------------------------------------------------------------------*/ + +static char SMC2Poll(void) + +{ + return (RxTxBD->RxBD.bd_cstatus & 0x8000) ? 0 : 1; + +} /* END SMC2Poll */ +#endif + + +/*----------------------------------------------------------------------------- +* +* FUNCTION NAME: GetIMMR +* +* DESCRIPTION: Returns current value in the IMMR register. +* +* EXTERNAL EFFECT: NONE +* +* PARAMETERS: NONE +* +* RETURNS: The IMMR value in r3. The compiler uses r3 as the register +* containing the return value. +* +*---------------------------------------------------------------------------*/ + +static unsigned long GetIMMR(void) + +{ + unsigned long ret; + asm volatile (" mfspr %0,638 " : "=r" (ret)); /* IMMR is spr #638 */ + + return ret; +} + + + diff --git a/packages/hal/powerpc/arch/current/src/vectors.S b/packages/hal/powerpc/arch/current/src/vectors.S --- a/packages/hal/powerpc/arch/current/src/vectors.S +++ b/packages/hal/powerpc/arch/current/src/vectors.S @@ -1,10 +1,10 @@ -##============================================================================= +##========================================================================== ## ## vectors.S ## ## PowerPC exception vectors ## -##============================================================================= +##========================================================================== #####COPYRIGHTBEGIN#### # # ------------------------------------------- @@ -22,32 +22,34 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### -##============================================================================= +##========================================================================== #######DESCRIPTIONBEGIN#### ## -## Author(s): nickg -## Contributors: nickg -## Date: 1997-10-16 -## Purpose: PowerPC exception vectors -## Description: This file defines the code placed into the exception -## vectors. It also contains the first level default VSRs -## that save and restore state for both exceptions and -## interrupts. +## Author(s): nickg, jskov +## Contributors: nickg, jskov +## Date: 1999-02-20 +## Purpose: PowerPC exception vectors +## Description: This file defines the code placed into the exception +## vectors. It also contains the first level default VSRs +## that save and restore state for both exceptions and +## interrupts. ## ######DESCRIPTIONEND#### ## -##============================================================================= +##========================================================================== #include #ifdef CYGPKG_KERNEL #include // CYGPKG_KERNEL_INSTRUMENT #endif - + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include "cyg/hal/ppc_regs.h" #include "cyg/hal/ppc.inc" #define FUNC_START(name) \ @@ -55,7 +57,7 @@ .globl name; \ name: -#============================================================================== +#=========================================================================== .file "vectors.S" @@ -67,30 +69,38 @@ name: .extern hal_hardware_init -#============================================================================== +#=========================================================================== # MSR initialization value # zero all bits except: # FP = floating point available # ME = machine check enabled # IP = vectors at 0xFFFxxxxx (ROM startup only) +# IR = instruction address translation +# DR = data address translation # RI = recoverable interrupt -#ifdef CYG_HAL_STARTUP_ROM -#define CYG_MSR 0x00003042 +#define CYG_MSR_COMMON (MSR_FP | MSR_ME | MSR_IR | MSR_DR | MSR_RI) +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) +#define CYG_MSR (CYG_MSR_COMMON | MSR_IP) #endif #ifdef CYG_HAL_STARTUP_RAM -#define CYG_MSR 0x00003002 +#define CYG_MSR CYG_MSR_COMMON +#endif +#ifdef CYG_HAL_POWERPC_SIM +# When building for SIM, don't enable MMU -- it's not needed since caches +# are disabled, and there is a runtime simulation overhead. +#undef CYG_MSR +#define CYG_MSR (CYG_MSR_COMMON & ~(MSR_IR | MSR_DR)) #endif -#============================================================================== +#=========================================================================== # If the following option is enabled, we only save registers up to R12. # The PowerPC ABI defines registers 13..31 as callee saved and thus we do # not need to save them when calling C functions. -# Note: Save some extra convenience registers (13-15) #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT -#define MAX_SAVE_REG 15 +#define MAX_SAVE_REG 12 #else @@ -98,7 +108,7 @@ name: #endif -#============================================================================== +#=========================================================================== # Start by defining the exceptions vectors that must be placed at # locations 0xFFF00000 and 0x00000000. The following code will normally # be located at 0xFFF00000 in the ROM. It may optionally be copied out @@ -108,7 +118,7 @@ name: .section ".vectors","ax" -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # Unused first vector. rom_vectors: @@ -121,7 +131,7 @@ rom_vectors: .byte 0x33 .byte 0x44 -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # Reset vector. .p2align 8 @@ -132,16 +142,16 @@ reset_vector: mtlr r3 blr -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # Macro for generating an exception vector service routine .macro exception_vector name .p2align 8 .globl __exception_\name __exception_\name: - mtspr sprg1,r3 # stash some work registers away - mtspr sprg2,r4 - mtspr sprg3,r5 + mtspr SPRG1,r3 # stash some work registers away + mtspr SPRG2,r4 + mtspr SPRG3,r5 mfcr r4 # stash CR li r5,__exception_\name@L # load low half of vector address srwi r5,r5,6 # shift right by 6 @@ -153,7 +163,7 @@ reset_vector: blr # go to common code .endm -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # Define the exception vectors. # These are the architecture defined vectors that @@ -164,7 +174,25 @@ reset_vector: exception_vector instruction_storage exception_vector external exception_vector alignment +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) \ + || defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) exception_vector program +#else + # Provide a crude hook to the GDB exception handler in ROM. + # This allows the testing infrastructure to rely on breakpoints + # to terminate tests, even when the tests are compiled without + # the GDB stub. + # It is _not_ a generic solution to the problem; in particular it + # is not possible to continue after a breakpoint is hit. + .p2align 8 + .globl __exception_program +__exception_program: + bl _init_CPU # disable caches. + lwi r3,0xfff00700 # address of trap handler + mtlr r3 # in ROM. + blr # jump to it. + +#endif exception_vector floatingpoint_unavailable exception_vector decrementer exception_vector reserved_00a00 @@ -177,9 +205,8 @@ reset_vector: # There are some additional vectors defined # on various implementations. -#ifdef CYG_HAL_POWERPC_MP860 - - # MP860 vectors +#ifdef CYG_HAL_POWERPC_MPC8xx + # MPC8xx vectors exception_vector software_emu exception_vector instruction_tlb_miss @@ -198,27 +225,26 @@ reset_vector: exception_vector peripheral_breakpoint exception_vector NMI_port +#endif rom_vectors_end: -#endif -#============================================================================== -# Real startup code. We jump here from the various reset vectors to set up the -# world. +#=========================================================================== +# Real startup code. We jump here from the various reset vectors to set up +# the world. .text .globl _start -_start: - # Set up MSR - lwi r3,CYG_MSR - mtmsr r3 +_start: + # Initialize CPU + bl _init_CPU -#if defined(CYG_HAL_POWERPC_MP860) && !defined(CYG_HAL_POWERPC_SIM) - # Disable special 860 "development support" which suppresses - # trace exceptions. The CPU seems to hang, not executing from - # offset 0x1e00(?) as expected. +#ifdef CYG_HAL_POWERPC_MPC8xx + # Disable special MPC8xx "development support" which + # suppresses trace exceptions. The CPU seems to hang, not + # executing from offset 0x1e00(?) as expected. li r3,0 - mtspr der, r3 + mtspr DER, r3 #endif # Set up global offset table @@ -226,20 +252,20 @@ rom_vectors_end: # set up time base register to zero xor r3,r3,r3 - mtspr 284,r3 + mtspr TBL_W,r3 xor r4,r4,r4 - mtspr 285,r4 + mtspr TBU_W,r4 + + # Call platform specific hardware initialization + # This may include memory controller initialization. It is not + # safe to access RAM until after this point. + bl hal_hardware_init # set up stack lwi sp,__interrupt_stack - mtspr sprg0,sp # save in sprg0 for later use + mtspr SPRG0,sp # save in sprg0 for later use - # Call platform specific hardware initialization - bl hal_hardware_init - - # optional: initialize BAT registers - -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) # Copy data from ROM to ram lwi r3,__rom_data_start # r3 = rom start @@ -278,49 +304,75 @@ 2: #endif #endif - + # clear BSS - + .extern __bss_start + .extern __bss_end lwi r3,__bss_start # r3 = start - lwi r4,_end # r4 = end + lwi r4,__bss_end # r4 = end li r0,0 # r0 = 0 cmplw r3,r4 # skip if no bss beq 2f -1: - stw r0,0(r3) # store zero +1: stw r0,0(r3) # store zero addi r3,r3,4 # increment by 1 word cmplw r3,r4 # compare blt 1b # loop if not yet done 2: - # set up stack to call cyg_start + # clear SBSS + .extern __sbss_start + .extern __sbss_end + lwi r3,__sbss_start # r3 = start + lwi r4,__sbss_end # r4 = end + cmplw r3,r4 # skip if no sbss + beq 2f + +1: stw r0,0(r3) # store zero + addi r3,r3,4 # increment by 1 word + cmplw r3,r4 # compare + blt 1b # loop if not yet done +2: + + # It is now safe to call C functions which may rely on initialized + # data. + + # Set up stack for calls to C code. subi sp,sp,12 # make space on stack li r0,0 stw r0,0(sp) # clear back chain stw r0,8(sp) # zero return pc stwu sp,-ppc_stack_frame_size(sp) # create new stack frame - # for the call to __eabi - # and cyg_start + + # Initialize MMU. + .extern hal_MMU_init + bl hal_MMU_init + + # Enable MMU it so we can safely enable caches. + lwi r3,CYG_MSR + sync + mtmsr r3 + sync -#ifdef CYG_KERNEL_USE_INIT_PRIORITY + # Enable caches + .extern hal_enable_caches + bl hal_enable_caches + # call c++ constructors .extern cyg_hal_invoke_constructors - bl cyg_hal_invoke_constructors # call c++ constructors + bl cyg_hal_invoke_constructors +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + .extern initialize_stub + bl initialize_stub #endif -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - .extern set_debug_traps - bl set_debug_traps -#endif - .extern cyg_start bl cyg_start # call cyg_start 9: b 9b # if we return, loop -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # This code handles the common part of all exception handlers. # It saves the machine state onto the stack and then calls # a "C" routine to do the rest of the work. This work may result @@ -342,7 +394,7 @@ 9: # SPRG2 = old R4 # SPRG3 = old R5 # SRR0 = old PC - # SRR1 = old MSR + # SRR1 = old MSR and the exception cause (the POW state is lost!) subi r1,r1,ppc_exception_decrement # leave space for registers and @@ -352,12 +404,18 @@ 9: stw r3,ppcreg_vector(r1) # stash vector stw r4,ppcreg_cr(r1) # stash CR stw r5,ppcreg_lr(r1) # stash LR - - mfspr r3,sprg1 # save original R3 + + # Enable MMU. + lwi r3,CYG_MSR + sync + mtmsr r3 + sync + + mfspr r3,SPRG1 # save original R3 stw r3,ppcreg_regs+3*4(r1) - mfspr r4,sprg2 # save original R4 + mfspr r4,SPRG2 # save original R4 stw r4,ppcreg_regs+4*4(r1) - mfspr r5,sprg3 # save original R5 + mfspr r5,SPRG3 # save original R5 stw r5,ppcreg_regs+5*4(r1) stw r0,ppcreg_regs(r1) # save R0 @@ -367,13 +425,17 @@ 9: addi r3,r3,ppc_exception_decrement stw r3,ppcreg_regs+1*4(r1) # and save it in state - # Save registers 6..31 + # Save registers r6..r12/r31 .set _reg,6 .rept MAX_SAVE_REG+1-6 stw _reg,(ppcreg_regs+_reg*4)(r1) .set _reg,_reg+1 .endr + # Save registers used in vsr (r14+r15) + stw r14,(ppcreg_regs+14*4)(r1) + stw r15,(ppcreg_regs+15*4)(r1) + # get remaining CPU registers mfxer r3 mfctr r5 @@ -409,13 +471,58 @@ 9: lwi r5,restore_state # get return link mtlr r5 # to link register - .extern exception_handler - b exception_handler # call C code, r3 = registers + .extern cyg_hal_exception_handler + b cyg_hal_exception_handler # call C code, r3 = registers # When the call returns it will go to restore_state below. -#------------------------------------------------------------------------------ +##-------------------------------------------------------------------------- +## The following macros are defined depending on whether the Interrupt +## system is using isr tables or chaining, and depending on the interrupt +## controller in the system. + +## Note: CYG_ISR_TABLE_SIZE must match CYG_ISR_COUNT defined in hal_intr.h. + +#ifdef CYG_HAL_POWERPC_MPC8xx + +## First level decoding of MPC8xx SIU interrupt controller. + +#define CYG_ISR_TABLE_SIZE 59 + + # decode the interrupt + .macro decode_interrupt dreg,state + lwz \dreg,ppcreg_vector(\state) # retrieve vector number, + rlwinm. \dreg,\dreg,22,31,31 # isolate bit 21 + beq 0f # done if decrementer (vec 0) + lwi \dreg,CYGARC_REG_IMM_SIVEC # if external, get SIU + lbz \dreg,0(\dreg) # vector. + srwi \dreg,\dreg,2 + addi \dreg,\dreg,1 # Skip decrementer vector +0: stw \dreg,ppcreg_vector(\state) # update vector in state frame. + slwi \dreg,\dreg,2 # convert to byte offset. + .endm + +#else + +## This is the simple version. No interrupt controller, ppcreg_vector +## is updated with the decoded interrupt vector. Isr tables/chaining +## use same interrupt decoder. +## Bit 21 biffers between decrementer (0) and external (1). + +#define CYG_ISR_TABLE_SIZE 2 + + # decode the interrupt + .macro decode_interrupt dreg,state + lwz \dreg,ppcreg_vector(\state) # retrieve vector number, + rlwinm \dreg,\dreg,22,31,31 # isolate bit 21 and update + stw \dreg,ppcreg_vector(\state) # vector in state frame. + slwi \dreg,\dreg,2 # convert to word offset. + .endm + +#endif + +#--------------------------------------------------------------------------- # Common interrupt handling code. .extern __default_interrupt_vsr @@ -442,11 +549,17 @@ 9: stw r4,ppcreg_cr(r1) # stash CR stw r5,ppcreg_lr(r1) # stash LR - mfspr r3,sprg1 # save original R3 + # Enable MMU. + lwi r3,CYG_MSR + sync + mtmsr r3 + sync + + mfspr r3,SPRG1 # save original R3 stw r3,ppcreg_regs+3*4(r1) - mfspr r4,sprg2 # save original R4 + mfspr r4,SPRG2 # save original R4 stw r4,ppcreg_regs+4*4(r1) - mfspr r5,sprg3 # save original R5 + mfspr r5,SPRG3 # save original R5 stw r5,ppcreg_regs+5*4(r1) stw r0,ppcreg_regs(r1) # save R0 @@ -456,13 +569,17 @@ 9: addi r3,r3,ppc_exception_decrement stw r3,ppcreg_regs+1*4(r1) # and save it in state - # Save registers 6..31 + # Save registers r6..r12/r31 .set _reg,6 .rept MAX_SAVE_REG+1-6 stw _reg,(ppcreg_regs+_reg*4)(r1) .set _reg,_reg+1 .endr + # Save registers used in vsr (r14+r15) + stw r14,(ppcreg_regs+14*4)(r1) + stw r15,(ppcreg_regs+15*4)(r1) + # get remaining CPU registers mfxer r3 mfctr r5 @@ -480,14 +597,14 @@ 9: # for this vector. #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT - .extern _18Cyg_Scheduler_Base.sched_lock - lwi r3,_18Cyg_Scheduler_Base.sched_lock + .extern cyg_scheduler_sched_lock + lwi r3,cyg_scheduler_sched_lock lwz r4,0(r3) addi r4,r4,1 stw r4,0(r3) #endif - mr r13,sp # R13 = register dump + mr r14,sp # r14 = register dump #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK lwi r3,__interrupt_stack # stack top @@ -499,7 +616,7 @@ 9: 1: mr sp,r3 # switch to istack -2: stwu r13,-4(sp) # save old SP on stack +2: stwu r14,-4(sp) # save old SP on stack #endif @@ -515,30 +632,37 @@ 2: stwu r13,-4(sp) #if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR) lwi r3,0x0301 # r3 = type = INTR,RAISE - lwz r4,ppcreg_vector(r13) # arg1 = vector address + lwz r4,ppcreg_vector(r14) # arg1 = vector address srwi r4,r4,8 # arg1 = vector number xor r5,r5,r5 # arg2 = 0 bl cyg_instrument # call instrument function #endif + decode_interrupt r15,r14 # get table index + #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT .extern cyg_hal_gdb_isr - lwz r3,ppcreg_vector(r13) # retrieve vector number - cmpwi r3,0x0500 # if external, call HAL - bne 1f # GDB ISR which will check - bl cyg_hal_gdb_isr # for serial receive irq. + lwz r3,ppcreg_pc(r14) # for serial receive irq. + bl cyg_hal_gdb_isr # (arg1 is PC) cmpwi r3,0x0000 # Call ISR proper? beq 2f # (r3 is 0 when skipping # to avoid DSR call) 1: #endif - lwz r3,ppcreg_vector(r13) # retrieve vector number - srwi r15,r3,11 # isolate bit 11 of vector id - slwi r15,r15,2 # convert to word offset +#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING - srwi r3,r3,8 # R3 = vector no argument +#ifdef CYG_HAL_POWERPC_MPC8xx + # The CPM controller allows nested interrupts. However, + # it sits on the back of the SIU controller which has no + # HW support for this. In effect, SW masking of lower + # priority IRQs in the SIU would be required for this to work. +#endif + +#endif + + lwz r3,ppcreg_vector(r14) # retrieve decoded vector # lwi r6,hal_interrupt_handlers # get interrupt handler table lwzx r6,r6,r15 # load routine pointer @@ -589,17 +713,25 @@ 2: # the interrupt object we have just used to the # interrupt tidy up routine. - # Note that r13 and r15 are defined to be preserved across + # Note that r14 and r15 are defined to be preserved across # calls by the calling convention, so they still contain # the register dump and the vector number respectively. + + # Note: The instructions restoring the msr mask out the POW bit. + # When eCos gets power management aware, this bit will have to be + # set to the correct state rather than just cleared. lwi r4,hal_interrupt_objects # get interrupt object table lwzx r4,r4,r15 # load object pointer - lwz r6,ppcreg_msr(r13) # restore msr, including - mtmsr r6 # interrupt enable + lwz r6,ppcreg_msr(r14) # restore msr, including + lis r5,0xfffe # interrupt enable. + andc r6,r6,r5 # mask out reserved bits + sync # (and POW!) + mtmsr r6 + sync - mr r5,r13 # arg3 = saved register dump + mr r5,r14 # arg3 = saved register dump .extern interrupt_end bl interrupt_end # call into C to finish off @@ -628,7 +760,11 @@ restore_state: lwz r0,ppcreg_regs(sp) lwz r2,ppcreg_regs+2*4(sp) - # restore registers 6..31 + # Restore registers used in vsr (r14+r15) + lwz r14,(ppcreg_regs+14*4)(r1) + lwz r15,(ppcreg_regs+15*4)(r1) + + # restore registers r6..r12/r31 .set _reg,6 .rept MAX_SAVE_REG+1-6 lwz _reg,(ppcreg_regs+_reg*4)(r1) @@ -647,8 +783,10 @@ restore_state: mtcr r3 # set ccr - lwi r3,0x00003002 # do rest with ints disabled + lwi r3,CYG_MSR # do rest with ints disabled + sync mtmsr r3 + sync mtsrr0 r4 # load old pc mtsrr1 r5 # load old msr @@ -662,7 +800,27 @@ restore_state: isync rfi # and return -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- +# Code for putting the CPU in a post-reset state; disabling MMU and caches. +_init_CPU: +#ifdef CYG_HAL_POWERPC_MPC8xx + lwi r3,CYGARC_REG_DC_CMD_CD + sync + mtspr CYGARC_REG_DC_CST,r3 + lwi r3,CYGARC_REG_IC_CMD_CD + isync + mtspr CYGARC_REG_IC_CST,r3 + isync +#endif + + # Set up MSR (disable MMU for now) + lwi r3,(CYG_MSR & ~(MSR_IR | MSR_DR)) + sync + mtmsr r3 + sync + blr + +#--------------------------------------------------------------------------- # This table contains a VSR pointer for each defined exception. # All of these except 5 and 9 point to the __default_exception_vsr # above, 5 and 9 point to the __default_interrupt_vsr. Entries in @@ -694,7 +852,7 @@ hal_vsr_table: .long __default_exception_vsr # floating point assist .long __default_exception_vsr # reserved 0x0f00 -#ifdef CYG_HAL_POWERPC_MP860 +#ifdef CYG_HAL_POWERPC_MPC8xx # Implementation defined vectors .long __default_exception_vsr # software emulation @@ -715,34 +873,38 @@ hal_vsr_table: .long __default_exception_vsr # non maskable development port #endif -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # Interrupt vector tables. # These tables contain the isr, data and object pointers used to deliver # interrupts to user code. - + +#if (CYG_ISR_TABLE_SIZE > 2) .data +#else + .section ".sdata","aw" +#endif .extern hal_default_isr .globl hal_interrupt_handlers hal_interrupt_handlers: - .rept 15 + .rept CYG_ISR_TABLE_SIZE .long hal_default_isr .endr .globl hal_interrupt_data hal_interrupt_data: - .rept 15 + .rept CYG_ISR_TABLE_SIZE .long 0 .endr .globl hal_interrupt_objects hal_interrupt_objects: - .rept 15 + .rept CYG_ISR_TABLE_SIZE .long 0 .endr -##----------------------------------------------------------------------------- +#--------------------------------------------------------------------------- ## Temporary interrupt stack .section ".bss" @@ -757,42 +919,5 @@ hal_interrupt_objects: .long 0,0,0,0,0,0,0,0 -#------------------------------------------------------------------------------ - -#ifndef CYG_KERNEL_USE_INIT_PRIORITY - -# Head of __init function used for static constructors - .section ".init.head","ax" - .align 2 -FUNC_START(__init) - stwu 1,-8(1) - mflr 0 - stw 0,12(1) - -# Head of __fini function used for static destructors - .section ".fini.head","ax" - .align 2 -FUNC_START(__fini) - stwu 1,-8(1) - mflr 0 - stw 0,12(1) - - -# Tail of __init used for static constructors - .section ".init.tail","ax" - lwz 0,12(1) - mtlr 0 - addi 1,1,8 - blr - -# Tail of __fini used for static destructors - .section ".fini.tail","ax" - lwz 0,12(1) - mtlr 0 - addi 1,1,8 - blr - -#endif - -#------------------------------------------------------------------------------ +#--------------------------------------------------------------------------- # end of vectors.S diff --git a/packages/hal/powerpc/arch/current/tests/PKGconf.mak b/packages/hal/powerpc/arch/current/tests/PKGconf.mak --- a/packages/hal/powerpc/arch/current/tests/PKGconf.mak +++ b/packages/hal/powerpc/arch/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -31,7 +31,7 @@ PACKAGE := hal_powerpc include ../../../../../pkgconf/pkgconf.mak -TESTS := +TESTS := intr0 include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/hal/powerpc/arch/current/tests/intr0.c b/packages/hal/powerpc/arch/current/tests/intr0.c new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/arch/current/tests/intr0.c @@ -0,0 +1,240 @@ +//================================================================= +// +// intr0.c +// +// Interrupt test 0 +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1998-12-01 +// Description: Simple test of MPC860 interrupt handling when the +// kernel has not been configured. Uses timer interrupts. +// Options: +//####DESCRIPTIONEND#### + +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include + +#include + +#include + +#if defined(CYG_HAL_POWERPC_MPC860) + +#undef CHECK(b) +#define CHECK(b) CYG_TEST_CHECK(b,#b) + +// Can't rely on Cyg_Interrupt class being defined. +#define Cyg_InterruptHANDLED 1 + +// This is the period between interrupts, measured in decrementer ticks. +// Period must be longer than the time required for setting up all the +// interrupt handlers. +#define PIT_PERIOD 5000 +#define TB_PERIOD (PIT_PERIOD*32) // assuming 512/16 divisors + +#define ID_RTC_SEC 12345 +#define ID_RTC_ALR 23451 +#define ID_PIT 34512 +#define ID_TBA 45123 +#define ID_TBB 51234 + +volatile cyg_uint32 count = 0; + +// Time/PERIOD 0 1 2 3 4 5 6 7 8 9 10 +// Interrupt PIT TBA PIT PIT TBB PIT PIT +// pit_count 0 0 0 1 1 2 2 3 3 4 4 +// count 0 0 1 3 4 4 5 40 41 42 + +static cyg_uint32 count_verify_table[] = {1, 4, 5, 41, 42}; +static int pit_count = 0; + +// Periodic timer ISR. Should be executing 5 times. +static cyg_uint32 isr_pit(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + cyg_uint32 verify_value; + + CYG_UNUSED_PARAM(CYG_ADDRWORD, data); + + CYG_ASSERT (CYGNUM_HAL_INTERRUPT_SIU_PIT == vector, "Wrong vector!"); + CYG_ASSERT (ID_PIT == data, "Wrong data!"); + + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SIU_PIT); + + count++; + + verify_value = count_verify_table[pit_count++]; + + CYG_ASSERT (count == verify_value, "Count wrong!"); + + // End of test when count is 42. Mask interrupts and print PASS text. + if (42 <= count || 5 == pit_count) { + HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SIU_PIT); + HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SIU_TB_A); + HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SIU_TB_B); + + if (42 == count && 5 == pit_count) + CYG_TEST_PASS_FINISH("Intr 0 OK"); + else + CYG_TEST_FAIL_FINISH("Intr 0 Failed."); + } + + return Cyg_InterruptHANDLED; +} + +// TimeBase A ISR. Should be executing once. +static cyg_uint32 isr_tba(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_UNUSED_PARAM(CYG_ADDRWORD, data); + + CYG_ASSERT (CYGNUM_HAL_INTERRUPT_SIU_TB_A == vector, "Wrong vector!"); + CYG_ASSERT (ID_TBA == data, "Wrong data!"); + + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SIU_TB_A); + + count = count * 3; + + return Cyg_InterruptHANDLED; +} + +// TimeBase B ISR. Should be executing once. +static cyg_uint32 isr_tbb(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_UNUSED_PARAM(CYG_ADDRWORD, data); + + CYG_ASSERT (CYGNUM_HAL_INTERRUPT_SIU_TB_B == vector, "Wrong vector!"); + CYG_ASSERT (ID_TBB == data, "Wrong data!"); + + HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SIU_TB_B); + + count = count * 8; + + return Cyg_InterruptHANDLED; +} + +void intr0_main( void ) +{ + CYG_TEST_INIT(); + +#if 0 + // The A.3 revision of the CPU I'm using at the moment generates a + // machine check exception when writing to IMM_RTCSC. Smells a + // bit like the "SIU4. Spurious External Bus Transaction Following + // PLPRCR Write." CPU errata. Have to find out for sure. Run real + // time clock interrupts on level 0 + { + // Still to do. + } +#endif + + // Run periodic timer interrupt on level 1 + { + cyg_uint16 piscr; + + // Attach pit arbiter. + HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_LVL1, + &hal_arbitration_isr_pit, ID_PIT, 0); + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_LVL1); + + // Attach pit isr. + HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_PIT, &isr_pit, + ID_PIT, 0); + HAL_INTERRUPT_SET_LEVEL (CYGNUM_HAL_INTERRUPT_SIU_PIT, 1); + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_PIT); + + + // Set period. + HAL_WRITE_UINT32 (CYGARC_REG_IMM_PITC, + (2*PIT_PERIOD) << CYGARC_REG_IMM_PITC_COUNT_SHIFT); + + // Enable. + HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + piscr |= CYGARC_REG_IMM_PISCR_PTE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr); + } + + // Run timebase interrupts on level 2 + { + cyg_uint16 tbscr; + cyg_uint32 tbl; + + // Attach tb arbiter. + HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_LVL2, + &hal_arbitration_isr_tb, ID_TBA, 0); + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_LVL2); + + // Attach tb isrs. + HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_TB_A, &isr_tba, + ID_TBA, 0); + HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_TB_B, &isr_tbb, + ID_TBB, 0); + HAL_INTERRUPT_SET_LEVEL (CYGNUM_HAL_INTERRUPT_SIU_TB_A, 2); + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_TB_A); + HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_TB_B); + + // Set reference A & B registers. + CYGARC_MFTB (TBL_R, tbl); + tbl += TB_PERIOD*3; + HAL_WRITE_UINT32 (CYGARC_REG_IMM_TBREF0, tbl); + tbl += TB_PERIOD*4; + HAL_WRITE_UINT32 (CYGARC_REG_IMM_TBREF1, tbl); + + // Enable. + HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= (CYGARC_REG_IMM_TBSCR_REFA | CYGARC_REG_IMM_TBSCR_REFB | + CYGARC_REG_IMM_TBSCR_TBE); + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + tbscr |= CYGARC_REG_IMM_TBSCR_REFAE | CYGARC_REG_IMM_TBSCR_REFBE; + HAL_WRITE_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr); + } + + HAL_ENABLE_INTERRUPTS(); + + for (;;); +} + +externC void +cyg_start( void ) +{ + intr0_main(); +} + +#else // ifdef CYG_HAL_POWERPC_MPC860 + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Not a MPC860"); +} + +#endif // ifdef CYG_HAL_POWERPC_MPC860 + +// EOF intr0.c diff --git a/packages/hal/powerpc/cogent/current/ChangeLog b/packages/hal/powerpc/cogent/current/ChangeLog --- a/packages/hal/powerpc/cogent/current/ChangeLog +++ b/packages/hal/powerpc/cogent/current/ChangeLog @@ -1,3 +1,246 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-04-06 Jesper Skov + + * src/hal_diag.c: Moved a declaration out of a local scope. + + * include/plf_stub.h: + * src/plf_stub.c: + * src/cma_ser.inl: + Use separate cma function prefix for stub. Fixed naming buglet in + cma_ser.inl. + +1999-03-29 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Fix type warning. + +1999-03-25 Jesper Skov + + * src/hal_diag.c: Made serial O-packetization match that of the + other archs. + +1999-03-23 Jesper Skov + + * src/cma_ser.inl: Wrapped in CYGONCE and changed hal_stub.h + inclusion to ppc_stub.h. + +1999-03-23 Jonathan Larmour + + * src/hal_diag.c: Disable interrupts when doing diag output so that + system "freezes" while this goes on + +1999-03-22 Jesper Skov + + * src/hal_diag.c: + * src/cogent.S: + Cleaned up some FIX MEs. + +1999-03-19 Jesper Skov + + * include/plf_stub.h: Changed config macro names. + +1999-03-17 Jesper Skov + + * include/plf_stub.h: Only initialize serial line when no DD is + around to do it. + +1999-03-08 Jesper Skov + + * src/cma_ser.inl (put_char): Hang until character is sent. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-20 Jonathan Larmour + + * src/cma_ser.inl: + Rename CYG_VECTOR_SIU_IRQ1 -> CYGNUM_HAL_INTERRUPT_SIU_IRQ1 in + line with recent HAL changes + +1999-02-16 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Changed + __output_gdb_string to hal_output_gdb_string. + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/plf_stub.c: [added] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-08 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 Jesper Skov + + * src/cogent.S: + * src/cma_ser.inl: + Cleaned up the MPC823/850 code. + +1999-02-05 John Dallaway + + * include/pkgconf/hal_powerpc_cogent.h: + Rename startup type 'stub' to 'stubs'. + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-02-04 Jesper Skov + + * src/cma_ser.inl: Undefine macros at end of file. + +1999-02-03 Jesper Skov + + * src/cma_ser.inl: Added naming prefix. + +1999-02-01 Jesper Skov + + * src/cma_ser.inl (hal_cma_init_serial): Proper initialization of + ST16C552. + +1999-01-29 Jesper Skov + + * src/cogent.S: + * src/cma_ser.inl: + Added MPC823/850 support. Some of it needs cleaning up a bit. + +1999-01-27 Jesper Skov + + * src/hal_stub.c: + * src/hal_diag.c: + Got rid of CYG_HAL_ROM_MONITOR. + + * src/hal_stub.c: + * src/hal_diag.c: + * src/cma_ser.inl: [added] + Moved minimal serial driver into its own file. + + * include/pkgconf/hal_powerpc_cogent.h: Added CDL for Diag port. + Disabled both. + +1999-01-26 Hugo Tyson + + * include/pkgconf/stubs.ldi: + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-26 Jesper Skov + + * src/hal_diag.c: + * include/pkgconf/hal_powerpc_cogent.h: Added + CYGHWR_HAL_POWERPC_COGENT_GDB_PORT option. + +1999-01-20 Jesper Skov + + * include/pkgconf/stub.ldi: [removed] + * include/pkgconf/stubs.ldi: [added] + Renamed 'stub' to 'stubs'. + +1999-01-19 Jesper Skov + + * include/pkgconf/stub.ldi: + * include/pkgconf/rom.ldi: + * include/pkgconf/hal_powerpc_cogent.h: + Added STUB configuration type; allow ROM to use all of memory. + +1999-01-07 Jesper Skov + PR 18680 + + * src/hal_diag.c (hal_diag_init): + * src/hal_stub.c (serial_init): + Disable serial interrupts properly. + +1999-01-04 Jesper Skov + + * src/hal_stub.c: Changed to use the interrupt controller macros. + +1998-12-14 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Improved performance by + sending in batches. + +1998-12-14 Jesper Skov + + * src/hal_diag.c: Replaced CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS with + CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS. + +1998-12-09 Jesper Skov + + * src/cogent.S (hal_hardware_init): Added a sync instruction + before return to caller. + +1998-12-08 Jesper Skov + + * src/cogent.S (hal_hardware_init): Cleaned up use of magic + constants. + +1998-12-07 Jesper Skov + + * src/hal_diag.c (lcd_dis, hal_diag_init): Wait a bit before + writing to the LCD after it clears BUSY. + +1998-12-07 Jesper Skov + + * src/hal_stub.c (initHardware): Call diag_init when building a + ROM monitor. + +1998-12-04 Jesper Skov + + * src/cogent.S (hal_hardware_init): Also set pitrtc dicisor. + +1998-12-04 Jesper Skov + + * src/hal_stub.c: Comment change. + + * src/cogent.S (hal_hardware_init): Set timebase divisor. + +1998-12-02 Jesper Skov + + * src/hal_stub.c: Added a few CYGARC_REG_ prefixes. + +1998-12-02 Jesper Skov + + * src/hal_stub.c (serial_init): Enable FIFO. + +1998-11-26 Jesper Skov + + * src/hal_stub.c: Changes due to ppc_regs.h cleanup. + + * src/hal_diag.c: Removed bogus ppc_regs.h include. + +1998-11-17 Jesper Skov + + * src/cogent.S: Renamed CYG_HAL_POWERPC_MP860 to + CYG_HAL_POWERPC_MPC860. + + +1998-11-04 Jesper Skov + + * src/hal_diag.c: Rearranged header inclusion to avoid conflicts. + +1998-11-02 Jesper Skov + + * src/hal_stub.c (cyg_hal_gdb_isr): Call generic PPC GDB break + handler rather than triggering a breakpoint in the interrupt + handler. + +1998-11-02 Jesper Skov + + * src/hal_diag.c: Added proper CYG_HAL_ROM_MONITOR behavior. + 1998-10-28 Jesper Skov * src/hal_stub.c: Add special initialization of serial for CMA102 @@ -245,7 +488,7 @@ Mon Aug 17 22:13:41 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/cogent/current/include/hal_diag.h b/packages/hal/powerpc/cogent/current/include/hal_diag.h --- a/packages/hal/powerpc/cogent/current/include/hal_diag.h +++ b/packages/hal/powerpc/cogent/current/include/hal_diag.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/cogent/current/include/hal_stub.h b/packages/hal/powerpc/cogent/current/include/hal_stub.h deleted file mode 100644 --- a/packages/hal/powerpc/cogent/current/include/hal_stub.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef CYGONCE_HAL_HAL_STUB_H -#define CYGONCE_HAL_HAL_STUB_H - -//============================================================================= -// -// hal_stub.h -// -// General header for HAL GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jskov from an original by nickg -// Contributors: jskov -// Date: 1998-06-08 -// Purpose: HAL stub support. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include - -#include -#include - -//----------------------------------------------------------------------------- -#endif // CYGONCE_HAL_HAL_STUB_H -// End of hal_stub.h - - diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/hal_powerpc_cogent.h b/packages/hal/powerpc/cogent/current/include/pkgconf/hal_powerpc_cogent.h --- a/packages/hal/powerpc/cogent/current/include/pkgconf/hal_powerpc_cogent.h +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/hal_powerpc_cogent.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -60,22 +60,55 @@ parent CYGPKG_HAL_POWERPC_COGENT #type count type enum - legal_values ram rom + legal_values ram rom stubs startup description " When targetting the cogent board it is possible to build - the system for either RAM bootstrap or ROM bootstrap. The - former generally requires that the board is equipped with - ROMs containing a suitable ROM monitor or equivalent - software that allows gdb to download the eCos application - on to the board. The latter typically requires that the - eCos application be blown into EPROMs or equivalent - technology." - } - - }}CFG_DATA */ + the system for either RAM bootstrap, ROM bootstrap, or STUB + bootstrap. RAM bootstrap generally requires that the board + is equipped with ROMs containing a suitable ROM monitor or + equivalent software that allows GDB to download the eCos + application on to the board. The ROM bootstrap typically + requires that the eCos application be blown into EPROMs or + equivalent technology. STUB bootstrap is for configurations + of eCos used only as GDB stub ROMs; the use of memory is + limited to the top 1MB." + } + +#### There will be a flood of PRs if the config tool is allowed to fiddle +#### with these two... *sigh* +## cdl_option CYGHWR_HAL_POWERPC_COGENT_GDB_PORT { +## display "GDB Serial Port" +## parent CYGPKG_HAL_POWERPC_COGENT +## type enum +## legal_values 1 0 +## description " +## The Cogent board has two separate serial ports. This option +## chooses which of these ports will be used by the GDB stub. +## On the CMA101 board, 0 and 1 are the P11 and P12 +## connectors respectively. On the CMA102 board, 0 and 1 are +## the P2 and P3 connectors respectively." +## } +## +## cdl_option CYGHWR_HAL_POWERPC_COGENT_DIAG_PORT { +## display "Diag Serial Port" +## parent CYGPKG_HAL_POWERPC_COGENT +## type enum +## legal_values 1 0 +## description " +## The Cogent board has two separate serial ports. This option +## chooses which of these ports will be used for diag output. +## On the CMA101 board, 0 and 1 are the P11 and P12 +## connectors respectively. On the CMA102 board, 0 and 1 are +## the P2 and P3 connectors respectively." +## } + + + }}CFG_DATA */ #define CYGHWR_HAL_POWERPC_COGENT_STARTUP ram +#define CYGHWR_HAL_POWERPC_COGENT_GDB_PORT 1 +#define CYGHWR_HAL_POWERPC_COGENT_DIAG_PORT 1 /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_POWERPC_COGENT_H */ diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.ldi b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// RAM start linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x00000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0x0, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.mlt b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 800000 0 ! +section vectors 0 1 0 1 1 1 1 1 0 0 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.ldi b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.ldi @@ -0,0 +1,49 @@ +//=========================================================================== +// +// ROM start linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + rom : ORIGIN = 0xfff00000, LENGTH = 0x40000 + ram : ORIGIN = 0x00002000, LENGTH = 0x7fe000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (rom, 0xfff00000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x2000, FOLLOWING (.gcc_except_table)) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.mlt b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 2000 7fe000 0 ! +region rom fff00000 40000 1 ! +section data 0 1 1 1 1 1 0 0 2000 sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! +section vectors 0 1 0 1 1 1 1 1 fff00000 fff00000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.ldi b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.ldi @@ -0,0 +1,49 @@ +//=========================================================================== +// +// Stubs startup linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + rom : ORIGIN = 0xfff00000, LENGTH = 0x40000 + ram : ORIGIN = 0x00700000, LENGTH = 0x100000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (rom, 0xfff00000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x700000, FOLLOWING (.gcc_except_table)) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.mlt b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 700000 100000 0 ! +region rom fff00000 40000 1 ! +section data 0 1 1 1 1 1 0 0 700000 sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! +section vectors 0 1 0 1 1 1 1 1 fff00000 fff00000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/powerpc/cogent/current/include/plf_stub.h b/packages/hal/powerpc/cogent/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/plf_stub.h @@ -0,0 +1,98 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform HAL stub support for PowerPC/Cogent boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL +#include +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM, externC + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. +externC void hal_cma_stub_init_serial( void ); +externC int hal_cma_stub_get_char( void ); +externC void hal_cma_stub_put_char( int c ); +externC int hal_cma_stub_interruptible( int state ); +externC void hal_cma_stub_init_break_irq( void ); + +// Only define init function if no serial driver is used on the same port. +#if ((CYGHWR_HAL_POWERPC_COGENT_GDB_PORT == 0 \ + && defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A)) || \ + (CYGHWR_HAL_POWERPC_COGENT_GDB_PORT == 1 \ + && defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B))) +#define HAL_STUB_PLATFORM_INIT_SERIAL() CYG_EMPTY_STATEMENT +#else +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_cma_stub_init_serial() +#endif + +#define HAL_STUB_PLATFORM_GET_CHAR() hal_cma_stub_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_cma_stub_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_cma_stub_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() hal_cma_stub_init_break_irq() + +//---------------------------------------------------------------------------- +// Stub initializer. +extern void diag_init (void); +#define HAL_STUB_PLATFORM_STUBS_INIT() diag_init() + + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/powerpc/cogent/current/src/PKGconf.mak b/packages/hal/powerpc/cogent/current/src/PKGconf.mak --- a/packages/hal/powerpc/cogent/current/src/PKGconf.mak +++ b/packages/hal/powerpc/cogent/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,24 +32,10 @@ PACKAGE := hal_powerpc_cogent include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := hal_diag.c cogent.S hal_stub.c +COMPILE := hal_diag.c cogent.S plf_stub.c OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - -.PHONY: ldscript.clean - -ldscript.stamp: cogent.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - diff --git a/packages/hal/powerpc/cogent/current/src/cma_ser.inl b/packages/hal/powerpc/cogent/current/src/cma_ser.inl new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/src/cma_ser.inl @@ -0,0 +1,381 @@ +#ifndef CYGONCE_HAL_CMA_SER_H +#define CYGONCE_HAL_CMA_SER_H +//============================================================================= +// +// cma_ser.inl +// +// Simple driver for the Cogent CMA mother board serial +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-01-27 +// Description: Simple driver for the Cogent CMA mother board serial. +// Clients of this file can configure the behavior with: +// CYG_CMA_PORT: serial port to use (0 or 1) +// CYG_CMA_PUBLIC: define to export init, get, and put functions. +// CYG_CMA_STUB: define to get extra stub functions +// CYG_CMA_NAME_PREFIX: Function prefix. Default is hal_cma_ +// Using different prefixes can be required +// if both serial ports are used from the +// same source file. +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include // IO macros +#include // HAL_ENABLE/MASK/UNMASK_INTERRUPTS + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include // target_register_t +#endif + +// Unless explicitly asked to export functions, keep them local. +#ifndef CYG_CMA_PUBLIC +#define CYG_CMA_PUBLIC static +#endif + +// Function names are prefix with hal_cma_ unless something else is specified. +#ifndef CYG_CMA_NAME_PREFIX +#define CYG_CMA_NAME_PREFIX hal_cma_ +#endif + +//----------------------------------------------------------------------------- +// Name Conversion magic. +#define Str(x, y) x ## y +#define Xstr(x, y) Str(x, y) +#define NC(_name) Xstr(CYG_CMA_NAME_PREFIX, _name) + +//----------------------------------------------------------------------------- +// The exported functions. +// Base: +CYG_CMA_PUBLIC void NC(init_serial)( void ); +CYG_CMA_PUBLIC int NC(get_char)( void ); +CYG_CMA_PUBLIC void NC(put_char)( int c ); +// GDB BREAK support: +#if defined(CYG_CMA_STUB) && defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) +int NC(interruptible)( int state ); +void NC(init_break_irq)( void ); +int cyg_hal_gdb_isr( target_register_t pc ); // called from vectors.S +#endif + +//----------------------------------------------------------------------------- +// Port to use. +#if (1 == CYG_CMA_PORT) +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CYG_DEVICE_SERIAL_RS232_16550_BASE_B +#else +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CYG_DEVICE_SERIAL_RS232_16550_BASE_A +#endif + +//----------------------------------------------------------------------------- +// Controller definitions. +#ifndef CYGONCE_HAL_CMA_SER_INL +#define CYGONCE_HAL_CMA_SER_INL + +//----------------------------------------------------------------------------- +// There are two serial ports. +#define CYG_DEVICE_SERIAL_RS232_16550_BASE_A 0xe900047 // port A +#define CYG_DEVICE_SERIAL_RS232_16550_BASE_B 0xe900007 // port B + +//----------------------------------------------------------------------------- +// Default baud rate is 38400 +#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 0x00 +#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 0x06 + +//----------------------------------------------------------------------------- +// Define the serial registers. The Cogent board is equipped with a 16552 +// serial chip. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_AFR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // alternate function register, read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x20) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR_A \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE_A + 0x20) +#define CYG_DEVICE_SERIAL_RS232_16550_MCR_B \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE_B + 0x20) +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x28) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x30) + // modem status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_SCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x38) + // scratch pad register + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// The FIFO control register +#define SIO_FCR_FCR0 0x01 // enable xmit and rcvr fifos +#define SIO_FCR_FCR1 0x02 // clear RCVR FIFO +#define SIO_FCR_FCR2 0x04 // clear XMIT FIFO + +#endif // ifndef CYGONCE_HAL_CMA_SER_INL + +//----------------------------------------------------------------------------- +// The minimal init, get and put functions. All by polling. + +CYG_CMA_PUBLIC void NC(init_serial)( void ) +{ + cyg_uint8 lcr; + + // Disable interrupts. +#ifdef CYG_HAL_POWERPC_MPC8xx + HAL_INTERRUPT_MASK(CYGNUM_HAL_INTERRUPT_SIU_IRQ1); +#else +#error "Not supported on CPU" +#endif + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, 0); + + // Disable and clear FIFOs (need to enable to clear). + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, + (SIO_FCR_FCR0 | SIO_FCR_FCR1 | SIO_FCR_FCR2)); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0); + + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + // Set speed to 38400. + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + + { + // Special initialization for ST16C552 on CMA102 + cyg_uint8 mcr; + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR_A, mcr); + mcr |= 8; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR_A, mcr); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR_B, mcr); + mcr |= 8; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR_B, mcr); + } + + // Enable FIFOs (and clear them). + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, + (SIO_FCR_FCR0 | SIO_FCR_FCR1 | SIO_FCR_FCR2)); + +} + +CYG_CMA_PUBLIC int NC(get_char)( void ) +{ + cyg_uint8 c, lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); + + return c; +} + +CYG_CMA_PUBLIC void NC(put_char)( int c ) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + + // Hang around until the character has been safely sent. + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); +} + + +//----------------------------------------------------------------------------- +// Additional functions required to provide GDB BREAK support. + +#if defined(CYG_CMA_STUB) && defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) +int NC(interruptible)( int state ) +{ + int vector; +#ifdef CYG_HAL_POWERPC_MPC8xx + // Serial interrupts are feed to IRQ1 on the 8xx CPUs. + vector = CYGNUM_HAL_INTERRUPT_SIU_IRQ1; +#else +#error "Not supported on CPU" +#endif + + if (state) { + HAL_INTERRUPT_UNMASK(vector); + } else { + HAL_INTERRUPT_MASK(vector); + } + + return 0; +} + +void NC(init_break_irq)( void ) +{ + NC(interruptible)(0); + + // Enable serial receive interrupts. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_ERDAI); + HAL_ENABLE_INTERRUPTS(); + + NC(interruptible)(1); +} + +// This ISR is called from the interrupt handler. This should only +// happen when there is no real serial driver, so the code shouldn't +// mess anything up. +int cyg_hal_gdb_isr( target_register_t pc ) +{ + cyg_uint8 vec; + int break_irq = 0; + +#ifdef CYG_HAL_POWERPC_MPC8xx + // Serial interrupts are feed to IRQ1 (vector 0x08) on the Cogent + // board. + HAL_READ_UINT8(CYGARC_REG_IMM_SIVEC, vec); + if (0x08 == vec) + break_irq = 1; +#else +#error "Not supported on CPU" +#endif + + if ( break_irq ){ + cyg_uint8 c; + + HAL_READ_UINT8( CYG_DEVICE_SERIAL_RS232_16550_RBR, c ); + if ( 3 == c ) + { + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt( pc ); + + // Interrupt handled. Don't call ISR proper. At return + // from the VSR, execution will stop at the breakpoint + // just set. + return 0; + } + } + + // Not caused by GDB. Call ISR proper. + return 1; +} + +#endif + +//----------------------------------------------------------------------------- +// Undefine all macros used in this file. +#undef CYG_CMA_PORT +#undef CYG_CMA_PUBLIC +#undef CYG_CMA_STUB +#undef CYG_CMA_NAME_PREFIX +#undef NC +#undef Str +#undef Xstr +#undef CYG_DEVICE_SERIAL_RS232_16550_BASE + +//----------------------------------------------------------------------------- +// end of cma_ser.inl +#endif // CYGONCE_HAL_CMA_SER_INL diff --git a/packages/hal/powerpc/cogent/current/src/cogent.S b/packages/hal/powerpc/cogent/current/src/cogent.S --- a/packages/hal/powerpc/cogent/current/src/cogent.S +++ b/packages/hal/powerpc/cogent/current/src/cogent.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -42,6 +42,7 @@ #include +#include #include #------------------------------------------------------------------------------ @@ -49,118 +50,75 @@ .globl hal_hardware_init hal_hardware_init: -#if defined(CYG_HAL_POWERPC_COGENT) && defined(CYG_HAL_POWERPC_MP860) +#if defined(CYG_HAL_POWERPC_COGENT) && defined(CYG_HAL_POWERPC_MPC8xx) - # Set up MP860 mapping registers for cogent + # Set up MPC8xx mapping registers for cogent + + lwi r3,CYGARC_REG_IMM_BASE # base address of control registers - # MP860 time base control register - lwi r3,0xff000200 - li r4,0x0001 - sth r4,0(r3) - + # Set timebase divisor to busclock/16, pitrtc divisor to 512. + lwz r4,(CYGARC_REG_IMM_SCCR - CYGARC_REG_IMM_BASE)(r3) + lwi r5,(CYGARC_REG_IMM_SCCR_RTDIV | CYGARC_REG_IMM_SCCR_RTSEL | CYGARC_REG_IMM_SCCR_TBS) + or r4,r4,r5 + stw r4,(CYGARC_REG_IMM_SCCR - CYGARC_REG_IMM_BASE)(r3) - lwi r3,0xff000000 # base address of control registers + # Enable TimeBase + li r4,CYGARC_REG_IMM_TBSCR_TBE + sth r4,(CYGARC_REG_IMM_TBSCR - CYGARC_REG_IMM_BASE)(r3) - # FIXME: I do not know if the timeout is correct. works with the - # below memory mappings/wait states and the PromICE. - lwi r4,0x0000ff80 # Disable watchdog, enable ... - stw r4,0x0004(r3) # ...Bus Monitor, timeout after 255*8 cycles + # Note: I do not know if the timeout is correct/optimal. + # Works with the above memory mappings/wait states and + # the PromICE. + # Disable watchdog, enable bus monitor, timeout after 255*8 cycles + lwi r4,(CYGARC_REG_IMM_SYPCR_BMT_MASK | CYGARC_REG_IMM_SYPCR_BME) + stw r4,(CYGARC_REG_IMM_SYPCR - CYGARC_REG_IMM_BASE)(r3) # Set CS0 to # base addr 0xfff00000 # wait states 4 # size 1M # Covers ROM - lwi r4,0xfff00801 - stw r4,0x0100(r3) - lwi r4,0xfff00140 - stw r4,0x0104(r3) + # Note: After a reset code is currently executing via the default + # mapping defined in bank 0. This bank must remain valid while + # it is being configured. + lwi r4,(0xfff00000 | CYGARC_REG_IMM_BR_PS_16 | CYGARC_REG_IMM_BR_V) + stw r4,(CYGARC_REG_IMM_BR0 - CYGARC_REG_IMM_BASE)(r3) + lwi r4,(0xfff00000 | CYGARC_REG_IMM_OR_BI | 4 << CYGARC_REG_IMM_OR_SCY_SHIFT) + stw r4,(CYGARC_REG_IMM_OR0 - CYGARC_REG_IMM_BASE)(r3) # Set CS1 to # base addr 0x00000000 # external ACK # size 64M # Covers DRAM and slot0 - lwi r4,0x00000001 - stw r4,0x0108(r3) - lwi r4,0xfc000008 - stw r4,0x010c(r3) + lwi r4,(0xfc000000 | CYGARC_REG_IMM_OR_SETA) + stw r4,(CYGARC_REG_IMM_OR1 - CYGARC_REG_IMM_BASE)(r3) + lwi r4,(0x00000000 | CYGARC_REG_IMM_BR_PS_32 | CYGARC_REG_IMM_BR_V) + stw r4,(CYGARC_REG_IMM_BR1 - CYGARC_REG_IMM_BASE)(r3) # Set CS2 to # base addr 0x04000000 # external ACK # size 64M # slot1 and slot2 - lwi r4,0x04000001 - stw r4,0x0110(r3) - lwi r4,0xfc000008 - stw r4,0x0114(r3) + lwi r4,(0xfc000000 | CYGARC_REG_IMM_OR_SETA) + stw r4,(CYGARC_REG_IMM_OR2 - CYGARC_REG_IMM_BASE)(r3) + lwi r4,(0x04000000 | CYGARC_REG_IMM_BR_PS_32 | CYGARC_REG_IMM_BR_V) + stw r4,(CYGARC_REG_IMM_BR2 - CYGARC_REG_IMM_BASE)(r3) # Set CS3 to # base addr 0x0e000000 # exernal ack # size 32M # covers IO registers - lwi r4,0x0e000001 - stw r4,0x0118(r3) - lwi r4,0xfe000108 - stw r4,0x011c(r3) - -#if 0 - # Set up the BAT registers to cover same address spaces + lwi r4,(0xfe000000 | CYGARC_REG_IMM_OR_BI | CYGARC_REG_IMM_OR_SETA) + stw r4,(CYGARC_REG_IMM_OR3 - CYGARC_REG_IMM_BASE)(r3) + lwi r4,(0x0e000000 | CYGARC_REG_IMM_BR_PS_32 | CYGARC_REG_IMM_BR_V) + stw r4,(CYGARC_REG_IMM_BR3 - CYGARC_REG_IMM_BASE)(r3) - # The 860 does not appear to have BAT registers. - - # ibat0 - # base addr 0xfff00000 - # length 1M - # WIMG = 0000 - # covers ROM - lwi r4,0xfff0001f - mtibatu 0,r4 - lwi r4,0xfff00002 - mtibatl 0,r4 - - # ibat1 - # base addr 0x00000000 - # length 256M - # WIMG = 0000 - # covers DRAM and slots - lwi r4,0x00001fff - mtibatu 1,r4 - lwi r4,0x00000002 - mtibatl 1,r4 - - # dbat0 - # base addr 0xfff00000 - # length 256M - # WIMG = 0101 - # covers ROM for data access - lwi r4,0xfff01fff - mtdbatu 0,r4 - lwi r4,0xfff0002a - mtdbatl 0,r4 - - # dbat1 - # base addr 0x00000000 - # length 256M - # WIMG = 0000 - # covers DRAM and slots - lwi r4,0x00001fff - mtdbatu 1,r4 - lwi r4,0x00000002 - mtdbatl 1,r4 - - # Enable translation in the MSR - mfmsr r3 - lwi r4,0x00000030 - or r3,r3,r4 - mtmsr r3 - -#endif - #endif + sync blr #------------------------------------------------------------------------------ diff --git a/packages/hal/powerpc/cogent/current/src/cogent.ld b/packages/hal/powerpc/cogent/current/src/cogent.ld deleted file mode 100644 --- a/packages/hal/powerpc/cogent/current/src/cogent.ld +++ /dev/null @@ -1,170 +0,0 @@ -/*========================================================================== -// -// cogent.ld -// -// Linker script for Cogent/MPC860 board -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors:nickg -// Date: 1998-02-17 -// Purpose: Cogent Linker script -// Description: This script is passed to the linker to define the memory -// of the Cogent/MPC860 board. -// -//####DESCRIPTIONEND#### -// -//========================================================================*/ -STARTUP(vectors.o) -ENTRY(reset_vector) - -GROUP(libtarget.a libgcc.a) - -#include - -#ifdef CYG_HAL_STARTUP_ROM -#define LOAD_BASE 0xFFF00000 -#define DATA_BASE 0x00780000 // Data at top of memory so GDB - // doesn't trash ROM state while - // downloading programs. -#endif -#ifdef CYG_HAL_STARTUP_RAM -#define LOAD_BASE 0x00000000 -#define DATA_BASE -#endif - -// Alignment of sections must be equal to or bigger than the alignment -// requested by gcc (use 'objdump -h' to see these). - -SECTIONS -{ - - /* Start of ROM */ - . = LOAD_BASE; - - .rom_vectors : - { - KEEP(*(.vectors)) - } - - /*------------------------------------------------------------*/ - - .text : - { - _stext = .; - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - *(.init) - } - - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } - .rodata1 : { *(.rodata1) } - .rodata : { *(.rodata*) } - .fixup : { *(.fixup) } - .gcc_except_table : { *(.gcc_except_table) } - -// __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); - __rom_data_start = ALIGN(8); - .data DATA_BASE : - AT( __rom_data_start ) - { - __ram_data_start = .; - *(.data*) - __GOT1_START__ = .; - *(.got1) - __GOT1_END__ = .; - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. */ -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - . = ALIGN(8); - __CTOR_LIST__ = .; - KEEP(*(SORT(.ctors*))) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - KEEP(*(SORT(.dtors*))) - __DTOR_END__ = .; -#else - __CTOR_LIST__ = .; - *sched.o(.ctors*) - *clock.o(.ctors*) - *thread.o(.ctors*) - *(.ctors*) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - *(.dtors) - __DTOR_END__ = .; -#endif - __GOT2_START__ = .; - *(.got2) - __GOT2_END__ = .; - __GOT_START__ = .; - _GLOBAL_OFFSET_TABLE_ = . + 32768; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - __GOT_END__ = .; - *(.dynamic) - // We want the small data sections together, so single-instruction offsets - // can access them all, and initialized data all before uninitialized, so - // we can shorten the on-disk segment size. - __SDATA_START__ = .; - *(.sdata) - __SDATA2_START__ = .; - *(.sdata2) - } - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - . = ALIGN(4); - __bss_start = .; - .sbss : - { - __SBSS_START__ = .; - *(.sbss) - __SBSS_END__ = .; - __SBSS2_START__ = .; - *(.sbss2) - __SBSS2_END__ = .; - *(.scommon) - } - . = ALIGN(8); - .bss : - { - *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - -} diff --git a/packages/hal/powerpc/cogent/current/src/hal_diag.c b/packages/hal/powerpc/cogent/current/src/hal_diag.c --- a/packages/hal/powerpc/cogent/current/src/hal_diag.c +++ b/packages/hal/powerpc/cogent/current/src/hal_diag.c @@ -22,38 +22,35 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg, jskov -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. +// Author(s): nickg, jskov +// Contributors: nickg, jskov +// Date: 1999-03-23 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. // //####DESCRIPTIONEND#### // //============================================================================= #include +#include // CYGHWR_HAL_POWERPC_COGENT_DIAG_PORT -#include // base types -#include // tracing macros -#include // assertion macros - -#include // IO macros -#include +#include // our header. #if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) -#include // __output_gdb_string +#include // hal_output_gdb_string #endif -#include - +#include // base types, externC +#include // IO macros +#include // Interrupt macros //----------------------------------------------------------------------------- // Select default diag channel to use @@ -70,151 +67,151 @@ #endif -//----------------------------------------------------------------------------- -// Cogent board specific 16550 code. - -#if defined(CYG_KERNEL_DIAG_SERIAL) +// Always use LCD when building a GDB stub ROM. +#ifdef CYG_HAL_STARTUP_STUBS +#undef CYG_KERNEL_DIAG_SERIAL +#undef CYG_KERNEL_DIAG_ROMART -//----------------------------------------------------------------------------- -// From serial_16550.h -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 0x00 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 0x06 +#define CYG_KERNEL_DIAG_LCD +#endif -// FIXME: This is the base address of the B-channel on the PowerPC -// Cogent board. -#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0xe900007 +// Assumption: all diagnostic output must be GDB packetized unless +// this is a ROM (i.e. totally stand-alone) system. +#ifdef CYG_HAL_STARTUP_ROM +#define HAL_DIAG_USES_HARDWARE +#endif -// Define the serial registers. -#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // receiver buffer register, read, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_THR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // transmitter holding register, write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // divisor latch (LS), read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_IER \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) - // interrupt enable register, read/write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) - // divisor latch (MS), read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // interrupt identification register, read, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // fifo control register, write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_AFR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // alternate function register, read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) - // line control register, read/write -#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x20) - // modem control register, read/write -#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x28) - // line status register, read -#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x30) - // modem status register, read -#define CYG_DEVICE_SERIAL_RS232_16550_SCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x38) - // scratch pad register +//----------------------------------------------------------------------------- +// Serial diag functions. +#ifdef CYG_KERNEL_DIAG_SERIAL -// FIXME: Naming convention? -// The interrupt enable register bits. -#define SIO_IER_ERDAI 0x01 // enable received data available irq -#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt -#define SIO_IER_ELSI 0x04 // enable receiver line status irq -#define SIO_IER_EMSI 0x08 // enable modem status interrupt - -// The interrupt identification register bits. -#define SIO_IIR_IP 0x01 // 0 if interrupt pending -#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits +// Include the serial driver. +#define CYG_CMA_PORT CYGHWR_HAL_POWERPC_COGENT_DIAG_PORT +#include -// The line status register bits. -#define SIO_LSR_DR 0x01 // data ready -#define SIO_LSR_OE 0x02 // overrun error -#define SIO_LSR_PE 0x04 // parity error -#define SIO_LSR_FE 0x08 // framing error -#define SIO_LSR_BI 0x10 // break interrupt -#define SIO_LSR_THRE 0x20 // transmitter holding register empty -#define SIO_LSR_TEMT 0x40 // transmitter register empty -#define SIO_LSR_ERR 0x80 // any error condition - -// The modem status register bits. -#define SIO_MSR_DCTS 0x01 // delta clear to send -#define SIO_MSR_DDSR 0x02 // delta data set ready -#define SIO_MSR_TERI 0x04 // trailing edge ring indicator -#define SIO_MSR_DDCD 0x08 // delta data carrier detect -#define SIO_MSR_CTS 0x10 // clear to send -#define SIO_MSR_DSR 0x20 // data set ready -#define SIO_MSR_RI 0x40 // ring indicator -#define SIO_MSR_DCD 0x80 // data carrier detect - -// The line control register bits. -#define SIO_LCR_WLS0 0x01 // word length select bit 0 -#define SIO_LCR_WLS1 0x02 // word length select bit 1 -#define SIO_LCR_STB 0x04 // number of stop bits -#define SIO_LCR_PEN 0x08 // parity enable -#define SIO_LCR_EPS 0x10 // even parity select -#define SIO_LCR_SP 0x20 // stick parity -#define SIO_LCR_SB 0x40 // set break -#define SIO_LCR_DLAB 0x80 // divisor latch access bit +#ifdef HAL_DIAG_USES_HARDWARE void hal_diag_init(void) { -#if !defined(CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS) - cyg_uint8 lcr; - - // 8-1-no parity. - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, - SIO_LCR_WLS0 | SIO_LCR_WLS1); - - // Set speed to 38400. - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); - lcr |= SIO_LCR_DLAB; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, - CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400); - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, - CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400); - lcr &= ~SIO_LCR_DLAB; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); -#endif + hal_cma_init_serial(); } -void hal_diag_write_char(char c) +void hal_diag_write_char(char __c) { -#if !defined(CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS) - cyg_uint8 lsr; - - do { - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); - } while ((lsr & SIO_LSR_THRE) == 0); - - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); -#else - __output_gdb_string (&c, 1); -#endif + hal_cma_put_char(__c); } void hal_diag_read_char(char *c) { - cyg_uint8 lsr; + *c = (char) hal_cma_get_char(); +} + +#else // ifdef HAL_DIAG_USES_HARDWARE + +// Initialize diag port +void hal_diag_init(void) +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + // assume GDB channel is already set up. + if (0) hal_cma_init_serial(); // avoids compiler warning +#else + hal_cma_init_serial(); +#endif + +} + +void +hal_diag_write_char_serial( char c ) +{ + unsigned long __state; + HAL_DISABLE_INTERRUPTS(__state); + hal_cma_put_char(c); + HAL_RESTORE_INTERRUPTS(__state); +} + +void +hal_diag_read_char(char *c) +{ + *c = (char) hal_cma_get_char(); +} + +void +hal_diag_write_char(char c) +{ + + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; - do { - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); - } while ((lsr & SIO_LSR_DR) == 0); + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + while(1) + { + char c1; + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. + hal_diag_read_char(&c1); + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + if( 3 == c1 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt( + (target_register_t)__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } } -#endif + +#endif // ifdef HAL_DIAG_USES_HARDWARE + +#endif // ifdef CYG_KERNEL_DIAG_SERIAL //----------------------------------------------------------------------------- // Cogent board specific LCD code @@ -273,13 +270,19 @@ static int lcd_linepos = 0; static void lcd_dis(int add, char *string); +externC void diag_write_string (const char*); + void hal_diag_init() { cyg_uint8 stat; int i; // wait for not busy + // Note: It seems that the LCD isn't quite ready to process commands + // when it clears the BUSY flag. Reading the status address an extra + // time seems to give it enough breathing room. do { HAL_READ_UINT8 (LCD_STAT, stat); } while (stat & LCD_STAT_BUSY); + HAL_READ_UINT8 (LCD_STAT, stat); // configure the lcd for 8 bits/char, 2 lines // and 5x7 dot matrix @@ -287,6 +290,7 @@ void hal_diag_init() // wait for not busy do { HAL_READ_UINT8 (LCD_STAT, stat); } while (stat & LCD_STAT_BUSY); + HAL_READ_UINT8 (LCD_STAT, stat); // turn the LCD display on HAL_WRITE_UINT8 (LCD_CMD, LCD_CMD_DON); @@ -303,12 +307,11 @@ void hal_diag_init() lcd_dis( LCD_LINE1, lcd_line[1] ); -#if defined(CYG_HAL_ROM_MONITOR) +#ifdef CYG_HAL_STARTUP_STUBS // It's handy to have the LCD initialized at reset when using it - for debugging output. + // for debugging output. { - extern void diag_write_string (const char*); - diag_write_string ("eCos ROM " __TIME__ "\n"); + diag_write_string ("eCos ROM " __TIME__ "\n"); diag_write_string (__DATE__ "\n"); } #endif @@ -321,18 +324,19 @@ static void lcd_dis(int add, char *strin cyg_uint8 stat; int i; + // wait for not busy (see Note in hal_diag_init above) + do { HAL_READ_UINT8 (LCD_STAT, stat); } while (stat & LCD_STAT_BUSY); + HAL_READ_UINT8 (LCD_STAT, stat); + + // write the address + HAL_WRITE_UINT8 (LCD_CMD, (LCD_CMD_ADD + add)); + // write the string out to the display stopping when we reach 0 for (i = 0; *string != '\0'; i++) { // wait for not busy do { HAL_READ_UINT8 (LCD_STAT, stat); } while (stat & LCD_STAT_BUSY); - - // write the address - HAL_WRITE_UINT8 (LCD_CMD, (LCD_CMD_ADD + add)); - add++; - - // wait for not busy - do { HAL_READ_UINT8 (LCD_STAT, stat); } while (stat & LCD_STAT_BUSY); + HAL_READ_UINT8 (LCD_STAT, stat); // write the data HAL_WRITE_UINT8 (LCD_DATA, *string++); @@ -341,11 +345,13 @@ static void lcd_dis(int add, char *strin void hal_diag_write_char(char c) { + unsigned long __state; int i; // ignore CR if( c == '\r' ) return; + HAL_DISABLE_INTERRUPTS(__state) if( c == '\n' ) { lcd_dis( LCD_LINE0, &lcd_line[lcd_curline^1][0] ); @@ -358,19 +364,18 @@ void hal_diag_write_char(char c) for( i = 0; i < LCD_LINE_LENGTH; i++ ) lcd_line[lcd_curline][i] = ' '; + HAL_RESTORE_INTERRUPTS(__state); return; } - // Truncate long lines - if( lcd_linepos >= LCD_LINE_LENGTH ) return; + // Only allow to be output if there is room on the LCD line + if( lcd_linepos < LCD_LINE_LENGTH ) + lcd_line[lcd_curline][lcd_linepos++] = c; - lcd_line[lcd_curline][lcd_linepos++] = c; + HAL_RESTORE_INTERRUPTS(__state); } -char hal_diag_read_char(void) -{ - return 0; -} +void hal_diag_read_char(char* c) {} #endif @@ -386,7 +391,7 @@ char hal_diag_read_char(void) #endif // Add this to the LoadICE config file: ailoc 20 19200 -// FIXME: I couldn't get this to work. jskov +// Note: I couldn't get this to work. jskov #define PROMICE_BUS_SIZE 16 #define PROMICE_BURST_SIZE 1 @@ -427,7 +432,10 @@ static void ai_write_char(cyg_uint8 data { volatile cyg_uint8 junk; int i; + unsigned long __state; + HAL_DISABLE_INTERRUPTS(__state) + // Wait for tda == 0 while( (AI->status & PROMICE_STATUS_TDA) == PROMICE_STATUS_TDA ) continue; @@ -450,6 +458,8 @@ static void ai_write_char(cyg_uint8 data // Send stop bit junk = AI->one; + HAL_RESTORE_INTERRUPTS(__state); + // all done } diff --git a/packages/hal/powerpc/cogent/current/src/hal_stub.c b/packages/hal/powerpc/cogent/current/src/hal_stub.c deleted file mode 100644 --- a/packages/hal/powerpc/cogent/current/src/hal_stub.c +++ /dev/null @@ -1,350 +0,0 @@ -/* hal_stub.c - helper functions for stub, specific to ECC HAL - * - * Copyright (c) 1998 Cygnus Support - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. - */ - -#include - -#include - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include -#include -#include // IO macros -#include // HAL_ENABLE_INTERRUPTS -#include // Register values -#include -#include - -/*---------------------------------------------------------------------------*/ -/* From serial_16550.h */ -#define CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400 0x00 -#define CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400 0x06 - -// FIXME: This is the base address of the B-channel on the PowerPC -// Cogent board. -#define CYG_DEVICE_SERIAL_RS232_16550_BASE 0xe900007 - - -// Define the serial registers. -#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // receiver buffer register, read, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_THR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // transmitter holding register, write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) - // divisor latch (LS), read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_IER \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) - // interrupt enable register, read/write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) - // divisor latch (MS), read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // interrupt identification register, read, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // fifo control register, write, dlab = 0 -#define CYG_DEVICE_SERIAL_RS232_16550_AFR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) - // alternate function register, read/write, dlab = 1 -#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) - // line control register, read/write -#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x20) - // modem control register, read/write -#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x28) - // line status register, read -#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x30) - // modem status register, read -#define CYG_DEVICE_SERIAL_RS232_16550_SCR \ - ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x38) - // scratch pad register - -// FIXME: Naming convention? -// The interrupt enable register bits. -#define SIO_IER_ERDAI 0x01 // enable received data available irq -#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt -#define SIO_IER_ELSI 0x04 // enable receiver line status irq -#define SIO_IER_EMSI 0x08 // enable modem status interrupt - -// The interrupt identification register bits. -#define SIO_IIR_IP 0x01 // 0 if interrupt pending -#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits - -// The line status register bits. -#define SIO_LSR_DR 0x01 // data ready -#define SIO_LSR_OE 0x02 // overrun error -#define SIO_LSR_PE 0x04 // parity error -#define SIO_LSR_FE 0x08 // framing error -#define SIO_LSR_BI 0x10 // break interrupt -#define SIO_LSR_THRE 0x20 // transmitter holding register empty -#define SIO_LSR_TEMT 0x40 // transmitter register empty -#define SIO_LSR_ERR 0x80 // any error condition - -// The modem status register bits. -#define SIO_MSR_DCTS 0x01 // delta clear to send -#define SIO_MSR_DDSR 0x02 // delta data set ready -#define SIO_MSR_TERI 0x04 // trailing edge ring indicator -#define SIO_MSR_DDCD 0x08 // delta data carrier detect -#define SIO_MSR_CTS 0x10 // clear to send -#define SIO_MSR_DSR 0x20 // data set ready -#define SIO_MSR_RI 0x40 // ring indicator -#define SIO_MSR_DCD 0x80 // data carrier detect - -// The line control register bits. -#define SIO_LCR_WLS0 0x01 // word length select bit 0 -#define SIO_LCR_WLS1 0x02 // word length select bit 1 -#define SIO_LCR_STB 0x04 // number of stop bits -#define SIO_LCR_PEN 0x08 // parity enable -#define SIO_LCR_EPS 0x10 // even parity select -#define SIO_LCR_SP 0x20 // stick parity -#define SIO_LCR_SB 0x40 // set break -#define SIO_LCR_DLAB 0x80 // divisor latch access bit - -/*---------------------------------------------------------------------------*/ - -/* Local data */ - - -/* If ENABLED is non-zero, supply a memory fault handler that traps - subsequent memory errors and sets _mem_err to 1. Otherwise, memory - faults are processed as exceptions. */ - -void __set_mem_fault_trap (int enable) {} - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT -// This ISR is called from the interrupt handler on external -// interrupts. This should only happen when there is no serial -// driver, so the code shouldn't mess anything up. -int cyg_hal_gdb_isr (void) -{ - cyg_uint8 vec; - - - // Serial interrupts are feed to IRQ1 (vector 0x08) on the Cogent - // board. - HAL_READ_UINT8 (IMM_SIVEC, vec); - if (0x08 == vec) { - cyg_uint8 c; - - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); - if( 3 == c ) - { - // Ctrl-C: breakpoint. - extern void breakpoint(void); - breakpoint(); - - // Interrupt handled. Don't call ISR proper. - return 0; - } - } - - // Not caused by GDB. Call ISR proper. - return 1; -} - -static int interruptible (int state) -{ - unsigned long mask; - HAL_READ_UINT32(IMM_SIMASK, mask); - - // Serial interrupts are feed to IRQ1. - if (state) { - HAL_WRITE_UINT32(IMM_SIMASK, mask | 0x20000000); - } else { - HAL_WRITE_UINT32(IMM_SIMASK, mask & (~0x20000000)); - } - - return 0; -} -#endif - -static void serial_init(void) -{ - cyg_uint8 lcr; - - // 8-1-no parity. - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, - SIO_LCR_WLS0 | SIO_LCR_WLS1); - - // Set speed to 38400. - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); - lcr |= SIO_LCR_DLAB; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, - CYG_DEVICE_SERIAL_RS232_T2_VALUE_B38400); - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, - CYG_DEVICE_SERIAL_RS232_T1_VALUE_B38400); - lcr &= ~SIO_LCR_DLAB; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); - - { - // Special initialization for ST16C552 on CMA102 - cyg_uint8 mcr; - - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, mcr); - mcr |= 8; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, mcr); - - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR+0x40, mcr); - mcr |= 8; - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR+0x40, mcr); - } - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - // Enable IRQ1. - HAL_WRITE_UINT32(IMM_SIMASK, 0x20000000); - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0); - // Enable serial receive interrupts. - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_ERDAI); - HAL_ENABLE_INTERRUPTS(); -#endif -} - -/* Write C to the current serial port. */ - -void putDebugChar (int c) -{ - cyg_uint8 lsr; - - do { - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); - } while ((lsr & SIO_LSR_THRE) == 0); - - HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); -} - -/* Read one character from the current serial port. */ - -int getDebugChar (void) -{ - char c; - cyg_uint8 lsr; - - do { - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); - } while ((lsr & SIO_LSR_DR) == 0); - - HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); - - return c; -} - - -/* Install the standard set of trap handlers for the stub. */ - -void __install_traps (void) -{ - // Nothing to do, the HAL will call handle_exception when one occurs. -} - -/* Flush the instruction cache. */ -void flush_i_cache (void) { HAL_ICACHE_INVALIDATE_ALL(); } - - -/* Reset the board. */ -void __reset (void) {} - - -/* Set the baud rate for the current serial port. */ -void __set_baud_rate (int baud) {} - - -/* Initialize the hardware. */ -void initHardware (void) -{ - static int initialized = 0; - - if (!initialized) { - initialized = 1; - - serial_init (); - -#if defined(CYG_HAL_ROM_MONITOR) - /* Initialize the LCD */ - diag_init (); -#endif - - } -} - -#if 0 -/* Alternate read function for use when stub is running. It - reads the data for standard input from the remote GDB. */ - -int dve_read (int fd, char *buf, int nbytes) -{ - __get_gdb_input (buf, nbytes, 1); -} - -/* Alternate write function for use when stub is running. It - writes the data for standard output to the remote GDB. */ - -int dve_write (int fd, char *buf, int nbytes) -{ - __output_gdb_string (buf, nbytes); -} - -#endif - - -int ppc_process_signal (int signal) -{ - /* We don't care about the signal (atm). */ - return 0; -} - -/* Install traps and otherwise initialize stub. */ - -void set_debug_traps (void) -{ - /* Set signal handling vector so we can treat 'C' as 'c'. */ - __process_signal_vec = &ppc_process_signal; - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - // Control of GDB interrupts. - __interruptible_control = &interruptible; -#endif - - initHardware (); -} - - -/* This function will generate a breakpoint exception. It is used at the - beginning of a program to sync up with a debugger and can be used - otherwise as a quick means to stop program execution and "break" into - the debugger. */ - -void -breakpoint() -{ - HAL_BREAKPOINT(_breakinst); -} - - -/* This function returns the opcode for a 'trap' instruction. */ - -unsigned long __break_opcode () -{ - return HAL_BREAKINST; -} - -#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS diff --git a/packages/hal/powerpc/cogent/current/src/plf_stub.c b/packages/hal/powerpc/cogent/current/src/plf_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/src/plf_stub.c @@ -0,0 +1,58 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +//---------------------------------------------------------------------------- +// Include the serial driver. +#define CYG_CMA_STUB +#define CYG_CMA_PUBLIC +#define CYG_CMA_PORT CYGHWR_HAL_POWERPC_COGENT_GDB_PORT +#define CYG_CMA_NAME_PREFIX hal_cma_stub_ +#include + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/powerpc/cogent/current/tests/PKGconf.mak b/packages/hal/powerpc/cogent/current/tests/PKGconf.mak --- a/packages/hal/powerpc/cogent/current/tests/PKGconf.mak +++ b/packages/hal/powerpc/cogent/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/fads/current/ChangeLog b/packages/hal/powerpc/fads/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/ChangeLog @@ -0,0 +1,130 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Jonathan Larmour + + * src/hal_diag.c: Disable interrupts when doing diag output so that + system "freezes" while this goes on + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-16 Jesper Skov + + * src/hal_diag.c (hal_diag_write_char): Changed + __output_gdb_string to hal_output_gdb_string. + + * include/hal_stub.h: [removed] + * include/plf_stub.h: [added] + * src/hal_stub.c: [removed] + * src/PKGconf.mak: + Changed hal_stub to plf_stub. Moved generic HAL stub code to + common/.../hal_stub.c. + +1999-02-08 Jesper Skov + + * include/pkgconf/hal_powerpc_fads.h: Put back in the startup + CDL. Fixed inconsistency with usage notes. + + * README: Added Kevin's usage notes. + +1999-02-08 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 Jesper Skov + + * src/PKGconf.mak: Fix comment. + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-27 Jesper Skov + + * README: Added copyright header. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + * include/pkgconf/rom.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-22 Jesper Skov + + * include/hal_diag.h: + * include/hal_stub.h: + * include/ppc_fads.h: + * include/pkgconf/hal_powerpc_fads.h: + * src/PKGconf.mak: + * src/fads.S: + * src/hal_diag.c: + * src/hal_stub.c: + Added UNSUPPORTED headers. + + * README: Added a few comments from Kevin. + +1999-01-22 Jesper Skov + + * include/pkgconf/hal_powerpc_fads.h: Removed startup type CDL. + +1999-01-22 Jesper Skov + + * src/fads.S (hal_hardware_init): Renamed CYG_HAL_POWERPC_FADS to + CYGPKG_HAL_POWERPC_FADS. + +1999-01-21 Jesper Skov + + * src/fads.ld: [removed] + * include/pkgconf/ram.ldi: [added] + * include/pkgconf/rom.ldi: [added] + * src/PKGconf.mak: + Changed to MLT linker scheme. + +1998-12-17 Jesper Skov + + * src/hal_stub.c: Call cyg_ prefixed function names. Put in EMXIFs + where functionality has been left out. Removed Cogent spefic + code. + + * src/hal_diag.c: Rely on smc code to do full hw + initialization. Call cyg_ prefixed function names. + + * src/fads.ld: Added Kevin to contributers. + + * src/fads.S (hal_hardware_init): Removed all #if0 marked code. + +1998-10-28 Kevin Hester + + * Created based on the cogent implementation + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/powerpc/fads/current/README b/packages/hal/powerpc/fads/current/README new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/README @@ -0,0 +1,78 @@ +The FADS MPC860 board port for eCos was contributed by Kevin Hester + and is partly based on the files from Motorola's +"Example Software Initializing the SMC as a UART" package (smc2.zip) +available at: + http://www.mot.com/SPS/RISC/netcomm/tools/index.html#MPC860_table + +The eCos FADS board port is provided on an "as is" basis as unsupported code. +Cygnus does not maintain this code and does not guarantee its functionality +in any way. + +All inquiries about this port should be directed to the 'ecos-discuss' +mailing list (see http://sourceware.cygnus.com/ecos/intouch.html for +details). + + +A few comments from Kevin: +---------------------------------------------------------------------------- + +GDB support is untested and I didn't include the GDB 'interrupt' via +the serial port support. It would be straightforward for someone to +add this. + +You can also pass on that is was very easy to write this HAL - it only +took a day starting from the Cogent PPC HAL. + +I can't promise support, but I will occasionally download from the CVS +database and run it on our card. + +Usage notes: + +- The startup code in fads.S assumes that the build has been downloaded by + the mpc8bug tool included with the FADS board. An example usage would be: + - build a FADS build (RAM build, GDB support off) + - link your application with the kernel you previously built + - run the Motorola mpc8bug tool. + - issue a mcp8bug "LOAD foo.elf" command where foo is the application you + have linked + - issue a mpc8bug "GO" command + - your program should now be running, the diag port is the upper serial + port (SMC2) + +- I haven't tried to run a "ROM" build. The "RAM" build works great. The + ROM build will need to have fads.S setup more of the memory controller. + +- I haven't tested the GDB interface - I have successfully run using the + diag serial port and the example programs (such as "hello world"). GDB + support should work, with the exception of interrupt support. + +- The basic serial driver I added is based on the free Motorolla sample code + included with the MPC860 board. It assumes the link to the development + station is via the SMC 2 port (the top serial port on the FADS board). This + code in quicc_smc.c should be generalized to support any SMC port. + +---------------------------------------------------------------------------- + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/powerpc/fads/current/include/hal_diag.h b/packages/hal/powerpc/fads/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/hal_diag.h @@ -0,0 +1,89 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Maintained by: +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include + +//----------------------------------------------------------------------------- +// functions implemented in hal_diag.c + +externC void hal_diag_init(void); + +externC void hal_diag_write_char(char c); + +externC void hal_diag_read_char(char *c); + +//----------------------------------------------------------------------------- + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H diff --git a/packages/hal/powerpc/fads/current/include/pkgconf/hal_powerpc_fads.h b/packages/hal/powerpc/fads/current/include/pkgconf/hal_powerpc_fads.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/hal_powerpc_fads.h @@ -0,0 +1,96 @@ +#ifndef CYGONCE_PKGCONF_HAL_POWERPC_FADS_H +#define CYGONCE_PKGCONF_HAL_POWERPC_FADS_H +//============================================================================= +// +// pkgconf/hal_powerpc_fads.h +// +// HAL configuration file +// +//============================================================================= +// ####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Maintained by: +// ------------------------------------------- +// +// ####UNSUPPORTEDEND#### +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): bartv +// Contributors: bartv, khester +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +//============================================================================= + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_POWERPC_FADS { + display "Motorola FADS PowerPC evaluation board" + type radio + parent CYGPKG_HAL_POWERPC + platform fads + description " + The FADS HAL package provides the support needed to run + eCos on a Motorola FADS board equipped with a PowerPC processor." + } + + cdl_option CYGHWR_HAL_POWERPC_FADS_STARTUP { + display "Startup type" + parent CYGPKG_HAL_POWERPC_FADS + #type count + type enum + legal_values ram rom + startup + description " + When targetting the FADS board for RAM bootstrap it is expected + that the image will be downloaded via the Motorola MPC8BUG tool." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_POWERPC_FADS_STARTUP ram + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_POWERPC_FADS_H */ +/* EOF hal_powerpc_FADS.h */ diff --git a/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.ldi b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// RAM startup linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x00000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0x0, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.mlt b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 800000 0 ! +section vectors 0 1 0 1 1 1 1 1 0 0 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! diff --git a/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.ldi b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.ldi @@ -0,0 +1,49 @@ +//=========================================================================== +// +// ROM startup linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + rom : ORIGIN = 0x02800000, LENGTH = 0x40000 // kevinh - FADS flash base + ram : ORIGIN = 0x00100000, LENGTH = 0x700000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (rom, 0x2800000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x100000, FOLLOWING (.gcc_except_table)) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.mlt b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 100000 700000 0 ! +region rom 2800000 40000 1 ! +section data 0 1 1 1 1 1 0 0 100000 sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! +section vectors 0 1 0 1 1 1 1 1 2800000 2800000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --git a/packages/hal/powerpc/fads/current/include/plf_stub.h b/packages/hal/powerpc/fads/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/plf_stub.h @@ -0,0 +1,77 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform HAL stub support for PowerPC/FADS board. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. All comes from the quicc_smc.c file. + +#include + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_smc2_init(38400) +#define HAL_STUB_PLATFORM_GET_CHAR() cyg_smc2_getchar() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) cyg_smc2_putchar((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) cyg_smc2_init((baud)) + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/powerpc/fads/current/include/ppc_fads.h b/packages/hal/powerpc/fads/current/include/ppc_fads.h new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/ppc_fads.h @@ -0,0 +1,72 @@ +#ifndef CYGONCE_PPC_FADS_H +#define CYGONCE_PPC_FADS_H + +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// The style of programming used in this file may not comply with the +// eCos programming guidelines. Please do not use as a base for other +// files. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Contributed by: Kevin Hester +// Maintained by: +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +// Board specific structures for the motorola FADS 860 evaluation board +// kevinh + + + +/*-----------------------------------*/ +/* Board Control and Status Register */ +/*-----------------------------------*/ + +typedef struct bcsr + +{ + UWORD bcsr0; + UWORD bcsr1; + UWORD bcsr2; + UWORD bcsr3; + +} BCSR; + +#endif diff --git a/packages/hal/powerpc/fads/current/src/PKGconf.mak b/packages/hal/powerpc/fads/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/src/PKGconf.mak @@ -0,0 +1,62 @@ +#============================================================================== +# +# makefile +# +# hal/powerpc/fads/src +# +#============================================================================== +#============================================================================== +#####UNSUPPORTEDBEGIN#### +# +# ------------------------------------------- +# This source file has been contributed to eCos/Cygnus. It may have been +# changed slightly to provide an interface consistent with those of other +# files. +# +# The functionality and contents of this file is supplied "AS IS" +# without any form of support and will not necessarily be kept up +# to date by Cygnus. +# +# All inquiries about this file, or the functionality provided by it, +# should be directed to the 'ecos-discuss' mailing list (see +# http://sourceware.cygnus.com/ecos/intouch.html for details). +# +# Maintained by: +# ------------------------------------------- +# +#####UNSUPPORTEDEND#### +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_powerpc_fads +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c fads.S +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/hal/powerpc/fads/current/src/fads.S b/packages/hal/powerpc/fads/current/src/fads.S new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/src/fads.S @@ -0,0 +1,83 @@ +##============================================================================= +## +## fads.S +## +## Fads board hardware setup +## +##============================================================================= +#============================================================================== +#####UNSUPPORTEDBEGIN#### +# +# ------------------------------------------- +# This source file has been contributed to eCos/Cygnus. It may have been +# changed slightly to provide an interface consistent with those of other +# files. +# +# The functionality and contents of this file is supplied "AS IS" +# without any form of support and will not necessarily be kept up +# to date by Cygnus. +# +# All inquiries about this file, or the functionality provided by it, +# should be directed to the 'ecos-discuss' mailing list (see +# http://sourceware.cygnus.com/ecos/intouch.html for details). +# +# Contributed by: Kevin Hester +# Maintained by: +# ------------------------------------------- +# +#####UNSUPPORTEDEND#### +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors:nickg +## Date: 1997-11-11 +## Purpose: Fads board hardware setup +## Description: This file contains any code needed to initialize the +## hardware on a Fads PowerPC board. +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include + +#------------------------------------------------------------------------------ + + .globl hal_hardware_init +hal_hardware_init: + +#if defined(CYGPKG_HAL_POWERPC_FADS) && defined(CYG_HAL_POWERPC_MP860) + + # kevinh disabled - we use the values which have already been setup + # by the mpc8bug + +#endif + blr + +#------------------------------------------------------------------------------ +# end of fads.S diff --git a/packages/hal/powerpc/fads/current/src/hal_diag.c b/packages/hal/powerpc/fads/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/src/hal_diag.c @@ -0,0 +1,121 @@ +//============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####UNSUPPORTEDBEGIN#### +// +// ------------------------------------------- +// This source file has been contributed to eCos/Cygnus. It may have been +// changed slightly to provide an interface consistent with those of other +// files. +// +// The functionality and contents of this file is supplied "AS IS" +// without any form of support and will not necessarily be kept up +// to date by Cygnus. +// +// All inquiries about this file, or the functionality provided by it, +// should be directed to the 'ecos-discuss' mailing list (see +// http://sourceware.cygnus.com/ecos/intouch.html for details). +// +// Contributed by: Kevin Hester +// Maintained by: +// ------------------------------------------- +// +//####UNSUPPORTEDEND#### +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, jskov +// Contributors:nickg +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include +#include // Interrupt macros + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#include // hal_output_gdb_string +#endif + +#include +#include + +//----------------------------------------------------------------------------- +// Select default diag channel to use + +//#define CYG_KERNEL_DIAG_ROMART +//#define CYG_KERNEL_DIAG_SERIAL + +#if !defined(CYG_KERNEL_DIAG_SERIAL) +#define CYG_KERNEL_DIAG_SERIAL +#endif + +//----------------------------------------------------------------------------- +// Fads board specific serial + +#if defined(CYG_KERNEL_DIAG_SERIAL) + +void hal_diag_init(void) +{ +#if !defined(CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS) + // init the actual serial port + cyg_smc2_init(9600); +#endif +} + +void hal_diag_write_char(char c) +{ +#if !defined(CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS) + unsigned long __state; + HAL_DISABLE_INTERRUPTS(__state) + cyg_smc2_putchar(c); + HAL_RESTORE_INTERRUPTS(__state); +#else + hal_output_gdb_string (&c, 1); +#endif +} + +void hal_diag_read_char(char *c) +{ + *c = cyg_smc2_getchar(); +} +#endif + + diff --git a/packages/hal/powerpc/sim/current/ChangeLog b/packages/hal/powerpc/sim/current/ChangeLog --- a/packages/hal/powerpc/sim/current/ChangeLog +++ b/packages/hal/powerpc/sim/current/ChangeLog @@ -1,3 +1,47 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-03-23 Jonathan Larmour + + * include/hal_diag.h (HAL_DIAG_WRITE_CHAR): + Disable interrupts when doing diag output so that + system "freezes" while this goes on + +1999-03-04 Gary Thomas + + * include/pkgconf/hal_powerpc_sim.h: Take out DEVICES dependencies. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-16 Jesper Skov + + * include/hal_stub.h: Removed. + +1999-02-08 John Dallaway + + * include/pkgconf/*.mlt: New memory layout save files + +1999-02-05 John Dallaway + + * include/pkgconf/ram.ldi: Rationalize memory layout. + +1999-02-05 John Dallaway + + * include/pkgconf/*.ldi: Remove LMA_EQ_VMA macro definition. + +1999-01-26 Hugo Tyson + + * include/pkgconf/ram.ldi: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + 1998-10-25 Jesper Skov @@ -114,7 +158,7 @@ Mon Aug 17 22:18:15 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/sim/current/include/hal_diag.h b/packages/hal/powerpc/sim/current/include/hal_diag.h --- a/packages/hal/powerpc/sim/current/include/hal_diag.h +++ b/packages/hal/powerpc/sim/current/include/hal_diag.h @@ -25,19 +25,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: HAL Support for Kernel Diagnostic Routines -// Description: Diagnostic routines for use during kernel development. -// Usage: #include +// Author(s): nickg +// Contributors: nickg +// Date: 1999-03-23 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include // //####DESCRIPTIONEND#### // @@ -46,6 +46,7 @@ #include #include +#include // HAL_DISABLE/RESTORE_INTERRUPTS macros //----------------------------------------------------------------------------- // Register addresses @@ -67,27 +68,31 @@ #define HAL_DIAG_INIT() #define HAL_DIAG_WRITE_CHAR(_c_) \ -{ \ +CYG_MACRO_START \ volatile unsigned char *tty_buffer = \ (unsigned char*)(OEA_DEV + PAL_WRITE_FIFO); \ volatile unsigned char *tty_status = \ (unsigned char*)(OEA_DEV + PAL_WRITE_STATUS); \ + unsigned long __state; \ + \ + HAL_DISABLE_INTERRUPTS(__state) \ if( _c_ != '\r' ) \ { \ while( *tty_status == 0 ) continue; \ *tty_buffer = _c_; \ } \ -} + HAL_RESTORE_INTERRUPTS(__state); \ +CYG_MACRO_END #define HAL_DIAG_READ_CHAR(_c_) \ -{ \ +CYG_MACRO_START \ volatile unsigned char *tty_buffer = \ (unsigned char*)(OEA_DEV + PAL_READ_FIFO); \ volatile unsigned char *tty_status = \ (unsigned char*)(OEA_DEV + PAL_READ_STATUS); \ while( *tty_status == 0 ) continue; \ _c_ = *tty_buffer; \ -} +CYG_MACRO_END //----------------------------------------------------------------------------- // end of hal_diag.h diff --git a/packages/hal/powerpc/sim/current/include/hal_stub.h b/packages/hal/powerpc/sim/current/include/hal_stub.h deleted file mode 100644 --- a/packages/hal/powerpc/sim/current/include/hal_stub.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef CYGONCE_HAL_HAL_STUB_H -#define CYGONCE_HAL_HAL_STUB_H - -//============================================================================= -// -// hal_stub.h -// -// General header for HAL GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jskov from an original by nickg -// Contributors: jskov -// Date: 1998-06-08 -// Purpose: HAL stub support. -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include - -#include -#include - -//----------------------------------------------------------------------------- -#endif // CYGONCE_HAL_HAL_STUB_H -// End of hal_stub.h - - diff --git a/packages/hal/powerpc/sim/current/include/pkgconf/hal_powerpc_sim.h b/packages/hal/powerpc/sim/current/include/pkgconf/hal_powerpc_sim.h --- a/packages/hal/powerpc/sim/current/include/pkgconf/hal_powerpc_sim.h +++ b/packages/hal/powerpc/sim/current/include/pkgconf/hal_powerpc_sim.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -50,8 +50,6 @@ type radio parent CYGPKG_HAL_POWERPC platform sim - requires !CYGPKG_DEVICES_GDB - requires !CYGPKG_DEVICES_SERIAL_RS232_COMMON description " The minimal simulator HAL package is provided for use when only a simple simulation of the processor architecture is diff --git a/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.ldi b/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.ldi @@ -0,0 +1,48 @@ +//=========================================================================== +// +// RAM startup linker control script +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0x0, LMA_EQ_VMA) + SECTION_text (ram, 0x4000, LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.mlt b/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 80000 0 ! +section vectors 0 1 0 1 1 0 1 0 0 0 ! +section text 0 1 0 1 1 1 1 1 4000 4000 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 0 0 0 ! diff --git a/packages/hal/powerpc/sim/current/src/PKGconf.mak b/packages/hal/powerpc/sim/current/src/PKGconf.mak --- a/packages/hal/powerpc/sim/current/src/PKGconf.mak +++ b/packages/hal/powerpc/sim/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -34,23 +34,8 @@ include ../../../../../pkgconf/pkgconf.m LIBRARY := libtarget.a COMPILE := sim.S OTHER_OBJS := -OTHER_TARGETS := ldscript.stamp -OTHER_CLEAN := ldscript.clean -OTHER_DEPS := ldscript.d +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src - -.PHONY: ldscript.clean - -ldscript.stamp: sim.ld - $(CC) -E -P -Wp,-MD,ldscript.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< - @echo -e "\n$@ : $< \\" > ldscript.d - @tail -n +2 ldscript.tmp >> ldscript.d - @rm ldscript.tmp - $(TOUCH) $@ - -ldscript.clean: - $(RM) -f $(PREFIX)/lib/target.ld - $(RM) -f ldscript.stamp - - diff --git a/packages/hal/powerpc/sim/current/src/sim.S b/packages/hal/powerpc/sim/current/src/sim.S --- a/packages/hal/powerpc/sim/current/src/sim.S +++ b/packages/hal/powerpc/sim/current/src/sim.S @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/powerpc/sim/current/src/sim.ld b/packages/hal/powerpc/sim/current/src/sim.ld deleted file mode 100644 --- a/packages/hal/powerpc/sim/current/src/sim.ld +++ /dev/null @@ -1,237 +0,0 @@ -//========================================================================== -// -// sim.ld -// -// Linker script for PowerPC simulator -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.cygnus.com. -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos code, released September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors:nickg -// Date: 1998-02-17 -// Purpose: PowerPC simulator Linker script -// Description: This script is passed to the linker to define the memory -// of the PowerPC simulator. -// -//####DESCRIPTIONEND#### -// -//========================================================================== -STARTUP(vectors.o) -OUTPUT_FORMAT("elf32-powerpc") -OUTPUT_ARCH(powerpc) -ENTRY(reset_vector) -// Do we need any of these for elf? -// __DYNAMIC = 0; - -GROUP(libtarget.a libgcc.a) - -#include - -MEMORY -{ - - // In a RAM system, fake the division between ROM and - // RAM for testing. - ram_vectors : ORIGIN = 0x00000000, LENGTH = 0x2000 - rom_vectors : ORIGIN = 0x00002000, LENGTH = 0x2000 - ram : ORIGIN = 0x00004000, LENGTH = 496k - rom : ORIGIN = 0x00080000, LENGTH = 512k -} - -// Allocate the stack to be at the top of memory, since the stack -// grows down - -PROVIDE (__interrupt_stack = 0x00100000); - -// Initalize some symbols to be zero so we can reference them in the -// crt0 without core dumping. These functions are all optional, but -// we do this so we can have our crt0 always use them if they exist. -// This is so BSPs work better when using the crt0 installed gcc. -// We have to initalize them twice, so we cover a.out (which prepends -// an underscore) and coff object file formats. - -//PROVIDE (hardware_init_hook = 0); -//PROVIDE (software_init_hook = 0); - -SECTIONS -{ - // Read-only sections, merged into text segment: - .interp : { *(.interp) } >rom - .hash : { *(.hash) } >rom - .dynsym : { *(.dynsym) } >rom - .dynstr : { *(.dynstr) } >rom - .rel.text : { *(.rel.text) } >rom - .rela.text : { *(.rela.text) } >rom - .rel.data : { *(.rel.data) } >rom - .rela.data : { *(.rela.data) } >rom - .rel.rodata : { *(.rel.rodata) } >rom - .rela.rodata : { *(.rela.rodata) } >rom - .rel.got : { *(.rel.got) } >rom - .rela.got : { *(.rela.got) } >rom - .rel.got1 : { *(.rel.got1) } >rom - .rela.got1 : { *(.rela.got1) } >rom - .rel.got2 : { *(.rel.got2) } >rom - .rela.got2 : { *(.rela.got2) } >rom - .rel.ctors : { *(.rel.ctors) } >rom - .rela.ctors : { *(.rela.ctors) } >rom - .rel.dtors : { *(.rel.dtors) } >rom - .rela.dtors : { *(.rela.dtors) } >rom - .rel.init : { *(.rel.init) } >rom - .rela.init : { *(.rela.init) } >rom - .rel.fini : { *(.rel.fini) } >rom - .rela.fini : { *(.rela.fini) } >rom - .rel.bss : { *(.rel.bss) } >rom - .rela.bss : { *(.rela.bss) } >rom - .rel.plt : { *(.rel.plt) } >rom - .rela.plt : { *(.rela.plt) } >rom - .init : { - *(.init.head) - *(.init) - *(.init.tail) - } >rom =0 - .plt : { *(.plt) } >rom - .text : - { - _stext = .; - *(.text*) - *(.gnu.warning) - *(.gnu.linkonce*) - } >rom =0 - _etext = .; - PROVIDE (etext = .); - .fini : { - *(.fini.head) - *(.fini) - *(.fini.tail) - } >rom =0 - - .rodata1 : { *(.rodata1) } >rom - .rodata : { *(.rodata*) } >rom - __FIXUP_START__ = .; - .fixup : { *(.fixup) } >rom - __FIXUP_END__ = .; - __EXCEPT_START__ =.; - .gcc_except_table : { *(.gcc_except_table) } >rom - __EXCEPT_END__ =.; - // Read-write section, merged into data segment: - __rom_data_start = ALIGN(4); - .data : - AT( __rom_data_start ) - { - __ram_data_start = .; - PROVIDE( __ram_data_start = .); - - *(.data*) - __GOT1_START__ = .; - *(.got1) - __GOT1_END__ = .; - // Put .ctors and .dtors next to the .got2 section, so that the pointers - // get relocated with -mrelocatable. -#ifdef CYG_KERNEL_USE_INIT_PRIORITY - . = ALIGN(8); - __CTOR_LIST__ = .; - KEEP(*(SORT(.ctors*))) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - KEEP(*(SORT(.dtors*))) - __DTOR_END__ = .; -#else - __CTOR_LIST__ = .; - *sched.o(.ctors*) - *clock.o(.ctors*) - *thread.o(.ctors*) - *(.ctors*) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - *(.dtors*) - __DTOR_END__ = .; -#endif - __GOT2_START__ = .; - *(.got2) - __GOT2_END__ = .; - __GOT_START__ = .; - _GLOBAL_OFFSET_TABLE_ = . + 32768; - _SDA_BASE_ = .; - *(.got.plt) - *(.got) - __GOT_END__ = .; - *(.dynamic) - // We want the small data sections together, so single-instruction offsets - // can access them all, and initialized data all before uninitialized, so - // we can shorten the on-disk segment size. - __SDATA_START__ = .; - *(.sdata) - __SDATA2_START__ = .; - *(.sdata2) - } >ram - __ram_data_end = .; - PROVIDE( __ram_data_end = .); - _edata = .; - PROVIDE (edata = .); - __bss_start = .; - .sbss : - { - __SBSS_START__ = .; - *(.sbss*) - __SBSS_END__ = .; - __SBSS2_START__ = .; - *(.sbss2) - __SBSS2_END__ = .; - *(.scommon) - } >ram - - .bss : - { - *(.dynbss) - *(.bss) - *(COMMON) - } >ram - _end = . ; - PROVIDE (end = .); - - - __rom_ram_vectors_start = ALIGN(4); -#if 1 - .vectors : - { - *(.vectors) - } > ram_vectors -#else - .ram_vectors : - AT ( __rom_ram_vectors_start ) - { - __ram_vectors_start = .; - *(.ram_vectors) - __ram_vectors_end = .; - } >ram_vectors - - .rom_vectors : - { - *(.rom_vectors) - } >rom_vectors -#endif - -} - diff --git a/packages/hal/powerpc/sim/current/tests/PKGconf.mak b/packages/hal/powerpc/sim/current/tests/PKGconf.mak --- a/packages/hal/powerpc/sim/current/tests/PKGconf.mak +++ b/packages/hal/powerpc/sim/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/hal/sparclite/arch/current/ChangeLog b/packages/hal/sparclite/arch/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/ChangeLog @@ -0,0 +1,485 @@ +1999-04-15 Jonathan Larmour + + * src/sparclite.ld: Define __bss_end at the end of the BSS + * src/hal_boot.c (hal_zero_bss): Stop at __bss_end rather than _end + when clearing BSS + + These fix PR 19750 + +1999-04-14 Jonathan Larmour + + * src/PKGconf.mak (EXTRAS): Don't generate extras.o here any more + But do define EXTRAS every time for the linker script. + +1999-04-09 Hugo Tyson + + * include/hal_intr.h (HAL_RESTORE_INTERRUPTS et al): Put in 3 nops + after any writes to the psr; TBH I don't think they're strictly + necessary when not altering the window state, but for complete + safety and adherence to the book of words.... + +1999-04-08 John Dallaway + + * src/*.ld: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-04-07 Hugo Tyson + + * include/hal_io.h: If not the simulator, get hal_hwio.h too - + which describes board-and-CPUvariant-specific IO needs. + +1999-04-07 Hugo Tyson + + * include/hal_intr.h (HAL_VSR_SET_TO_ECOS_HANDLER): Define this + macro for use in tests that are interested in exception diddling. + Redefine CYGNUM_HAL_ISR_MIN to describe the number of interrupt + sources; while there are XSRs too, this definition is better for + the error checking in kernel interrupt stuff. Changed the symbols + used for defining tables sizes to match, since there are still 27 + VSRs and ISRs/XSRs and their data. + + * src/hal_intr.c: Use the correct symbol for the size of the + isr/vsr/their-data tables. + +1999-03-26 Hugo Tyson + + * tests/sparc_ex.c (cyg_[user_]start): + If there is no kernel, cyg_user_start() is never called, main gets + in and steals the CPU. So we hang. So if there is no kernel, + define cyg_start() instead to wrest control. + +1999-03-22 Hugo Tyson + + * include/hal_arch.h (CYGNUM_HAL_STACK_SIZE_TYPICAL): + And this time make the edit correctly ;-/ + +1999-03-22 Hugo Tyson + + * include/hal_arch.h: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-17 Hugo Tyson + + * src/vectors.S (rom_vectors_end, rom_vectors): Add two new + symbols for copying trampoline code into RAM in ROM startup. This + keeps ROM startup as similar as possible to RAM, for simplicity; + no re-ordering of vectors.S's contents. + + * src/hal_boot.c (hal_copy_data): Copy in long sized units rather + than long longs, better to cope with ROM data alignment. + Also add some LED output (if SLEB hardware) for startup to help + with debugging ROM start. + +1999-03-17 John Dallaway + + * src/PKGconf.mak: Remove dependence on echo '-e' switch. + +1999-03-16 Hugo Tyson + + * src/vectors.S (genuine_reset): Add a little extra debug to SLEB + LEDs, and use the genuine top-of-memory stack when running on + hardware; only define cyg_bootup_stack in the simulator case. + + * src/sparclite.ld: Define rom_data_start, regardless of start + type, no harm is done. + +1999-03-12 Gary Thomas + + * include/pkgconf/hal_sparclite.h: + * include/hal_arch.h: Moved definition of 'CYGNUM_HAL_MINIMUM_STACK_SIZE' + +1999-03-11 Hugo Tyson + + * src/icontext.c (cyg_hal_sparc_[gs]et_gdb_regs): + Two new routines to communicate our nice, optimized stack save + states to a reg list for GDB. My maximal register saves are not + really suitable for passing to GDB in any case, they're for humans + to debug the interrupt code more than anything else, and my + minimal save sets naturally contain pointers and ways of finding + the rest of the reg set, but it depends on whether it's an + interrupt save or a synchronous one, and given the SPARClite's + stack layout, it's a bit hairy. + + * src/vec_ivsr.S (hal_default_interrupt_vsr): + Do save %g0 even in a minimal context, so that the code for + communicating register state with GDB can tell it's a minimum + context. Costs one store cycle per interrupt. + + * include/hal_arch.h (HAL_[GS]ET_GDB_REGISTERS): + Define and call routines cyg_hal_sparc_[gs]et_gdb_regs for + communicating register state of a thread to GDB. + + * src/vectors.S (real_vector): Reinstate the anullment of the + instructions that were blamed for register corruption earlier; + they are correct and safe. + +1999-03-10 Jesper Skov + + * include/hal_intr.h (HAL_INTERRUPT_IN_USE): Added. + +1999-03-09 Gary Thomas + + * src/hal_boot.c: Added missing include file. + +1999-03-05 Gary Thomas + + * src/sparclite.ld: + * src/PKGconf.mak: Clean up I/O package changes. + +1999-03-04 Jonathan Larmour + + * src/sparclite.ld: + Unconditionalize use of libextras.a and add to GROUP() + +1999-03-04 Gary Thomas + + * src/PKGconf.mak: + * src/sparclite.ld: New I/O package support. + + * src/vectors.S: Fix register corruption problem - stems from + use of annulled instructions in window overflow/underflow code. + +1999-02-25 Hugo Tyson + + These log entries from 1999-02-22 to 1999-02-24 were executed in + a branch; this change is a merge of that branch into the trunk. + + (1999-02-24 Hugo Tyson ) + + * tests/sparc_ex.c (sparc_ex_main): + For all traps except the USER_TRAP, install the default VSR + hal_default_exception_vsr(); this is so that this test catches + exception ie. is able to work, even when we are playing nice with + CygMon and GDB. The USER_TRAP is left so that breakpoints work, + for the test infrastructure. + + (1999-02-22 Hugo Tyson ) + + * src/vectors.S (real_vector): Remove old testing code. Add delay + NOPs after writes to %wim and %psr for safety. Leave installing + the trap vector to platform-specific code, along with RAM control + and cache initialization. + + * src/vec_ivsr.S (hal_default_interrupt_vsr): Add delay NOPs after + writing the %wim before doing a restore; that was a bug that was. + + * src/vec_xvsr.S (hal_default_exception_vsr): same change. + + * src/hal_intr.c: Remove platform-specific clock period variable; it + happens that both platforms sim and sleb have one, but it's not a + requirement of the target architecture. + + * src/hal_boot.c (cyg_hal_start): Move diddling the sim-specific + watchdog into platform-specific startup code viz. new routines + hal_board_{pre/post}start(). + + * src/context.S: a couple of extra NOPs to ensure that %wim and + %psr changes work on real hardware. + + (1999-02-22 Hugo Tyson ) + + * include/hal_arch.h (HAL_SET_GDB_REGISTERS): + Remove warning about unused var 'cos of the incompleteness of + these macros; gdb interworking is not yet supported. + +1999-02-25 Nick Garnett + + * include/vectors.h: + Changed label used to access scheduler lock to one that is not + mangled by C++. This is intended to make support for interrupt + handling in non-kernel configurations easier. + +1999-02-20 Jonathan Larmour + + * include/hal_arch.h: + Rename deliver_exception() -> cyg_hal_deliver_exception() + QA improvements + + * include/hal_intr.h: + Reorganise vector/interrupt/exception names according to purpose + Rename exception_handler() -> cyg_hal_exception_handler() + QA improvements + + * src/hal_intr.c: + Rename exception_handler() -> cyg_hal_exception_handler() + Rename deliver_exception() -> cyg_hal_deliver_exception() + Rename CYG_ISR_COUNT -> CYGNUM_HAL_ISR_COUNT + QA improvements + + * src/vec_ivsr.S: + * src/vec_xvsr.S: + Rename CYG_ISR_COUNT -> CYGNUM_HAL_ISR_COUNT + QA improvements + + * tests/sparc_ex.c: + Rename CYG_EXCEPTION_* -> CYGNUM_HAL_EXCEPTION_* + Rename CYG_VECTOR_UNALIGNED -> CYGNUM_HAL_VECTOR_UNALIGNED + +1999-02-12 Hugo Tyson + + * src/context.S (hal_thread_load_context, hal_setjmp): + Disable interrupts (but not traps) while doing the flush of all my + callers and their callers' callers register sets to the stack. + There is evidence that the inconsistency in the stack during this + is a bad thing, though I have to admit that I don't see exactly + how it goes wrong. Partly, it's impossible to debug, so if the + problem I saw (a SEGV in instrumentation of interrupt_end()) is + reproduced with this change, I'll have more to go on. This is a + conservative change in that sense. + + * include/hal_arch.h (HAL_FLUSH_REGISTERS_TO_STACK): + Disable interrupts but not traps while doing this. Ditto. + +1999-02-12 Hugo Tyson + + * include/pkgconf/hal_sparclite.h (CYGNUM_HAL_MINIMUM_STACK_SIZE): + Define a minimal sensible stack size for apps to use. Note that + this file is included by hal_arch.h and so is available to all HAL + users, and in fact almost everyone by default. + +1999-02-12 Hugo Tyson + + * src/hal_intr.c (exception_handler): + Include so that the CYG_FAIL() in some + configurations actually compiles (actually: links). + combo{22,18,10,6} were thus afflicted. + +1999-02-11 Hugo Tyson + + * tests/sparc_ex.c (do_test): Make the test run for much less time + when CYG_USE_TRACING and in any case bleat periodically about how + successful it is to prevent testing system timeouts. Also move + the test routines (those which provoke the exception) to the end + so that (ever helpful) -O3 cannot inline them and then "optimize" + the result and thus spoil the whole damned test too. + +1999-02-08 John Dallaway + + * include/pkgconf/hal_sparclite.h: Correct capitalization of + 'SPARClite'. + +1999-02-08 John Dallaway + + * src/sparclite.ld: New MLT-compatible linker script + * src/PKGconf.mak: Add build rules for sparclite.ld + +1999-02-04 Hugo Tyson + + * src/vec_ivsr.S (hal_default_interrupt_vsr): Preserve global + registers over interrupts, and implement support for + CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT ie. save a + minimal register set rather than a maximal. Create a saved + register set whose address is passed to the interrupt handler + (though it may well be mostly empty). + [also tidied up trailing tabs and long blank lines] + + * src/vec_xvsr.S (hal_default_exception_vsr): Preserve all + registers over interrupts; create a saved register set whose + address is passed to the exception handler so it can modify it. + [also tidied up trailing tabs and long blank lines] + + * src/context.S( hal_setjmp, hal_longjmp): + (hal_thread_switch_context,hal_thread_load_context): Implement + CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM support; ie. save a minimal + register set rather than a maximal. + + * include/hal_arch.h (HAL_FLUSH_REGISTERS_TO_STACK): New macro + useful for writing exception handlers, for example. + (HAL_GET_GDB_REGISTERS, HAL_SET_GDB_REGISTERS): provided initial + dummy versions of these. + + * tests/sparc_ex.c: A test of the exception mechanism: + deliberately cause unaligned accesses of various sizes and check + we get exactly one trap and correctly step over it by modifying + the saved register set whose address the exception ISR is handed. + This test should be regarded as documentation for the exception + handler API/ABI. + + * tests/PKGconf.mak (TESTS): Build sparc_ex. + +1999-02-01 Hugo Tyson + + * src/vectors.S (genuine_reset): + Include to set up RAM controllers, cache and + the like - this is rather platform dependant. + +1999-02-01 Hugo Tyson + + * include/hal_intr.h (HAL_TRANSLATE_VECTOR): + Include a definition of this important macro. Not. + It's used when interrupt chaining is selected, BUT we the HAL make + no distinction, it's up to the kernel to look after things. So + this macro is an assignment. + +1999-01-28 Hugo Tyson + + * include/hal_intr.h: + Get interrupt controller definitions from a board-specific file: + #include + Get clock control definitions from a board-specific file: + #include + Delete the original definitions from this central file. + + * include/hal_cache.h: REMOVED to the simulator tree in the first + instance; more generally to various board-specific files. + + +1999-01-26 Hugo Tyson + + * include/hal_cache.h (HAL_DCACHE_ENABLE) (and its friends): + Define initial empty placeholder versions of these so that cache + tests build. Well it's a start. + +1999-01-21 Jonathan Larmour + + * src/hal_boot.c (cyg_hal_invoke_constructors): + Add code to deal with CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + Tidy up and update description header + Shorten needlessly long lines + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + +1999-01-21 Hugo Tyson + + * src/vectors.S (genuine_reset): Set the RAM size to 4MB in the + erc32 simulator. + + * include/hal_io.h: New file; macros to access IO space, really a + place holder at present. + + * include/hal_intr.h: Do not define WATCHDOG() macro. + + * src/hal_intr.c (hal_default_isr): Do not mess with the watchdog + in the the default interrupt handler. + + * src/hal_boot.c (hal_zero_bss): use an efficient 8-byte zero. + (hal_copy_data): use an efficient 8-byte copy. + (cyg_hal_start): turn off the ERC32 watchdog timer before we start + anything very time consuming. + + NB: the 8-byte copy changes require alignment in the linker + script: see the Changelog in hal/sparclite/sim/... for details. + +1999-01-19 Hugo Tyson + + Modified files in arch: + * include/hal_arch.h + * include/hal_intr.h + * src/PKGconf.mak + * src/context.S + * src/hal_intr.c + * src/vec_ivsr.S + * src/vec_xvsr.S + * src/vectors.S + + New files in arch: + * src/hal_boot.c (bss initialization, constructors &c) + * include/hal_cache.h (empty but required header) + + Modified files in sim: + * include/hal_diag.h + + Lots more progress; essentially, everything now works. + + Simulator's treatment of stdio is poor though, it doesn't work + under pkgtest. This has been slowing me up. + +1999-01-14 Hugo Tyson + + * ecc/ecc/hal/sparclite/...: + + Initial checkin of SPARClite HAL; it doesn't work yet, except the + most trivial of tests - timer and interrupt manipulation stuff is + entirely absent. + + Here's some documentation of the initial checkin tree; this will + change, as platform dependent stuff moves correctly into the sim + or directories. + + arch/current/include: + basetype.h nothing much here. + vectors.h definitions of symbols shared between the + various vector code assembler files, can be + included in both C and assembler. + hal_intr.h various macros for clock and interrupt + control plus the eCos vector numbering scheme; we + map thus: + what SPARC trap type eCos vector numbers + ----------------------------------------------- + (not used) --- 0 + interrupts (17-31) 1-15 + user traps (128-255) 16 + exceptions (1-9,36==4) 17-25 + others (10,?) 26 + ----------------------------------------------- + Trap types 5 and 6 which would be eCos vectors 21 + and 22 are handled in the trampoline code in + file src/vectors.S + hal_arch.h definition of a thread context, plus + macros for thread switching and the like. Some + ancillary bit twiddling macros and cache barriers + too. + + arch/current/include/pkgconf: + hal_sparclite.h pkgconf config/header file. + + arch/current/src: + vectors.S boot-up stuff, trampoline code that hangs + on the interrupt/trap vector, handlers for window + under/overflow. Saves some state in registers + then jumps to the interrupt or exception VSR + respectively. + Also instantiates the VSR table. + vec_ivsr.S the default interrupt VSR; it establishes + a C calling environment (ie. anticipates a window + overflow) then locks the scheduler, calls the ISR + with appropriate arguments, and then interrupt_end() + before undoing that environment, anticipating + window underflow and returning to the interrupted + instruction. + vec_xvsr.S the default exception AKA trap VSR; does + the same as the interrupt one but without the + scheduler lock or interrupt end. + hal_intr.c instantiates the ISR table used by the + code above. + context.S context switch code, saves and loads up a + whole register state, coroutine or longjump-like. + icontext.c initializes a context to "jump" to in + context.S at the birth of a new thread. + + sim/current/include: + hal_diag.h macros to deal with debugging output via a + fake serial device of some kind; initially empty, + but definitely board/sim dependent. + + sim/current/include/pkgconf: + hal_sparclite_sim.h pkgconf config/header file. + + sim/current/src: + sim.ld linker script bits for "sim" target. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +//EOF ChangeLog diff --git a/packages/hal/sparclite/arch/current/include/basetype.h b/packages/hal/sparclite/arch/current/include/basetype.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/basetype.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1998-12-10 +// Purpose: Define architecture base types. +// Usage: Included by "cyg_type.h", do not use directly + +// +//####DESCRIPTIONEND#### +// + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_MSBFIRST // Big endian + +//----------------------------------------------------------------------------- +// SPARC does not usually use labels with underscores. Some labels generated +// by the linker do, so add an underscore where required. + +#define CYG_LABEL_NAME(_name_) _##_name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The SPARClite architecture uses the default definitions of the base +// types, so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h diff --git a/packages/hal/sparclite/arch/current/include/hal_arch.h b/packages/hal/sparclite/arch/current/include/hal_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/hal_arch.h @@ -0,0 +1,343 @@ +#ifndef CYGONCE_HAL_ARCH_H +#define CYGONCE_HAL_ARCH_H + +//========================================================================== +// +// hal_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-02-20 +// Purpose: Define architecture abstractions +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +#include + +#include // HAL_DISABLE_INTERRUPTS + +//-------------------------------------------------------------------------- +// Processor saved states: + +#define HAL_THREAD_CONTEXT_GLOBAL_BASE 0 +#define HAL_THREAD_CONTEXT_OUT_BASE 8 +#define HAL_THREAD_CONTEXT_LOCAL_BASE 16 +#define HAL_THREAD_CONTEXT_IN_BASE 24 + +typedef struct +{ + // this is the save structure found at *(stack_ptr) always, note that + // i[6] is the frame pointer is the previous stack pointer, and + // o[6] is the stack pointer is the next frame pointer, + // so they form a linked list back up the call stack. + cyg_uint32 l[8]; /* Locals r16-r23 */ + cyg_uint32 i[8]; /* Ins r24-r31 */ +} HAL_SavedWindow; + +typedef struct +{ + // Window save at stack pointer + HAL_SavedWindow li; +//16 + // This is the rest of the save state: + // NOTE: g[0] is used for the CWP, for %g0 == 0. Also note that the + // assembler routines must load/store it in the right order. + cyg_uint32 g[8] ; /* Globals r0- r7 */ + cyg_uint32 o[8] ; /* Outs r8-r15 */ +//32 words in size + +// There is no need to save any other state; for example, condition codes, +// the PC and NextPC, and Y, are preserved in local registers in the trap +// handling window and so preserved in the caller stack frame as viewed +// from an ISR. Note that the VSR is jumped to with those locals being set +// up (and Y in situ), and it must preserve them itself before calling any +// subsequent handlers (ISRs). + +} HAL_SavedRegisters; + + +typedef struct +{ + // Window save at stack pointer + HAL_SavedWindow li; + cyg_uint32 composite_return_ptr; /* structure returns */ + cyg_uint32 spill_args[6]; /* for callee to store */ + cyg_uint32 spare; /* keep this 64-bits */ +} HAL_FrameStructure; + + +//-------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//-------------------------------------------------------------------------- +// Bit manipulation macros + +#define HAL_LSBIT_INDEX(index, mask) \ + CYG_MACRO_START \ + asm volatile ( \ + "scan %1, 0, %%l7;" \ + "mov 31, %0;" \ + "sub %0, %%l7, %0" \ + : "=r"(index) \ + : "r"(mask & ~(mask-1)) \ + : "l7" \ + ); \ +CYG_MACRO_END + +#define HAL_MSBIT_INDEX(index, mask) \ + CYG_MACRO_START \ + asm volatile ( \ + "scan %1, 0, %%l7;" \ + "mov 31, %0;" \ + "sub %0, %%l7, %0" \ + : "=r"(index) \ + : "r"(mask) \ + : "l7" \ + ); \ +CYG_MACRO_END + + +//-------------------------------------------------------------------------- +// Context Initialization +// Initialize the context of a thread. +// Arguments: +// _sparg_ name of variable containing current sp, will be written with new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. + +externC CYG_ADDRESS +hal_thread_init_context( CYG_WORD sparg, + CYG_WORD thread, + CYG_WORD entry, + CYG_WORD id ); + +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ +CYG_MACRO_START \ + _sparg_ = hal_thread_init_context( (CYG_WORD)(_sparg_), \ + (CYG_WORD)(_thread_), \ + (CYG_WORD)(_entry_), \ + (CYG_WORD)(_id_) ); \ +CYG_MACRO_END + +//--------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context((CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + + +//--------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//--------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen +// if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +#define HAL_BREAKPOINT(_label_) \ +asm volatile (" .globl " #_label_ ";" \ + #_label_":" \ + "ta 1" \ + ); + +#define HAL_BREAKINST {0x91,0xd0,0x20,0x01} +#define HAL_BREAKINST_SIZE 4 + +//--------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + +// Routines in icontext.c used here because they're quite large for +// the SPARClite (note param order): +externC void +cyg_hal_sparc_get_gdb_regs( void *gdb_regset, + HAL_SavedRegisters *eCos_regset ); + +externC void +cyg_hal_sparc_set_gdb_regs( HAL_SavedRegisters *eCos_regset, + void *gdb_regset ); + + +// Copy a set of registers from a HAL_SavedRegisters structure into a GDB +// ordered array. +#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \ + CYG_MACRO_START \ + cyg_hal_sparc_get_gdb_regs( (_aregval_), (_regs_) ); \ +CYG_MACRO_END + +// Copy a GDB ordered array into a HAL_SavedRegisters structure. +#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \ + CYG_MACRO_START \ + cyg_hal_sparc_set_gdb_regs( (_regs_), (_aregval_) ); \ +CYG_MACRO_END + +//--------------------------------------------------------------------------- +// HAL setjmp + +#define HAL_JMP_BUF_SIZE 32 // laziness; use a thread context for now + +typedef cyg_uint32 hal_jmp_buf[HAL_JMP_BUF_SIZE]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + +//--------------------------------------------------------------------------- +// Flush Register Windows +// +// This is implemented as trap 3 in some SPARC systems. +// This macro is only for use from normal, foreground code. +// (including exception handlers and the like) + +#define HAL_FLUSH_REGISTERS_TO_STACK() \ + CYG_MACRO_START \ + cyg_uint32 _saveintr_; \ + HAL_DISABLE_INTERRUPTS( _saveintr_ ); /* leave traps on */ \ + asm volatile ( \ + /* force out all our callers register sets onto the stack */ \ + /* if necessary: the system will handily take care of this for */ \ + /* us as follows: */ \ + "save %%sp, -16 * 4, %%sp;" /* need all these to preserve */ \ + "save %%sp, -16 * 4, %%sp;" /* the linked list property... */ \ + "save %%sp, -16 * 4, %%sp;" \ + "save %%sp, -16 * 4, %%sp;" \ + "save %%sp, -16 * 4, %%sp;" \ + "save %%sp, -16 * 4, %%sp;" \ + "restore;" \ + "restore;" \ + "restore;" \ + "restore;" \ + "restore;" \ + "restore" \ + /* six of these is correct; a seventh would force out the */ \ + /* current set that we are using right now. Note that minimal */ \ + /* space is allowed on stack for locals and ins in case this */ \ + /* sequence itself gets interrupted and recurses too deep. */ \ + : \ + : \ + : "memory" \ + ); \ + HAL_RESTORE_INTERRUPTS( _saveintr_ ); \ +CYG_MACRO_END + +//--------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +//externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#ifndef HAL_IDLE_THREAD_ACTION +#define HAL_IDLE_THREAD_ACTION(_count_) \ + /* Cyg_Clock::real_time_clock->tick() */ +#endif + +//--------------------------------------------------------------------------- + +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// We define quite large stack needs for SPARClite, for it requires 576 +// bytes (144 words) to process an interrupt and thread-switch, and +// momentarily, but needed in case of recursive interrupts, it needs 208 +// words - if a sequence of saves to push out other regsets is interrupted. + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// A minimal, optimized stack frame is 24 words, but even -O2 code seems to +// place a few locals in the locals area: round this up to provide a +// sensible overestimate: +#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 32) + +// Stack needed for a context switch: this is implicit in the estimate for +// interrupts so not explicitly used below: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 32) + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \ + ((208 * 4) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +// And we have lots of registers so no particular amount is added in for +// typical local variable usage. + +// Typically we have 4 nestable interrupt sources, clock, serialin, +// serialout, (and NMI button, but you want it to not destroy context): + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM \ + (4 * CYGNUM_HAL_STACK_INTERRUPT_SIZE + 2 * CYGNUM_HAL_STACK_FRAME_SIZE) + +#define CYGNUM_HAL_STACK_SIZE_TYPICAL \ + (CYGNUM_HAL_STACK_SIZE_MINIMUM + 8 * CYGNUM_HAL_STACK_FRAME_SIZE) + +//----------------------------------------------------------------------------- + +#endif // CYGONCE_HAL_ARCH_H +// End of hal_arch.h diff --git a/packages/hal/sparclite/arch/current/include/hal_intr.h b/packages/hal/sparclite/arch/current/include/hal_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/hal_intr.h @@ -0,0 +1,377 @@ +#ifndef CYGONCE_HAL_INTR_H +#define CYGONCE_HAL_INTR_H + +//=========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt, +// jlarmour +// Date: 1999-02-20 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//=========================================================================== + +#include +#include + +#include + +//--------------------------------------------------------------------------- +// SPARClite exception vectors. +// +// A note on nomenclature: +// +// SPARClite has traps: interrupts are traps, and so are exceptions. +// There are 255 of them in the hardware: this HAL's trampoline code decodes +// them into the 27 listed below as CYGNUM_HAL_VECTOR_xxx. +// They are handled uniformly in the trampoline code in the sense that +// each vector has a VSR which is called in the same way. +// Interrupts (vectors 1-15) have one VSR by default, exceptions (vectors +// 16-26) another. +// The interrupt VSR sets up a C stack and calls the corresponding ISR with +// the required arguments; this ABI is mandated by the kernel. +// The exception VSR sets up a C stack and calls the corresponding XSR +// (just an entry in the ISR[sic] table) with similar arguments, such that +// it (by default) can call the kernel's cyg_hal_deliver_exception(). +// +// So: +// CYGNUM_HAL_VSR_MAX/MIN/COUNT describe the number of VSR entries *and* +// the number of ISR (and associated data) entries (including those which +// are XSRs, just a special case of ISRs). +// CYGNUM_HAL_ISR_MAX/MIN/COUNT describe the number of interrupt sources +// and is used for bounds checking in kernel interrupt objects. +// CYGNUM_HAL_EXCEPTION_MAX/MIN/COUNT describe vector numbers which have +// by default the exception VSR and default XSR installed. + + +// These correspond to VSRs and the values are the ones to use for +// HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESERVED_0 0 +#define CYGNUM_HAL_VECTOR_INTERRUPT_1 1 // NB: least important +#define CYGNUM_HAL_VECTOR_INTERRUPT_2 2 // (lowest priority) +#define CYGNUM_HAL_VECTOR_INTERRUPT_3 3 +#define CYGNUM_HAL_VECTOR_INTERRUPT_4 4 +#define CYGNUM_HAL_VECTOR_INTERRUPT_5 5 +#define CYGNUM_HAL_VECTOR_INTERRUPT_6 6 +#define CYGNUM_HAL_VECTOR_INTERRUPT_7 7 +#define CYGNUM_HAL_VECTOR_INTERRUPT_8 8 +#define CYGNUM_HAL_VECTOR_INTERRUPT_9 9 +#define CYGNUM_HAL_VECTOR_INTERRUPT_10 10 +#define CYGNUM_HAL_VECTOR_INTERRUPT_11 11 +#define CYGNUM_HAL_VECTOR_INTERRUPT_12 12 +#define CYGNUM_HAL_VECTOR_INTERRUPT_13 13 +#define CYGNUM_HAL_VECTOR_INTERRUPT_14 14 // (highest priority) +#define CYGNUM_HAL_VECTOR_INTERRUPT_15 15 // NB: most important (NMI) + +#define CYG_VECTOR_IS_INTERRUPT(v) (15 >= (v)) + +#define CYGNUM_HAL_VECTOR_USER_TRAP 16 // Ticc instructions +#define CYGNUM_HAL_VECTOR_FETCH_ABORT 17 // trap type 1 +#define CYGNUM_HAL_VECTOR_ILLEGAL_OP 18 // trap type 2 +#define CYGNUM_HAL_VECTOR_PRIV_OP 19 // tt 3: privileged op +#define CYGNUM_HAL_VECTOR_NOFPCP 20 // tt 4,36: FP or coproc +#define CYGNUM_HAL_VECTOR_RESERVED_1 21 // (not used) +#define CYGNUM_HAL_VECTOR_RESERVED_2 22 // (not used) +#define CYGNUM_HAL_VECTOR_UNALIGNED 23 // tt 7: unaligned memory access +#define CYGNUM_HAL_VECTOR_TT_EIGHT 24 // tt 8: not defined +#define CYGNUM_HAL_VECTOR_DATA_ABORT 25 // tt 9: read/write failed + +#define CYGNUM_HAL_VECTOR_OTHERS 26 // any others + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 26 +#define CYGNUM_HAL_VSR_COUNT 27 + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + +// Interrupt vectors. These are the values used with HAL_INTERRUPT_ATTACH() +// et al + +#define CYGNUM_HAL_INTERRUPT_RESERVED_0 CYGNUM_HAL_VECTOR_RESERVED_0 +#define CYGNUM_HAL_INTERRUPT_1 CYGNUM_HAL_VECTOR_INTERRUPT_1 +#define CYGNUM_HAL_INTERRUPT_2 CYGNUM_HAL_VECTOR_INTERRUPT_2 +#define CYGNUM_HAL_INTERRUPT_3 CYGNUM_HAL_VECTOR_INTERRUPT_3 +#define CYGNUM_HAL_INTERRUPT_4 CYGNUM_HAL_VECTOR_INTERRUPT_4 +#define CYGNUM_HAL_INTERRUPT_5 CYGNUM_HAL_VECTOR_INTERRUPT_5 +#define CYGNUM_HAL_INTERRUPT_6 CYGNUM_HAL_VECTOR_INTERRUPT_6 +#define CYGNUM_HAL_INTERRUPT_7 CYGNUM_HAL_VECTOR_INTERRUPT_7 +#define CYGNUM_HAL_INTERRUPT_8 CYGNUM_HAL_VECTOR_INTERRUPT_8 +#define CYGNUM_HAL_INTERRUPT_9 CYGNUM_HAL_VECTOR_INTERRUPT_9 +#define CYGNUM_HAL_INTERRUPT_10 CYGNUM_HAL_VECTOR_INTERRUPT_10 +#define CYGNUM_HAL_INTERRUPT_11 CYGNUM_HAL_VECTOR_INTERRUPT_11 +#define CYGNUM_HAL_INTERRUPT_12 CYGNUM_HAL_VECTOR_INTERRUPT_12 +#define CYGNUM_HAL_INTERRUPT_13 CYGNUM_HAL_VECTOR_INTERRUPT_13 +#define CYGNUM_HAL_INTERRUPT_14 CYGNUM_HAL_VECTOR_INTERRUPT_14 +#define CYGNUM_HAL_INTERRUPT_15 CYGNUM_HAL_VECTOR_INTERRUPT_15 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 15 +#define CYGNUM_HAL_ISR_COUNT 16 + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + +// Exception vectors. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() +// They can also be used with HAL_INTERRUPT_ATTACH() et al to install +// different XSRs. + +#define CYGNUM_HAL_EXCEPTION_TRAP CYGNUM_HAL_VECTOR_USER_TRAP +#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_FETCH_ABORT +#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \ + CYGNUM_HAL_VECTOR_ILLEGAL_OP +#define CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION \ + CYGNUM_HAL_VECTOR_PRIV_OP +#define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL CYGNUM_HAL_VECTOR_NOFPCP +#define CYGNUM_HAL_EXCEPTION_RESERVED1 CYGNUM_HAL_VECTOR_RESERVED1 +#define CYGNUM_HAL_EXCEPTION_RESERVED2 CYGNUM_HAL_VECTOR_RESERVED2 +#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \ + CYGNUM_HAL_VECTOR_UNALIGNED +#define CYGNUM_HAL_EXCEPTION_TT_EIGHT CYGNUM_HAL_VECTOR_TT_EIGHT +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_DATA_ABORT +#define CYGNUM_HAL_EXCEPTION_OTHERS CYGNUM_HAL_VECTOR_OTHERS + + +#define CYGNUM_HAL_EXCEPTION_MIN 16 +#define CYGNUM_HAL_EXCEPTION_MAX (16 + 10) +#define CYGNUM_HAL_EXCEPTION_COUNT (1 + CYGNUM_HAL_EXCEPTION_MAX - \ + CYGNUM_HAL_EXCEPTION_MIN) + +//--------------------------------------------------------------------------- +// (Null) Translation from a wider space of interrupt sources: + +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) _index_ = (_vector_) + +//--------------------------------------------------------------------------- +// Static data used by HAL + +// VSR table +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +// ISR + XSR tables - so VSR count. +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_VSR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_VSR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_VSR_COUNT]; +// (interrupt_objects only used in the interrupt case _but_ the interrupt +// attach &co macros write it, so keep it full-sized) + +//--------------------------------------------------------------------------- +// Default ISRs for exception/interrupt handing. + +// note that these have the same ABI apart from the extra SP parameter +// for exceptions. + +externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); +// return code from ISR is passed to interrupt_end() in the kernel. + +externC void cyg_hal_exception_handler(CYG_ADDRWORD vector, + CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer); + +//--------------------------------------------------------------------------- +// Default VSRs for exception/interrupt handing. + +// note that these do not have a C ABI as such; they are *vector* service +// routines and are written in assembler. + +externC void hal_default_exception_vsr( void ); +externC void hal_default_interrupt_vsr( void ); + +//--------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//--------------------------------------------------------------------------- +// Interrupt control macros + +// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_DISABLE_TRAPS) +// (so should be unused externally) +#define HAL_DISABLE_TRAPS(_old_) \ + asm volatile ( \ + "rd %%psr, %0;" \ + "andn %0, 0x20, %%l7;" \ + "wr %%l7, %%psr;" \ + "nop; nop; nop" \ + : "=r"(_old_) \ + : \ + : "l7" \ + ); + +// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_QUERY_TRAPS) +// (so should be unused externally) +#define HAL_QUERY_TRAPS(_old_) \ + asm volatile ( \ + "rd %%psr, %%l7;" \ + "and %%l7, 0x020, %0" \ + : "=r"(_old_) \ + : \ + : "l7" \ + ); + +#define HAL_DISABLE_INTERRUPTS(_old_) \ + asm volatile ( \ + "rd %%psr, %0;" \ + "or %0, 0xf00, %%l7;" \ + "wr %%l7, %%psr;" \ + "nop; nop; nop" \ + : "=r"(_old_) \ + : \ + : "l7" \ + ); + +#define HAL_ENABLE_INTERRUPTS() \ + asm volatile ( \ + "rd %%psr, %%l7;" \ + "andn %%l7, 0xf00, %%l7;" \ + "or %%l7, 0x020, %%l7;" \ + "wr %%l7, %%psr;" \ + "nop; nop; nop" \ + : \ + : \ + : "l7" \ + ); + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + asm volatile ( \ + "rd %%psr, %%l7;" \ + "andn %%l7, 0xf20, %%l7;" \ + "and %0 , 0xf20, %%l6;" \ + "wr %%l6, %%l7, %%psr;" \ + "nop; nop; nop" \ + : \ + : "r"(_old_) \ + : "l6","l7" \ + ); + +#define HAL_QUERY_INTERRUPTS(_old_) \ + asm volatile ( \ + "rd %%psr, %%l7;" \ + "and %%l7, 0xf00, %%l7;" \ + "xor %%l7, 0xf00, %0" \ + : "=r"(_old_) \ + : \ + : "l7" \ + ); + + +//--------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] || \ + (CYG_ADDRESS)cyg_hal_exception_handler == \ + hal_interrupt_handlers[_vector_] ) { \ + (_state_) = 0; \ + } else { \ + (_state_) = 1; \ + } \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ + CYG_MACRO_START \ + if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] ||\ + (CYG_ADDRESS)cyg_hal_exception_handler == \ + hal_interrupt_handlers[_vector_] ) \ + { \ + hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_vector_] = (CYG_ADDRWORD) _data_; \ + hal_interrupt_objects[_vector_] = (CYG_ADDRESS)_object_; \ + } \ +CYG_MACRO_END + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) CYG_MACRO_START \ + if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)_isr_ ) \ + { \ + hal_interrupt_handlers[_vector_] = \ + (CYG_VECTOR_IS_INTERRUPT( _vector_ ) \ + ? (CYG_ADDRESS)hal_default_isr \ + : (CYG_ADDRESS)cyg_hal_exception_handler); \ + hal_interrupt_data[_vector_] = 0; \ + hal_interrupt_objects[_vector_] = 0; \ + } \ +CYG_MACRO_END + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL ) \ + *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ +CYG_MACRO_END + +// This is an ugly name, but what it means is: grab the VSR back to eCos +// internal handling, or if you like, the default handler. But if +// cooperating with GDB and CygMon, the default behaviour is to pass most +// exceptions to CygMon. This macro undoes that so that eCos handles the +// exception. So use it with care. + +#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL ) \ + *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = ( CYG_VECTOR_IS_INTERRUPT( _vector_ ) \ + ? (CYG_ADDRESS)hal_default_interrupt_vsr \ + : (CYG_ADDRESS)hal_default_exception_vsr ); \ +CYG_MACRO_END + + + +//--------------------------------------------------------------------------- + +// Which PIC (if any) is available is dependent on the board. +// This sets up that stuff: + +#include + +// Ditto the clock(s) +// This defines all the clock macros the kernel requires: + +#include + +//--------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_INTR_H +// End of hal_intr.h diff --git a/packages/hal/sparclite/arch/current/include/hal_io.h b/packages/hal/sparclite/arch/current/include/hal_io.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/hal_io.h @@ -0,0 +1,176 @@ +#ifndef CYGONCE_HAL_IO_H +#define CYGONCE_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, hmt +// Contributors: nickg, hmt +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include + +//----------------------------------------------------------------------------- +// Enforce in-order IO for all HAL reads/writes using this macro. +#define HAL_IO_BARRIER() \ + asm volatile ( "" : : : "memory" ) + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + CYG_MACRO_START \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + CYG_MACRO_START \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \ + HAL_IO_BARRIER (); \ + CYG_MACRO_END + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ + CYG_MACRO_START \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ + HAL_IO_BARRIER (); \ + } \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- + +#ifndef CYGPKG_HAL_SPARCLITE_SIM +#include +#endif // Not the SPARClite simulator + +#endif // ifndef CYGONCE_HAL_IO_H +// End of hal_io.h diff --git a/packages/hal/sparclite/arch/current/include/pkgconf/hal_sparclite.h b/packages/hal/sparclite/arch/current/include/pkgconf/hal_sparclite.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/pkgconf/hal_sparclite.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_PKGCONF_HAL_SPARCLITE_H +#define CYGONCE_PKGCONF_HAL_SPARCLITE_H +// ==================================================================== +// +// pkgconf/hal_sparclite.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): bartv +// Contributors: bartv, hmt +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_SPARCLITE { + display "SPARClite architecture" + type radio + parent CYGPKG_HAL + target sparclite + description " + The SPARClite architecture HAL package provides generic support + for this processor architecture. It is also necessary to select + a specific target platform HAL package." + } + + }}CFG_DATA */ + +/* -------------------------------------------------------------------*/ + +#endif /* CYGONCE_PKGCONF_HAL_SPARCLITE_H */ +/* EOF hal_sparclite.h */ diff --git a/packages/hal/sparclite/arch/current/include/vectors.h b/packages/hal/sparclite/arch/current/include/vectors.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/include/vectors.h @@ -0,0 +1,97 @@ +#ifndef CYGONCE_HAL_VECTORS_H +#define CYGONCE_HAL_VECTORS_H + +//============================================================================= +// +// vectors.h +// +// SPARClite Architecture specific vector numbers &c +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1998-12-10 +// Purpose: Define architecture abstractions and some shared info; +// this file is included by assembler files as well as C/C++. +// Usage: #include + +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#define __WINSIZE 8 +#define __WINBITS 7 +#define __WINBITS_MAXIMAL 0x1f + +#define __WIN_INIT 7 +#define __WIM_INIT 0x80 + +#define TRAP_WUNDER 6 // Window Underflow trap number +#define TRAP_WOVER 5 // Window Overflow trap number + +#define TRAP_INTR_MIN 17 // smallest interrupt trap number +#define TRAP_INTR_MAX 31 // largest interrupt trap number + +#define TT_MASK 0xff0 // trap type mask from tbr +#define TT_SHL 4 // shift to get a tbr value + +// Alternatively, detect an interrupt by testing tbr for being in the range +// 16-31 by masking &c: +#define TT_IS_INTR_MASK 0xf00 +#define TT_IS_INTR_VALUE 0x100 + +#if TT_IS_INTR_VALUE != ((TRAP_INTR_MIN << TT_SHL) & TT_IS_INTR_MASK) +#error "Bad *_INTR_* symbol definition (1)" +#endif + +#if TT_IS_INTR_VALUE != ((TRAP_INTR_MAX << TT_SHL) & TT_IS_INTR_MASK) +#error "Bad *_INTR_* symbol definition (2)" +#endif + +#if TT_IS_INTR_VALUE != (((TRAP_INTR_MIN+1) << TT_SHL) & TT_IS_INTR_MASK) +#error "Bad *_INTR_* symbol definition (3)" +#endif + +#if TT_IS_INTR_VALUE != (((TRAP_INTR_MAX-1) << TT_SHL) & TT_IS_INTR_MASK) +#error "Bad *_INTR_* symbol definition (4)" +#endif + + + +//#define SCHED_LOCK_MANGLED_NAME _18Cyg_Scheduler_Base.sched_lock +#define SCHED_LOCK_MANGLED_NAME cyg_scheduler_sched_lock + + + +#define SAVE_REGS_SIZE (4 * 32) // 32 words of 4 bytes each + + + + +#endif // CYGONCE_HAL_VECTORS_H +// EOF vectors.h diff --git a/packages/hal/sparclite/arch/current/src/PKGconf.mak b/packages/hal/sparclite/arch/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/PKGconf.mak @@ -0,0 +1,68 @@ +#============================================================================== +# +# makefile === PKGconf.mak +# +# hal/sparclite/arch/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_sparclite +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := vectors.S vec_ivsr.S vec_xvsr.S \ + context.S icontext.c \ + hal_intr.c hal_boot.c +OTHER_OBJS := +OTHER_TARGETS := vectors.stamp ldscript.stamp +OTHER_DEPS := $(PACKAGE)_vectors.d ldscript.d +OTHER_CLEAN := vectors.clean ldscript.clean + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + +.PHONY: ldscript.clean + +vectors.stamp: $(PACKAGE)_vectors.o + $(CP) $< $(PREFIX)/lib/vectors.o + @$(TOUCH) $@ + +vectors.clean: + $(RM) $(PREFIX)/lib/vectors.o $(PACKAGE)_vectors.o + $(RM) vectors.stamp + +$(PACKAGE)_vectors.o: $(BUILD_TREE)/pkgconf/pkgconf.mak \ + $(BUILD_TREE)/pkgconf/makevars $(PACKAGE_RULES_FILE) + +ldscript.stamp: sparclite.ld + $(CC) -E -P -Wp,-MD,ldscript.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/target.ld $< + @echo > ldscript.d + @echo $@ ':' $< '\' >> ldscript.d + @tail -n +2 ldscript.tmp >> ldscript.d + @rm ldscript.tmp + $(TOUCH) $@ + +ldscript.clean: + $(RM) -f $(PREFIX)/lib/target.ld + $(RM) -f ldscript.stamp diff --git a/packages/hal/sparclite/arch/current/src/context.S b/packages/hal/sparclite/arch/current/src/context.S new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/context.S @@ -0,0 +1,366 @@ +/*============================================================================= +// +// context.S +// +// SPARClite context switch code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//###COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1998-12-15 +// Purpose: SPARClite context switch code +// Description: This file contains implementations of the thread context +// switch routines. It also contains the longjmp() and setjmp() +// routines. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include + +#define DELAYS_AFTER_WRPSR_SAME_WINDOW +#define DELAYS_AFTER_WRWIM + + .text + +! ------------------------------------------------------------------------------ +! hal_thread_switch_context +! Switch thread contexts +! %o0 = address of sp of next thread to execute +! %o1 = address of sp save location of current thread + + .global hal_thread_switch_context +hal_thread_switch_context: + + ! First take the stack down to make room for the saved register + ! state, including a window save area at the base. Leave the + ! current window save area undisturbed. It is unused within the + ! save but will become current again when we continue in this + ! context. This lets us do this whole piece of work without + ! diabling interrupts for too long, since, for example, we can + ! lower the stack atomically with one instruction: + sub %sp, SAVE_REGS_SIZE, %sp + st %sp, [ %o1 ] ! return SP for this thread + + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + st %o7, [%sp + 31 * 4] ! save only the return address + ! and no need to preserve %o0 even though it is restored +#else // save a maximal context + st %g1, [%sp + 17 * 4] ! save G & O registers + std %g2, [%sp + 18 * 4] + std %g4, [%sp + 20 * 4] + std %g6, [%sp + 22 * 4] + + std %o0, [%sp + 24 * 4] + std %o2, [%sp + 26 * 4] + std %o4, [%sp + 28 * 4] + std %o6, [%sp + 30 * 4] +#endif // !CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + ! and save the CWP in %g0 save place + rd %psr, %g7 + st %g7, [%sp + 16 * 4] + + ! Now load the destination thread by dropping through + ! to hal_thread_load_context + +! ------------------------------------------------------------------------------ +! hal_thread_load_context +! Load thread context +! %o0 = address of sp of next thread to execute +! Note that this function is also the second half of hal_thread_switch_context +! and is simply dropped into from it. + + .global hal_thread_load_context +hal_thread_load_context: + + ! Here, we are a leaf routine but with slightly odd properties. + ! The stack is still the callers at this point but the register + ! set is up for grabs. So we can use globals: + + ld [ %o0 ], %g7 ! Get the next saved SP + + ! DISABLE INTERRUPTS *ONLY* NOT TRAPS + rd %psr, %g6 + or %g6, 0xfe0, %g5 ! PIL up to 15 leave traps enabled + wr %g5, %psr + + ! force out all our callers register sets onto the stack + ! if necessary: the system will handily take care of this for + ! us as follows: + save %sp, -16 * 4, %sp ! need all these to preserve + save %sp, -16 * 4, %sp ! the linked list property... + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + ! six of these is correct; a seventh would force out the current + ! set that was already saved manually above. Note that minimal + ! space is allowed on stack for locals and ins in case this + ! sequence itself gets interrupted and recurses too deep. + + ! now select the new window with traps disabled... + ! preserve ET, clear CWP + andn %g6, __WINBITS_MAXIMAL, %g6 + andn %g6, 0x20, %g5 ! clear ET also into %g5 + + ! get new CWP from %g0 save place... + ld [%g7 + 16 * 4], %g4 ! %g7 holds the new stack pointer + and %g4, __WINBITS, %g4 ! preserve CWP bits + + ! calculate a new WIM... + add %g4, 1, %g3 ! required invalid window number + and %g3, __WINBITS, %g3 ! modulo 8 + mov 1, %g2 + sll %g2, %g3, %g2 ! converted to a mask for the WIM + + ! DISABLE INTERRUPTS + wr %g5, %g4, %psr ! set CWP to new window, disable traps + wr %g2, %wim ! and WIM to new value + nop + nop + nop + + ! Must do this atomically so that the registers match the stack. + ! After locals and ins are loaded, we are conformant to the PCS + ! so can re-enable interrupts. + mov %g7, %sp ! target sp in situ (%sp = %o6) + + ldd [%sp + 0 * 4], %l0 ! restore L & I registers + ldd [%sp + 2 * 4], %l2 + ldd [%sp + 4 * 4], %l4 + ldd [%sp + 6 * 4], %l6 + + ldd [%sp + 8 * 4], %i0 + ldd [%sp + 10 * 4], %i2 + ldd [%sp + 12 * 4], %i4 + ldd [%sp + 14 * 4], %i6 + + ! ENABLE INTERRUPTS + wr %g6, %g4, %psr ! set new CWP and old ET + nop + nop + nop + + ! now load the rest of the context; we can be interrupted here, but + ! that is OK, other state will be preserved in that case... + +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + ld [%sp + 24 * 4], %o0 ! must load the initial argument +#else // restore a maximal context + ld [%sp + 17 * 4], %g1 + ldd [%sp + 18 * 4], %g2 + ldd [%sp + 20 * 4], %g4 + ldd [%sp + 22 * 4], %g6 + + ldd [%sp + 24 * 4], %o0 + ldd [%sp + 26 * 4], %o2 + ldd [%sp + 28 * 4], %o4 +#endif // !CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + ! %o6 = %sp, already set up + ld [%sp + 31 * 4], %o7 ! "return" address + + retl + add %sp, SAVE_REGS_SIZE, %sp ! and set the stack back + ! to its entrant value + +! ------------------------------------------------------------------------------ +! HAL longjmp, setjmp implementations + +!FUNC_START(hal_setjmp) + .global hal_setjmp +hal_setjmp: + ! Treat this as a leaf routine, may as well. + ! %o0 is the address of the buffer. + + std %l0, [%o0 + 0 * 4] ! save L & I registers + std %l2, [%o0 + 2 * 4] + std %l4, [%o0 + 4 * 4] + std %l6, [%o0 + 6 * 4] + + std %i0, [%o0 + 8 * 4] + std %i2, [%o0 + 10 * 4] + std %i4, [%o0 + 12 * 4] + std %i6, [%o0 + 14 * 4] + +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + std %o6, [%o0 + 30 * 4] ! just save %sp and return address +#else // save a maximal context + st %g1, [%o0 + 17 * 4] ! save G & O registers + std %g2, [%o0 + 18 * 4] + std %g4, [%o0 + 20 * 4] + std %g6, [%o0 + 22 * 4] + + std %o0, [%o0 + 24 * 4] + std %o2, [%o0 + 26 * 4] + std %o4, [%o0 + 28 * 4] + std %o6, [%o0 + 30 * 4] +#endif // !CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + + ! and save the CWP in %g0 save place + rd %psr, %g7 + st %g7, [%o0 + 16 * 4] + + ! DISABLE INTERRUPTS *ONLY* NOT TRAPS + or %g7, 0xfe0, %g6 ! PIL up to 15 leave traps enabled + wr %g6, %psr + + ! force out all our callers register sets onto the stack + ! if necessary: the system will handily take care of this for + ! us as follows: + save %sp, -16 * 4, %sp ! need all these to preserve + save %sp, -16 * 4, %sp ! the linked list property... + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + save %sp, -16 * 4, %sp + ! six of these is correct; a seventh would force out the current + ! set that was already saved manually above. Note that minimal + ! space is allowed on stack for locals and ins in case this + ! sequence itself gets interrupted and recurses too deep. + + ! (after all, we are about to call deeper not shallower, otherwise + ! using setjmp is inappropriate) + + ! ENABLE INTERRUPTS + wr %g7, %psr ! set CWP back to as-was + nop + nop + nop + +#ifndef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + ldd [%o0 + 22 * 4], %g6 ! preserve %g7 and %g6 +#endif + + retl ! ret and return zero to indicate + mov 0, %o0 ! not longjumped-to + +! hal_longjmp loads state from arg0 and returns arg1 +!FUNC_START(hal_longjmp) + .global hal_longjmp +hal_longjmp: + ! This is kind of a leaf routine, it returns elsewhere + ! %o0 is the address of the buffer. + ! %o1 is the value to return in %o0 (since we are a leaf) + + mov %o0, %g7 ! keep the pointer handy + mov %o1, %g1 ! and the return value + ! now select the new window with traps disabled... + rd %psr, %g6 + ! preserve ET, clear CWP + andn %g6, __WINBITS_MAXIMAL, %g6 + andn %g6, 0x20, %g5 ! clear ET also into %g5 + + ! get new CWP from %g0 save place... + ld [%g7 + 16 * 4], %g4 ! %g7 holds the new stack pointer + and %g4, __WINBITS, %g4 ! preserve CWP bits + + ! calculate a new WIM... + add %g4, 1, %g3 ! required invalid window number + and %g3, __WINBITS, %g3 ! modulo 8 + mov 1, %g2 + sll %g2, %g3, %g2 ! converted to a mask for the WIM + + ! DISABLE INTERRUPTS + wr %g5, %g4, %psr ! set CWP to new window, disable traps + wr %g2, %wim ! and WIM to new value + nop + nop + nop + + ! Must do this atomically so that the registers match the stack. + ! After locals and ins are loaded, we are conformant to the PCS + ! so can re-enable interrupts. + + ldd [%g7 + 0 * 4], %l0 ! restore L & I registers + ldd [%g7 + 2 * 4], %l2 + ldd [%g7 + 4 * 4], %l4 + ldd [%g7 + 6 * 4], %l6 + + ldd [%g7 + 8 * 4], %i0 + ldd [%g7 + 10 * 4], %i2 + ldd [%g7 + 12 * 4], %i4 + ldd [%g7 + 14 * 4], %i6 + + ld [%g7 + 30 * 4], %sp ! %o6 = %sp, set up now so as to conform + ! to PCS and so be interruptible + ! ENABLE INTERRUPTS + wr %g6, %g4, %psr ! set new CWP and old ET + nop + nop + nop + + ! now load the rest of the context; we can be interrupted here, but + ! that is OK, other state will be preserved in that case... +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + ! we are not preserving globals... + ! %o6 = %sp, already set up + ld [%g7 + 31 * 4], %o7 ! "return" address + retl ! %g1 still holds the return value + mov %g1, %o0 + +#else // load a maximal context + mov %g7, %o0 ! original pointer was in %o0 anyway + + ldd [%o0 + 18 * 4], %g2 + ldd [%o0 + 20 * 4], %g4 + ldd [%o0 + 22 * 4], %g6 + + ld [%o0 + 25 * 4], %o1 ! %o0 = original pointer + ldd [%o0 + 26 * 4], %o2 + ldd [%o0 + 28 * 4], %o4 + ! %o6 = %sp, already set up + ld [%o0 + 31 * 4], %o7 ! "return" address + + ! %g1 still holds the return value; want to get this into %o0 + ! and restore %g1 from the saved state; %o0 is the state pointer: + ! g1 = R, o0 = P + xor %o0, %g1, %g1 ! g1 = R^P, o0 = P + xor %o0, %g1, %o0 ! g1 = R^P, o0 = R + xor %o0, %g1, %g1 ! g1 = P, o0 = R all done + + retl + ld [%g1 + 17 * 4], %g1 ! and finally restore %g1 +#endif // !CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + +! ------------------------------------------------------------------------------ +! end of context.S + + + diff --git a/packages/hal/sparclite/arch/current/src/hal_boot.c b/packages/hal/sparclite/arch/current/src/hal_boot.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/hal_boot.c @@ -0,0 +1,163 @@ +//========================================================================== +// +// hal_boot.c +// +// SPARClite Architecture specific interrupt dispatch tables +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-12-10 +// Purpose: Interrupt handler tables for SPARClite. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +/*------------------------------------------------------------------------*/ +/* calling this is our raison d'etre: */ +extern void cyg_start( void ); + +/*------------------------------------------------------------------------*/ +/* data copy and bss zero functions */ + +typedef void (CYG_ROM_ADDRESS)(void); + +#ifdef CYG_HAL_STARTUP_ROM +void hal_copy_data(void) +{ + extern char __ram_data_start; + extern char __ram_data_end; + extern CYG_ROM_ADDRESS __rom_data_start; + long *p = (long *)&__ram_data_start; + long *q = (long *)&__rom_data_start; + + while( p <= (long *)&__ram_data_end ) + *p++ = *q++; +} +#endif + +void hal_zero_bss(void) +{ + extern CYG_ROM_ADDRESS __bss_start; + extern CYG_ROM_ADDRESS __bss_end; + + register long long zero = 0; + register long long *end = (long long *)&__bss_end; + register long long *p = (long long *)&__bss_start; + + while( p <= end ) + *p++ = zero; +} + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +void +cyg_hal_invoke_constructors (void) +{ + typedef void (*pfunc) (void); + extern pfunc __CTOR_LIST__[]; + extern pfunc __CTOR_END__[]; + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) + (*p) (); +#endif +} + +// Override any __eabi the compiler might generate. We don't want +// constructors to be called twice. +void __eabi (void) {} + +/*------------------------------------------------------------------------*/ +/* CYG_HAL_START - pre-main-entrypoint */ + +#ifdef CYG_HAL_SPARCLITE_SLEB +#define SLEB_LED (*(volatile char *)(0x02000003)) +#define LED( _x_ ) SLEB_LED = (char)(0xff & ~(_x_)) +#else +#define LED( _x_ ) CYG_EMPTY_STATEMENT +#endif + +extern void hal_board_prestart( void ); +extern void hal_board_poststart( void ); + +// This is called with traps enabled, but interrupts masked out: +// Be sure to enable them in hal_board_poststart() at the latest. + +void cyg_hal_start( void ) +{ + /* Board specific prestart that's best done in C */ + hal_board_prestart(); + + LED( 0xd0 ); + +#ifdef CYG_HAL_STARTUP_ROM + /* Copy data from ROM to RAM */ + hal_copy_data(); +#endif + + LED( 0xd4 ); + + /* Zero BSS */ + hal_zero_bss(); + + LED( 0xd8 ); + + /* Call constructors */ + cyg_hal_invoke_constructors(); + + LED( 0xdc ); + + /* Board specific late startup that's best done in C */ + hal_board_poststart(); + + LED( 0xf8 ); + + /* Call cyg_start */ + cyg_start(); /* does not return */ +} + +// EOF hal_boot.c diff --git a/packages/hal/sparclite/arch/current/src/hal_intr.c b/packages/hal/sparclite/arch/current/src/hal_intr.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/hal_intr.c @@ -0,0 +1,151 @@ +//========================================================================== +// +// hal_intr.c +// +// SPARClite Architecture specific interrupt dispatch tables +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-20 +// Purpose: Interrupt handler tables for SPARClite. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +#include +#include + +#include // for CYG_FAIL() below + +// ------------------------------------------------------------------------ +// First level C default interrupt handler. + +//static int count = 0; + +cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + return 0; // 0x1def0000 + vector + (count += 0x0100); +} + +// ------------------------------------------------------------------------ +// First level C exception handler. + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; + +void cyg_hal_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer ) +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + // Set the pointer to the registers of the current exception + // context. At entry the GDB stub will expand the + // HAL_SavedRegisters structure into a (bigger) register array. + _hal_registers = (HAL_SavedRegisters *)stackpointer; + + __handle_exception(); + +#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \ + defined(CYGPKG_HAL_EXCEPTIONS) + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + + cyg_hal_deliver_exception( vector, stackpointer ); + +#else + CYG_FAIL("Exception!!!"); +#endif + return; +} + +// ISR tables +volatile +CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_VSR_COUNT] = { + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, + (CYG_ADDRESS)hal_default_isr, /* 16 of these */ + + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + (CYG_ADDRESS)cyg_hal_exception_handler, + + (CYG_ADDRESS)cyg_hal_exception_handler, /* 11 of these */ +}; + +volatile +CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_VSR_COUNT] = { + 0x11da1a00, 0x11da1a01, 0x11da1a02, 0x11da1a03, + 0x11da1a04, 0x11da1a05, 0x11da1a06, 0x11da1a07, + 0x11da1a08, 0x11da1a09, 0x11da1a0a, 0x11da1a0b, + 0x11da1a0c, 0x11da1a0d, 0x11da1a0e, 0x11da1a0f, + 0xeeda1a00, 0xeeda1a01, 0xeeda1a02, 0xeeda1a03, 0xeeda1a04, + 0xeeda1a05, 0xeeda1a06, 0xeeda1a07, 0xeeda1a08, 0xeeda1a09, + 0xeeda1a0A +}; + +volatile +CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_VSR_COUNT] = { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + + 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, + 0, +}; + +// EOF hal_intr.c diff --git a/packages/hal/sparclite/arch/current/src/icontext.c b/packages/hal/sparclite/arch/current/src/icontext.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/icontext.c @@ -0,0 +1,472 @@ +/*============================================================================= +// +// icontext.c +// +// SPARClite HAL context init function +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-12-14 +// Purpose: HAL context initialization function +// Description: Initialize a HAL context for SPARClite; this is in C and out +// of line because there is too much of it for a simple macro. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include // HAL header + +#include + +#include // SAVE_REGS_SIZE, __WINSIZE, ... + +/*---------------------------------------------------------------------------*/ + +/* We lay out the stack in the manner that the PCS demands: + * frame pointer -----> [top of stack] + * Argument spill area (6 words) + * Return Arg pointer + * Initial saved register window (i[8], l[8]) + * for use by program when it starts + * [rest of] saved register object (various) + * stack pointer -----> saved register window (i[8], l[8]) + * to allow us to be interrupted. + * + * ie. frame pointer -> + * struct HAL_FrameStructure + * stack pointer -> struct HAL_SavedRegisters + * + * and when the context "resumes" sp is incremented by 40 * 4, the size of + * a _struct HAL_SavedRegisters_ which points it at the extant but unused + * _struct HAL_FrameStructure_ as the PCS requires. The frame pointer is + * left pointing off the top of stack. + * + * + * Thus the stack is the same if created from an already executing context: + * + * frame pointer -----> + * [temporaries and locals] + * [more arguments] + * Argument spill area (6 words) + * Return Arg pointer + * [sp at entry]------> Previous saved register window (i[8], l[8]) + * for use by program when it starts + * [rest of] saved register object (various) + * stack pointer -----> saved register window (i[8], l[8]) + * to allow us to be interrupted. + */ + +CYG_ADDRESS +hal_thread_init_context( CYG_WORD sparg, + CYG_WORD thread, + CYG_WORD entry, + CYG_WORD id ) +{ + register CYG_WORD fp = sparg; + register CYG_WORD sp = 0; + register HAL_SavedRegisters *regs; + register HAL_FrameStructure *frame; + int i; + + if ( 0 == (id & 0xffff0000) ) + id <<= 16; + + fp &= ~7; // round down to double alignment + + frame = (HAL_FrameStructure *)( + fp - sizeof( HAL_FrameStructure ) ); + + regs = (HAL_SavedRegisters *)( + ((CYG_WORD)frame) - sizeof(HAL_SavedRegisters) ); + + sp = (CYG_WORD)regs; + + for ( i = 0; i < 6; i++ ) { + frame->spill_args[i] = id | 0xa0 | i; + } + frame->composite_return_ptr = 0; + + for ( i = 0; i < 8; i++ ) { + frame->li.i[i] = id | ( 56 + i ); + frame->li.l[i] = id | ( 48 + i ); + regs ->li.i[i] = id | ( 24 + i ); + regs ->li.l[i] = id | ( 16 + i ); + regs ->o[i] = id | ( 8 + i ); + regs ->g[i] = id | ( i ); + } + + // first terminate the linked list on the stack in the initial + // (already saved) register window: + frame->li.i[6] = regs->li.i[6] = (cyg_uint32)fp; // frame pointer + frame->li.i[7] = regs->li.i[7] = (cyg_uint32)0; // no ret addr here + + // and set up other saved regs as if called from just before + // the entry point: + regs->o[7] = (entry - 8); + regs->o[6] = sp; + + // this is the argument that the entry point is called with + regs->o[0] = thread; + + // this is the initial CWP; quite arbitrary really, the WIM is set up + // accordingly in hal_thread_load_context(). + + regs->g[0] = 7; + + return (CYG_ADDRESS)sp; +} + +// --------------------------------------------------------------------------- + +//#define THREAD_DEBUG_SERIAL_VERBOSE + +#ifdef THREAD_DEBUG_SERIAL_VERBOSE // NOT INCLUDED + +// This is unpleasant to try to debug, because these routines are called +// WHEN THE PROGRAM IS NOT RUNNING from the CygMon's GDB stubs - so you +// can't use any normal output: these little routines use the serial +// line directly, so are best used when debugging via Ethernet, so you +// just have a separate output stream to read. Nasty... + +#include + +#undef HAL_DIAG_WRITE_CHAR +#define HAL_DIAG_WRITE_CHAR(_c_) CYG_MACRO_START \ + SLEB_LED = (_c_); \ + HAL_DIAG_WRITE_CHAR_DIRECT( _c_ ); \ +CYG_MACRO_END + +static void swritec( char c ) +{ + HAL_DIAG_WRITE_CHAR( c ); +} + +static void swrites( char *s ) +{ + char c; + while ( 0 != (c = *s++) ) + HAL_DIAG_WRITE_CHAR( c ); +} + +static void swritex( cyg_uint32 x ) +{ + int i; + swrites( "0x" ); + for ( i = 28; i >= 0; i-= 4 ) { + char c = "0123456789abcdef"[ 0xf & (x >> i) ]; + HAL_DIAG_WRITE_CHAR( c ); + } +} + +#define newline() swrites( "\n\r" ) + +static void x8( char *s, unsigned long *xp ) +{ + int i; + for ( i = 0; i < 8; i++ ) { + swrites( s ); + swritec( '0' + i ); + swrites( " = " ); + swritex( xp[i] ); + if ( 3 == (i & 3) ) + newline(); + else + swrites( " " ); + } +} + +#endif // THREAD_DEBUG_SERIAL_VERBOSE ... NOT INCLUDED + +// --------------------------------------------------------------------------- +// Routines in icontext.c used here because they're quite large for +// the SPARClite (note param order); these are used in talking to GDB. + +enum regnames {G0 = 0, G1, G2, G3, G4, G5, G6, G7, + O0, O1, O2, O3, O4, O5, SP, O7, + L0, L1, L2, L3, L4, L5, L6, L7, + I0, I1, I2, I3, I4, I5, FP, I7, + + F0, F1, F2, F3, F4, F5, F6, F7, + F8, F9, F10, F11, F12, F13, F14, F15, + F16, F17, F18, F19, F20, F21, F22, F23, + F24, F25, F26, F27, F28, F29, F30, F31, + Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR}; + +typedef unsigned long target_register_t; + +void +cyg_hal_sparc_get_gdb_regs( void *gdb_regset, + HAL_SavedRegisters *eCos_regset ) +{ + target_register_t *gdb = (target_register_t *)gdb_regset; + int reg; + cyg_uint32 scratch = 0; + cyg_uint32 *sptrap; + HAL_SavedWindow *trapli, *ctxli; + + if ( 0 == eCos_regset->g[0] || + 0xc0 == (0xe0 & eCos_regset->g[0]) ) { + // Then it's an interrupt stack saved state: + // (either minimal, or a saved PSR with traps disabled) + // The saved register set is pretty minimal, so we have to grub + // around in the stack to find out some truth... + sptrap = (cyg_uint32 *)eCos_regset; // point to the IL save area for + sptrap -= 24; // the trap handler, for PC, NPC + trapli = (HAL_SavedWindow *)sptrap; // Get at those regs + + ctxli = (HAL_SavedWindow *)(trapli->i[6]); // (the frame pointer) + // and get at the interruptee's regs + + // Pick up interruptee's registers from all over the stack: + for ( reg = 0; reg < 8 ; reg++ ) { + gdb[ G0 + reg ] = eCos_regset->g[reg]; + gdb[ O0 + reg ] = trapli->i[reg]; + gdb[ L0 + reg ] = ctxli->l[reg]; + gdb[ I0 + reg ] = ctxli->i[reg]; + } + + // Clear out G0 which is always 0 (but abused in eCos_regset) + // and the FP regs which we do not have: + gdb[ G0 ] = 0; + for ( reg = F0; reg <= F31; reg++ ) + gdb[ reg ] = 0; + + // In the save context _of the trap handler_ registers are as follows: + // %l0 = psr (with this CWP/window-level in it) + // %l1 = pc + // %l2 = npc + // %l3 = vector number (1-15 for interrupts) + // %l4 = Y register preserved + gdb[ Y ] = trapli->l[4]; + + scratch = trapli->l[0]; // the PSR in the trap handler + scratch++; // back to interupted thread's window + scratch &=~ 0x38; // clear ET and any CWP overflow + gdb[ PSR ] = scratch; + gdb[ WIM ] = 1 << ((__WINBITS & (1 + scratch))); + + // Read _a_ TBR value and ignore the current trap details: + asm volatile ( "rd %%tbr, %0" : "=r"(scratch) : ); + gdb[ TBR ] = (scratch &~ 0xfff); + + gdb[ PC ] = trapli->l[1]; + gdb[ NPC ] = trapli->l[2]; + + gdb[ FPSR ] = 0; + gdb[ CPSR ] = 0; + +#ifdef THREAD_DEBUG_SERIAL_VERBOSE + newline(); + swrites( "-----------------------------------------------------" ); newline(); + swrites( "-------------- INTERRUPT STACK GET ------------------" ); newline(); + swrites( "eCos regset at " ); swritex( eCos_regset ); newline(); + swrites( " trapli " ); swritex( trapli ); newline(); + swrites( " ctxli " ); swritex( ctxli ); newline(); + x8( "global ", &(gdb[G0]) ); + x8( " in ", &(gdb[I0]) ); + x8( " local ", &(gdb[L0]) ); + x8( " out ", &(gdb[O0]) ); + swrites( "gdb PC = " ); swritex( gdb[ PC ] ); newline(); + swrites( "gdb NPC = " ); swritex( gdb[ NPC ] ); newline(); + swrites( "gdb PSR = " ); swritex( gdb[ PSR ] ); newline(); +#endif + + } + else { + // It's a synchronous context switch that led to this object. + // Pick up interruptee's registers from the saved context: + for ( reg = 0; reg < 8 ; reg++ ) { +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + gdb[ G0 + reg ] = 0; + gdb[ O0 + reg ] = 0; +#else + gdb[ G0 + reg ] = eCos_regset->g[reg]; + gdb[ O0 + reg ] = eCos_regset->o[reg]; +#endif + gdb[ L0 + reg ] = eCos_regset->li.l[reg]; + gdb[ I0 + reg ] = eCos_regset->li.i[reg]; + } + +#ifdef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + // Set up the stack pointer by arithmetic and the return address + gdb[ SP ] = ((cyg_uint32)(eCos_regset)); + gdb[ O7 ] = eCos_regset->o[ 7 ]; +#else + // Clear out G0 which is always 0 (but abused in eCos_regset) + gdb[ G0 ] = 0; +#endif + // and clear the FP regs which we do not have: + for ( reg = F0; reg <= F31; reg++ ) + gdb[ reg ] = 0; + + gdb[ Y ] = 0; // it's not preserved. + + scratch = eCos_regset->g[ 0 ]; // the PSR in the saved context + gdb[ PSR ] = scratch; // return it verbatim. + gdb[ WIM ] = 1 << ((__WINBITS & (1 + scratch))); + + // Read _a_ TBR value and ignore the current trap details: + asm volatile ( "rd %%tbr, %0" : "=r"(scratch) : ); + gdb[ TBR ] = (scratch &~ 0xfff); + + gdb[ PC ] = eCos_regset->o[ 7 ]; // the return address + gdb[ NPC ] = 4 + gdb[ PC ]; + + gdb[ FPSR ] = 0; + gdb[ CPSR ] = 0; + +#ifdef THREAD_DEBUG_SERIAL_VERBOSE + newline(); + swrites( "-----------------------------------------------------" ); newline(); + swrites( "-------------- SYNCHRONOUS SWITCH GET----------------" ); newline(); + swrites( "eCos regset at " ); swritex( eCos_regset ); newline(); + x8( "global ", &(gdb[G0]) ); + x8( " in ", &(gdb[I0]) ); + x8( " local ", &(gdb[L0]) ); + x8( " out ", &(gdb[O0]) ); + swrites( "gdb PC = " ); swritex( gdb[ PC ] ); newline(); + swrites( "gdb NPC = " ); swritex( gdb[ NPC ] ); newline(); + swrites( "gdb PSR = " ); swritex( gdb[ PSR ] ); newline(); +#endif + } + +} + +// --------------------------------------------------------------------------- + +void +cyg_hal_sparc_set_gdb_regs( HAL_SavedRegisters *eCos_regset, + void *gdb_regset ) +{ + target_register_t *gdb = (target_register_t *)gdb_regset; + int reg; + cyg_uint32 scratch = 0; + cyg_uint32 *sptrap; + HAL_SavedWindow *trapli, *ctxli; + + // Guess where the eCos register set really is: + if ( 0 == eCos_regset->g[0] || + 0xc0 == (0xe0 & eCos_regset->g[0]) ) { + // Then it's an interrupt stack saved state: + // (either minimal, or a saved PSR with traps disabled) + // The saved register set is pretty minimal, so we have to grub + // around in the stack to find out some truth... + sptrap = (cyg_uint32 *)eCos_regset; // point to the IL save area for + sptrap -= 24; // the trap handler, for PC, NPC + trapli = (HAL_SavedWindow *)sptrap; // Get at those regs + + ctxli = (HAL_SavedWindow *)(trapli->i[6]); // (the frame pointer) + // and get at the interruptee's regs + + scratch = eCos_regset->g[0]; + + // Put back interruptee's registers all over the stack: + for ( reg = 0; reg < 8 ; reg++ ) { + eCos_regset->g[reg] = gdb[ G0 + reg ] ; + trapli->i[reg] = gdb[ O0 + reg ] ; + ctxli->l[reg] = gdb[ L0 + reg ] ; + ctxli->i[reg] = gdb[ I0 + reg ] ; + } + + // Put back the eCos G0 which is always 0 (but abused in eCos_regset) + eCos_regset->g[0] = scratch; + + // In the save context _of the trap handler_ registers are as follows: + // %l0 = psr (with this CWP/window-level in it) + // %l1 = pc + // %l2 = npc + // %l3 = vector number (1-15 for interrupts) + // %l4 = Y register preserved + trapli->l[4] = gdb[ Y ]; + + // I am *not* interfering with the saved PSR, nor the TBR nor WIM. + + // put back return PC and NPC + trapli->l[1] = gdb[ PC ] ; + trapli->l[2] = gdb[ NPC ]; + +#ifdef THREAD_DEBUG_SERIAL_VERBOSE + newline(); + swrites( "-----------------------------------------------------" ); newline(); + swrites( "-------------- INTERRUPT STACK SET ------------------" ); newline(); + swrites( "eCos regset at " ); swritex( eCos_regset ); newline(); + swrites( " trapli " ); swritex( trapli ); newline(); + swrites( " ctxli " ); swritex( ctxli ); newline(); + x8( "global ", &(gdb[G0]) ); + x8( " in ", &(gdb[I0]) ); + x8( " local ", &(gdb[L0]) ); + x8( " out ", &(gdb[O0]) ); + swrites( "gdb PC = " ); swritex( gdb[ PC ] ); newline(); + swrites( "gdb NPC = " ); swritex( gdb[ NPC ] ); newline(); + swrites( "gdb PSR = " ); swritex( gdb[ PSR ] ); newline(); +#endif + + } + else { + // It's a synchronous context switch that led to this object. + // Pick up interruptee's registers from the saved context: + + scratch = eCos_regset->g[0]; + + for ( reg = 0; reg < 8 ; reg++ ) { + eCos_regset->g[reg] = gdb[ G0 + reg ]; + eCos_regset->o[reg] = gdb[ O0 + reg ]; + eCos_regset->li.l[reg] = gdb[ L0 + reg ]; + eCos_regset->li.i[reg] = gdb[ I0 + reg ]; + } + + // Put back the eCos G0 which is always 0 (but abused in eCos_regset) + eCos_regset->g[0] = scratch; + + // I am *not* interfering with the saved PSR, nor the TBR nor WIM. + + // The PC is in o7, altering it via GDB's PC is not on. + // Setting the NPC in a voluntary context is meaningless. + +#ifdef THREAD_DEBUG_SERIAL_VERBOSE + newline(); + swrites( "-----------------------------------------------------" ); newline(); + swrites( "-------------- SYNCHRONOUS SWITCH SET ---------------" ); newline(); + swrites( "eCos regset at " ); swritex( eCos_regset ); newline(); + x8( "global ", &(gdb[G0]) ); + x8( " in ", &(gdb[I0]) ); + x8( " local ", &(gdb[L0]) ); + x8( " out ", &(gdb[O0]) ); + swrites( "gdb PC = " ); swritex( gdb[ PC ] ); newline(); + swrites( "gdb NPC = " ); swritex( gdb[ NPC ] ); newline(); + swrites( "gdb PSR = " ); swritex( gdb[ PSR ] ); newline(); +#endif + } + +} + +/*---------------------------------------------------------------------------*/ +// EOF icontext.c diff --git a/packages/hal/sparclite/arch/current/src/sparclite.ld b/packages/hal/sparclite/arch/current/src/sparclite.ld new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/sparclite.ld @@ -0,0 +1,130 @@ +//=========================================================================== +// +// MLT linker script for SPARClite +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 8 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = ABSOLUTE(.); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); \ + *(.data*) *(.data1) \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); \ + KEEP(*(SORT(.ctors*))) \ + __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); \ + KEEP(*(SORT(.dtors*))) \ + __DTOR_END__ = ABSOLUTE (.); \ + _GOT_START = ABSOLUTE (.); _GLOBAL_OFFSET_TABLE_ = ABSOLUTE (.) + 32768; \ + _SDA_BASE_ = ABSOLUTE (.); \ + *(.got.plt) *(.got) _GOT_END_ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) *(.eh_frame) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + . = ALIGN (8); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(8); _end = .; PROVIDE (end = .); \ + .debug 0 : { *(.debug) } \ + .line 0 : { *(.line) } \ + .debug_srcinfo 0 : { *(.debug_srcinfo) } \ + .debug_sfnames 0 : { *(.debug_sfnames) } \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + .debug_weaknames 0 : { *(.debug_weaknames) } \ + .debug_funcnames 0 : { *(.debug_funcnames) } \ + .debug_typenames 0 : { *(.debug_typenames) } \ + .debug_varnames 0 : { *(.debug_varnames) } + +#include +#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/sparclite/arch/current/src/vec_ivsr.S b/packages/hal/sparclite/arch/current/src/vec_ivsr.S new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/vec_ivsr.S @@ -0,0 +1,308 @@ +/*=========================================================================== +// +// vec_ivsr.S +// +// SPARClite vectors: interrupt vector service routine +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//###COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-20 +// Purpose: SPARClite vector code +// Description: see vectors.S; this is the default vector service routine +// for interrupts. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +!---------------------------------------------------------------------------- + + .file "vec_ivsr.S" + +!---------------------------------------------------------------------------- + +#include +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +!------------------------------------------------------------------------ + +#include + +#define DELAYS_AFTER_WRPSR_SAME_WINDOW +#define DELAYS_AFTER_WRWIM + +!------------------------------------------------------------------------ + + .text + +!--------------------------------------------------------------------------- +! default interrupt VSR, which calls the appropriate ISR after scheduler +! lock andinterrupt masking, then interrupt_end(). interrupt_end() must be +! called with interrupts enabled, on the original thread stack. + + .global hal_default_interrupt_vsr +hal_default_interrupt_vsr: + ! here,locals have been set up as follows: + ! %l0 = psr (with this CWP/window-level in it) + ! %l1 = pc + ! %l2 = npc + ! %l3 = vector number (1-15 for interrupts) + ! and we are in our own register window, though it is likely that + ! the next one will need to be saved before we can use it: + ! ie. this one is the invalid register window. + + ! must establish a safe stack before re-enabling interrupts + traps + and %l0, __WINBITS, %l7 ! CWP extracted + mov 1, %l6 + sll %l6, %l7, %l6 ! 1 << CWP + rd %wim, %l5 + cmp %l5, %l6 ! are they the same? + bne 1f ! No, so the stack is OK as is. + + ! now do by hand an overflow trap, effectively + mov %g1, %l7 ! (DELAY SLOT) + srl %l5, 1, %l5 + sll %l6, __WINSIZE-1, %l6 + or %l6, %l5, %g1 ! new WIM in %g1 so we can get it + ! within the save: + save ! Slip into next window + mov %g1, %wim ! Install the new wim + ! (invalidates current window!) +#ifdef DELAYS_AFTER_WRWIM + nop + nop + nop +#endif + + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + restore ! Go back to trap window. + mov %l7, %g1 ! Restore %g1 + +1: ! now save away the regs we must preserve + sub %fp, 32 * 4, %sp +#ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + std %g0, [%sp + 16 * 4] ! save G registers + std %g2, [%sp + 18 * 4] ! (set %g0 place to 0 to flag special context) + std %g4, [%sp + 20 * 4] + std %g6, [%sp + 22 * 4] +#else // not CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + st %g1, [%sp + 17 * 4] ! save G registers + std %g2, [%sp + 18 * 4] + std %g4, [%sp + 20 * 4] + std %g6, [%sp + 22 * 4] + + ! no point whatsoever in saving O registers + + ! and save the CWP in %g0 save place + st %l0, [%sp + 16 * 4] +#endif // ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + + sub %sp, 24 * 4, %sp ! fresh frame including + ! arg spill area for callees + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + ! Lock the scheduler + .extern SCHED_LOCK_MANGLED_NAME + sethi %hi(SCHED_LOCK_MANGLED_NAME), %l7 + ld [ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ], %l6 + add %l6, 1, %l6 + st %l6, [ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ] +#endif + + ! HELP_GDB_WITH_BACKTRACE + mov %i7, %l5 ! preserve it JIC + mov %l1, %i7 ! bogus return link here + + ! and we must preserve the Y register (multiply/divide auxiliary) + ! over these calls; we will keep it in %l4 which is otherwise unused. + rd %y, %l4 + + ! Now we can reenable traps and mask off only lower prio interrupts: + andn %l0, 0xf00, %l7 ! clear PIL field + or %l7, 0x0e0, %l7 ! and ET (+S,PS) + sll %l3, 8, %l6 ! trap number (1-15) into PIL bitfield + wr %l7, %l6, %psr ! and enable! +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + ! now call the ISR and so on with the appropriate args: + ! ie. + ! isr_retcode = (*(hal_interrupt_handlers[ vector ])) + ! ( vector, hal_interrupt_data[ vector ] ); + + ! from hal_arch.h + !// ISR tables + !CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; + !CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; + !CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + + mov %l3, %o0 + sll %l3, 2, %l3 ! %l3 to a word offset + sethi %hi(hal_interrupt_data), %l7 + or %l7, %lo(hal_interrupt_data), %l7 + ld [ %l7 + %l3 ], %o1 + + sethi %hi(hal_interrupt_handlers), %l7 + or %l7, %lo(hal_interrupt_handlers), %l7 + ld [ %l7 + %l3 ], %l6 + call %l6 + nop + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + ! We only need to call _interrupt_end() when there is a kernel + ! present to do any tidying up. + + ! First restore the processor interrupt level to that interrupted + ! (otherwise a task-switch runs at the current PIL) on the assumption + ! that the ISR dealt with the interrupt source per se, so it is safe + ! to unmask it, effectively: + or %l0, 0x0e0, %l7 ! original PSR and ET (+S,PS) + wr %l7, %psr ! and enable! +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + ! then call interrupt_end( isr_retcode, &intr_object, ®save ) + ! to unlock the scheduler and do any rescheduling that~s needed. + ! argument 0 (isr_retcode) is already in place in %o0 + sethi %hi(hal_interrupt_objects), %l7 + or %l7, %lo(hal_interrupt_objects), %l7 + ld [ %l7 + %l3 ], %o1 + add %sp, 24 * 4, %o2 ! saved regset (maybe tiny) + + .extern interrupt_end + call interrupt_end + nop +#endif + + ! restore the Y register having done our callouts to C + wr %l4, %y + + ! We can reinstall the original CWP here; even if interrupt_end() + ! performed a reschedule (ie. yield/resume pair) we will be in the + ! same window. The window is preserved by reschedule precisely + ! because it is impossible atomically to disable traps here without + ! involving a CWP living in a register for a time when other + ! interrupts may occur. + + ! disable traps (using the saved psr is fastest way) + wr %l0, %psr ! restores flags, disables traps, and old PIL +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + + ! HELP_GDB_WITH_BACKTRACE + mov %l5, %i7 ! restore (unused) return link + + ! and restore other saved regs + ! (see CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT) + add %sp, 24 * 4, %sp ! undo fresh frame + + ld [%sp + 17 * 4], %g1 ! restore G registers + ldd [%sp + 18 * 4], %g2 + ldd [%sp + 20 * 4], %g4 + ldd [%sp + 22 * 4], %g6 + + ! and do NOT restore any other registers L, I or O + + ! Now test for window underflow here and fix up if needs be. + ! + ! Why? interrupt_end() might have yielded us, when only + ! its own frame was restored; its own return to us caused a + ! window underflow trap, as would our return to interruptee + ! unless we deal with it now. + + add %l0, 1, %l7 ! interruptee~s CWP plus noise + and %l7, __WINBITS, %l7 ! CWP only + mov 1, %l6 + sll %l6, %l7, %l6 ! 1 << CWP + rd %wim, %l5 + cmp %l5, %l6 ! are they the same? + bne 2f ! No, so the stack is OK as is. + + ! now do by hand an underflow trap, effectively + sll %l5, 1, %l5 ! Rotate wim left + srl %l6, __WINSIZE-1, %l6 + wr %l5, %l6, %wim +#ifdef DELAYS_AFTER_WRWIM + nop ! are these delays needed? + nop ! (following restore uses wim) + nop +#endif + restore ! Interruptee~s window + ldd [%sp + 0 * 4], %l0 ! restore L & I registers + ldd [%sp + 2 * 4], %l2 + ldd [%sp + 4 * 4], %l4 + ldd [%sp + 6 * 4], %l6 + + ldd [%sp + 8 * 4], %i0 + ldd [%sp + 10 * 4], %i2 + ldd [%sp + 12 * 4], %i4 + ldd [%sp + 14 * 4], %i6 + save ! Back to trap window + +2: ! restore the condition codes, PSR and PIL and return from trap. + wr %l0, %psr ! restores flags, disables traps, and old PIL +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + jmpl %l1, %g0 + rett %l2 + + +! end of vec_ivsr.S diff --git a/packages/hal/sparclite/arch/current/src/vec_xvsr.S b/packages/hal/sparclite/arch/current/src/vec_xvsr.S new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/vec_xvsr.S @@ -0,0 +1,277 @@ +/*=========================================================================== +// +// vec_xvsr.S +// +// SPARClite vectors: exception vector service routine +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//###COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-20 +// Purpose: SPARClite vector code +// Description: see vectors.S; this is the default vector service routine +// for exceptions. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +!----------------------------------------------------------------------------- + + .file "vec_xvsr.S" + +!---------------------------------------------------------------------------- + +#include +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +!------------------------------------------------------------------------ + +#include + +#define DELAYS_AFTER_WRPSR_SAME_WINDOW +#define DELAYS_AFTER_WRWIM + +!------------------------------------------------------------------------ + + .text + +!--------------------------------------------------------------------------- +! default exception handler VSR, which calls the appropriate ISR after +! interrupt masking - much the same as the interrupt VSR but does not lock +! scheduler or call interrupt_end(). + + .global hal_default_exception_vsr +hal_default_exception_vsr: + ! here,locals have been set up as follows: + ! %l0 = psr (with this CWP/window-level in it) + ! %l1 = pc + ! %l2 = npc + ! %l3 = vector number (16-25 for traps) + ! and we are in our own register window, though it is likely that + ! the next one will need to be saved before we can use it: + ! ie. this one is the invalid register window. + + ! must establish a safe stack before re-enabling interrupts + traps + and %l0, __WINBITS, %l7 ! CWP extracted + mov 1, %l6 + sll %l6, %l7, %l6 ! 1 << CWP + rd %wim, %l5 + cmp %l5, %l6 ! are they the same? + bne 1f ! No, so the stack is OK as is. + + ! now do by hand an overflow trap, effectively + mov %g1, %l7 ! (DELAY SLOT) + srl %l5, 1, %l5 + sll %l6, __WINSIZE-1, %l6 + or %l6, %l5, %g1 ! new WIM in %g1 so we can get it + ! within the save: + save ! Slip into next window + mov %g1, %wim ! Install the new wim + ! (invalidates current window!) +#ifdef DELAYS_AFTER_WRWIM + nop + nop + nop +#endif + + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + restore ! Go back to trap window. + mov %l7, %g1 ! Restore %g1 + +1: ! now save away the regs we must preserve + sub %fp, 32 * 4, %sp + ! save a maximal context regardless: see also + ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + st %g1, [%sp + 17 * 4] ! save G registers + std %g2, [%sp + 18 * 4] + std %g4, [%sp + 20 * 4] + std %g6, [%sp + 22 * 4] + + ! no point whatsoever in saving O registers + + ! and save the CWP in %g0 save place + st %l0, [%sp + 16 * 4] + + sub %sp, 24 * 4, %sp ! fresh frame including + ! arg spill area for callees + + ! do not lock the scheduler + + ! HELP_GDB_WITH_BACKTRACE + mov %i7, %l5 ! preserve it JIC + mov %l1, %i7 ! bogus return link here + + ! and we must preserve the Y register (multiply/divide auxiliary) + ! over these calls; we will keep it in %l4 which is otherwise unused. + rd %y, %l4 + + ! Now we can reenable traps (preserving interrupt level) + or %l0, 0x0e0, %l7 ! set ET (+S,PS), preserve PIL + wr %l7, %psr ! and enable! +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + ! now call the XSR and so on with the appropriate args: + ! ie. + ! isr_retcode = (*(hal_interrupt_handlers[ vector ])) + ! ( vector, hal_interrupt_data[ vector ], stackp ); + + ! from hal_arch.h + !// ISR tables + !CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; + !CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; + !CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + + mov %l3, %o0 + sll %l3, 2, %l3 ! %l3 to a word offset + sethi %hi(hal_interrupt_data), %l7 + or %l7, %lo(hal_interrupt_data), %l7 + ld [ %l7 + %l3 ], %o1 ! data + add %sp, 24 * 4, %o2 ! stackpointer of saved regset + + sethi %hi(hal_interrupt_handlers), %l7 + or %l7, %lo(hal_interrupt_handlers), %l7 + ld [ %l7 + %l3 ], %l6 + call %l6 + nop + + ! do not call _interrupt_end() + + ! restore the Y register having done our callouts to C + wr %l4, %y + + ! We can reinstall the original CWP here; even if interrupt_end() + ! performed a reschedule (ie. yield/resume pair) we will be in the + ! same window. The window is preserved by reschedule precisely + ! because it is impossible atomically to disable traps here without + ! involving a CWP living in a register for a time when other + ! interrupts may occur. + + ! disable traps (using the saved psr is fastest way) + wr %l0, %psr ! restores flags, disables traps, same PIL. +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + ! HELP_GDB_WITH_BACKTRACE + mov %l5, %i7 ! restore (unused) return link + + ! and restore other saved regs + add %sp, 24 * 4, %sp ! undo fresh frame + ! restore a maximal context regardless: see also + ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + ldd [%sp + 0 * 4], %l0 ! restore L & I registers + ldd [%sp + 2 * 4], %l2 ! to support the handler + ldd [%sp + 4 * 4], %l4 ! having messed with them. + ldd [%sp + 6 * 4], %l6 + + ldd [%sp + 8 * 4], %i0 + ldd [%sp + 10 * 4], %i2 + ldd [%sp + 12 * 4], %i4 + ldd [%sp + 14 * 4], %i6 + + ld [%sp + 17 * 4], %g1 ! and G registers + ldd [%sp + 18 * 4], %g2 + ldd [%sp + 20 * 4], %g4 + ldd [%sp + 22 * 4], %g6 + ! no point whatsoever in loading back O registers. + + ! Now test for window underflow here and fix up if needs be. + ! + ! Why? interrupt_end() might have yielded us, when only + ! its own frame was restored; its own return to us caused a + ! window underflow trap, as would our return to interruptee + ! unless we deal with it now. + + add %l0, 1, %l7 ! interruptee~s CWP plus noise + and %l7, __WINBITS, %l7 ! CWP only + mov 1, %l6 + sll %l6, %l7, %l6 ! 1 << CWP + rd %wim, %l5 + cmp %l5, %l6 ! are they the same? + bne 2f ! No, so the stack is OK as is. + + ! now do by hand an underflow trap, effectively + sll %l5, 1, %l5 ! Rotate wim left + srl %l6, __WINSIZE-1, %l6 + wr %l5, %l6, %wim +#ifdef DELAYS_AFTER_WRWIM + nop ! are these delays needed? + nop ! (following restore uses wim) + nop +#endif + restore ! Interruptee~s window + ldd [%sp + 0 * 4], %l0 ! restore L & I registers + ldd [%sp + 2 * 4], %l2 + ldd [%sp + 4 * 4], %l4 + ldd [%sp + 6 * 4], %l6 + + ldd [%sp + 8 * 4], %i0 + ldd [%sp + 10 * 4], %i2 + ldd [%sp + 12 * 4], %i4 + ldd [%sp + 14 * 4], %i6 + save ! Back to trap window + +2: ! restore the condition codes, PSR and PIL and return from trap. + wr %l0, %psr ! restores flags, disables traps, and old PIL +#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW + nop + nop + nop +#endif + jmpl %l1, %g0 + rett %l2 + + +! end of vec_xvsr.S diff --git a/packages/hal/sparclite/arch/current/src/vectors.S b/packages/hal/sparclite/arch/current/src/vectors.S new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/src/vectors.S @@ -0,0 +1,383 @@ +/*============================================================================= +// +// vectors.S +// +// SPARClite vectors and bootup code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//###COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1998-12-15 +// Purpose: SPARClite vector code +// Description: This file contains the code which hangs off SPARClite vectors +// including reset; it handles register under/overflow as well +// as bootup, anything else is deferred to the default interrupt +// or exception vsrs respectively. See vec_[ix]vsr.S ... +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +!----------------------------------------------------------------------------- + + .file "vectors.S" + +!----------------------------------------------------------------------------- + +#include +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +!------------------------------------------------------------------------ + +#include + +#define DELAYS_AFTER_WRPSR_SAME_WINDOW +#define DELAYS_AFTER_WRWIM + +!------------------------------------------------------------------------ +! The start of the code; this is the entry point: + + .section ".vectors","ax" + + .global rom_vectors +rom_vectors: + .global reset_vector +reset_vector: + ! this code goes to the real reset handler, it will be + ! overwritten by the start of vectoring handler... + b genuine_reset + nop + ! usually drop through to: +real_vector: + ! here,locals have been set up as follows: + ! %l0 = psr + ! %l1 = pc + ! %l2 = npc + ! %l3 = tbr + and %l3, TT_IS_INTR_MASK, %l4 + cmp %l4, TT_IS_INTR_VALUE + bne not_an_interrupt ! delay slot does not matter + ! here be the pre-vector interrupt handler +interrupt: + and %l3, 0x0f0, %l4 ! get an interrupt number out + srl %l4, 2, %l5 ! to a word address offset + sethi %hi(hal_vsr_table), %l6 + or %l6, %lo(hal_vsr_table), %l6 + ld [ %l6 + %l5 ], %l6 ! get vector in %l6 + jmp %l6 ! and go there + srl %l4, 4, %l3 ! vector number into %l3: so that + ! interrupts and exceptions/traps + ! have the same API to VSRs + +not_an_interrupt: + and %l3, TT_MASK, %l4 + cmp %l4, (TRAP_WUNDER << TT_SHL) + + bne,a not_window_underflow + cmp %l4, (TRAP_WOVER << TT_SHL) ! (if taken) + + ! here be the window underflow handler: +window_underflow: + ! CWP is trap handler + ! CWP + 1 is trapped RESTORE instruction + ! CWP + 2 is invalid context which must be restored + ! CWP + 3 is next invalid context + + wr %l0, %psr ! restore the condition flags + ! (CWP is unchanged) + ! the following instructions delay enough; no need for NOPs + rd %wim, %l0 ! get the wim + sll %l0, 1, %l3 ! Rotate wim left + srl %l0, __WINSIZE-1, %l0 + wr %l0, %l3, %wim ! Install the new wim + +#ifdef DELAYS_AFTER_WRWIM + nop ! are these delays needed? + nop ! (following restore uses wim) + nop +#endif + restore ! Users window + restore ! Her callers window (now valid) + + ldd [%sp + 0 * 4], %l0 ! restore L & I registers + ldd [%sp + 2 * 4], %l2 + ldd [%sp + 4 * 4], %l4 + ldd [%sp + 6 * 4], %l6 + + ldd [%sp + 8 * 4], %i0 + ldd [%sp + 10 * 4], %i2 + ldd [%sp + 12 * 4], %i4 + ldd [%sp + 14 * 4], %i6 + + save ! Back to trap window + save + + jmp %l1 + rett %l2 + +not_window_underflow: + bne,a not_window_overflow + srl %l4, 4, %l4 ! (if taken) + + ! here be the window overflow handler: +window_overflow: + ! CWP + 1 is caller whose SAVE bounced + ! CWP is trap handler = invalid window + ! CWP - 1 is next invalid window which needs to be saved + + wr %l0, %psr ! restore the condition flags + ! (CWP is unchanged) + ! the following instructions delay enough; no need for NOPs + rd %wim, %l0 + mov %g1, %l3 ! Save g1, we use it to hold the wim + srl %l0, 1, %g1 ! Rotate wim right + sll %l0, __WINSIZE-1, %l0 + or %l0, %g1, %g1 + + save ! Slip into next window + mov %g1, %wim ! Install the new wim + ! (invalidates current window!) + + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + restore ! Go back to trap window. + mov %l3, %g1 ! Restore %g1 + + jmpl %l1, %g0 + rett %l2 + +not_window_overflow: + ! from here on in, %l4 is the trap number in clear + cmp %l4, 128 + bge 1f + mov 0, %l5 ! offset 0 for user traps + + cmp %l4, 36 ! coprocessor special case + beq 1f + mov 4, %l5 ! ...treated as FP, code 4 + + cmp %l4, 10 + bge 1f + mov 10, %l5 ! offset 10 for "others" + + ! if we are here, the trap number is 1-9 inclusive + ! so put it in %l5 and drop through... + mov %l4, %l5 +1: + or %l5, 16, %l5 ! offset into table is 16... for traps. + sll %l5, 2, %l5 ! to a word address offset + sethi %hi(hal_vsr_table), %l6 + or %l6, %lo(hal_vsr_table), %l6 + ld [ %l6 + %l5 ], %l6 ! get vector in %l6 + jmp %l6 ! and go there + or %l4, 16, %l3 ! vector number into %l3: so that + ! interrupts and exceptions/traps + ! have the same API to VSRs + ! and that is the end of the pre-vector trap handler + + .global rom_vectors_end +rom_vectors_end: + + ! these instructions are copied into the reset vector + ! after startup to _not_ branch to the genuine_reset code below +real_vector_instructions: + rd %tbr, %l3 + rd %psr, %l0 + + + + ! genuine reset code called from time zero: +genuine_reset: ! set psr, mask interrupts & traps + wr %g0, 0xfc0 + __WIN_INIT, %psr + nop ! mode = prevMode = S, CWP=7 + nop + nop + wr %g0, 0, %wim ! No invalid windows (yet) + nop + nop + nop + + sethi %hi(reset_vector), %g1 + andn %g1, 0xfff, %g1 ! should not be needed + wr %g1, %tbr ! Traps are at reset_vector + nop + nop + nop + wr %g0, 1, %asr17 ! Single vector trapping + nop + nop + nop + +// INCLUDE PLATFORM BOOT + +// This should set up RAM and caches, and calm down any external interrupt +// sources. Also copy two instructions from real_vector_instructions +// into reset_vector, then invalidate the instruction cache. + +#include + +// halboot.si returns with %sp all set, in sleb versions. + + led 0x80 + + ! now set up a stack and initial frame linkage + ! so as to be able to make C function calls: + ! current window is 7, the highest, so we store a + ! saved frame thingy that refers to itself in the stack, + ! then another which is valid and drop into main from there. + +#ifdef CYG_HAL_SPARCLITE_SIM + sethi %hi(cyg_bootup_stack), %i6 + or %i6, %lo(cyg_bootup_stack), %i6 +#endif + andn %i6, 7, %i6 ! round fp down to double alignment + mov 0, %i7 ! null return address + sethi %hi(0xb51ac000), %i0 ! "BStac" pattern + or %i0, 24, %i0 + or %i0, 1, %i1 + or %i0, 2, %i2 + or %i0, 3, %i3 + or %i0, 4, %i4 + or %i0, 5, %i5 + + sethi %hi(0xb51ac000), %l0 ! "BStac" pattern + or %l0, 16, %l0 + or %l0, 1, %l1 + or %l0, 2, %l2 + or %l0, 3, %l3 + or %l0, 4, %l4 + or %l0, 5, %l5 + or %l0, 6, %l6 + or %l0, 7, %l7 + + sub %fp, 16 * 4, %sp ! Stack pointer + + led 0x90 + + std %l0, [%sp + 0 * 4] ! save L & I registers + std %l2, [%sp + 2 * 4] ! into new stack frame + std %l4, [%sp + 4 * 4] + std %l6, [%sp + 6 * 4] + + led 0x91 + + std %i0, [%sp + 8 * 4] + std %i2, [%sp + 10 * 4] + std %i4, [%sp + 12 * 4] + std %i6, [%sp + 14 * 4] + + led 0x92 + + sethi %hi(0xb0010000), %o0 ! "Boot" pattern + or %o0, 8, %o0 + or %o0, 1, %o1 + or %o0, 2, %o2 + or %o0, 3, %o3 + or %o0, 4, %o4 + or %o0, 5, %o5 + + led 0x98 + + wr %g0, __WIM_INIT, %wim ! Window 7 (current) is invalid + nop + nop + nop + + led 0x99 + + sethi %hi(0xb0010000), %g1 ! "Boot" pattern + or %g1, 2, %g2 + or %g1, 3, %g3 + or %g1, 4, %g4 + or %g1, 5, %g5 + or %g1, 6, %g6 + or %g1, 7, %g7 + or %g1, 1, %g1 + + led 0xa0 + + wr %g0, 0xfe0 + __WIN_INIT, %psr + nop ! Enable traps: + nop ! set psr, _do_ mask interrupts + nop ! mode = prevMode = S, CWP=7 + + led 0xb0 + + ! now we can start calling out and running C code! + .extern cyg_hal_start + call cyg_hal_start ! puts return address in %o7 + or %g1, 1, %g1 + +loop_forever: + ta 1 + b loop_forever ! if it returns + nop + + +!--------------------------------------------------------------------------- +! hal_vsr_table... + + .section ".data" + .balign 4 + .global hal_vsr_table +hal_vsr_table: + .rept 16 + .word hal_default_interrupt_vsr + .endr + .rept 11 + .word hal_default_exception_vsr + .endr + +!--------------------------------------------------------------------------- +! Bootup stack (only needed explicitly in sim) + +#ifdef CYG_HAL_SPARCLITE_SIM + .section ".bss" + + .balign 16 +cyg_bootup_stack_base: + .rept 4064 + .byte 0 + .endr + .balign 16 +cyg_bootup_stack: + .long 0,0,0,0,0,0,0,0 +#endif + +! end of vectors.S diff --git a/packages/hal/sparclite/arch/current/tests/PKGconf.mak b/packages/hal/sparclite/arch/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/tests/PKGconf.mak @@ -0,0 +1,40 @@ +#=============================================================================== +# +# makefile +# +# hal/sparclite/arch/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + + +PACKAGE := hal_sparclite +include ../../../../../pkgconf/pkgconf.mak + +TESTS := sparc_ex + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + + diff --git a/packages/hal/sparclite/arch/current/tests/sparc_ex.c b/packages/hal/sparclite/arch/current/tests/sparc_ex.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/arch/current/tests/sparc_ex.c @@ -0,0 +1,426 @@ +/*================================================================= +// +// sparc_ex.c +// +// SPARClite HAL exception and register manipulation test +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dsm +// Contributors: dsm, nickg +// Date: 1998-06-18 +//####DESCRIPTIONEND#### +*/ + +#include + +#include + +#include + +#include + +#include +#include + +#include + +#ifdef CYGDBG_USE_TRACING +#define OUTER_REPEATS 1 +#define SIM_REPEATS 10 +#define HW_REPEATS 1000 +#else +#define OUTER_REPEATS 10 +#define SIM_REPEATS 100 +#define HW_REPEATS 10000 +#endif // using tracing to slow everything down + +// ------------------------------------------------------------------------- +// These routines are used to cause an alignment trap; the compiler is too +// darned clever by half, if you try to inline this stuff as macros it uses +// different instruction sequences and register pairs. This makes for a +// less thorough test, but there's no option other than writing a LOT of +// assembler code. + +// Further, with -O3, the compiler inlines these anyway and so makes +// non-trapping code. So they are now at the end, to prevent this. + +extern cyg_uint64 get_ll( cyg_uint64 *p ); + +extern cyg_uint64 get_llplus( cyg_uint64 *p ); + +extern cyg_uint32 get_i( cyg_uint32 *p ); + +extern cyg_uint32 get_iplus( cyg_uint32 *p ); + +extern cyg_uint16 get_s( cyg_uint16 *p ); + +extern cyg_uint16 get_splus( cyg_uint16 *p ); + +// ------------------------------------------------------------------------- +// Some memory to read in more-or-less aligned manners. + +#define L1 (0x123456789abcdef0l) +#define L2 (0xfedcba9876543210l) +static cyg_uint64 a[ 2 ] = { + L1, + L2 +}; + +#define M32 (0x00000000ffffffffl) +#define M16 (0x000000000000ffffl) +#define M8 (0x00000000000000ffl) + +volatile cyg_uint32 trap = 0; +volatile cyg_uint32 same = 0; +volatile cyg_uint32 tcount = 0; + +// ------------------------------------------------------------------------- +// This macro invokes a routine then checks that a suitable trap occurred. +// It expects the instruction simply to be skipped, rather than the trap +// _handled_ or the unaligned access to be _emulated_ in any way. This +// test is just a proof that we could write such a handler. + +#define TRAPPROC( _var_, _type_, _align_, _proc_ ) \ +CYG_MACRO_START \ + otrap = trap; \ + otcount = tcount; \ + _var_ = _proc_( (_type_ *)(cp + (_align_)) ); \ + CYG_TEST_CHECK( trap != otrap || same > 0, \ + "No trap [" #_type_ ":" #_align_ "," #_proc_ "]" ); \ + CYG_TEST_CHECK( same < 20, \ + "Undetected trap loop[" #_type_ ":" #_align_ "," #_proc_ "]" ); \ + CYG_TEST_CHECK( tcount > otcount, \ + "No trap counted [" #_type_ ":" #_align_ "," #_proc_ "]" ); \ + CYG_TEST_CHECK( (tcount - 1) <= otcount, \ + "Tcount overinc [" #_type_ ":" #_align_ "," #_proc_ "]" ); \ +CYG_MACRO_END + +// and this one expects no trap to occur: +#define SAFEPROC( _var_, _type_, _align_, _proc_ ) \ +CYG_MACRO_START \ + trap = 0; \ + otcount = tcount; \ + _var_ = _proc_( (_type_ *)(cp + (_align_)) ); \ + CYG_TEST_CHECK( 0 == trap, \ + "Trap [" #_type_ ":" #_align_ "," #_proc_ "]" ); \ + CYG_TEST_CHECK( tcount == otcount, \ + "Trap counted [" #_type_ ":" #_align_ "," #_proc_ "]" ); \ +CYG_MACRO_END + +static void do_test( void ) +{ + cyg_uint32 *ip = (cyg_uint32 *)a; + cyg_uint16 *sp = (cyg_uint16 *)a; + cyg_uint8 *cp = (cyg_uint8 *)a; + + cyg_uint64 l; + cyg_uint32 i; + cyg_uint16 s; + cyg_uint8 c; + + cyg_int32 z, repeats; + + cyg_uint32 otrap; + cyg_uint32 otcount; + + otrap = trap = 0; + otcount = tcount; + + // First test interestingly aligned accesses that are legal. + + l = a[0]; CYG_TEST_CHECK( L1 == l, "a[0] read bad" ); + l = a[1]; CYG_TEST_CHECK( L2 == l, "a[1] read bad" ); + + i = ip[0]; CYG_TEST_CHECK( ((L1 >> 32) & M32) == i, "ip[0]" ); + i = ip[1]; CYG_TEST_CHECK( ((L1 ) & M32) == i, "ip[1]" ); + i = ip[2]; CYG_TEST_CHECK( ((L2 >> 32) & M32) == i, "ip[2]" ); + i = ip[3]; CYG_TEST_CHECK( ((L2 ) & M32) == i, "ip[3]" ); + + s = sp[0]; CYG_TEST_CHECK( ((L1 >> 48) & M16) == s, "sp[0]" ); + s = sp[1]; CYG_TEST_CHECK( ((L1 >> 32) & M16) == s, "sp[1]" ); + s = sp[2]; CYG_TEST_CHECK( ((L1 >> 16) & M16) == s, "sp[2]" ); + s = sp[3]; CYG_TEST_CHECK( ((L1 ) & M16) == s, "sp[3]" ); + s = sp[4]; CYG_TEST_CHECK( ((L2 >> 48) & M16) == s, "sp[4]" ); + s = sp[5]; CYG_TEST_CHECK( ((L2 >> 32) & M16) == s, "sp[5]" ); + s = sp[6]; CYG_TEST_CHECK( ((L2 >> 16) & M16) == s, "sp[6]" ); + s = sp[7]; CYG_TEST_CHECK( ((L2 ) & M16) == s, "sp[7]" ); + + c = cp[0]; CYG_TEST_CHECK( ((L1 >> 56) & M8) == c, "cp[0]" ); + c = cp[1]; CYG_TEST_CHECK( ((L1 >> 48) & M8) == c, "cp[1]" ); + c = cp[2]; CYG_TEST_CHECK( ((L1 >> 40) & M8) == c, "cp[2]" ); + c = cp[3]; CYG_TEST_CHECK( ((L1 >> 32) & M8) == c, "cp[3]" ); + c = cp[4]; CYG_TEST_CHECK( ((L1 >> 24) & M8) == c, "cp[4]" ); + c = cp[5]; CYG_TEST_CHECK( ((L1 >> 16) & M8) == c, "cp[5]" ); + c = cp[6]; CYG_TEST_CHECK( ((L1 >> 8) & M8) == c, "cp[6]" ); + c = cp[7]; CYG_TEST_CHECK( ((L1 ) & M8) == c, "cp[7]" ); + c = cp[8]; CYG_TEST_CHECK( ((L2 >> 56) & M8) == c, "cp[8]" ); + c = cp[9]; CYG_TEST_CHECK( ((L2 >> 48) & M8) == c, "cp[9]" ); + c = cp[10]; CYG_TEST_CHECK( ((L2 >> 40) & M8) == c, "cp[10]" ); + c = cp[11]; CYG_TEST_CHECK( ((L2 >> 32) & M8) == c, "cp[11]" ); + c = cp[12]; CYG_TEST_CHECK( ((L2 >> 24) & M8) == c, "cp[12]" ); + c = cp[13]; CYG_TEST_CHECK( ((L2 >> 16) & M8) == c, "cp[13]" ); + c = cp[14]; CYG_TEST_CHECK( ((L2 >> 8) & M8) == c, "cp[14]" ); + c = cp[15]; CYG_TEST_CHECK( ((L2 ) & M8) == c, "cp[15]" ); + + CYG_TEST_CHECK( 0 == trap, "Traps occurred (legal accesses)" ); + CYG_TEST_CHECK( tcount == otcount, "Traps counted (legal accesses)" ); + + CYG_TEST_PASS( "Aligned accesses OK" ); + + for ( z = OUTER_REPEATS; z > 0; z-- ) { + + for ( repeats = (cyg_test_is_simulator ? SIM_REPEATS : HW_REPEATS) ; + repeats > 0 ; repeats-- ) { + + TRAPPROC( l, cyg_uint64, 4, get_llplus ); + TRAPPROC( l, cyg_uint64, 5, get_llplus ); + TRAPPROC( l, cyg_uint64, 6, get_llplus ); + TRAPPROC( l, cyg_uint64, 7, get_llplus ); + + TRAPPROC( l, cyg_uint64, 4, get_ll ); + TRAPPROC( l, cyg_uint64, 1, get_ll ); + TRAPPROC( l, cyg_uint64, 2, get_ll ); + TRAPPROC( l, cyg_uint64, 3, get_ll ); + + TRAPPROC( i, cyg_uint32, 1, get_iplus ); + TRAPPROC( i, cyg_uint32, 2, get_iplus ); + TRAPPROC( i, cyg_uint32, 3, get_iplus ); + + TRAPPROC( i, cyg_uint32, 5, get_i ); + TRAPPROC( i, cyg_uint32, 6, get_i ); + TRAPPROC( i, cyg_uint32, 7, get_i ); + + TRAPPROC( s, cyg_uint16, 1, get_splus ); + TRAPPROC( s, cyg_uint16, 3, get_splus ); + + TRAPPROC( s, cyg_uint16, 5, get_s ); + TRAPPROC( s, cyg_uint16, 7, get_s ); + } + + CYG_TEST_PASS( "Unaligned accesses OK" ); + + // Now test some legal and illegal accesses intermingled. + + for ( repeats = (cyg_test_is_simulator ? SIM_REPEATS : HW_REPEATS) ; + repeats > 0 ; repeats-- ) { + + SAFEPROC( l, cyg_uint64, 0, get_llplus ); + TRAPPROC( l, cyg_uint64, 5, get_llplus ); + TRAPPROC( l, cyg_uint64, 6, get_llplus ); + SAFEPROC( l, cyg_uint64, 8, get_llplus ); + + TRAPPROC( i, cyg_uint32, 1, get_iplus ); + SAFEPROC( i, cyg_uint32, 4, get_iplus ); + TRAPPROC( i, cyg_uint32, 2, get_iplus ); + SAFEPROC( i, cyg_uint32, 8, get_iplus ); + SAFEPROC( i, cyg_uint32, 12, get_iplus ); + SAFEPROC( i, cyg_uint32, 16, get_iplus ); + TRAPPROC( i, cyg_uint32, 3, get_iplus ); + + TRAPPROC( s, cyg_uint16, 5, get_s ); + SAFEPROC( s, cyg_uint16, 6, get_s ); + TRAPPROC( s, cyg_uint16, 7, get_s ); + SAFEPROC( s, cyg_uint16, 8, get_s ); + + TRAPPROC( i, cyg_uint32, 5, get_i ); + SAFEPROC( i, cyg_uint32, 4, get_i ); + TRAPPROC( i, cyg_uint32, 6, get_i ); + TRAPPROC( i, cyg_uint32, 7, get_i ); + SAFEPROC( i, cyg_uint32, 0, get_i ); + + TRAPPROC( l, cyg_uint64, 4, get_ll ); + SAFEPROC( l, cyg_uint64, 0, get_ll ); + TRAPPROC( l, cyg_uint64, 1, get_ll ); + SAFEPROC( l, cyg_uint64, 8, get_ll ); + + TRAPPROC( s, cyg_uint16, 1, get_splus ); + SAFEPROC( s, cyg_uint16, 2, get_splus ); + TRAPPROC( s, cyg_uint16, 3, get_splus ); + SAFEPROC( s, cyg_uint16, 4, get_splus ); + } + + CYG_TEST_PASS( "Mixture of accesses OK" ); + } +} + +// ------------------------------------------------------------------------- + +externC void +skip_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer); + +externC void +fail_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer); + +// ------------------------------------------------------------------------- + +void sparc_ex_main( void ) +{ + int i; + + CYG_TEST_INIT(); + + for ( i = CYGNUM_HAL_EXCEPTION_MIN; i <= CYGNUM_HAL_EXCEPTION_MAX; i++ ){ + int j; + HAL_TRANSLATE_VECTOR( i, j ); + HAL_INTERRUPT_ATTACH( j, &fail_exception_handler, j, 0 ); + // we must also ensure that eCos handles the exception; + // do not drop into CygMon or equivalent. + // Leave USER_TRAP undisturbed so that breakpoints work. + if ( CYGNUM_HAL_VECTOR_USER_TRAP != i ) { + extern void hal_default_exception_vsr( void ); + HAL_VSR_SET( i, (CYG_ADDRESS)hal_default_exception_vsr, NULL ); + } + } + + HAL_TRANSLATE_VECTOR( CYGNUM_HAL_VECTOR_UNALIGNED, i ); + HAL_INTERRUPT_DETACH( i, &fail_exception_handler ); + HAL_INTERRUPT_ATTACH( i, &skip_exception_handler, i, 0 ); + + CYG_TEST_INFO( "Vectors attached OK; calling do_test" ); + + do_test(); + + CYG_TEST_EXIT( "Done" ); +} + +// ------------------------------------------------------------------------- +externC void +skip_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer) +{ + HAL_SavedRegisters *save; + HAL_FrameStructure *frame; + + HAL_FLUSH_REGISTERS_TO_STACK(); + + save = (HAL_SavedRegisters *) stackpointer; + frame = (HAL_FrameStructure *) (save + 1); // immediately after + + // now, this is the invokation environment when this saved regset + // was created (copied from hal_xvsr.S): + // ! here,locals have been set up as follows: + // ! %l0 = psr (with this CWP/window-level in it) + // ! %l1 = pc + // ! %l2 = npc + // ! %l3 = vector number (16-25 for traps) + // ! and we are in our own register window, though it is likely that + // ! the next one will need to be saved before we can use it: + // ! ie. this one is the invalid register window. + // and the intention is that we can mess therewith: + + // Check we're not in a trap loop + if ( trap == save->li.l[1] ) { + same++; + if ( 10 < same ) + CYG_TEST_FAIL_EXIT( "Repeated trap" ); + } + else // restart the count + same = 0; + + // and record it + trap = save->li.l[1]; + tcount++; + + // now step on so that we return to the instruction after: + save->li.l[1] = save->li.l[2]; // PC := NPC + save->li.l[2] += 4; // NPC += 4 + + // that's all. +} + +externC void +fail_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data, + CYG_ADDRWORD stackpointer) +{ + HAL_FLUSH_REGISTERS_TO_STACK(); + CYG_TEST_FAIL_EXIT( "Other exception handler called" ); +} + +// ------------------------------------------------------------------------- + +externC void +#ifdef CYGPKG_KERNEL +cyg_user_start( void ) +#else +cyg_start( void ) +#endif +{ + sparc_ex_main(); +} + +// ------------------------------------------------------------------------- + +cyg_uint64 get_ll( cyg_uint64 *p ) +{ + return *p; +} + +cyg_uint64 get_llplus( cyg_uint64 *p ) +{ + cyg_uint64 ll = 0l, v; + ll = (cyg_uint32)p; + ll++; + v = *p; + v^= ll; + return v; +} + +cyg_uint32 get_i( cyg_uint32 *p ) +{ + return *p; +} + +cyg_uint32 get_iplus( cyg_uint32 *p ) +{ + cyg_uint32 i = 0, v; + i = (cyg_uint32)p; + i++; + v = *p; + v^= i; + return v; +} + +cyg_uint16 get_s( cyg_uint16 *p ) +{ + return *p; +} + +cyg_uint16 get_splus( cyg_uint16 *p ) +{ + cyg_uint16 s = 0, v; + s = (cyg_uint16)(0xffff & (cyg_uint32)p); + s++; + v = *p; + v^= s; + return v; +} + +// ------------------------------------------------------------------------- + +/* EOF sparc_ex.c */ diff --git a/packages/hal/sparclite/sim/current/ChangeLog b/packages/hal/sparclite/sim/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/ChangeLog @@ -0,0 +1,238 @@ +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-04-07 Hugo Tyson + + * src/hal_priv.c: Remove bogus FIX ME; it wasn't true. + +1999-03-16 Hugo Tyson + + * include/halboot.si: Add a dummy LED macro for debug in the + vectors.S; correct a scary line length. + +1999-03-04 Gary Thomas + + * include/pkgconf/hal_sparclite_sim.h: Take out DEVICES dependencies. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-25 Hugo Tyson + + These log entries from 1999-02-22 to 1999-02-24 were executed in + a branch; this change is a merge of that branch into the trunk. + + (1999-02-23 John Dallaway ) + + * include/pkgconf/hal_sparclite_sim.h: New rules + CYGPKG_HAL_SPARCLITE_SIM precludes CYGPKG_DEVICES_GDB + CYGPKG_HAL_SPARCLITE_SIM precludes CYGPKG_DEVICES_SERIAL_RS232_COMMON + + (1999-02-22 Hugo Tyson ) + + * src/hal_priv.c (hal_board_prestart, hal_board_poststart): + Shut down the erc32 watchdog in and enable interrupts in these two + new routines. + + * include/halboot.si: + Remove N/A code that I was just storing here, and install the real + vector instructions in this fragment; there be cache-wangling to + do in hardware cases either side of the vector installation. + +1999-02-20 Jonathan Larmour + + * include/hal_xpic.h: + Rename CYG_VECTOR_* -> CYGNUM_HAL_INTERRUPT_* + + * src/hal_priv.c: + Add a FIX ME + +1999-02-08 John Dallaway + + * src/sim.ld: Remove platform-specific linker script for + MLT compliance. + + * src/PKGconf.mak: Remove build rules for sim.ld. + + * include/pkgconf/ram.*: Add MLT save file and and linker + script fragment for RAM startup. + +1999-02-01 Hugo Tyson + + * include/halboot.si: + New file: performs platform-oriented setup of RAM and cache + controllers, and quietens any interrupt sources. + + * include/pkgconf/hal_sparclite_sim.h: + Correct comments/CDL description of sim invocation. + +1999-01-28 Hugo Tyson + + * include/hal_cache.h: NEW FILE to this directory; moved here from + the sparclite/arch tree; cache control is very much board-specific + + * include/hal_clock.h: NEW FILE to this directory; it was a part + of hal_intr.h, but is now here because the clock is target determined. + + * include/hal_xpic.h: NEW FILE to this directory; it was a part of + hal_intr.h, but is now here because the detail of interrupot + control is target determined. + + * src/hal_priv.c: NEW FILE to this directory; it was a part + of hal_intr.h, but is now here because the clock is target + determined, and it's the clock that needs a local variable. + + * src/PKGconf.mak (COMPILE): compile it. + + +1999-01-26 Hugo Tyson + + * src/sim.ld: + Add copyright notice. (Though these files will later be generated + by a tool and so not copyright, these default setups are.) + +1999-01-22 Hugo Tyson + + * src/sim.ld: + Remove some bogus comments. + +1999-01-21 Jonathan Larmour + + * src/sim.ld: + Remove all traces of non-CYG_KERNEL_USE_INIT_PRIORITY code + +1999-01-21 Hugo Tyson + + * src/sim.ld: + Align bss and rom/ram_data starts and ends by 8 bytes to permit + fast copy routines. + +1999-01-19 Hugo Tyson + + Modified files in arch: + * include/hal_arch.h + * include/hal_intr.h + * src/PKGconf.mak + * src/context.S + * src/hal_intr.c + * src/vec_ivsr.S + * src/vec_xvsr.S + * src/vectors.S + + New files in arch: + * src/hal_boot.c (bss initialization, constructors &c) + * include/hal_cache.h (empty but required header) + + Modified files in sim: + * include/hal_diag.h + + Lots more progress; essentially, everything now works. + + Simulator's treatment of stdio is poor though, it doesn't work + under pkgtest. This has been slowing me up. + +1999-01-14 Hugo Tyson + + * ecc/ecc/hal/sparclite/...: + + Initial checkin of SPARClite HAL; it doesn't work yet, except the + most trivial of tests - timer and interrupt manipulation stuff is + entirely absent. + + Here's some documentation of the initial checkin tree; this will + change, as platform dependent stuff moves correctly into the sim + or directories. + + arch/current/include: + basetype.h nothing much here. + vectors.h definitions of symbols shared between the + various vector code assembler files, can be + included in both C and assembler. + hal_intr.h various macros for clock and interrupt + control plus the eCos vector numbering scheme; we + map thus: + what SPARC trap type eCos vector numbers + ----------------------------------------------- + (not used) --- 0 + interrupts (17-31) 1-15 + user traps (128-255) 16 + exceptions (1-9,36==4) 17-25 + others (10,?) 26 + ----------------------------------------------- + Trap types 5 and 6 which would be eCos vectors 21 + and 22 are handled in the trampoline code in + file src/vectors.S + hal_arch.h definition of a thread context, plus + macros for thread switching and the like. Some + ancillary bit twiddling macros and cache barriers + too. + + arch/current/include/pkgconf: + hal_sparclite.h pkgconf config/header file. + + arch/current/src: + vectors.S boot-up stuff, trampoline code that hangs + on the interrupt/trap vector, handlers for window + under/overflow. Saves some state in registers + then jumps to the interrupt or exception VSR + respectively. + Also instantiates the VSR table. + vec_ivsr.S the default interrupt VSR; it establishes + a C calling environment (ie. anticipates a window + overflow) then locks the scheduler, calls the ISR + with appropriate arguments, and then interrupt_end() + before undoing that environment, anticipating + window underflow and returning to the interrupted + instruction. + vec_xvsr.S the default exception AKA trap VSR; does + the same as the interrupt one but without the + scheduler lock or interrupt end. + hal_intr.c instantiates the ISR table used by the + code above. + context.S context switch code, saves and loads up a + whole register state, coroutine or longjump-like. + icontext.c initializes a context to "jump" to in + context.S at the birth of a new thread. + + sim/current/include: + hal_diag.h macros to deal with debugging output via a + fake serial device of some kind; initially empty, + but definitely board/sim dependent. + + sim/current/include/pkgconf: + hal_sparclite_sim.h pkgconf config/header file. + + sim/current/src: + sim.ld linker script bits for "sim" target. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +//EOF ChangeLog diff --git a/packages/hal/sparclite/sim/current/include/hal_cache.h b/packages/hal/sparclite/sim/current/include/hal_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/hal_cache.h @@ -0,0 +1,171 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL Cache control support (such as it is in the simulator) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// the caches. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include + +//----------------------------------------------------------------------------- +// SPARClite cache macros + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 0x800 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 4 // Size of a data cache line +#define HAL_DCACHE_WAYS 4 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 0x800 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 4 // Size of a cache line +#define HAL_ICACHE_WAYS 4 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() +// Disable the data cache +#define HAL_DCACHE_DISABLE() +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache - use Data cache controls since they +// are not separatable. + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() HAL_DCACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() HAL_DCACHE_SYNC(); HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/packages/hal/sparclite/sim/current/include/hal_clock.h b/packages/hal/sparclite/sim/current/include/hal_clock.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/hal_clock.h @@ -0,0 +1,123 @@ +#ifndef CYGONCE_HAL_CLOCK_H +#define CYGONCE_HAL_CLOCK_H + +//============================================================================= +// +// hal_clock.h +// +// HAL clock support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define clock support +// Description: The macros defined here provide the HAL APIs for handling +// the clock. +// +// Usage: +// #include // which includes this file +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// Clock control + +// in erc32 simulator: +// 4 = UART A +// 5 = UART B +// 7 = UART error +// 12 = GPT (general purpose timer) +// 13 = RTC (realtime clock) +// 15 = watchdog + +// in erc32 simulator: + +// The vector used by the Real time clock is defined in hal_xpic.h + +// We could place conditional code here to choose one clock or the other +// depending on the selected interrupt vector... but pro tem: (pun intended) + +#define SPARC_MEC_RTC_CLOCK_SCALE (5) + +/* These must be accessed word-wide to work! */ + +#define SPARC_MEC_RTC (0x01f80080) + +#define SPARC_MEC_RTC_COUNTER (SPARC_MEC_RTC + 0) +#define SPARC_MEC_RTC_SCALER (SPARC_MEC_RTC + 4) + +#define SPARC_MEC_GPT_COUNTER (SPARC_MEC_RTC + 8) +#define SPARC_MEC_GPT_SCALER (SPARC_MEC_RTC + 0x0c) + +/* MEC timer control register bits */ +#define SPARC_MEC_TCR_GACR 1 /* Continuous Running */ +#define SPARC_MEC_TCR_GACL 2 /* Counter Load */ +#define SPARC_MEC_TCR_GASE 4 /* System Enable */ +#define SPARC_MEC_TCR_GASL 8 /* not used */ +#define SPARC_MEC_TCR_TCRCR 0x100 /* Continuous Running */ +#define SPARC_MEC_TCR_TCRCL 0x200 /* Counter Load */ +#define SPARC_MEC_TCR_TCRSE 0x400 /* System Enable */ +#define SPARC_MEC_TCR_TCRSL 0x800 /* not used */ + +#define SPARC_MEC_RTC_CONTROL (SPARC_MEC_RTC + 0x18) + +externC cyg_int32 cyg_hal_sparclite_clock_period; + +#define HAL_CLOCK_INITIALIZE( _period_ ) CYG_MACRO_START \ + HAL_WRITE_UINT32( SPARC_MEC_RTC_SCALER, SPARC_MEC_RTC_CLOCK_SCALE );\ + cyg_hal_sparclite_clock_period = (_period_); \ + HAL_WRITE_UINT32( SPARC_MEC_RTC_COUNTER, (_period_) ); \ + HAL_WRITE_UINT32( SPARC_MEC_RTC_CONTROL, \ + (SPARC_MEC_TCR_TCRCR | \ + SPARC_MEC_TCR_TCRCL | \ + SPARC_MEC_TCR_TCRSE) ); \ +CYG_MACRO_END + +#define HAL_CLOCK_RESET( _vector_, _period_ ) /* nowt, it is freerunning */ + +#define HAL_CLOCK_READ( _pvalue_ ) CYG_MACRO_START \ + cyg_uint32 _read_; \ + HAL_READ_UINT32( SPARC_MEC_RTC_COUNTER, _read_ ); \ + *((cyg_uint32 *)(_pvalue_)) = \ + (cyg_hal_sparclite_clock_period - _read_ ); \ +CYG_MACRO_END + + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( _pvalue_ ) +#endif + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CLOCK_H +// End of hal_clock.h diff --git a/packages/hal/sparclite/sim/current/include/hal_diag.h b/packages/hal/sparclite/sim/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/hal_diag.h @@ -0,0 +1,125 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-01-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include + +/*---------------------------------------------------------------------------*/ + +#define CYG_DIAG_USE_ERC32 + +/*---------------------------------------------------------------------------*/ + +#ifdef CYG_DIAG_USE_ERC32 + +/*---------------------------------------------------------------------------*/ +/* Register addresses */ + +#define SPARC_MEC_UART (0x01f800e0) + +/* These must be accessed word-wide to work! */ +#define SPARC_MEC_UART_IO( x ) ((cyg_uint32)(x)) + +#define SPARC_MEC_UART_A_RX ((volatile cyg_uint32 *)(SPARC_MEC_UART + 0)) +#define SPARC_MEC_UART_A_TX ((volatile cyg_uint32 *)(SPARC_MEC_UART + 0)) +#define SPARC_MEC_UART_B_RX ((volatile cyg_uint32 *)(SPARC_MEC_UART + 4)) +#define SPARC_MEC_UART_B_TX ((volatile cyg_uint32 *)(SPARC_MEC_UART + 4)) +#define SPARC_MEC_UART_STATUS ((volatile cyg_uint32 *)(SPARC_MEC_UART + 8)) +#define SPARC_MEC_UART_RXAMASK (0x00006) +#define SPARC_MEC_UART_RXBMASK (0x60000) +#define SPARC_MEC_UART_TXAMASK (0x00001) +#define SPARC_MEC_UART_TXBMASK (0x10000) + + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() + +#define HAL_DIAG_WRITE_CHAR(_c_) \ +{ \ + if( 1 || _c_ != '\r' ) \ + { \ + while( (SPARC_MEC_UART_RXAMASK & *SPARC_MEC_UART_STATUS) == 0 ) \ + continue; \ + *SPARC_MEC_UART_A_TX = SPARC_MEC_UART_IO(_c_); \ + } \ +} + +#define HAL_DIAG_READ_CHAR(_c_) \ +{ \ + while( (SPARC_MEC_UART_TXAMASK & *SPARC_MEC_UART_STATUS) == 0 ) \ + continue; \ + _c_ = (char)*SPARC_MEC_UART_A_TX; \ +} + +#define XHAL_DIAG_WRITE_CHAR(_c_) \ +{ \ + if( _c_ != '\r' ) \ + { \ + *SPARC_MEC_UART_A_TX = SPARC_MEC_UART_IO(_c_); \ + } \ +} + +#define XHAL_DIAG_READ_CHAR(_c_) \ +{ \ + _c_ = (char)*SPARC_MEC_UART_A_TX; \ +} + +#else +/*---------------------------------------------------------------------------*/ +/* There is no diagnostic output on SPARCLITE simulator */ + +#define HAL_DIAG_INIT() + +#define HAL_DIAG_WRITE_CHAR(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) (_c_) = 0 + +#endif + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */ diff --git a/packages/hal/sparclite/sim/current/include/hal_xpic.h b/packages/hal/sparclite/sim/current/include/hal_xpic.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/hal_xpic.h @@ -0,0 +1,109 @@ +#ifndef CYGONCE_HAL_XPIC_H +#define CYGONCE_HAL_XPIC_H + +//============================================================================= +// +// hal_xpic.h +// +// HAL eXternal Programmable Interrupt Controller support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// an external interrupt controller, and which interrupt is +// used for what. +// +// Usage: +// #include // which includes this file +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +//----------------------------------------------------------------------------- +// Interrupt controller access + +// in erc32 simulator: +// 4 = UART A +// 5 = UART B +// 7 = UART error +// 12 = GPT (general purpose timer) +// 13 = RTC (realtime clock) +// 15 = watchdog + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_13 + + +/* These must be accessed word-wide to work! */ +#define SPARC_MEC_INTCON (0x01f80000) + +#define SPARC_MEC_INTCON_PENDING (SPARC_MEC_INTCON + 0x48) +#define SPARC_MEC_INTCON_MASK (SPARC_MEC_INTCON + 0x4c) +#define SPARC_MEC_INTCON_CLEAR (SPARC_MEC_INTCON + 0x50) +#define SPARC_MEC_INTCON_FORCE (SPARC_MEC_INTCON + 0x54) + + +#define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_, _mask_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \ + _mask_ |= ( 1 << (_vector_) ); \ + HAL_WRITE_UINT32(SPARC_MEC_INTCON_MASK, _mask_ ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +#define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_, _mask_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \ + _mask_ &=~ ( 1 << (_vector_) ); \ + HAL_WRITE_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_WRITE_UINT32( SPARC_MEC_INTCON_CLEAR, ( 1 << (_vector_) ) ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) /* nothing */ + +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) /* nothing */ + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_XPIC_H +// End of hal_xpic.h diff --git a/packages/hal/sparclite/sim/current/include/halboot.si b/packages/hal/sparclite/sim/current/include/halboot.si new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/halboot.si @@ -0,0 +1,84 @@ +#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */ +#define CYGONCE_HAL_HALBOOT_SI +// ==================================================================== +// +// /halboot.si +// +// HAL bootup platform-oriented code (assembler) +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-01 +// Purpose: Bootup code, platform oriented. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// External Platform Initial Setup +// +// This should set up RAM and caches, and calm down any external +// interrupt sources. +// +// It is just plain included in vectors.S +// +// RAM has not yet been touched at all; in fact all you have is a +// register window selected. + + + ! Empty macro for debugging vectors.S + .macro led val + .endm + + ! First of all - before setting up the stack - set + ! the available memory to the full 4Mb; +#define MEC_MEMCFG (0x01f80010) + sethi %hi( MEC_MEMCFG ), %g1 + ld [ %g1 + %lo(MEC_MEMCFG) ], %g2 + mov 7, %g3 + sll %g3, 10, %g3 ! Bits 10,11,12 are of interest + andn %g2, %g3, %g2 + mov 4, %g3 + sll %g3, 10, %g3 ! Bits 10,11,12 are of interest + or %g2, %g3, %g2 ! Shift 256k left 4 times to + st %g2, [ %g1 + %lo(MEC_MEMCFG) ] + ! ...give memsize of 4Mb + + ! then copy the branch instructions into the vector + rd %tbr, %g1 + andn %g1, 0xfff, %g1 ! clear non-address bits + sethi %hi(real_vector_instructions), %l0 + or %l0, %lo(real_vector_instructions), %l0 + ld [ %l0 ], %l1 + st %l1, [ %g1 ] ! into the vector + ld [ %l0 + 4 ], %l1 + st %l1, [ %g1 + 4 ] ! into the vector + +#endif /* CYGONCE_HAL_HALBOOT_SI */ +/* EOF halboot.si */ diff --git a/packages/hal/sparclite/sim/current/include/pkgconf/hal_sparclite_sim.h b/packages/hal/sparclite/sim/current/include/pkgconf/hal_sparclite_sim.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/pkgconf/hal_sparclite_sim.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H +#define CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H +// ==================================================================== +// +// pkgconf/hal_sparclite_sim.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): bartv +// Contributors: bartv, hmt +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_SPARCLITE_SIM { + display "Minimal simulator" + type radio + parent CYGPKG_HAL_SPARCLITE + platform sim + description " + The minimal simulator HAL package is provided for when only a + simple simulation of the processor architecture is desired, as + opposed to detailed simulation of any specific board. To use + this minimal simulator the command `target sim -nfp -sparclite + -dumbio' should be used from inside gdb. It is not possible to + use any of the eCos device drivers when the simulator is running + in this mode" + } + + }}CFG_DATA */ + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H */ +/* EOF hal_sparclite_sim.h */ diff --git a/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.ldi b/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 10:41:43 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x02000000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x2000000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.mlt b/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 2000000 80000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 2000000 2000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 8 0 1 0 0 0 0 ! diff --git a/packages/hal/sparclite/sim/current/src/PKGconf.mak b/packages/hal/sparclite/sim/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/src/PKGconf.mak @@ -0,0 +1,42 @@ +#=============================================================================== +# +# makefile +# +# hal/sparclite/sim/src +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + + +PACKAGE := hal_sparclite_sim +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_priv.c +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/hal/sparclite/sim/current/src/hal_priv.c b/packages/hal/sparclite/sim/current/src/hal_priv.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/src/hal_priv.c @@ -0,0 +1,68 @@ +//=========================================================================== +// +// hal_priv.c +// +// SPARClite Architecture sim-specific private variables +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-20 +// Purpose: private vars for SPARClite sim. +// +//####DESCRIPTIONEND#### +// +//=========================================================================== + + +#include +#include + +// ------------------------------------------------------------------------ +// Clock static to keep period recorded. +cyg_int32 cyg_hal_sparclite_clock_period = 0; + +// ------------------------------------------------------------------------ +// Board specific startups. + +extern void hal_board_prestart( void ); +extern void hal_board_poststart( void ); + +#define WATCHDOG() *((int *)0x01f80064) = (int)0x00000000 // watchdog off + +void hal_board_prestart( void ) +{ + WATCHDOG(); // Turn off the ERC32 watchdog. +} + +void hal_board_poststart( void ) +{ + HAL_ENABLE_INTERRUPTS(); + // OK to do this post constructors, and good for testing. +} + +// EOF hal_priv.c diff --git a/packages/hal/sparclite/sleb/current/ChangeLog b/packages/hal/sparclite/sleb/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/ChangeLog @@ -0,0 +1,376 @@ +1999-04-09 Hugo Tyson + + * include/hal_cache.h (HAL_[DI]CACHE_IS_ENABLED): + Implement these macros. + +1999-04-09 Hugo Tyson + + * include/halboot.si: Use 10 wait states for access to the 86940 + on CS1; it seems to make the Reliability Difference(tm). + +1999-04-08 Hugo Tyson + + * tests/slebtime.cxx: Add CYG_INIT_PRIORITY( APPLICATION ) to the + two static thread objects so that the test works even when libc + steals away the default constructors. Unfortunately this also + means switching to an assignment constructor instead of a call. + +1999-04-08 John Dallaway + + * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to + avoid padded output sections (PR 19787) + +1999-04-07 Hugo Tyson + + * include/hal_hwio.h: New file: define accessors for 86940 via + alternate address space 4, register names and all that... just a + paste out of previous hal_diag.h - it was the wrong place, but + that's how it evolved. + + * include/hal_diag.h: Include hal_hwio.h to get accessors for + 86940 et al. Do not define them here, it was the wrong place. + + * include/hal_clock.h: + * include/hal_xpic.h: + Include hal_hwio.h instead of hal_diag.h + +1999-04-07 Hugo Tyson + + * tests/slebintr.c (checkallbut): This is a more informative + version of the test when it fails: this is still under + investigation somewhat, and running the more verbose version + nightly will be useful. + +1999-03-30 Hugo Tyson + + * tests/slebintr.c (start): After some thought, the timing code in + here could cause the test to take arbitrarily long; so some safety + features added. Normally the test loop is very fast, but with + cache effects and instrumentation and -O0 it could take ages; this + could explain the occasional timeouts we have seen for this test. + +1999-03-26 Hugo Tyson + + * include/hal_cache.h: + Implement the cache control macros: at least + for x in ( D I ) + HAL_xCACHE_ENABLE/DISABLE + HAL_xCACHE_INVALIDATE_ALL, HAL_xCACHE_SYNC + in the first instance. kcache1 reports sensible numbers too! + +1999-03-26 Hugo Tyson + + * tests/slebintr.c (HAL_CLOCK_READ): If there is no kernel, the + clock is not initialized, so looking at it is useless for a clue. + So provide a dummy so we perform a "few" loops when there's no + kernel. If there is no kernel, cyg_user_start() is never called, + main gets in and steals the CPU. So we hang. So if there is no + kernel, define cyg_start() instead to wrest control. Also very + much weaken the looping count check; kernel instrumentation, for + example, is more than enough to slow the world down too much. + + * tests/slebstak.c (cyg_[user_]start): + If there is no kernel, cyg_user_start() is never called, main gets + in and steals the CPU. So we hang. So if there is no kernel, + define cyg_start() instead to wrest control. + + * tests/slebtime.cxx: + Make this build when no kernel present; include of testcase &c + was the wrong side of the ifdef. Doh! + +1999-03-25 Hugo Tyson + + * src/hal_priv.c (hal_clock_initialize): Oh dear, the clock was + only running half the speed it should have; this will make the + tm_basic figures look bad, maybe. It _appeared_ right because of + spurious interrupts, making two ISRs per tick, which covered the + error beautifully. So, the initialization is now corrected, now + that the interrupt management is better dealt with. + + * include/hal_xpic.h (HAL_INTERRUPT_ACKNOWLEDGE): Loop until + either the interrupt has stopped being asserted by the + prioritization latch (CLIRL) or the source has actually re-flagged + the interrupt, so that repeated, fast interrupts will re-interrupt + rather than causing a loop here. This is to prevent spurious + double interrupts caused by HAL_INTERRUPT_ACKNOWLEDGE() not taking + effect before the CPU re-enabled interrupts; this had been + covering the clock bug as well as confusing the serial system. + + Also placed a HAL_INTERRUPT_ACKNOWLEDGE() in + HAL_INTERRUPT_CONFIGURE() since the doc implies it is necessary + when changing that stuff; a spurious interrupt may be latched. + +1999-03-24 Hugo Tyson + + * include/hal_xpic.h (HAL_INTERRUPT_CONFIGURE): + Implement this functionality, since Gary wanted to experiment with + it. Also add HAL_INTERRUPT_QUERY_INFO (platform specific) to read + back the settings of a particular interrupt source. + + * tests/slebintr.c: NEW FILE: test case for the above new macros. + * tests/slebstak.c: NEW FILE: tests the register save/restore code + by carrying out lots of factorial calculations. + * tests/slebtime.c: NEW FILE: tests HAL clocks for sanity; prints + useful diagnostics. Most useful when a human observes, if + it goes wrong this test is more likely to report a timeout + than a failure. + + * tests/sleb.c: FILE DELETED - moved to slebstak.c + + * tests/PKGconf.mak (TESTS): Reflect above changes. + +1999-03-23 John Dallaway + + * include/pkgconf/hal_sparclite_sleb.h: Modify display string + for consistency. + +1999-03-23 Hugo Tyson + + * src/hal_diag.c (hal_diag_write_char): Precisely undo the + previous change: we disable interrupts to prevent the clock + advancing during the time taken to output to GDB. + +1999-03-18 Hugo Tyson + + * src/hal_diag.c (hal_diag_write_char_serial): Do not disable + interrupts while calling the CygMon write-line routine; CygMon is + better now and can cope with interrupts there. + +1999-03-17 John Dallaway + + * include/pkgconf/mlt_sparclite_sleb_rom.mlt: Regenerate using + the eCos configuration tool to resolve errors. + +1999-03-17 Hugo Tyson + + * include/pkgconf/mlt_sparclite_sleb_rom.mlt: + * include/pkgconf/mlt_sparclite_sleb_rom.ldi: + Move the start of RAM up 512 bytes; it is now at 0x04000200. This + is to leave space for the trampoline code ie. RAM trap vector + handler to live in RAM as is required. NB the vector must be on a + 4k boundary; its location is determined by rounding down the start + of "normal" RAM ie. the symbol ".data". So if the start of RAM + isn't on a 4k boundary, or the trampoline code gets > 4k, there + will be trouble. + + * include/halboot.si: Copy trampoline code into RAM base during + startup, and deal with associated caching issues. + + * src/hal_priv.c (LED): Add this tidier macro and some extra LED + debug during start for help with ROM start. + + * include/pkgconf/hal_sparclite_sleb.h + (CYGHWR_HAL_SPARCLITE_SLEB_STARTUP): Add this define and its + associated notCDL for the GUI Config tool. + +1999-03-16 Hugo Tyson + + * include/pkgconf/mlt_sparclite_sleb_rom.ldi: + * include/pkgconf/mlt_sparclite_sleb_rom.mlt: + New files, linker script fragment and MLT doc for ROM startup. + + * include/halboot.si: Only copy real instructions into the vector + if RAM startup. Delete lots of obsolete debugging "printout". + Size RAM dynamically. Set up chip selects, wait states, refresh + timing, system services, caches, buffers, burst mode access, ... + In other words complete hardware initialization. + + * include/hal_cpu.h: new file, taken directly from CygMon sources, + which defines various MB8683x internal registers which are used in + the initialization in halboot.si. + + * include/hal_diag.h (HAL_SPARC_86940_PRS_ODIV2): Add lots more + definition of the MB86940 companion I/O chip, editted from CygMon + sources. This should move into a proper IO file later. + Also, in the non-CYG_KERNEL_DIAG_GDB case where we write output to + the serial line in clear, do perform initialization. + + * src/hal_diag.c (hal_diag_init): Properly initialize the serial + line when not using GDB encoding (if GDB coding is in use, then we + have CygMon). + + * include/hal_clock.h (HAL_CLOCK_INITIALIZE): Initialize the clock + more cleanly and correctly, as CygMon does: so ticks are actually + centiSeconds, pretty much. Actual init routine is in hal_priv.c. + + * src/hal_priv.c (hal_clock_initialize): Properly initialize the + system clock to centiSeconds. + +1999-03-11 Hugo Tyson + + * src/hal_priv.c (hal_board_prestart): + Link in the multi-thread aware debugging routine if + CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT. + +1999-03-09 Hugo Tyson + + * src/hal_priv.c (hal_board_prestart): If playing nice with + CygMon, unmask and pass through interrupt 14 (Ethernet + controller). Install and unmask interrupt 15 (NMI button) + likewise. + + * src/hal_cygm.S (hal_nmi_handler): Add new handler for the NMI + interrupt (like a PIN number) INT15, the button near the serial + connector on the board. The handler must wait for the interrupt + to go away, then acknowledge it to prevent CygMon getting in a + loop. + + * include/halboot.si: Set IRC channel 14 (Ethernet controller) + interrupt to active low so that we can pass such events on to + CygMon. Tidy up comments and ifdefs. + + * include/hal_cygm.h (BSP_NOTVEC_BSP_COMM_PROCS): Define the + CygMon vector table entry that isn't a vector, but is a pointer to + struct tree with IO functions therein. + + * src/hal_diag.c (hal_diag_write_char et al): Add variants of + these routines to use IO functions provided by CygMon if thus + configured. Also tidied up direct GDB-ized serial output, which + is selected by CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT within + CYG_KERNEL_DIAG_GDB now. + + * include/pkgconf/hal_sparclite_sleb.h: Add definition for + CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT, disabled by default. More + comments too. + +1999-03-04 John Dallaway + + * include/pkgconf/*.ldi: give all LDI files unique names so + that they can co-exist in an eCos build tree (PR 19184) + * include/pkgconf/*.mlt: give all MLT files unique names so + that they can co-exist in an eCos build tree (PR 19184) + +1999-02-25 Hugo Tyson + + These log entries from 1999-02-22 to 1999-02-24 were executed in + a branch; this change is a merge of that branch into the trunk. + +1999-02-25 Hugo Tyson + + * src/hal_diag.c (hal_diag_write_char): + Wait for the GDB protocol ack character '+' after sending a line + of output as a $O packet; this prevents mismatches of the GDB + protocol when a breakpoint is hit temporally near such output. + This has the side effect that we must deal with seeing a ^C + character instead of the '+', whence we must bounce into CygMon's + BREAK vector using a trap. Hence the next change... + + * src/hal_cygm.S (hal_user_trap_to_cygmon_vsr): + Add additional "bounce to cygmon" capability such that user trap + 2, "ta 2" trap type 130, does the same as "ta 1" ie. a breakpoint, + but first it advances the PC and NPC so that you can continue at + the instruction after. This is so that a voluntary inline + breakpoint can be implemented as "ta 2; nop; nop; nop" (nops just + for paranoia). + +1999-02-24 Jonathan Larmour + + * include/hal_diag.h: + Make hal_diag_init() and hal_diag_write_char() prototypes be extern "C" + for C++ files so they don't get name mangled + +1999-02-24 John Dallaway + + * include/pkgconf/hal_sparclite_sleb.h: Add MB8683x board + designation to description field. + +1999-02-24 Hugo Tyson + + * include/pkgconf/hal_sparclite_sleb.h: + Non-CDLoptions, but #defines nontheless, + CYG_HAL_USE_ROM_MONITOR_CYGMON and CYG_KERNEL_DIAG_GDB are defined + here to control whether we cooperate with CygMon, and if so, do we + encapsulate out output in GDB $O packets, respectively. + + * include/hal_cygm.h: + New file to describe the CygMon vectors we call to cooperate with + CygMon and GDB. When cooperating, we install VSRs in some slots + that demux into CygMon's vector table, and in most slots we just + patch in the appropriate value from CygMon's vector table so that + CygMon is called directly. + + * include/hal_xpic.h: + Document the interrupt sources on the SLEB. + + * include/hal_diag.h (HAL_DIAG_WRITE_CHAR): + Call routines in hal_diag.c to perform encapsulation, or not, + depending on CYG_KERNEL_DIAG_GDB. + + * src/hal_cygm.S: New file, demuxer trampolines for user trap and + no-fp/no-cp VSRs to bounce into CygMon. + + * src/hal_diag.c: New file, routines to perform encapsulation of + output in GDB $O packets if required by CYG_KERNEL_DIAG. + + * src/hal_priv.c (hal_board_prestart): + If CYG_HAL_USE_ROM_MONITOR_CYGMON, install either CygMon's vectors + or demuxer trampolines into our VSRs during startup. + + * src/PKGconf.mak (COMPILE): Add new files hal_cygm.S hal_diag.c + +1999-02-23 John Dallaway + + * include/pkgconf/hal_sparclite_sleb.h: Revise capitalization + of CDL strings. + +1999-02-23 John Dallaway + + * include/pkgconf/hal_sparclite_sleb.h: Specify correct platform + for cdl_package CYGPKG_HAL_SPARCLITE_SLEB. + +1999-02-22 Hugo Tyson + + * include/pkgconf/ram.mlt: + * include/pkgconf/ram.ldi: + All a lot more constraints on alignment: sections must be + word-aligned at least for the network loader to accept them. + I hope I have correctly modified the .mlt file; it's not exactly + self documenting. + +1999-02-22 Hugo Tyson + + * include/hal_cache.h: New file + * include/hal_clock.h: New file + * include/hal_diag.h: New file + * include/hal_xpic.h: New file + * include/halboot.si: New file + * include/pkgconf/hal_sparclite_sleb.h: New file + * include/pkgconf/ram.ldi: New file + * include/pkgconf/ram.mlt: New file + * src/PKGconf.mak: New file + * src/hal_priv.c: New file + * tests/PKGconf.mak: New file + * tests/sleb.c: New file + + Initial checkin of the hardware platform port for SPARClite: + platform is sleb: SPARClite Evaluation Board. + + The structure here mirrors that in the sim directory, and in fact + was cloned from it after the change of 1999-02-08 for MLT + compliance. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +//EOF ChangeLog diff --git a/packages/hal/sparclite/sleb/current/include/hal_cache.h b/packages/hal/sparclite/sleb/current/include/hal_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_cache.h @@ -0,0 +1,279 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL Cache control support (such as it is in the simulator) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// the caches. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include + +//----------------------------------------------------------------------------- +// SPARClite cache macros + +// The MB6863x Control Registers are in Address Space 1: +#define HAL_SPARC_ASI_1_READ( addr, res ) \ + asm volatile( \ + "lda [ %1 ] 1, %0" \ + : "=r"(res) \ + : "r"(addr) \ + ); + +#define HAL_SPARC_ASI_1_WRITE( addr, val ) \ + asm volatile( \ + "sta %0, [ %1 ] 1" \ + : \ + : "r"(val),"r"(addr) \ + ); + +#define HAL_SPARC_MMCR_CBIR 0x00 // Cache/BusInterfaceUnit Control +#define HAL_SPARC_MMCR_LCR 0x04 // Lock Control Register +#define HAL_SPARC_MMCR_LCSR 0x08 // Lock Control Save Reg +#define HAL_SPARC_MMCR_CSR 0x0c // Cache Status Reg +#define HAL_SPARC_MMCR_RLCR 0x10 // Restore Lock Control Register + +#define HAL_SPARC_MMCR_CBIR_ICE 0x01 // Instruction Cache Enable +#define HAL_SPARC_MMCR_CBIR_GICL 0x02 // Global IC Lock +#define HAL_SPARC_MMCR_CBIR_DCE 0x04 // Data CE +#define HAL_SPARC_MMCR_CBIR_GDCL 0x08 // G Data CE +#define HAL_SPARC_MMCR_CBIR_PBE 0x10 // Prefetch Buffer Enable +#define HAL_SPARC_MMCR_CBIR_WBE 0x20 // Write BE + + +//----------------------------------------------------------------------------- +// Cache dimensions + +// These definitions are suitable for any MB8683x processor: +// The largest possible cachesize and "ways", +// the smallest possible line size. +// This gives values that can correctly manipulate the cache by +// jumping on memory. + +// Data cache +#define HAL_DCACHE_SIZE 0x2000 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line +#define HAL_DCACHE_WAYS 2 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 0x2000 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line +#define HAL_ICACHE_WAYS 2 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + _v_ |= HAL_SPARC_MMCR_CBIR_DCE; \ + HAL_SPARC_ASI_1_WRITE( HAL_SPARC_MMCR_CBIR, _v_ ); \ + asm volatile ( "nop; nop; nop; nop;" ); \ +CYG_MACRO_END + +// Disable the data cache +#define HAL_DCACHE_DISABLE() CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + _v_ &=~ HAL_SPARC_MMCR_CBIR_DCE; \ + HAL_SPARC_ASI_1_WRITE( HAL_SPARC_MMCR_CBIR, _v_ ); \ + asm volatile ( "nop; nop; nop; nop;" ); \ +CYG_MACRO_END + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() CYG_MACRO_START \ + asm volatile ( \ + "set 3, %%l0;" \ + "set 0x00001000, %%l1;" \ + "set 0x80001000, %%l2;" \ + "sta %%l0, [ %%l1 ] 0x0e;" \ + "sta %%l0, [ %%l2 ] 0x0e;" \ + "nop;" \ + "nop;" \ + "nop;" \ + "nop" : : : "l0","l1","l2" ); \ +CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() CYG_MACRO_START \ + /* read 8k from the ROM; that should do it... */ \ + volatile cyg_uint32 *_p_ = (cyg_uint32 *)0; \ + volatile cyg_uint32 *_q_ = (cyg_uint32 *)HAL_DCACHE_SIZE; \ + volatile cyg_uint32 _tmp_; \ + for ( ; _p_ < _q_; _p_ ++ ) _tmp_ = *_q_; \ +CYG_MACRO_END + +// Query the state of the data cache +#define HAL_DCACHE_IS_ENABLED(_state_) CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + (_state_) = (0 != (_v_ & HAL_SPARC_MMCR_CBIR_DCE)); \ +CYG_MACRO_END + + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache - use Data cache controls since they +// are not separatable. + +// Enable the data cache +#define HAL_ICACHE_ENABLE() CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + _v_ |= HAL_SPARC_MMCR_CBIR_ICE; \ + HAL_SPARC_ASI_1_WRITE( HAL_SPARC_MMCR_CBIR, _v_ ); \ + asm volatile ( "nop; nop; nop; nop;" ); \ +CYG_MACRO_END + +// Disable the data cache +#define HAL_ICACHE_DISABLE() CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + _v_ &=~ HAL_SPARC_MMCR_CBIR_ICE; \ + HAL_SPARC_ASI_1_WRITE( HAL_SPARC_MMCR_CBIR, _v_ ); \ + asm volatile ( "nop; nop; nop; nop;" ); \ +CYG_MACRO_END + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() CYG_MACRO_START \ + asm volatile ( \ + "set 3, %%l0;" \ + "set 0x00001000, %%l1;" \ + "set 0x80001000, %%l2;" \ + "sta %%l0, [ %%l1 ] 0x0c;" \ + "sta %%l0, [ %%l2 ] 0x0c;" \ + "nop;" \ + "nop;" \ + "nop;" \ + "nop" : : : "l0","l1","l2" ); \ +CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() CYG_MACRO_START \ + HAL_DCACHE_SYNC(); /* Ensure data is in memory */ \ + HAL_ICACHE_INVALIDATE_ALL(); /* Pick up new memory contents */ \ +CYG_MACRO_END + +// Query the state of the instruction cache +#define HAL_ICACHE_IS_ENABLED(_state_) CYG_MACRO_START \ + int _v_; \ + HAL_SPARC_ASI_1_READ( HAL_SPARC_MMCR_CBIR, _v_ ); \ + (_state_) = (0 != (_v_ & HAL_SPARC_MMCR_CBIR_ICE)); \ +CYG_MACRO_END + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h diff --git a/packages/hal/sparclite/sleb/current/include/hal_clock.h b/packages/hal/sparclite/sleb/current/include/hal_clock.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_clock.h @@ -0,0 +1,120 @@ +#ifndef CYGONCE_HAL_CLOCK_H +#define CYGONCE_HAL_CLOCK_H + +//============================================================================= +// +// hal_clock.h +// +// HAL clock support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define clock support +// Description: The macros defined here provide the HAL APIs for handling +// the clock. +// +// Usage: +// #include // which includes this file +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +// #include + +#include // HAL_SPARC_86940_READ/WRITE + +//----------------------------------------------------------------------------- +// Clock control + + +// The vector used by the Real time clock is defined in hal_xpic.h + +extern cyg_int32 cyg_hal_sparclite_clock_period; + +//----------------------------------------------------------------------------- + +#define HAL_SPARC_86940_REG_TIMER1_PRESCALER ( 0x14 * 4 ) +#define HAL_SPARC_86940_REG_TIMER1_CONTROL ( 0x15 * 4 ) +#define HAL_SPARC_86940_REG_TIMER1_RELOAD ( 0x16 * 4 ) +#define HAL_SPARC_86940_REG_TIMER1_COUNT ( 0x17 * 4 ) + + + +#define HAL_SPARC_86940_TIMER1_PRESCALER_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TIMER1_PRESCALER, v ) + +#define HAL_SPARC_86940_TIMER1_PRESCALER_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TIMER1_PRESCALER, r ) + +#define HAL_SPARC_86940_TIMER1_CONTROL_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TIMER1_CONTROL, v ) + +#define HAL_SPARC_86940_TIMER1_CONTROL_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TIMER1_CONTROL, r ) + +#define HAL_SPARC_86940_TIMER1_RELOAD_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TIMER1_RELOAD, v ) + +#define HAL_SPARC_86940_TIMER1_RELOAD_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TIMER1_RELOAD, r ) + +#define HAL_SPARC_86940_TIMER1_COUNT_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TIMER1_COUNT, r ) + +//----------------------------------------------------------------------------- + +// Initialize the clock to 1MHz whatever the system clock speed. This +// requires calculation... + +externC void hal_clock_initialize( cyg_uint32 p ); +#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize( _period_ ) + +// This is the easiest way to clear the interrupt. +#define HAL_CLOCK_RESET( _vector_, _period_ ) CYG_MACRO_START \ + cyg_uint32 _scratch_; \ + HAL_SPARC_86940_TIMER1_COUNT_READ( _scratch_ ); \ +CYG_MACRO_END + +#define HAL_CLOCK_READ( _pvalue_ ) CYG_MACRO_START \ + cyg_uint32 _read_; \ + HAL_SPARC_86940_TIMER1_COUNT_READ( _read_ ); \ + *((cyg_uint32 *)(_pvalue_)) = cyg_hal_sparclite_clock_period - _read_; \ +CYG_MACRO_END + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( _pvalue_ ) +#endif + +//----------------------------------------------------------------------------- + +#endif // ifndef CYGONCE_HAL_CLOCK_H +// End of hal_clock.h diff --git a/packages/hal/sparclite/sleb/current/include/hal_cpu.h b/packages/hal/sparclite/sleb/current/include/hal_cpu.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_cpu.h @@ -0,0 +1,532 @@ +#ifndef CYGONCE_HAL_SPARCLITE_HAL_CPU_H +#define CYGONCE_HAL_SPARCLITE_HAL_CPU_H +// ==================================================================== +// +// hal_cpu.h +// +// HAL CPU architecture file for MB8683x +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Cygnus +// Contributors: Cygnus, hmt +// Date: 1999-03-01 +// Purpose: MB8683x SPARClite CPU symbols +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +// NOTE: THIS FILE HAS NOT BEEN "CLEANED UP" WRT NAMESPACE USE +// +// it is only used internally to the SLEB HAL +// +// it should not be exported by inclusion in API header files +// + +#ifndef __ASSEMBLER__ +/* + * Register numbers. These are assumed to match the + * register numbers used by GDB. + */ +enum __regnames { + REG_G0, REG_G1, REG_G2, REG_G3, + REG_G4, REG_G5, REG_G6, REG_G7, + REG_O0, REG_O1, REG_O2, REG_O3, + REG_O4, REG_O5, REG_SP, REG_O7, + REG_L0, REG_L1, REG_L2, REG_L3, + REG_L4, REG_L5, REG_L6, REG_L7, + REG_I0, REG_I1, REG_I2, REG_I3, + REG_I4, REG_I5, REG_FP, REG_I7, + + REG_F0, REG_F1, REG_F2, REG_F3, + REG_F4, REG_F5, REG_F6, REG_F7, + REG_F8, REG_F9, REG_F10, REG_F11, + REG_F12, REG_F13, REG_F14, REG_F15, + REG_F16, REG_F17, REG_F18, REG_F19, + REG_F20, REG_F21, REG_F22, REG_F23, + REG_F24, REG_F25, REG_F26, REG_F27, + REG_F28, REG_F29, REG_F30, REG_F31, + + REG_Y, REG_PSR, REG_WIM, REG_TBR, + REG_PC, REG_NPC, REG_FPSR, REG_CPSR, + REG_DIA1, REG_DIA2, REG_DDA1, REG_DDA2, + REG_DDV1, REG_DDV2, REG_DCR, REG_DSR, + + REG_LAST +}; +#endif + +#ifdef __ASSEMBLER__ +/* + * Macros to glue together two tokens. + */ +#ifdef __STDC__ +#define XGLUE(a,b) a##b +#else +#define XGLUE(a,b) a/**/b +#endif + +#define GLUE(a,b) XGLUE(a,b) + +#ifdef NEED_UNDERSCORE +#define SYM_NAME(name) GLUE(_,name) + + .macro FUNC_START name + .align 4 + .globl _\name + .type _\name,#function + .proc 04 + _\name: + .endm + + .macro FUNC_END name + .LL_\name: + .size _\name,.LL_\name - _\name + .endm + +#else +#define SYM_NAME(name) name + + .macro FUNC_START name + .align 4 + .globl \name + .type \name,#function + .proc 04 + \name: + .endm + + .macro FUNC_END name + .LL\name: + .size \name,.LL\name - \name + .endm + +#endif + +#endif /* __ASSEMBLER__ */ + +/* + * breakpoint opcode. + */ +#define BREAKPOINT_OPCODE 0x91d02001 + +/* + * inline asm statement to cause breakpoint. + */ +#define BREAKPOINT() asm volatile ("ta 1\n") + +/* + * Core Exception vectors. + */ +#define BSP_EXC_IACCESS 0 +#define BSP_EXC_ILL 1 +#define BSP_EXC_IPRIV 2 +#define BSP_EXC_FPDIS 3 +#define BSP_EXC_WINOVF 4 +#define BSP_EXC_WINUND 5 +#define BSP_EXC_ALIGN 6 +#define BSP_EXC_DACCESS 7 +#define BSP_EXC_TAGOVF 8 +#define BSP_EXC_INT1 9 +#define BSP_EXC_INT2 10 +#define BSP_EXC_INT3 11 +#define BSP_EXC_INT4 12 +#define BSP_EXC_INT5 13 +#define BSP_EXC_INT6 14 +#define BSP_EXC_INT7 15 +#define BSP_EXC_INT8 16 +#define BSP_EXC_INT9 17 +#define BSP_EXC_INT10 18 +#define BSP_EXC_INT11 19 +#define BSP_EXC_INT12 20 +#define BSP_EXC_INT13 21 +#define BSP_EXC_INT14 22 +#define BSP_EXC_INT15 23 +#define BSP_EXC_CPDIS 24 +#define BSP_EXC_BREAK 25 +#define BSP_EXC_WINFLUSH 26 +#define BSP_EXC_SYSCALL 27 +#define BSP_EXC_DEBUG 28 +#define BSP_EXC_TRAP 29 + +#define BSP_MAX_EXCEPTIONS 30 + +#define BSP_VEC_MT_DEBUG 30 +#define BSP_VEC_STUB_ENTRY 31 +#define BSP_VEC_BSPDATA 32 + +#define NUM_VTAB_ENTRIES 33 + +#define CPU_WINSIZE 8 + +/* + * Exception frame offsets. + */ +#define GPR_SIZE 4 +#define FPR_SIZE 4 +#define PTR_BYTES 4 + +/* Leave room for locals + hidden arg + arg spill + dword align */ +#define FR_BIAS ((16+1+6+1)*GPR_SIZE) + +#define FR_G0 FR_BIAS +#define FR_G1 (FR_G0 + GPR_SIZE) +#define FR_G2 (FR_G1 + GPR_SIZE) +#define FR_G3 (FR_G2 + GPR_SIZE) +#define FR_G4 (FR_G3 + GPR_SIZE) +#define FR_G5 (FR_G4 + GPR_SIZE) +#define FR_G6 (FR_G5 + GPR_SIZE) +#define FR_G7 (FR_G6 + GPR_SIZE) +#define FR_O0 (FR_G7 + GPR_SIZE) +#define FR_O1 (FR_O0 + GPR_SIZE) +#define FR_O2 (FR_O1 + GPR_SIZE) +#define FR_O3 (FR_O2 + GPR_SIZE) +#define FR_O4 (FR_O3 + GPR_SIZE) +#define FR_O5 (FR_O4 + GPR_SIZE) +#define FR_O6 (FR_O5 + GPR_SIZE) +#define FR_SP FR_O6 +#define FR_O7 (FR_SP + GPR_SIZE) +#define FR_L0 (FR_O7 + GPR_SIZE) +#define FR_L1 (FR_L0 + GPR_SIZE) +#define FR_L2 (FR_L1 + GPR_SIZE) +#define FR_L3 (FR_L2 + GPR_SIZE) +#define FR_L4 (FR_L3 + GPR_SIZE) +#define FR_L5 (FR_L4 + GPR_SIZE) +#define FR_L6 (FR_L5 + GPR_SIZE) +#define FR_L7 (FR_L6 + GPR_SIZE) +#define FR_I0 (FR_L7 + GPR_SIZE) +#define FR_I1 (FR_I0 + GPR_SIZE) +#define FR_I2 (FR_I1 + GPR_SIZE) +#define FR_I3 (FR_I2 + GPR_SIZE) +#define FR_I4 (FR_I3 + GPR_SIZE) +#define FR_I5 (FR_I4 + GPR_SIZE) +#define FR_I6 (FR_I5 + GPR_SIZE) +#define FR_FP FR_I6 +#define FR_I7 (FR_FP + GPR_SIZE) + +#define FR_FREG0 (FR_I7 + GPR_SIZE) +#define FR_FREG1 (FR_FREG0 + FPR_SIZE) +#define FR_FREG2 (FR_FREG1 + FPR_SIZE) +#define FR_FREG3 (FR_FREG2 + FPR_SIZE) +#define FR_FREG4 (FR_FREG3 + FPR_SIZE) +#define FR_FREG5 (FR_FREG4 + FPR_SIZE) +#define FR_FREG6 (FR_FREG5 + FPR_SIZE) +#define FR_FREG7 (FR_FREG6 + FPR_SIZE) +#define FR_FREG8 (FR_FREG7 + FPR_SIZE) +#define FR_FREG9 (FR_FREG8 + FPR_SIZE) +#define FR_FREG10 (FR_FREG9 + FPR_SIZE) +#define FR_FREG11 (FR_FREG10 + FPR_SIZE) +#define FR_FREG12 (FR_FREG11 + FPR_SIZE) +#define FR_FREG13 (FR_FREG12 + FPR_SIZE) +#define FR_FREG14 (FR_FREG13 + FPR_SIZE) +#define FR_FREG15 (FR_FREG14 + FPR_SIZE) +#define FR_FREG16 (FR_FREG15 + FPR_SIZE) +#define FR_FREG17 (FR_FREG16 + FPR_SIZE) +#define FR_FREG18 (FR_FREG17 + FPR_SIZE) +#define FR_FREG19 (FR_FREG18 + FPR_SIZE) +#define FR_FREG20 (FR_FREG19 + FPR_SIZE) +#define FR_FREG21 (FR_FREG20 + FPR_SIZE) +#define FR_FREG22 (FR_FREG21 + FPR_SIZE) +#define FR_FREG23 (FR_FREG22 + FPR_SIZE) +#define FR_FREG24 (FR_FREG23 + FPR_SIZE) +#define FR_FREG25 (FR_FREG24 + FPR_SIZE) +#define FR_FREG26 (FR_FREG25 + FPR_SIZE) +#define FR_FREG27 (FR_FREG26 + FPR_SIZE) +#define FR_FREG28 (FR_FREG27 + FPR_SIZE) +#define FR_FREG29 (FR_FREG28 + FPR_SIZE) +#define FR_FREG30 (FR_FREG29 + FPR_SIZE) +#define FR_FREG31 (FR_FREG30 + FPR_SIZE) + +#define FR_Y (FR_FREG31 + FPR_SIZE) +#define FR_PSR (FR_Y + GPR_SIZE) +#define FR_WIM (FR_PSR + GPR_SIZE) +#define FR_TBR (FR_WIM + GPR_SIZE) +#define FR_PC (FR_TBR + GPR_SIZE) +#define FR_NPC (FR_PC + GPR_SIZE) +#define FR_FPSR (FR_NPC + GPR_SIZE) +#define FR_CPSR (FR_FPSR + GPR_SIZE) +#define FR_DIA1 (FR_CPSR + GPR_SIZE) +#define FR_DIA2 (FR_DIA1 + GPR_SIZE) +#define FR_DDA1 (FR_DIA2 + GPR_SIZE) +#define FR_DDA2 (FR_DDA1 + GPR_SIZE) +#define FR_DDV1 (FR_DDA2 + GPR_SIZE) +#define FR_DDV2 (FR_DDV1 + GPR_SIZE) +#define FR_DCR (FR_DDV2 + GPR_SIZE) +#define FR_DSR (FR_DCR + GPR_SIZE) +#define FR_ASR17 (FR_DSR + GPR_SIZE) + +#define EX_STACK_SIZE (FR_ASR17 + GPR_SIZE) + +#ifndef __ASSEMBLER__ +/* + * How registers are stored for exceptions. + */ +typedef struct +{ + unsigned long _g0; + unsigned long _g1; + unsigned long _g2; + unsigned long _g3; + unsigned long _g4; + unsigned long _g5; + unsigned long _g6; + unsigned long _g7; + unsigned long _o0; + unsigned long _o1; + unsigned long _o2; + unsigned long _o3; + unsigned long _o4; + unsigned long _o5; + unsigned long _sp; + unsigned long _o7; + unsigned long _l0; + unsigned long _l1; + unsigned long _l2; + unsigned long _l3; + unsigned long _l4; + unsigned long _l5; + unsigned long _l6; + unsigned long _l7; + unsigned long _i0; + unsigned long _i1; + unsigned long _i2; + unsigned long _i3; + unsigned long _i4; + unsigned long _i5; + unsigned long _fp; + unsigned long _i7; + + unsigned long _fpr[32]; + + unsigned long _y; + unsigned long _psr; + unsigned long _wim; + unsigned long _tbr; + + unsigned long _pc; + unsigned long _npc; + unsigned long _fpsr; + unsigned long _cpsr; + unsigned long _dia1; + unsigned long _dia2; + unsigned long _dda1; + unsigned long _dda2; + unsigned long _ddv1; + unsigned long _ddv2; + unsigned long _dcr; + unsigned long _dsr; + + unsigned long _asr17; + +} ex_regs_t; + +/* + * How gdb expects registers to be stored. + */ +typedef struct +{ + unsigned long _g0; + unsigned long _g1; + unsigned long _g2; + unsigned long _g3; + unsigned long _g4; + unsigned long _g5; + unsigned long _g6; + unsigned long _g7; + unsigned long _o0; + unsigned long _o1; + unsigned long _o2; + unsigned long _o3; + unsigned long _o4; + unsigned long _o5; + unsigned long _sp; + unsigned long _o7; + unsigned long _l0; + unsigned long _l1; + unsigned long _l2; + unsigned long _l3; + unsigned long _l4; + unsigned long _l5; + unsigned long _l6; + unsigned long _l7; + unsigned long _i0; + unsigned long _i1; + unsigned long _i2; + unsigned long _i3; + unsigned long _i4; + unsigned long _i5; + unsigned long _fp; + unsigned long _i7; + unsigned long _fpr[32]; + unsigned long _y; + unsigned long _psr; + unsigned long _wim; + unsigned long _tbr; + unsigned long _pc; + unsigned long _npc; + unsigned long _fpsr; + unsigned long _cpsr; + unsigned long _dia1; + unsigned long _dia2; + unsigned long _dda1; + unsigned long _dda2; + unsigned long _ddv1; + unsigned long _ddv2; + unsigned long _dcr; + unsigned long _dsr; +} gdb_regs_t; + + +extern void __dcache_flush(void *addr, int nbytes); +extern void __icache_flush(void *addr, int nbytes); +extern int __dcache_disable(void); +extern void __dcache_enable(void); +extern void __icache_disable(void); +extern void __icache_enable(void); + + +#endif /* !__ASSEMBLER__ */ + + +#define PSR_INIT 0xfa7 + + +/* + * Memory-mapped (ASI=1) registers for MB8683x series. + */ +#define CBIR 0x00000000 +#define LCR 0x00000004 +#define LCSR 0x00000008 +#define CSR 0x0000000C +#define RLCR 0x00000010 +#define BCR 0x00000020 +#define SSCR 0x00000080 + +#define SPGMR 0x00000120 +#define ARSR1 0x00000124 +#define ARSR2 0x00000128 +#define ARSR3 0x0000012C +#define ARSR4 0x00000130 +#define ARSR5 0x00000134 +#define AMR0 0x00000140 +#define AMR1 0x00000144 +#define AMR2 0x00000148 +#define AMR3 0x0000014C +#define AMR4 0x00000150 +#define AMR5 0x00000154 +#define WSSR0 0x00000160 +#define WSSR1 0x00000164 +#define WSSR2 0x00000168 +#define BWCR 0x0000016C +#define REFTMR 0x00000174 +#define DRLD 0x00000178 +#define VER2 0x00020000 +#define SLPMD 0x00020004 + +/* CBIR bit fields */ +#define CBIR_ICEN 0x01 /* Icache enable */ +#define CBIR_ICLOCK 0x02 /* Icache lock */ +#define CBIR_DCEN 0x04 /* Dcache enable */ +#define CBIR_DCLOCK 0x08 /* Dcache lock */ +#define CBIR_PBEN 0x10 /* Prefetch Buffer enable */ +#define CBIR_WBEN 0x20 /* Write Buffer enable */ + +/* LCR bit fields */ +#define LCR_ILOCK 0x01 /* Icache Auto-lock enable */ +#define LCR_DLOCK 0x02 /* Dcache Auto-lock enable */ + +/* WSSRn bit fields */ +#define WSSR_OVERRIDE 1 +#define WSSR_SINGLE 2 +#define WSSR_WAITEN 4 + +#define WSSR_CNT1_SHIFT 8 +#define WSSR_CNT2_SHIFT 3 +#define WSSR_CS0_SHIFT 6 +#define WSSR_CS1_SHIFT 19 + +#define WSSR_SUBVAL(c1,c2,flags) (((c1)<<8)|((c2)<<3)|(flags)) +#define WSSR_VAL(c1b,c2b,flagsb,c1a,c2a,flagsa) \ + ((WSSR_SUBVAL(c1b,c2b,flagsb)<<19)|(WSSR_SUBVAL(c1a,c2a,flagsa)<<6)) + +#define SPGMR_VAL(asi,addr) (((asi)<<23)|(((addr)>>9)&0x007ffffe)) +#define ARSR_VAL(asi,base) ((((asi)&0xff)<<23)|(((base)>>9)&0x007ffffe)) +#define AMR_VAL(asi,base) (((~(asi))<<23)|(((~(base))>>9)&0x007fffff)) + +/* SSCR bit fields */ +#define SSCR_TIMER 0x04 +#define SSCR_WAIT 0x08 +#define SSCR_CS 0x10 +#define SSCR_SAMEPG 0x20 +#define SSCR_DRAM 0x40 +#define SSCR_BURST 0x80 + +/* BCR bit fields */ +#define BCR_IBE 1 +#define BCR_DBE 2 + + +/* DRAM Controller registers as offsets into CS3 space */ +#define DBANKR 0x20 +#define DTIMR 0x24 + +/* DBANKR bit fields */ +#define DBANKR_512K 0 +#define DBANKR_1M 1 +#define DBANKR_2M 2 +#define DBANKR_4M 3 +#define DBANKR_8M 4 +#define DBANKR_16M 5 +#define DBANKR_32M 6 +#define DBANKR_64M 7 +#define DBANKR_CA9 (2<<4) +#define DBANKR_CA10 (3<<4) +#define DBANKR_CA11 (4<<4) +#define DBANKR_CA12 (5<<4) +#define DBANKR_4C1W (0<<7) /* 4CAS/1WE */ +#define DBANKR_1C4W (1<<7) /* 1CAS/4WE */ +#define DBANKR_EDO (1<<8) +#define DBANKR_SA01 (1<<9) +#define DBANKR_SA02 (2<<9) +#define DBANKR_SA04 (3<<9) + +/* DTIMR bit fields */ +#define DTIMR_RP1 0 +#define DTIMR_RP2 1 +#define DTIMR_CAS1 (0<<1) +#define DTIMR_CAS2 (1<<1) +#define DTIMR_CBR1 (0<<2) +#define DTIMR_CBR2 (1<<2) +#define DTIMR_CBR3 (2<<2) +#define DTIMR_RPS2 (0<<4) +#define DTIMR_RPS4 (1<<4) + + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_HAL_SPARCLITE_HAL_CPU_H */ +/* EOF hal_cpu.h */ diff --git a/packages/hal/sparclite/sleb/current/include/hal_cygm.h b/packages/hal/sparclite/sleb/current/include/hal_cygm.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_cygm.h @@ -0,0 +1,116 @@ +#ifndef CYGONCE_HAL_CYGM_H +#define CYGONCE_HAL_CYGM_H + +//============================================================================= +// +// hal_cygm.h +// +// HAL CygMon vector definitions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-24 +// Purpose: Define Interrupt vectors in CygMon +// Description: +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include +#include +#include + +// *** THIS FILE IS ALSO USED IN ASSEMBLY SOURCE *** +// so it does not include eg. cyg_type.h ... + +#ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON + +//----------------------------------------------------------------------------- +// SPARClite CygMon vector numbers and address + +#define CYGMON_VECTOR_TABLE_BASE (0x04000000) + +#define CYGMON_VECTOR_TABLE ((CYG_ADDRESS *)CYGMON_VECTOR_TABLE_BASE) + +// The ROM vector table is located at 0x04000000 and has the +// following layout: + +#define BSP_EXC_IACCESS 0 /* insn access */ +#define BSP_EXC_ILL 1 /* illegal insn */ +#define BSP_EXC_IPRIV 2 /* privileged insn */ +#define BSP_EXC_FPDIS 3 /* FPU disabled */ +#define BSP_EXC_WINOVF 4 /* window overflow */ +#define BSP_EXC_WINUND 5 /* window underflow */ +#define BSP_EXC_ALIGN 6 /* alignment */ +#define BSP_EXC_DACCESS 7 /* data access */ +#define BSP_EXC_TAGOVF 8 /* tag overflow */ +#define BSP_EXC_INT1 9 +#define BSP_EXC_INT2 10 +#define BSP_EXC_INT3 11 +#define BSP_EXC_INT4 12 +#define BSP_EXC_INT5 13 +#define BSP_EXC_INT6 14 +#define BSP_EXC_INT7 15 /* serial Ch0 rxrdy */ +#define BSP_EXC_INT8 16 +#define BSP_EXC_INT9 17 +#define BSP_EXC_INT10 18 /* serial Ch0 rxrdy */ +#define BSP_EXC_INT11 19 +#define BSP_EXC_INT12 20 +#define BSP_EXC_INT13 21 +#define BSP_EXC_INT14 22 /* ethernet interrupt */ +#define BSP_EXC_INT15 23 +#define BSP_EXC_CPDIS 24 /* CP disabled */ +#define BSP_EXC_BREAK 25 /* breakpoint "ta 1" */ +#define BSP_EXC_WINFLUSH 26 /* window flush "ta 3" */ +#define BSP_EXC_SYSCALL 27 /* syscall "ta 8" */ +#define BSP_EXC_DEBUG 28 /* DSU exception */ +#define BSP_EXC_TRAP 29 /* all other traps */ +#define BSP_VEC_MT_DEBUG 30 /* Multi-Threaded debugging */ +#define BSP_VEC_STUB_ENTRY 31 /* low level stub entry, eg. ^C rx */ + +// These vectors should be called with: +// +// %l0 - PSR +// %l1 - PC +// %l2 - NPC +// [%l3 - TBR ; STUB_ENTRY only, TBR from original exception ] + +#define BSP_NOTVEC_BSP_COMM_PROCS 32 /* pointer to structure for comms */ + +#endif // CYG_HAL_USE_ROM_MONITOR_CYGMON + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CYGM_H +// End of hal_cygm.h diff --git a/packages/hal/sparclite/sleb/current/include/hal_diag.h b/packages/hal/sparclite/sleb/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_diag.h @@ -0,0 +1,131 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-01-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include +#include +#include +#include + +#include + +#include + +/*---------------------------------------------------------------------------*/ +/* SPARClite Evaluation Board - SLEB - 86940 SDTR output (+ the LEDs) */ + +#define SLEB_LED (*(volatile char *)(0x02000003)) + +#define SLEB_86940_SDTR0_OUT +#ifdef SLEB_86940_SDTR0_OUT + + +#define HAL_SPARC_86940_FLAG_TXRDY (0x01) +#define HAL_SPARC_86940_FLAG_RXRDY (0x02) + +#define HAL_DIAG_WRITE_CHAR_DIRECT(_c_) CYG_MACRO_START \ + cyg_uint32 status = 0; \ + while ( 0 == (HAL_SPARC_86940_FLAG_TXRDY & status) ) { \ + HAL_SPARC_86940_SDTR0_STAT_READ( status ); \ + } \ + HAL_SPARC_86940_SDTR0_TXDATA_WRITE( _c_ ); \ +CYG_MACRO_END + +#define HAL_DIAG_WRITE_CHAR_WAIT_FOR_EMPTY() CYG_MACRO_START \ + cyg_uint32 status = HAL_SPARC_86940_FLAG_TXRDY; \ + while ( 0 != (HAL_SPARC_86940_FLAG_TXRDY & status) ) { \ + HAL_SPARC_86940_SDTR0_STAT_READ( status ); \ + } \ +CYG_MACRO_END + + + +#ifdef CYG_KERNEL_DIAG_GDB +// then use routines from hal_diag.c: + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +#define HAL_DIAG_INIT() hal_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) CYG_MACRO_START \ + SLEB_LED = (_c_); /* immediately */ \ + hal_diag_write_char(_c_); \ +CYG_MACRO_END + + +#else // CYG_KERNEL_DIAG_GDB +// else go to the serial line directly (after initialization): + +externC void hal_diag_init(void); +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) CYG_MACRO_START \ + SLEB_LED = (_c_); \ + HAL_DIAG_WRITE_CHAR_DIRECT( _c_ ); \ +CYG_MACRO_END + +#endif // CYG_KERNEL_DIAG_GDB + + + +#define HAL_DIAG_READ_CHAR(_c_) (_c_) = 0 + + +#else +/*---------------------------------------------------------------------------*/ +/* SPARClite Evaluation Board - SLEB - Just use the LEDs on board */ + +#define HAL_DIAG_INIT() + +#define HAL_DIAG_WRITE_CHAR(_c_) CYG_MACRO_START \ + SLEB_LED = (_c_); \ +CYG_MACRO_END + +#define HAL_DIAG_READ_CHAR(_c_) (_c_) = 0 + + +#endif // SLEB_86940_SDTR0_OUT + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */ diff --git a/packages/hal/sparclite/sleb/current/include/hal_hwio.h b/packages/hal/sparclite/sleb/current/include/hal_hwio.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_hwio.h @@ -0,0 +1,302 @@ +#ifndef CYGONCE_HAL_HAL_HWIO_H +#define CYGONCE_HAL_HAL_HWIO_H + +/*============================================================================= +// +// hal_hwio.h +// +// HAL Support for IO to platform-specific devices +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-01-11 +// Purpose: HAL Support for IO to platform-specific devices +// Description: Macros to access the 86940 SPARClite companion chip +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include +#include +#include +#include + +#include + +/*---------------------------------------------------------------------------*/ +/* MB86940 flags and the like */ + +/* Interrupt trigger modes. */ +#define HAL_SPARC_86940_TRIG_LEVEL_H 0 /* trigger on high level */ +#define HAL_SPARC_86940_TRIG_LEVEL_L 1 /* trigger on low level */ +#define HAL_SPARC_86940_TRIG_EDGE_H 2 /* trigger on rising edge */ +#define HAL_SPARC_86940_TRIG_EDGE_L 3 /* trigger on falling edge */ + +/* Timer prescaler register values */ +#define HAL_SPARC_86940_PRS_EXTCLK 0x8000 +#define HAL_SPARC_86940_PRS_ODIV1 (0<<8) +#define HAL_SPARC_86940_PRS_ODIV2 (1<<8) +#define HAL_SPARC_86940_PRS_ODIV4 (2<<8) +#define HAL_SPARC_86940_PRS_ODIV8 (3<<8) +#define HAL_SPARC_86940_PRS_ODIV16 (4<<8) +#define HAL_SPARC_86940_PRS_ODIV32 (5<<8) +#define HAL_SPARC_86940_PRS_ODIV64 (6<<8) +#define HAL_SPARC_86940_PRS_ODIV128 (7<<8) + +/* Timer control register values */ +#define HAL_SPARC_86940_TCR_CE (1<<11) +#define HAL_SPARC_86940_TCR_CLKINT (0<<9) +#define HAL_SPARC_86940_TCR_CLKEXT (1<<9) +#define HAL_SPARC_86940_TCR_CLKPRS (2<<9) +#define HAL_SPARC_86940_TCR_CLKRSVD (3<<9) +#define HAL_SPARC_86940_TCR_OUTSAME (0<<7) +#define HAL_SPARC_86940_TCR_OUTHIGH (1<<7) +#define HAL_SPARC_86940_TCR_OUTLOW (2<<7) +#define HAL_SPARC_86940_TCR_OUTC3 (3<<7) +#define HAL_SPARC_86940_TCR_INV (1<<6) +#define HAL_SPARC_86940_TCR_PER_INT (0<<3) +#define HAL_SPARC_86940_TCR_TO_INT (1<<3) +#define HAL_SPARC_86940_TCR_SQWAVE (2<<3) +#define HAL_SPARC_86940_TCR_SW_WATCH (3<<3) +#define HAL_SPARC_86940_TCR_HW_WATCH (4<<3) +#define HAL_SPARC_86940_TCR_LEVEL_L 0 +#define HAL_SPARC_86940_TCR_LEVEL_H 1 +#define HAL_SPARC_86940_TCR_EDGE_H 2 +#define HAL_SPARC_86940_TCR_EDGE_L 3 +#define HAL_SPARC_86940_TCR_EDGE 4 + +/* serial mode register values */ +#define HAL_SPARC_86940_SER_STOP0 (0<<6) +#define HAL_SPARC_86940_SER_STOP1 (1<<6) +#define HAL_SPARC_86940_SER_STOP1_5 (2<<6) +#define HAL_SPARC_86940_SER_STOP2 (3<<6) +#define HAL_SPARC_86940_SER_NO_PARITY (0<<4) +#define HAL_SPARC_86940_SER_ODD_PARITY (1<<4) +#define HAL_SPARC_86940_SER_EVEN_PARITY (3<<4) +#define HAL_SPARC_86940_SER_5BITS (0<<2) +#define HAL_SPARC_86940_SER_6BITS (1<<2) +#define HAL_SPARC_86940_SER_7BITS (2<<2) +#define HAL_SPARC_86940_SER_8BITS (3<<2) +#define HAL_SPARC_86940_SER_MODE_SYNCH 0 +#define HAL_SPARC_86940_SER_DIV1_CLK 1 +#define HAL_SPARC_86940_SER_DIV16_CLK 2 +#define HAL_SPARC_86940_SER_DIV64_CLK 3 + +/* serial command register (asynch) */ +#define HAL_SPARC_86940_SER_CMD_EHM (1<<7) +#define HAL_SPARC_86940_SER_CMD_IRST (1<<6) +#define HAL_SPARC_86940_SER_CMD_RTS (1<<5) +#define HAL_SPARC_86940_SER_CMD_EFR (1<<4) +#define HAL_SPARC_86940_SER_CMD_BREAK (1<<3) +#define HAL_SPARC_86940_SER_CMD_RXEN (1<<2) +#define HAL_SPARC_86940_SER_CMD_DTR (1<<1) +#define HAL_SPARC_86940_SER_CMD_TXEN (1<<0) + +/* serial status register */ +#define HAL_SPARC_86940_SER_STAT_DSR (1<<7) +#define HAL_SPARC_86940_SER_STAT_BREAK (1<<6) +#define HAL_SPARC_86940_SER_STAT_FERR (1<<5) +#define HAL_SPARC_86940_SER_STAT_OERR (1<<4) +#define HAL_SPARC_86940_SER_STAT_PERR (1<<3) +#define HAL_SPARC_86940_SER_STAT_TXEMP (1<<2) +#define HAL_SPARC_86940_SER_STAT_RXRDY (1<<1) +#define HAL_SPARC_86940_SER_STAT_TXRDY (1<<0) + +#define HAL_SPARC_86940_CHIP_ASI 4 +#define HAL_SPARC_86940_CHIP_BASE 0x10000000 +#define HAL_SPARC_86940_REGADDR_SHIFT 2 +#define HAL_SPARC_86940_REGVAL_SHIFT 16 + +/*---------------------------------------------------------------------------*/ +/* Register addresses */ + +// The "interesting" IO parts are in Address Space Four: +#define HAL_SPARC_ASI_4_READ( addr, res ) \ + asm volatile( \ + "lda [ %1 ] 4, %0" \ + : "=r"(res) \ + : "r"(addr) \ + ); + +#define HAL_SPARC_ASI_4_WRITE( addr, val ) \ + asm volatile( \ + "sta %0, [ %1 ] 4" \ + : \ + : "r"(val),"r"(addr) \ + ); + +#define HAL_SPARC_86940_BASE (0x10000000) // in ASI 4 + +// The 86940 is connected to the upper 16 bits! +#define HAL_SPARC_86940_READ( reg, result ) CYG_MACRO_START \ + cyg_uint32 hires; \ + HAL_SPARC_ASI_4_READ( reg + HAL_SPARC_86940_BASE, hires ); \ + hires >>= 16; \ + result = hires; \ +CYG_MACRO_END + +// THIS IS ONLY HERE FOR DEBUGGING: +// The 86940 is connected to the upper 16 bits! +// And seems to be an unreliable deprecated thing... +// so read it 3 times and believe the majority. +#define HAL_SPARC_86940_READ3( reg, result ) CYG_MACRO_START \ + cyg_uint32 hires1; \ + cyg_uint32 hires2; \ + cyg_uint32 hires3; \ + HAL_SPARC_ASI_4_READ( reg + HAL_SPARC_86940_BASE, hires1 ); \ + HAL_SPARC_ASI_4_READ( reg + HAL_SPARC_86940_BASE, hires2 ); \ + HAL_SPARC_ASI_4_READ( reg + HAL_SPARC_86940_BASE, hires3 ); \ + result = ((hires1&hires2)|(hires1&hires3)|(hires2&hires3)) >> 16; \ +CYG_MACRO_END + +#define HAL_SPARC_86940_WRITE( reg, value ) CYG_MACRO_START \ + cyg_uint32 hival = (value) << 16; \ + HAL_SPARC_ASI_4_WRITE( reg + HAL_SPARC_86940_BASE, hival ); \ +CYG_MACRO_END + +// Registers are at word offsets +#define HAL_SPARC_86940_REG_SDTR0_TXDATA ( 0x08 * 4 ) +#define HAL_SPARC_86940_REG_SDTR0_RXDATA ( 0x08 * 4 ) +#define HAL_SPARC_86940_REG_SDTR0_STAT ( 0x09 * 4 ) +#define HAL_SPARC_86940_REG_SDTR0_CTRL ( 0x09 * 4 ) +#define HAL_SPARC_86940_REG_SDTR1_TXDATA ( 0x0c * 4 ) +#define HAL_SPARC_86940_REG_SDTR1_RXDATA ( 0x0c * 4 ) +#define HAL_SPARC_86940_REG_SDTR1_STAT ( 0x0d * 4 ) +#define HAL_SPARC_86940_REG_SDTR1_CTRL ( 0x0d * 4 ) + +#define HAL_SPARC_86940_REG_PRS0 ( 0x10 * 4 ) +#define HAL_SPARC_86940_REG_TCR0 ( 0x11 * 4 ) +#define HAL_SPARC_86940_REG_RELOAD0 ( 0x12 * 4 ) +#define HAL_SPARC_86940_REG_CNT0 ( 0x13 * 4 ) +#define HAL_SPARC_86940_REG_PRS1 ( 0x14 * 4 ) +#define HAL_SPARC_86940_REG_TCR1 ( 0x15 * 4 ) +#define HAL_SPARC_86940_REG_RELOAD1 ( 0x16 * 4 ) +#define HAL_SPARC_86940_REG_CNT1 ( 0x17 * 4 ) +#define HAL_SPARC_86940_REG_TCR2 ( 0x19 * 4 ) +#define HAL_SPARC_86940_REG_RELOAD2 ( 0x1A * 4 ) +#define HAL_SPARC_86940_REG_CNT2 ( 0x1B * 4 ) +#define HAL_SPARC_86940_REG_TCR3 ( 0x1D * 4 ) +#define HAL_SPARC_86940_REG_RELOAD3 ( 0x1E * 4 ) +#define HAL_SPARC_86940_REG_CNT3 ( 0x1F * 4 ) + +// Glue together to access them neatly +#define HAL_SPARC_86940_SDTR0_TXDATA_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_SDTR0_TXDATA, v ) +#define HAL_SPARC_86940_SDTR0_RXDATA_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_SDTR0_RXDATA, r ) + +#define HAL_SPARC_86940_SDTR0_STAT_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_SDTR0_STAT, r ) +#define HAL_SPARC_86940_SDTR0_CTRL_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_SDTR0_CTRL, v ) + +#define HAL_SPARC_86940_SDTR1_TXDATA_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_SDTR1_TXDATA, v ) +#define HAL_SPARC_86940_SDTR1_RXDATA_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_SDTR1_RXDATA, r ) + +#define HAL_SPARC_86940_SDTR1_STAT_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_SDTR1_STAT, r ) +#define HAL_SPARC_86940_SDTR1_CTRL_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_SDTR1_CTRL, v ) + +#define HAL_SPARC_86940_PRS0_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_PRS0, r ) +#define HAL_SPARC_86940_PRS0_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_PRS0, v ) + +#define HAL_SPARC_86940_TCR0_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TCR0, r ) +#define HAL_SPARC_86940_TCR0_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TCR0, v ) + +#define HAL_SPARC_86940_RELOAD0_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_RELOAD0, r ) +#define HAL_SPARC_86940_RELOAD0_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_RELOAD0, v ) + +#define HAL_SPARC_86940_CNT0_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_CNT0, r ) +#define HAL_SPARC_86940_CNT0_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_CNT0, v ) + +#define HAL_SPARC_86940_PRS1_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_PRS1, r ) +#define HAL_SPARC_86940_PRS1_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_PRS1, v ) + +#define HAL_SPARC_86940_TCR1_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TCR1, r ) +#define HAL_SPARC_86940_TCR1_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TCR1, v ) + +#define HAL_SPARC_86940_RELOAD1_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_RELOAD1, r ) +#define HAL_SPARC_86940_RELOAD1_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_RELOAD1, v ) + +#define HAL_SPARC_86940_CNT1_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_CNT1, r ) +#define HAL_SPARC_86940_CNT1_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_CNT1, v ) + +#define HAL_SPARC_86940_TCR2_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TCR2, r ) +#define HAL_SPARC_86940_TCR2_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TCR2, v ) + +#define HAL_SPARC_86940_RELOAD2_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_RELOAD2, r ) +#define HAL_SPARC_86940_RELOAD2_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_RELOAD2, v ) + +#define HAL_SPARC_86940_CNT2_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_CNT2, r ) +#define HAL_SPARC_86940_CNT2_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_CNT2, v ) + +#define HAL_SPARC_86940_TCR3_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_TCR3, r ) +#define HAL_SPARC_86940_TCR3_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_TCR3, v ) + +#define HAL_SPARC_86940_RELOAD3_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_RELOAD3, r ) +#define HAL_SPARC_86940_RELOAD3_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_RELOAD3, v ) + +#define HAL_SPARC_86940_CNT3_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_CNT3, r ) +#define HAL_SPARC_86940_CNT3_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_CNT3, v ) + +/*---------------------------------------------------------------------------*/ +/* end of hal_hwio.h */ +#endif /* CYGONCE_HAL_HAL_HWIO_H */ diff --git a/packages/hal/sparclite/sleb/current/include/hal_xpic.h b/packages/hal/sparclite/sleb/current/include/hal_xpic.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/hal_xpic.h @@ -0,0 +1,200 @@ +#ifndef CYGONCE_HAL_XPIC_H +#define CYGONCE_HAL_XPIC_H + +//============================================================================= +// +// hal_xpic.h +// +// HAL eXternal Programmable Interrupt Controller support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas, hmt +// Contributors: nickg, gthomas, hmt +// Date: 1999-01-28 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// an external interrupt controller, and which interrupt is +// used for what. +// +// Usage: +// #include // which includes this file +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include // HAL_SPARC_86940_READ/WRITE + +//----------------------------------------------------------------------------- +// Interrupt controller access +// +// In the Fuitsu SPARClite Evaluation Boards, when the external IRC (86940) +// is used (set Switch 1, position 8 (SW1#8)), interrupts are as follows: +// +// 15 : NMI Push Switch (SW7) +// 14 : N_INT# Ethernet LAN Controller (MB86964) +// 13 : EX_IRQ13 from expansion board, active HIGH +// 12 : EX_IRQ12 from expansion board, active LOW +// 11 : EX_IRQ11 from expansion board, active LOW +// 10 : RRDY0 Serial CH0 receive ready signal +// 9 : TRDY0 Serial CH0 transmit ready signal +// 8 : TIMER1 Timer 1 output counter +// 7 : RRDY1 Serial CH1 receive ready signal +// 6 : TRDY1 Serial CH1 transmit ready signal +// 5 : EX_IRQ5 from expansion board, active LOW +// 4 : EX_IRQ4 from expansion board, active LOW +// 3 : EX_IRQ3 from expansion board, active HIGH +// 2 : EX_IRQ2 from expansion board, active LOW +// 1 : TIMER2 Timer 2 output counter + +// The vector used by the Real time clock + +//#define CYG_VECTOR_RTC CYG_VECTOR_INTERRUPT_8 +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTERRUPT_8 + +#define HAL_SPARC_86940_REG_IRC_TRGM0 ( 0 * 4 ) +#define HAL_SPARC_86940_REG_IRC_TRGM1 ( 1 * 4 ) +#define HAL_SPARC_86940_REG_IRC_RQSNS ( 2 * 4 ) +#define HAL_SPARC_86940_REG_IRC_RQCLR ( 3 * 4 ) +#define HAL_SPARC_86940_REG_IRC_IMASK ( 4 * 4 ) +#define HAL_SPARC_86940_REG_IRC_CLIRL ( 5 * 4 ) + +#define HAL_SPARC_86940_FLAG_CLIRL_CL (0x10) + +#define HAL_SPARC_86940_IRC_IMASK_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_IMASK, r ) + +#define HAL_SPARC_86940_IRC_IMASK_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_IMASK, v ) + +#define HAL_SPARC_86940_IRC_RQSNS_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_RQSNS, r ) + +#define HAL_SPARC_86940_IRC_RQCLR_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_RQCLR, v ) + +#define HAL_SPARC_86940_IRC_CLIRL_READ( r ) \ + HAL_SPARC_86940_READ( HAL_SPARC_86940_REG_IRC_CLIRL, r ) + +#define HAL_SPARC_86940_IRC_CLIRL_WRITE( v ) \ + HAL_SPARC_86940_WRITE( HAL_SPARC_86940_REG_IRC_CLIRL, v ) + +//----------------------------------------------------------------------------- + +#define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_, _mask_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_SPARC_86940_IRC_IMASK_READ( _mask_ ); \ + _mask_ |= (1 << (_vector_) ); \ + HAL_SPARC_86940_IRC_IMASK_WRITE( _mask_ ); \ + HAL_SPARC_86940_IRC_RQCLR_WRITE( (1 << (_vector_) ) ); \ + HAL_SPARC_86940_IRC_CLIRL_WRITE( HAL_SPARC_86940_FLAG_CLIRL_CL ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +#define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_, _mask_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_SPARC_86940_IRC_IMASK_READ( _mask_ ); \ + _mask_ &=~ (1 << (_vector_) ); \ + HAL_SPARC_86940_IRC_IMASK_WRITE( _mask_ ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START \ + cyg_uint32 _traps_; \ + cyg_uint32 _req_, _irl_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + HAL_SPARC_86940_IRC_RQCLR_WRITE( (1 << (_vector_) ) ); \ + do { \ + HAL_SPARC_86940_IRC_CLIRL_WRITE( HAL_SPARC_86940_FLAG_CLIRL_CL ); \ + HAL_SPARC_86940_IRC_RQSNS_READ( _req_ ); \ + HAL_SPARC_86940_IRC_CLIRL_READ( _irl_ ); \ + _req_ &= (1 << (_vector_)); /* if there really is a new intr */ \ + _irl_ &= 0x0f; /* then get out - else poll until */ \ + } while ( (!_req_) && (_irl_ == (_vector_)) ); /* no intr here */ \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +// Set an interrupt source's sensitivity: +// _level_ != 0 ? level-sensitive : edge-sensitive +// _up_ != 0 ? high/up : low/down +// SPARClite's 86940 has values as follows: +// 0 : high level +// 1 : low level +// 2 : rising edge +// 3 : falling edge +// TRGM0 controls sources 15-8, TRGM1 sources 7-1. + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) CYG_MACRO_START \ + int _reg_ = (8 > (_vector_)) ? HAL_SPARC_86940_REG_IRC_TRGM1 \ + : HAL_SPARC_86940_REG_IRC_TRGM0; \ + int _val_, _myvect_ = (_vector_); \ + cyg_uint32 _traps_; \ + HAL_DISABLE_TRAPS( _traps_ ); \ + (_myvect_) &= 7; \ + (_myvect_) <<= 1; \ + HAL_SPARC_86940_READ( _reg_, _val_ ); \ + _val_ &=~ (3 << (_myvect_)); \ + _val_ |= ( ((_level_) ? 0 : 2) + ((_up_) ? 0 : 1) ) << (_myvect_); \ + HAL_SPARC_86940_WRITE( _reg_, _val_ ); \ + HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ); \ + HAL_RESTORE_INTERRUPTS( _traps_ ); \ +CYG_MACRO_END + +// This is not a standard macro - platform dependent for debugging only: +// o level, up tell you how this source was configured as above. +// o hipri returns the number of the highest prio requesting interrupt +// o mask tells you whether this source is masked off +// o req tells you whether this source is requesting right now. +#define HAL_INTERRUPT_QUERY_INFO( _vector_, _level_, _up_, \ + _hipri_, _mask_, _req_ ) CYG_MACRO_START \ + int _reg_ = (8 > (_vector_)) ? HAL_SPARC_86940_REG_IRC_TRGM1 \ + : HAL_SPARC_86940_REG_IRC_TRGM0; \ + int _val_, _myvect_ = (_vector_); \ + HAL_SPARC_86940_IRC_IMASK_READ( _val_ ); \ + _mask_ = (0 != ((1 << (_vector_)) & _val_ )); \ + HAL_SPARC_86940_IRC_RQSNS_READ( _val_ ); \ + _req_ = (0 != ((1 << (_vector_)) & _val_ )); \ + HAL_SPARC_86940_IRC_CLIRL_READ( _hipri_ ); \ + (_myvect_) &= 7; \ + (_myvect_) <<= 1; \ + HAL_SPARC_86940_READ( _reg_, _val_ ); \ + _val_ >>= (_myvect_); \ + (_level_) = !(_val_ & 2); \ + (_up_) = !(_val_ & 1); \ +CYG_MACRO_END + +// This may set the priority of a vector to a particular level: +// SPARClite does not support this. +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) /* nothing */ + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_XPIC_H +// End of hal_xpic.h diff --git a/packages/hal/sparclite/sleb/current/include/halboot.si b/packages/hal/sparclite/sleb/current/include/halboot.si new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/halboot.si @@ -0,0 +1,500 @@ +#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */ +#define CYGONCE_HAL_HALBOOT_SI +// ==================================================================== +// +// /halboot.si +// +// HAL bootup platform-oriented code (assembler) +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 1999-02-01 +// Purpose: Bootup code, platform oriented. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// External Platform Initial Setup +// +// This should set up RAM and caches, and calm down any external +// interrupt sources. +// +// It is just plain included in vectors.S +// +// RAM has not yet been touched at all; in fact all you have is a +// register window selected. + + +#ifdef CYG_HAL_STARTUP_RAM + ! copy the real instructions into the vector: + rd %tbr, %g1 + andn %g1, 0xfff, %g1 ! clear non-address bits + set real_vector_instructions, %l0 + ld [ %l0 ], %l1 + st %l1, [ %g1 ] ! into the vector + ld [ %l0 + 4 ], %l1 + st %l1, [ %g1 + 4 ] ! into the vector + ! then invalidate the instruction cache: + set 3, %l0 + set 0x00001000, %l1 + set 0x80001000, %l2 + sta %l0, [ %l1 ] 0x0c + sta %l0, [ %l2 ] 0x0c + ! and the data cache + sta %l0, [ %l1 ] 0x0e + sta %l0, [ %l2 ] 0x0e + nop + nop + nop + nop ! should be enough +#endif // CYG_HAL_STARTUP_RAM + + +#include // a copy of CygMon~s cpu.h + + +/* Address of clock switch */ +#define CLKSW_ADDR 0x01000003 + +/* Address of SW1 */ +#define SW1_ADDR 0x02000003 + +/* Address of LED bank */ +#define LED_ADDR 0x02000003 + +#define SRAM_BASE 0x30000000 +#define SRAM_END 0x30080000 + + +#define DRAM_BASE 0x04000000 /* base of system DRAM */ +#define CS3_BASE 0x00000000 /* base of internal resource regs */ +#define CS3_ASI 7 /* ASI of internal resource regs */ + +// DRAM_BASE2 is defined so that we run the same RAM-sizing code in both +// RAM and ROM startup versions; but the RAM startup one starts RAM sizing +// at 0x043ff000 ie. 4k down from the top of the 4M available. + +#ifdef CYG_HAL_STARTUP_RAM +#define DRAM_BASE2 DRAM_BASE + 0x00400000 - 0x1000 +#else +#define DRAM_BASE2 DRAM_BASE +#endif + + .macro led val + sethi %hi(LED_ADDR),%l7 + set \val,%l6 + not %l6, %l6 + stb %l6,[%l7 + %lo(LED_ADDR)] + .endm + + /* + * First, setup chip selects. + * + * NB: The AMR_VAL macro actually inverts the mask bits. For me, it is + * more natural to write a 1 bit where I want the address compared. + * The sparc registers use 0 bits, instead. + */ + + /* -CS0 ADDR_MASK:0xfc000000 ASI_MASK:0xfc */ + set AMR_VAL(0xfc,0xfc000000),%l0 + mov AMR0,%l1 + sta %l0,[%l1] 1 + + /* -CS1 BASE:0x10000000 ASI:4 */ + set ARSR_VAL(4,0x10000000),%l0 + mov ARSR1,%l1 + sta %l0,[%l1] 1 + /* -CS1 ADDR MASK:0xf0000000 ASI MASK:0x7 */ + set AMR_VAL(7,0xf0000000),%l0 + mov AMR1,%l1 + sta %l0,[%l1] 1 + + /* -CS2 BASE:0x20000000 ASI:4 */ + set ARSR_VAL(4,0x20000000), %l0 + mov ARSR2,%l1 + sta %l0,[%l1] 1 + /* -CS2 ADDR MASK:0xf0000000 ASI MASK:0x7 */ + set AMR_VAL(7,0xf0000000),%l0 + mov AMR2,%l1 + sta %l0,[%l1] 1 + + /* -CS3 BASE:CS3_BASE ASI:CS3_ASI */ + set ARSR_VAL(CS3_ASI,CS3_BASE),%l0 + mov ARSR3,%l1 + sta %l0,[%l1] 1 + /* -CS3 ADDR MASK:0xffff0000 ASI MASK:0x7 */ + set AMR_VAL(7,0xffff0000),%l0 + mov AMR3,%l1 + sta %l0,[%l1] 1 + + /* -CS4 BASE: DRAM_BASE ASI:0xb */ + set ARSR_VAL(0xb,DRAM_BASE),%l0 + mov ARSR4,%l1 + sta %l0,[%l1] 1 + /* -CS4 ADDR MASK:0xfc000000 ASI MASK:0xfc */ + set AMR_VAL(0xfc,0xfc000000),%l0 + mov AMR4,%l1 + sta %l0,[%l1] 1 + + /* -CS5 BASE:0x30000000 ASI:0xb */ + set ARSR_VAL(0xb,0x30000000),%l0 + mov ARSR5,%l1 + sta %l0,[%l1] 1 + /* -CS5 ADDR MASK:0xfff80000 ASI MASK:0xfc */ + set AMR_VAL(0xfc,0xfff80000),%l0 + mov AMR5,%l1 + sta %l0,[%l1] 1 + + + /* + * Setup wait states. Each wait state register sets the wait states for + * a pair of chip selects. The lower bits hold the wait state info for + * the lower numbered chip select. + */ + + /* -CS0: 5 wait states, -CS1: 7 wait states */ +// set WSSR_VAL(7,7,WSSR_WAITEN,5,5,WSSR_WAITEN),%l0 +// set WSSR_VAL(4,4,WSSR_WAITEN,5,5,WSSR_WAITEN),%l0 // FOUR -> CS1 + set WSSR_VAL(10,10,WSSR_WAITEN,5,5,WSSR_WAITEN),%l0 // TEN -> CS1 + mov WSSR0,%l1 + sta %l0,[%l1] 1 + + /* -CS2: wait states disabled, -CS3: wait states disabled */ + set WSSR_VAL(0,0,0,0,0,0),%l0 + mov WSSR1,%l1 + sta %l0,[%l1] 1 + + /* -CS4: wait states disabled, -CS5: 0 wait states */ + set WSSR_VAL(0,0,WSSR_WAITEN|WSSR_OVERRIDE,0,0,0),%l0 + mov WSSR2,%l1 + sta %l0,[%l1] 1 + + led 0x10 + + /* clear cache/BIU control register */ + mov CBIR,%l1 + sta %g0,[%l1] 1 + + /* Read clock switch to determine the value of the refresh timer */ + sethi %hi(CLKSW_ADDR),%l1 + ldub [%l1 + %lo(CLKSW_ADDR)],%l0 + btst 0x80,%l0 + bne,a 1f + mov 10,%l0 /* force to 10MHz if CLKSW-8 is ON */ + 1: + umul %l0,15,%l0 + mov DRLD,%l1 + sta %l0,[%l1] 1 + mov REFTMR,%l1 + sta %l0,[%l1] 1 + + /* read SW1 to get DRAM page size */ + sethi %hi(SW1_ADDR),%l1 + ldub [%l1 + %lo(SW1_ADDR)],%l0 + btst 0x10,%l0 + be,a 1f + mov 0x0e,%l0 /* 1K page if branch taken (SW1-5 is OFF) */ + mov 0x06,%l0 /* 2K page (SW1-5 is OFF) */ + 1: + mov SPGMR,%l1 + sta %l0,[%l1] 1 + + led 0x20 + +#ifdef CYG_HAL_STARTUP_ROM + /* Turn on all system services */ + mov SSCR_TIMER|SSCR_WAIT|SSCR_CS|SSCR_SAMEPG,%l0 + mov SSCR,%l1 + sta %l0,[%l1] 1 + nop + nop + nop + nop + +#endif + + led 0x30 + + /* + * Initialize caches. + */ + sethi %hi(0x1000),%l0 /* bank 1 invalidate */ + sethi %hi(0x80000000),%l1 /* bank 2 invalidate */ + mov 3,%l2 /* clear lock, lru, and valid bits */ + sta %l2,[%l0] 0xc /* do it - icache bank 1 */ + sta %l2,[%l0] 0xe /* do it - dcache bank 1 */ + sta %l2,[%l0 + %l1] 0xc /* do it - icache bank 2 */ + sta %l2,[%l0 + %l1] 0xe /* do it - dcache bank 2 */ + + /* now, enable caches and buffers */ + mov CBIR_ICEN|CBIR_DCEN|CBIR_PBEN|CBIR_WBEN,%l0 + mov CBIR,%l1 + sta %l0,[%l1] 1 + nop + nop + nop + nop + + /* enable data and insn bursts */ + mov BCR_IBE|BCR_DBE,%l0 + mov BCR,%l1 + sta %l0,[%l1] 1 + nop + nop + nop + nop + + /* + * DRAM setup/test. + */ + led 0x40 + + /* + * Test SW1-7 to determine normal or EDO mode. + * SW1-7 ON = EDO + * SW1-7 OFF = Normal. + */ + sethi %hi(SW1_ADDR),%l1 + ldub [%l1 + %lo(SW1_ADDR)],%l7 + mov DBANKR_SA04,%l0 /* DRAM starts at 0x04000000 */ + btst 0x40,%l7 + bne 1f /* branch if SW1-7 is OFF */ + mov SSCR_DRAM,%l1 + /* EDO DRAM, enable burst in SSCR and EDO in DBANKR */ + or %l1,SSCR_BURST,%l1 + or %l0,DBANKR_EDO,%l0 + 1: + /* + * Now, test SW1 to get DRAM page and bank size. + * SW1-5 ON = 2k page, 16MB bank. (up to 64MB total) + * SW1-5 OFF = 1k page, 4MB bank. (up to 16MB total) + */ + btst 0x10,%l7 + bne,a 1f /* branch if OFF */ + or %l0,DBANKR_4M|DBANKR_CA10,%l0 /* 1K page */ + or %l0,DBANKR_16M|DBANKR_CA11,%l0 /* 2K page */ + 1: + mov CS3_BASE+DBANKR,%l2 + sta %l0,[%l2] CS3_ASI + + mov DTIMR_RPS2|DTIMR_CBR3|DTIMR_CAS2|DTIMR_RP2,%l0 + mov CS3_BASE+DTIMR,%l2 + sta %l0,[%l2] CS3_ASI + + mov SSCR,%l2 + lda [%l2] 1, %l0 + or %l0,%l1,%l0 + sta %l0,[%l2] 1 + + /* + * Test SW1 to get potential DRAM limit. + * SW1-5 ON = 2k page, up to 64MB total + * SW1-5 OFF = 1k page, up to 16MB total + */ + btst 0x10,%l7 + bne,a 1f /* branch if OFF */ + sethi %hi(DRAM_BASE + 16*1024*1024),%l0 + sethi %hi(DRAM_BASE + 64*1024*1024),%l0 + 1: + + /* subtract 4 to get last valid DRAM address */ + add %l0,-4,%l0 + + /* Assume maximim memory and fill with pattern */ + set DRAM_BASE2,%l2 + set 0xaaaaaaaa,%l3 + 1: + st %l3,[%l2] + cmp %l2,%l0 + blt 1b + add %l2,4,%l2 + + /* + * Go back, read data and compare with written data. + * Fill in with zero as we go along. + */ + set DRAM_BASE2,%l2 + 1: + ld [%l2],%l4 + cmp %l4,%l3 + bne 2f + st %g0,[%l2] + cmp %l2,%l0 + blt,a 1b + add %l2,4,%l2 + 2: + led 0x50 + + sub %l2,64,%i6 + sethi %hi(DRAM_BASE),%l1 + sub %l2,%l1,%l0 + st %l0,[%i6] + +// NOTE that here, the frame pointer is set up to the top of RAM minus a +// little bit with the size of RAM at %fp (%i6) + +#ifdef CYG_HAL_STARTUP_ROM + + led 0x58 + + ! copy the trampoline code into the base of RAM + ! including the two ~rogue~ instructions... + .extern .data + sethi %hi(.data), %l0 ! get the start of RAM + andn %l0, 0xfff, %l0 + set rom_vectors, %l1 ! get the start of the trampoline + set rom_vectors_end, %l2 ! ...and its end. +33: + ldd [ %l1 ], %l4 ! also uses %l5 + std %l4, [ %l0 ] + inc 8, %l1 + inc 8, %l0 + cmp %l1, %l2 + bl 33b + nop + + led 0x59 + + sethi %hi(.data), %g1 ! get the start of RAM + andn %g1, 0xfff, %g1 + set real_vector_instructions, %l0 + ld [ %l0 ], %l1 + st %l1, [ %g1 ] ! into the vector + ld [ %l0 + 4 ], %l1 + st %l1, [ %g1 + 4 ] ! into the vector + + led 0x5a + + ! then invalidate the instruction cache: + set 3, %l0 + set 0x00001000, %l1 + set 0x80001000, %l2 + sta %l0, [ %l1 ] 0x0c + sta %l0, [ %l2 ] 0x0c + + led 0x5b + + ! and the data cache + sta %l0, [ %l1 ] 0x0e + sta %l0, [ %l2 ] 0x0e + nop + nop + nop + nop ! should be enough + + led 0x5c + + ! and (re)set the tbr, finally. + sethi %hi(.data), %g1 + andn %g1, 0xfff, %g1 + wr %g1, %tbr ! Traps are at RAM start + nop + nop + nop + + led 0x5d + +#else + + led 0x5f + +#endif // CYG_HAL_STARTUP_ROM + + ! turn on caches - copied from the book +#define set_size 64 +#define ini_tag 0 +#define adr1 0x00000000 +#define adr2 0x80000000 +#define step 16 +#define CTL_BITS 0x35 + + set set_size, %l7 + set adr1, %o1 + set adr2, %o2 + set ini_tag, %l0 +10: + sta %l0, [ %o1 ] 0x0c + sta %l0, [ %o1 ] 0x0e + sta %l0, [ %o2 ] 0x0c + sta %l0, [ %o2 ] 0x0e + add %o1, step, %o1 + subcc %l7, 1, %l7 + bne 10b + add %o2, step, %o2 + + set 0, %l1 + set CTL_BITS, %l2 + sta %l2, [ %l1 ] 0x01 + nop + nop + nop + nop ! delay to let caches stabilize + + led 0x60 + + // Now set up the 86940 + +#define TRGM0 0 +#define TRGM1 4 +#define REQSNS 8 +#define REQCLR 12 +#define IMASK 16 +#define IRLAT 20 +#define IMODE 24 + + sethi %hi( 0x10000000 ), %l1 ! base address of the 86940 companion + + set 0xfffe0000, %l4 ! mask all intrs + add %l1, IMASK, %l3 + sta %l4, [ %l3 ] 4 + + set 0x11400000, %l6 ! Channels 14,12,11 into Active Low + add %l1, TRGM0, %l3 + sta %l6, [ %l3 ] 4 + + set 0x05100000, %l6 ! Channels 5,4,2 into Active Low + add %l1, TRGM1, %l3 + sta %l6, [ %l3 ] 4 + + add %l1, REQCLR, %l3 ! clear all pending intrs + sta %l4, [ %l3 ] 4 + + set 0x00100000, %l6 ! clear the latch + add %l1, IRLAT, %l3 + sta %l6, [ %l3 ] 4 + + nop + nop + nop + + led 0x70 + +#endif /* CYGONCE_HAL_HALBOOT_SI */ +/* EOF halboot.si */ diff --git a/packages/hal/sparclite/sleb/current/include/pkgconf/hal_sparclite_sleb.h b/packages/hal/sparclite/sleb/current/include/pkgconf/hal_sparclite_sleb.h new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/hal_sparclite_sleb.h @@ -0,0 +1,131 @@ +#ifndef CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H +#define CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H +// ==================================================================== +// +// pkgconf/hal_sparclite_sim.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): bartv +// Contributors: bartv, hmt +// Date: 1998-09-02 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_SPARCLITE_SLEB { + display "SPARClite MB8683x evaluation board" + type radio + parent CYGPKG_HAL_SPARCLITE + platform sleb + description " + The SPARClite evaluation board HAL package is provided for use + with the Fujitsu MB8683x boards." + } + + cdl_option CYGHWR_HAL_SPARCLITE_SLEB_STARTUP { + display "Startup type" + parent CYGPKG_HAL_SPARCLITE_SLEB + #type count + type enum + legal_values ram rom + startup + description " + When targetting the SPARClite Evaluation Board it is possible to + build the system for either RAM bootstrap or ROM bootstrap. The + former generally requires that the board is equipped with ROMs + containing the Cygmon ROM monitor or equivalent software that + allows gdb to download the eCos application on to the board. The + latter typically requires that the eCos application be blown + into EPROMs or equivalent technology." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_SPARCLITE_SLEB_STARTUP ram + +/* -------------------------------------------------------------------*/ +// The following are NOT config options for now: support for the native +// Fujitsu ROMs is not a requirement, just a handy thing to have: + +#ifdef CYG_HAL_STARTUP_RAM +// then there is a ROM Monitor of some sort: + +// CYG_HAL_USE_ROM_MONITOR_CYGMON: +// This is defined by default to allow interworking with CygMon and thus +// GDB so that Breakpoints and ^C interrupts and the like work. +// +// Undefine it if building to run with the native Fujitsu boot proms (NOT +// CYGMON) ie. a "load-and-go" type startup by means of +// (gdb) target sparclite udp sleb0 +// or +// (gdb) target sparclite serial /dev/ttyS0 +// as opposed to the CygMon way: +// (gdb) set remotebaud 19200 +// (gdb) target remote /dev/ttyS0 +// +// Such builds will load-and-go when using CygMon, but load-and-go is all +// the interaction you get. + +#define CYG_HAL_USE_ROM_MONITOR_CYGMON + +// If using CygMon it's generally helpful to wrap output characters in the +// GDB protocol as $O packets; CYG_KERNEL_DIAG_GDB enables this by means of +// calling into CygMon through the vectors provided; this therefore also +// works with eg. ethernet debugging. +// +// Disable CYG_KERNEL_DIAG_GDB and output goes direct, in clear, to +// serial port 0 (CON1). + +#ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON +#define CYG_KERNEL_DIAG_GDB +#endif + +// However, you might want to force GDB-encoded output to the serial port +// NOT using CygMon to perform the formatting; this is really only here as +// a debugging option, in case GDB is behaving oddly. Define +// CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT + CYG_KERNEL_DIAG_GDB to make GDB $O +// packets come out the serial port (CON1) + +#ifdef CYG_KERNEL_DIAG_GDB +#undef CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT +#endif + + +#endif // CYG_HAL_STARTUP_RAM + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H */ +/* EOF hal_sparclite_sim.h */ diff --git a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.ldi b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.ldi @@ -0,0 +1,47 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 10:41:43 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +MEMORY +{ + ram : ORIGIN = 0x04010000, LENGTH = 0x3f0000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x4010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.mlt b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 4010000 3f0000 0 ! +section rom_vectors 0 4 0 1 1 1 1 1 4010000 4010000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 8 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 8 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 8 0 1 0 0 0 0 ! diff --git a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.ldi b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.ldi @@ -0,0 +1,52 @@ +//=========================================================================== +// +// MLT linker script export - Wed Jan 13 10:41:43 1999 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// Leave 512 bytes free at the start of RAM for trampoline code to be +// copied in from the vectors. +// There is no nice way of automating the choice of size for this. + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x020000 + ram : ORIGIN = 0x04000200, LENGTH = 0x3ffe00 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x0, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data (ram, 0x4000200, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTIONS_END +} diff --git a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.mlt b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region rom 0 20000 1 ! +region ram 4000200 3ffe00 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 0 0 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 8 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 8 0 1 0 0 0 1 data ! +section data 0 1 1 1 1 1 0 0 4000200 bss ! +section bss 0 8 0 1 0 0 0 0 ! diff --git a/packages/hal/sparclite/sleb/current/src/PKGconf.mak b/packages/hal/sparclite/sleb/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/src/PKGconf.mak @@ -0,0 +1,42 @@ +#=============================================================================== +# +# makefile +# +# hal/sparclite/sim/src +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + + +PACKAGE := hal_sparclite_sleb +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_priv.c hal_cygm.S hal_diag.c +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/hal/sparclite/sleb/current/src/hal_cygm.S b/packages/hal/sparclite/sleb/current/src/hal_cygm.S new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/src/hal_cygm.S @@ -0,0 +1,217 @@ +/*============================================================================= +// +// hal_cygm.S +// +// SPARClite and CygMon play nice: vector service routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//###COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1998-02-24 +// Purpose: SPARClite vectors for interworking with CygMon +// Description: see vectors.S and hal_priv.c; these VSRs are installed to +// interwork with CygMon. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +!----------------------------------------------------------------------------- + + .file "hal_cygm.S" + +!----------------------------------------------------------------------------- + +#include +#include +#include +#include + +!------------------------------------------------------------------------ + +#include // eCos vector number et al +#include // CygMon vector number et al + +#define DELAYS_AFTER_WRPSR_SAME_WINDOW +#define DELAYS_AFTER_WRWIM + +!------------------------------------------------------------------------ + + .text + +!--------------------------------------------------------------------------- + +#ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON + + .global hal_user_trap_to_cygmon_vsr +hal_user_trap_to_cygmon_vsr: + ! here,locals have been set up as follows: + ! %l0 = psr (with this CWP/window-level in it) + ! %l1 = pc + ! %l2 = npc + ! %l3 = vector number (1-15 for interrupts) + ! and we are in our own register window, though it is likely that + ! the next one will need to be saved before we can use it: + ! ie. this one is the invalid register window. + + rd %tbr, %l4 ! Get the trap type + srl %l4, 4, %l4 ! into the bottom byte + and %l4, 0xff, %l4 ! actual trap number + + ! we deal with traps 1,3,8(+128) and 255 here. + ! ta 1 => tt 129 : breakpoint + ! ta 3 => tt 131 : flush windows (unneccessary, JIC) + ! ta 8 => tt 136 : syscall (apparently) + ! ta 127 -OR- Debug Support Unit trap + ! => tt 255 : debug trap + ! others bounce through to eCos handler, of course. + + cmp %l4, 129 + beq bounce_to_cygmon + mov BSP_EXC_BREAK, %l5 + + ! ta 2 is a "skipped" breakpoint, we increment the PC, NPC + ! ourselves to permit continuation. + cmp %l4, 130 + bne 1f + nop + mov %l2, %l1 + add %l2, 4, %l2 + b bounce_to_cygmon + mov BSP_EXC_BREAK, %l5 + +1: + cmp %l4, 131 + beq bounce_to_cygmon + mov BSP_EXC_WINFLUSH, %l5 + + cmp %l4, 136 + beq bounce_to_cygmon + mov BSP_EXC_SYSCALL, %l5 + + cmp %l4, 255 + beq bounce_to_cygmon + mov BSP_EXC_DEBUG, %l5 + + ! if we are here, it~s not a recognized trap to feed to CygMon, so + ! call the eCos default trap VSR: + .extern hal_default_exception_vsr + ba hal_default_exception_vsr ! should be in range + nop ! does not return + + + .global hal_nofpcp_trap_to_cygmon_vsr +hal_nofpcp_trap_to_cygmon_vsr: + rd %tbr, %l4 ! Get the trap type + srl %l4, 4, %l4 ! into the bottom byte + and %l4, 0xff, %l4 ! actual trap number + ! we deal with trap types 4 and 36 here. + + cmp %l4, 4 + beq bounce_to_cygmon + mov BSP_EXC_FPDIS, %l5 + + cmp %l4, 36 + beq bounce_to_cygmon + mov BSP_EXC_CPDIS, %l5 + + ! we really should not be here otherwise, but for best debugging... + b bounce_to_cygmon + mov BSP_EXC_TRAP, %l5 + +bounce_to_cygmon: + ! here we have decided to jump over CygMon, the CygMon vector + ! number to use is in %l5. + set CYGMON_VECTOR_TABLE_BASE, %l6 + sll %l5, 2, %l5 ! to a word offset + ! our calling convention is the same, so... + ld [ %l6 + %l5 ], %l6 + jmp %l6 + nop + + +// Now a handler for INT15 (NMI) to assist in debugging; we have to ack and +// clear the interrupt, after waiting for the source to go away, I guess... + .global hal_nmi_handler +hal_nmi_handler: + ! here,locals have been set up as follows: + ! %l0 = psr (with this CWP/window-level in it) + ! %l1 = pc + ! %l2 = npc + ! %l3 = vector number (1-15 for interrupts) + ! and we are in our own register window, though it is likely that + ! the next one will need to be saved before we can use it: + ! ie. this one is the invalid register window. + +#define TRGM0 0 +#define TRGM1 4 +#define REQSNS 8 +#define REQCLR 12 +#define IMASK 16 +#define IRLAT 20 +#define IMODE 24 + +#define NMIBIT 0x80000000 + + sethi %hi( 0x10000000 ), %l4 ! base address of the 86940 companion + +10: + add %l4, REQCLR, %l5 ! Request clear register + set NMIBIT, %l6 + sta %l6, [ %l5 ] 4 ! Clear INT15 + + add %l4, REQSNS, %l5 ! Request sense register + lda [ %l5 ] 4, %l7 + andcc %l6, %l7, %g0 ! test the sense bit + + sethi %hi( 0x02000000 ), %l6 ! Pump it out to the LED + srl %l7, 24, %l7 + stb %l7, [ %l6 + 3 ] + + bne 10b ! poll until the request is gone + nop + nop + nop + + set 0x00100000, %l6 ! clear the latch + add %l4, IRLAT, %l5 + sta %l6, [ %l5 ] 4 + + nop + nop + nop + + b bounce_to_cygmon + mov BSP_EXC_INT15, %l5 + + + + + +#endif // CYG_HAL_USE_ROM_MONITOR_CYGMON + +! end of hal_cygm.S diff --git a/packages/hal/sparclite/sleb/current/src/hal_diag.c b/packages/hal/sparclite/sleb/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/src/hal_diag.c @@ -0,0 +1,316 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include +#include +#include +#include + +#include // base types + +#include +#include +#include + +#include + +/*---------------------------------------------------------------------------*/ + +#ifdef CYG_KERNEL_DIAG_GDB + +#ifdef CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT // then force $O packets to serial + +void hal_diag_init(void) +{ + // hal_diag_init_serial(); +} + +void hal_diag_write_char_serial( char c ) +{ + HAL_REORDER_BARRIER(); + HAL_DIAG_WRITE_CHAR_DIRECT( c ); + HAL_REORDER_BARRIER(); + HAL_DIAG_WRITE_CHAR_WAIT_FOR_EMPTY(); + HAL_REORDER_BARRIER(); +} + +void hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + while(1) + { + cyg_uint32 status, c1, tries; + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + status = 0; + tries = 1000000000; + while ( 0 == (HAL_SPARC_86940_FLAG_RXRDY & status) ) { + if ( 0 == --tries ) + break; + HAL_SPARC_86940_SDTR0_STAT_READ( status ); + } + if ( 0 == tries ) // then we broke out after waiting + continue; // the outer loop, send the packet + + HAL_SPARC_86940_SDTR0_RXDATA_READ( c1 ); + + // We must ack the interrupt caused by that read to avoid + // confusing the GDB stub ROM. + HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_VECTOR_INTERRUPT_10 ); + + if( c1 == '+' ) + break; // a good acknowledge + + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + asm volatile( "ta 2; nop; nop; nop" ); + break; + } + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } +} +#else // CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT not defined; use CygMon + +// All this code provided by MSalter - ta. + +struct bsp_comm_procs { + void *ch_data; + void (*__write)(void *ch_data, const char *buf, int len); + int (*__read)(void *ch_data, char *buf, int len); + void (*__putc)(void *ch_data, char ch); + int (*__getc)(void *ch_data); + int (*__control)(void *ch_data, int func, ...); +}; + +// This is pointed to by entry BSP_NOTVEC_BSP_COMM_PROCS: +typedef struct { + int version; /* version number for future expansion */ + void *__ictrl_table; + void *__exc_table; + void *__dbg_vector; + void *__kill_vector; + struct bsp_comm_procs *__console_procs; +} bsp_shared_t; + + +static int +hal_bsp_console_write(const char *p, int len) +{ + bsp_shared_t *shared; + struct bsp_comm_procs *com; + + shared = (bsp_shared_t *) + (CYGMON_VECTOR_TABLE[ BSP_NOTVEC_BSP_COMM_PROCS ]); + + com = shared->__console_procs; + + if (0 != com) { + com->__write(com->ch_data, p, len); + return 1; + } + return 0; +} + +static void +hal_dumb_serial_write(const char *p, int len) +{ + int i; + for ( i = 0 ; i < len; i++ ) { + HAL_DIAG_WRITE_CHAR_DIRECT( p[ i ] ); + } +} + + +void hal_diag_init(void) +{ +} + +void hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + if ( ! hal_bsp_console_write( line, pos ) ) + // then there is no function registered, just spew it out serial + hal_dumb_serial_write( line, pos ); + + pos = 0; + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } +} + +#endif // CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT not defined; use CygMon + +#else // CYG_KERNEL_DIAG_GDB not defined, so we are going to the serial line + // without GDB encoding - likely to be ROM startup. + +/* Address of clock switch */ +#define CLKSW_ADDR 0x01000003 + +/* Address of SW1 */ +#define SW1_ADDR 0x02000003 + +void hal_diag_init(void) +{ + cyg_uint32 clk, tval; + + // first set the baud rate + + clk = *(unsigned char *)CLKSW_ADDR; + if (clk & 0x80) + clk = 10; + + clk = (clk & 0x3f) * 1000000; /* in MHz */ + + tval = clk / 19200; + tval /= 32; + tval -= 1; + + HAL_SPARC_86940_TCR3_WRITE( + HAL_SPARC_86940_TCR_CE | + HAL_SPARC_86940_TCR_CLKINT | + HAL_SPARC_86940_TCR_OUTC3 | + HAL_SPARC_86940_TCR_SQWAVE ); + + HAL_SPARC_86940_RELOAD3_WRITE( tval); + +#define DELAY(x) \ + CYG_MACRO_START int i; for (i = 0; i < x; i++); CYG_MACRO_END + + HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); + DELAY(100); + HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); + DELAY(100); + HAL_SPARC_86940_SDTR0_CTRL_WRITE( 0 ); + DELAY(100); + + HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_CMD_IRST ); + DELAY(100); + + /* first write after reset is to mode register */ + HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_DIV16_CLK | + HAL_SPARC_86940_SER_8BITS | + HAL_SPARC_86940_SER_NO_PARITY | + HAL_SPARC_86940_SER_STOP1 ); + DELAY(100); + + /* subsequent writes are to command register */ + HAL_SPARC_86940_SDTR0_CTRL_WRITE( HAL_SPARC_86940_SER_CMD_RTS | + HAL_SPARC_86940_SER_CMD_DTR | + HAL_SPARC_86940_SER_CMD_EFR | + HAL_SPARC_86940_SER_CMD_RXEN | + HAL_SPARC_86940_SER_CMD_TXEN ); + DELAY(100); +} + + + + + +#endif // CYG_KERNEL_DIAG_GDB + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */ diff --git a/packages/hal/sparclite/sleb/current/src/hal_priv.c b/packages/hal/sparclite/sleb/current/src/hal_priv.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/src/hal_priv.c @@ -0,0 +1,208 @@ +//============================================================================= +// +// hal_priv.c +// +// SPARClite Architecture sim-specific private variables +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1998-12-10 +// Purpose: private vars for SPARClite sim. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + + +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CYGPKG_KERNEL +#include // CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT +#endif + +#include + +// ------------------------------------------------------------------------ +// Clock static to keep period recorded. +cyg_int32 cyg_hal_sparclite_clock_period = 0; + +/* Address of clock switch */ +#define CLKSW_ADDR 0x01000003 + +#define HAL_SPARC_86940_TIMER1_CONTROL_INIT ( \ + 0 | \ + HAL_SPARC_86940_TCR_CLKPRS | \ + HAL_SPARC_86940_TCR_OUTLOW ) + // Disable, CLKSEL=prescale(2), periodic interrupts, gate 0 + // and lower the output: OUTCTL = 2 + +#define HAL_SPARC_86940_TIMER1_CONTROL_ENABLE ( \ + HAL_SPARC_86940_TCR_CE | \ + HAL_SPARC_86940_TCR_CLKPRS | \ + HAL_SPARC_86940_TCR_OUTSAME ) + // Enable + .... and no change to the output: OUTCTL = 0 + +void hal_clock_initialize( cyg_uint32 p ) +{ + cyg_uint32 ints; + cyg_uint32 clk; + HAL_DISABLE_INTERRUPTS( ints ); + + HAL_SPARC_86940_TIMER1_CONTROL_WRITE( + HAL_SPARC_86940_TIMER1_CONTROL_INIT ); // Make sure it's disabled + + // Clear any pending interrupts: + HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_RTC ); + + clk = *(unsigned char *)CLKSW_ADDR; + if (clk & 0x80) + clk = 10; + + /* could be 10 - 62 MHz */ + clk = (clk & 0x3f); /* in MHz */ + // BUT the 86940 is internally clocked at half that speed (page 20 RHS) + clk >>= 1; + // so the clock is now the number of system ticks we want per counter + // tick... + HAL_SPARC_86940_TIMER1_PRESCALER_WRITE( + 0 /* internal clock */ | + HAL_SPARC_86940_PRS_ODIV1 | + clk ); + // should give 1MHz on the externally visible counter... + HAL_SPARC_86940_TIMER1_CONTROL_WRITE( + HAL_SPARC_86940_TIMER1_CONTROL_INIT ); + HAL_SPARC_86940_TIMER1_RELOAD_WRITE( p ); + HAL_SPARC_86940_TIMER1_CONTROL_WRITE( + HAL_SPARC_86940_TIMER1_CONTROL_ENABLE ); + HAL_SPARC_86940_TIMER1_RELOAD_WRITE( p ); + cyg_hal_sparclite_clock_period = p; + HAL_RESTORE_INTERRUPTS( ints ); +} + +// ------------------------------------------------------------------------ + +#ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON +#include // CygMon vector table & layout + +static struct { int eCosV, CygMonV; } setup[] = { + { CYGNUM_HAL_VECTOR_OTHERS , BSP_EXC_TRAP }, + { CYGNUM_HAL_VECTOR_FETCH_ABORT , BSP_EXC_IACCESS }, + { CYGNUM_HAL_VECTOR_ILLEGAL_OP , BSP_EXC_ILL }, + { CYGNUM_HAL_VECTOR_PRIV_OP , BSP_EXC_IPRIV }, + { CYGNUM_HAL_VECTOR_UNALIGNED , BSP_EXC_ALIGN }, + { CYGNUM_HAL_VECTOR_DATA_ABORT , BSP_EXC_DACCESS }, +}; + +#endif // CYG_HAL_USE_ROM_MONITOR_CYGMON + +// ------------------------------------------------------------------------ +// Board specific startups. + +extern void hal_board_prestart( void ); +extern void hal_board_poststart( void ); + +#define SLEB_LED (*(volatile char *)(0x02000003)) + +#define LED( _x_ ) SLEB_LED = (char)(0xff & ~(_x_)) + +void hal_board_prestart( void ) +{ + + LED( 0xc0 ); + + // Disable default clocks &c + HAL_SPARC_86940_TIMER1_PRESCALER_WRITE( 1 ); // as if at reset + HAL_SPARC_86940_TIMER1_CONTROL_WRITE( 0 ); // as if at reset + +#ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON + // then initialize our vectors to point to (or bounce to) + // CygMon's equivalent functionality. + { + extern void hal_user_trap_to_cygmon_vsr( void ); + extern void hal_nofpcp_trap_to_cygmon_vsr( void ); + extern void hal_nmi_handler( void ); + int i; + + HAL_VSR_SET( CYGNUM_HAL_VECTOR_USER_TRAP, + (CYG_ADDRESS)hal_user_trap_to_cygmon_vsr, NULL ); + + HAL_VSR_SET( CYGNUM_HAL_VECTOR_NOFPCP, + (CYG_ADDRESS)hal_nofpcp_trap_to_cygmon_vsr, NULL ); + + for ( i = 0; i < sizeof(setup)/sizeof(setup[0]); i++ ) + HAL_VSR_SET( setup[i].eCosV, + CYGMON_VECTOR_TABLE[ setup[i].CygMonV ], NULL ); + + // Just point this one straight though, and unmask it. + // That way CygMon looks after ^Cs itself. + HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_10, + CYGMON_VECTOR_TABLE[ BSP_EXC_INT10 ], NULL ); + HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_10 ); + + // Just point this one straight though, and unmask it. + // That way CygMon looks after the Ethernet itself. + HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_14, + CYGMON_VECTOR_TABLE[ BSP_EXC_INT14 ], NULL ); + HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_14 ); + + // Install handler for the NMI button on the board + HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_15, + (CYG_ADDRESS)hal_nmi_handler, NULL ); + HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_15 ); + + LED( 0xc4 ); + +#ifdef CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + { + extern void patch_dbg_syscalls(void * vector); + patch_dbg_syscalls( (void *)CYGMON_VECTOR_TABLE ); + } +#endif // CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + + } +#endif // CYG_HAL_USE_ROM_MONITOR_CYGMON + + LED( 0xc8 ); +} + +void hal_board_poststart( void ) +{ + LED( 0xe0 ); + HAL_ENABLE_INTERRUPTS(); + LED( 0xf0 ); +} + + +// EOF hal_priv.c diff --git a/packages/hal/sparclite/sleb/current/tests/PKGconf.mak b/packages/hal/sparclite/sleb/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/tests/PKGconf.mak @@ -0,0 +1,40 @@ +#=============================================================================== +# +# makefile +# +# hal/sparclite/arch/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + + +PACKAGE := hal_sparclite_sleb +include ../../../../../pkgconf/pkgconf.mak + +TESTS := slebstak slebintr slebtime + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + + diff --git a/packages/hal/sparclite/sleb/current/tests/slebintr.c b/packages/hal/sparclite/sleb/current/tests/slebintr.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/tests/slebintr.c @@ -0,0 +1,296 @@ +/*================================================================= +// +// slebintr.c +// +// SPARClite HAL interrupt manipulation test +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dsm +// Contributors: dsm, nickg +// Date: 1998-06-18 +//####DESCRIPTIONEND#### +*/ + +#include + +#include + +#include + +#include + +#include + +#include +#include +#include +#include + +#include + +#include + +#define DELAY(x) \ + CYG_MACRO_START int i; for (i = 0; i < x; i++); CYG_MACRO_END + +#define DLA 100 + +static int l, u, m, j; + +int levels[ 16 ]; +int ups[ 16 ]; +int masks[ 16 ]; +int reqs[ 16 ]; + +#define XDIGIT( q ) (q + ((q < 10) ? '0' : ('A'-10) )) + +#define SETSTR( x, y, str ) CYG_MACRO_START \ + str[0] = XDIGIT( x ); \ + str[1] = XDIGIT( y ); \ +CYG_MACRO_END + +static char lstr[] = "xy Bad level"; +static char mstr[] = "xy Bad mask"; +static char ustr[] = "xy Bad up"; + + +static void checkallbut( int z ) +{ + int i; + for ( i = 1; i < 16; i++ ) { + int level, up, hipri, mask, req; + if ( z == i ) + continue; + + SETSTR( i, z, lstr ); + SETSTR( i, z, mstr ); + SETSTR( i, z, ustr ); + + HAL_INTERRUPT_QUERY_INFO( i, level, up, hipri, mask, req); + l = level; + u = up; + m = mask; + j = i; + +#if 0 // for manual testing really... + if ( level != levels[i] ) + CYG_TEST_INFO( lstr ); + if ( up != ups[i] ) + CYG_TEST_INFO( ustr ); + if ( mask != masks[i] ) + CYG_TEST_INFO( mstr ); + if ( (level != levels[i] ) + | ( up != ups[i] ) + | ( mask != masks[i] ) ) { + CYG_TEST_INFO( "Re-reading" ); + HAL_INTERRUPT_QUERY_INFO( i, level, up, hipri, mask, req); + } +#endif + CYG_TEST_CHECK( level == levels[i], lstr ); + CYG_TEST_CHECK( up == ups[i], ustr ); + CYG_TEST_CHECK( mask == masks[i], mstr ); + } +} + +// input is the active phase of the chosen interrupt. It is assumed that +// the source is normally level-sensititve rather than edge-sensitive. +static void interferewith( int which, int input ) +{ + int level, up, hipri, mask, req; + + // Interfere with interrupt 'which' + HAL_INTERRUPT_CONFIGURE( which, 1, input ); // should be no change + + checkallbut( 0 ); // so don't exclude any of them + + HAL_INTERRUPT_CONFIGURE( which, 1, !input ); // make it other-sensitive + DELAY( DLA ); + HAL_INTERRUPT_ACKNOWLEDGE( which ); + DELAY( DLA ); + HAL_INTERRUPT_QUERY_INFO( which, level, up, hipri, mask, req); + CYG_TEST_CHECK( 0 != level , "Int not level-sensitive (-ve level)" ); + if ( input ) + CYG_TEST_CHECK( 0 == up, "Int high level (-ve level)" ); + else + CYG_TEST_CHECK( 0 != up, "Int low level (-ve level)" ); + CYG_TEST_CHECK( 0 != mask , "Int unmasked (-ve level)" ); + CYG_TEST_CHECK( 0 != req , "Int not requesting (-ve level)" ); + checkallbut( which ); // don't check #which, we're messing with it + + HAL_INTERRUPT_CONFIGURE( which, 0, input ); // edge, default sense + DELAY( DLA ); + HAL_INTERRUPT_ACKNOWLEDGE( which ); + DELAY( DLA ); + HAL_INTERRUPT_QUERY_INFO( which, level, up, hipri, mask, req); + CYG_TEST_CHECK( 0 == level , "Int not edge-sensitive (+ve edge)" ); + if ( input ) + CYG_TEST_CHECK( 0 != up, "Int low edge (+ve edge)" ); + else + CYG_TEST_CHECK( 0 == up, "Int high edge (+ve edge)" ); + CYG_TEST_CHECK( 0 != mask , "Int unmasked (+ve edge)" ); + CYG_TEST_CHECK( 0 == req , "Int requesting (+ve edge)" ); + checkallbut( which ); // don't check #which, we're messing with it + + HAL_INTERRUPT_CONFIGURE( which, 0, !input ); // edge, opposite sense + DELAY( DLA ); + HAL_INTERRUPT_ACKNOWLEDGE( which ); + DELAY( DLA ); + HAL_INTERRUPT_QUERY_INFO( which, level, up, hipri, mask, req); + CYG_TEST_CHECK( 0 == level , "Int not edge-sensitive (-ve edge)" ); + if ( input ) + CYG_TEST_CHECK( 0 == up, "Int high edge (-ve edge)" ); + else + CYG_TEST_CHECK( 0 != up, "Int low edge (-ve edge)" ); + CYG_TEST_CHECK( 0 != mask , "Int unmasked (-ve edge)" ); + CYG_TEST_CHECK( 0 == req , "Int requesting (-ve edge)" ); + checkallbut( which ); // don't check #which, we're messing with it + + HAL_INTERRUPT_CONFIGURE( which, 1, input ); // back to original value + DELAY( DLA ); + HAL_INTERRUPT_ACKNOWLEDGE( which ); + DELAY( DLA ); + checkallbut( 0 ); // so don't exclude any of them +} + +// ------------------------------------------------------------------------ + +#ifndef CYGPKG_KERNEL +// then the clock is not initialized! +#undef HAL_CLOCK_READ +// so provide a dumb counter, so we do the test a number of times anyway. +static int pseudotime = 0; +#define HAL_CLOCK_READ( _pval_ ) *(_pval_) = \ + ((pseudotime > 10) ? (pseudotime = 0) : ++pseudotime) +#endif + +static int start( void ) +{ + // We'll mess about with these interrupt sources: + // 13 : EX_IRQ13 from expansion board, active HIGH + // 12 : EX_IRQ12 from expansion board, active LOW + // 4 : EX_IRQ4 from expansion board, active LOW + // 3 : EX_IRQ3 from expansion board, active HIGH + + int i, hipri; + for ( i = 1; i < 16; i++ ) { + HAL_INTERRUPT_QUERY_INFO( i, levels[i], ups[i], + hipri, masks[i], reqs[i]); + } + CYG_TEST_CHECK( 0 != masks[13], "Int 13 unmasked initially" ); + CYG_TEST_CHECK( 0 != masks[12], "Int 12 unmasked initially" ); + CYG_TEST_CHECK( 0 != masks[ 4], "Int 4 unmasked initially" ); + CYG_TEST_CHECK( 0 != masks[ 3], "Int 3 unmasked initially" ); + CYG_TEST_CHECK( 0 == reqs[13], "Int 13 requests initially" ); + CYG_TEST_CHECK( 0 == reqs[12], "Int 12 requests initially" ); + CYG_TEST_CHECK( 0 == reqs[ 4], "Int 4 requests initially" ); + CYG_TEST_CHECK( 0 == reqs[ 3], "Int 3 requests initially" ); + CYG_TEST_CHECK( 0 != levels[13], "Int 13 edgetrig initially" ); + CYG_TEST_CHECK( 0 != levels[12], "Int 12 edgetrig initially" ); + CYG_TEST_CHECK( 0 != levels[ 4], "Int 4 edgetrig initially" ); + CYG_TEST_CHECK( 0 != levels[ 3], "Int 3 edgetrig initially" ); + CYG_TEST_CHECK( 0 != ups[13], "Int 13 not up initially" ); + CYG_TEST_CHECK( 0 == ups[12], "Int 12 is up initially" ); + CYG_TEST_CHECK( 0 == ups[ 4], "Int 4 is up initially" ); + CYG_TEST_CHECK( 0 != ups[ 3], "Int 3 not up initially" ); + + checkallbut( 0 ); // don't exclude any of them + + // I want to run this loop for 100 centiSeconds, so that 100 clock + // interrupts have occurred whilst interfering with the other interrupt + // state, to provoke possible problems with interactions there. On a + // 100MHz 86832 with default configuration, this usually gives 1200 + // loops in total, 12 per centiSecond. But with config variance and + // caching behaviour, it's quite possible for this loop to take much + // longer, if it takes over 1/2 a centiSecond, aliasing effects could + // cause the timing to fail completely, causing test timeouts. Hence + // the additional loop limit of 20 times round the inner loop, aiming + // for a maximum elapsed time of 20 S maximum, plus extra chances to + // break out part way through the loop if a tick has passed. + + hipri = 0; + CYG_TEST_INFO( "About to configure interrupts" ); + for ( i = 0; i < 100; i++ ) { + int t1, t2, j; + HAL_CLOCK_READ( &t1 ); + // Do this while/until there is a clock tick + // ie. some interrupt activity: + for ( j = 0; j < 20; j++ ) { + t2 = t1; + hipri++; + interferewith( 13, 1 ); + interferewith( 3, 1 ); + interferewith( 4, 0 ); + HAL_CLOCK_READ( &t1 ); + if ( t1 < t2 ) + break; // clock has wrapped + t2 = t1; + interferewith( 12, 0 ); + interferewith( 3, 1 ); + interferewith( 3, 1 ); + HAL_CLOCK_READ( &t1 ); + if ( t1 < t2 ) + break; // clock has wrapped + t2 = t1; + interferewith( 4, 0 ); + interferewith( 13, 1 ); + interferewith( 12, 0 ); + interferewith( 12, 0 ); + HAL_CLOCK_READ( &t1 ); + if ( t1 < t2 ) + break; // clock has wrapped + } + } + CYG_TEST_PASS( "Configured interrupts 3,4,12 & 13 a great deal" ); + return hipri; +} + +// ------------------------------------------------------------------------- + +externC void +#ifdef CYGPKG_KERNEL +cyg_user_start( void ) +#else +cyg_start( void ) +#endif +{ + int loops; + CYG_TEST_INIT(); + CYG_TEST_INFO( "cyg_user_start()" ); + HAL_ENABLE_INTERRUPTS(); + loops = start(); + // Typically about 1200 loops execute on the 33MHz 86832; + // I hoped to put in a check that we hadn't wasted time in + // spurious interrupts, but kernel instrumentation, for example, + // is more than enough to slow the world down... so keep this + // very weak test in, as a placeholder. + CYG_TEST_CHECK( 100 <= loops, "Not enough tests executed" ); + CYG_TEST_EXIT( "All done" ); +} + +// ------------------------------------------------------------------------- + +/* EOF slebintr.c */ diff --git a/packages/hal/sparclite/sleb/current/tests/slebstak.c b/packages/hal/sparclite/sleb/current/tests/slebstak.c new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/tests/slebstak.c @@ -0,0 +1,156 @@ +/*================================================================= +// +// slebstak.c +// +// SPARClite HAL exception and register manipulation test +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dsm +// Contributors: dsm, nickg +// Date: 1998-06-18 +//####DESCRIPTIONEND#### +*/ + +#include + +#include + +#include + +#include + +#include + +#include +#include +#include +#include + +#include + +#include + +// ------------------------------------------------------------------------- + +cyg_uint32 fact( cyg_uint32 arg ) +{ + cyg_uint32 ret = (arg < 2) ? 1 : (arg * fact( arg - 1 )); + return ret; +} + + +// ------------------------------------------------------------------------- + +int i, j=0, bit; +int level[8]; +#define led (*(volatile char *)(0x02000003)) +int lval = 0; + +int sequence[] = { 0, 0, 1, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7, 6, 6, 5, 4, 3, 2, 1, 1, 0, 0, + }; + +int nseq=(sizeof(sequence)/sizeof(sequence[0])-1); + +void set_leds( void ) // and decay them too +{ + int i, j; + for (j=0; j<50; j++) + { + for (i=0; i<256; i++) + { + lval = 0; + for (bit=0; bit<8; bit++) + if (i >= level[bit]) + lval |= 1< 0) + level[i] -= N; + else + level[i] = 0; + } + } +} + +void start( void ) +{ + int op = 0; + int bright = 255; + cyg_uint32 f0; + +#if 0 + while ( 1 ) { +#else + int z; + for ( z = 0; z < 100; z++ ) { +#endif + f0 = 1; + for (op=0; op +#include + +#include +#include +#include + +#ifdef CYGPKG_KERNEL + +#include + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + +#include +#include +#include +#include + +#include + +#include + +#include +#include +#include +#include + +// ------------------------------------------------------------------------- + +static void entry1( CYG_ADDRWORD arg ) +{ + int i; + char *s = "tick 00"; + extern Cyg_Thread thread2; + CYG_TEST_INFO( "Starting measured seconds..." ); + for ( i = 0; i < 20 ; i++ ) { + Cyg_Thread::self()->delay( 100 ); // units should be centiSeconds + if ( '9' == s[ 6 ]++ ) { + s[ 6 ] = '0'; + s[ 5 ] ++; + } + CYG_TEST_INFO( s ); + } + CYG_TEST_PASS( "Done measured seconds..." ); + thread2.resume(); +} + +static void entry2( CYG_ADDRWORD arg ) +{ +#define LOOPS 30 + int i, t1, t2, a; + int loops[ LOOPS ] = { 0,0,0,0,0 , 0,0,0,0,0 , + 0,0,0,0,0 , 0,0,0,0,0 , + 0,0,0,0,0 , 0,0,0,0,0 }; + + char s[] = "0 count 00 loops 00000"; + + for ( a = 0; a < 10; a++, (*s)++ ) { + CYG_TEST_INFO( "------------------------------------------" ); + HAL_CLOCK_READ( &t1 ); + do { + t2 = t1; + HAL_CLOCK_READ( &t1 ); + } while ( t1 >= t2 ); + + for ( i = 0; i < LOOPS; i++ ) { + register int z = 0; + while ( t1 <= i ) { + z++; + HAL_CLOCK_READ( &t1 ); + } + loops[ i ] = z; + } + + s[9] = '0'; + s[8] = '0'; + for ( i = 0; i < LOOPS; i++ ) { + s[ sizeof( s ) - 1 ] = '0' + loops[ i ] / 1 % 10; + s[ sizeof( s ) - 2 ] = '0' + loops[ i ] / 10 % 10; + s[ sizeof( s ) - 3 ] = '0' + loops[ i ] / 100 % 10; + s[ sizeof( s ) - 4 ] = '0' + loops[ i ] / 1000 % 10; + s[ sizeof( s ) - 5 ] = '0' + loops[ i ] / 10000 % 10; + CYG_TEST_INFO( s ); + if ( '9' == s[9]++ ) { + s[9] = '0'; + s[8]++; + } + } + } + CYG_TEST_PASS( "Counted loops per timer tick" ); + CYG_TEST_EXIT( "All done" ); +} + +// ------------------------------------------------------------------------- + +static char stack1[ CYGNUM_HAL_STACK_SIZE_TYPICAL ]; +static char stack2[ CYGNUM_HAL_STACK_SIZE_TYPICAL ]; + +static Cyg_Thread thread1 CYG_INIT_PRIORITY( APPLICATION ) + = Cyg_Thread( 2u, entry1, 0u, "timed minute thread", + (CYG_ADDRWORD)stack1, + (CYG_ADDRWORD)CYGNUM_HAL_STACK_SIZE_TYPICAL ); + +static Cyg_Thread thread2 CYG_INIT_PRIORITY( APPLICATION ) + = Cyg_Thread( 4u, entry2, 0u, "uS clock loops timing thread", + (CYG_ADDRWORD)stack2, + (CYG_ADDRWORD)CYGNUM_HAL_STACK_SIZE_TYPICAL ); + +// ------------------------------------------------------------------------- + +externC void +cyg_user_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_INFO( "cyg_user_start()" ); + thread1.resume(); +} + +// ------------------------------------------------------------------------- + +#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK +#define N_A_MSG "no kernel clock" +#endif // CYGVAR_KERNEL_COUNTERS_CLOCK +#else // ! CYGPKG_KERNEL +#define N_A_MSG "no kernel" +#endif // CYGPKG_KERNEL + +#ifdef N_A_MSG +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA( N_A_MSG ); +} +#endif // N_A_MSG defined ie. we are N/A. + +/* EOF slebtime.cxx */ diff --git a/packages/infra/current/ChangeLog b/packages/infra/current/ChangeLog --- a/packages/infra/current/ChangeLog +++ b/packages/infra/current/ChangeLog @@ -1,3 +1,202 @@ +1999-04-14 John Dallaway + + * include/pkgconf/infra.h: Add cdl_package doc attribute. + +1999-04-12 Jesper Skov + + * include/cyg_type.h: Added new init priority for IO devices. + + * include/diag.h: + * src/diag.cxx: + Use device for diag if configured so. + +1999-03-19 Gary Thomas + + * src/diag.cxx (diag_vprintf): Support '%%' printf modifier. + +1999-03-05 Jonathan Larmour + + * include/cyg_type.h: + Add CYGBLD_ATTRIB_CONST and tidy define indentation + +1999-03-04 Bart Veer + + * include/diag.h: + Added a #include for so that the header file + can correctly check for CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG + +1999-02-25 Nick Garnett + + * include/cyg_type.h: + Added CYGBLD_ATTRIB_ASM_ALIAS() macro to supply an alias for a + variable while it is being defined. + +1999-02-24 Jonathan Larmour + + * include/cyg_type.h (CYG_INIT_APPLICATION): Add CYG_INIT_DRIVERS + priority + + * src/tcdiag.cxx (cyg_test_output): Re-include angle brackets + for CYG_TEST_GDBCMD command + +1999-02-23 Jonathan Larmour + + * include/testcase.h (CYG_TEST_NA): + Add call to cyg_test_exit() + +1999-02-22 Jonathan Larmour + + * include/cyg_type.h: + Add CYGBLD_ATTRIB_INIT_PRI/BEFORE/AFTER macros. + Remove CYG_INIT_BEFORE/AFTER as they were unusable + + * include/testcase.h: + * src/tcdiag.cxx: + Add CYGNUM_TEST_NA() macro for not applicable state + Don't need to call diag_init() any more from cyg_test_init() + + * src/diag.c: + * src/diag.cxx: + Rename diag.c to diag.cxx + Add dummy constructor object to do initialization right after the + HAL has started. Needed to get asserts working correctly at + constructor time, and for CYGNUM_TEST_GDBCMD to work as intended + (i.e. before calling CYG_TEST_INIT()) + +1999-02-17 Jonathan Larmour + + * src/tcdiag.cxx (cyg_test_output): Remove angle brackets round + GDBCMD output + +1999-02-16 Jonathan Larmour + + * src/fancy.cxx (trim_func): + * src/simple.cxx (trim_func): + * src/buffer.cxx (trim_func): + Don't delete bits before a space as it may not always be a + type, if using CYG_FUNCNAME rather than relying on + __PRETTY_FUNCTION__ + + * src/tcdiag.cxx (cyg_test_output): + Add new GDBCMD output and do some tidying vis a vis coding standards + etc. + + * include/testcase.h: + Do some tidying vis a vis coding standards etc. + +1999-02-16 Gary Thomas + + * include/cyg_type.h (CYGBLD_ATTRIB_CONSTRUCTOR): + New macro, used to define a 'C' routine to be run with 'C++' + constructors. + +1999-01-26 Bart Veer + + * include/cyg_type.h (CYGBLD_ATTRIB_NORET): + Updated the non-GNUC version of the macro + +1999-01-21 Jonathan Larmour + + * include/cyg_type.h: + Remove all traces of CYG_KERNEL_USE_INIT_PRIORITY option - now + compulsory. Consequently can remove include of pkgconf/infra.h. + Add CYG_INIT_PREDEFAULT priority for + CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG implementation. + Change CYGBLD_NORET to CYGBLD_ATTRIB_NORET + Add CYGBLD_ATTRIB_ALIAS and CYGBLD_ATTRIB_WEAK_ALIAS macros + + * include/cyg_ass.h: + * include/testcase.h + Change CYGBLD_NORET to CYGBLD_ATTRIB_NORET + + * src/startup.cxx: + Split up into smaller files to make GDB happier when debuggin + + * src/pkgstart.cxx: + * src/prestart.cxx: + * src/userstart.cxx: + New files with contents originally from startup.cxx + +1999-01-19 Jonathan Larmour + + * include/cyg_type.h (CYG_REFERENCE_OBJECT): + Make this work with no overhead, although it doesn't work with + anything other than objects with constructors. I _believe_ this + is the only relevant situation though. Bite me. + Fix for PR 18782 + +1999-01-14 Jesper Skov + + * include/cyg_type.h (CYG_REFERENCE_SYMBOL): Added. + +1999-01-13 Gary Thomas + + * include/cyg_type.h: Default handling of 'CYG_DOUBLE_BYTEORDER' + +1999-01-13 Jesper Skov + + * include/cyg_type.h (CYG_UNUSED_PARAM): Don't assign to the + unused parameter; it might be a macro constant. + +1999-01-11 Bart Veer + + * src/tcdiag.cxx (cyg_test_output): + * include/testcase.h: + Use const where appropriate in cyg_test_output() + +1999-01-06 Bart Veer + + * include/cyg_trac.h (CYG_REPORT_FUNCARG8): + Removed spurious comma so that the macro actually compiles. + +1998-12-24 Bart Veer + + * src/simple.cxx: + * src/null.cxx: + * src/fancy.cxx: + * src/diag.c: + * src/buffer.cxx: + * include/diag.h: + In the assertion support, use const where appropriate. + +1998-12-24 Bart Veer + + * include/cyg_ass.h: + The prototype for cyg_assert_fail() is now always present. + const is used wherever appropriate. + A number of additional assertion macros are now defined. + Host-specific assertion support has been added. + Some minor tweaks for greater consistency in macro usage. + +1998-12-21 Bart Veer + + * include/cyg_type.h: + Allow for platforms where pointers are not 32 bits wide. + +1998-12-16 Hugo Tyson + + * include/testcase.h (cyg_test_is_simulator): + * src/tcdiag.cxx (cyg_test_is_simulator): + Change the type to int so that all gdb's understand it. + (it was impossible to assign to from the prompt as a bool) + +1998-12-09 Bart Veer + + * include/testcase.h: + Hide a __noreturn__ attribute inside a macro so that the + header file can be used for host-side code. + +1998-11-02 Jesper Skov + + * src/memset.c (_memset): Use type casted pointer to avoid + compiler warning. + +Mon Oct 26 21:20:13 1998 Jonathan Larmour + + * src/buffer.cxx: + Make write_thread_id() conditional on CYGDBG_USE_ASSERTS as that's + the only time it is used. This silences a compiler warning + Mon Oct 26 19:40:48 1998 Jonathan Larmour * src/memset.c, src/memcpy.c: @@ -273,7 +472,7 @@ 1998-08-20 Nick Garnett -// ... -// CYG_ASSERT( pcount > 0, "Number of probes should be > 0!" ); +// Usage: #include +// ... +// CYG_ASSERT( pcount > 0, "Number of probes should be > 0!" ); // // which can result, for example, in a message of the form: // ASSERT FAILED: probemgr.cxx:1340, scan_probes() : @@ -54,7 +54,7 @@ #include -#include // for CYGBLD_NORET +#include // for CYGBLD_ATTRIB_NORET // ------------------------------------------------------------------------- // If we do not have a function name macro, define it ourselves @@ -66,36 +66,32 @@ # endif #endif -// ... before the dependency on having asserts at all. +// ------------------------------------------------------------------------- +// this is executed to deal with failure - breakpoint it first! + +externC void +cyg_assert_fail( const char* /* psz_func */, const char* /* psz_file */, + cyg_uint32 /* linenum */, const char* /* psz_msg */ ) + CYGBLD_ATTRIB_NORET; + // ------------------------------------------------------------------------- #ifdef CYGDBG_USE_ASSERTS // ------------------------------------------------------------------------- -// this is executed to deal with failure - breakpoint it first! - -externC void -cyg_assert_fail( char *psz_func, char *psz_file, - cyg_uint32 linenum, char *psz_msg ) - CYGBLD_NORET; - -// ------------------------------------------------------------------------- - - -// ------------------------------------------------------------------------- // We define macros and appropriate prototypes for the assert/fail // system. These are: -// CYG_FAIL - unconditional panic -// CYG_ASSERT - panic if boolean expression is false -// +// CYG_FAIL - unconditional panic +// CYG_ASSERT - panic if boolean expression is false +// CYG_ASSERTC - compact version of CYG_ASSERT # ifdef CYGDBG_INFRA_DEBUG_ASSERT_MESSAGE -# define CYGASSERT_docall( _msg_ ) \ +# define CYG_ASSERT_DOCALL( _msg_ ) \ cyg_assert_fail( __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_ ); # else -# define CYGASSERT_docall( _msg_ ) \ +# define CYG_ASSERT_DOCALL( _msg_ ) \ CYG_MACRO_START \ - char *_tmp1_ = _msg_; \ + const char* _tmp1_ = _msg_; \ _tmp1_ = _tmp1_; \ cyg_assert_fail( __PRETTY_FUNCTION__, __FILE__, __LINE__, NULL ); \ CYG_MACRO_END @@ -104,23 +100,30 @@ cyg_assert_fail( char *psz_func, char *p // unconditional failure; use like panic(), coredump() &c. # define CYG_FAIL( _msg_ ) \ CYG_MACRO_START \ - CYGASSERT_docall( _msg_ ); \ + CYG_ASSERT_DOCALL( _msg_ ); \ CYG_MACRO_END // conditioned assert; if the condition is false, fail. # define CYG_ASSERT( _bool_, _msg_ ) \ CYG_MACRO_START \ if ( ! ( _bool_ ) ) \ - CYGASSERT_docall( _msg_ ); \ + CYG_ASSERT_DOCALL( _msg_ ); \ CYG_MACRO_END +# define CYG_ASSERTC( _bool_ ) \ + CYG_MACRO_START \ + if ( ! ( _bool_ ) ) \ + CYG_ASSERT_DOCALL( #_bool_ );\ + CYG_MACRO_END + #else // ! CYGDBG_USE_ASSERTS // ------------------------------------------------------------------------- // No asserts: we define empty statements for assert & fail. +# define CYG_FAIL( _msg_ ) CYG_EMPTY_STATEMENT # define CYG_ASSERT( _bool_, _msg_ ) CYG_EMPTY_STATEMENT -# define CYG_FAIL( _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_ASSERTC( _bool_ ) CYG_EMPTY_STATEMENT #endif // ! CYGDBG_USE_ASSERTS @@ -140,21 +143,34 @@ externC cyg_bool cyg_check_func_ptr(void # define CYG_CHECK_DATA_PTR( _ptr_, _msg_ ) \ CYG_MACRO_START \ if( !cyg_check_data_ptr((void *)(_ptr_))) \ - CYGASSERT_docall( _msg_ ); \ + CYG_ASSERT_DOCALL( _msg_ ); \ CYG_MACRO_END # define CYG_CHECK_FUNC_PTR( _ptr_, _msg_ ) \ CYG_MACRO_START \ if( !cyg_check_func_ptr((void (*)(void))(_ptr_))) \ - CYGASSERT_docall( _msg_ ); \ + CYG_ASSERT_DOCALL( _msg_ ); \ CYG_MACRO_END +# define CYG_CHECK_DATA_PTRC( _ptr_ ) \ + CYG_MACRO_START \ + if ( !cyg_check_data_ptr((void *)(_ptr_))) \ + CYG_ASSERT_DOCALL("data pointer (" #_ptr_ ") is valid");\ + CYG_MACRO_END + +# define CYG_CHECK_FUNC_PTRC( _ptr_ ) \ + CYG_MACRO_START \ + if ( !cyg_check_func_ptr((void (*)(void))(_ptr_))) \ + CYG_ASSERT_DOCALL("function pointer (" #_ptr_ ") is valid"); \ + CYG_MACRO_END + #else // CYGDBG_USE_ASSERTS # define CYG_CHECK_DATA_PTR( _ptr_, _msg_ ) CYG_EMPTY_STATEMENT -# define CYG_CHECK_FUNC_PTR( _ptr_, _msg_ ) CYG_EMPTY_STATEMENT - - +# define CYG_CHECK_FUNC_PTR( _ptr_, _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_CHECK_DATA_PTRC( _ptr_ ) CYG_EMPTY_STATEMENT +# define CYG_CHECK_FUNC_PTRC( _ptr_ ) CYG_EMPTY_STATEMENT + #endif // CYGDBG_USE_ASSERTS // ------------------------------------------------------------------------- @@ -181,12 +197,19 @@ enum cyg_assert_class_zeal { // ------------------------------------------------------------------------- // Define macros for checking classes: // -// CYG_ASSERTCLASS - do proforma check on a class pointer -// CYG_ASSERTCLASSO - do proforma check on a class object +// CYG_ASSERT_CLASS - do proforma check on a class pointer +// CYG_ASSERT_CLASSO - do proforma check on a class object +// CYG_ASSERT_ZERO_OR_CLASS- a class pointer is NULL or valid +// CYG_ASSERT_THIS - "this" is valid +// + 3 compact variants and two aliases for backwards compatibility. +// +// All of these end up going via CYG_ASSERT(), which will be an empty +// statement if CYGDBG_USE_ASSERTS is disabled. There is no need to +// test CYGDBG_USE_ASSERTS again here. // // The idiom required is that a class have a member function called -// "bool check_this( cyg_assert_class_zeal )" that returns true iff the -// object is OK. This need not be conditionally compiled against +// "bool check_this( cyg_assert_class_zeal ) const" that returns true +// iff the object is OK. This need not be conditionally compiled against // CYGDBG_USE_ASSERTS but it can be if only this macro is used to // invoke it. Alternatively it can be invoked by hand with other // choices from the above enum. @@ -195,19 +218,47 @@ enum cyg_assert_class_zeal { #ifdef __cplusplus -# define CYG_ASSERT_CLASS_ZEAL (cyg_quick) // can be redefined locally +# ifndef CYG_ASSERT_CLASS_ZEAL +# define CYG_ASSERT_CLASS_ZEAL (cyg_quick) // can be redefined locally +# endif -# define CYG_ASSERTCLASS( _pobj_, _msg_ ) \ - CYG_ASSERT( ((NULL != (_pobj_)) \ - && (_pobj_)->check_this( CYG_ASSERT_CLASS_ZEAL )), _msg_ ); +# define CYG_ASSERT_CLASS( _pobj_, _msg_ ) \ + CYG_ASSERT( ((0 != (_pobj_)) && \ + (_pobj_)->check_this( CYG_ASSERT_CLASS_ZEAL )), _msg_ ) + +# define CYG_ASSERTCLASS( _pobj_,_msg_) \ + CYG_ASSERT_CLASS( (_pobj_), _msg_ ) + +# define CYG_ASSERT_CLASSO( _obj_, _msg_ ) \ + CYG_ASSERT( (_obj_).check_this( CYG_ASSERT_CLASS_ZEAL ), _msg_ ) # define CYG_ASSERTCLASSO( _obj_, _msg_ ) \ - CYG_ASSERT( (_obj_).check_this( CYG_ASSERT_CLASS_ZEAL ), _msg_ ); + CYG_ASSERT_CLASSO( (_obj_), _msg_ ) + +# define CYG_ASSERT_ZERO_OR_CLASS( _pobj_, _msg_ ) \ + CYG_ASSERT( ((0 == (_pobj_)) || \ + (_pobj_)->check_this( CYG_ASSERT_CLASS_ZEAL )), _msg_ ) + +# define CYG_ASSERT_THIS( _msg_ ) \ + CYG_ASSERT( this->check_this( CYG_ASSERT_CLASS_ZEAL ), _msg_ ) +# define CYG_ASSERT_CLASSC( _pobj_ ) \ + CYG_ASSERT_CLASS( (_pobj_), "class pointer (" #_pobj_ ") is valid" ) + +# define CYG_ASSERT_CLASSOC( _obj_ ) \ + CYG_ASSERT_CLASSO( (_obj_), "object (" #_obj_ ") is valid" ) + +# define CYG_ASSERT_ZERO_OR_CLASSC( _pobj_ ) \ + CYG_ASSERT_ZERO_OR_CLASS((_pobj_), \ + "class pointer (" #_pobj_ ") is zero or valid") + +# define CYG_ASSERT_THISC( ) \ + CYG_ASSERT_THIS( "\"this\" pointer is valid" ) + #define CYGDBG_DEFINE_CHECK_THIS \ - bool check_this( cyg_assert_class_zeal zeal ); - -#endif + bool check_this( cyg_assert_class_zeal zeal ) const; + +#endif // __cplusplus // ------------------------------------------------------------------------- // Some alternative names for basic assertions that we can disable @@ -216,25 +267,267 @@ enum cyg_assert_class_zeal { // CYG_PRECONDITION - argument checking etc // CYG_POSTCONDITION - results etc // CYG_LOOP_INVARIANT - for putting in loops +// +// C++ programmers have class-related variants of all of these. #ifdef CYGDBG_INFRA_DEBUG_PRECONDITIONS # define CYG_PRECONDITION( _bool_ , _msg_ ) CYG_ASSERT( _bool_, _msg_ ) +# define CYG_PRECONDITIONC( _bool_ ) \ + CYG_ASSERT( _bool_, "precondition " #_bool_) #else # define CYG_PRECONDITION( _bool_ , _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_PRECONDITIONC( _bool_ ) CYG_EMPTY_STATEMENT #endif #ifdef CYGDBG_INFRA_DEBUG_POSTCONDITIONS # define CYG_POSTCONDITION( _bool_ , _msg_ ) CYG_ASSERT( _bool_, _msg_ ) +# define CYG_POSTCONDITIONC( _bool_ ) \ + CYG_ASSERT( _bool_, "postcondition " #_bool_) #else # define CYG_POSTCONDITION( _bool_ , _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_POSTCONDITIONC( _bool_ ) CYG_EMPTY_STATEMENT #endif #ifdef CYGDBG_INFRA_DEBUG_LOOP_INVARIANTS # define CYG_LOOP_INVARIANT( _bool_ , _msg_ ) CYG_ASSERT( _bool_, _msg_ ) +# define CYG_LOOP_INVARIANTC( _bool_ ) \ + CYG_ASSERT( _bool_, "loop invariant " #_bool_ ) #else # define CYG_LOOP_INVARIANT( _bool_ , _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_LOOP_INVARIANTC( _bool_ ) CYG_EMPTY_STATEMENT #endif +#ifdef __cplusplus + +// All variants of _CLASS +# define CYG_PRECONDITION_CLASS( _pobj_, _msg_ ) \ + CYG_PRECONDITION( ((0 != (_pobj_)) && \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_PRECONDITION_CLASSC( _pobj_ ) \ + CYG_PRECONDITION_CLASS( (_pobj_), \ + "precondition, class pointer (" #_pobj_ ") is valid" ) + +# define CYG_POSTCONDITION_CLASS( _pobj_, _msg_ ) \ + CYG_POSTCONDITION( ((0 != (_pobj_)) && \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_POSTCONDITION_CLASSC( _pobj_ ) \ + CYG_POSTCONDITION_CLASS( (_pobj_), \ + "postcondition, class pointer (" #_pobj_ ") is valid" ) + +# define CYG_LOOP_INVARIANT_CLASS( _pobj_, _msg_) \ + CYG_LOOP_INVARIANT( ((0 != (_pobj_)) && \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_LOOP_INVARIANT_CLASSC( _pobj_ ) \ + CYG_LOOP_INVARIANT_CLASS( (_pobj_), \ + "loop invariant, class pointer (" #_pobj_ ") is valid" ) + +// All variants of _CLASSO +# define CYG_PRECONDITION_CLASSO( _obj_, _msg_ ) \ + CYG_PRECONDITION( (_obj_).check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_PRECONDITION_CLASSOC( _obj_ ) \ + CYG_PRECONDITION_CLASSO( (_obj_), \ + "precondition, object (" #_obj_ ") is valid" ) + +# define CYG_POSTCONDITION_CLASSO( _obj_, _msg_ ) \ + CYG_POSTCONDITION( (_obj_).check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_POSTCONDITION_CLASSOC( _obj_ ) \ + CYG_POSTCONDITION_CLASSO( (_obj_), \ + "postcondition, object (" #_obj_ ") is valid" ) + +# define CYG_LOOP_INVARIANT_CLASSO( _obj_, _msg_) \ + CYG_LOOP_INVARIANT( (_obj_).check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_LOOP_INVARIANT_CLASSOC( _obj_ ) \ + CYG_LOOP_INVARIANT_CLASSO( (_obj_), \ + "loop invariant, object (" #_obj_ ") is valid" ) + +// All variants of _ZERO_OR_CLASS +# define CYG_PRECONDITION_ZERO_OR_CLASS( _pobj_, _msg_ ) \ + CYG_PRECONDITION( ((0 == (_pobj_)) || \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_PRECONDITION_ZERO_OR_CLASSC( _pobj_ ) \ + CYG_PRECONDITION_ZERO_OR_CLASS( (_pobj_), \ + "precondition, class pointer (" #_pobj_ ") is zero or valid" ) + +# define CYG_POSTCONDITION_ZERO_OR_CLASS( _pobj_, _msg_ ) \ + CYG_POSTCONDITION( ((0 == (_pobj_)) || \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_POSTCONDITION_ZERO_OR_CLASSC( _pobj_ ) \ + CYG_POSTCONDITION_ZERO_OR_CLASS( (_pobj_), \ + "postcondition, class pointer (" #_pobj_ ") is zero or valid" ) + +# define CYG_LOOP_INVARIANT_ZERO_OR_CLASS( _pobj_, _msg_) \ + CYG_LOOP_INVARIANT( ((0 == (_pobj_)) || \ + (_pobj_)->check_this(CYG_ASSERT_CLASS_ZEAL)), _msg_) + +# define CYG_LOOP_INVARIANT_ZERO_OR_CLASSC( _pobj_ ) \ + CYG_LOOP_INVARIANT_ZERO_OR_CLASS( (_pobj_), \ + "loop invariant, class pointer (" #_pobj_ ") is zero or valid" ) + +// All variants of _THIS +# define CYG_PRECONDITION_THIS( _msg_ ) \ + CYG_PRECONDITION( this->check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_PRECONDITION_THISC() \ + CYG_PRECONDITION_THIS( "precondition, \"this\" is valid" ) + +# define CYG_POSTCONDITION_THIS( _msg_ ) \ + CYG_POSTCONDITION( this->check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_POSTCONDITION_THISC() \ + CYG_POSTCONDITION_THIS( "postcondition, \"this\" is valid" ) + +# define CYG_LOOP_INVARIANT_THIS( _msg_) \ + CYG_LOOP_INVARIANT( this->check_this(CYG_ASSERT_CLASS_ZEAL), _msg_) + +# define CYG_LOOP_INVARIANT_THISC() \ + CYG_LOOP_INVARIANT_THIS( "loop invariant, \"this\" is valid" ) + +#endif // __cplusplus + +// ------------------------------------------------------------------------- +// Invariants. These are a bit more interesting. The ordinary invariants +// take an arbitrary boolean expression, and C++ does not provide any way +// of evaluating this expression automatically on entry and exit - any +// attempt to use local objects leads to trying to evaluate the expression +// when it is not in scope. This problem does not arise with objects. +// +// For C++ objects it is possible to do a bit better. A template can be +// used to create a local object whose constructor will validate the +// target object and whose destructor will validate the target object +// again. Unfortunately it is necessary to pass the type as well as +// the object: typeof() is a gcc extension, and RTTI's typeid facility +// would provide the derived class and not what we actually want. + +#ifdef CYGDBG_INFRA_DEBUG_INVARIANTS + +# define CYG_INVARIANT( _bool_, _msg_ ) \ + CYG_MACRO_START \ + if ( ! ( _bool_ ) ) \ + CYG_ASSERT_DOCALL( _msg_ ); \ + CYG_MACRO_END + +# define CYG_INVARIANTC( _bool_ ) \ + CYG_MACRO_START \ + if ( ! ( _bool_ ) ) \ + CYG_ASSERT_DOCALL( "invariant (" #_bool_ ")" ); \ + CYG_MACRO_END + +# ifdef __cplusplus +// NOTE: if the compiler does not manage to inline the appropriate +// template functions then the impact on code size and performance becomes +// rather large. But there are significant performance overheads anyway +// simply because of the call to check_this()... +// +template class __CygInvariantObject { + + const X* rep; + + private: + // Prevent access to the default constructors. + __CygInvariantObject() { } + __CygInvariantObject( const __CygInvariantObject& arg ) { } + __CygInvariantObject & operator=( const __CygInvariantObject & arg) { return *this; } + + public: + __CygInvariantObject( X* arg, const char* msg ) : rep(arg) { + if ( !rep->check_this( CYG_ASSERT_CLASS_ZEAL ) ) + CYG_ASSERT_DOCALL( msg ); + } + __CygInvariantObject( X& arg, const char* msg ) : rep(&arg) { + if ( !rep->check_this( CYG_ASSERT_CLASS_ZEAL ) ) + CYG_ASSERT_DOCALL( msg ); + } + __CygInvariantObject( const X* arg, const char* msg ) : rep(arg) { + if ( !rep->check_this( CYG_ASSERT_CLASS_ZEAL ) ) + CYG_ASSERT_DOCALL( msg ); + } + __CygInvariantObject( const X& arg, const char* msg ) : rep(&arg) { + if ( !rep->check_this( CYG_ASSERT_CLASS_ZEAL ) ) + CYG_ASSERT_DOCALL( msg ); + } + ~__CygInvariantObject( ) { + if ( !rep->check_this( CYG_ASSERT_CLASS_ZEAL ) ) + CYG_ASSERT_DOCALL( "invariant, object valid on exit" ); + rep = 0; + }; +}; + +// +// These macros provide sensible concatenation facilities at +// the C preprocessor level, getting around complications in the +// macro expansion rules related to __LINE__ and __FILE__. + +# define __CYG_INVARIANT_CLASSNAME_AUX( a, b) a ## b +# define __CYG_INVARIANT_CLASSNAME( a, b ) \ + __CYG_INVARIANT_CLASSNAME_AUX( a, b ) + + +// These macro definitions do not use CYG_MACRO_START because +// I do not want the scope of the local objects to get confused. +// +// The first line of the macro expansion specifies the type of +// the local object being created. The second line invents a +// name for this object. The third line provides command-line +// arguments. + +# define CYG_INVARIANT_CLASS( _type_, _pobj_, _msg_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( _pobj_, _msg_ ) + +# define CYG_INVARIANT_CLASSC( _type_, _pobj_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( _pobj_, "invariant, class pointer (" #_pobj_ ") is valid" ) + +# define CYG_INVARIANT_CLASSO( _type_, _obj_, _msg_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( _obj_, _msg_ ) + +# define CYG_INVARIANT_CLASSOC( _type_, _obj_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( _obj_, "invariant, object (" #_obj_ ") is valid" ) + +# define CYG_INVARIANT_THIS( _type_, _msg_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( this, _msg_ ) + +# define CYG_INVARIANT_THISC( _type_ ) \ + __CygInvariantObject<_type_> \ + __CYG_INVARIANT_CLASSNAME( __invariant_class_, __LINE__ ) \ + ( this, "invariant, \"this\" is valid" ) + +# endif // __cplusplus + +#else // !CYGDBG_INFRA_DEBUG_INVARIANTS + +# define CYG_INVARIANT( _bool_, _msg_ ) CYG_EMPTY_STATEMENT +# define CYG_INVARIANTC( _bool_ ) CYG_EMPTY_STATEMENT + +# ifdef __cplusplus + +# define CYG_INVARIANT_CLASS( _type_, _pobj_, _msg_ ) +# define CYG_INVARIANT_CLASSC( _type_, _pobj_ ) +# define CYG_INVARIANT_CLASSO( _type_, _obj_, _msg_ ) +# define CYG_INVARIANT_CLASSOC( _type_, _obj_ ) +# define CYG_INVARIANT_THIS( _type_, _msg_ ) +# define CYG_INVARIANT_THISC( _type_ ) + +# endif + +#endif // CYGDBG_INFRA_DEBUG_INVARIANTS + // ------------------------------------------------------------------------- // Compile time failure; like #error but in a macro so we can use it in // other definitions. @@ -246,6 +539,53 @@ enum cyg_assert_class_zeal { // ------------------------------------------------------------------------- +// The host-side implementation of the infrastructure provides a number +// of additional functions that allow applications to provide their own +// implementation of cyg_assert_fail(). This is not strictly necessary +// since the presence of cyg_assert_fail() in the application would +// override the one in the library anyway, but it is useful to make +// certain functionality more readily available. +// +// These declarations are only available if the symbol +// CYG_DECLARE_HOST_ASSERTION_SUPPORT is defined. +#ifdef CYG_DECLARE_HOST_ASSERTION_SUPPORT + +// The default assertion handler writes its output to a file and +// if possible a suitable message to stdout. It is possible to +// install an alternative handler. If this alternative returns false +// then the default handler will be invoked instead, otherwise the +// application will exit. +externC void cyg_assert_install_failure_handler( + bool (*)(const char* /* psz_func */, + const char* /* psz_file */, + cyg_uint32 /* linenum */, + const char* /* psz_msg */) ); + +// Register a callback that should get invoked as part of handling an +// assertion failure and that will typically produce some additional +// output. For example the trace code will install a callback to output +// trace information. +// +// The first argument is a string identifying the callback. The second +// argument is a function pointer for the callback itself, whose +// argument is another function that can be invoked for output. +externC void cyg_assert_install_failure_callback( + const char* /* name */, + void (*)( void (*)(const char*) )); + +// This function can be called by assert failure handlers to invoke +// the installed callbacks. The three arguments are function pointers +// that get invoked prior to callback invocation, by the callback itself, +// and after each callback. In the first case the argument will be the +// callback name. +externC void cyg_assert_failure_invoke_callbacks( + void (*)(const char* /* name */), + void (*)(const char* /* callback data */ ), + void (*)(void) ); + +#endif // CYG_DECLARE_HOST_ASSERTION_SUPPORT + +// ------------------------------------------------------------------------- #endif // CYGONCE_INFRA_CYG_ASS_H multiple inclusion protection // EOF cyg_ass.h diff --git a/packages/infra/current/include/cyg_trac.h b/packages/infra/current/include/cyg_trac.h --- a/packages/infra/current/include/cyg_trac.h +++ b/packages/infra/current/include/cyg_trac.h @@ -3,9 +3,9 @@ //========================================================================== // -// cyg_trac.h +// cyg_trac.h // -// Macros and prototypes for the tracing system +// Macros and prototypes for the tracing system // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,23 +25,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg from an original by hmt -// Contributors: nickg -// Date: 1998-04-23 -// Purpose: Use traces to log procedure entry, and "print" stuff -// Description: Runtime logging messages that compile to nothing in +// Author(s): nickg from an original by hmt +// Contributors: nickg +// Date: 1998-04-23 +// Purpose: Use traces to log procedure entry, and "print" stuff +// Description: Runtime logging messages that compile to nothing in // release versions of the code, to allow // as-you-go tracing of alternate builds. -// Usage: #include -// ... -// CYG_TRACE2( PIPE_TRACE, "pipe %x, data %d", ppipe, oword ); +// Usage: #include +// ... +// CYG_TRACE2( PIPE_TRACE, "pipe %x, data %d", ppipe, oword ); // // which can result, for example, in a message of the form: // "TRACE: pipemgr.cxx:1340, write_pipe(): pipe 0x8004c, data 17" @@ -130,7 +130,7 @@ without a value!). The basic facility is - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTION(); In C, place this between the local variable declarations and the first statement or errors will ensue. C++ is more flexible; place the macro as @@ -138,7 +138,7 @@ the first line of all functions you wish variations are also provided: CYG_REPORT_FUNCTYPE( exitmsg ) provide a printf string for the type - of the returned value + of the returned value CYG_REPORT_FUNCNAME( name ) supply a function name explicitly, for if __FUNCTION__ is not supported CYG_REPORT_FUNCNAMETYPE( name, exitmsg ) both of the above extensions @@ -181,12 +181,12 @@ are needed. Examples: int myfunction() { - CYG_REPORT_FUNCTYPE( "recode is %d" ); + CYG_REPORT_FUNCTYPE( "recode is %d" ); A function return is traced using - CYG_REPORT_RETURN() a void return - CYG_REPORT_RETVAL( value ) returning a value + CYG_REPORT_RETURN() a void return + CYG_REPORT_RETVAL( value ) returning a value With the CYG_REPORT_FUNCTYPE example, the latter might produce a message like: @@ -195,10 +195,10 @@ like: TRACE:myprog.c[53]fact(): retcode is 24 It is also useful to trace the values of the arguments to a function: - CYG_REPORT_FUNCARGVOID confirms that the function is void - CYG_REPORT_FUNCARG1( format, arg ) printf-style - to - CYG_REPORT_FUNCARG8( format, arg1...arg8 ) printf-style + CYG_REPORT_FUNCARGVOID confirms that the function is void + CYG_REPORT_FUNCARG1( format, arg ) printf-style + to + CYG_REPORT_FUNCARG8( format, arg1...arg8 ) printf-style The CYG_REPORT_FUNCARG[1-8] macros are also offered with the convenience extensions: D, X, or Y, and V like the explicit tracing macros. For @@ -206,11 +206,11 @@ example: int fact( int number ) { - CYG_REPORT_FUNCTYPE( "recode is %d" ); - CYG_REPORT_FUNCARG1DV( number ); - int result = number; - while ( --number > 1 ) result *= number - CYG_REPORT_RETVAL( result ); + CYG_REPORT_FUNCTYPE( "recode is %d" ); + CYG_REPORT_FUNCARG1DV( number ); + int result = number; + while ( --number > 1 ) result *= number + CYG_REPORT_RETVAL( result ); return result; } @@ -257,57 +257,57 @@ Explicit tracing CYG_TRACE0( bool, msg ) if bool, print msg CYG_TRACE1( bool, msg, arg ) if bool, printf-style - to + to CYG_TRACE8( bool, msg, arg1...arg8 ) if bool, printf-style CYG_TRACE0B( msg, args... ) to CYG_TRACE8B() use CYG_TRACE_USER_BOOL -CYG_TRACE1X( bool, args... ) to CYG_TRACE8X() print args using %08x -CYG_TRACE1Y( bool, args... ) to CYG_TRACE8Y() print args using %x -CYG_TRACE1D( bool, args... ) to CYG_TRACE8D() print args using %d +CYG_TRACE1X( bool, args... ) to CYG_TRACE8X() print args using %08x +CYG_TRACE1Y( bool, args... ) to CYG_TRACE8Y() print args using %x +CYG_TRACE1D( bool, args... ) to CYG_TRACE8D() print args using %d CYG_TRACE1XV( bool, args... ) to CYG_TRACE8XV() print args using "arg=%08x" CYG_TRACE1YV( bool, args... ) to CYG_TRACE8YV() print args using "arg=%x" CYG_TRACE1DV( bool, args... ) to CYG_TRACE8DV() print args using "arg=%d" -CYG_TRACE1XB( args... ) to CYG_TRACE8XB() print using %08x, no bool -CYG_TRACE1YB( args... ) to CYG_TRACE8YB() print using %x, no bool -CYG_TRACE1DB( args... ) to CYG_TRACE8DB() print using %d, no bool +CYG_TRACE1XB( args... ) to CYG_TRACE8XB() print using %08x, no bool +CYG_TRACE1YB( args... ) to CYG_TRACE8YB() print using %x, no bool +CYG_TRACE1DB( args... ) to CYG_TRACE8DB() print using %d, no bool -CYG_TRACE1XVB( args... ) to CYG_TRACE8XVB() use "arg=%08x", no bool -CYG_TRACE1YVB( args... ) to CYG_TRACE8YVB() use "arg=%x", no bool -CYG_TRACE1DVB( args... ) to CYG_TRACE8DVB() use "arg=%d", no bool +CYG_TRACE1XVB( args... ) to CYG_TRACE8XVB() use "arg=%08x", no bool +CYG_TRACE1YVB( args... ) to CYG_TRACE8YVB() use "arg=%x", no bool +CYG_TRACE1DVB( args... ) to CYG_TRACE8DVB() use "arg=%d", no bool Function tracing ---------------- -CYG_REPORT_FUNCTION() default function entry -CYG_REPORT_FUNCNAME( name ) name the function -CYG_REPORT_FUNCTYPE( exitmsg ) printf for retval -CYG_REPORT_FUNCNAMETYPE( name, exitmsg ) both +CYG_REPORT_FUNCTION() default function entry +CYG_REPORT_FUNCNAME( name ) name the function +CYG_REPORT_FUNCTYPE( exitmsg ) printf for retval +CYG_REPORT_FUNCNAMETYPE( name, exitmsg ) both -CYG_REPORT_FUNCTIONC() as above, but conditional -CYG_REPORT_FUNCNAMEC( name ) on CYG_REPORT_USER_BOOL -CYG_REPORT_FUNCTYPEC( exitmsg ) however it is defined -CYG_REPORT_FUNCNAMETYPEC( name, exitmsg ) ... +CYG_REPORT_FUNCTIONC() as above, but conditional +CYG_REPORT_FUNCNAMEC( name ) on CYG_REPORT_USER_BOOL +CYG_REPORT_FUNCTYPEC( exitmsg ) however it is defined +CYG_REPORT_FUNCNAMETYPEC( name, exitmsg ) ... -CYG_REPORT_RETURN() void function exit -CYG_REPORT_RETVAL( value ) returning value +CYG_REPORT_RETURN() void function exit +CYG_REPORT_RETVAL( value ) returning value -CYG_REPORT_FUNCARGVOID() void function entry -CYG_REPORT_FUNCARG1( format, arg ) printf-style - to -CYG_REPORT_FUNCARG8( format, arg1...arg8 ) printf-style +CYG_REPORT_FUNCARGVOID() void function entry +CYG_REPORT_FUNCARG1( format, arg ) printf-style + to +CYG_REPORT_FUNCARG8( format, arg1...arg8 ) printf-style CYG_REPORT_FUNCARG1X( arg ) - to -CYG_REPORT_FUNCARG8X( arg1...arg8 ) use %08x -CYG_REPORT_FUNCARG1Y... use %x -CYG_REPORT_FUNCARG1D... use %d + to +CYG_REPORT_FUNCARG8X( arg1...arg8 ) use %08x +CYG_REPORT_FUNCARG1Y... use %x +CYG_REPORT_FUNCARG1D... use %d -CYG_REPORT_FUNCARG1XV... use "arg=%08x" -CYG_REPORT_FUNCARG1YV... use "arg=%x" -CYG_REPORT_FUNCARG1DV... use "arg=%d" +CYG_REPORT_FUNCARG1XV... use "arg=%08x" +CYG_REPORT_FUNCARG1YV... use "arg=%x" +CYG_REPORT_FUNCARG1DV... use "arg=%d" --------------------------------------------------------------------------- @@ -322,14 +322,14 @@ The required functions which are used by externC void cyg_tracemsg( cyg_uint32 what, - char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ); + char *psz_func, char *psz_file, cyg_uint32 linenum, + char *psz_msg ); externC void cyg_tracemsg2( cyg_uint32 what, - char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg, - CYG_ADDRWORD arg0, CYG_ADDRWORD arg1 ); + char *psz_func, char *psz_file, cyg_uint32 linenum, + char *psz_msg, + CYG_ADDRWORD arg0, CYG_ADDRWORD arg1 ); // extended in the obvious way for 4,6,8 arguments These functions should expect psz_func and psz_file to possibly be NULL in @@ -378,9 +378,9 @@ also fits in a byte as number or a bitse // ------------------------------------------------------------------------- // We define macros and appropriate prototypes for the trace/fail // system. These are: -// CYG_TRACE0..8 - trace if boolean -// CYG_TRACEPROC - default no comment proc entry -// CYG_TRACEPROCOUT - default no comment proc exit +// CYG_TRACE0..8 - trace if boolean +// CYG_TRACEPROC - default no comment proc entry +// CYG_TRACEPROCOUT - default no comment proc exit // these are executed to deal with tracing - breakpoint? @@ -439,35 +439,35 @@ cyg_tracemsg8( cyg_uint32 what, # ifdef CYGDBG_INFRA_DEBUG_TRACE_MESSAGE # define CYG_TRACE_docall0( _msg_ ) \ - cyg_tracemsg( cyg_trace_trace, \ + cyg_tracemsg( cyg_trace_trace, \ __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_ ); # define CYG_TRACE_docall2( _msg_, _arg0_, _arg1_ ) \ - cyg_tracemsg2( cyg_trace_trace, \ + cyg_tracemsg2( cyg_trace_trace, \ __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_, \ - (CYG_ADDRWORD)_arg0_, (CYG_ADDRWORD)_arg1_ ); + (CYG_ADDRWORD)_arg0_, (CYG_ADDRWORD)_arg1_ ); # define CYG_TRACE_docall4( _msg_, _arg0_, _arg1_ , _arg2_, _arg3_ ) \ - cyg_tracemsg4( cyg_trace_trace, \ + cyg_tracemsg4( cyg_trace_trace, \ __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_, \ (CYG_ADDRWORD)_arg0_, (CYG_ADDRWORD)_arg1_, \ (CYG_ADDRWORD)_arg2_, (CYG_ADDRWORD)_arg3_ ); # define CYG_TRACE_docall6( _msg_, _arg0_, _arg1_ , _arg2_, _arg3_, \ - _arg4_, _arg5_ ) \ - cyg_tracemsg6( cyg_trace_trace, \ + _arg4_, _arg5_ ) \ + cyg_tracemsg6( cyg_trace_trace, \ __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_, \ (CYG_ADDRWORD)_arg0_, (CYG_ADDRWORD)_arg1_, \ - (CYG_ADDRWORD)_arg2_, (CYG_ADDRWORD)_arg3_, \ + (CYG_ADDRWORD)_arg2_, (CYG_ADDRWORD)_arg3_, \ (CYG_ADDRWORD)_arg4_, (CYG_ADDRWORD)_arg5_ ); -# define CYG_TRACE_docall8( _msg_, _arg0_, _arg1_ , _arg2_, _arg3_, \ - _arg4_, _arg5_, _arg6_, _arg7_ ) \ - cyg_tracemsg8( cyg_trace_trace, \ +# define CYG_TRACE_docall8( _msg_, _arg0_, _arg1_ , _arg2_, _arg3_, \ + _arg4_, _arg5_, _arg6_, _arg7_ ) \ + cyg_tracemsg8( cyg_trace_trace, \ __PRETTY_FUNCTION__, __FILE__, __LINE__, _msg_, \ (CYG_ADDRWORD)_arg0_, (CYG_ADDRWORD)_arg1_, \ - (CYG_ADDRWORD)_arg2_, (CYG_ADDRWORD)_arg3_, \ - (CYG_ADDRWORD)_arg4_, (CYG_ADDRWORD)_arg5_, \ + (CYG_ADDRWORD)_arg2_, (CYG_ADDRWORD)_arg3_, \ + (CYG_ADDRWORD)_arg4_, (CYG_ADDRWORD)_arg5_, \ (CYG_ADDRWORD)_arg6_, (CYG_ADDRWORD)_arg7_ ); # else // do not CYGDBG_INFRA_DEBUG_TRACE_MESSAGE @@ -482,11 +482,11 @@ cyg_tracemsg8( cyg_uint32 what, cyg_tracenomsg( __PRETTY_FUNCTION__, __FILE__, __LINE__ ); # define CYG_TRACE_docall6( _msg_, _arg0_, _arg1_ , _arg2_, _arg3_, \ - _arg4_, _arg5_ ) \ + _arg4_, _arg5_ ) \ cyg_tracenomsg( __PRETTY_FUNCTION__, __FILE__, __LINE__ ); -# define CYG_TRACE_docall8( _msg_, _arg0_, _arg1_, _arg2_, _arg3_, \ - _arg4_, _arg5_, _arg6_, _arg7_ ) \ +# define CYG_TRACE_docall8( _msg_, _arg0_, _arg1_, _arg2_, _arg3_, \ + _arg4_, _arg5_, _arg6_, _arg7_ ) \ cyg_tracenomsg( __PRETTY_FUNCTION__, __FILE__, __LINE__ ); #endif @@ -494,58 +494,58 @@ cyg_tracemsg8( cyg_uint32 what, // ------------------------------------------------------------------------- // Conditioned trace; if the condition is false, fail. -#define CYG_TRACE0( _bool_, _msg_ ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall0( _msg_ ); \ +#define CYG_TRACE0( _bool_, _msg_ ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall0( _msg_ ); \ CYG_MACRO_END -#define CYG_TRACE1( _bool_, _msg_, a ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall2( _msg_, a, 0 ); \ +#define CYG_TRACE1( _bool_, _msg_, a ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall2( _msg_, a, 0 ); \ CYG_MACRO_END -#define CYG_TRACE2( _bool_, _msg_, a, b ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall2( _msg_, a, b ); \ +#define CYG_TRACE2( _bool_, _msg_, a, b ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall2( _msg_, a, b ); \ CYG_MACRO_END -#define CYG_TRACE3( _bool_, _msg_, a, b, c ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall4( _msg_, a, b, c, 0 ); \ +#define CYG_TRACE3( _bool_, _msg_, a, b, c ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall4( _msg_, a, b, c, 0 ); \ CYG_MACRO_END -#define CYG_TRACE4( _bool_, _msg_, a, b, c, d ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall4( _msg_, a, b, c, d ); \ +#define CYG_TRACE4( _bool_, _msg_, a, b, c, d ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall4( _msg_, a, b, c, d ); \ CYG_MACRO_END -#define CYG_TRACE5( _bool_, _msg_, a, b, c, d, e ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall6( _msg_, a, b, c, d, e, 0 ); \ +#define CYG_TRACE5( _bool_, _msg_, a, b, c, d, e ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall6( _msg_, a, b, c, d, e, 0 ); \ CYG_MACRO_END -#define CYG_TRACE6( _bool_, _msg_, a, b, c, d, e, f ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall6( _msg_, a, b, c, d, e, f ); \ +#define CYG_TRACE6( _bool_, _msg_, a, b, c, d, e, f ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall6( _msg_, a, b, c, d, e, f ); \ CYG_MACRO_END -#define CYG_TRACE7( _bool_, _msg_, a, b, c, d, e, f, g ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall8( _msg_, a, b, c, d, e, f, g, 0 ); \ +#define CYG_TRACE7( _bool_, _msg_, a, b, c, d, e, f, g ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall8( _msg_, a, b, c, d, e, f, g, 0 ); \ CYG_MACRO_END -#define CYG_TRACE8( _bool_, _msg_, a, b, c, d, e, f, g, h ) \ - CYG_MACRO_START \ - if ( ( _bool_ ) ) \ - CYG_TRACE_docall8( _msg_, a, b, c, d, e, f, g, h ); \ +#define CYG_TRACE8( _bool_, _msg_, a, b, c, d, e, f, g, h ) \ + CYG_MACRO_START \ + if ( ( _bool_ ) ) \ + CYG_TRACE_docall8( _msg_, a, b, c, d, e, f, g, h ); \ CYG_MACRO_END // ------------------------------------------------------------------------- @@ -665,56 +665,56 @@ public: // that the scope of the object be the whole function body. Get it? // These are the unconditional versions: -#define CYG_REPORT_FUNCTION() \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - 1, __PRETTY_FUNCTION__, \ +#define CYG_REPORT_FUNCTION() \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + 1, __PRETTY_FUNCTION__, \ __FILE__, __LINE__ ) -#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - 1, __PRETTY_FUNCTION__, \ +#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + 1, __PRETTY_FUNCTION__, \ __FILE__, __LINE__, _exitmsg_ ) -#define CYG_REPORT_FUNCNAME( _name_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - 1, _name_, \ +#define CYG_REPORT_FUNCNAME( _name_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + 1, _name_, \ __FILE__, __LINE__ ) -#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - 1, _name_, \ +#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + 1, _name_, \ __FILE__, __LINE__, _exitmsg_ ) // These are conditioned on macro CYG_REPORT_USER_BOOL // (which you better have defined) -#define CYG_REPORT_FUNCTIONC() \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - CYG_REPORT_USER_BOOL, __PRETTY_FUNCTION__, \ +#define CYG_REPORT_FUNCTIONC() \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + CYG_REPORT_USER_BOOL, __PRETTY_FUNCTION__, \ __FILE__, __LINE__ ) -#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - CYG_REPORT_USER_BOOL, __PRETTY_FUNCTION__, \ +#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + CYG_REPORT_USER_BOOL, __PRETTY_FUNCTION__, \ __FILE__, __LINE__, _exitmsg_ ) -#define CYG_REPORT_FUNCNAMEC( _name_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - CYG_REPORT_USER_BOOL, _name_, \ +#define CYG_REPORT_FUNCNAMEC( _name_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + CYG_REPORT_USER_BOOL, _name_, \ __FILE__, __LINE__ ) -#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) \ - Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ - CYG_REPORT_USER_BOOL, _name_, \ +#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) \ + Cyg_TraceFunction_Report_ cyg_tracefunction_report_( \ + CYG_REPORT_USER_BOOL, _name_, \ __FILE__, __LINE__, _exitmsg_ ) -#define CYG_REPORT_RETURN() CYG_MACRO_START \ - cyg_tracefunction_report_.set_exitvoid( __LINE__ ); \ +#define CYG_REPORT_RETURN() CYG_MACRO_START \ + cyg_tracefunction_report_.set_exitvoid( __LINE__ ); \ CYG_MACRO_END -#define CYG_REPORT_RETVAL( _value_) CYG_MACRO_START \ - cyg_tracefunction_report_.set_exitvalue( \ - __LINE__, (CYG_ADDRWORD)(_value_) ); \ +#define CYG_REPORT_RETVAL( _value_) CYG_MACRO_START \ + cyg_tracefunction_report_.set_exitvalue( \ + __LINE__, (CYG_ADDRWORD)(_value_) ); \ CYG_MACRO_END @@ -737,29 +737,29 @@ struct Cyg_TraceFunction_Report_ #ifdef CYGDBG_INFRA_DEBUG_TRACE_MESSAGE -#define CYG_REPORT_FUNCTION_ENTER_INTERNAL() CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg( cyg_trace_enter, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - "enter" ); \ +#define CYG_REPORT_FUNCTION_ENTER_INTERNAL() CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg( cyg_trace_enter, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + "enter" ); \ CYG_MACRO_END #define CYG_REPORT_FUNCTION_CONSTRUCT( _c_, _fn_,_fl_,_l_,_xm_,_xv_,_xs_ ) \ - { _c_, _fn_, _fl_, _l_, _xm_, _xv_, _xs_ } + { _c_, _fn_, _fl_, _l_, _xm_, _xv_, _xs_ } #else // do not CYGDBG_INFRA_DEBUG_TRACE_MESSAGE -#define CYG_REPORT_FUNCTION_ENTER_INTERNAL() CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracenomsg( cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum ); \ +#define CYG_REPORT_FUNCTION_ENTER_INTERNAL() CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracenomsg( cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum ); \ CYG_MACRO_END #define CYG_REPORT_FUNCTION_CONSTRUCT( _c_, _fn_,_fl_,_l_,_xm_,_xv_,_xs_ ) \ - { _c_, _fn_, _fl_, _l_ } + { _c_, _fn_, _fl_, _l_ } #endif // not CYGDBG_INFRA_DEBUG_TRACE_MESSAGE @@ -767,106 +767,106 @@ CYG_MACRO_END // that the scope of the object be the whole function body. Get it? // These are the unconditional versions: -#define CYG_REPORT_FUNCTION() \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - 1, __PRETTY_FUNCTION__, __FILE__, __LINE__, NULL, 0, 0 ); \ +#define CYG_REPORT_FUNCTION() \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + 1, __PRETTY_FUNCTION__, __FILE__, __LINE__, NULL, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - 1, __PRETTY_FUNCTION__, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ +#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + 1, __PRETTY_FUNCTION__, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCNAME( _name_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - 1, _name_, __FILE__, __LINE__, NULL, 0, 0 ); \ +#define CYG_REPORT_FUNCNAME( _name_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + 1, _name_, __FILE__, __LINE__, NULL, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - 1, _name_, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ +#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + 1, _name_, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() // These are conditioned on macro CYG_REPORT_USER_BOOL // (which you better have defined) -#define CYG_REPORT_FUNCTIONC() \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - CYG_REPORT_USER_BOOL, \ - __PRETTY_FUNCTION__, __FILE__, __LINE__, NULL, 0, 0 ); \ +#define CYG_REPORT_FUNCTIONC() \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + CYG_REPORT_USER_BOOL, \ + __PRETTY_FUNCTION__, __FILE__, __LINE__, NULL, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - CYG_REPORT_USER_BOOL, \ - __PRETTY_FUNCTION__, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ +#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + CYG_REPORT_USER_BOOL, \ + __PRETTY_FUNCTION__, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCNAMEC( _name_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - CYG_REPORT_USER_BOOL, \ - _name_, __FILE__, __LINE__, NULL, 0, 0 ); \ +#define CYG_REPORT_FUNCNAMEC( _name_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + CYG_REPORT_USER_BOOL, \ + _name_, __FILE__, __LINE__, NULL, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() -#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) \ - struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ - CYG_REPORT_FUNCTION_CONSTRUCT( \ - CYG_REPORT_USER_BOOL, \ - _name_, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ +#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) \ + struct Cyg_TraceFunction_Report_ cyg_tracefunction_report_ = \ + CYG_REPORT_FUNCTION_CONSTRUCT( \ + CYG_REPORT_USER_BOOL, \ + _name_, __FILE__, __LINE__, _exitmsg_, 0, 0 ); \ CYG_REPORT_FUNCTION_ENTER_INTERNAL() #ifdef CYGDBG_INFRA_DEBUG_TRACE_MESSAGE #define CYG_REPORT_RETURN() CYG_MACRO_START \ - CYG_ASSERT( NULL == cyg_tracefunction_report_.exitmsg, \ - "exitvoid used in typed function" ); \ - CYG_ASSERT( 0 == cyg_tracefunction_report_.exitset, \ - "exitvoid used when arg already set" ); \ - cyg_tracefunction_report_.lnum = __LINE__; \ - cyg_tracefunction_report_.exitset = 2; \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg( cyg_trace_return, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - "return void" ); \ + CYG_ASSERT( NULL == cyg_tracefunction_report_.exitmsg, \ + "exitvoid used in typed function" ); \ + CYG_ASSERT( 0 == cyg_tracefunction_report_.exitset, \ + "exitvoid used when arg already set" ); \ + cyg_tracefunction_report_.lnum = __LINE__; \ + cyg_tracefunction_report_.exitset = 2; \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg( cyg_trace_return, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + "return void" ); \ CYG_MACRO_END #define CYG_REPORT_RETVAL( _value_ ) CYG_MACRO_START \ - CYG_ASSERT( 0 == cyg_tracefunction_report_.exitset, \ - "exitvalue used when arg already set" ); \ - cyg_tracefunction_report_.lnum = __LINE__; \ - cyg_tracefunction_report_.exitvalue = (CYG_ADDRWORD)(_value_); \ - cyg_tracefunction_report_.exitset = 1; \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg2( cyg_trace_return, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - cyg_tracefunction_report_.exitmsg ? \ - cyg_tracefunction_report_.exitmsg : \ - "return %08x", \ - cyg_tracefunction_report_.exitvalue, 0 ); \ + CYG_ASSERT( 0 == cyg_tracefunction_report_.exitset, \ + "exitvalue used when arg already set" ); \ + cyg_tracefunction_report_.lnum = __LINE__; \ + cyg_tracefunction_report_.exitvalue = (CYG_ADDRWORD)(_value_); \ + cyg_tracefunction_report_.exitset = 1; \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg2( cyg_trace_return, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + cyg_tracefunction_report_.exitmsg ? \ + cyg_tracefunction_report_.exitmsg : \ + "return %08x", \ + cyg_tracefunction_report_.exitvalue, 0 ); \ CYG_MACRO_END #else // do not CYGDBG_INFRA_DEBUG_TRACE_MESSAGE #define CYG_REPORT_RETURN() CYG_MACRO_START \ - cyg_tracefunction_report_.lnum = __LINE__; \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracenomsg( cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum ); \ + cyg_tracefunction_report_.lnum = __LINE__; \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracenomsg( cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum ); \ CYG_MACRO_END #define CYG_REPORT_RETVAL( _value_ ) CYG_MACRO_START \ - CYG_REPORT_RETURN(); \ + CYG_REPORT_RETURN(); \ CYG_MACRO_END #endif // not CYGDBG_INFRA_DEBUG_TRACE_MESSAGE @@ -875,114 +875,114 @@ CYG_MACRO_END #ifdef CYGDBG_INFRA_DEBUG_TRACE_MESSAGE -#define CYG_REPORT_FUNCARGVOID() CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - "(void)" \ - ); \ +#define CYG_REPORT_FUNCARGVOID() CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + "(void)" \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG1( _format_, a ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg2( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a , 0 \ - ); \ +#define CYG_REPORT_FUNCARG1( _format_, a ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg2( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a , 0 \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG2( _format_, a,b ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg2( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b \ - ); \ +#define CYG_REPORT_FUNCARG2( _format_, a,b ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg2( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG3( _format_, a,b,c ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg4( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c , 0 \ - ); \ +#define CYG_REPORT_FUNCARG3( _format_, a,b,c ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg4( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c , 0 \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG4( _format_, a,b,c,d ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg4( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c, (CYG_ADDRWORD)d \ - ); \ +#define CYG_REPORT_FUNCARG4( _format_, a,b,c,d ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg4( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c, (CYG_ADDRWORD)d \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG5( _format_, a,b,c,d,e ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg6( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ - (CYG_ADDRWORD)e , 0 \ - ); \ +#define CYG_REPORT_FUNCARG5( _format_, a,b,c,d,e ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg6( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ + (CYG_ADDRWORD)e , 0 \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG6( _format_, a,b,c,d,e,f ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg6( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ - (CYG_ADDRWORD)e, (CYG_ADDRWORD)f \ - ); \ +#define CYG_REPORT_FUNCARG6( _format_, a,b,c,d,e,f ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg6( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ + (CYG_ADDRWORD)e, (CYG_ADDRWORD)f \ + ); \ CYG_MACRO_END -#define CYG_REPORT_FUNCARG7( _format_, a,b,c,d,e,f,g ) CYG_MACRO_START \ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg8( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ - (CYG_ADDRWORD)e, (CYG_ADDRWORD)f, \ - (CYG_ADDRWORD)g , 0 \ - ); \ +#define CYG_REPORT_FUNCARG7( _format_, a,b,c,d,e,f,g ) CYG_MACRO_START \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg8( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ + (CYG_ADDRWORD)e, (CYG_ADDRWORD)f, \ + (CYG_ADDRWORD)g , 0 \ + ); \ CYG_MACRO_END #define CYG_REPORT_FUNCARG8( _format_, a,b,c,d,e,f,g,h ) CYG_MACRO_START\ - if ( cyg_tracefunction_report_.cond ) \ - cyg_tracemsg8( cyg_trace_args, \ - cyg_tracefunction_report_.func, \ - cyg_tracefunction_report_.file, \ - cyg_tracefunction_report_.lnum, \ - (_format_), \ - (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ - (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ - (CYG_ADDRWORD)e, (CYG_ADDRWORD)f, \ - (CYG_ADDRWORD)g, (CYG_ADDRWORD)h, \ - ); \ + if ( cyg_tracefunction_report_.cond ) \ + cyg_tracemsg8( cyg_trace_args, \ + cyg_tracefunction_report_.func, \ + cyg_tracefunction_report_.file, \ + cyg_tracefunction_report_.lnum, \ + (_format_), \ + (CYG_ADDRWORD)a, (CYG_ADDRWORD)b, \ + (CYG_ADDRWORD)c, (CYG_ADDRWORD)d, \ + (CYG_ADDRWORD)e, (CYG_ADDRWORD)f, \ + (CYG_ADDRWORD)g, (CYG_ADDRWORD)h \ + ); \ CYG_MACRO_END @@ -1002,15 +1002,15 @@ CYG_MACRO_END #else // no CYGDBG_INFRA_DEBUG_FUNCTION_REPORTS -#define CYG_REPORT_FUNCTION() CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAME( _name_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTION() CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAME( _name_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTIONC() CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMEC( _name_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTIONC() CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMEC( _name_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARGVOID() CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARG1( _format_, a ) CYG_EMPTY_STATEMENT @@ -1022,8 +1022,8 @@ CYG_MACRO_END #define CYG_REPORT_FUNCARG7( _format_, a,b,c,d,e,f,g ) CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARG8( _format_, a,b,c,d,e,f,g,h ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_RETURN() CYG_EMPTY_STATEMENT -#define CYG_REPORT_RETVAL( _value_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_RETURN() CYG_EMPTY_STATEMENT +#define CYG_REPORT_RETVAL( _value_ ) CYG_EMPTY_STATEMENT #endif // CYGDBG_INFRA_DEBUG_FUNCTION_REPORTS @@ -1042,15 +1042,15 @@ CYG_MACRO_END #define CYG_TRACE7( _bool_, _msg_, a,b,c,d,e,f,g ) CYG_EMPTY_STATEMENT #define CYG_TRACE8( _bool_, _msg_, a,b,c,d,e,f,g,h ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTION() CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAME( _name_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTION() CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTYPE( _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAME( _name_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMETYPE( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTIONC() CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMEC( _name_ ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTIONC() CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCTYPEC( _exitmsg_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMEC( _name_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_FUNCNAMETYPEC( _name_, _exitmsg_ ) CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARGVOID() CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARG1( _format_, a ) CYG_EMPTY_STATEMENT @@ -1062,8 +1062,8 @@ CYG_MACRO_END #define CYG_REPORT_FUNCARG7( _format_, a,b,c,d,e,f,g ) CYG_EMPTY_STATEMENT #define CYG_REPORT_FUNCARG8( _format_, a,b,c,d,e,f,g,h ) CYG_EMPTY_STATEMENT -#define CYG_REPORT_RETURN() CYG_EMPTY_STATEMENT -#define CYG_REPORT_RETVAL( _value_ ) CYG_EMPTY_STATEMENT +#define CYG_REPORT_RETURN() CYG_EMPTY_STATEMENT +#define CYG_REPORT_RETVAL( _value_ ) CYG_EMPTY_STATEMENT #endif // ! CYGDBG_USE_TRACING @@ -1083,128 +1083,128 @@ CYG_MACRO_END // used (which we do not define, user must do this) #define CYG_TRACE0B( _msg_ ) \ - CYG_TRACE0( CYG_TRACE_USER_BOOL, _msg_ ) + CYG_TRACE0( CYG_TRACE_USER_BOOL, _msg_ ) #define CYG_TRACE1B( _msg_, a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, _msg_, a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, _msg_, a ) #define CYG_TRACE2B( _msg_, a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, _msg_, a,b ) + CYG_TRACE2( CYG_TRACE_USER_BOOL, _msg_, a,b ) #define CYG_TRACE3B( _msg_, a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, _msg_, a,b,c ) + CYG_TRACE3( CYG_TRACE_USER_BOOL, _msg_, a,b,c ) #define CYG_TRACE4B( _msg_, a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d ) + CYG_TRACE4( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d ) #define CYG_TRACE5B( _msg_, a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e ) + CYG_TRACE5( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e ) #define CYG_TRACE6B( _msg_, a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f ) + CYG_TRACE6( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f ) #define CYG_TRACE7B( _msg_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f,g ) + CYG_TRACE7( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f,g ) #define CYG_TRACE8B( _msg_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f,g,h ) + CYG_TRACE8( CYG_TRACE_USER_BOOL, _msg_, a,b,c,d,e,f,g,h ) // long hex versions #define CYG_TRACE1X( _bool_, a ) \ - CYG_TRACE1( _bool_, "%08x", a ) + CYG_TRACE1( _bool_, "%08x", a ) #define CYG_TRACE2X( _bool_, a,b ) \ - CYG_TRACE2( _bool_, "%08x %08x", a,b ) + CYG_TRACE2( _bool_, "%08x %08x", a,b ) #define CYG_TRACE3X( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, "%08x %08x %08x", a,b,c ) + CYG_TRACE3( _bool_, "%08x %08x %08x", a,b,c ) #define CYG_TRACE4X( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, "%08x %08x %08x %08x", a,b,c,d ) + CYG_TRACE4( _bool_, "%08x %08x %08x %08x", a,b,c,d ) #define CYG_TRACE5X( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, "%08x %08x %08x %08x %08x", a,b,c,d,e ) + CYG_TRACE5( _bool_, "%08x %08x %08x %08x %08x", a,b,c,d,e ) #define CYG_TRACE6X( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, "%08x %08x %08x %08x %08x %08x", \ + CYG_TRACE6( _bool_, "%08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f ) #define CYG_TRACE7X( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, "%08x %08x %08x %08x %08x %08x %08x", \ + CYG_TRACE7( _bool_, "%08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g ) #define CYG_TRACE8X( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, "%08x %08x %08x %08x %08x %08x %08x %08x", \ + CYG_TRACE8( _bool_, "%08x %08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1XV( _bool_, a ) \ - CYG_TRACE1( _bool_, # a "=%08x ", a ) + CYG_TRACE1( _bool_, # a "=%08x ", a ) #define CYG_TRACE2XV( _bool_, a,b ) \ - CYG_TRACE2( _bool_, \ + CYG_TRACE2( _bool_, \ # a "=%08x " # b "=%08x " , a,b ) #define CYG_TRACE3XV( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, \ + CYG_TRACE3( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " , a,b,c ) #define CYG_TRACE4XV( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, \ + CYG_TRACE4( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ , a,b,c,d ) #define CYG_TRACE5XV( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, \ + CYG_TRACE5( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " \ , a,b,c,d,e ) #define CYG_TRACE6XV( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, \ + CYG_TRACE6( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " \ , a,b,c,d,e,f ) #define CYG_TRACE7XV( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, \ + CYG_TRACE7( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8XV( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, \ + CYG_TRACE8( _bool_, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " # h "=%08x " \ , a,b,c,d,e,f,g,h ) #define CYG_TRACE1XB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, "%08x", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, "%08x", a ) #define CYG_TRACE2XB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, "%08x %08x", a,b ) + CYG_TRACE2( CYG_TRACE_USER_BOOL, "%08x %08x", a,b ) #define CYG_TRACE3XB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, "%08x %08x %08x", a,b,c ) + CYG_TRACE3( CYG_TRACE_USER_BOOL, "%08x %08x %08x", a,b,c ) #define CYG_TRACE4XB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x", a,b,c,d ) + CYG_TRACE4( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x", a,b,c,d ) #define CYG_TRACE5XB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x", a,b,c,d,e ) + CYG_TRACE5( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x", a,b,c,d,e ) #define CYG_TRACE6XB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x", \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f ) #define CYG_TRACE7XB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x %08x", \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g ) #define CYG_TRACE8XB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x %08x %08x", \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, "%08x %08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1XVB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%08x ", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%08x ", a ) #define CYG_TRACE2XVB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, \ + CYG_TRACE2( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " , a,b ) #define CYG_TRACE3XVB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, \ + CYG_TRACE3( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " , a,b,c ) #define CYG_TRACE4XVB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, \ + CYG_TRACE4( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ , a,b,c,d ) #define CYG_TRACE5XVB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, \ + CYG_TRACE5( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " \ , a,b,c,d,e ) #define CYG_TRACE6XVB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " \ , a,b,c,d,e,f ) #define CYG_TRACE7XVB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8XVB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " # h "=%08x " \ , a,b,c,d,e,f,g,h ) @@ -1212,107 +1212,107 @@ CYG_MACRO_END // decimal versions #define CYG_TRACE1D( _bool_, a ) \ - CYG_TRACE1( _bool_, "%d", a ) + CYG_TRACE1( _bool_, "%d", a ) #define CYG_TRACE2D( _bool_, a,b ) \ - CYG_TRACE2( _bool_, "%d %d", a,b ) + CYG_TRACE2( _bool_, "%d %d", a,b ) #define CYG_TRACE3D( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, "%d %d %d", a,b,c ) + CYG_TRACE3( _bool_, "%d %d %d", a,b,c ) #define CYG_TRACE4D( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, "%d %d %d %d", a,b,c,d ) + CYG_TRACE4( _bool_, "%d %d %d %d", a,b,c,d ) #define CYG_TRACE5D( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, "%d %d %d %d %d", a,b,c,d,e ) + CYG_TRACE5( _bool_, "%d %d %d %d %d", a,b,c,d,e ) #define CYG_TRACE6D( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, "%d %d %d %d %d %d", \ + CYG_TRACE6( _bool_, "%d %d %d %d %d %d", \ a,b,c,d,e,f ) #define CYG_TRACE7D( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, "%d %d %d %d %d %d %d", \ + CYG_TRACE7( _bool_, "%d %d %d %d %d %d %d", \ a,b,c,d,e,f,g ) #define CYG_TRACE8D( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, "%d %d %d %d %d %d %d %d", \ + CYG_TRACE8( _bool_, "%d %d %d %d %d %d %d %d", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1DV( _bool_, a ) \ - CYG_TRACE1( _bool_, # a "=%d ", a ) + CYG_TRACE1( _bool_, # a "=%d ", a ) #define CYG_TRACE2DV( _bool_, a,b ) \ - CYG_TRACE2( _bool_, \ + CYG_TRACE2( _bool_, \ # a "=%d " # b "=%d " , a,b ) #define CYG_TRACE3DV( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, \ + CYG_TRACE3( _bool_, \ # a "=%d " # b "=%d " # c "=%d " , a,b,c ) #define CYG_TRACE4DV( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, \ + CYG_TRACE4( _bool_, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ , a,b,c,d ) #define CYG_TRACE5DV( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, \ + CYG_TRACE5( _bool_, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " \ , a,b,c,d,e ) #define CYG_TRACE6DV( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, \ + CYG_TRACE6( _bool_, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " \ , a,b,c,d,e,f ) #define CYG_TRACE7DV( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, \ + CYG_TRACE7( _bool_, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8DV( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, \ + CYG_TRACE8( _bool_, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " # h "=%d " \ , a,b,c,d,e,f,g,h ) #define CYG_TRACE1DB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, "%d", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, "%d", a ) #define CYG_TRACE2DB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, "%d %d", a,b ) + CYG_TRACE2( CYG_TRACE_USER_BOOL, "%d %d", a,b ) #define CYG_TRACE3DB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, "%d %d %d", a,b,c ) + CYG_TRACE3( CYG_TRACE_USER_BOOL, "%d %d %d", a,b,c ) #define CYG_TRACE4DB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, "%d %d %d %d", a,b,c,d ) + CYG_TRACE4( CYG_TRACE_USER_BOOL, "%d %d %d %d", a,b,c,d ) #define CYG_TRACE5DB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, "%d %d %d %d %d", a,b,c,d,e ) + CYG_TRACE5( CYG_TRACE_USER_BOOL, "%d %d %d %d %d", a,b,c,d,e ) #define CYG_TRACE6DB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d", \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d", \ a,b,c,d,e,f ) #define CYG_TRACE7DB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d %d", \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d %d", \ a,b,c,d,e,f,g ) #define CYG_TRACE8DB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d %d %d", \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, "%d %d %d %d %d %d %d %d", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1DVB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%d ", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%d ", a ) #define CYG_TRACE2DVB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, \ + CYG_TRACE2( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " , a,b ) #define CYG_TRACE3DVB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, \ + CYG_TRACE3( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " , a,b,c ) #define CYG_TRACE4DVB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, \ + CYG_TRACE4( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ , a,b,c,d ) #define CYG_TRACE5DVB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, \ + CYG_TRACE5( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " \ , a,b,c,d,e ) #define CYG_TRACE6DVB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " \ , a,b,c,d,e,f ) #define CYG_TRACE7DVB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8DVB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " # h "=%d " \ , a,b,c,d,e,f,g,h ) @@ -1320,107 +1320,107 @@ CYG_MACRO_END // short hex versions #define CYG_TRACE1Y( _bool_, a ) \ - CYG_TRACE1( _bool_, "%x", a ) + CYG_TRACE1( _bool_, "%x", a ) #define CYG_TRACE2Y( _bool_, a,b ) \ - CYG_TRACE2( _bool_, "%x %x", a,b ) + CYG_TRACE2( _bool_, "%x %x", a,b ) #define CYG_TRACE3Y( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, "%x %x %x", a,b,c ) + CYG_TRACE3( _bool_, "%x %x %x", a,b,c ) #define CYG_TRACE4Y( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, "%x %x %x %x", a,b,c,d ) + CYG_TRACE4( _bool_, "%x %x %x %x", a,b,c,d ) #define CYG_TRACE5Y( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, "%x %x %x %x %x", a,b,c,d,e ) + CYG_TRACE5( _bool_, "%x %x %x %x %x", a,b,c,d,e ) #define CYG_TRACE6Y( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, "%x %x %x %x %x %x", \ + CYG_TRACE6( _bool_, "%x %x %x %x %x %x", \ a,b,c,d,e,f ) #define CYG_TRACE7Y( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, "%x %x %x %x %x %x %x", \ + CYG_TRACE7( _bool_, "%x %x %x %x %x %x %x", \ a,b,c,d,e,f,g ) #define CYG_TRACE8Y( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, "%x %x %x %x %x %x %x %x", \ + CYG_TRACE8( _bool_, "%x %x %x %x %x %x %x %x", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1YV( _bool_, a ) \ - CYG_TRACE1( _bool_, # a "=%x ", a ) + CYG_TRACE1( _bool_, # a "=%x ", a ) #define CYG_TRACE2YV( _bool_, a,b ) \ - CYG_TRACE2( _bool_, \ + CYG_TRACE2( _bool_, \ # a "=%x " # b "=%x " , a,b ) #define CYG_TRACE3YV( _bool_, a,b,c ) \ - CYG_TRACE3( _bool_, \ + CYG_TRACE3( _bool_, \ # a "=%x " # b "=%x " # c "=%x " , a,b,c ) #define CYG_TRACE4YV( _bool_, a,b,c,d ) \ - CYG_TRACE4( _bool_, \ + CYG_TRACE4( _bool_, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ , a,b,c,d ) #define CYG_TRACE5YV( _bool_, a,b,c,d,e ) \ - CYG_TRACE5( _bool_, \ + CYG_TRACE5( _bool_, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " \ , a,b,c,d,e ) #define CYG_TRACE6YV( _bool_, a,b,c,d,e,f ) \ - CYG_TRACE6( _bool_, \ + CYG_TRACE6( _bool_, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " \ , a,b,c,d,e,f ) #define CYG_TRACE7YV( _bool_, a,b,c,d,e,f,g ) \ - CYG_TRACE7( _bool_, \ + CYG_TRACE7( _bool_, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8YV( _bool_, a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( _bool_, \ + CYG_TRACE8( _bool_, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " # h "=%x " \ , a,b,c,d,e,f,g,h ) #define CYG_TRACE1YB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, "%x", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, "%x", a ) #define CYG_TRACE2YB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, "%x %x", a,b ) + CYG_TRACE2( CYG_TRACE_USER_BOOL, "%x %x", a,b ) #define CYG_TRACE3YB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, "%x %x %x", a,b,c ) + CYG_TRACE3( CYG_TRACE_USER_BOOL, "%x %x %x", a,b,c ) #define CYG_TRACE4YB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, "%x %x %x %x", a,b,c,d ) + CYG_TRACE4( CYG_TRACE_USER_BOOL, "%x %x %x %x", a,b,c,d ) #define CYG_TRACE5YB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, "%x %x %x %x %x", a,b,c,d,e ) + CYG_TRACE5( CYG_TRACE_USER_BOOL, "%x %x %x %x %x", a,b,c,d,e ) #define CYG_TRACE6YB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x", \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x", \ a,b,c,d,e,f ) #define CYG_TRACE7YB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x %x", \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x %x", \ a,b,c,d,e,f,g ) #define CYG_TRACE8YB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x %x %x", \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, "%x %x %x %x %x %x %x %x", \ a,b,c,d,e,f,g,h ) #define CYG_TRACE1YVB( a ) \ - CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%x ", a ) + CYG_TRACE1( CYG_TRACE_USER_BOOL, # a "=%x ", a ) #define CYG_TRACE2YVB( a,b ) \ - CYG_TRACE2( CYG_TRACE_USER_BOOL, \ + CYG_TRACE2( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " , a,b ) #define CYG_TRACE3YVB( a,b,c ) \ - CYG_TRACE3( CYG_TRACE_USER_BOOL, \ + CYG_TRACE3( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " , a,b,c ) #define CYG_TRACE4YVB( a,b,c,d ) \ - CYG_TRACE4( CYG_TRACE_USER_BOOL, \ + CYG_TRACE4( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ , a,b,c,d ) #define CYG_TRACE5YVB( a,b,c,d,e ) \ - CYG_TRACE5( CYG_TRACE_USER_BOOL, \ + CYG_TRACE5( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " \ , a,b,c,d,e ) #define CYG_TRACE6YVB( a,b,c,d,e,f ) \ - CYG_TRACE6( CYG_TRACE_USER_BOOL, \ + CYG_TRACE6( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " \ , a,b,c,d,e,f ) #define CYG_TRACE7YVB( a,b,c,d,e,f,g ) \ - CYG_TRACE7( CYG_TRACE_USER_BOOL, \ + CYG_TRACE7( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " \ , a,b,c,d,e,f,g ) #define CYG_TRACE8YVB( a,b,c,d,e,f,g,h ) \ - CYG_TRACE8( CYG_TRACE_USER_BOOL, \ + CYG_TRACE8( CYG_TRACE_USER_BOOL, \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " # h "=%x " \ , a,b,c,d,e,f,g,h ) @@ -1440,54 +1440,54 @@ CYG_MACRO_END // long hex versions #define CYG_REPORT_FUNCARG1X( a ) \ - CYG_REPORT_FUNCARG1( "%08x", a ) + CYG_REPORT_FUNCARG1( "%08x", a ) #define CYG_REPORT_FUNCARG2X( a,b ) \ - CYG_REPORT_FUNCARG2( "%08x %08x", a,b ) + CYG_REPORT_FUNCARG2( "%08x %08x", a,b ) #define CYG_REPORT_FUNCARG3X( a,b,c ) \ - CYG_REPORT_FUNCARG3( "%08x %08x %08x", a,b,c ) + CYG_REPORT_FUNCARG3( "%08x %08x %08x", a,b,c ) #define CYG_REPORT_FUNCARG4X( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( "%08x %08x %08x %08x", a,b,c,d ) + CYG_REPORT_FUNCARG4( "%08x %08x %08x %08x", a,b,c,d ) #define CYG_REPORT_FUNCARG5X( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( "%08x %08x %08x %08x %08x", a,b,c,d,e ) + CYG_REPORT_FUNCARG5( "%08x %08x %08x %08x %08x", a,b,c,d,e ) #define CYG_REPORT_FUNCARG6X( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( "%08x %08x %08x %08x %08x %08x", \ + CYG_REPORT_FUNCARG6( "%08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7X( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( "%08x %08x %08x %08x %08x %08x %08x", \ + CYG_REPORT_FUNCARG7( "%08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8X( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( "%08x %08x %08x %08x %08x %08x %08x %08x", \ + CYG_REPORT_FUNCARG8( "%08x %08x %08x %08x %08x %08x %08x %08x", \ a,b,c,d,e,f,g,h ) #define CYG_REPORT_FUNCARG1XV( a ) \ - CYG_REPORT_FUNCARG1( # a "=%08x ", a ) + CYG_REPORT_FUNCARG1( # a "=%08x ", a ) #define CYG_REPORT_FUNCARG2XV( a,b ) \ - CYG_REPORT_FUNCARG2( \ + CYG_REPORT_FUNCARG2( \ # a "=%08x " # b "=%08x " , a,b ) #define CYG_REPORT_FUNCARG3XV( a,b,c ) \ - CYG_REPORT_FUNCARG3( \ + CYG_REPORT_FUNCARG3( \ # a "=%08x " # b "=%08x " # c "=%08x " , a,b,c ) #define CYG_REPORT_FUNCARG4XV( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( \ + CYG_REPORT_FUNCARG4( \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ , a,b,c,d ) #define CYG_REPORT_FUNCARG5XV( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( \ + CYG_REPORT_FUNCARG5( \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " \ , a,b,c,d,e ) #define CYG_REPORT_FUNCARG6XV( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( \ + CYG_REPORT_FUNCARG6( \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " \ , a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7XV( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( \ + CYG_REPORT_FUNCARG7( \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " \ , a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8XV( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( \ + CYG_REPORT_FUNCARG8( \ # a "=%08x " # b "=%08x " # c "=%08x " # d "=%08x " \ # e "=%08x " # f "=%08x " # g "=%08x " # h "=%08x " \ , a,b,c,d,e,f,g,h ) @@ -1496,54 +1496,54 @@ CYG_MACRO_END #define CYG_REPORT_FUNCARG1D( a ) \ - CYG_REPORT_FUNCARG1( "%d", a ) + CYG_REPORT_FUNCARG1( "%d", a ) #define CYG_REPORT_FUNCARG2D( a,b ) \ - CYG_REPORT_FUNCARG2( "%d %d", a,b ) + CYG_REPORT_FUNCARG2( "%d %d", a,b ) #define CYG_REPORT_FUNCARG3D( a,b,c ) \ - CYG_REPORT_FUNCARG3( "%d %d %d", a,b,c ) + CYG_REPORT_FUNCARG3( "%d %d %d", a,b,c ) #define CYG_REPORT_FUNCARG4D( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( "%d %d %d %d", a,b,c,d ) + CYG_REPORT_FUNCARG4( "%d %d %d %d", a,b,c,d ) #define CYG_REPORT_FUNCARG5D( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( "%d %d %d %d %d", a,b,c,d,e ) + CYG_REPORT_FUNCARG5( "%d %d %d %d %d", a,b,c,d,e ) #define CYG_REPORT_FUNCARG6D( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( "%d %d %d %d %d %d", \ + CYG_REPORT_FUNCARG6( "%d %d %d %d %d %d", \ a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7D( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( "%d %d %d %d %d %d %d", \ + CYG_REPORT_FUNCARG7( "%d %d %d %d %d %d %d", \ a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8D( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( "%d %d %d %d %d %d %d %d", \ + CYG_REPORT_FUNCARG8( "%d %d %d %d %d %d %d %d", \ a,b,c,d,e,f,g,h ) #define CYG_REPORT_FUNCARG1DV( a ) \ - CYG_REPORT_FUNCARG1( # a "=%d ", a ) + CYG_REPORT_FUNCARG1( # a "=%d ", a ) #define CYG_REPORT_FUNCARG2DV( a,b ) \ - CYG_REPORT_FUNCARG2( \ + CYG_REPORT_FUNCARG2( \ # a "=%d " # b "=%d " , a,b ) #define CYG_REPORT_FUNCARG3DV( a,b,c ) \ - CYG_REPORT_FUNCARG3( \ + CYG_REPORT_FUNCARG3( \ # a "=%d " # b "=%d " # c "=%d " , a,b,c ) #define CYG_REPORT_FUNCARG4DV( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( \ + CYG_REPORT_FUNCARG4( \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ , a,b,c,d ) #define CYG_REPORT_FUNCARG5DV( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( \ + CYG_REPORT_FUNCARG5( \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " \ , a,b,c,d,e ) #define CYG_REPORT_FUNCARG6DV( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( \ + CYG_REPORT_FUNCARG6( \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " \ , a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7DV( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( \ + CYG_REPORT_FUNCARG7( \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " \ , a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8DV( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( \ + CYG_REPORT_FUNCARG8( \ # a "=%d " # b "=%d " # c "=%d " # d "=%d " \ # e "=%d " # f "=%d " # g "=%d " # h "=%d " \ , a,b,c,d,e,f,g,h ) @@ -1551,54 +1551,54 @@ CYG_MACRO_END // short hex versions #define CYG_REPORT_FUNCARG1Y( a ) \ - CYG_REPORT_FUNCARG1( "%x", a ) + CYG_REPORT_FUNCARG1( "%x", a ) #define CYG_REPORT_FUNCARG2Y( a,b ) \ - CYG_REPORT_FUNCARG2( "%x %x", a,b ) + CYG_REPORT_FUNCARG2( "%x %x", a,b ) #define CYG_REPORT_FUNCARG3Y( a,b,c ) \ - CYG_REPORT_FUNCARG3( "%x %x %x", a,b,c ) + CYG_REPORT_FUNCARG3( "%x %x %x", a,b,c ) #define CYG_REPORT_FUNCARG4Y( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( "%x %x %x %x", a,b,c,d ) + CYG_REPORT_FUNCARG4( "%x %x %x %x", a,b,c,d ) #define CYG_REPORT_FUNCARG5Y( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( "%x %x %x %x %x", a,b,c,d,e ) + CYG_REPORT_FUNCARG5( "%x %x %x %x %x", a,b,c,d,e ) #define CYG_REPORT_FUNCARG6Y( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( "%x %x %x %x %x %x", \ + CYG_REPORT_FUNCARG6( "%x %x %x %x %x %x", \ a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7Y( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( "%x %x %x %x %x %x %x", \ + CYG_REPORT_FUNCARG7( "%x %x %x %x %x %x %x", \ a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8Y( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( "%x %x %x %x %x %x %x %x", \ + CYG_REPORT_FUNCARG8( "%x %x %x %x %x %x %x %x", \ a,b,c,d,e,f,g,h ) #define CYG_REPORT_FUNCARG1YV( a ) \ - CYG_REPORT_FUNCARG1( # a "=%x ", a ) + CYG_REPORT_FUNCARG1( # a "=%x ", a ) #define CYG_REPORT_FUNCARG2YV( a,b ) \ - CYG_REPORT_FUNCARG2( \ + CYG_REPORT_FUNCARG2( \ # a "=%x " # b "=%x " , a,b ) #define CYG_REPORT_FUNCARG3YV( a,b,c ) \ - CYG_REPORT_FUNCARG3( \ + CYG_REPORT_FUNCARG3( \ # a "=%x " # b "=%x " # c "=%x " , a,b,c ) #define CYG_REPORT_FUNCARG4YV( a,b,c,d ) \ - CYG_REPORT_FUNCARG4( \ + CYG_REPORT_FUNCARG4( \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ , a,b,c,d ) #define CYG_REPORT_FUNCARG5YV( a,b,c,d,e ) \ - CYG_REPORT_FUNCARG5( \ + CYG_REPORT_FUNCARG5( \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " \ , a,b,c,d,e ) #define CYG_REPORT_FUNCARG6YV( a,b,c,d,e,f ) \ - CYG_REPORT_FUNCARG6( \ + CYG_REPORT_FUNCARG6( \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " \ , a,b,c,d,e,f ) #define CYG_REPORT_FUNCARG7YV( a,b,c,d,e,f,g ) \ - CYG_REPORT_FUNCARG7( \ + CYG_REPORT_FUNCARG7( \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " \ , a,b,c,d,e,f,g ) #define CYG_REPORT_FUNCARG8YV( a,b,c,d,e,f,g,h ) \ - CYG_REPORT_FUNCARG8( \ + CYG_REPORT_FUNCARG8( \ # a "=%x " # b "=%x " # c "=%x " # d "=%x " \ # e "=%x " # f "=%x " # g "=%x " # h "=%x " \ , a,b,c,d,e,f,g,h ) diff --git a/packages/infra/current/include/cyg_type.h b/packages/infra/current/include/cyg_type.h --- a/packages/infra/current/include/cyg_type.h +++ b/packages/infra/current/include/cyg_type.h @@ -3,9 +3,9 @@ //========================================================================== // -// cyg_type.h +// cyg_type.h // -// Standard types, and some useful coding macros. +// Standard types, and some useful coding macros. // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,15 +36,14 @@ // Contributors: nickg // Date: 1997-09-08 // Purpose: share unambiguously sized types. -// Description: we typedef [cyg_][u]int8,16,32 &c for general use. +// Description: we typedef [cyg_][u]int8,16,32 &c for general use. // Usage: #include "cyg/infra/cyg_type.h" -// ... -// cyg_int32 my_32bit_integer; -// +// ... +// cyg_int32 my_32bit_integer; +// //####DESCRIPTIONEND#### // -#include // Configuration header for the infra package #include // Definition of NULL from the compiler // ------------------------------------------------------------------------- @@ -75,6 +74,9 @@ # error You must define CYG_BYTEORDER to equal CYG_LSBFIRST or CYG_MSBFIRST #endif +#ifndef CYG_DOUBLE_BYTEORDER +#define CYG_DOUBLE_BYTEORDER CYG_BYTEORDER +#endif #ifndef cyg_halint8 # define cyg_halint8 char @@ -102,6 +104,13 @@ # define cyg_halcount64 long long #endif +#ifndef cyg_haladdress +# define cyg_haladdress cyg_uint32 +#endif +#ifndef cyg_haladdrword +# define cyg_haladdrword cyg_uint32 +#endif + #ifndef cyg_halbool # ifdef __cplusplus # define cyg_halbool bool @@ -145,11 +154,23 @@ typedef cyg_halbool bool; #define CYG_EMPTY_STATEMENT CYG_MACRO_START CYG_MACRO_END -#define CYG_UNUSED_PARAM( _type_, _name_ ) CYG_MACRO_START \ - _type_ tmp1 = _name_; \ - _name_ = tmp1; \ +#define CYG_UNUSED_PARAM( _type_, _name_ ) CYG_MACRO_START \ + _type_ __tmp1 = (_name_); \ + _type_ __tmp2 = __tmp1; \ + __tmp1 = __tmp2; \ CYG_MACRO_END + +// ------------------------------------------------------------------------- +// Reference a symbol without explicitly making use of it. Ensures that +// the object containing the symbol will be included when linking. + +#define CYG_REFERENCE_OBJECT(__object__) \ + CYG_MACRO_START \ + static void *__cygvar_discard_me__ __attribute__ ((unused)) = \ + &(__object__); \ + CYG_MACRO_END + // ------------------------------------------------------------------------- // Define basic types for using integers in memory and structures; // depends on compiler defaults and CPU type. @@ -201,55 +222,95 @@ typedef cyg_uint8 CYG_BYTE; typedef cyg_uint16 CYG_WORD16; typedef cyg_uint32 CYG_WORD32; typedef cyg_uint64 CYG_WORD64; -typedef cyg_uint32 CYG_ADDRESS; -typedef CYG_ADDRESS CYG_ADDRWORD; + +typedef cyg_haladdress CYG_ADDRESS; +typedef cyg_haladdrword CYG_ADDRWORD; // ------------------------------------------------------------------------- // Constructor ordering macros. These are added as annotations to all // static objects to order the constuctors appropriately. -#if defined(__cplusplus) && defined(CYG_KERNEL_USE_INIT_PRIORITY) - -#define CYG_INIT_PRIORITY( _pri_ ) \ - __attribute__((init_priority (CYG_INIT_##_pri_))) +#if defined(__cplusplus) && defined(__GNUC__) +# define CYGBLD_ATTRIB_INIT_PRI( _pri_ ) __attribute__((init_priority(_pri_))) +#else +// FIXME: should maybe just bomb out if this is attempted anywhere else? +// Not sure +# define CYGBLD_ATTRIB_INIT_PRI( _pri_ ) +#endif -#else +// The following will be removed eventually as it doesn't allow the use of +// e.g. pri+5 format +#define CYG_INIT_PRIORITY( _pri_ ) CYGBLD_ATTRIB_INIT_PRI( CYG_INIT_##_pri_ ) -#define CYG_INIT_PRIORITY( _pri_ ) - -#endif - -#define CYG_INIT_BEFORE( _pri_ ) (CYG_INIT_##_pri_-100) -#define CYG_INIT_AFTER( _pri_ ) (CYG_INIT_##_pri_+100) +#define CYGBLD_ATTRIB_INIT_BEFORE( _pri_ ) CYGBLD_ATTRIB_INIT_PRI(_pri_-100) +#define CYGBLD_ATTRIB_INIT_AFTER( _pri_ ) CYGBLD_ATTRIB_INIT_PRI(_pri_+100) #define CYG_INIT_HAL 10000 #define CYG_INIT_SCHEDULER 11000 #define CYG_INIT_INTERRUPTS 12000 -#define CYG_INIT_CLOCK 13000 -#define CYG_INIT_IDLE_THREAD 14000 -#define CYG_INIT_THREADS 15000 +#define CYG_INIT_DRIVERS 13000 +#define CYG_INIT_CLOCK 14000 +#define CYG_INIT_IDLE_THREAD 15000 +#define CYG_INIT_THREADS 16000 #define CYG_INIT_KERNEL 40000 +#define CYG_INIT_IO 49000 #define CYG_INIT_LIBC 50000 -#define CYG_INIT_APPLICATION 65000 +#define CYG_INIT_APPLICATION 60000 +#define CYG_INIT_PREDEFAULT 65534 #define CYG_INIT_DEFAULT 65535 // ------------------------------------------------------------------------- -// Define a compiler-specific rune for saying a function doesn't return +// COMPILER-SPECIFIC STUFF #ifdef __GNUC__ -# define CYGBLD_NORET __attribute__((noreturn)) -#else -# define CYGBLD_NORET -#endif +// Force a 'C' routine to be called like a 'C++' contructor +# define CYGBLD_ATTRIB_CONSTRUCTOR __attribute__((constructor)) + +// Define a compiler-specific rune for saying a function doesn't return +# define CYGBLD_ATTRIB_NORET __attribute__((noreturn)) + +// How to define weak symbols - this is only relevant for ELF and a.out, +// but that won't be a problem for eCos +# define CYGBLD_ATTRIB_WEAK __attribute__ ((weak)) + +// How to define alias to symbols. Just pass in the symbol itself, not +// the string name of the symbol +# define CYGBLD_ATTRIB_ALIAS(__symbol__) \ + __attribute__ ((alias (#__symbol__))) -#ifdef __GNUC__ -# define CYGBLD_ATTRIB_WEAK __attribute__ ((weak)) -#else +// This effectively does the reverse of the previous macro. It defines +// a name that the attributed variable or function will actually have +// in assembler. +# define CYGBLD_ATTRIB_ASM_ALIAS(__symbol__) \ + __asm__ ( #__symbol__ ) + +// Shows that a function returns the same value when given the same args, but +// note this can't be used if there are pointer args +# define CYGBLD_ATTRIB_CONST __attribute__((const)) + +#else // non-GNU + +# define CYGBLD_ATTRIB_CONSTRUCTOR + +# define CYGBLD_ATTRIB_NORET // This intentionally gives an error only if we actually try to // use it. #error would give an error if we simple can't. # define CYGBLD_ATTRIB_WEAK !!!-- Attribute weak not defined --!!! + +# define CYGBLD_ATTRIB_ALIAS(__x__) !!!-- Attribute alias not defined --!!! + +# define CYGBLD_ATTRIB_ASM_ALIAS(__symbol__) !!!-- Asm alias not defined --!!! + +# define CYGBLD_ATTRIB_CONST + #endif +// How to define weak aliases. Currently this is simply a mixture of the +// above + +# define CYGBLD_ATTRIB_WEAK_ALIAS(__symbol__) \ + CYGBLD_ATTRIB_WEAK CYGBLD_ATTRIB_ALIAS(__symbol__) + // ------------------------------------------------------------------------- // Label name macro. Some toolsets generate labels with initial // underscores and others don't. This macro should be used on labels diff --git a/packages/infra/current/include/diag.h b/packages/infra/current/include/diag.h --- a/packages/infra/current/include/diag.h +++ b/packages/infra/current/include/diag.h @@ -3,9 +3,9 @@ /*============================================================================= // -// diag.h +// diag.h // -// Diagnostic Routines for Infra Development +// Diagnostic Routines for Infra Development // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,30 +25,35 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: Diagnostic Routines for Infra Development -// Description: Diagnostic routines for use during infra development. -// Usage: #include +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: Diagnostic Routines for Infra Development +// Description: Diagnostic routines for use during infra development. +// Usage: #include // //####DESCRIPTIONEND#### // //==========================================================================*/ +#include #include #ifdef CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG #include #endif +#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE +#include +#endif + /*---------------------------------------------------------------------------*/ /* Diagnostic routines */ @@ -56,7 +61,7 @@ externC void diag_init(void); /* externC void diag_write_char(char c); /* Write single char to output */ -externC void diag_write_string(char *psz); /* Write zero terminated string */ +externC void diag_write_string(const char *psz); /* Write zero terminated string */ externC void diag_write_dec( cyg_int32 n); /* Write decimal value */ @@ -65,7 +70,7 @@ externC void diag_write_hex( cyg_uint32 #ifdef CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG -externC void diag_printf( char *fmt, ... ); /* Formatted print */ +externC void diag_printf( const char *fmt, ... ); /* Formatted print */ #else @@ -75,7 +80,7 @@ externC void diag_printf( char *fmt, ... #warning CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG not enabled #warning Expect a "function declaration isn't a prototype" warning -externC void diag_printf(/* char *fmt, CYG_ADDRWORD, CYG_ADDRWORD, +externC void diag_printf(/* const char *fmt, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD, CYG_ADDRWORD */); @@ -85,8 +90,8 @@ externC void diag_printf(/* char *fmt, C /* Internal Diagnostic MACROS */ #ifdef CYGDBG_INFRA_DIAG_USE_DEVICE -#define DIAG_DEVICE_START_SYNC() diag_device_start_sync() -#define DIAG_DEVICE_END_SYNC() diag_device_end_sync() +#define DIAG_DEVICE_START_SYNC() diag_device_start_sync() +#define DIAG_DEVICE_END_SYNC() diag_device_end_sync() #else #define DIAG_DEVICE_START_SYNC() #define DIAG_DEVICE_END_SYNC() diff --git a/packages/infra/current/include/pkgconf/infra.h b/packages/infra/current/include/pkgconf/infra.h --- a/packages/infra/current/include/pkgconf/infra.h +++ b/packages/infra/current/include/pkgconf/infra.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -72,6 +72,7 @@ description "Common types and useful macros. Tracing and assertion facilities. Package startup options." + doc ref/ecos-ref/p-cygpkg-infra.html } }}CFG_DATA */ @@ -125,12 +126,12 @@ */ /* {{CFG_DATA cdl_component CYGPKG_INFRA_DEBUG { - display "Asserts & Tracing" - type boolean - parent CYGPKG_INFRA + display "Asserts & Tracing" + type boolean + parent CYGPKG_INFRA description "The eCos source code contains a significant amount of - internal debugging support, in the form of assertions and - tracing. + internal debugging support, in the form of assertions and + tracing. Assertions check at runtime that various conditions are as expected; if not, execution is halted. Tracing takes the form of text messages that are output @@ -161,26 +162,26 @@ */ /* {{CFG_DATA cdl_component CYGDBG_USE_ASSERTS { - display "Use asserts" - type boolean - parent CYGPKG_INFRA_DEBUG + display "Use asserts" + type boolean + parent CYGPKG_INFRA_DEBUG description "If this option is defined, asserts in the code - are tested. + are tested. Assert functions (CYG_ASSERT()) are defined in 'include/cyg/infra/cyg_ass.h' within the 'install' tree. If it is not defined, these result in no additional object code and no checking of the asserted conditions." } cdl_component CYGDBG_USE_TRACING { - display "Use tracing" - type boolean - parent CYGPKG_INFRA_DEBUG + display "Use tracing" + type boolean + parent CYGPKG_INFRA_DEBUG description "If this option is defined, tracing operations - result in output or logging, depending on other options. + result in output or logging, depending on other options. This may have adverse effects on performance, if the time taken to output message overwhelms the available CPU power or output bandwidth. - Trace functions (CYG_TRACE())are defined in + Trace functions (CYG_TRACE())are defined in 'include/cyg/infra/cyg_trac.h' within the 'install' tree. If it is not defined, these result in no additional object code and no trace information." @@ -215,29 +216,29 @@ */ /* {{CFG_DATA cdl_option CYGDBG_INFRA_DEBUG_PRECONDITIONS { - display "Preconditions" - type boolean - parent CYGDBG_USE_ASSERTS + display "Preconditions" + type boolean + parent CYGDBG_USE_ASSERTS description "This option allows individual control of preconditions. - A precondition is one type of assert, which it is + A precondition is one type of assert, which it is useful to control separately from more general asserts. The function is CYG_PRECONDITION(condition,msg)." } cdl_option CYGDBG_INFRA_DEBUG_POSTCONDITIONS { - display "Postconditions" - type boolean - parent CYGDBG_USE_ASSERTS + display "Postconditions" + type boolean + parent CYGDBG_USE_ASSERTS description "This option allows individual control of postconditions. - A postcondition is one type of assert, which it is + A postcondition is one type of assert, which it is useful to control separately from more general asserts. The function is CYG_POSTCONDITION(condition,msg)." } cdl_option CYGDBG_INFRA_DEBUG_LOOP_INVARIANTS { - display "Loop invariants" - type boolean - parent CYGDBG_USE_ASSERTS + display "Loop invariants" + type boolean + parent CYGDBG_USE_ASSERTS description "This option allows individual control of loop invariants. - A loop invariant is one type of assert, which it is + A loop invariant is one type of assert, which it is useful to control separately from more general asserts, particularly since a loop invariant is typically evaluated a great many times when used correctly. @@ -260,11 +261,11 @@ */ /* {{CFG_DATA cdl_option CYGDBG_INFRA_DEBUG_FUNCTION_REPORTS { - display "Trace function reports" - type boolean - parent CYGDBG_USE_TRACING + display "Trace function reports" + type boolean + parent CYGDBG_USE_TRACING description "This option allows individual control of - function entry/exit tracing, independent of + function entry/exit tracing, independent of more general tracing output. This may be useful to remove clutter from a trace log." @@ -283,34 +284,34 @@ */ /* {{CFG_DATA cdl_option CYGDBG_INFRA_DEBUG_TRACE_ASSERT_NULL { - display "Null output" - type radio - parent CYGPKG_INFRA_DEBUG + display "Null output" + type radio + parent CYGPKG_INFRA_DEBUG description "A null output module which is useful when - debugging interactively; the output routines + debugging interactively; the output routines can be breakpointed rather than have them actually - 'print' something." + 'print' something." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_ASSERT_SIMPLE { - display "Simple output" - type radio - parent CYGPKG_INFRA_DEBUG + display "Simple output" + type radio + parent CYGPKG_INFRA_DEBUG description "An output module which produces simple output - from tracing and assertion events." + from tracing and assertion events." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_ASSERT_FANCY { - display "Fancy output" - type radio - parent CYGPKG_INFRA_DEBUG + display "Fancy output" + type radio + parent CYGPKG_INFRA_DEBUG description "An output module which produces fancy output - from tracing and assertion events." + from tracing and assertion events." } cdl_component CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER { - display "Buffered tracing" - type radio - parent CYGPKG_INFRA_DEBUG + display "Buffered tracing" + type radio + parent CYGPKG_INFRA_DEBUG description "An output module which buffers output - from tracing and assertion events. The stored + from tracing and assertion events. The stored messages are output when an assert fires, or cyg_trace_output() is called. Of course, there will only be stored messages @@ -318,44 +319,44 @@ is enabled above." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_BUFFER_SIZE { - display "Trace buffer size" - type count + display "Trace buffer size" + type count legal_values 5 to 65535 - parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER + parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER description "The size of the trace buffer. This counts the number of trace records stored. When the buffer fills it either wraps, stops recording, or generates output." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_BUFFER_WRAP { - display "Wrap trace buffer when full" - type radio - parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER + display "Wrap trace buffer when full" + type radio + parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER description "When the trace buffer has filled with records it starts again at the beginning. Hence only the last CYGDBG_INFRA_DEBUG_TRACE_BUFFER_SIZE messages will be recorded." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_BUFFER_HALT { - display "Halt trace buffer when full" - type radio - parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER + display "Halt trace buffer when full" + type radio + parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER description "When the trace buffer has filled with records it stops recording. Hence only the first CYGDBG_INFRA_DEBUG_TRACE_BUFFER_SIZE messages will be recorded." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_BUFFER_PRINT { - display "Print trace buffer when full" - type radio - parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER + display "Print trace buffer when full" + type radio + parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER description "When the trace buffer has filled with records it prints the contents of the buffer. The buffer is then emptied and the system continues." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_BUFFER_PRINT_ON_ASSERT { - display "Print trace buffer on assert fail" - type bool - parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER + display "Print trace buffer on assert fail" + type bool + parent CYGDBG_INFRA_DEBUG_TRACE_ASSERT_BUFFER description "When an assertion fails the trace buffer will be printed to the default diagnostic device." } @@ -395,34 +396,34 @@ /* {{CFG_DATA cdl_option CYGDBG_INFRA_DEBUG_ASSERT_MESSAGE { - display "Use assert text" - type boolean - parent CYGDBG_USE_ASSERTS + display "Use assert text" + type boolean + parent CYGDBG_USE_ASSERTS description "All assertions within eCos contain a text message - which should give some information about the condition - being tested. + which should give some information about the condition + being tested. These text messages will end up being embedded in the application image and hence there is a significant penalty in terms of image size. It is possible to suppress the use of these messages by - disabling this option. + disabling this option. This results in smaller code size, but there is less - human-readable information if an assertion actually gets - triggered." + human-readable information if an assertion actually gets + triggered." } cdl_option CYGDBG_INFRA_DEBUG_TRACE_MESSAGE { - display "Use trace text" - type boolean - parent CYGDBG_USE_TRACING + display "Use trace text" + type boolean + parent CYGDBG_USE_TRACING description "All trace calls within eCos contain a text message - which should give some information about the circumstances. + which should give some information about the circumstances. These text messages will end up being embedded in the application image and hence there is a significant penalty in terms of image size. It is possible to suppress the use of these messages by - disabling this option. + disabling this option. This results in smaller code size, but there is less - human-readable information available in the trace output, + human-readable information available in the trace output, possibly only filenames and line numbers." } }}CFG_DATA */ @@ -439,18 +440,18 @@ */ /* {{CFG_DATA cdl_option CYGDBG_INFRA_DEBUG_FUNCTION_PSEUDOMACRO { - display "Use function names" - type boolean - parent CYGPKG_INFRA_DEBUG + display "Use function names" + type boolean + parent CYGPKG_INFRA_DEBUG description "All trace and assert calls within eCos contain a - reference to the builtin macro '__PRETTY_FUNCTION__', + reference to the builtin macro '__PRETTY_FUNCTION__', which evaluates to a string containing the name of the current function. This is useful when reading a trace log. It is possible to suppress the use of the function name - by disabling this option. + by disabling this option. This results in smaller code size, but there is less - human-readable information available in the trace output, + human-readable information available in the trace output, possibly only filenames and line numbers." } }}CFG_DATA */ @@ -480,43 +481,43 @@ /* {{CFG_DATA cdl_component CYGPKG_INFRA_STARTUP { - display "Startup options" - type dummy - parent CYGPKG_INFRA + display "Startup options" + type dummy + parent CYGPKG_INFRA description "Some packages require a startup routine to be called. - This can be carried out by application code, by supplying + This can be carried out by application code, by supplying a routine called cyg_package_start() which calls the appropriate package startup routine(s). Alternatively, this routine can be constructed automatically and configured to call the startup routines of your choice." - doc ref/ecos-ref/c-library-startup.html + doc ref/ecos-ref/c-library-startup.html } cdl_option CYGSEM_START_ISO_C_COMPATIBILITY { - display "Start ISO C library" - type boolean - parent CYGPKG_INFRA_STARTUP - requires CYGPKG_LIBC + display "Start ISO C library" + type boolean + parent CYGPKG_INFRA_STARTUP + requires CYGPKG_LIBC description "Generate a call to initialize the ISO C library - (libc) within the system version of cyg_package_start(). - This enables compatibility with ISO C, in particular in - eCos it creates a thread that invokes the function main() - which the user must supply. + (libc) within the system version of cyg_package_start(). + This enables compatibility with ISO C, in particular in + eCos it creates a thread that invokes the function main() + which the user must supply. It does this by invoking the function cyg_iso_c_start(). If this is disabled, and you want to use the C library, you call cyg_iso_c_start() from your own cyg_package_start() or cyg_userstart()." } cdl_option CYGSEM_START_UITRON_COMPATIBILITY { - display "Start uITRON subsystem" - type boolean - parent CYGPKG_INFRA_STARTUP - requires CYGPKG_UITRON + display "Start uITRON subsystem" + type boolean + parent CYGPKG_INFRA_STARTUP + requires CYGPKG_UITRON description "Generate a call to initialize the - uITRON compatibility subsystem + uITRON compatibility subsystem within the system version of cyg_package_start(). - This enables compatibility with uITRON. - You must configure uITRON with the correct tasks before - starting the uItron subsystem. + This enables compatibility with uITRON. + You must configure uITRON with the correct tasks before + starting the uItron subsystem. If this is disabled, and you want to use uITRON, you must call cyg_uitron_start() from your own cyg_package_start() or cyg_userstart()." diff --git a/packages/infra/current/include/testcase.h b/packages/infra/current/include/testcase.h --- a/packages/infra/current/include/testcase.h +++ b/packages/infra/current/include/testcase.h @@ -24,16 +24,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy -// Contributors: ctarpy -// Date: 1998/16/3 +// Author(s): ctarpy +// Contributors: ctarpy, jlarmour +// Date: 1999-02-16 // // //####DESCRIPTIONEND#### @@ -41,13 +41,24 @@ #include // Common type definitions and support -// The values of status have the following meaning: -// 0 fail -// 1 pass -// 2 exit -// 3 info +// CONSTANTS + +// Status codes + +typedef enum { + CYGNUM_TEST_FAIL, + CYGNUM_TEST_PASS, + CYGNUM_TEST_EXIT, + CYGNUM_TEST_INFO, + CYGNUM_TEST_GDBCMD, + CYGNUM_TEST_NA +} Cyg_test_code; + +// FUNCTION PROTOTYPES + externC void -cyg_test_output(int status, char* msg, int line_number, char* file); +cyg_test_output(Cyg_test_code _status_, const char* _msg_, int _line_number_, + const char* _file_); // This should be called at the start of each test file externC void @@ -55,8 +66,13 @@ cyg_test_init(void); // This causes the test to exit externC void -cyg_test_exit(void) __attribute__ ((__noreturn__)); +cyg_test_exit(void) CYGBLD_ATTRIB_NORET; + +// GLOBALS +externC int cyg_test_is_simulator; // infrastructure changes as necessary + +// MACROS // ----------- Info ----------- // @@ -82,62 +98,89 @@ cyg_test_exit(void) __attribute__ ((__no #define CYG_TEST_INIT() cyg_test_init() #define CYG_TEST_INFO( _msg_ ) \ - cyg_test_output(3, _msg_, __LINE__, __FILE__) + cyg_test_output(CYGNUM_TEST_INFO, _msg_, __LINE__, __FILE__) #define CYG_TEST_PASS( _msg_ ) \ - cyg_test_output(1, _msg_, __LINE__, __FILE__) + cyg_test_output(CYGNUM_TEST_PASS, _msg_, __LINE__, __FILE__) #define CYG_TEST_FAIL( _msg_ ) \ - cyg_test_output(0, _msg_, __LINE__, __FILE__) + cyg_test_output(CYGNUM_TEST_FAIL, _msg_, __LINE__, __FILE__) #define CYG_TEST_EXIT( _msg_ ) \ - (cyg_test_output(2, _msg_, __LINE__, __FILE__), \ + (cyg_test_output(CYGNUM_TEST_EXIT, _msg_, __LINE__, __FILE__), \ cyg_test_exit()) +// Use the following macro to instruct GDB to run a command when using +// the automatic testing infrastructure. This must be used *before* +// CYG_TEST_INIT() is called + +#define CYG_TEST_GDBCMD( _command_ ) \ + CYG_MACRO_START \ + cyg_test_output(CYGNUM_TEST_GDBCMD, _command_, __LINE__, __FILE__); \ + CYG_MACRO_END + +// Use the following macro to declare that a test is not applicable for +// some reason - perhaps not appropriate due to chosen hardware, +// configuration options governing the presence of a tested feature, or +// even configuration options governing the presence of a feature the +// test relies on _in_order_ to test the feature (despite being +// unrelated!) + +#define CYG_TEST_NA( _msg_ ) \ + CYG_MACRO_START \ + cyg_test_output(CYGNUM_TEST_NA, _msg_, __LINE__, __FILE__); \ + cyg_test_exit(); \ + CYG_MACRO_END + #ifdef CYG_COMPOUND_TEST -# define CYG_TEST_FINISH( _msg_ ) \ - (cyg_test_output(2, _msg_, __LINE__, __FILE__), \ - return 0; +# define CYG_TEST_FINISH( _msg_ ) \ + CYG_MACRO_START \ + cyg_test_output(CYGNUM_TEST_EXIT, _msg_, __LINE__, __FILE__); \ + return 0; \ + CYG_MACRO_END #else -# define CYG_TEST_FINISH( _msg_ ) \ - (cyg_test_output(2, _msg_, __LINE__, __FILE__), \ - cyg_test_exit()) +# define CYG_TEST_FINISH( _msg_ ) CYG_TEST_EXIT( _msg_ ) #endif #define CYG_TEST_STILL_ALIVE( _ctr_ , _msg_ ) CYG_TEST_INFO( _msg_ ) - - // ----- The following are convenience functions #define CYG_TEST_PASS_FINISH( _msg_ ) \ - (cyg_test_output(1, _msg_, __LINE__, __FILE__), \ - CYG_TEST_FINISH("done")) + CYG_MACRO_START \ + CYG_TEST_PASS( _msg_ ); \ + CYG_TEST_FINISH("done"); \ + CYG_MACRO_END #define CYG_TEST_FAIL_FINISH( _msg_ ) \ - (cyg_test_output(0, _msg_, __LINE__, __FILE__), \ - CYG_TEST_FINISH("done")) + CYG_MACRO_START \ + CYG_TEST_FAIL( _msg_ ); \ + CYG_TEST_FINISH("done"); \ + CYG_MACRO_END -#define CYG_TEST_CHECK( _chk_ , _msg_) \ - (void)(( _chk_ ) || ( cyg_test_output(0, _msg_, __LINE__, __FILE__), \ - cyg_test_exit(), 1) ) +#define CYG_TEST_CHECK( _chk_ , _msg_) \ + CYG_MACRO_START \ + (void)(( _chk_ ) || ( CYG_TEST_FAIL( _msg_ ) , cyg_test_exit(), 1)); \ + CYG_MACRO_END -#define CYG_TEST_PASS_FAIL( _cdn_, _msg_ ) \ -if ( _cdn_ ) CYG_TEST_PASS( _msg_ ); else CYG_TEST_FAIL( _msg_ ) +#define CYG_TEST_PASS_FAIL( _cdn_, _msg_ ) \ + CYG_MACRO_START \ + if ( _cdn_ ) CYG_TEST_PASS( _msg_ ); else CYG_TEST_FAIL( _msg_ ); \ + CYG_MACRO_END // CYG_TEST_PASS_EXIT and CYG_TEST_FAIL_EXIT are now obscelete, // but are here for now // to avoid breaking testcases which still use them. They will // soon go away. -#define CYG_TEST_PASS_EXIT( _msg_ ) \ - (cyg_test_output(1, _msg_, __LINE__, __FILE__), \ +#define CYG_TEST_PASS_EXIT( _msg_ ) \ + (cyg_test_output(CYGNUM_TEST_PASS, _msg_, __LINE__, __FILE__), \ CYG_TEST_EXIT("done")) -#define CYG_TEST_FAIL_EXIT( _msg_ ) \ - (cyg_test_output(0, _msg_, __LINE__, __FILE__), \ +#define CYG_TEST_FAIL_EXIT( _msg_ ) \ + (cyg_test_output(CYGNUM_TEST_FAIL, _msg_, __LINE__, __FILE__), \ CYG_TEST_EXIT("done")) diff --git a/packages/infra/current/src/PKGconf.mak b/packages/infra/current/src/PKGconf.mak --- a/packages/infra/current/src/PKGconf.mak +++ b/packages/infra/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -32,9 +32,10 @@ PACKAGE := infra include ../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a -COMPILE := startup.cxx dummyxxmain.cxx \ +COMPILE := startup.cxx prestart.cxx pkgstart.cxx userstart.cxx \ + dummyxxmain.cxx \ null.cxx simple.cxx fancy.cxx buffer.cxx \ - diag.c tcdiag.cxx \ + diag.cxx tcdiag.cxx \ memcpy.c memset.c \ delete.cxx diff --git a/packages/infra/current/src/buffer.cxx b/packages/infra/current/src/buffer.cxx --- a/packages/infra/current/src/buffer.cxx +++ b/packages/infra/current/src/buffer.cxx @@ -1,6 +1,6 @@ //========================================================================== // -// buffer.cxx +// buffer.cxx // // Memory buffered trace and assert functions // @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-10-16 -// Purpose: Buffered Trace and assert functions -// Description: The functions in this file are a buffered implementation +// Author(s): nickg +// Contributors: nickg +// Date: 1998-10-16 +// Purpose: Buffered Trace and assert functions +// Description: The functions in this file are a buffered implementation // of the standard trace and assert functions. These store // trace messages in a memory buffer and emit them when an // assert is hit, or when requested to. @@ -67,15 +67,15 @@ // Local Configuration: hack me! // these are generally: -// if 0, feature is disabled -// if 1, feature is enabled, printing is default width -// if >1, field is padded up to that width if necessary -// (not truncated ever) +// if 0, feature is disabled +// if 1, feature is enabled, printing is default width +// if >1, field is padded up to that width if necessary +// (not truncated ever) -#define CYG_FILENAME 20 -#define CYG_THREADID 1 -#define CYG_LINENUM 4 -#define CYG_FUNCNAME 100 +#define CYG_FILENAME 20 +#define CYG_THREADID 1 +#define CYG_LINENUM 4 +#define CYG_FUNCNAME 100 #define CYG_DIAG_PRINTF 1 #define CYG_FUNC_INDENT 2 @@ -174,20 +174,21 @@ write_whattracepost( cyg_uint32 what ) // ------------------------------------------------------------------------- -static char *trim_file(char *file) +static const char *trim_file(const char *file) { #if CYG_FILENAME if ( NULL == file ) file = ""; #if 1 == CYG_FILENAME - char *f = file; + const char *f = file; while( *f ) f++; while( *f != '/' && f != file ) f--; return f==file?f:(f+1); #else static char fbuf2[100]; - char *f = file, *g = fbuf2; + const char *f = file; + char *g = fbuf2; while( *f ) f++; while( *f != '/' && f != file ) f--; if ( f > file ) f++; @@ -201,7 +202,7 @@ static char *trim_file(char *file) #endif } -static char *trim_func(char *func) +static const char *trim_func(const char *func) { #if CYG_FUNCNAME static char fbuf[CYG_FBUF_SIZE]; @@ -216,8 +217,7 @@ static char *trim_func(char *func) fbuf[i++] = '('; fbuf[i++] = ')'; fbuf[i ] = 0; - while( i > 0 && fbuf[i] != ' ' ) i--; - if( i > 0 ) i++; + i=0; #if 1 == CYG_FUNCNAME return &fbuf[i]; #else @@ -265,6 +265,7 @@ static cyg_uint32 get_tid(void) # define get_tid() (0xFFFF) #endif +#ifdef CYGDBG_USE_ASSERTS static void write_thread_id() { #if CYG_THREADID @@ -275,6 +276,7 @@ static void write_thread_id() diag_write_char('>'); #endif } +#endif // ------------------------------------------------------------------------- // Trace functions: @@ -699,8 +701,8 @@ cyg_trace_dump(void) #ifdef CYGDBG_USE_ASSERTS externC void -cyg_assert_fail( char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ) +cyg_assert_fail( const char *psz_func, const char *psz_file, + cyg_uint32 linenum, const char *psz_msg ) { cyg_uint32 old_ints; diff --git a/packages/infra/current/src/delete.cxx b/packages/infra/current/src/delete.cxx --- a/packages/infra/current/src/delete.cxx +++ b/packages/infra/current/src/delete.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1999-08-13 // Purpose: Gives a default delete operation if the C library isn't present // Description: This file supplies a definition of the default delete diff --git a/packages/infra/current/src/diag.c b/packages/infra/current/src/diag.c deleted file mode 100644 --- a/packages/infra/current/src/diag.c +++ /dev/null @@ -1,431 +0,0 @@ -/*======================================================================== -// -// diag.c -// -// Infrastructure diagnostic output code -// -//======================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//======================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: Infrastructure diagnostic output -// Description: Implementations of infrastructure diagnostic routines. -// -//####DESCRIPTIONEND#### -// -//======================================================================*/ - -#include -#include -#include - -#include // base types - -#include // HAL polled output -#include // architectural stuff for... -#include // interrupt control -#include // diagnostic output routines - -#ifdef CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG - -#include - -#endif - - - -/*----------------------------------------------------------------------*/ - -void diag_write_num( - cyg_uint32 n, /* number to write */ - cyg_ucount8 base, /* radix to write to */ - cyg_ucount8 sign, /* sign, '-' if -ve, '+' if +ve */ - cyg_bool pfzero, /* prefix with zero ? */ - cyg_ucount8 width /* min width of number */ - ); - -#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE - -// this is not properly supported; in particular, there is no properly -// defined API (extern definition) for the diag_device routines used below. - -/*----------------------------------------------------------------------*/ -/* Initialize, call before any others */ - -externC void diag_init() -{ -} - -/*----------------------------------------------------------------------*/ -/* Write single char to output */ - -externC void diag_write_char(char c) -{ - diag_device_write_char(c); -} - -#else - -/*----------------------------------------------------------------------*/ -/* Initialize, call before any others */ - -externC void diag_init(void) -{ - HAL_DIAG_INIT(); -} - -/*----------------------------------------------------------------------*/ -/* Write single char to output */ - -#define PREFIX() -//#define PREFIX() HAL_DIAG_WRITE_CHAR(0x0F) - -externC void diag_write_char(char c) -{ - /* Translate LF into CRLF */ - - if( c == '\n' ) - { - PREFIX(); - HAL_DIAG_WRITE_CHAR('\r'); - } - - PREFIX(); - HAL_DIAG_WRITE_CHAR(c); -} -#endif - -/*----------------------------------------------------------------------*/ -/* Write zero terminated string */ - -externC void diag_write_string(char *psz) -{ - while( *psz ) diag_write_char( *psz++ ); -} - -/*----------------------------------------------------------------------*/ -/* Write decimal value */ - -externC void diag_write_dec( cyg_int32 n) -{ - cyg_ucount8 sign; - - if( n < 0 ) n = -n, sign = '-'; - else sign = '+'; - - diag_write_num( n, 10, sign, false, 0); -} - -/*----------------------------------------------------------------------*/ -/* Write hexadecimal value */ - -externC void diag_write_hex( cyg_uint32 n) -{ - diag_write_num( n, 16, '+', false, 0); -} - -/*----------------------------------------------------------------------*/ -/* Generic number writing function */ -/* The parameters determine what radix is used, the signed-ness of the */ -/* number, its minimum width and whether it is zero or space filled on */ -/* the left. */ - -void diag_write_num( - cyg_uint32 n, /* number to write */ - cyg_ucount8 base, /* radix to write to */ - cyg_ucount8 sign, /* sign, '-' if -ve, '+' if +ve */ - cyg_bool pfzero, /* prefix with zero ? */ - cyg_ucount8 width /* min width of number */ - ) -{ - char buf[16]; - cyg_count8 bpos; - char bufinit = pfzero?'0':' '; - char *digits = "0123456789ABCDEF"; - - /* init buffer to padding char: space or zero */ - for( bpos = 0; bpos < (cyg_count8)sizeof(buf); bpos++ ) buf[bpos] = bufinit; - - /* Set pos to start */ - bpos = 0; - - /* construct digits into buffer in reverse order */ - if( n == 0 ) buf[bpos++] = '0'; - else while( n != 0 ) - { - cyg_ucount8 d = n % base; - buf[bpos++] = digits[d]; - n /= base; - } - - /* set pos to width if less. */ - if( (cyg_count8)width > bpos ) bpos = width; - - /* set sign if negative. */ - if( sign == '-' ) - { - if( buf[bpos-1] == bufinit ) bpos--; - buf[bpos] = sign; - } - else bpos--; - - /* Now write it out in correct order. */ - while( bpos >= 0 ) - diag_write_char(buf[bpos--]); -} - -/*----------------------------------------------------------------------*/ -/* perform some simple sanity checks on a string to ensure that it */ -/* consists of printable characters and is of reasonable length. */ - -static cyg_bool diag_check_string( char *str ) -{ - cyg_bool result = true; - char *s; - - if( str == NULL ) return false; - - for( s = str ; result && *s ; s++ ) - { - char c = *s; - - /* Check for a reasonable length string. */ - - if( s-str > 256 ) result = false; - - /* We only really support CR and NL at present. If we want to - * use tabs or other special chars, this test will have to be - * expanded. - */ - - if( c == '\n' || c == '\r' ) - continue; - - /* Check for printable chars. This assumes ASCII */ - - if( c < ' ' || c > '~' ) - result = false; - - } - - return result; -} - -/*----------------------------------------------------------------------*/ - -externC void diag_vprintf( char *fmt, CYG_ADDRWORD *args) -{ - if( !diag_check_string(fmt) ) - { - int i; - diag_write_string("\n"); - return; - } - - while( *fmt != '\0' ) - { - char c = *fmt; - - if( c != '%' ) diag_write_char( c ); - else - { - cyg_bool pfzero = false; - cyg_count8 width = 0; - char sign = '+'; - - c = *++fmt; - - if( c == '0' ) pfzero = true; - - while( '0' <= c && c <= '9' ) - { - width = width*10 + c - '0'; - c = *++fmt; - } - - switch( c ) - { - case 'd': - case 'D': - { - long val = (long)(*args++); - if( val < 0 ) val = -val, sign = '-'; - diag_write_num(val, 10, sign, pfzero, width); - break; - } - - case 'x': - case 'X': - { - unsigned long val = (long)(*args++); - diag_write_num(val, 16, sign, pfzero, width); - break; - } - - case 'c': - case 'C': - { - char ch = (char)(*args++); - diag_write_char(ch); - break; - } - - case 's': - case 'S': - { - char *s = (char *)(*args++); - cyg_count32 len = 0; - cyg_count32 pre = 0, post = 0; - - if( s == NULL ) s = ""; - else if( !diag_check_string(s) ) - { - diag_write_string(" 25 ) width -= 25; - pfzero = false; - /* Drop through to print the closing ">" */ - /* and pad to the required length. */ - } - - while( s[len] != 0 ) len++; - - if( width && len > width ) len = width; - - if( pfzero ) pre = width-len; - else post = width-len; - - while( pre-- > 0 ) diag_write_char(' '); - - while( *s != '\0' && len-- != 0) - diag_write_char(*s++); - - while( post-- > 0 ) diag_write_char(' '); - - break; - } - - case 'b': - case 'B': - { - unsigned long val = (unsigned long)(*args++); - cyg_uint32 i; - if( width == 0 ) width = 32; - - for( i = width-1; i >= 0; i-- ) - diag_write_char( (val&(1< +#include +#include + +#include // base types + +#include // HAL polled output +#include // architectural stuff for... +#include // interrupt control +#include // diagnostic output routines + +#ifdef CYGDBG_INFRA_DIAG_PRINTF_USE_VARARG + +#include + +#endif + +#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE +#include +#endif + +/*----------------------------------------------------------------------*/ + +externC void diag_write_num( + cyg_uint32 n, /* number to write */ + cyg_ucount8 base, /* radix to write to */ + cyg_ucount8 sign, /* sign, '-' if -ve, '+' if +ve */ + cyg_bool pfzero, /* prefix with zero ? */ + cyg_ucount8 width /* min width of number */ + ); + +class Cyg_dummy_diag_init_class { +public: + Cyg_dummy_diag_init_class() { +#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE + diag_device_init(); +#else + HAL_DIAG_INIT(); +#endif + } +}; + +#ifdef CYGDBG_INFRA_DIAG_USE_DEVICE + +// Initialize after IO devices. +static Cyg_dummy_diag_init_class cyg_dummy_diag_init_obj + CYGBLD_ATTRIB_INIT_AFTER(CYG_INIT_IO); + +/*----------------------------------------------------------------------*/ +/* Write single char to output */ + +externC void diag_write_char(char c) +{ + diag_device_write_char(c); +} + +#else + +// Initialize after HAL. +static Cyg_dummy_diag_init_class cyg_dummy_diag_init_obj + CYGBLD_ATTRIB_INIT_AFTER(CYG_INIT_HAL); + +/*----------------------------------------------------------------------*/ +/* Write single char to output */ + +#define PREFIX() +//#define PREFIX() HAL_DIAG_WRITE_CHAR(0x0F) + +externC void diag_write_char(char c) +{ + /* Translate LF into CRLF */ + + if( c == '\n' ) + { + PREFIX(); + HAL_DIAG_WRITE_CHAR('\r'); + } + + PREFIX(); + HAL_DIAG_WRITE_CHAR(c); +} +#endif + +/*----------------------------------------------------------------------*/ +/* Initialize. Call to pull in diag initializing constructor */ + +externC void diag_init(void) +{ +} + +/*----------------------------------------------------------------------*/ +/* Write zero terminated string */ + +externC void diag_write_string(const char *psz) +{ + while( *psz ) diag_write_char( *psz++ ); +} + +/*----------------------------------------------------------------------*/ +/* Write decimal value */ + +externC void diag_write_dec( cyg_int32 n) +{ + cyg_ucount8 sign; + + if( n < 0 ) n = -n, sign = '-'; + else sign = '+'; + + diag_write_num( n, 10, sign, false, 0); +} + +/*----------------------------------------------------------------------*/ +/* Write hexadecimal value */ + +externC void diag_write_hex( cyg_uint32 n) +{ + diag_write_num( n, 16, '+', false, 0); +} + +/*----------------------------------------------------------------------*/ +/* Generic number writing function */ +/* The parameters determine what radix is used, the signed-ness of the */ +/* number, its minimum width and whether it is zero or space filled on */ +/* the left. */ + +externC void diag_write_num( + cyg_uint32 n, /* number to write */ + cyg_ucount8 base, /* radix to write to */ + cyg_ucount8 sign, /* sign, '-' if -ve, '+' if +ve */ + cyg_bool pfzero, /* prefix with zero ? */ + cyg_ucount8 width /* min width of number */ + ) +{ + char buf[16]; + cyg_count8 bpos; + char bufinit = pfzero?'0':' '; + char *digits = "0123456789ABCDEF"; + + /* init buffer to padding char: space or zero */ + for( bpos = 0; bpos < (cyg_count8)sizeof(buf); bpos++ ) buf[bpos] = bufinit; + + /* Set pos to start */ + bpos = 0; + + /* construct digits into buffer in reverse order */ + if( n == 0 ) buf[bpos++] = '0'; + else while( n != 0 ) + { + cyg_ucount8 d = n % base; + buf[bpos++] = digits[d]; + n /= base; + } + + /* set pos to width if less. */ + if( (cyg_count8)width > bpos ) bpos = width; + + /* set sign if negative. */ + if( sign == '-' ) + { + if( buf[bpos-1] == bufinit ) bpos--; + buf[bpos] = sign; + } + else bpos--; + + /* Now write it out in correct order. */ + while( bpos >= 0 ) + diag_write_char(buf[bpos--]); +} + +/*----------------------------------------------------------------------*/ +/* perform some simple sanity checks on a string to ensure that it */ +/* consists of printable characters and is of reasonable length. */ + +static cyg_bool diag_check_string( const char *str ) +{ + cyg_bool result = true; + const char *s; + + if( str == NULL ) return false; + + for( s = str ; result && *s ; s++ ) + { + char c = *s; + + /* Check for a reasonable length string. */ + + if( s-str > 256 ) result = false; + + /* We only really support CR and NL at present. If we want to + * use tabs or other special chars, this test will have to be + * expanded. + */ + + if( c == '\n' || c == '\r' ) + continue; + + /* Check for printable chars. This assumes ASCII */ + + if( c < ' ' || c > '~' ) + result = false; + + } + + return result; +} + +/*----------------------------------------------------------------------*/ + +externC void diag_vprintf( const char *fmt, CYG_ADDRWORD *args) +{ + if( !diag_check_string(fmt) ) + { + int i; + diag_write_string("\n"); + return; + } + + while( *fmt != '\0' ) + { + char c = *fmt; + + if( c != '%' ) diag_write_char( c ); + else + { + cyg_bool pfzero = false; + cyg_count8 width = 0; + char sign = '+'; + + c = *++fmt; + + if( c == '0' ) pfzero = true; + + while( '0' <= c && c <= '9' ) + { + width = width*10 + c - '0'; + c = *++fmt; + } + + switch( c ) + { + case 'd': + case 'D': + { + long val = (long)(*args++); + if( val < 0 ) val = -val, sign = '-'; + diag_write_num(val, 10, sign, pfzero, width); + break; + } + + case 'x': + case 'X': + { + unsigned long val = (long)(*args++); + diag_write_num(val, 16, sign, pfzero, width); + break; + } + + case 'c': + case 'C': + { + char ch = (char)(*args++); + diag_write_char(ch); + break; + } + + case 's': + case 'S': + { + char *s = (char *)(*args++); + cyg_count32 len = 0; + cyg_count32 pre = 0, post = 0; + + if( s == NULL ) s = ""; + else if( !diag_check_string(s) ) + { + diag_write_string(" 25 ) width -= 25; + pfzero = false; + /* Drop through to print the closing ">" */ + /* and pad to the required length. */ + } + + while( s[len] != 0 ) len++; + + if( width && len > width ) len = width; + + if( pfzero ) pre = width-len; + else post = width-len; + + while( pre-- > 0 ) diag_write_char(' '); + + while( *s != '\0' && len-- != 0) + diag_write_char(*s++); + + while( post-- > 0 ) diag_write_char(' '); + + break; + } + + case 'b': + case 'B': + { + unsigned long val = (unsigned long)(*args++); + cyg_uint32 i; + if( width == 0 ) width = 32; + + for( i = width-1; i >= 0; i-- ) + diag_write_char( (val&(1<1, field is padded up to that width if necessary -// (not truncated ever) +// if 0, feature is disabled +// if 1, feature is enabled, printing is default width +// if >1, field is padded up to that width if necessary +// (not truncated ever) -#define CYG_FILENAME 20 -#define CYG_THREADID 0 // DO NOT SET IF NO KERNEL -#define CYG_LINENUM 4 -#define CYG_FUNCNAME 100 +#define CYG_FILENAME 20 +#define CYG_THREADID 0 // DO NOT SET IF NO KERNEL +#define CYG_LINENUM 4 +#define CYG_FUNCNAME 100 #define CYG_DIAG_PRINTF 1 #define CYG_FUNC_INDENT 2 @@ -146,20 +146,21 @@ write_whattracepost( cyg_uint32 what ) } #endif // CYGDBG_USE_TRACING -static char *trim_file(char *file) +static const char *trim_file(const char *file) { #if CYG_FILENAME if ( NULL == file ) file = ""; #if 1 == CYG_FILENAME - char *f = file; + const char *f = file; while( *f ) f++; while( *f != '/' && f != file ) f--; return f==file?f:(f+1); #else static char fbuf2[100]; - char *f = file, *g = fbuf2; + const char *f = file; + char *g = fbuf2; while( *f ) f++; while( *f != '/' && f != file ) f--; if ( f > file ) f++; @@ -173,7 +174,7 @@ static char *trim_file(char *file) #endif } -static char *trim_func(char *func) +static const char *trim_func(const char *func) { #if CYG_FUNCNAME static char fbuf[CYG_FBUF_SIZE]; @@ -188,8 +189,7 @@ static char *trim_func(char *func) fbuf[i++] = '('; fbuf[i++] = ')'; fbuf[i ] = 0; - while( i > 0 && fbuf[i] != ' ' ) i--; - if( i > 0 ) i++; + i=0; #if 1 == CYG_FUNCNAME return &fbuf[i]; #else @@ -475,8 +475,8 @@ cyg_tracemsg8( cyg_uint32 what, #ifdef CYGDBG_USE_ASSERTS externC void -cyg_assert_fail( char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ) +cyg_assert_fail( const char *psz_func, const char *psz_file, + cyg_uint32 linenum, const char *psz_msg ) { cyg_uint32 old_ints; diff --git a/packages/infra/current/src/memcpy.c b/packages/infra/current/src/memcpy.c --- a/packages/infra/current/src/memcpy.c +++ b/packages/infra/current/src/memcpy.c @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-06-04 // Purpose: This file implements the ANSI memcpy() function -// Description: This file implements the memcpy() function defined in ANSI para +// Description: This file implements the memcpy() function defined in ANSI para // 7.11.2.1. This is implemented in the kernel rather than the // C library due to it being required by gcc whether or not the // C library has been configured in. diff --git a/packages/infra/current/src/memset.c b/packages/infra/current/src/memset.c --- a/packages/infra/current/src/memset.c +++ b/packages/infra/current/src/memset.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-06-04 // Purpose: This file implements the ANSI memset() function // Description: This file implements the memset() function defined in ANSI para @@ -81,8 +81,8 @@ void * if (n != 0) { - CYG_CHECK_DATA_PTR( s, "s is not a valid pointer!" ); - CYG_CHECK_DATA_PTR( s+n-1, "s+n-1 is not a valid address!" ); + CYG_CHECK_DATA_PTR( char_ptr, "s is not a valid pointer!" ); + CYG_CHECK_DATA_PTR( (&char_ptr[n-1]), "s+n-1 is not a valid address!" ); } #endif diff --git a/packages/infra/current/src/null.cxx b/packages/infra/current/src/null.cxx --- a/packages/infra/current/src/null.cxx +++ b/packages/infra/current/src/null.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// null.cxx +// null.cxx // -// Null trace and assert functions +// Null trace and assert functions // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-15 -// Purpose: Trace and assert functions -// Description: The functions in this file are null implementations of the +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-15 +// Purpose: Trace and assert functions +// Description: The functions in this file are null implementations of the // standard trace and assert functions. These can be used to // eliminate all trace and assert messages without recompiling. // @@ -54,8 +54,8 @@ #include // assertion macros externC void -cyg_assert_fail( char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ) +cyg_assert_fail( const char *psz_func, const char *psz_file, + cyg_uint32 linenum, const char *psz_msg ) { for(;;); }; @@ -123,8 +123,8 @@ cyg_tracemsg8( cyg_uint32 what, #ifdef CYGDBG_USE_ASSERTS externC void -cyg_assert_fail( char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ) +cyg_assert_fail( const char *psz_func, const char *psz_file, + cyg_uint32 linenum, const char *psz_msg ) { for(;;); }; diff --git a/packages/infra/current/src/pkgstart.cxx b/packages/infra/current/src/pkgstart.cxx new file mode 100644 --- /dev/null +++ b/packages/infra/current/src/pkgstart.cxx @@ -0,0 +1,98 @@ +//======================================================================== +// +// pkgstart.cxx +// +// General startup code for the target machine +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: This provides generic startup code for the eCos system. +// Description: We start the system with the entry point cyg_start() +// which is called from the eCos HALs. This in turn invokes +// cyg_prestart(), cyg_package_start() and cyg_user_start(). +// All these can be overriden by the user. +// Usage: Override the defaults to use your own startup code. +// cyg_package_start() is used to call into individual +// packages' startup code. Alternatively leave it be and +// use the configuration options to set the appropriate +// compatibility environment e.g. uItron, ISO C, etc. +// This may be automatically generated in the future. +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // Configuration header + +// INCLUDES + +#include // Common type definitions and support +#include // Default tracing support + +#ifdef CYGSEM_START_ISO_C_COMPATIBILITY +# include +#endif + +#ifdef CYGSEM_START_UITRON_COMPATIBILITY +# include +#endif + +// FUNCTION PROTOTYPES + +externC void +cyg_package_start( void ) CYGBLD_ATTRIB_WEAK; + +// FUNCTIONS + +void +cyg_package_start( void ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARGVOID(); + + CYG_TRACE0( true, "This is the system default cyg_package_start()" ); + +#ifdef CYGSEM_START_UITRON_COMPATIBILITY + cyg_uitron_start(); +#endif + +#ifdef CYGSEM_START_ISO_C_COMPATIBILITY + // This works even if the kernel is there, but if not, then it + // calls the user main() and doesn't return until it does! + cyg_iso_c_start(); +#endif + + CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing + + CYG_REPORT_RETURN(); +} // cyg_package_start() + +// EOF pkgstart.cxx diff --git a/packages/infra/current/src/prestart.cxx b/packages/infra/current/src/prestart.cxx new file mode 100644 --- /dev/null +++ b/packages/infra/current/src/prestart.cxx @@ -0,0 +1,74 @@ +//======================================================================== +// +// prestart.cxx +// +// General startup code for the target machine +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: This provides generic startup code for the eCos system. +// Description: We start the system with the entry point cyg_start() +// which is called from the eCos HALs. This in turn invokes +// cyg_prestart(), cyg_package_start() and cyg_user_start(). +// All these can be overriden by the user. +// Usage: Override the defaults to use your own startup code. +// cyg_prestart() is the first thing called after the +// HAL initialization, and is before the package +// initialization +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// INCLUDES + +#include // Common type definitions and support +#include // Default tracing support + +// FUNCTION PROTOTYPES + +externC void +cyg_prestart( void ) CYGBLD_ATTRIB_WEAK; + +// FUNCTIONS + +void +cyg_prestart( void ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARGVOID(); + + CYG_TRACE0( true, "This is the system default cyg_prestart()" ); + + CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing + + CYG_REPORT_RETURN(); +} // cyg_prestart() + +// EOF prestart.cxx diff --git a/packages/infra/current/src/simple.cxx b/packages/infra/current/src/simple.cxx --- a/packages/infra/current/src/simple.cxx +++ b/packages/infra/current/src/simple.cxx @@ -1,6 +1,6 @@ //========================================================================== // -// simple.cxx +// simple.cxx // // Simple, non formatting trace and assert functions // @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-12-04 -// Purpose: Simple Trace and assert functions -// Description: The functions in this file are simple implementations +// Author(s): nickg +// Contributors: nickg +// Date: 1997-12-04 +// Purpose: Simple Trace and assert functions +// Description: The functions in this file are simple implementations // of the standard trace and assert functions. These do not // do any printf style formatting, simply printing the string // and arguments directly. @@ -80,13 +80,13 @@ // Functions to trim file names and function names down to printable lengths // (these are shared between trace and assert functions) -static char *trim_file(char *file) +static const char *trim_file(const char *file) { #if !CYG_NO_FILENAME if ( NULL == file ) file = ""; - char *f = file; + const char *f = file; while( *f ) f++; @@ -98,7 +98,7 @@ static char *trim_file(char *file) #endif } -static char *trim_func(char *func) +static const char *trim_func(const char *func) { #if !CYG_NO_FUNCNAME @@ -113,12 +113,9 @@ static char *trim_func(char *func) fbuf[i++] = '('; fbuf[i++] = ')'; - fbuf[i++] = 0; + fbuf[i ] = 0; - while( i > 0 && fbuf[i] != ' ' ) i--; - if( i > 0 ) i++; - - return &fbuf[i]; + return &fbuf[0]; #else return ""; #endif @@ -379,8 +376,8 @@ cyg_tracemsg8( cyg_uint32 what, #ifdef CYGDBG_USE_ASSERTS externC void -cyg_assert_fail( char *psz_func, char *psz_file, cyg_uint32 linenum, - char *psz_msg ) +cyg_assert_fail( const char *psz_func, const char *psz_file, + cyg_uint32 linenum, const char *psz_msg ) { cyg_uint32 old_ints; diff --git a/packages/infra/current/src/startup.cxx b/packages/infra/current/src/startup.cxx --- a/packages/infra/current/src/startup.cxx +++ b/packages/infra/current/src/startup.cxx @@ -22,25 +22,24 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-08-25 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 // Purpose: This provides generic startup code for the eCos system. // Description: We start the system with the entry point cyg_start() // which is called from the eCos HALs. This in turn invokes // cyg_prestart(), cyg_package_start() and cyg_user_start(). // All these can be overriden by the user. // Usage: Override the defaults to use your own startup code, -// or leave it be and use the configuration options to set -// the appropriate compatibility environment e.g. uItron, -// ISO C, etc. +// which will allow you to take complete control after the +// HAL initialization // //####DESCRIPTIONEND#### // @@ -55,17 +54,10 @@ #include // Common type definitions and support #include // Default tracing support -#ifdef CYGSEM_START_ISO_C_COMPATIBILITY -# include -#endif - -#ifdef CYGSEM_START_UITRON_COMPATIBILITY -# include -#endif - #ifdef CYGPKG_KERNEL # include # include +# include #endif // FUNCTION PROTOTYPES @@ -74,13 +66,13 @@ externC void cyg_start( void ) CYGBLD_ATTRIB_WEAK; externC void -cyg_prestart( void ) CYGBLD_ATTRIB_WEAK; +cyg_prestart( void ); externC void -cyg_package_start( void ) CYGBLD_ATTRIB_WEAK; +cyg_package_start( void ); externC void -cyg_user_start( void ) CYGBLD_ATTRIB_WEAK; +cyg_user_start( void ); // FUNCTIONS @@ -104,58 +96,4 @@ cyg_start( void ) CYG_REPORT_RETURN(); } // cyg_start() - -void -cyg_prestart( void ) -{ - CYG_REPORT_FUNCTION(); - CYG_REPORT_FUNCARGVOID(); - - CYG_TRACE0( true, "This is the system default cyg_prestart()" ); - - CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing - - CYG_REPORT_RETURN(); -} // cyg_prestart() - - -void -cyg_package_start( void ) -{ - CYG_REPORT_FUNCTION(); - CYG_REPORT_FUNCARGVOID(); - - CYG_TRACE0( true, "This is the system default cyg_package_start()" ); - -#ifdef CYGSEM_START_UITRON_COMPATIBILITY - cyg_uitron_start(); -#endif - -#ifdef CYGSEM_START_ISO_C_COMPATIBILITY - // This works even if the kernel is there, but if not, then it - // calls the user main() and doesn't return until it does! - cyg_iso_c_start(); -#endif - - CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing - - CYG_REPORT_RETURN(); -} // cyg_package_start() - - - -void -cyg_user_start( void ) -{ - CYG_REPORT_FUNCTION(); - CYG_REPORT_FUNCARGVOID(); - - CYG_TRACE0( true, "This is the system default cyg_user_start()" ); - - CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing - - CYG_REPORT_RETURN(); -} // cyg_user_start() - - // EOF startup.cxx diff --git a/packages/infra/current/src/tcdiag.cxx b/packages/infra/current/src/tcdiag.cxx --- a/packages/infra/current/src/tcdiag.cxx +++ b/packages/infra/current/src/tcdiag.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,59 +30,71 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm -// Date: 1998-03-17 +// Contributors: dsm, jlarmour +// Date: 1999-02-16 // Description: Test harness implementation that uses the infrastructure // diag channel. This is intended for manual testing. // //####DESCRIPTIONEND#### -#include -#include +#include // base types +#include // HAL polled output +#include // what we implement -#include // base types -#include // HAL polled output -#include // what we implement +int cyg_test_is_simulator = 0; // infrastructure changes as necessary -void cyg_test_init() +externC void +cyg_test_init(void) { - diag_init(); + // currently nothing } -void cyg_test_output(int status, char *msg, int line, char *file) +externC void +cyg_test_output(Cyg_test_code status, const char *msg, int line, + const char *file) { - char *st = "UNKNOWN STATUS:"; + char *st; switch (status) { - case 0: + case CYGNUM_TEST_FAIL: st = "FAIL:"; break; - case 1: + case CYGNUM_TEST_PASS: st = "PASS:"; break; - case 2: + case CYGNUM_TEST_EXIT: st = "EXIT:"; break; - case 3: + case CYGNUM_TEST_INFO: st = "INFO:"; break; + case CYGNUM_TEST_GDBCMD: + st = "GDB:"; + break; + case CYGNUM_TEST_NA: + st = "NOTAPPLICABLE:"; + break; + default: + st = "UNKNOWN STATUS:"; + break; } diag_write_string(st); diag_write_char('<'); diag_write_string(msg); diag_write_char('>'); - if( 0 == status ) { - diag_write_string(" Line: "); - diag_write_dec(line); - diag_write_string(", File: "); - diag_write_string(file); + if( CYGNUM_TEST_FAIL == status ) { + diag_write_string(" Line: "); + diag_write_dec(line); + diag_write_string(", File: "); + diag_write_string(file); } diag_write_char('\n'); } // This is an appropriate function to set a breakpoint on -void cyg_test_exit() +externC void +cyg_test_exit(void) { for(;;) ; diff --git a/packages/infra/current/src/userstart.cxx b/packages/infra/current/src/userstart.cxx new file mode 100644 --- /dev/null +++ b/packages/infra/current/src/userstart.cxx @@ -0,0 +1,75 @@ +//======================================================================== +// +// userstart.cxx +// +// General startup code for the target machine +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: This provides generic startup code for the eCos system. +// Description: We start the system with the entry point cyg_start() +// which is called from the eCos HALs. This in turn invokes +// cyg_prestart(), cyg_package_start() and cyg_user_start(). +// All these can be overriden by the user. +// Usage: Override the defaults to use your own startup code. +// cyg_user_start() is the default entry point for programs +// not using a compatibility layer +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// INCLUDES + +#include // Common type definitions and support +#include // Default tracing support + +// FUNCTION PROTOTYPES + +externC void +cyg_user_start( void ) CYGBLD_ATTRIB_WEAK; + + +// FUNCTIONS + +void +cyg_user_start( void ) +{ + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARGVOID(); + + CYG_TRACE0( true, "This is the system default cyg_user_start()" ); + + CYG_EMPTY_STATEMENT; // don't let it complain about doing nothing + + CYG_REPORT_RETURN(); +} // cyg_user_start() + + +// EOF userstart.cxx diff --git a/packages/io/common/current/ChangeLog b/packages/io/common/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/io/common/current/ChangeLog @@ -0,0 +1,65 @@ +1999-04-15 Jonathan Larmour + + * src/iosys.c (cyg_io_set_config): Only dereference len if non-NULL + (cyg_io_get_config): Ditto + (cyg_io_read): Ditto + (cyg_io_write): Ditto + Fix for PR 19856 + +1999-04-12 Jesper Skov + + * src/ioinit.cxx: Use new device IO init priority. + + * src/io_diag.c: [added] + * include/io_diag.h: [added] + * src/PKGconf.mak: + Added io_diag functionality. + +1999-03-18 Gary Thomas + + * include/config_keys.h (CYG_IO_GET_CONFIG_SERIAL_ABORT): + New funtion which aborts (cancels) any pending I/O on a channel. + +1999-03-15 Gary Thomas + + * include/pkgconf/io.h: Add 'CYGDBG_IO_INIT' for control of + init messages. + +1999-03-10 Gary Thomas + + * include/pkgconf/io.h: Improve CDL description. + +1999-03-05 Nick Garnett + + * include/io.h: + Changed include files used to permit non-kernel configurations to + be built. + +1999-02-25 Gary Thomas + + * serial/current/src/common/tty.c (tty_set_config): + Fix problem when passing through to lower level driver. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/io/common/current/include/config_keys.h b/packages/io/common/current/include/config_keys.h new file mode 100644 --- /dev/null +++ b/packages/io/common/current/include/config_keys.h @@ -0,0 +1,60 @@ +#ifndef CYGONCE_CONFIG_KEYS_H +#define CYGONCE_CONFIG_KEYS_H +// ==================================================================== +// +// config_keys.h +// +// Device I/O "Keys" for get/put config functions +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Repository for all get/put config "keys" +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// This file contains all of the 'key' values used by all I/O components. +// It is placed in this single repository to make it easy to reduce conflicts. + +// Get/Set configuration 'key' values for low-level serial I/O +#define CYG_IO_GET_CONFIG_SERIAL_INFO 0x0101 +#define CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN 0x0102 +#define CYG_IO_GET_CONFIG_SERIAL_OUTPUT_FLUSH 0x0103 +#define CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH 0x0104 +#define CYG_IO_GET_CONFIG_SERIAL_ABORT 0x0105 +#define CYG_IO_SET_CONFIG_SERIAL_INFO 0x0181 + +// Get/Set configuration 'key' values for tty-like driver +#define CYG_IO_GET_CONFIG_TTY_INFO 0x0201 // Get channel configuration +#define CYG_IO_SET_CONFIG_TTY_INFO 0x0281 // Set channel configuration + +#endif /* CYGONCE_CONFIG_KEYS_H */ +/* EOF config_keys.h */ diff --git a/packages/io/common/current/include/devtab.h b/packages/io/common/current/include/devtab.h new file mode 100644 --- /dev/null +++ b/packages/io/common/current/include/devtab.h @@ -0,0 +1,113 @@ +#ifndef CYGONCE_IO_DEVTAB_H +#define CYGONCE_IO_DEVTAB_H +// ==================================================================== +// +// devtab.h +// +// Device I/O Table +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Describe low level I/O interfaces. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Private include file. This file should only be used by device +// drivers, not application code. + +#include +#include +#include + +// Set of functions which handle top level I/O functions +typedef struct { + Cyg_ErrNo (*write)(cyg_io_handle_t handle, + const void *buf, + cyg_uint32 *len); + Cyg_ErrNo (*read)(cyg_io_handle_t handle, + void *buf, + cyg_uint32 *len); + Cyg_ErrNo (*get_config)(cyg_io_handle_t handle, + cyg_uint32 key, + void *buf, + cyg_uint32 *len); + Cyg_ErrNo (*set_config)(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buf, + cyg_uint32 *len); +} cyg_devio_table_t; + +#define DEVIO_TABLE(_l,_write,_read,_get_config,_set_config) \ +cyg_devio_table_t _l = { \ + _write, \ + _read, \ + _get_config, \ + _set_config, \ +}; + +typedef struct cyg_devtab_entry { + const char *name; + const char *dep_name; + cyg_devio_table_t *handlers; + bool (*init)(struct cyg_devtab_entry *tab); + Cyg_ErrNo (*lookup)(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); + void *priv; + unsigned long status; +} cyg_devtab_entry_t; + +#define CYG_DEVTAB_STATUS_AVAIL 0x0001 + +extern cyg_devtab_entry_t __DEVTAB__[], __DEVTAB_END__; + +#define DEVTAB_ENTRY(_l,_name,_dep_name,_handlers,_init,_lookup,_priv) \ +cyg_devtab_entry_t _l __attribute__ ((section(".devtab"))) = { \ + _name, \ + _dep_name, \ + _handlers, \ + _init, \ + _lookup, \ + _priv \ +}; + +#define DEVTAB_ENTRY_NO_INIT(_l,_name,_dep_name,_handlers,_init,_lookup,_priv) \ +cyg_devtab_entry_t _l = { \ + _name, \ + _dep_name, \ + _handlers, \ + _init, \ + _lookup, \ + _priv \ +}; + +#endif // CYGONCE_IO_DEVTAB_H diff --git a/packages/io/common/current/include/io.h b/packages/io/common/current/include/io.h new file mode 100644 --- /dev/null +++ b/packages/io/common/current/include/io.h @@ -0,0 +1,91 @@ +#ifndef CYGONCE_IO_H +#define CYGONCE_IO_H +// ==================================================================== +// +// io.h +// +// Device I/O +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Describe low level I/O interfaces. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// This file contains the user-level visible I/O interfaces + +#include +#include +#include + +#ifdef CYGPKG_ERROR +#include +#else +#error I/O subsystem requires 'error' package +#endif + +// typedef int Cyg_ErrNo; + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void *cyg_io_handle_t; + +// Lookup a device and return it's handle +Cyg_ErrNo cyg_io_lookup(const char *name, + cyg_io_handle_t *handle); +// Write data to a device +Cyg_ErrNo cyg_io_write(cyg_io_handle_t handle, + const void *buf, + cyg_uint32 *len); +// Read data from a device +Cyg_ErrNo cyg_io_read(cyg_io_handle_t handle, + void *buf, + cyg_uint32 *len); +// Get the configuration of a device +Cyg_ErrNo cyg_io_get_config(cyg_io_handle_t handle, + cyg_uint32 key, + void *buf, + cyg_uint32 *len); +// Change the configuration of a device +Cyg_ErrNo cyg_io_set_config(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buf, + cyg_uint32 *len); + +#ifdef __cplusplus +} +#endif + +#endif /* CYGONCE_IO_H */ +/* EOF io.h */ diff --git a/packages/io/common/current/include/io_diag.h b/packages/io/common/current/include/io_diag.h new file mode 100644 --- /dev/null +++ b/packages/io/common/current/include/io_diag.h @@ -0,0 +1,54 @@ +#ifndef CYGONCE_IO_COMMON_IO_DIAG_H +#define CYGONCE_IO_COMMON_IO_DIAG_H +//============================================================================= +// +// io_diag.h +// +// Redirect diag output to the configured console device +// +//============================================================================ +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================ +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-04-09 +// Purpose: Kernel diagnostic output +// Description: Implementations of kernel diagnostic routines. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +externC void diag_device_init(void); +externC void diag_device_write_char(char c); +externC void diag_device_start_sync(void); +externC void diag_device_end_sync(void); + +#endif // CYGONCE_IO_COMMON_IO_DIAG_H +//----------------------------------------------------------------------------- +// EOF io_diag.h diff --git a/packages/io/common/current/include/pkgconf/io.h b/packages/io/common/current/include/pkgconf/io.h new file mode 100644 --- /dev/null +++ b/packages/io/common/current/include/pkgconf/io.h @@ -0,0 +1,78 @@ +#ifndef CYGONCE_PKGCONF_IO_H +#define CYGONCE_PKGCONF_IO_H +// ==================================================================== +// +// pkgconf/io.h +// +// Device configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: To allow the user to edit device configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_IO { + display "I/O sub-system" + type bool + requires CYGPKG_ERROR + description " + The eCos system is supplied with a number of different + device drivers. This option enables the basic I/O system + support which is the basis for all drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + + cdl_option CYGDBG_IO_INIT { + display "Debug I/O sub-system" + type bool + parent CYGPKG_IO + description " + This option enables verbose messages to be displayed on the + system 'diag' device during I/O system initialization." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +#undef CYGDBG_IO_INIT + +#endif /* CYGONCE_PKGCONF_IO_H */ +/* EOF io.h */ diff --git a/packages/io/common/current/src/PKGconf.mak b/packages/io/common/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/io/common/current/src/PKGconf.mak @@ -0,0 +1,41 @@ +#=============================================================================== +# +# makefile +# +# io/common/src +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := io +include ../../../../pkgconf/pkgconf.mak +include ../../../../pkgconf/system.mak + +LIBRARY := libextras.a +COMPILE := iosys.c ioinit.cxx io_diag.c +OTHER_OBJS := +OTHER_CLEAN := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + diff --git a/packages/io/common/current/src/io_diag.c b/packages/io/common/current/src/io_diag.c new file mode 100644 --- /dev/null +++ b/packages/io/common/current/src/io_diag.c @@ -0,0 +1,108 @@ +//============================================================================= +// +// io_diag.c +// +// Redirect diag output to the configured console device +// +//============================================================================ +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================ +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-04-09 +// Purpose: Kernel diagnostic output +// Description: Implementations of kernel diagnostic routines. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include // CYGDBG_INFRA_DIAG_USE_DEVICE + +#if defined(CYGDBG_INFRA_DIAG_USE_DEVICE) + +#include // TTY definitions + +#include + +#include +#include + +//#include +//#include + +//----------------------------------------------------------------------------- +// Write single char to output + +static cyg_ucount8 sync_mode = 0; +static cyg_io_handle_t console_handle = 0; +static cyg_io_handle_t hal_handle = 0; + +externC void +diag_device_init(void) +{ + Cyg_ErrNo res; +#ifdef CYGPKG_IO_SERIAL_HALDIAG + res = cyg_io_lookup("/dev/haldiag", &hal_handle); + // FIXME: This ASSERT will try to call diag_device_write_char + // to print out the error string... Recursive crash... + CYG_ASSERT(ENOERR == res, "Can't lookup /dev/haldiag"); +#endif +#ifdef CYGPKG_IO_SERIAL_TTY + res = cyg_io_lookup(CYGDAT_IO_SERIAL_TTY_CONSOLE, &console_handle); + // FIXME: This ASSERT will try to call diag_device_write_char + // to print out the error string... Recursive crash... + CYG_ASSERT(ENOERR == res, "Can't lookup " CYGDAT_IO_SERIAL_TTY_CONSOLE); +#endif +} + +externC void +diag_device_write_char(char c) +{ + int len = 1; + + if (sync_mode) + cyg_io_write(hal_handle, &c, &len); + else + cyg_io_write(console_handle, &c, &len); +} + +externC void +diag_device_start_sync() +{ + sync_mode = 1; +} + +externC void +diag_device_end_sync() +{ + sync_mode = 0; +} + +#endif // CYGDBG_INFRA_DIAG_USE_DEVICE + +//----------------------------------------------------------------------------- +// End of io_diag.c diff --git a/packages/io/common/current/src/ioinit.cxx b/packages/io/common/current/src/ioinit.cxx new file mode 100644 --- /dev/null +++ b/packages/io/common/current/src/ioinit.cxx @@ -0,0 +1,58 @@ +//========================================================================== +// +// io/iosys.c +// +// I/O Subsystem + Device Table support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Device Table +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +// This is a dummy class just so we can execute the I/O package +// initialization at it's proper priority + +externC void cyg_io_init(void); + +class cyg_io_init_class { +public: + cyg_io_init_class(void) { + cyg_io_init(); + } +}; + +// And here's an instance of the class just to make the code run +static cyg_io_init_class _cyg_io_init CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_IO); diff --git a/packages/io/common/current/src/iosys.c b/packages/io/common/current/src/iosys.c new file mode 100644 --- /dev/null +++ b/packages/io/common/current/src/iosys.c @@ -0,0 +1,226 @@ +//========================================================================== +// +// io/iosys.c +// +// I/O Subsystem + Device Table support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Device I/O Support +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include + +//extern void cyg_io_init(void) CYGBLD_ATTRIB_CONSTRUCTOR +// CYG_INIT_PRIORITY(CYG_INIT_BEFORE(LIBC)); + +// Checks that two strings are "equivalent" device names +// 'n1' is a string from the user +// 'n2' is a name in a device table entry +// 'cyg_io_compare()' will return true IFF +// n1 == n2, for all characters +// n2 ends in '/' and matches n1 up to the terminating '/' +// 'ptr' will get a pointer to the residual string. +static bool +cyg_io_compare(const char *n1, const char *n2, const char **ptr) +{ + while (*n1 && *n2) { + if (*n1++ != *n2++) { + return false; + } + } + if (*n1) { + // See if the devtab name is is a substring + if (*(n2-1) == '/') { + *ptr = n1; + return true; + } + } + if (*n1 || *n2) { + return false; + } + *ptr = n1; + return true; +} + +// +// This function is called during system initialization. The purpose is +// to step through all devices linked into the system, calling their +// "init" entry points. +// + +void +cyg_io_init(void) +{ + static int _init = false; + cyg_devtab_entry_t *t; + if (_init) return; + for (t = &__DEVTAB__[0]; t != &__DEVTAB_END__; t++) { +#ifdef CYGDBG_IO_INIT + diag_printf("Init device '%s'\n", t->name); +#endif + if (t->init(t)) { + t->status = CYG_DEVTAB_STATUS_AVAIL; + } else { + // What to do if device init fails? + t->status = 0; // Device not [currently] available + } + } + _init = true; +} + +// +// Look up the devtab entry for a named device and return its handle. +// If the device is found and it has a "lookup" function, call that +// function to allow the device/driver to perform any necessary +// initializations. +// + +Cyg_ErrNo +cyg_io_lookup(const char *name, cyg_io_handle_t *handle) +{ + cyg_devtab_entry_t *t, *st; + Cyg_ErrNo res; + const char *name_ptr; + for (t = &__DEVTAB__[0]; t != &__DEVTAB_END__; t++) { + if (cyg_io_compare(name, t->name, &name_ptr)) { + // FUTURE: Check 'avail'/'online' here + if (t->dep_name) { + res = cyg_io_lookup(t->dep_name, (cyg_io_handle_t *)&st); + if (res != ENOERR) { + return res; + } + } else { + st = (cyg_devtab_entry_t *)0; + } + if (t->lookup) { + // This indirection + the name pointer allows the lookup routine + // to return a different 'devtab' handle. This will provide for + // 'pluggable' devices, file names, etc. + res = (t->lookup)(&t, st, name_ptr); + if (res != ENOERR) { + return res; + } + } + *handle = (cyg_io_handle_t)t; + return ENOERR; + } + } + return -ENOENT; // Not found +} + +// +// 'write' data to a device. +// + +Cyg_ErrNo +cyg_io_write(cyg_io_handle_t handle, const void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + // Validate request + if (!t->handlers->write) { + return -EDEVNOSUPP; + } + // Special check. If length is zero, this just verifies that the + // 'write' method exists for the given device. + if (NULL != len && 0 == *len) { + return ENOERR; + } + return t->handlers->write(handle, buf, len); +} + +// +// 'read' data from a device. +// + +Cyg_ErrNo +cyg_io_read(cyg_io_handle_t handle, void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + // Validate request + if (!t->handlers->read) { + return -EDEVNOSUPP; + } + // Special check. If length is zero, this just verifies that the + // 'read' method exists for the given device. + if (NULL != len && 0 == *len) { + return ENOERR; + } + return t->handlers->read(handle, buf, len); +} + +// +// Get the configuration of a device. +// + +Cyg_ErrNo +cyg_io_get_config(cyg_io_handle_t handle, cyg_uint32 key, void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + // Validate request + if (!t->handlers->get_config) { + return -EDEVNOSUPP; + } + // Special check. If length is zero, this just verifies that the + // 'get_config' method exists for the given device. + if (NULL != len && 0 == *len) { + return ENOERR; + } + return t->handlers->get_config(handle, key, buf, len); +} + +// +// Change the configuration of a device. +// + +Cyg_ErrNo +cyg_io_set_config(cyg_io_handle_t handle, cyg_uint32 key, const void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + // Validate request + if (!t->handlers->set_config) { + return -EDEVNOSUPP; + } + // Special check. If length is zero, this just verifies that the + // 'set_config' method exists for the given device. + if (NULL != len && 0 == *len) { + return ENOERR; + } + return t->handlers->set_config(handle, key, buf, len); +} + +/*---------------------------------------------------------------------------*/ +/* End of io/iosys.c */ diff --git a/packages/io/serial/current/ChangeLog b/packages/io/serial/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/ChangeLog @@ -0,0 +1,551 @@ +1999-04-20 Gary Thomas + + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: Fix default baud rate if unbuffered. + +1999-04-15 Jesper Skov + PR 19752 + * tests/serial3.c: + * tests/serial5.c: + Run these tests at a lower baud rate on ARM AEB. + +1999-04-14 Jesper Skov + PR 19839 + * src/mn10300/mn10300_serial.c: + Fix compiler warnings. + +1999-04-14 Bart Veer + + * include/pkgconf/io_serial.h: + Reparent the board-specific serial devices below the actual boards. + +1999-04-13 Jesper Skov + + * tests/ser_test_protocol.inl: + NA when run from simulator. + +1999-04-12 Jesper Skov + + * tests/ser_test_protocol.inl: + Disabled 115200 for MN10300. + Reclaim interrupt vectors from CygMon when testing on SLEB. + +1999-04-09 Gary Thomas + + * include/serial.h: Change SERIAL_CHANNEL setup so all channels + have serial callbacks, regardless of buffering. + +1999-04-09 Jesper Skov + + * src/common/tty.c: + * include/pkgconf/io_serial.h: + Added new ttydiag device layered on top of haldiag, so that tty0 + can be layered on top of ser0. + +1999-04-08 Jesper Skov + + * tests/tty1.c: [added] + * tests/tty2.c: [added] + * tests/PKGconf.mak: + * tests/ser_test_protocol.inl: + Added two simple TTY tests. + +1999-04-07 Hugo Tyson + + * src/sparclite/sleb_sdtr.h: Include cyg/hal/hal_io.h for I/O + macros instead of hal_diag.h where they had evolved before. + +1999-04-06 Jesper Skov + + * tests/serial4.c (serial_test): + * tests/serial3.c (serial_test): + Reduce packet sizes. + +1999-03-31 Jesper Skov + + * tests/ser_test_protocol.inl: Added remaining targets to the + test. + +1999-03-31 Gary Thomas + + * src/sparclite/sleb_sdtr.c (sleb_sdtr_start_xmit): Fix timing race + when enabling xmit interrupts. + +1999-03-26 Gary Thomas + + * src/sparclite/sleb_sdtr.c: Change how the port is set up. The transmitter + is now always enabled, just the interrupts are masked/unmasked to control it. + This lets the serial driver cooperate with Cygmon on the port used for GDB. + Note that currently serial input does not work for CON1 since Cygmon is + taking all of the receive interrupts for itself. + (sleb_sdtr_tx_DSR): Need to keep track whether xmit interrupt should be + enabled - otherwise it can get enabled incorrectly and we get interrupted + to death! + +1999-03-26 Jesper Skov + + * tests/ser_test_protocol.inl: Send a DONE message after a no-echo + binary packet. + +1999-03-26 Hugo Tyson + + * tests/serial5.c: + * tests/serial4.c: + * tests/serial3.c: + * tests/serial2.c: + * tests/serial1.c: + Make these build when no kernel present; include of testcase + was the wrong side of the ifdef. + +1999-03-26 Jesper Skov + + * tests/serial5.c: + * tests/serial4.c: + * tests/serial3.c: + * tests/serial2.c: + * tests/serial1.c: + Moved NOP check to ser_test_protocol open call. + + * tests/ser_test_protocol.inl: Make sure the proper device is + selected for testing. Do NOP check in open call. + +1999-03-25 Gary Thomas + + * include/pkgconf/io_serial.h: + * misc/console.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: + * src/common/tty.c: + * src/mips/tx3904_serial.c: + * src/mn10300/mn10300_serial.c: + * src/powerpc/cogent_serial_with_ints.c: + * src/sparclite/sleb_sdtr.c: Update CDL to follow naming conventions. + + * src/mips/tx3904_serial.c (tx3904_serial_config_port): + Make sure port is enabled (CDL) before using it. + + * src/mn10300/mn10300_serial.c (mn10300_serial_config_port): + * src/powerpc/cogent_serial_with_ints.c (cogent_serial_config_port): + * src/arm/aeb_serial.c (aeb_serial_config_port): + * src/arm/pid_serial_with_ints.c (pid_serial_config_port): Change so that + the physical port is not modified unless the provided configuration is valid. + + * src/sparclite/sleb_sdtr.c (sleb_sdtr_config_port): + Using wrong config data. + + * include/serialio.h: Add macros to support baud rate from CDL. + + * include/pkgconf/io_serial.h: + * src/mn10300/mn10300_serial.c: + * src/mips/tx3904_serial.c (tx3904_serial_ISR): + * src/sparclite/sleb_sdtr.c: + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/pid_serial_with_ints.c: + * src/arm/aeb_serial.c: Add configury for baud rate and buffer size. + +1999-03-24 Nick Garnett + + * src/mips/tx3904_serial.c: + Now uses CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL to get CPU + frequency. This is a little more accurate than using + CYGHWR_HAL_MIPS_CPU_FREQ. + +1999-03-24 Gary Thomas + + * include/serialio.h (CYGNUM_SERIAL_BAUD_MIN/MAX): Add for completeness. + + * src/arm/aeb_serial.c (aeb_serial_stop_xmit): + * src/arm/pid_serial_with_ints.c (pid_serial_stop_xmit): Fix typo in comment. + +1999-03-24 Jesper Skov + + * tests/ser_test_protocol.inl: Weeded out configs TX39 doesn't + like. + + * src/powerpc/cogent_serial.h: + Added copyright header. + + * tests/ser_test_protocol.inl: + * tests/serial1.c: + * tests/serial2.c: + * tests/serial3.c: + * tests/serial4.c: + * tests/serial5.c: + Don't try to run tests when no IO device has been specified. + +1999-03-23 Jesper Skov + + * misc/serial1.c, misc/serial2.c, misc/serial3.c, misc/serial4.c, + * misc/serial5.c, misc/ser_test_protocol.inl + Deleted. + +1999-03-23 Jesper Skov + + * misc/PKGconf.mak: + * tests/timeout.inl: + * tests/PKGconf.mak: + * tests/serial1.c: + * tests/serial2.c: + * tests/serial3.c: + * tests/serial4.c: + * tests/serial5.c: + * tests/ser_test_protocol.inl: + Moved the serial tests from the misc directory to the tests + directory. + +1999-03-23 Nick Garnett + + * src/mn10300/mn10300_serial.c: Now initially mask TX interrupts + at initialization and unmask/remask in start/stop xmit + routines. This has no real effect on the hardware, but the + simulator does not implement the LCR_TXE bit properly, resulting + in spurious TX interrupts during diagnostic output. + This was the cause of the slow output reported in PR 19559. + +1999-03-23 Gary Thomas + + * include/pkgconf/io_serial.h: Fix "display" strings to have appropriate + case - mostly lower case. + +1999-03-22 Hugo Tyson + + * misc/console.c: + * misc/serial.c: + * misc/serial1.c: + * misc/serial2.c: + * misc/serial3.c: + * misc/serial4.c: + * misc/serial5.c: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-22 Gary Thomas + + * src/mn10300/mn10300_serial.c: + * src/mips/tx3904_serial.c: Add CDL configury. + + * include/pkgconf/io_serial.h: Update CDL to add device name + configurability for all devices. + + * src/sparclite/sleb_sdtr.c: + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: Use CDL configured device names. + +1999-03-22 Jesper Skov + + * misc/serial1.c: + * misc/serial2.c: + * misc/serial3.c: + * misc/serial4.c: + * misc/serial5.c: + Requires kernel as well. + +1999-03-22 Jesper Skov + + * src/sparclite/sleb_sdtr.c: + Moved include statement to avoid warnings. + +1999-03-19 Jesper Skov + + * misc/ser_test_protocol.inl: + * misc/serial5.c: + * misc/PKGconf.mak: + Replace complex and not very stable duplex test with a simpler + test that works better. + Added serial5 using that test. + +1999-03-19 Jesper Skov + + * misc/PKGconf.mak: + * misc/serial1.c: + * misc/serial2.c: + Added API test and made serial2 do simple string output. + +1999-03-19 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: Changed ToDo comment. + +1999-03-19 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: + Moved include statement to avoid warnings. + +1999-03-19 Gary Thomas + + * include/pkgconf/io_serial.h: More CDL problems. + +1999-03-18 Gary Thomas + + * include/pkgconf/io_serial.h: Add CDL for SPARClite SLEB. + + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/pid_serial_with_ints.c: + * src/arm/aeb_serial.c: Update device names to match CDL. + + * include/pkgconf/io_serial.h: Change names for serial ports to + be CYGPKG_IO_SERIAL___. + +1999-03-18 Jesper Skov + + * misc/ser_test_protocol.inl: + * misc/serial2.c: + First stab at the duplex binary test. Still much fun to be had... + +1999-03-18 Jesper Skov + + * misc/ser_test_protocol.inl: Added timeout for PING. + +1999-03-18 Gary Thomas + + * src/common/serial.c: Change ABORT functionality to be DSR safe. + (serial_get_config): Fix typo! + + * include/pkgconf/io_serial.h: Small change in CDL to make serial + devices tied to the platform and not the serial I/O package. This + means that only the devices appropriate to a given platform can be + enabled. + + * misc/serial.c: Better use of alarms - only trigger at the time of + the next timeout. Moved timeout functions to new file "timeout.inl". + + * src/common/serial.c (serial_get_config): Add support for + CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH and CYG_IO_GET_CONFIG_SERIAL_ABORT. + + * misc/serial.c: Add simple timeout mechanisms. + +1999-03-17 Gary Thomas + + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: Conditionalize based on CDL. + + * include/pkgconf/io_serial.h: Add some CDL configury - not perfect + because of current ~CDL limitations. + +1999-03-17 Jesper Skov + + * misc/serial2.c: Cleaned up a bit. Used for hacking new tests. + +1999-03-17 Jesper Skov + + * misc/PKGconf.mak: + * misc/ser_test_protocol.inl: + * misc/serial2.c: + * misc/serial3.c: + * misc/serial4.c: + Put testing protocol implementation in a separate file. Split the + tests in serial2 into separate files. + +1999-03-16 Nick Garnett + + * src/mn10300/mn10300_serial.c: Fixed some compiler warnings. + +1999-03-15 Gary Thomas + + * include/pkgconf/io_serial.h: Change default configurations. + No serial drivers enabled for PID port A or AEB. + + * src/sparclite/sleb_sdtr.c: + * src/powerpc/cogent_serial_with_ints.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: + * src/common/haldiag.c: + * src/common/tty.c: + * src/common/serial.c: Add 'CYGDBG_IO_INIT' for control of init + messages. + + * src/powerpc/cogent_serial_with_ints.c: + * src/sparclite/sleb_sdtr.c: + * src/arm/aeb_serial.c: + * src/arm/pid_serial_with_ints.c: Don't include + +1999-03-15 Jesper Skov + + * misc/serial2.c (serial_test): Fix use of strlen. Fix DONE part + of binary protocol. + +1999-03-12 Jesper Skov + + * misc/serial2.c: Play a bit with timing. Think I broke it :( + Added DONE to BINARY packet. + Proper call to DRAIN. + +1999-03-12 Nick Garnett + + * src/mips/tx3904_serial.c: Tidied away some debugging code. + +1999-03-12 Jesper Skov + + * misc/serial2.c: Removed bogus config changes. + +1999-03-12 Jesper Skov + + * misc/serial2.c (serial_test): Check for ser_filter on host (PING + packet). + +1999-03-11 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: Added note. + + * misc/serial2.c: + Added (almost) proper configuration handling. + Run tests on varying configurations. + +1999-03-11 Nick Garnett + + * src/mips/tx3904_serial.c: + Many changes to get working. + + * misc/console.c (console_test): Fixed compiler warning. + + * misc/serial2.c: + Added device name for TX39 testing. + Fixed some bugs in Tcyg_io_write() macro. + +1999-03-10 Jesper Skov + + * misc/serial2.c: Added target specific test device name. + +1999-03-10 John Dallaway + + * include/pkgconf/io_serial.h: Correct CDL description spelling. + +1999-03-10 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: + * misc/console.c: + Fixed compiler warnings. + +1999-03-10 Gary Thomas + + * include/pkgconf/io_serial.h: Improve CDL descriptions. + +1999-03-10 Jesper Skov + + * misc/serial2.c (serial_test): Do some more tests with changed + baud rates. + +1999-03-09 Jesper Skov + + * misc/serial2.c (serial_test): Added workaround for spurious byte + problem. Added a few more tests to run. + + * src/powerpc/cogent_serial_with_ints.c + (cogent_serial_config_port): Remove interrupt enabling. + +1999-03-09 Nick Garnett + + * src/PKGconf.mak: + * src/mips/tx3904_serial.c: + Added initial version of TX39 device driver. Currently untested + but eliminates PR19445. + +1999-03-09 Jesper Skov + + * misc/serial2.c: DRAIN function works now. + +1999-03-09 Jesper Skov + + * include/pkgconf/io_serial.h: Only enable one serial driver per + default. + +1999-03-08 Jesper Skov + + * misc/serial2.c (serial_test): Be a bit more aggressive. + + * src/powerpc/cogent_serial_with_ints.c: Check that configuration + is sensible. + +1999-03-08 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: + Added support for both ports. + + * include/pkgconf/io_serial.h: Added simple defines for cogent + serial ports. No CDL yet. + +1999-03-08 Jesper Skov + + * misc/serial.c: Removed PID references. Fixed compiler warnings. + +1999-03-08 Jesper Skov + + * src/powerpc/cogent_serial_with_ints.c: Cleaned up a + bit. Actually works now. + +1999-03-08 Gary Thomas + + * src/common/serial.c: Change in cyg_drv_cond_wait() behaviour + means DSR lock should be left alone. + +1999-03-08 Jesper Skov + PR 19400 + * src/powerpc/cogent_serial_with_ints.c (cogent_serial_init): Set + valid interrupt priority. + +1999-03-05 Nick Garnett + + * src/mn10300/mn10300_serial.c (mn10300_serial_init): + Added extra test to avoid initializing serial 2 when CYGMON is + present. + Include hal_intr.h explicitly for use in non-kernel + configurations. + + * src/common/serial.c: + Added extra test before calls to cyg_drv_cond_wait() to avoid race + condition. This is not, however, a complete solution to this + problem. A better solution will be forthcoming. + + * include/serial.h: + Changed include files used to permit non-kernel configurations to + be built. + +1999-03-05 Jesper Skov + + * src/common/haldiag.c: Removed diag_printf declaration. + +1999-03-05 Jonathan Larmour + + * src/mn10300/mn10300_serial.c: + Change CYG_VECTOR_* to CYGNUM_HAL_INTERRUPT_* to get it to compile! + +1999-03-05 Gary Thomas + + * src/powerpc/cogent_serial_with_ints.c (cogent_serial_config_port): + Fix renaming of interrupt vectors. + +1999-03-05 Gary Thomas + + * src/arm/pid_serial_with_ints.c: Fix interrupt vectors. + +1999-03-03 Gary Thomas + + * serial/current/src/arm/pid_serial_with_ints.c: + New [somewhat] configurable drivers for PID. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/io/serial/current/include/pkgconf/io_serial.h b/packages/io/serial/current/include/pkgconf/io_serial.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/include/pkgconf/io_serial.h @@ -0,0 +1,875 @@ +#ifndef CYGONCE_PKGCONF_IO_SERIAL_H +#define CYGONCE_PKGCONF_IO_SERIAL_H +// ==================================================================== +// +// pkgconf/io_serial.h +// +// Device configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: To allow the user to edit device configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +#include + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_IO_SERIAL { + display "Serial device drivers" + type bool + requires CYGPKG_IO + parent CYGPKG_IO + description " + This option enables drivers for basic I/O services on + serial devices." + doc ref/ecos-ref/ecos-device-drivers.html + } + }}CFG_DATA */ + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_TTY { + display "TTY-mode serial device drivers" + type bool + requires CYGPKG_IO_SERIAL + description " + This option enables the terminal-like device driver + used for serial devices that interact with humans, + such as a system console." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TTY_CONSOLE { + display "Console device name" + type string + requires CYGPKG_IO_SERIAL_TTY + description " + This option selects the TTY device to use for the console." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +#define CYGPKG_IO_SERIAL_TTY +#define CYGDAT_IO_SERIAL_TTY_CONSOLE "/dev/ttydiag" + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_HALDIAG { + display "HAL/diag serial device driver" + type bool + requires CYGPKG_IO_SERIAL_TTY + parent CYGPKG_IO_SERIAL_TTY + description " + This option enables the use of the HAL diagnostic channel + via the standard I/O drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +#define CYGPKG_IO_SERIAL_HALDIAG + + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_TTY_TTYDIAG { + display "TTY mode HAL/diag channel" + type bool + requires CYGPKG_IO_SERIAL_TTY + parent CYGPKG_IO_SERIAL_TTY + description " + This option causes '/dev/ttydiag' to be included in the standard drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TTY_TTY0 { + display "TTY mode channel #0" + type bool + requires CYGPKG_IO_SERIAL_TTY + parent CYGPKG_IO_SERIAL_TTY + description " + This option causes '/dev/tty0' to be included in the standard drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TTY_TTY0_DEV { + display "TTY mode channel #0 device" + type string + requires CYGPKG_IO_SERIAL_TTY_TTY0 + description " + This option selects the physical device to use for '/dev/tty0'." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TTY_TTY1 { + display "TTY mode channel #1" + type bool + requires CYGPKG_IO_SERIAL_TTY + parent CYGPKG_IO_SERIAL_TTY + description " + This option causes '/dev/tty1' to be included in the standard drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TTY_TTY1_DEV { + display "TTY mode channel #1 device" + type string + requires CYGPKG_IO_SERIAL_TTY_TTY1 + description " + This option selects the physical device to use for '/dev/tty1'." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TTY_TTY2 { + display "TTY mode channel #2" + type bool + requires CYGPKG_IO_SERIAL_TTY + parent CYGPKG_IO_SERIAL_TTY + description " + This option causes '/dev/tty2' to be included in the standard drivers." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TTY_TTY2_DEV { + display "TTY mode channel #2 device" + type string + requires CYGPKG_IO_SERIAL_TTY_TTY2 + description " + This option selects the physical device to use for '/dev/tty2'." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +#define CYGPKG_IO_SERIAL_TTY_TTYDIAG +#undef CYGPKG_IO_SERIAL_TTY_TTY0 +#define CYGDAT_IO_SERIAL_TTY_TTY0_DEV "/dev/ser0" +#undef CYGPKG_IO_SERIAL_TTY_TTY1 +#define CYGDAT_IO_SERIAL_TTY_TTY1_DEV "/dev/ser1" +#undef CYGPKG_IO_SERIAL_TTY_TTY2 +#define CYGDAT_IO_SERIAL_TTY_TTY2_DEV "/dev/ser2" + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_ARM_PID { + display "ARM PID serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_ARM_PID + description " + This option enables the serial device drivers for the ARM PID." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 { + display "ARM PID serial port 0 driver" + type bool + parent CYGPKG_IO_SERIAL_ARM_PID + description " + This option includes the serial device driver for the ARM PID port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_PID_SERIAL0_NAME { + display "Device name for ARM PID serial port 0 driver" + type string + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 + description " + This option specifies the name of the serial device for the ARM PID port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BAUD { + display "Baud rate for the ARM PID serial port 0 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 + description " + This option specifies the default baud rate (speed) for the ARM PID port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BUFSIZE { + display "Buffer size for the ARM PID serial port 0 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 + description " + This option specifies the size of the internal buffers used for the ARM PID port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 { + display "ARM PID serial port 1 driver" + type bool + parent CYGPKG_IO_SERIAL_ARM_PID + description " + This option includes the serial device driver for the ARM PID port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_PID_SERIAL1_NAME { + display "Device name for ARM PID serial port 1 driver" + type string + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 + description " + This option specifies the name of the serial device for the ARM PID port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BAUD { + display "Baud rate for the ARM PID serial port 1 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 + description " + This option specifies the default baud rate (speed) for the ARM PID port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BUFSIZE { + display "Buffer size for the ARM PID serial port 1 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 + description " + This option specifies the size of the internal buffers used for the ARM PID port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ + +#undef CYGPKG_IO_SERIAL_ARM_PID +#undef CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 +#define CYGDAT_IO_SERIAL_ARM_PID_SERIAL0_NAME "/dev/ser0" +#define CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BUFSIZE 128 +#define CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 +#define CYGDAT_IO_SERIAL_ARM_PID_SERIAL1_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BUFSIZE 128 + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_ARM_AEB { + display "ARM AEB-1 serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_ARM_AEB + description " + This option enables the serial device drivers for the ARM AEB-1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 { + display "ARM AEB-1 serial port 0 driver" + type bool + parent CYGPKG_IO_SERIAL_ARM_AEB + description " + This option includes the serial device driver for the ARM AEB-1 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_AEB_SERIAL0_NAME { + display "Device name for the ARM AEB-1 serial port 0 driver" + type string + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 + description " + This option sets the name of the serial device for the ARM AEB-1 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BAUD { + display "Baud rate for the ARM AEB-1 serial port 0 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 + description " + This option specifies the default baud rate (speed) for the ARM AEB-1 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BUFSIZE { + display "Buffer size for the ARM AEB-1 serial port 0 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 + description " + This option specifies the size of the internal buffers used for the ARM AEB-1 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 { + display "ARM AEB-1 serial port 1 driver" + type bool + parent CYGPKG_IO_SERIAL_ARM_AEB + description " + This option includes the serial device driver for the ARM AEB-1 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_AEB_SERIAL1_NAME { + display "Device name for the ARM AEB-1 serial port 1 driver" + type string + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 + description " + This option specifies the name of serial device for the ARM AEB-1 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BAUD { + display "Baud rate for the ARM AEB-1 serial port 1 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 + description " + This option specifies the default baud rate (speed) for the ARM AEB-1 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BUFSIZE { + display "Buffer size for the ARM AEB-1 serial port 1 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 + description " + This option specifies the size of the internal buffers used for the ARM AEB-1 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_ARM_AEB +#undef CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 +#define CYGDAT_IO_SERIAL_ARM_AEB_SERIAL0_NAME "/dev/ser0" +#define CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 +#define CYGDAT_IO_SERIAL_ARM_AEB_SERIAL1_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BUFSIZE 128 + + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_POWERPC_COGENT { + display "Cogent PowerPC serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_POWERPC_COGENT + description " + This option enables the serial device drivers for the Cogent PowerPC." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A { + display "Cogent PowerPC serial port A driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_POWERPC_COGENT + description " + This option includes the serial device driver for the Cogent PowerPC port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_A_NAME { + display "Device name for Cogent PowerPC serial port A" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A + description " + This option specifies the device name for the Cogent PowerPC port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD { + display "Baud rate for the Cogent PowerPC serial port A driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A + description " + This option specifies the default baud rate (speed) for the Cogent PowerPC port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE { + display "Buffer size for the Cogent PowerPC serial port A driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A + description " + This option specifies the size of the internal buffers used for the Cogent PowerPC port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B { + display "Cogent PowerPC serial port B driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_POWERPC_COGENT + description " + This option includes the serial device driver for the Cogent PowerPC port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_B_NAME { + display "Device name for Cogent PowerPC serial port B" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B + description " + This option specifies the device name for the Cogent PowerPC port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD { + display "Baud rate for the Cogent PowerPC serial port B driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B + description " + This option specifies the default baud rate (speed) for the Cogent PowerPC port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE { + display "Buffer size for the Cogent PowerPC serial port B driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B + description " + This option specifies the size of the internal buffers used for the Cogent PowerPC port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_POWERPC_COGENT +// Only enable both ports if interrupt chaining is enabled. +#undef CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A +#define CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_A_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD 38400 +#define CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE 128 +#define CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B +#define CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_B_NAME "/dev/ser2" +#define CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD 38400 +#define CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE 128 + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_SPARCLITE_SLEB { + display "SPARClite SLEB serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_SPARCLITE_SLEB + description " + This option enables the serial device drivers for the SPARClite SLEB." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 { + display "SPARClite SLEB serial CON1 port driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB + description " + This option includes the serial device driver for the SPARClite SLEB CON1 port." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON1_NAME { + display "Device name for SPARClite SLEB serial CON1 port" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 + description " + This option specifies the device name for the SPARClite SLEB CON1 port." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD { + display "Baud rate for the SPARClite SLEB serial CON1 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 + description " + This option specifies the default baud rate (speed) for the SPARClite SLEB CON1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE { + display "Buffer size for the SPARClite SLEB serial CON1 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 + description " + This option specifies the size of the internal buffers used for the SPARClite SLEB CON1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 { + display "SPARClite SLEB serial CON2 port driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB + description " + This option includes the serial device driver for the SPARClite SLEB CON2 port." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON2_NAME { + display "Device name for SPARClite SLEB serial CON2 port" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 + description " + This option specifies the device name for the SPARClite SLEB CON2 port." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD { + display "Baud rate for the SPARClite SLEB serial CON2 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 + description " + This option specifies the default baud rate (speed) for the SPARClite SLEB CON2." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE { + display "Buffer size for the SPARClite SLEB serial CON2 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 + description " + This option specifies the size of the internal buffers used for the SPARClite SLEB CON2." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_SPARCLITE_SLEB +#undef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 +#define CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON1_NAME "/dev/ser0" +#define CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD 19200 +#define CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 +#define CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON2_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD 19200 +#define CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE 128 + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_TX39_JMR3904 { + display "TX39 JMR3904 serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_TX39_JMR3904 + description " + This option enables the serial device drivers for the TX39 JMR3904." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE { + display "TX39 JMR3904 polled mode serial drivers" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_TX39_JMR3904 + description " + If asserted, this option specifies that the serial device drivers for + the TX39 JMR3904 should be polled-mode instead of interrupt driven." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 { + display "TX39 JMR3904 serial port 0 driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_TX39_JMR3904 + description " + This option includes the serial device driver for port 0 on the TX39 JMR3904." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL0_NAME { + display "Device name for TX39 JMR3904 serial port 0" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + description " + This option specifies the device name port 0 on the TX39 JMR3904." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BAUD { + display "Baud rate for the TX39 JMR3904 serial port 0 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + description " + This option specifies the default baud rate (speed) for the TX39 JMR3904 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE { + display "Buffer size for the TX39 JMR3904 serial port 0 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + description " + This option specifies the size of the internal buffers used for the TX39 JMR3904 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 { + display "TX39 JMR3904 serial port 1 driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_TX39_JMR3904 + description " + This option includes the serial device driver for port 1 on the TX39 JMR3904." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL1_NAME { + display "Device name for TX39 JMR3904 serial port 1" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + description " + This option specifies the device name port 1 on the TX39 JMR3904." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BAUD { + display "Baud rate for the TX39 JMR3904 serial port 1 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + description " + This option specifies the default baud rate (speed) for the TX39 JMR3904 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE { + display "Buffer size for the TX39 JMR3904 serial port 1 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + description " + This option specifies the size of the internal buffers used for the TX39 JMR3904 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_TX39_JMR3904 +#undef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE +#undef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 +#define CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL0_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BAUD 38400 +#define CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 +#define CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL1_NAME "/dev/ser2" +#define CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BAUD 38400 +#define CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE 128 + +// Note: this is not currently tied to a specific board since the ports are "on chip" + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_MN10300 { + display "MN10300 serial device drivers" + type bool + requires CYGPKG_IO_SERIAL +# parent CYGPKG_IO_SERIAL + parent CYGPKG_HAL_MN10300 + description " + This option enables the serial device drivers for the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_MN10300_POLLED_MODE { + display "MN10300 polled mode serial drivers" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300 + description " + If asserted, this option specifies that the serial device drivers for + the MN10300 should be polled-mode instead of interrupt driven." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_MN10300_SERIAL0 { + display "MN10300 serial port 0 driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300 + description " + This option includes the serial device driver for port 0 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_MN10300_SERIAL0_NAME { + display "Device name for MN10300 serial port 0" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300_SERIAL0 + description " + This option specifies the device name port 0 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL0_BAUD { + display "Baud rate for the MN10300 serial port 0 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL0 + description " + This option specifies the default baud rate (speed) for the MN10300 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE { + display "Buffer size for the MN10300 serial port 0 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL0 + description " + This option specifies the size of the internal buffers used for the MN10300 port 0." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_MN10300_SERIAL1 { + display "MN10300 serial port 1 driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300 + description " + This option includes the serial device driver for port 1 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_MN10300_SERIAL1_NAME { + display "Device name for MN10300 serial port 1" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300_SERIAL1 + description " + This option specifies the device name port 1 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL1_BAUD { + display "Baud rate for the MN10300 serial port 1 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL1 + description " + This option specifies the default baud rate (speed) for the MN10300 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE { + display "Buffer size for the MN10300 serial port 1 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL1 + description " + This option specifies the size of the internal buffers used for the MN10300 port 1." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_MN10300_SERIAL2 { + display "MN10300 serial port 2 driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300 + description " + This option includes the serial device driver for port 2 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_MN10300_SERIAL2_NAME { + display "Device name for MN10300 serial port 2" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_MN10300_SERIAL2 + description " + This option specifies the device name port 2 on the MN10300." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL2_BAUD { + display "Baud rate for the MN10300 serial port 2 driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL2 + description " + This option specifies the default baud rate (speed) for the MN10300 port 2." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE { + display "Buffer size for the MN10300 serial port 2 driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_MN10300_SERIAL2 + description " + This option specifies the size of the internal buffers used for the MN10300 port 2." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_MN10300 +#undef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE +#undef CYGPKG_IO_SERIAL_MN10300_SERIAL0 +#define CYGDAT_IO_SERIAL_MN10300_SERIAL0_NAME "/dev/ser0" +#define CYGNUM_IO_SERIAL_MN10300_SERIAL0_BAUD 38400 +#define CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_MN10300_SERIAL1 +#define CYGDAT_IO_SERIAL_MN10300_SERIAL1_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_MN10300_SERIAL1_BAUD 38400 +#define CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_MN10300_SERIAL2 +#define CYGDAT_IO_SERIAL_MN10300_SERIAL2_NAME "/dev/ser2" +#define CYGNUM_IO_SERIAL_MN10300_SERIAL2_BAUD 38400 +#define CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE 128 + +#endif /* CYGONCE_PKGCONF_IO_SERIAL_H */ +/* EOF io_serial.h */ diff --git a/packages/io/serial/current/include/serial.h b/packages/io/serial/current/include/serial.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/include/serial.h @@ -0,0 +1,154 @@ +#ifndef CYGONCE_SERIAL_H +#define CYGONCE_SERIAL_H +// ==================================================================== +// +// serial.h +// +// Device I/O +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Serial I/O interfaces + +#include +#include +#include +#include +#include + +typedef struct serial_channel serial_channel; +typedef struct serial_funs serial_funs; + +// Pointers into upper-level driver which interrupt handlers need +typedef struct { + // Initialize the channel + void (*serial_init)(serial_channel *chan); + // Cause an additional character to be output if one is available + void (*xmt_char)(serial_channel *chan); + // Consume an input character + void (*rcv_char)(serial_channel *chan, unsigned char c); +} serial_callbacks_t; + +#define SERIAL_CALLBACKS(_l,_init,_xmt_char,_rcv_char) \ +serial_callbacks_t _l = { \ + _init, \ + _xmt_char, \ + _rcv_char \ +}; + +extern serial_callbacks_t serial_callbacks; + +typedef struct { + unsigned char *data; + volatile int put; + volatile int get; + int len; + int low_water; // Min space in buffer before restart + cyg_drv_cond_t wait; + cyg_drv_mutex_t lock; + bool waiting; + bool abort; // Set by an outsider to kill processing + volatile cyg_int32 pending; // This many bytes waiting to be sent +} cbuf_t; + +#define CBUF_INIT(_data, _len) \ + {_data, 0, 0, _len} + +// Private data which describes this channel +struct serial_channel { + serial_funs *funs; + serial_callbacks_t *callbacks; + void *dev_priv; // Whatever is needed by actual device routines + cyg_serial_info_t config; // Current configuration + bool init; + cbuf_t out_cbuf; + cbuf_t in_cbuf; +}; + +// Initialization macro for serial channel +#define SERIAL_CHANNEL(_l, \ + _funs, \ + _dev_priv, \ + _baud, _stop, _parity, _word_length, _flags) \ +serial_channel _l = { \ + &_funs, \ + &serial_callbacks, \ + &(_dev_priv), \ + CYG_SERIAL_INFO_INIT(_baud, _stop, _parity, _word_length, _flags), \ +}; + +#define SERIAL_CHANNEL_USING_INTERRUPTS(_l, \ + _funs, \ + _dev_priv, \ + _baud, _stop, _parity, _word_length, _flags, \ + _out_buf, _out_buflen, \ + _in_buf, _in_buflen) \ +serial_channel _l = { \ + &_funs, \ + &serial_callbacks, \ + &(_dev_priv), \ + CYG_SERIAL_INFO_INIT(_baud, _stop, _parity, _word_length, _flags), \ + false, \ + CBUF_INIT(_out_buf, _out_buflen), \ + CBUF_INIT(_in_buf, _in_buflen) \ +}; + +// Low level interface functions +struct serial_funs { + // Send one character to the output device, return true if consumed + bool (*putc)(serial_channel *priv, unsigned char c); + // Fetch one character from the device + unsigned char (*getc)(serial_channel *priv); + // Change hardware configuration (baud rate, etc) + bool (*set_config)(serial_channel *priv, cyg_serial_info_t *config); + // Enable the transmit channel and turn on transmit interrupts + void (*start_xmit)(serial_channel *priv); + // Disable the transmit channel and turn transmit interrupts off + void (*stop_xmit)(serial_channel *priv); +}; + +#define SERIAL_FUNS(_l,_putc,_getc,_set_config,_start_xmit,_stop_xmit) \ +serial_funs _l = { \ + _putc, \ + _getc, \ + _set_config, \ + _start_xmit, \ + _stop_xmit \ +}; + +extern cyg_devio_table_t serial_devio; + +#endif // CYGONCE_SERIAL_H diff --git a/packages/io/serial/current/include/serialio.h b/packages/io/serial/current/include/serialio.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/include/serialio.h @@ -0,0 +1,135 @@ +#ifndef CYGONCE_SERIALIO_H +#define CYGONCE_SERIALIO_H +// ==================================================================== +// +// serialio.h +// +// Device I/O +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Special support for serial I/O devices +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// This file contains the user-level visible I/O interfaces + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +// Supported baud rates +typedef enum { + CYGNUM_SERIAL_BAUD_50 = 1, + CYGNUM_SERIAL_BAUD_75, + CYGNUM_SERIAL_BAUD_110, + CYGNUM_SERIAL_BAUD_134_5, + CYGNUM_SERIAL_BAUD_150, + CYGNUM_SERIAL_BAUD_200, + CYGNUM_SERIAL_BAUD_300, + CYGNUM_SERIAL_BAUD_600, + CYGNUM_SERIAL_BAUD_1200, + CYGNUM_SERIAL_BAUD_1800, + CYGNUM_SERIAL_BAUD_2400, + CYGNUM_SERIAL_BAUD_3600, + CYGNUM_SERIAL_BAUD_4800, + CYGNUM_SERIAL_BAUD_7200, + CYGNUM_SERIAL_BAUD_9600, + CYGNUM_SERIAL_BAUD_14400, + CYGNUM_SERIAL_BAUD_19200, + CYGNUM_SERIAL_BAUD_38400, + CYGNUM_SERIAL_BAUD_57600, + CYGNUM_SERIAL_BAUD_115200, + CYGNUM_SERIAL_BAUD_234000 +} cyg_serial_baud_rate_t; +#define CYGNUM_SERIAL_BAUD_MIN CYGNUM_SERIAL_BAUD_50 +#define CYGNUM_SERIAL_BAUD_MAX CYGNUM_SERIAL_BAUD_234000 + +// Note: two levels of macro are required to get proper expansion. +#define _CYG_SERIAL_BAUD_RATE(n) CYGNUM_SERIAL_BAUD_##n +#define CYG_SERIAL_BAUD_RATE(n) _CYG_SERIAL_BAUD_RATE(n) + +// Stop bit selections +typedef enum { + CYGNUM_SERIAL_STOP_1 = 1, + CYGNUM_SERIAL_STOP_1_5, + CYGNUM_SERIAL_STOP_2 +} cyg_serial_stop_bits_t; + +// Parity modes +typedef enum { + CYGNUM_SERIAL_PARITY_NONE = 0, + CYGNUM_SERIAL_PARITY_EVEN, + CYGNUM_SERIAL_PARITY_ODD, + CYGNUM_SERIAL_PARITY_MARK, + CYGNUM_SERIAL_PARITY_SPACE +} cyg_serial_parity_t; + +// Word length +typedef enum { + CYGNUM_SERIAL_WORD_LENGTH_5 = 5, + CYGNUM_SERIAL_WORD_LENGTH_6, + CYGNUM_SERIAL_WORD_LENGTH_7, + CYGNUM_SERIAL_WORD_LENGTH_8 +} cyg_serial_word_length_t; + +typedef struct { + cyg_serial_baud_rate_t baud; + cyg_serial_stop_bits_t stop; + cyg_serial_parity_t parity; + cyg_serial_word_length_t word_length; + cyg_uint32 flags; +} cyg_serial_info_t; + +#define CYG_SERIAL_INFO_INIT(_baud,_stop,_parity,_word_length,_flags) \ + { _baud, _stop, _parity, _word_length, _flags} + +// Control flags +#define CYG_SERIAL_FLAGS_RTSCTS 0x0001 + +// Default configuration +#define CYG_SERIAL_BAUD_DEFAULT CYGNUM_SERIAL_BAUD_38400 +#define CYG_SERIAL_STOP_DEFAULT CYGNUM_SERIAL_STOP_1 +#define CYG_SERIAL_PARITY_DEFAULT CYGNUM_SERIAL_PARITY_NONE +#define CYG_SERIAL_WORD_LENGTH_DEFAULT CYGNUM_SERIAL_WORD_LENGTH_8 +#define CYG_SERIAL_FLAGS_DEFAULT 0 + +#ifdef __cplusplus +} +#endif + +#endif /* CYGONCE_SERIALIO_H */ +/* EOF serialio.h */ diff --git a/packages/io/serial/current/include/ttyio.h b/packages/io/serial/current/include/ttyio.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/include/ttyio.h @@ -0,0 +1,78 @@ +#ifndef CYGONCE_TTYIO_H +#define CYGONCE_TTYIO_H +// ==================================================================== +// +// ttyio.h +// +// Device I/O +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Special support for tty I/O devices +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// This file contains the user-level visible I/O interfaces + +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct { + cyg_uint32 tty_out_flags; + cyg_uint32 tty_in_flags; +} cyg_tty_info_t; + +// TTY flags - used to control behaviour when sending data to tty +#define CYG_TTY_OUT_FLAGS_CRLF 0x0001 // Map '\n' => '\n\r' on output + +#define CYG_TTY_OUT_FLAGS_DEFAULT (CYG_TTY_OUT_FLAGS_CRLF) + +// TTY flags - used to control behaviour when receiving data from tty +#define CYG_TTY_IN_FLAGS_CR 0x0001 // Map '\r' => '\n' on input +#define CYG_TTY_IN_FLAGS_CRLF 0x0002 // Map '\n\r' => '\n' on input +#define CYG_TTY_IN_FLAGS_ECHO 0x0004 // Echo characters as processed +#define CYG_TTY_IN_FLAGS_BINARY 0x0008 // No input processing + +#define CYG_TTY_IN_FLAGS_DEFAULT (CYG_TTY_IN_FLAGS_CR|CYG_TTY_IN_FLAGS_ECHO) + +#ifdef __cplusplus +} +#endif + +#endif /* CYGONCE_TTYIO_H */ +/* EOF ttyio.h */ diff --git a/packages/io/serial/current/misc/PKGconf.mak b/packages/io/serial/current/misc/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/misc/PKGconf.mak @@ -0,0 +1,39 @@ +#============================================================================== +# +# makefile +# +# devs/common/misc +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := io_serial +include ../../../../pkgconf/pkgconf.mak +include ../../../../pkgconf/system.mak + +PROGS := console +PROGS += serial +WHEREAMI := misc + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv diff --git a/packages/io/serial/current/misc/console.c b/packages/io/serial/current/misc/console.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/misc/console.c @@ -0,0 +1,227 @@ +//========================================================================== +// +// console.c +// +// Initial device I/O tests +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-05 +// Description: Minimal testing of "console" I/O +//####DESCRIPTIONEND#### + +#include +#include +#include +#include +#include +#include +#include +#ifdef CYGFUN_KERNEL_API_C +#include +#include +#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +unsigned char stack[STACK_SIZE]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif + +static void +dump_buf_with_offset(unsigned char *p, + int s, + unsigned char *base) +{ + int i, c; + if ((unsigned int)s > (unsigned int)p) { + s = (unsigned int)s - (unsigned int)p; + } + while (s > 0) { + if (base) { + diag_printf("%08X: ", (int)p - (int)base); + } else { + diag_printf("%08X: ", p); + } + for (i = 0; i < 16; i++) { + if (i < s) { + diag_printf("%02X", p[i] & 0xFF); + } else { + diag_printf(" "); + } + if ((i % 2) == 1) diag_printf(" "); + if ((i % 8) == 7) diag_printf(" "); + } + diag_printf(" |"); + for (i = 0; i < 16; i++) { + if (i < s) { + c = p[i] & 0xFF; + if ((c < 0x20) || (c >= 0x7F)) c = '.'; + } else { + c = ' '; + } + diag_printf("%c", c); + } + diag_printf("|\n"); + s -= 16; + p += 16; + } +} + +static void +dump_buf(unsigned char *p, int s) +{ + dump_buf_with_offset(p, s, 0); +} + +void +hang(void) +{ + while (true) ; +} + +static int +strlen(char *c) +{ + int l = 0; + while (*c++) l++; + return l; +} + +void +console_test( CYG_ADDRWORD x ) +{ + Cyg_ErrNo res; + cyg_io_handle_t handle; + char msg[] = "This is a test\n"; + int msglen = sizeof(msg)-1; + char in_msg[80]; + int in_msglen = sizeof(in_msg)-1; + cyg_serial_info_t serial_info; + cyg_tty_info_t tty_info; + char short_msg[] = "This is a short message\n"; + char long_msg[] = "This is a longer message 0123456789abcdefghijklmnopqrstuvwxyz\n"; + char filler[] = " "; + char prompt[] = "\nPlease enter some data: "; + int i, len; + + res = cyg_io_lookup(CYGDAT_IO_SERIAL_TTY_CONSOLE, &handle); + if (res != ENOERR) { + diag_printf("Can't lookup - DEVIO error: %d\n", res); + return; + } + len = sizeof(serial_info); + res = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't get serial config - DEVIO error: %d\n", res); +hang(); + return; + } + len = sizeof(tty_info); + res = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_TTY_INFO, &tty_info, &len); + if (res != ENOERR) { + diag_printf("Can't get tty config - DEVIO error: %d\n", res); +hang(); + return; + } + diag_printf("Config - baud: %d, stop: %d, parity: %d, out flags: %x, in flags: %x\n", + serial_info.baud, serial_info.stop, serial_info.parity, + tty_info.tty_out_flags, tty_info.tty_in_flags); + len = sizeof(serial_info); + res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't set serial config - DEVIO error: %d\n", res); +hang(); + return; + } + len = sizeof(tty_info); + res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_TTY_INFO, &tty_info, &len); + if (res != ENOERR) { + diag_printf("Can't set tty config - DEVIO error: %d\n", res); +hang(); + return; + } + msglen = strlen(msg); + res = cyg_io_write(handle, msg, &msglen); + if (res != ENOERR) { + diag_printf("Can't write data - DEVIO error: %d\n", res); +hang(); + return; + } + for (i = 0; i < 10; i++) { + len = strlen(short_msg); + res = cyg_io_write(handle, short_msg, &len); + if (res != ENOERR) { + diag_printf("Can't write [short] data - DEVIO error: %d\n", res); + hang(); + return; + } + } + for (i = 0; i < 100; i++) { + len = (i % 10) + 1; + cyg_io_write(handle, filler, &len); + len = strlen(long_msg); + res = cyg_io_write(handle, long_msg, &len); + if (res != ENOERR) { + diag_printf("Can't write [long] data - DEVIO error: %d\n", res); + hang(); + return; + } + } + len = strlen(prompt); + cyg_io_write(handle, prompt, &len); + res = cyg_io_read(handle, in_msg, &in_msglen); + if (res != ENOERR) { + diag_printf("Can't read data - DEVIO error: %d\n", res); +hang(); + return; + } + diag_printf("Read %d bytes\n", in_msglen); + dump_buf(in_msg, in_msglen); + CYG_TEST_PASS_FINISH("Console I/O test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)console_test, // entry + 0, // + "console_thread", // Name + &stack[0], // Stack + STACK_SIZE, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + console_test(); +#endif +} +// EOF console.c diff --git a/packages/io/serial/current/misc/serial.c b/packages/io/serial/current/misc/serial.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/misc/serial.c @@ -0,0 +1,246 @@ +//========================================================================== +// +// serial.c +// +// Initial device I/O tests +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-05 +// Description: Minimal testing of "serial" I/O +//####DESCRIPTIONEND#### + +#include +#include +#include +#include +#include +#include +#ifdef CYGFUN_KERNEL_API_C +#include +#include +#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +unsigned char stack[STACK_SIZE]; +cyg_thread thread_data; +cyg_handle_t thread_handle; + +// This routine will be called if the read "times out" +static void +do_abort(void *handle) +{ + cyg_io_handle_t io_handle = (cyg_io_handle_t)handle; + cyg_int32 len = 1; // Need something here + cyg_io_get_config(io_handle, CYG_IO_GET_CONFIG_SERIAL_ABORT, 0, &len); +} + +#include "timeout.inl" +#endif + +static void +dump_buf_with_offset(unsigned char *p, + int s, + unsigned char *base) +{ + int i, c; + if ((unsigned int)s > (unsigned int)p) { + s = (unsigned int)s - (unsigned int)p; + } + while (s > 0) { + if (base) { + diag_printf("%08X: ", (int)p - (int)base); + } else { + diag_printf("%08X: ", p); + } + for (i = 0; i < 16; i++) { + if (i < s) { + diag_printf("%02X", p[i] & 0xFF); + } else { + diag_printf(" "); + } + if ((i % 2) == 1) diag_printf(" "); + if ((i % 8) == 7) diag_printf(" "); + } + diag_printf(" |"); + for (i = 0; i < 16; i++) { + if (i < s) { + c = p[i] & 0xFF; + if ((c < 0x20) || (c >= 0x7F)) c = '.'; + } else { + c = ' '; + } + diag_printf("%c", c); + } + diag_printf("|\n"); + s -= 16; + p += 16; + } +} + +static void +dump_buf(unsigned char *p, int s) +{ + dump_buf_with_offset(p, s, 0); +} + +void +hang(void) +{ + while (true) ; +} + +static int +strlen(char *c) +{ + int l = 0; + while (*c++) l++; + return l; +} + +void +serial_test( void ) +{ + Cyg_ErrNo res; + cyg_io_handle_t handle; + char msg[] = "This is a test\n"; + int msglen = sizeof(msg)-1; + char in_msg[80]; + int in_msglen = sizeof(in_msg)-1; + cyg_serial_info_t serial_info; + cyg_tty_info_t tty_info; + char short_msg[] = "This is a short message\n"; + char long_msg[] = "This is a longer message 0123456789abcdefghijklmnopqrstuvwxyz\n"; + char filler[] = " "; + char prompt[] = "\nPlease enter some data: "; + int i, len; +#ifdef CYGFUN_KERNEL_API_C + cyg_uint32 stamp; +#endif + + res = cyg_io_lookup("/dev/tty1", &handle); + if (res != ENOERR) { + diag_printf("Can't lookup - DEVIO error: %d\n", res); + return; + } + len = sizeof(serial_info); + res = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't get serial config - DEVIO error: %d\n", res); +hang(); + return; + } + len = sizeof(tty_info); + res = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_TTY_INFO, &tty_info, &len); + if (res != ENOERR) { + diag_printf("Can't get tty config - DEVIO error: %d\n", res); +hang(); + return; + } + diag_printf("Config - baud: %d, stop: %d, parity: %d, out flags: %x, in flags: %x\n", + serial_info.baud, serial_info.stop, serial_info.parity, + tty_info.tty_out_flags, tty_info.tty_in_flags); + len = sizeof(serial_info); + res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't set serial config - DEVIO error: %d\n", res); +hang(); + return; + } + len = sizeof(tty_info); + res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_TTY_INFO, &tty_info, &len); + if (res != ENOERR) { + diag_printf("Can't set tty config - DEVIO error: %d\n", res); +hang(); + return; + } + msglen = strlen(msg); + res = cyg_io_write(handle, msg, &msglen); + if (res != ENOERR) { + diag_printf("Can't write data - DEVIO error: %d\n", res); +hang(); + return; + } + for (i = 0; i < 10; i++) { + len = strlen(short_msg); + res = cyg_io_write(handle, short_msg, &len); + if (res != ENOERR) { + diag_printf("Can't write [short] data - DEVIO error: %d\n", res); + hang(); + return; + } + } + for (i = 0; i < 100; i++) { + len = (i % 10) + 1; + cyg_io_write(handle, filler, &len); + len = strlen(long_msg); + res = cyg_io_write(handle, long_msg, &len); + if (res != ENOERR) { + diag_printf("Can't write [long] data - DEVIO error: %d\n", res); + hang(); + return; + } + } + len = strlen(prompt); + cyg_io_write(handle, prompt, &len); +#ifdef CYGFUN_KERNEL_API_C + stamp = timeout(1000, do_abort, handle); +#endif + res = cyg_io_read(handle, in_msg, &in_msglen); + if (res != ENOERR) { + diag_printf("Can't read data - DEVIO error: %d\n", res); +hang(); + return; + } +#ifdef CYGFUN_KERNEL_API_C + untimeout(stamp); +#endif + diag_printf("Read %d bytes\n", in_msglen); + dump_buf(in_msg, in_msglen); + CYG_TEST_PASS_FINISH("Serial I/O test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + (cyg_addrword_t) 0, // entry data + "serial_thread", // Name + &stack[0], // Stack + STACK_SIZE, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} +// EOF serial.c diff --git a/packages/io/serial/current/misc/timeout.inl b/packages/io/serial/current/misc/timeout.inl new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/misc/timeout.inl @@ -0,0 +1,132 @@ +#ifndef CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL +#define CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL +//========================================================================== +// +// timeout.inl +// +// Simple timeout support for serial I/O testing. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-05 +// Description: Simple timeout functions +//####DESCRIPTIONEND#### + +// Timeout support + +typedef void (timeout_fun)(void *); +#ifndef NTIMEOUTS +#define NTIMEOUTS 8 +#endif +typedef struct { + cyg_int32 delta; // Number of "ticks" in the future for this timeout + timeout_fun *fun; // Function to execute when it expires + void *arg; // Argument to pass when it does +} timeout_entry; +static timeout_entry timeouts[NTIMEOUTS]; +static cyg_handle_t timeout_alarm_handle; +static cyg_alarm timeout_alarm; +static cyg_int32 last_delta; + +static void +do_timeout(cyg_handle_t alarm, cyg_addrword_t data) +{ + int i; + cyg_int32 min_delta; + timeout_entry *e = timeouts; + min_delta = 0x7FFFFFFF; // Maxint + for (i = 0; i < NTIMEOUTS; i++, e++) { + if (e->delta) { + e->delta -= last_delta; + if (e->delta == 0) { + // Time for this item to 'fire' + (e->fun)(e->arg); + } else { + if (e->delta < min_delta) min_delta = e->delta; + } + } + } + if (min_delta != 0x7FFFFFFF) { + // Still something to do, schedule it + cyg_alarm_initialize(timeout_alarm_handle, min_delta, 0); + last_delta = min_delta; + } +} + +static cyg_uint32 +timeout(cyg_int32 delta, timeout_fun *fun, void *arg) +{ + int i; + cyg_int32 min_delta; + static bool init = false; + timeout_entry *e = timeouts; + cyg_uint32 stamp; + if (!init) { + cyg_handle_t h; + cyg_clock_to_counter(cyg_real_time_clock(), &h); + cyg_alarm_create(h, do_timeout, 0, &timeout_alarm_handle, &timeout_alarm); + init = true; + } + stamp = 0; // Assume no slots available + for (i = 0; i < NTIMEOUTS; i++, e++) { + if ((e->delta == 0) && (e->fun == 0)) { + // Free entry + e->delta = delta; + e->fun = fun; + e->arg = arg; + stamp = (cyg_uint32)e; + break; + } + } + e = timeouts; + min_delta = 0x7FFFFFFF; + for (i = 0; i < NTIMEOUTS; i++, e++) { + if (e->delta && (e->delta < min_delta)) min_delta = e->delta; + } + if (min_delta != 0x7FFFFFFF) { + // Still something to do, schedule it + cyg_alarm_initialize(timeout_alarm_handle, min_delta, 0); + last_delta = min_delta; + } + return stamp; +} + +static void +untimeout(cyg_uint32 stamp) +{ + if (stamp != 0) { + timeout_entry *e = (timeout_entry *)stamp; + if (e->fun != 0) { + e->delta = 0; + e->fun = 0; + e->arg = 0; + } + } +} + +#endif // CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL diff --git a/packages/io/serial/current/src/PKGconf.mak b/packages/io/serial/current/src/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/PKGconf.mak @@ -0,0 +1,59 @@ +#=============================================================================== +# +# makefile +# +# io/serial/src +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := io_serial +include ../../../../pkgconf/pkgconf.mak +include ../../../../pkgconf/system.mak + +LIBRARY := libextras.a +COMPILE := common/serial.c common/tty.c common/haldiag.c +ifdef CYG_HAL_ARM_PID +COMPILE += arm/pid_serial_with_ints.c +endif +ifdef CYG_HAL_ARM_AEB +COMPILE += arm/aeb_serial.c +endif +ifdef CYG_HAL_MN10300_STDEVAL1 +COMPILE += mn10300/mn10300_serial.c +endif +ifdef CYG_HAL_TX39 +COMPILE += mips/tx3904_serial.c +endif +ifdef CYG_HAL_POWERPC_COGENT +COMPILE += powerpc/cogent_serial_with_ints.c +endif +ifdef CYG_HAL_SPARCLITE_SLEB +COMPILE += sparclite/sleb_sdtr.c +endif +OTHER_OBJS := +OTHER_CLEAN := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src + diff --git a/packages/io/serial/current/src/arm/aeb_serial.c b/packages/io/serial/current/src/arm/aeb_serial.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/aeb_serial.c @@ -0,0 +1,318 @@ +//========================================================================== +// +// io/serial/arm/aeb_serial.c +// +// ARM AEB-1 Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: AEB-1 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_ARM_AEB + +#include "aeb_serial.h" + +extern void diag_printf(const char *fmt, ...); + +typedef struct aeb_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; +} aeb_serial_info; + +static bool aeb_serial_init(struct cyg_devtab_entry *tab); +static bool aeb_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo aeb_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char aeb_serial_getc(serial_channel *chan); +static bool aeb_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void aeb_serial_start_xmit(serial_channel *chan); +static void aeb_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 aeb_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void aeb_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(aeb_serial_funs, + aeb_serial_putc, + aeb_serial_getc, + aeb_serial_set_config, + aeb_serial_start_xmit, + aeb_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 +static aeb_serial_info aeb_serial_info0 = {0xFFFF0000, + CYGNUM_HAL_INTERRUPT_UART0}; +#if CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BUFSIZE > 0 +static unsigned char aeb_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BUFSIZE]; +static unsigned char aeb_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(aeb_serial_channel0, + aeb_serial_funs, + aeb_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &aeb_serial_out_buf0[0], sizeof(aeb_serial_out_buf0), + &aeb_serial_in_buf0[0], sizeof(aeb_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(aeb_serial_channel0, + aeb_serial_funs, + aeb_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AEB_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(aeb_serial_io0, + CYGDAT_IO_SERIAL_ARM_AEB_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + aeb_serial_init, + aeb_serial_lookup, // Serial driver may need initializing + &aeb_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_ARM_AEB_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 +static aeb_serial_info aeb_serial_info1 = {0xFFFF0400, + CYGNUM_HAL_INTERRUPT_UART1}; +#if CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BUFSIZE > 0 +static unsigned char aeb_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BUFSIZE]; +static unsigned char aeb_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(aeb_serial_channel1, + aeb_serial_funs, + aeb_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &aeb_serial_out_buf1[0], sizeof(aeb_serial_out_buf1), + &aeb_serial_in_buf1[0], sizeof(aeb_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(aeb_serial_channel1, + aeb_serial_funs, + aeb_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AEB_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(aeb_serial_io1, + CYGDAT_IO_SERIAL_ARM_AEB_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + aeb_serial_init, + aeb_serial_lookup, // Serial driver may need initializing + &aeb_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +aeb_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + unsigned short baud_divisor = select_baud[new_config->baud]; + unsigned char _lcr, _ier; + if (baud_divisor == 0) return false; + _ier = port->ier; + port->ier = 0; // Disable port interrupts while changing hardware + _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + port->lcr = _lcr; + port->lcr |= LCR_DL; + port->mdl = baud_divisor >> 8; + port->ldl = baud_divisor & 0xFF; + port->lcr &= ~LCR_DL; + if (init) { + port->fcr = 0x07; // Enable and clear FIFO + if (chan->out_cbuf.len != 0) { + port->ier = IER_RCV; + } else { + port->ier = 0; + } + port->mcr = MCR_INT|MCR_DTR|MCR_RTS; // Master interrupt enable + } else { + port->ier = _ier; + } + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +aeb_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("AEB SERIAL init - dev: %x.%d\n", aeb_chan->base, aeb_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(aeb_chan->int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + aeb_serial_ISR, + aeb_serial_DSR, + &aeb_chan->serial_interrupt_handle, + &aeb_chan->serial_interrupt); + cyg_drv_interrupt_attach(aeb_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(aeb_chan->int_num); + } + aeb_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +aeb_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +aeb_serial_putc(serial_channel *chan, unsigned char c) +{ + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + if (port->lsr & LSR_THE) { +// Transmit buffer is empty + port->thr = c; + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +aeb_serial_getc(serial_channel *chan) +{ + unsigned char c; + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + while ((port->lsr & LSR_RSR) == 0) ; // Wait for char + c = port->rhr; + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +aeb_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return aeb_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +aeb_serial_start_xmit(serial_channel *chan) +{ + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + port->ier |= IER_XMT; // Enable xmit interrupt +} + +// Disable the transmitter on the device +static void +aeb_serial_stop_xmit(serial_channel *chan) +{ + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + port->ier &= ~IER_XMT; // Disable xmit interrupt +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +aeb_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(aeb_chan->int_num); + cyg_drv_interrupt_acknowledge(aeb_chan->int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +aeb_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + aeb_serial_info *aeb_chan = (aeb_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)aeb_chan->base; + unsigned char isr; + isr = port->isr; + if ((isr & 0x0E) == ISR_Tx) { + (chan->callbacks->xmt_char)(chan); + } else { + // Assume receive interrupt + (chan->callbacks->rcv_char)(chan, port->rhr); + } + cyg_drv_interrupt_unmask(aeb_chan->int_num); +} +#endif diff --git a/packages/io/serial/current/src/arm/aeb_serial.h b/packages/io/serial/current/src/arm/aeb_serial.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/aeb_serial.h @@ -0,0 +1,151 @@ +#ifndef CYGONCE_ARM_AEB_SERIAL_H +#define CYGONCE_ARM_AEB_SERIAL_H + +// ==================================================================== +// +// aeb_serial.h +// +// Device I/O - Description of ARM AEB-1 serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on ARM AEB-1 + +struct serial_port { + unsigned char _byte[32]; +}; + +#define reg(n) _byte[n*4] + +// Receive control registers +#define rhr reg(0) // Receive holding register +#define isr reg(2) // Interrupt status register +#define lsr reg(5) // Line status register +#define msr reg(6) // Modem status register +#define scr reg(7) // Scratch register + +// Transmit control registers +#define thr reg(0) // Transmit holding register +#define ier reg(1) // Interrupt enable register +#define fcr reg(2) // FIFO control register +#define lcr reg(3) // Line control register +#define mcr reg(4) // Modem control register +#define ldl reg(0) // LSB of baud rate +#define mdl reg(1) // MSB of baud rate + +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_Tx 0x02 + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +// Baud rate values, based on raw 24MHz clock + +static unsigned short select_baud[] = { + 0, // Unused + 10000*3, // 50 + 6667*3, // 75 + 4545*3, // 110 + 3717*3, // 134.5 + 3333*3, // 150 + 0, // 200 + 1667*3, // 300 + 833*3, // 600 + 417*3, // 1200 + 277*3, // 1800 + 208*3, // 2400 + 139*3, // 3600 + 104*3, // 4800 + 69*3, // 7200 + 52*3, // 9600 + (69*3)/2, // 14400 + 26*3, // 19200 + 13*3, // 38400 + 0, // 57600 + 0, // 115200 + 0, // 230400 +}; + +#endif // CYGONCE_ARM_AEB_SERIAL_H diff --git a/packages/io/serial/current/src/arm/pid_serial.h b/packages/io/serial/current/src/arm/pid_serial.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/pid_serial.h @@ -0,0 +1,149 @@ +#ifndef CYGONCE_ARM_PID_SERIAL_H +#define CYGONCE_ARM_PID_SERIAL_H + +// ==================================================================== +// +// pid_serial.h +// +// Device I/O - Description of ARM PID7T serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on ARM PID7T + +struct serial_port { + unsigned char _byte[32]; +}; + +#define reg(n) _byte[n*4] + +// Receive control registers +#define rhr reg(0) // Receive holding register +#define isr reg(2) // Interrupt status register +#define lsr reg(5) // Line status register +#define msr reg(6) // Modem status register +#define scr reg(7) // Scratch register + +// Transmit control registers +#define thr reg(0) // Transmit holding register +#define ier reg(1) // Interrupt enable register +#define fcr reg(2) // FIFO control register +#define lcr reg(3) // Line control register +#define mcr reg(4) // Modem control register +#define ldl reg(0) // LSB of baud rate +#define mdl reg(1) // MSB of baud rate + +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_Tx 0x02 + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +static unsigned short select_baud[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 1047, // 110 + 0, // 134.5 + 768, // 150 + 0, // 200 + 384, // 300 + 192, // 600 + 96, // 1200 + 24, // 1800 + 48, // 2400 + 0, // 3600 + 24, // 4800 + 16, // 7200 + 12, // 9600 + 8, // 14400 + 6, // 19200 + 3, // 38400 + 2, // 57600 + 1, // 115200 + 0, // 230400 +}; + +#endif // CYGONCE_ARM_PID_SERIAL_H diff --git a/packages/io/serial/current/src/arm/pid_serial_with_ints.c b/packages/io/serial/current/src/arm/pid_serial_with_ints.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/pid_serial_with_ints.c @@ -0,0 +1,316 @@ +//========================================================================== +// +// io/serial/arm/pid_serial_with_ints.c +// +// ARM PID Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: PID Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_ARM_PID + +#include "pid_serial.h" + +extern void diag_printf(const char *fmt, ...); + +typedef struct pid_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; +} pid_serial_info; + +static bool pid_serial_init(struct cyg_devtab_entry *tab); +static bool pid_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo pid_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char pid_serial_getc(serial_channel *chan); +static bool pid_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void pid_serial_start_xmit(serial_channel *chan); +static void pid_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 pid_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void pid_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(pid_serial_funs, + pid_serial_putc, + pid_serial_getc, + pid_serial_set_config, + pid_serial_start_xmit, + pid_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 +static pid_serial_info pid_serial_info0 = {0x0D800000, CYGNUM_HAL_INTERRUPT_SERIALA}; +#if CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BUFSIZE > 0 +static unsigned char pid_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BUFSIZE]; +static unsigned char pid_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(pid_serial_channel0, + pid_serial_funs, + pid_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &pid_serial_out_buf0[0], sizeof(pid_serial_out_buf0), + &pid_serial_in_buf0[0], sizeof(pid_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(pid_serial_channel0, + pid_serial_funs, + pid_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_PID_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(pid_serial_io0, + CYGDAT_IO_SERIAL_ARM_PID_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + pid_serial_init, + pid_serial_lookup, // Serial driver may need initializing + &pid_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_ARM_PID_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 +static pid_serial_info pid_serial_info1 = {0x0D800020, CYGNUM_HAL_INTERRUPT_SERIALB}; +#if CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BUFSIZE > 0 +static unsigned char pid_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BUFSIZE]; +static unsigned char pid_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(pid_serial_channel1, + pid_serial_funs, + pid_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &pid_serial_out_buf1[0], sizeof(pid_serial_out_buf1), + &pid_serial_in_buf1[0], sizeof(pid_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(pid_serial_channel1, + pid_serial_funs, + pid_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_PID_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(pid_serial_io1, + CYGDAT_IO_SERIAL_ARM_PID_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + pid_serial_init, + pid_serial_lookup, // Serial driver may need initializing + &pid_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_PID_SERIAL1 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +pid_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + unsigned short baud_divisor = select_baud[new_config->baud]; + unsigned char _lcr, _ier; + if (baud_divisor == 0) return false; // Invalid configuration + _ier = port->ier; + port->ier = 0; // Disable port interrupts while changing hardware + _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + port->lcr = _lcr; + port->lcr |= LCR_DL; + port->mdl = baud_divisor >> 8; + port->ldl = baud_divisor & 0xFF; + port->lcr &= ~LCR_DL; + if (init) { + port->fcr = 0x07; // Enable and clear FIFO + if (chan->out_cbuf.len != 0) { + port->ier = IER_RCV; + } else { + port->ier = 0; + } + port->mcr = MCR_INT|MCR_DTR|MCR_RTS; // Master interrupt enable + } else { + port->ier = _ier; + } + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +pid_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("PID SERIAL init - dev: %x.%d\n", pid_chan->base, pid_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(pid_chan->int_num, + 99, // Priority - what goes here? + (cyg_addrword_t)chan, // Data item passed to interrupt handler + pid_serial_ISR, + pid_serial_DSR, + &pid_chan->serial_interrupt_handle, + &pid_chan->serial_interrupt); + cyg_drv_interrupt_attach(pid_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(pid_chan->int_num); + } + pid_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +pid_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +pid_serial_putc(serial_channel *chan, unsigned char c) +{ + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + if (port->lsr & LSR_THE) { +// Transmit buffer is empty + port->thr = c; + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +pid_serial_getc(serial_channel *chan) +{ + unsigned char c; + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + while ((port->lsr & LSR_RSR) == 0) ; // Wait for char + c = port->rhr; + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +pid_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return pid_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +pid_serial_start_xmit(serial_channel *chan) +{ + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + port->ier |= IER_XMT; // Enable xmit interrupt +} + +// Disable the transmitter on the device +static void +pid_serial_stop_xmit(serial_channel *chan) +{ + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + port->ier &= ~IER_XMT; // Disable xmit interrupt +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +pid_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(pid_chan->int_num); + cyg_drv_interrupt_acknowledge(pid_chan->int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +pid_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base; + unsigned char isr; + isr = port->isr; + if ((isr & 0x0E) == ISR_Tx) { + (chan->callbacks->xmt_char)(chan); + } else { + // Assume receive interrupt + (chan->callbacks->rcv_char)(chan, port->rhr); + } + cyg_drv_interrupt_unmask(pid_chan->int_num); +} +#endif diff --git a/packages/io/serial/current/src/common/haldiag.c b/packages/io/serial/current/src/common/haldiag.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/common/haldiag.c @@ -0,0 +1,120 @@ +//========================================================================== +// +// io/serial/common/haldiag.c +// +// Serial I/O interface module using HAL I/O routines +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: HAL/diag serial driver +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#ifdef CYGPKG_IO_SERIAL_HALDIAG +#include +#include +#include +#include +#include + +static bool haldiag_init(struct cyg_devtab_entry *tab); +static bool haldiag_putc(serial_channel *chan, unsigned char c); +static unsigned char haldiag_getc(serial_channel *chan); +static bool haldiag_set_config(serial_channel *chan, cyg_serial_info_t *config); + +static SERIAL_FUNS(haldiag_funs, + haldiag_putc, + haldiag_getc, + haldiag_set_config, + 0, // start xmit - not used + 0 // stop xmit - not used + ); + +static int _no_data; +SERIAL_CHANNEL(haldiag_channel0, + haldiag_funs, + _no_data, + CYG_SERIAL_BAUD_DEFAULT, + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +DEVTAB_ENTRY(haldiag_io0, + "/dev/haldiag", + 0, // Does not depend on a lower level interface + &serial_devio, + haldiag_init, + 0, // No initialization/lookup needed + &haldiag_channel0); + +static void +haldiag_config_port(serial_channel *chan) +{ +} + +static bool +haldiag_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; +#ifdef CYGDBG_IO_INIT + diag_printf("HAL/diag SERIAL init\n"); +#endif + haldiag_config_port(chan); + return true; +} + +// Return 'true' if character is sent to device +static bool +haldiag_putc(serial_channel *chan, unsigned char c) +{ + HAL_DIAG_WRITE_CHAR(c); + return true; +} + +static unsigned char +haldiag_getc(serial_channel *chan) +{ + unsigned char c; + HAL_DIAG_READ_CHAR(c); + return c; +} + +static bool +haldiag_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + diag_printf("%s\n", __FUNCTION__); + return true; +} +#endif // CYGPKG_IO_SERIAL_HALDIAG diff --git a/packages/io/serial/current/src/common/serial.c b/packages/io/serial/current/src/common/serial.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/common/serial.c @@ -0,0 +1,340 @@ +//========================================================================== +// +// io/serial/common/serial.c +// +// High level serial driver +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Top level serial driver +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include + +static Cyg_ErrNo serial_write(cyg_io_handle_t handle, const void *buf, cyg_uint32 *len); +static Cyg_ErrNo serial_read(cyg_io_handle_t handle, void *buf, cyg_uint32 *len); +static Cyg_ErrNo serial_get_config(cyg_io_handle_t handle, cyg_uint32 key, void *buf, cyg_uint32 *len); +static Cyg_ErrNo serial_set_config(cyg_io_handle_t handle, cyg_uint32 key, const void *buf, cyg_uint32 *len); + +DEVIO_TABLE(serial_devio, + serial_write, + serial_read, + serial_get_config, + serial_set_config + ); + +static void serial_init(serial_channel *chan); +static void serial_xmt_char(serial_channel *chan); +static void serial_rcv_char(serial_channel *chan, unsigned char c); +SERIAL_CALLBACKS(serial_callbacks, + serial_init, + serial_xmt_char, + serial_rcv_char); + +static void +serial_init(serial_channel *chan) +{ + if (chan->init) return; + if (chan->out_cbuf.len != 0) { +#ifdef CYGDBG_IO_INIT + diag_printf("Set output buffer - buf: %x len: %d\n", chan->out_cbuf.data, chan->out_cbuf.len); +#endif + chan->out_cbuf.waiting = false; + chan->out_cbuf.abort = false; + chan->out_cbuf.pending = 0; + cyg_drv_mutex_init(&chan->out_cbuf.lock); + cyg_drv_cond_init(&chan->out_cbuf.wait, &chan->out_cbuf.lock); + chan->out_cbuf.low_water = chan->out_cbuf.len / 4; + } + if (chan->in_cbuf.len != 0) { +#ifdef CYGDBG_IO_INIT + diag_printf("Set input buffer - buf: %x len: %d\n", chan->in_cbuf.data, chan->in_cbuf.len); +#endif + chan->in_cbuf.waiting = false; + chan->in_cbuf.abort = false; + cyg_drv_mutex_init(&chan->in_cbuf.lock); + cyg_drv_cond_init(&chan->in_cbuf.wait, &chan->in_cbuf.lock); + } + chan->init = true; +} + +static Cyg_ErrNo +serial_write(cyg_io_handle_t handle, const void *_buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + serial_channel *chan = (serial_channel *)t->priv; + serial_funs *funs = chan->funs; + cyg_int32 size = *len; + cyg_uint8 *buf = (cyg_uint8 *)_buf; + int next; + cbuf_t *cbuf = &chan->out_cbuf; + Cyg_ErrNo res = ENOERR; + + cyg_drv_mutex_lock(&cbuf->lock); + if (cbuf->len == 0) { + // Non interrupt driven (i.e. polled) operation + while (size-- > 0) { + while ((funs->putc)(chan, *buf) == false) ; // Ignore full, keep trying + buf++; + } + } else { + cyg_drv_dsr_lock(); // Avoid race condition testing pointers + while (size > 0) { + next = cbuf->put + 1; + if (next == cbuf->len) next = 0; + if (next == cbuf->get) { + cbuf->waiting = true; + // Buffer full - wait for space + (funs->start_xmit)(chan); // Make sure xmit is running + cbuf->pending += size; // Have this much more to send [eventually] + cyg_drv_cond_wait(&cbuf->wait); + cbuf->pending -= size; + if (cbuf->abort) { + // Give up! + cbuf->abort = false; + cbuf->waiting = false; + res = -EINTR; + break; + } + } else { + cbuf->data[cbuf->put++] = *buf++; + cbuf->put = next; + size--; // Only count if actually sent! + } + } + cyg_drv_dsr_unlock(); + (funs->start_xmit)(chan); // Start output as necessary + } + cyg_drv_mutex_unlock(&cbuf->lock); + return res; +} + +static Cyg_ErrNo +serial_read(cyg_io_handle_t handle, void *_buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + serial_channel *chan = (serial_channel *)t->priv; + serial_funs *funs = chan->funs; + cyg_uint8 *buf = (cyg_uint8 *)_buf; + cyg_int32 size = 0; + cbuf_t *cbuf = &chan->in_cbuf; + Cyg_ErrNo res = ENOERR; + + cyg_drv_mutex_lock(&cbuf->lock); + if (cbuf->len == 0) { + // Non interrupt driven (i.e. polled) operation + while (size++ < *len) { + *buf++ = (funs->getc)(chan); + } + } else { + cyg_drv_dsr_lock(); // Avoid races + while (size < *len) { + if (cbuf->get != cbuf->put) { + *buf++ = cbuf->data[cbuf->get]; + if (++cbuf->get == cbuf->len) cbuf->get = 0; + size++; + } else { + cbuf->waiting = true; + cyg_drv_cond_wait(&cbuf->wait); + if (cbuf->abort) { + // Give up! + cbuf->abort = false; + cbuf->waiting = false; + res = -EINTR; + break; + } + } + } + cyg_drv_dsr_unlock(); + } + cyg_drv_mutex_unlock(&cbuf->lock); + return res; +} + +static Cyg_ErrNo +serial_get_config(cyg_io_handle_t handle, cyg_uint32 key, void *xbuf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + serial_channel *chan = (serial_channel *)t->priv; + cyg_serial_info_t *buf = (cyg_serial_info_t *)xbuf; + Cyg_ErrNo res = ENOERR; + cbuf_t *cbuf = &chan->out_cbuf; + serial_funs *funs = chan->funs; + + switch (key) { + case CYG_IO_GET_CONFIG_SERIAL_INFO: + if (*len < sizeof(cyg_serial_info_t)) { + return -EINVAL; + } + *buf = chan->config; + *len = sizeof(chan->config); + break; + case CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN: +// Wait for any pending output to complete + if (cbuf->len == 0) break; // Nothing to do if not buffered + cyg_drv_mutex_lock(&cbuf->lock); // Stop any further output processing + cyg_drv_dsr_lock(); + while (cbuf->pending || (cbuf->get != cbuf->put)) { + cbuf->waiting = true; + cyg_drv_cond_wait(&cbuf->wait); + } + cyg_drv_dsr_unlock(); + cyg_drv_mutex_unlock(&cbuf->lock); + break; + case CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH: + // Flush any buffered input + cbuf = &chan->in_cbuf; + if (cbuf->len == 0) break; // Nothing to do if not buffered + cyg_drv_mutex_lock(&cbuf->lock); // Stop any further input processing + cyg_drv_dsr_lock(); + if (cbuf->waiting) { + cbuf->abort = true; + cyg_drv_cond_signal(&cbuf->wait); + cbuf->waiting = false; + } + cbuf->get = cbuf->put; // Flush buffered input + cyg_drv_dsr_unlock(); + cyg_drv_mutex_unlock(&cbuf->lock); + break; + case CYG_IO_GET_CONFIG_SERIAL_ABORT: + // Abort any outstanding I/O, including blocked reads + // Caution - assumed to be called from 'timeout' (i.e. DSR) code + cbuf = &chan->in_cbuf; + if (cbuf->len != 0) { + cbuf->abort = true; + cyg_drv_cond_signal(&cbuf->wait); + } + cbuf = &chan->out_cbuf; + if (cbuf->len != 0) { + cbuf->abort = true; + cyg_drv_cond_signal(&cbuf->wait); + } + break; + case CYG_IO_GET_CONFIG_SERIAL_OUTPUT_FLUSH: +// Throw away any pending output + if (cbuf->len == 0) break; // Nothing to do if not buffered + cyg_drv_mutex_lock(&cbuf->lock); // Stop any further output processing + cyg_drv_dsr_lock(); + if (cbuf->get != cbuf->put) { + cbuf->get = cbuf->put; // Empties queue! + (funs->stop_xmit)(chan); // Done with transmit + } + if (cbuf->waiting) { + cbuf->abort = true; + cyg_drv_cond_signal(&cbuf->wait); + cbuf->waiting = false; + } + cyg_drv_dsr_unlock(); + cyg_drv_mutex_unlock(&cbuf->lock); + break; + default: + res = -EINVAL; + } + return res; +} + +static Cyg_ErrNo +serial_set_config(cyg_io_handle_t handle, cyg_uint32 key, const void *xbuf, cyg_uint32 *len) +{ + Cyg_ErrNo res = ENOERR; + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + serial_channel *chan = (serial_channel *)t->priv; + serial_funs *funs = chan->funs; + cyg_serial_info_t *buf = (cyg_serial_info_t *)xbuf; + + switch (key) { + case CYG_IO_SET_CONFIG_SERIAL_INFO: + if (*len != sizeof(cyg_serial_info_t)) { + return -EINVAL; + } + if ((funs->set_config)(chan, buf) != true) { + // Device is not happy with paramters or they cannot be set + res = -EINVAL; + } + break; + default: + res = -EINVAL; + } + return res; +} + +static void +serial_xmt_char(serial_channel *chan) +{ + cbuf_t *cbuf = &chan->out_cbuf; + serial_funs *funs = chan->funs; + unsigned char c; + int space; + + while (cbuf->get != cbuf->put) { + c = cbuf->data[cbuf->get]; + if ((funs->putc)(chan, c)) { + cbuf->get++; + if (cbuf->get == cbuf->len) cbuf->get = 0; + if (cbuf->waiting) { + // See if there is now enough room to restart writer + space = (cbuf->len + cbuf->get) - cbuf->put; + if (space > cbuf->len) space -= cbuf->len; + if (space >= cbuf->low_water) { + cbuf->waiting = false; + cyg_drv_cond_broadcast(&cbuf->wait); + } + } + } else { + return; // Need to wait for more space + } + } + (funs->stop_xmit)(chan); // Done with transmit + if (cbuf->waiting) { + cbuf->waiting = false; + cyg_drv_cond_signal(&cbuf->wait); + } +} + +static void +serial_rcv_char(serial_channel *chan, unsigned char c) +{ + cbuf_t *cbuf = &chan->in_cbuf; + + cbuf->data[cbuf->put++] = c; + if (cbuf->put == cbuf->len) cbuf->put = 0; + if (cbuf->waiting) { + cbuf->waiting = false; + cyg_drv_cond_signal(&cbuf->wait); + } +} + diff --git a/packages/io/serial/current/src/common/tty.c b/packages/io/serial/current/src/common/tty.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/common/tty.c @@ -0,0 +1,294 @@ +//========================================================================== +// +// io/serial/common/tty.c +// +// TTY (terminal-like interface) I/O driver +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Device driver for tty I/O, layered on top of serial I/O +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#ifdef CYGPKG_IO_SERIAL_TTY +#include +#include +#include +#include + +static bool tty_init(struct cyg_devtab_entry *tab); +static Cyg_ErrNo tty_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static Cyg_ErrNo tty_write(cyg_io_handle_t handle, const void *buf, cyg_uint32 *len); +static Cyg_ErrNo tty_read(cyg_io_handle_t handle, void *buf, cyg_uint32 *len); +static Cyg_ErrNo tty_get_config(cyg_io_handle_t handle, cyg_uint32 key, void *buf, cyg_uint32 *len); +static Cyg_ErrNo tty_set_config(cyg_io_handle_t handle, cyg_uint32 key, const void *buf, cyg_uint32 *len); + +struct tty_private_info { + cyg_tty_info_t dev_info; + cyg_io_handle_t dev_handle; +}; + +static DEVIO_TABLE(tty_devio, + tty_write, + tty_read, + tty_get_config, + tty_set_config + ); + +#ifdef CYGPKG_IO_SERIAL_TTY_TTYDIAG +static struct tty_private_info tty_private_info_diag; +DEVTAB_ENTRY(tty_io_diag, +// "/dev/console", +// CYGDAT_IO_SERIAL_TTY_CONSOLE, // Based on driver for this device + "/dev/ttydiag", + "/dev/haldiag", + &tty_devio, + tty_init, + tty_lookup, // Execute this when device is being looked up + &tty_private_info_diag); +#endif + +#ifdef CYGPKG_IO_SERIAL_TTY_TTY0 +static struct tty_private_info tty_private_info0; +DEVTAB_ENTRY(tty_io0, + "/dev/tty0", + CYGDAT_IO_SERIAL_TTY_TTY0_DEV, + &tty_devio, + tty_init, + tty_lookup, // Execute this when device is being looked up + &tty_private_info0); +#endif + +#ifdef CYGPKG_IO_SERIAL_TTY_TTY1 +static struct tty_private_info tty_private_info1; +DEVTAB_ENTRY(tty_io1, + "/dev/tty1", + CYGDAT_IO_SERIAL_TTY_TTY1_DEV, + &tty_devio, + tty_init, + tty_lookup, // Execute this when device is being looked up + &tty_private_info1); +#endif + +#ifdef CYGPKG_IO_SERIAL_TTY_TTY2 +static struct tty_private_info tty_private_info2; +DEVTAB_ENTRY(tty_io2, + "/dev/tty2", + CYGDAT_IO_SERIAL_TTY_TTY2_DEV, + &tty_devio, + tty_init, + tty_lookup, // Execute this when device is being looked up + &tty_private_info2); +#endif + +static bool +tty_init(struct cyg_devtab_entry *tab) +{ + struct tty_private_info *priv = (struct tty_private_info *)tab->priv; +#ifdef CYGDBG_IO_INIT + diag_printf("Init tty channel: %x\n", tab); +#endif + priv->dev_info.tty_out_flags = CYG_TTY_OUT_FLAGS_DEFAULT; + priv->dev_info.tty_in_flags = CYG_TTY_IN_FLAGS_DEFAULT; + return true; +} + +static Cyg_ErrNo +tty_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + cyg_io_handle_t chan = (cyg_io_handle_t)sub_tab; + struct tty_private_info *priv = (struct tty_private_info *)(*tab)->priv; +#if 0 + cyg_int32 len; +#endif + priv->dev_handle = chan; +#if 0 + len = sizeof(cyg_serial_info_t); + // Initialize configuration + cyg_io_get_config(chan, CYG_SERIAL_GET_CONFIG, + (void *)&priv->dev_info.serial_config, &len); +#endif + return ENOERR; +} + +#define BUFSIZE 64 + +static Cyg_ErrNo +tty_write(cyg_io_handle_t handle, const void *_buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + struct tty_private_info *priv = (struct tty_private_info *)t->priv; + cyg_io_handle_t chan = (cyg_io_handle_t)priv->dev_handle; + cyg_int32 size, bytes_successful, actually_written; + cyg_uint8 xbuf[BUFSIZE]; + cyg_uint8 c; + cyg_uint8 *buf = (cyg_uint8 *)_buf; + Cyg_ErrNo res = -EBADF; + // assert(chan) + size = 0; + bytes_successful = 0; + actually_written = 0; + while (bytes_successful++ < *len) { + xbuf[size++] = (c = *buf++); + if ((c == '\n') && + (priv->dev_info.tty_out_flags & CYG_TTY_OUT_FLAGS_CRLF)) { + xbuf[size++] = '\r'; + } + // Always leave room for possible CR/LF expansion + if ((size == (BUFSIZE-1)) || + (bytes_successful == *len)) { + res = cyg_io_write(chan, xbuf, &size); + if (res != ENOERR) { + *len = actually_written; + return res; + } + actually_written += size; + size = 0; + } + } + *len = actually_written; + return res; +} + +static Cyg_ErrNo +tty_read(cyg_io_handle_t handle, void *_buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + struct tty_private_info *priv = (struct tty_private_info *)t->priv; + cyg_io_handle_t chan = (cyg_io_handle_t)priv->dev_handle; + cyg_uint32 size, clen; + Cyg_ErrNo res; + cyg_uint8 c; + cyg_uint8 *buf = (cyg_uint8 *)_buf; + // assert(chan) + size = 0; + while (size < *len) { + clen = 1; + res = cyg_io_read(chan, &c, &clen); + if (res != ENOERR) { + *len = size; + return res; + } + buf[size++] = c; + if ((priv->dev_info.tty_in_flags & CYG_TTY_IN_FLAGS_BINARY) == 0) { + if ((c == '\b') || (c == 0x7F)) { + size -= 2; // erase one character + 'backspace' char + if (size < 0) size = 0; + if (priv->dev_info.tty_in_flags & CYG_TTY_IN_FLAGS_ECHO) { + clen = 3; + cyg_io_write(chan, "\b \b", &clen); + } + } else if ((c == '\n') || (c == '\r')) { + clen = 2; + if (priv->dev_info.tty_in_flags & CYG_TTY_IN_FLAGS_ECHO) { + cyg_io_write(chan, "\n\r", &clen); + } + if (priv->dev_info.tty_in_flags & CYG_TTY_IN_FLAGS_CRLF) { + c = '\n'; // Map CR -> LF + } + buf[size-1] = c; + break; + } else { + if (priv->dev_info.tty_in_flags & CYG_TTY_IN_FLAGS_ECHO) { + clen = 1; + cyg_io_write(chan, &c, &clen); + } + } + } + } + *len = size; + return ENOERR; +} + +static Cyg_ErrNo +tty_get_config(cyg_io_handle_t handle, cyg_uint32 key, void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + struct tty_private_info *priv = (struct tty_private_info *)t->priv; + cyg_io_handle_t chan = (cyg_io_handle_t)priv->dev_handle; + Cyg_ErrNo res = ENOERR; +#if 0 + cyg_int32 current_len; +#endif + // assert(chan) + switch (key) { + case CYG_IO_GET_CONFIG_TTY_INFO: + if (*len < sizeof(cyg_tty_info_t)) { + return -EINVAL; + } +#if 0 + current_len = sizeof(cyg_serial_info_t); + res = cyg_io_get_config(chan, CYG_SERIAL_GET_CONFIG, + (void *)&priv->dev_info.serial_config, ¤t_len); + if (res != ENOERR) { + return res; + } +#endif + *(cyg_tty_info_t *)buf = priv->dev_info; + *len = sizeof(cyg_tty_info_t); + break; + default: // Assume this is a 'serial' driver control + res = cyg_io_get_config(chan, key, buf, len); + } + return res; +} + +static Cyg_ErrNo +tty_set_config(cyg_io_handle_t handle, cyg_uint32 key, const void *buf, cyg_uint32 *len) +{ + cyg_devtab_entry_t *t = (cyg_devtab_entry_t *)handle; + struct tty_private_info *priv = (struct tty_private_info *)t->priv; + cyg_io_handle_t chan = (cyg_io_handle_t)priv->dev_handle; +#if 0 + cyg_int32 current_len; +#endif + Cyg_ErrNo res = ENOERR; + // assert(chan) + switch (key) { + case CYG_IO_SET_CONFIG_TTY_INFO: + if (*len != sizeof(cyg_tty_info_t)) { + return -EINVAL; + } + priv->dev_info = *(cyg_tty_info_t *)buf; + break; + default: // Pass on to serial driver + res = cyg_io_set_config(chan, key, buf, len); + } + return res; +} +#endif // CYGPKG_IO_SERIAL_TTY diff --git a/packages/io/serial/current/src/mips/tx3904_serial.c b/packages/io/serial/current/src/mips/tx3904_serial.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/mips/tx3904_serial.c @@ -0,0 +1,729 @@ +//========================================================================== +// +// tx3904_serial.c +// +// Serial device driver for TX3904 on-chip serial devices +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-03-3 +// Purpose: TX3904 serial device driver +// Description: TX3904 serial device driver +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904 + +cyg_bool cyg_hal_is_break(char *buf, int size); +void cyg_hal_user_break( CYG_ADDRWORD *regs ); + +//------------------------------------------------------------------------- + +extern void diag_printf(const char *fmt, ...); + +//------------------------------------------------------------------------- +// Forward definitions + +static bool tx3904_serial_init(struct cyg_devtab_entry *tab); +static bool tx3904_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo tx3904_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char tx3904_serial_getc(serial_channel *chan); +static bool tx3904_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void tx3904_serial_start_xmit(serial_channel *chan); +static void tx3904_serial_stop_xmit(serial_channel *chan); + +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE +static cyg_uint32 tx3904_serial_ISR(cyg_vector_t vector, cyg_addrword_t data, cyg_addrword_t *regs); +static void tx3904_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +#endif + + +//------------------------------------------------------------------------- +// TX3904 serial line control register values: + +// Offsets to serial control registers from base +#define SERIAL_CR 0x00 +#define SERIAL_SR 0x04 +#define SERIAL_ICR 0x08 +#define SERIAL_ISR 0x0C +#define SERIAL_FCR 0x10 +#define SERIAL_BRG 0x14 +#define SERIAL_TXB 0x20 +#define SERIAL_RXB 0x30 + +// Status register bits +#define ISR_RXRDY 0x01 +#define ISR_TXRDY 0x02 +#define ISR_ERROR 0x04 + +// Control register bits +#define LCR_SB1 0x0000 +#define LCR_SB1_5 0x0000 +#define LCR_SB2 0x0004 +#define LCR_PN 0x0000 // Parity mode - none +#define LCR_PS 0x0000 // Forced "space" parity +#define LCR_PM 0x0000 // Forced "mark" parity +#define LCR_PE 0x0018 // Parity mode - even +#define LCR_PO 0x0010 // Parity mode - odd +#define LCR_WL5 0x0001 // not supported - use 7bit +#define LCR_WL6 0x0001 // not supported - use 7bit +#define LCR_WL7 0x0001 // 7 bit chars +#define LCR_WL8 0x0000 // 8 bit chars + +#define LCR_BRG 0x0020 // Select baud rate generator + +#define ICR_RXE 0x0001 // receive enable +#define ICR_TXE 0x0002 // transmit enable + +//------------------------------------------------------------------------- +// Tables to map input values to hardware settings + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +// The values in this table plug straight into the BRG register +// in the serial driver hardware. They comprise a baud rate divisor +// in the bottom 8 bits and a clock selector in the top 8 bits. +// These figures all come from Toshiba. + +#if (CYGHWR_HAL_MIPS_CPU_FREQ == 50) + +static unsigned short select_baud[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 0, // 110 + 0, // 134.5 + 0, // 150 + 0, // 200 + 0, // 300 + 0x0300|20, // 600 + 0x0300|10, // 1200 + 0, // 1800 + 0x0300|05, // 2400 + 0, // 3600 + 0x0300|10, // 4800 + 0, // 7200 + 0x0200|05, // 9600 + 0, // 14400 + 0x0100|10, // 19200 + 0x0100|05, // 38400 + 0, // 57600 + 0, // 115200 + 0, // 230400 +}; + +#elif (CYGHWR_HAL_MIPS_CPU_FREQ == 66) + +static unsigned short select_baud[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 0, // 110 + 0, // 134.5 + 0, // 150 + 0, // 200 + 0, // 300 + 0x0300|27, // 600 + 0x0200|54, // 1200 + 0, // 1800 + 0x0200|27, // 2400 + 0, // 3600 + 0x0100|54, // 4800 + 0, // 7200 + 0x0100|27, // 9600 + 0, // 14400 + 0x0000|54, // 19200 + 0x0000|27, // 38400 + 0, // 57600 + 0, // 115200 + 0, // 230400 +}; + +#else + +#error Unsupported CPU frequency + +#endif + +//------------------------------------------------------------------------- +// Info for each serial device controlled + +typedef struct tx3904_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt interrupt; + cyg_handle_t interrupt_handle; + cyg_uint8 input_char; + cyg_bool input_char_valid; + cyg_bool output_ready; + cyg_uint16 cur_baud; +} tx3904_serial_info; + +//------------------------------------------------------------------------- +// Callback functions exported by this driver + +static SERIAL_FUNS(tx3904_serial_funs, + tx3904_serial_putc, + tx3904_serial_getc, + tx3904_serial_set_config, + tx3904_serial_start_xmit, + tx3904_serial_stop_xmit + ); + +//------------------------------------------------------------------------- +// Hardware info for each serial line + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 +static tx3904_serial_info tx3904_serial_info0 = { + 0xFFFFF300, + CYGNUM_HAL_INTERRUPT_SIO_0 +}; +#if CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE > 0 +static unsigned char tx3904_serial_out_buf0[CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE]; +static unsigned char tx3904_serial_in_buf0[CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE]; +#endif +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 +static tx3904_serial_info tx3904_serial_info1 = { + 0xFFFFF400, + CYGNUM_HAL_INTERRUPT_SIO_1 +}; +#if CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE > 0 +static unsigned char tx3904_serial_out_buf1[CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE]; +static unsigned char tx3904_serial_in_buf1[CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE]; +#endif +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + +//------------------------------------------------------------------------- +// Channel descriptions: + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE +#define SIZEOF_BUF(_x_) 0 +#else +#define SIZEOF_BUF(_x_) sizeof(_x_) +#endif + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 +#if CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BUFSIZE > 0 +static SERIAL_CHANNEL_USING_INTERRUPTS(tx3904_serial_channel0, + tx3904_serial_funs, + tx3904_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &tx3904_serial_out_buf0[0], + SIZEOF_BUF(tx3904_serial_out_buf0), + &tx3904_serial_in_buf0[0], + SIZEOF_BUF(tx3904_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(tx3904_serial_channel0, + tx3904_serial_funs, + tx3904_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 +#if CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BUFSIZE > 0 +static SERIAL_CHANNEL_USING_INTERRUPTS(tx3904_serial_channel1, + tx3904_serial_funs, + tx3904_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &tx3904_serial_out_buf1[0], + SIZEOF_BUF(tx3904_serial_out_buf1), + &tx3904_serial_in_buf1[0], + SIZEOF_BUF(tx3904_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(tx3904_serial_channel1, + tx3904_serial_funs, + tx3904_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_TX39_JMR3904_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + +//------------------------------------------------------------------------- +// And finally, the device table entries: + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 +DEVTAB_ENTRY(tx3904_serial_io0, + CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + tx3904_serial_init, + tx3904_serial_lookup, // Serial driver may need initializing + &tx3904_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 +DEVTAB_ENTRY(tx3904_serial_io1, + CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + tx3904_serial_init, + tx3904_serial_lookup, // Serial driver may need initializing + &tx3904_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL1 + +// ------------------------------------------------------------------------ +// Delay for some number of character times. This is based on the baud +// rate currently set. We use the numbers that plug in to the BRG +// clock select and divider to control two loops. The innermost delay +// loop uses a count that is derived from dividing the CPU frequency +// by the BRG granularity (and we then add 1 to compensate for any +// rounding). This gives the number of cycles that the innermost loop +// must consume. For the sake of simplicity we assume that this loop +// will take 1 cycle per loop, which is roughly true in optimized +// code. + +void delay_char_time(tx3904_serial_info *tx3904_chan, int n) +{ + static cyg_uint16 clock_val[4] = { 4, 16, 64, 256 }; + cyg_uint16 baud_val = select_baud[tx3904_chan->cur_baud]; + cyg_count32 clock_loop = clock_val[baud_val>>8]; + cyg_count32 div_loop = baud_val & 0xFF; + cyg_count32 bit_time = ((CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL)/(2457600)) + 1; + + n *= 11; // allow for start and stop bits and 8 data bits + + while( n-- ) + { + cyg_count32 i,j,k; + + for( i = 0; i < clock_loop; i++ ) + for( j = 0; j < div_loop; j++ ) + for( k = 0; k < bit_time; k++ ) + continue; + } +} + +//------------------------------------------------------------------------- + +static bool +tx3904_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint16 cr = 0; + cyg_uint16 icr = 0; + cyg_uint16 baud_divisor = select_baud[new_config->baud]; + + if (baud_divisor == 0) + return false; // Invalid baud rate selected + + // set up other config values: + + cr |= select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5]; + cr |= select_stop_bits[new_config->stop]; + cr |= select_parity[new_config->parity]; + + // Source transfer clock from BRG + cr |= LCR_BRG; + +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + // Enable RX interrupts only at present +#ifdef CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0 + if ((chan->out_cbuf.len != 0) || (chan == &tx3904_serial_channel0)) { +#else + if (chan->out_cbuf.len != 0) { +#endif + icr |= ICR_RXE; + } +#endif + + // Avoid any interrupts while we are fiddling with the line parameters. + cyg_drv_interrupt_mask(tx3904_chan->int_num); + + + // In theory we should wait here for the transmitter to drain the + // FIFO so we dont change the line parameters with characters + // unsent. Unfortunately the TX39 serial devices do not allow us + // to discover when the FIFO is empty. + + delay_char_time(tx3904_chan, 8); + + // Disable device entirely. +// HAL_WRITE_UINT16(tx3904_chan->base+SERIAL_CR, 0); +// HAL_WRITE_UINT8(tx3904_chan->base+SERIAL_ICR, 0); + + // Reset the FIFOs + + HAL_WRITE_UINT16(tx3904_chan->base+SERIAL_FCR, 7); + HAL_WRITE_UINT16(tx3904_chan->base+SERIAL_FCR, 0); + + // Set up baud rate + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_BRG, baud_divisor ); + + // Write CR into hardware + HAL_WRITE_UINT16(tx3904_chan->base+SERIAL_CR, cr); + + // Write ICR into hardware + HAL_WRITE_UINT16(tx3904_chan->base+SERIAL_ICR, icr); + + // Re-enable interrupts. + cyg_drv_interrupt_unmask(tx3904_chan->int_num); + + // Save current baud rate + tx3904_chan->cur_baud = new_config->baud; + + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +//------------------------------------------------------------------------- +// Function to initialize the device. Called at bootstrap time. + +bool tx3904_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + + tx3904_chan->cur_baud = CYGNUM_SERIAL_BAUD_38400; + +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + if (chan->out_cbuf.len != 0) { + // Install and enable the interrupt + cyg_drv_interrupt_create(tx3904_chan->int_num, + 4, // Priority + (cyg_addrword_t)chan, // Data item passed to interrupt handler + (cyg_ISR_t *)tx3904_serial_ISR, + tx3904_serial_DSR, + &tx3904_chan->interrupt_handle, + &tx3904_chan->interrupt); + cyg_drv_interrupt_attach(tx3904_chan->interrupt_handle); + cyg_drv_interrupt_unmask(tx3904_chan->int_num); + } +#endif + + tx3904_serial_config_port(chan, &chan->config, true); + + return true; +} + +//------------------------------------------------------------------------- +// This routine is called when the device is "looked" up (i.e. attached) + +static Cyg_ErrNo +tx3904_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +//------------------------------------------------------------------------- +// Return 'true' if character is sent to device + +bool +tx3904_serial_putc(serial_channel *chan, unsigned char c) +{ + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint16 isr; + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + if( isr & ISR_TXRDY ) + { + HAL_WRITE_UINT8( tx3904_chan->base+SERIAL_TXB, c ); + + isr &= ~ISR_TXRDY; + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + return true; + } + else return false; +} + +//------------------------------------------------------------------------- + +unsigned char +tx3904_serial_getc(serial_channel *chan) +{ + unsigned char c; + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint16 isr; + + do + { + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + // Eliminate any RX errors + if( isr & ISR_ERROR ) + { + cyg_uint16 sr = 0; + + isr &= ISR_ERROR; + +// HAL_READ_UINT16( tx3904_chan->base+SERIAL_SR, sr ); + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_SR, sr ); + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + } + + } while( (isr & ISR_RXRDY) != ISR_RXRDY ); + + HAL_READ_UINT8( tx3904_chan->base+SERIAL_RXB, c ); + + isr &= ~ISR_RXRDY; + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + return c; +} + +//------------------------------------------------------------------------- + +bool +tx3904_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return tx3904_serial_config_port(chan, config, false); +} + +//------------------------------------------------------------------------- +// Enable the transmitter on the device + +static void +tx3904_serial_start_xmit(serial_channel *chan) +{ +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint16 icr; + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ICR, icr ); + + icr |= ICR_TXE; + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ICR, icr ); +#endif +} + +//------------------------------------------------------------------------- +// Disable the transmitter on the device + +static void +tx3904_serial_stop_xmit(serial_channel *chan) +{ +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint16 icr; + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ICR, icr ); + + icr &= ~ICR_TXE; + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ICR, icr ); +#endif +} + +//------------------------------------------------------------------------- +// Serial I/O - low level interrupt handlers (ISR) + +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + +static cyg_uint32 +tx3904_serial_ISR(cyg_vector_t vector, cyg_addrword_t data, cyg_addrword_t *regs) +{ + serial_channel *chan = (serial_channel *)data; + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint8 isr; + cyg_uint32 result = 0; + + cyg_drv_interrupt_mask(tx3904_chan->int_num); + cyg_drv_interrupt_acknowledge(tx3904_chan->int_num); + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + // Eliminate any RX errors + if( isr & ISR_ERROR ) + { + cyg_uint16 sr = 0; + + isr &= ~ISR_ERROR; + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_SR, sr ); + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_SR, 0 ); + } + + // Check for a TX interrupt and set the flag if so. + if( isr & ISR_TXRDY ) + { + isr &= ~ISR_TXRDY; + + tx3904_chan->output_ready = true; + + result |= CYG_ISR_CALL_DSR; // Cause DSR to be run + } + + + // Check here for an RX interrupt and fetch the character. If it + // is a ^C then call into GDB stub to handle it. + + if( isr & ISR_RXRDY ) + { + cyg_uint8 rxb; + HAL_READ_UINT8( tx3904_chan->base+SERIAL_RXB, rxb ); + + isr &= ~ISR_RXRDY; + + if( cyg_hal_is_break( &rxb , 1 ) ) + cyg_hal_user_break( regs ); + else + { + tx3904_chan->input_char = rxb; + tx3904_chan->input_char_valid = true; + result |= CYG_ISR_CALL_DSR; // Cause DSR to be run + } + + } + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + return result; +} + + +#endif + +//------------------------------------------------------------------------- +// Serial I/O - high level interrupt handler (DSR) + +#ifndef CYGPKG_IO_SERIAL_TX39_JMR3904_POLLED_MODE + +static void +tx3904_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + tx3904_serial_info *tx3904_chan = (tx3904_serial_info *)chan->dev_priv; + cyg_uint8 isr; + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + if( tx3904_chan->input_char_valid ) + { + (chan->callbacks->rcv_char)(chan, tx3904_chan->input_char); + + tx3904_chan->input_char_valid = false; + +#if 0 + // And while we are here, pull any further characters out of the + // FIFO. This should help to reduce the interrupt rate. + + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + + while( isr & ISR_RXRDY ) + { + cyg_uint8 rxb; + HAL_READ_UINT8( tx3904_chan->base+SERIAL_RXB, rxb ); + + (chan->callbacks->rcv_char)(chan, rxb); + + isr &= ~ISR_RXRDY; + + HAL_WRITE_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + HAL_READ_UINT16( tx3904_chan->base+SERIAL_ISR, isr ); + } +#endif + + } + + if( tx3904_chan->output_ready ) + { + (chan->callbacks->xmt_char)(chan); + + tx3904_chan->output_ready = false; + } + + cyg_drv_interrupt_unmask(tx3904_chan->int_num); +} + +#endif +#endif // CYGPKG_IO_SERIAL_TX39_JMR3904 + +//------------------------------------------------------------------------- +// EOF tx3904_serial.c diff --git a/packages/io/serial/current/src/mn10300/mn10300_serial.c b/packages/io/serial/current/src/mn10300/mn10300_serial.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/mn10300/mn10300_serial.c @@ -0,0 +1,759 @@ +//========================================================================== +// +// mn10300_serial.c +// +// Serial device driver for mn10300 on-chip serial devices +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-25 +// Purpose: MN10300 serial device driver +// Description: MN10300 serial device driver +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include + +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_MN10300 + +//------------------------------------------------------------------------- + +extern void diag_printf(const char *fmt, ...); + +//------------------------------------------------------------------------- +// Forward definitions + +static bool mn10300_serial_init(struct cyg_devtab_entry *tab); +static bool mn10300_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo mn10300_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char mn10300_serial_getc(serial_channel *chan); +static bool mn10300_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void mn10300_serial_start_xmit(serial_channel *chan); +static void mn10300_serial_stop_xmit(serial_channel *chan); + +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE +static cyg_uint32 mn10300_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static cyg_uint32 mn10300_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void mn10300_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +static void mn10300_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +#endif + +//------------------------------------------------------------------------- + +#define BUFSIZE 128 + +//------------------------------------------------------------------------- +// MN10300 serial line control register values: + +// Offsets to serial control registers from base +#define SERIAL_CTR 0x0 +#define SERIAL_ICR 0x4 +#define SERIAL_TXB 0x8 +#define SERIAL_RXB 0x9 +#define SERIAL_STR 0xc +#define SERIAL_TIM 0xd + +// Status register bits +#define SR_RBF 0x10 +#define SR_TBF 0x20 +#define SR_RXF 0x40 +#define SR_TXF 0x80 + +// Control register bits +#define LCR_SB1 0x00 +#define LCR_SB1_5 0x00 +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PS 0x40 // Forced "space" parity +#define LCR_PM 0x50 // Forced "mark" parity +#define LCR_PE 0x60 // Parity mode - even +#define LCR_PO 0x70 // Parity mode - odd +#define LCR_WL5 0x00 // not supported - use 7bit +#define LCR_WL6 0x00 // not supported - use 7bit +#define LCR_WL7 0x00 // 7 bit chars +#define LCR_WL8 0x80 // 8 bit chars +#define LCR_RXE 0x4000 // receive enable +#define LCR_TXE 0x8000 // transmit enable + +//------------------------------------------------------------------------- +// MN10300 timer registers: + +#undef TIMER_BR +#undef TIMER_MD +#define TIMER_MD 0x00 +#define TIMER_BR 0x10 + +//------------------------------------------------------------------------- +// IO Port: + +#define PORT3_MD 0x36008025 + +//------------------------------------------------------------------------- +// Tables to map input values to hardware settings + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +static unsigned short select_baud_01[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 0, // 110 + 0, // 134.5 + 0, // 150 + 0, // 200 + 0, // 300 + 0, // 600 + 0, // 1200 + 0, // 1800 + 0, // 2400 + 0, // 3600 + 0, // 4800 + 0, // 7200 + 195, // 9600 + 130, // 14400 + 98, // 19200 + 48, // 38400 + 32, // 57600 + 16, // 115200 + 8, // 230400 +}; + +// Serial 2 has its own timer register in addition to using timer 2 to +// supply the baud rate generator. Both of these must be proframmed to +// get the right baud rate. The following values come from Matsushita +// with some modifications from Cygmon. +static struct +{ + cyg_uint8 serial2_val; + cyg_uint8 timer2_val; +} select_baud_2[] = { + { 0, 0 }, // Unused + { 0, 0 }, // 50 + { 0, 0 }, // 75 + { 0, 0 }, // 110 + { 0, 0 }, // 134.5 + { 0, 0 }, // 150 + { 0, 0 }, // 200 + { 0, 0 }, // 300 + { 126, 196 }, // 600 + { 125, 98 }, // 1200 + { 0, 0 }, // 1800 + { 124, 49 }, // 2400 + { 0, 0 }, // 3600 + { 124, 24 }, // 4800 + { 0, 0 }, // 7200 + { 70, 21 }, // 9600 + { 0, 0 }, // 14400 + { 70, 10 }, // 19200 + { 22, 16 }, // 38400 + { 88, 2 }, // 57600 + { 64, 1 }, // 115200 + { 62, 0 }, // 230400 +}; + + +//------------------------------------------------------------------------- +// Info for each serial device controlled + +typedef struct mn10300_serial_info { + CYG_ADDRWORD base; + CYG_ADDRWORD timer_base; + CYG_WORD rx_int; + CYG_WORD tx_int; + cyg_bool is_serial2; + cyg_interrupt rx_interrupt; + cyg_interrupt tx_interrupt; + cyg_handle_t rx_interrupt_handle; + cyg_handle_t tx_interrupt_handle; +} mn10300_serial_info; + +//------------------------------------------------------------------------- +// Callback functions exported by this driver + +static SERIAL_FUNS(mn10300_serial_funs, + mn10300_serial_putc, + mn10300_serial_getc, + mn10300_serial_set_config, + mn10300_serial_start_xmit, + mn10300_serial_stop_xmit + ); + +//------------------------------------------------------------------------- +// Hardware info for each serial line + +#ifndef CYG_HAL_MN10300_STDEVAL1 +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL0 +static mn10300_serial_info mn10300_serial_info0 = { + 0x34000800, + 0x34001000, + CYGNUM_HAL_INTERRUPT_SERIAL_0_RX, + CYGNUM_HAL_INTERRUPT_SERIAL_0_TX, + false +}; +#if CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE > 0 +static unsigned char mn10300_serial_out_buf0[CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE]; +static unsigned char mn10300_serial_in_buf0[CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE]; +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL0 +#endif + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL1 +static mn10300_serial_info mn10300_serial_info1 = { + 0x34000810, + 0x34001001, + CYGNUM_HAL_INTERRUPT_SERIAL_1_RX, + CYGNUM_HAL_INTERRUPT_SERIAL_1_TX, + false +}; +#if CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE > 0 +static unsigned char mn10300_serial_out_buf1[CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE]; +static unsigned char mn10300_serial_in_buf1[CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE]; +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL1 + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL2 +static mn10300_serial_info mn10300_serial_info2 = { + 0x34000820, + 0x34001002, + CYGNUM_HAL_INTERRUPT_SERIAL_2_RX, + CYGNUM_HAL_INTERRUPT_SERIAL_2_TX, + true +}; +#if CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE > 0 +static unsigned char mn10300_serial_out_buf2[CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE]; +static unsigned char mn10300_serial_in_buf2[CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE]; +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL2 + + +//------------------------------------------------------------------------- +// Channel descriptions: + +#ifdef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE +#define SIZEOF_BUF(_x_) 0 +#else +#define SIZEOF_BUF(_x_) sizeof(_x_) +#endif + +#ifndef CYG_HAL_MN10300_STDEVAL1 +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL0 +#if CYGNUM_IO_SERIAL_MN10300_SERIAL0_BUFSIZE > 0 +static SERIAL_CHANNEL_USING_INTERRUPTS(mn10300_serial_channel0, + mn10300_serial_funs, + mn10300_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &mn10300_serial_out_buf0[0], + SIZEOF_BUF(mn10300_serial_out_buf0), + &mn10300_serial_in_buf0[0], + SIZEOF_BUF(mn10300_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(mn10300_serial_channel0, + mn10300_serial_funs, + mn10300_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL0 +#endif + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL1 +#if CYGNUM_IO_SERIAL_MN10300_SERIAL1_BUFSIZE > 0 +static SERIAL_CHANNEL_USING_INTERRUPTS(mn10300_serial_channel1, + mn10300_serial_funs, + mn10300_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &mn10300_serial_out_buf1[0], + SIZEOF_BUF(mn10300_serial_out_buf1), + &mn10300_serial_in_buf1[0], + SIZEOF_BUF(mn10300_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(mn10300_serial_channel1, + mn10300_serial_funs, + mn10300_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL1 + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL2 +#if CYGNUM_IO_SERIAL_MN10300_SERIAL2_BUFSIZE > 0 +static SERIAL_CHANNEL_USING_INTERRUPTS(mn10300_serial_channel2, + mn10300_serial_funs, + mn10300_serial_info2, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &mn10300_serial_out_buf2[0], + SIZEOF_BUF(mn10300_serial_out_buf2), + &mn10300_serial_in_buf2[0], + SIZEOF_BUF(mn10300_serial_in_buf2) + ); +#else +static SERIAL_CHANNEL(mn10300_serial_channel2, + mn10300_serial_funs, + mn10300_serial_info2, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MN10300_SERIAL2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL2 + +//------------------------------------------------------------------------- +// And finally, the device table entries: + +#ifndef CYG_HAL_MN10300_STDEVAL1 +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL0 +// On the standard eval board serial0 is not connected. If enabled, it +// generates continuous frame error and overrun interrupts. Hence we do +// not touch it. +DEVTAB_ENTRY(mn10300_serial_io0, + CYGDAT_IO_SERIAL_MN10300_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + mn10300_serial_init, + mn10300_serial_lookup, // Serial driver may need initializing + &mn10300_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL0 +#endif + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL1 +DEVTAB_ENTRY(mn10300_serial_io1, + CYGDAT_IO_SERIAL_MN10300_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + mn10300_serial_init, + mn10300_serial_lookup, // Serial driver may need initializing + &mn10300_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL1 + +#ifdef CYGPKG_IO_SERIAL_MN10300_SERIAL2 +DEVTAB_ENTRY(mn10300_serial_io2, + CYGDAT_IO_SERIAL_MN10300_SERIAL2_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + mn10300_serial_init, + mn10300_serial_lookup, // Serial driver may need initializing + &mn10300_serial_channel2 + ); +#endif // CYGPKG_IO_SERIAL_MN10300_SERIAL2 + +//------------------------------------------------------------------------- +// Read the serial line's status register. Serial 2 has an 8 bit status +// register while serials 0 and 1 have 16 bit registers. This function +// uses the correct size access, but passes back a 16 bit quantity for +// both. + +static cyg_uint16 mn10300_read_sr( mn10300_serial_info *mn10300_chan ) +{ + cyg_uint16 sr = 0; + if( mn10300_chan->is_serial2 ) + { + cyg_uint8 sr8; + HAL_READ_UINT8(mn10300_chan->base+SERIAL_STR, sr8); + sr = sr8; + } + else + { + HAL_READ_UINT16(mn10300_chan->base+SERIAL_STR, sr); + } + + return sr; +} + +//------------------------------------------------------------------------- + +static bool +mn10300_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint16 cr = 0; + +#if defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) + // If we are using CYGMON, do not reinitialize serial 2 at this + // point, since it appears to upset GDB. + if( mn10300_chan->is_serial2 ) return true; +#endif + + // Disable device entirely. + HAL_WRITE_UINT16(mn10300_chan->base+SERIAL_CTR, 0); + HAL_WRITE_UINT8(mn10300_chan->base+SERIAL_ICR, 0); + + // Set up baud rate + if( mn10300_chan->is_serial2 ) + { + // Serial 2 is a bit different from 0 and 1 in the way that the + // baud rate is controlled. + + cyg_uint8 baud_divisor = select_baud_2[new_config->baud].timer2_val; + + if (baud_divisor == 0) + return false; // Invalid baud rate selected + + HAL_WRITE_UINT8(mn10300_chan->timer_base+TIMER_BR, baud_divisor); + + HAL_WRITE_UINT8(mn10300_chan->timer_base+TIMER_MD, 0x80 ); + + baud_divisor = select_baud_2[new_config->baud].serial2_val; + + HAL_WRITE_UINT8(mn10300_chan->base+SERIAL_TIM, baud_divisor); + + cr |= 0x0001; // Source clock from timer 2 + } + else + { + cyg_uint8 baud_divisor = select_baud_01[new_config->baud]; + + if (baud_divisor == 0) + return false; // Invalid baud rate selected + + HAL_WRITE_UINT8(mn10300_chan->timer_base+TIMER_BR, baud_divisor); + + HAL_WRITE_UINT8(mn10300_chan->timer_base+TIMER_MD, 0x80 ); + + cr |= 0x0004; // Source clock from timer 0 or 1 + } + + HAL_WRITE_UINT8( PORT3_MD, 0x01 ); + + // set up other config values: + + cr |= select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5]; + cr |= select_stop_bits[new_config->stop]; + cr |= select_parity[new_config->parity]; + +#ifdef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + // enable RX and TX + cr |= LCR_RXE | LCR_TXE; +#else + // Enable RX only + cr |= LCR_RXE; +#endif + + // Write CR into hardware + HAL_WRITE_UINT16(mn10300_chan->base+SERIAL_CTR, cr); + + mn10300_read_sr(mn10300_chan); + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +//------------------------------------------------------------------------- +// Function to initialize the device. Called at bootstrap time. + +bool mn10300_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + +#if defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) + // If we are using CYGMON, do not reinitialize serial 2. If we do then we + // will steal the receive interrupt and disable Ctrl-C handling. + if( mn10300_chan->is_serial2 ) return true; +#endif + + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + if (chan->out_cbuf.len != 0) { + // Install and enable the receive interrupt + cyg_drv_interrupt_create(mn10300_chan->rx_int, + 4, // Priority - what goes here? + (cyg_addrword_t)chan, // Data item passed to interrupt handler + mn10300_serial_rx_ISR, + mn10300_serial_rx_DSR, + &mn10300_chan->rx_interrupt_handle, + &mn10300_chan->rx_interrupt); + cyg_drv_interrupt_attach(mn10300_chan->rx_interrupt_handle); + cyg_drv_interrupt_unmask(mn10300_chan->rx_int); + + // Install and enable the transmit interrupt + cyg_drv_interrupt_create(mn10300_chan->tx_int, + 4, // Priority - what goes here? + (cyg_addrword_t)chan, // Data item passed to interrupt handler + mn10300_serial_tx_ISR, + mn10300_serial_tx_DSR, + &mn10300_chan->tx_interrupt_handle, + &mn10300_chan->tx_interrupt); + cyg_drv_interrupt_attach(mn10300_chan->tx_interrupt_handle); + cyg_drv_interrupt_mask(mn10300_chan->tx_int); + } +#endif + + mn10300_serial_config_port(chan, &chan->config, true); + + return true; +} + +//------------------------------------------------------------------------- +// This routine is called when the device is "looked" up (i.e. attached) + +static Cyg_ErrNo +mn10300_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +//------------------------------------------------------------------------- +// Return 'true' if character is sent to device + +bool +mn10300_serial_putc(serial_channel *chan, unsigned char c) +{ + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint8 sr = mn10300_read_sr( mn10300_chan); + + if( (sr & SR_TBF) == 0 ) + { + HAL_WRITE_UINT8( mn10300_chan->base+SERIAL_TXB, c ); + + return true; + } + else return false; +} + +//------------------------------------------------------------------------- + +unsigned char +mn10300_serial_getc(serial_channel *chan) +{ + unsigned char c; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + do + { + cyg_uint8 sr = mn10300_read_sr( mn10300_chan ); + + if( (sr & SR_RBF) != 0 ) + { + HAL_READ_UINT8( mn10300_chan->base+SERIAL_RXB, c ); + + break; + } + + } while(1); + + return c; +} + +//------------------------------------------------------------------------- + +bool +mn10300_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return mn10300_serial_config_port(chan, config, false); +} + +//------------------------------------------------------------------------- +// Enable the transmitter on the device + +static void +mn10300_serial_start_xmit(serial_channel *chan) +{ +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint16 cr; + + HAL_READ_UINT16( mn10300_chan->base+SERIAL_CTR, cr ); + + cr |= LCR_TXE; + + HAL_WRITE_UINT16( mn10300_chan->base+SERIAL_CTR, cr ); + + cyg_drv_interrupt_unmask(mn10300_chan->tx_int); + + (chan->callbacks->xmt_char)(chan); +#endif +} + +//------------------------------------------------------------------------- +// Disable the transmitter on the device + +static void +mn10300_serial_stop_xmit(serial_channel *chan) +{ +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint16 cr; + cyg_uint16 sr; + + // Wait until the transmitter has actually stopped before turning it off. + + do + { + sr = mn10300_read_sr( mn10300_chan ); + + } while( sr & SR_TXF ); + + HAL_READ_UINT16( mn10300_chan->base+SERIAL_CTR, cr ); + + cr &= ~LCR_TXE; + + HAL_WRITE_UINT16( mn10300_chan->base+SERIAL_CTR, cr ); + + cyg_drv_interrupt_mask(mn10300_chan->tx_int); + +#endif +} + +//------------------------------------------------------------------------- +// Serial I/O - low level interrupt handlers (ISR) + +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + +static cyg_uint32 +mn10300_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + + cyg_drv_interrupt_mask(mn10300_chan->rx_int); + cyg_drv_interrupt_acknowledge(mn10300_chan->rx_int); + + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + + +static cyg_uint32 +mn10300_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + + cyg_drv_interrupt_mask(mn10300_chan->tx_int); + cyg_drv_interrupt_acknowledge(mn10300_chan->tx_int); + + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +#endif + +//------------------------------------------------------------------------- +// Serial I/O - high level interrupt handler (DSR) + +#ifndef CYGPKG_IO_SERIAL_MN10300_POLLED_MODE + +static void +mn10300_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint8 sr = mn10300_read_sr( mn10300_chan); + + if( (sr & SR_RBF) != 0 ) + { + cyg_uint8 rxb; + HAL_READ_UINT8( mn10300_chan->base+SERIAL_RXB, rxb ); + + (chan->callbacks->rcv_char)(chan, rxb); + } + + cyg_drv_interrupt_unmask(mn10300_chan->rx_int); +} + +static void +mn10300_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mn10300_serial_info *mn10300_chan = (mn10300_serial_info *)chan->dev_priv; + cyg_uint8 sr = mn10300_read_sr( mn10300_chan); + + if( (sr & SR_TBF) == 0 ) + { + (chan->callbacks->xmt_char)(chan); + } + + cyg_drv_interrupt_unmask(mn10300_chan->tx_int); +} + +#endif + +#endif // CYGPKG_IO_SERIAL_MN10300 + +//------------------------------------------------------------------------- +// EOF mn10300.c diff --git a/packages/io/serial/current/src/powerpc/cogent_serial.h b/packages/io/serial/current/src/powerpc/cogent_serial.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/powerpc/cogent_serial.h @@ -0,0 +1,202 @@ +//========================================================================== +// +// io/serial/powerpc/cogent_serial.h +// +// PowerPC Cogent Serial I/O definitions. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov, based on ARM driver by gthomas +// Contributors:gthomas, jskov +// Date: 1999-03-02 +// Purpose: Cogent Serial definitions +//####DESCRIPTIONEND#### +//========================================================================== + +// Description of serial ports on Cogent board + +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_Tx 0x02 + +// FIFO control register +#define FCR_ENABLE 0x01 +#define FCR_CLEAR_RCVR 0x02 +#define FCR_CLEAR_XMIT 0x04 + + +//////////////////////////////////////////////////////////// +// Clean this up. + +//----------------------------------------------------------------------------- +// There are two serial ports. +#define CMA_SER_16550_BASE_A 0xe900047 // port A +#define CMA_SER_16550_BASE_B 0xe900007 // port B +#define SER_16550_BASE CMA_SER_16550_BASE_B + +//----------------------------------------------------------------------------- +// Define the serial registers. The Cogent board is equipped with a 16552 +// serial chip. +#define SER_16550_RBR 0x00 // receiver buffer register, read, dlab = 0 +#define SER_16550_THR 0x00 // transmitter holding register, write, dlab = 0 +#define SER_16550_DLL 0x00 // divisor latch (LS), read/write, dlab = 1 +#define SER_16550_IER 0x08 // interrupt enable register, read/write, dlab = 0 +#define SER_16550_DLM 0x08 // divisor latch (MS), read/write, dlab = 1 +#define SER_16550_IIR 0x10 // interrupt identification reg, read, dlab = 0 +#define SER_16550_FCR 0x10 // fifo control register, write, dlab = 0 +#define SER_16550_AFR 0x10 // alternate function reg, read/write, dlab = 1 +#define SER_16550_LCR 0x18 // line control register, read/write +#define SER_16550_MCR 0x20 // modem control register, read/write +#define SER_16550_LSR 0x28 // line status register, read +#define SER_16550_MSR 0x30 // modem status register, read +#define SER_16550_SCR 0x38 // scratch pad register + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// The FIFO control register +#define SIO_FCR_FCR0 0x01 // enable xmit and rcvr fifos +#define SIO_FCR_FCR1 0x02 // clear RCVR FIFO +#define SIO_FCR_FCR2 0x04 // clear XMIT FIFO +///////////////////////////////////////// + + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +// FIXME: calc all properly +// The Cogent board has a 3.6864 MHz crystal +static unsigned short select_baud[] = { + 0, // Unused + 4608, // 50 + 0, // 75 + 2094, // 110 + 0, // 134.5 + 1536, // 150 + 0, // 200 + 768, // 300 + 384, // 600 + 182, // 1200 + 0, // 1800 + 96, // 2400 + 0, // 3600 + 48, // 4800 + 32, // 7200 + 24, // 9600 + 16, // 14400 + 12, // 19200 + 6, // 38400 + 4, // 57600 + 2, // 115200 + 0, // 230400 +}; + diff --git a/packages/io/serial/current/src/powerpc/cogent_serial_with_ints.c b/packages/io/serial/current/src/powerpc/cogent_serial_with_ints.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/powerpc/cogent_serial_with_ints.c @@ -0,0 +1,386 @@ +//========================================================================== +// +// io/serial/powerpc/cogent_serial_with_ints.c +// +// PowerPC Cogent Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov, based on ARM driver by gthomas +// Contributors:gthomas, jskov +// Date: 1999-03-02 +// Purpose: Cogent Serial I/O module (interrupt driven version) +// Description: +// +// To Do: +// Put in magic to effectively use the FIFOs. Transmitter FIFO fill is a +// problem, and setting receiver FIFO interrupts to happen only after +// n chars may conflict with hal diag. +// +//####DESCRIPTIONEND#### +//========================================================================== + +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT + +#include "cogent_serial.h" + +// Make sure the configuration is sane. +#if defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A) && \ + defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B) && \ + !defined(CYGIMP_KERNEL_INTERRUPTS_CHAIN) +#error "Need CYGIMP_KERNEL_INTERRUPTS_CHAIN to support both ports" +#endif + + +#define BUFSIZE 128 + +typedef struct cogent_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; +} cogent_serial_info; + +static bool cogent_serial_init(struct cyg_devtab_entry *tab); +static bool cogent_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo cogent_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char cogent_serial_getc(serial_channel *chan); +static bool cogent_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void cogent_serial_start_xmit(serial_channel *chan); +static void cogent_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 cogent_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void cogent_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(cogent_serial_funs, + cogent_serial_putc, + cogent_serial_getc, + cogent_serial_set_config, + cogent_serial_start_xmit, + cogent_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A +static cogent_serial_info cogent_serial_info0 ={CMA_SER_16550_BASE_A, + CYGNUM_HAL_INTERRUPT_SIU_IRQ1}; +#if CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE > 0 +static unsigned char cogent_serial_out_buf0[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE]; +static unsigned char cogent_serial_in_buf0[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(cogent_serial_channel0, + cogent_serial_funs, + cogent_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &cogent_serial_out_buf0[0], + sizeof(cogent_serial_out_buf0), + &cogent_serial_in_buf0[0], + sizeof(cogent_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(cogent_serial_channel0, + cogent_serial_funs, + cogent_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(cogent_serial_io0, + CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_A_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + cogent_serial_init, + cogent_serial_lookup, // Serial driver may need initializing + &cogent_serial_channel0 + ); +#endif + +#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B +static cogent_serial_info cogent_serial_info1 ={CMA_SER_16550_BASE_B, + CYGNUM_HAL_INTERRUPT_SIU_IRQ1}; +#if CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE > 0 +static unsigned char cogent_serial_out_buf1[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE]; +static unsigned char cogent_serial_in_buf1[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(cogent_serial_channel1, + cogent_serial_funs, + cogent_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &cogent_serial_out_buf1[0], + sizeof(cogent_serial_out_buf1), + &cogent_serial_in_buf1[0], + sizeof(cogent_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(cogent_serial_channel1, + cogent_serial_funs, + cogent_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(cogent_serial_io1, + CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_B_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + cogent_serial_init, + cogent_serial_lookup, // Serial driver may need initializing + &cogent_serial_channel1 + ); +#endif + + + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +cogent_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint16 baud_divisor = select_baud[new_config->baud]; + cyg_uint8 _lcr, _ier; + + if (baud_divisor == 0) + return false; // Invalid baud rate selected + + // Disable port interrupts while changing hardware + HAL_READ_UINT8(port+SER_16550_IER, _ier); + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + + // Set databits, stopbits and parity. + _lcr = select_word_length[(new_config->word_length - + CYGNUM_SERIAL_WORD_LENGTH_5)] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + // Set baud rate. + _lcr |= LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + HAL_WRITE_UINT8(port+SER_16550_DLM, baud_divisor >> 8); + HAL_WRITE_UINT8(port+SER_16550_DLL, baud_divisor & 0xff); + _lcr &= ~LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + if (init) { + // Enable and clear FIFO + HAL_WRITE_UINT8(port+SER_16550_FCR, + (FCR_ENABLE | FCR_CLEAR_RCVR | FCR_CLEAR_XMIT)); + + if (chan->out_cbuf.len != 0) { + HAL_WRITE_UINT8(port+SER_16550_IER, SIO_IER_ERDAI); + } else { + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + } + + { + // Special initialization for ST16C552 on CMA102 + cyg_uint8 mcr; + + HAL_READ_UINT8(CMA_SER_16550_BASE_A+SER_16550_MCR, mcr); + mcr |= 8; + HAL_WRITE_UINT8(CMA_SER_16550_BASE_A+SER_16550_MCR, mcr); + + HAL_READ_UINT8(CMA_SER_16550_BASE_B+SER_16550_MCR, mcr); + mcr |= 8; + HAL_WRITE_UINT8(CMA_SER_16550_BASE_B+SER_16550_MCR, mcr); + } + } else { + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); + } + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +cogent_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("COGENT SERIAL init - dev: %x.%d\n", cogent_chan->base, cogent_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(cogent_chan->int_num, + 0, // can change IRQ0 priority + (cyg_addrword_t)chan, // Data item passed to interrupt handler + cogent_serial_ISR, + cogent_serial_DSR, + &cogent_chan->serial_interrupt_handle, + &cogent_chan->serial_interrupt); + cyg_drv_interrupt_attach(cogent_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(cogent_chan->int_num); + } + cogent_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +cogent_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +cogent_serial_putc(serial_channel *chan, unsigned char c) +{ + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint8 _lsr; + + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + if (_lsr & SIO_LSR_THRE) { +// Transmit buffer is empty + HAL_WRITE_UINT8(port+SER_16550_THR, c); + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +cogent_serial_getc(serial_channel *chan) +{ + unsigned char c; + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint8 _lsr; + + do { + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + } while ((_lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8(port+SER_16550_RBR, c); + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +cogent_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return cogent_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +cogent_serial_start_xmit(serial_channel *chan) +{ + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint8 _ier; + + HAL_READ_UINT8(port+SER_16550_IER, _ier); + _ier |= IER_XMT; // Enable xmit interrupt + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); + + (chan->callbacks->xmt_char)(chan); +} + +// Disable the transmitter on the device +static void +cogent_serial_stop_xmit(serial_channel *chan) +{ + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint8 _ier; + + HAL_READ_UINT8(port+SER_16550_IER, _ier); + _ier &= ~IER_XMT; // Disable xmit interrupt + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +cogent_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(cogent_chan->int_num); + cyg_drv_interrupt_acknowledge(cogent_chan->int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +cogent_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv; + cyg_addrword_t port = cogent_chan->base; + cyg_uint8 _iir; + + HAL_READ_UINT8(port+SER_16550_IIR, _iir); + if ((_iir & SIO_IIR_ID_MASK) == ISR_Tx) { + (chan->callbacks->xmt_char)(chan); + } else { + // Assume receive interrupt + cyg_uint8 _c; + HAL_READ_UINT8(port+SER_16550_RBR, _c); + (chan->callbacks->rcv_char)(chan, _c); + } + cyg_drv_interrupt_unmask(cogent_chan->int_num); +} +#endif diff --git a/packages/io/serial/current/src/sparclite/sleb_sdtr.c b/packages/io/serial/current/src/sparclite/sleb_sdtr.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/sparclite/sleb_sdtr.c @@ -0,0 +1,371 @@ +//========================================================================== +// +// io/serial/sparclite/sleb_sdtr.c +// +// Serial I/O interface module for SPARClite Eval Board (SLEB) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: SLEB serial I/O module +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB + +#include "sleb_sdtr.h" + +extern void diag_printf(const char *fmt, ...); + +#define BUFSIZE 128 + +typedef struct sleb_sdtr_info { + CYG_ADDRWORD base; + CYG_WORD tx_int_num; + CYG_WORD rx_int_num; + cyg_interrupt tx_serial_interrupt; + cyg_handle_t tx_serial_interrupt_handle; + cyg_interrupt rx_serial_interrupt; + cyg_handle_t rx_serial_interrupt_handle; + cyg_uint8 cmd_reg; + bool xmit_enabled; +} sleb_sdtr_info; + +static bool sleb_sdtr_init(struct cyg_devtab_entry *tab); +static bool sleb_sdtr_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo sleb_sdtr_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char sleb_sdtr_getc(serial_channel *chan); +static bool sleb_sdtr_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void sleb_sdtr_start_xmit(serial_channel *chan); +static void sleb_sdtr_stop_xmit(serial_channel *chan); + +static cyg_uint32 sleb_sdtr_tx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void sleb_sdtr_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +static cyg_uint32 sleb_sdtr_rx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void sleb_sdtr_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(sleb_sdtr_funs, + sleb_sdtr_putc, + sleb_sdtr_getc, + sleb_sdtr_set_config, + sleb_sdtr_start_xmit, + sleb_sdtr_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 +static sleb_sdtr_info sleb_sdtr_info0 = {SLEB_SDTR0_BASE, SLEB_SDTR0_TX_INT, SLEB_SDTR0_RX_INT}; +#if CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE > 0 +static unsigned char sleb_sdtr_out_buf0[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE]; +static unsigned char sleb_sdtr_in_buf0[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(sleb_sdtr_channel0, + sleb_sdtr_funs, + sleb_sdtr_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &sleb_sdtr_out_buf0[0], sizeof(sleb_sdtr_out_buf0), + &sleb_sdtr_in_buf0[0], sizeof(sleb_sdtr_in_buf0) + ); +#else +static SERIAL_CHANNEL(sleb_sdtr_channel0, + sleb_sdtr_funs, + sleb_sdtr_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(sleb_sdtr_io0, + CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + sleb_sdtr_init, + sleb_sdtr_lookup, // Serial driver may need initializing + &sleb_sdtr_channel0 + ); +#endif // CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 + +#ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 +static sleb_sdtr_info sleb_sdtr_info1 = {SLEB_SDTR1_BASE, SLEB_SDTR1_TX_INT, SLEB_SDTR1_RX_INT}; +#if CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE > 0 +static unsigned char sleb_sdtr_out_buf1[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE]; +static unsigned char sleb_sdtr_in_buf1[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(sleb_sdtr_channel1, + sleb_sdtr_funs, + sleb_sdtr_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &sleb_sdtr_out_buf1[0], sizeof(sleb_sdtr_out_buf1), + &sleb_sdtr_in_buf1[0], sizeof(sleb_sdtr_in_buf1) + ); +#else +static SERIAL_CHANNEL(sleb_sdtr_channel1, + sleb_sdtr_funs, + sleb_sdtr_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(sleb_sdtr_io1, + CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON2_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + sleb_sdtr_init, + sleb_sdtr_lookup, // Serial driver may need initializing + &sleb_sdtr_channel1 + ); +#endif // CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +sleb_sdtr_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + CYG_ADDRWORD port = sdtr_chan->base; + cyg_int32 baud_divisor; + cyg_int32 clk, tval; + unsigned char mode; +#if 0 + if ((new_config->baud < CYGNUM_SERIAL_BAUD_MIN) || (new_config->baud > CYGNUM_SERIAL_BAUD_MAX)) + return false; // Invalid baud rate +#endif + baud_divisor = select_baud[new_config->baud]; + if (baud_divisor == 0) + return false; // Unsupported baud rate + // Reset the port + HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), SDTR_CMD_RST); + // Write the mode + mode = SDTR_MODE_MODE_ASYNC16 | + select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), mode); + // Set baud rate clock. + // ***** CAUTION! Both ports use the same time, thus they must both run at the same baud rate! + clk = *SLEB_CLOCK_SWITCH; // Compute board speed + if (clk & 0x80) clk = 10; + clk = (clk & 0x3F) * 1000000; // in MHz + tval = (clk / (baud_divisor * 32)) - 1; + HAL_SPARC_86940_WRITE(SLEB_TIMER3_RELOAD, tval); + // Set up control register + sdtr_chan->cmd_reg = SDTR_CMD_RTS | SDTR_CMD_DTR | SDTR_CMD_TxEN; +#ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1 + // Cygmon needs the receiver + if ((chan->out_cbuf.len != 0) || (chan == &sleb_sdtr_channel0)) { +#else + if (chan->out_cbuf.len != 0) { +#endif + sdtr_chan->cmd_reg |= SDTR_CMD_RxEN; + } + if (init) { + sdtr_chan->xmit_enabled = false; + } + HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), sdtr_chan->cmd_reg); + if (new_config != &chan->config) + chan->config = *new_config; + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +sleb_sdtr_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("SLEB SERIAL init - dev: %x.%d.%d\n", sdtr_chan->base, sdtr_chan->tx_int_num, sdtr_chan->rx_int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(sdtr_chan->tx_int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + sleb_sdtr_tx_ISR, + sleb_sdtr_tx_DSR, + &sdtr_chan->tx_serial_interrupt_handle, + &sdtr_chan->tx_serial_interrupt); + cyg_drv_interrupt_attach(sdtr_chan->tx_serial_interrupt_handle); + cyg_drv_interrupt_mask(sdtr_chan->tx_int_num); + cyg_drv_interrupt_create(sdtr_chan->rx_int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + sleb_sdtr_rx_ISR, + sleb_sdtr_rx_DSR, + &sdtr_chan->rx_serial_interrupt_handle, + &sdtr_chan->rx_serial_interrupt); + cyg_drv_interrupt_attach(sdtr_chan->rx_serial_interrupt_handle); + cyg_drv_interrupt_unmask(sdtr_chan->rx_int_num); + } + sleb_sdtr_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +sleb_sdtr_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +sleb_sdtr_putc(serial_channel *chan, unsigned char c) +{ + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + CYG_ADDRWORD port = sdtr_chan->base; + cyg_uint8 status; + HAL_SPARC_86940_READ(SDTR_STATUS(port), status); + if (status & SDTR_STAT_TxRDY) { +// Transmit buffer is empty + HAL_SPARC_86940_WRITE(SDTR_TXDATA(port), c); + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +sleb_sdtr_getc(serial_channel *chan) +{ + unsigned char c; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + CYG_ADDRWORD port = sdtr_chan->base; + cyg_uint8 status; + HAL_SPARC_86940_READ(SDTR_STATUS(port), status); + while ((status & SDTR_STAT_RxRDY) == 0) + HAL_SPARC_86940_READ(SDTR_STATUS(port), status); // Wait for char + HAL_SPARC_86940_READ(SDTR_RXDATA(port), c); + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +sleb_sdtr_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return sleb_sdtr_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +sleb_sdtr_start_xmit(serial_channel *chan) +{ + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + sdtr_chan->xmit_enabled = true; + cyg_drv_interrupt_unmask(sdtr_chan->tx_int_num); +} + +// Disable the transmitter on the device +static void +sleb_sdtr_stop_xmit(serial_channel *chan) +{ + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + cyg_drv_interrupt_mask(sdtr_chan->tx_int_num); + sdtr_chan->xmit_enabled = false; +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +sleb_sdtr_tx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + cyg_drv_interrupt_mask(sdtr_chan->tx_int_num); + cyg_drv_interrupt_acknowledge(sdtr_chan->tx_int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +sleb_sdtr_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + (chan->callbacks->xmt_char)(chan); + if (sdtr_chan->xmit_enabled) + cyg_drv_interrupt_unmask(sdtr_chan->tx_int_num); +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +sleb_sdtr_rx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + cyg_drv_interrupt_mask(sdtr_chan->rx_int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +sleb_sdtr_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv; + CYG_ADDRWORD port = sdtr_chan->base; + cyg_uint8 status, c; + HAL_SPARC_86940_READ(SDTR_STATUS(port), status); + HAL_SPARC_86940_READ(SDTR_RXDATA(port), c); + (chan->callbacks->rcv_char)(chan, c); + cyg_drv_interrupt_acknowledge(sdtr_chan->rx_int_num); + cyg_drv_interrupt_unmask(sdtr_chan->rx_int_num); +} + +#endif // CYGPKG_IO_SERIAL_SPARCLITE_SLEB diff --git a/packages/io/serial/current/src/sparclite/sleb_sdtr.h b/packages/io/serial/current/src/sparclite/sleb_sdtr.h new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/sparclite/sleb_sdtr.h @@ -0,0 +1,156 @@ +#ifndef CYGONCE_SLEB_SDTR_H +#define CYGONCE_SLEB_SDTR_H +//========================================================================== +// +// io/serial/sparclite/sleb_sdtr.c +// +// Serial I/O interface module for SPARClite Eval Board (SLEB) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: SLEB serial I/O module +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include // For I/O macros + +#define reg(n) ((n)*4) + +// SDTR Registers +#define SDTR_TXDATA(base) base+reg(0) +#define SDTR_RXDATA(base) base+reg(0) +#define SDTR_STATUS(base) base+reg(1) +#define SDTR_CONTROL(base) base+reg(1) + +// Mode register +#define SDTR_MODE_MODE_MASK 0x03 // Mode selection bits (mask) +#define SDTR_MODE_MODE_SYNC 0x00 // Synchronous mode +#define SDTR_MODE_MODE_ASYNC1 0x01 // Async - clock/1 +#define SDTR_MODE_MODE_ASYNC16 0x02 // Async - clock/16 +#define SDTR_MODE_MODE_ASYNC64 0x03 // Async - clock/64 +#define SDTR_MODE_DTB_MASK 0x0C // Number of data bits (mask) +#define SDTR_MODE_DTB_5 0x00 // 5 bits / char +#define SDTR_MODE_DTB_6 0x04 // 6 bits / char +#define SDTR_MODE_DTB_7 0x08 // 7 bits / char +#define SDTR_MODE_DTB_8 0x0C // 8 bits / char +#define SDTR_MODE_PARITY_MASK 0x30 // Parity modes (mask) +#define SDTR_MODE_PARITY_ENABLE 0x10 // Enable parity +#define SDTR_MODE_PARITY_NONE 0x00 // No parity (parity disabled) +#define SDTR_MODE_PARITY_ODD 0x00 // Odd parity +#define SDTR_MODE_PARITY_EVEN 0x20 // Even parity +#define SDTR_MODE_STOP_BITS_MASK 0xC0 // Number of stop bits (mask) +#define SDTR_MODE_STOP_BITS_1 0x40 // 1 stop bit +#define SDTR_MODE_STOP_BITS_1_5 0x80 // 1.5 stop bits +#define SDTR_MODE_STOP_BITS_2 0xC0 // 2 stop bits + +// Command register +#define SDTR_CMD_TxEN 0x01 // Enable transmitter +#define SDTR_CMD_DTR 0x02 // Assert DTR +#define SDTR_CMD_RxEN 0x04 // Enable receiver +#define SDTR_CMD_BREAK 0x08 // Send break +#define SDTR_CMD_EFR 0x10 // Error flag reset +#define SDTR_CMD_RTS 0x20 // Assert RTS +#define SDTR_CMD_RST 0x40 // Internal RESET +#define SDTR_CMD_EHM 0x80 // Enable Hunt mode + +// Status register +#define SDTR_STAT_TxRDY 0x01 // Transmitter ready +#define SDTR_STAT_RxRDY 0x02 // Receiver ready +#define SDTR_STAT_TxEMP 0x04 // Transmitter empty +#define SDTR_STAT_PERR 0x08 // Parity error +#define SDTR_STAT_OERR 0x10 // Overrun error +#define SDTR_STAT_FERR 0x20 // Framing error +#define SDTR_STAT_SYBRK 0x40 // Break +#define SDTR_STAT_DSR 0x80 // State of DSR signal + +// Offsets to standard SDTR elements +#define SLEB_SDTR0_BASE (8*4) +#define SLEB_SDTR0_TX_INT 9 +#define SLEB_SDTR0_RX_INT 10 +#define SLEB_SDTR1_BASE (12*4) +#define SLEB_SDTR1_TX_INT 6 +#define SLEB_SDTR1_RX_INT 7 +#define SLEB_TIMER3_CONTROL reg(29) +#define SLEB_TIMER3_RELOAD reg(30) + +// On-board switch, used to determine baud rate +#define SLEB_CLOCK_SWITCH (volatile unsigned char *)0x01000003 + +static unsigned char select_word_length[] = { + SDTR_MODE_DTB_5, // 5 bits / word (char) + SDTR_MODE_DTB_6, + SDTR_MODE_DTB_7, + SDTR_MODE_DTB_8 +}; + +static unsigned char select_stop_bits[] = { + 0, + SDTR_MODE_STOP_BITS_1, // 1 stop bit + SDTR_MODE_STOP_BITS_1_5, // 1.5 stop bit + SDTR_MODE_STOP_BITS_2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + SDTR_MODE_PARITY_NONE, // No parity + SDTR_MODE_PARITY_ENABLE|SDTR_MODE_PARITY_EVEN, // Even parity + SDTR_MODE_PARITY_ENABLE|SDTR_MODE_PARITY_ODD, // ODD parity + 0xFF, // Mark parity + 0xFF, // Space parity +}; + +static cyg_int32 select_baud[] = { + 0, // Unused + 50, // 50 + 75, // 75 + 110, // 110 + 0, // 134.5 + 150, // 150 + 200, // 200 + 300, // 300 + 600, // 600 + 1200, // 1200 + 1800, // 1800 + 2400, // 2400 + 3600, // 3600 + 4800, // 4800 + 7200, // 7200 + 9600, // 9600 + 14400, // 14400 + 19200, // 19200 + 38400, // 38400 + 57600, // 57600 + 115200, // 115200 + 230400, // 230400 +}; + +#endif // CYGONCE_SLEB_SDTR_H + diff --git a/packages/io/serial/current/tests/PKGconf.mak b/packages/io/serial/current/tests/PKGconf.mak new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/PKGconf.mak @@ -0,0 +1,43 @@ +#============================================================================== +# +# makefile +# +# devs/common/tests +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := io_serial +include ../../../../pkgconf/pkgconf.mak +include ../../../../pkgconf/system.mak + +TESTS := +ifndef CYGPKG_HAL_I386_LINUX +TESTS += serial1 serial2 serial3 serial4 serial5 tty1 tty2 +endif + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + + diff --git a/packages/io/serial/current/tests/ser_test_protocol.inl b/packages/io/serial/current/tests/ser_test_protocol.inl new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/ser_test_protocol.inl @@ -0,0 +1,826 @@ +//========================================================================== +// +// ser_test_protocol.c +// +// Serial device driver testing protocol +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Protocol implementation used to test eCos serial devices. +// Relies on ser_filter to be present on the host side to +// respond to test requests. +// +// To Do: +// o Clean up. +// o Clean up config change magic. +// o Figure out how to handle kernel dependency +// : without kernel, no timeout. Without timeout, no filter auto detection. +// +//####DESCRIPTIONEND#### + +#include +#include +#include + +#include +#include +#include +#include + +#include // for reclaiming interrup vector + +//---------------------------------------------------------------------------- +// Definition of which device to run tests on on various platforms. +#if defined(CYGPKG_HAL_POWERPC_COGENT) \ + && defined(CYGPKG_IO_SERIAL_POWERPC_COGENT) \ + && defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B) +# define TEST_SER_DEV CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_B_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY2) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY2_DEV +# endif +#endif +#if defined(CYGPKG_HAL_ARM_PID) \ + && defined(CYGPKG_IO_SERIAL_ARM_PID) \ + && defined(CYGPKG_IO_SERIAL_ARM_PID_SERIAL0) +# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_PID_SERIAL0_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY0) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV +# endif +#endif +#if defined(CYGPKG_HAL_ARM_AEB) \ + && defined(CYGPKG_IO_SERIAL_ARM_AEB) \ + && defined(CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1) +# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_AEB_SERIAL1_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY1) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV +# endif +#endif +#if defined(CYGPKG_HAL_TX39_JMR3904) \ + && defined(CYGPKG_IO_SERIAL_TX39_JMR3904) \ + && defined(CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0) +# define TEST_SER_DEV CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL0_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY1) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV +# endif +#endif +#if defined(CYGPKG_HAL_MN10300_STDEVAL1) \ + && defined(CYGPKG_IO_SERIAL_MN10300) \ + && defined(CYGPKG_IO_SERIAL_MN10300_SERIAL1) +// Note: Serial1 is *not* the same port as GDB is using. It seems that +// CygMon is interfering with the tests if run on the same port. +// This configuration allows the serial driver to be tested using the +// filter in stand alone mode (option -n). +# define TEST_SER_DEV CYGDAT_IO_SERIAL_MN10300_SERIAL1_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY1) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV +# endif +#endif +#if defined(CYGPKG_HAL_SPARCLITE_SLEB) \ + && defined(CYGPKG_IO_SERIAL_SPARCLITE_SLEB) \ + && defined(CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1) +# define TEST_SER_DEV CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON1_NAME +# define SER_OVERRIDE_INT_1 CYGNUM_HAL_INTERRUPT_9 +# define SER_OVERRIDE_INT_2 CYGNUM_HAL_INTERRUPT_10 +# if defined(CYGPKG_IO_SERIAL_TTY_TTY0) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV +# endif +#endif + + +// We can't rely on haldiag for ser_filter detection - it may not define +// a working character reading function. +#ifndef TEST_SER_DEV +# define SER_NOP_TEST +# define TTY_NOP_TEST +# define TEST_SER_DEV "/dev/null" +# define TEST_TTY_DEV "/dev/null" +#else +# ifndef TEST_TTY_DEV +# define TTY_NOP_TEST +# define TEST_TTY_DEV "/dev/null" +# endif +#endif + +//---------------------------------------------------------------------------- +// FIXME: The PPC sometimes sees a spurious byte. There is workaround code +// that can be enabled here. +#define HANDLE_SPURIOUS 1 + +//---------------------------------------------------------------------------- +// The data in buffer and the cmd buffer +#define IN_BUFFER_SIZE 1024 +cyg_uint8 in_buffer[IN_BUFFER_SIZE]; + +cyg_int8 cmd_buffer[128]; + +//---------------------------------------------------------------------------- +// Some types specific to the testing protocol. +typedef enum { + MODE_NO_ECHO = 0, + MODE_EOP_ECHO, + MODE_DUPLEX_ECHO +} cyg_mode_t; + +typedef enum { + TEST_RETURN_OK = ENOERR, + TEST_RETURN_NA +} cyg_test_return_t; + +typedef struct ser_cfg { + cyg_serial_baud_rate_t baud_rate; + cyg_serial_word_length_t data_bits; + cyg_serial_stop_bits_t stop_bits; + cyg_serial_parity_t parity; + // etc... +} cyg_ser_cfg_t; + +//---------------------------------------------------------------------------- +// A few predefined configurations. These must all be valid for any +// given target until change_config is behaving correctly. +cyg_ser_cfg_t test_configs[] = { +#if !defined(CYGPKG_HAL_TX39_JMR3904) && \ + !defined(CYGPKG_HAL_ARM_PID) && \ + !defined(CYGPKG_HAL_ARM_AEB) && \ + !defined(CYGPKG_HAL_MN10300_STDEVAL1) && \ + !defined(CYGPKG_HAL_SPARCLITE_SLEB) + { CYGNUM_SERIAL_BAUD_115200, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }, +#endif + +#if !defined(CYGPKG_HAL_TX39_JMR3904) && \ + !defined(CYGPKG_HAL_ARM_AEB) && \ + !defined(CYGPKG_HAL_SPARCLITE_SLEB) + { CYGNUM_SERIAL_BAUD_57600, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }, +#endif + + { CYGNUM_SERIAL_BAUD_38400, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }, + + { CYGNUM_SERIAL_BAUD_19200, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }, + +#if !defined(CYGPKG_HAL_TX39_JMR3904) && !defined(CYGPKG_HAL_ARM_PID) + { CYGNUM_SERIAL_BAUD_9600, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }, +#endif + +#if !defined(CYGPKG_HAL_TX39_JMR3904) && \ + !defined(CYGPKG_HAL_ARM_AEB) && \ + !defined(CYGPKG_HAL_ARM_PID) + // One stop bit, even parity + { CYGNUM_SERIAL_BAUD_19200, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_EVEN }, +#endif + +#if !defined(CYGPKG_HAL_TX39_JMR3904) && \ + !defined(CYGPKG_HAL_ARM_AEB) && \ + !defined(CYGPKG_HAL_ARM_PID) + // Two stop bits, even parity + { CYGNUM_SERIAL_BAUD_19200, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_2, CYGNUM_SERIAL_PARITY_EVEN }, +#endif + +#if !defined(CYGPKG_HAL_TX39_JMR3904) + // Two stop bits, no parity + { CYGNUM_SERIAL_BAUD_19200, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_2, CYGNUM_SERIAL_PARITY_NONE }, +#endif +}; + +//---------------------------------------------------------------------------- +// Macros to help extract values from the argument string. +// Note: This is probably not an ideal solution, but it was easy to make :) + +#define INIT_VALUE(__args) \ + unsigned int v; \ + char *__ptr1, *__ptr2 = (__args) + +#define SET_VALUE(__slot) \ +do { \ + __ptr1 = index(__ptr2, (int) ':'); \ + if (__ptr1) \ + *__ptr1 = 0; \ + v = atoi(__ptr2); \ + __ptr2 = __ptr1+1; \ + (__slot) = v; \ +} while (0) + + +//---------------------------------------------------------------------------- +// CRC magic - it's a bit of a hack for now. +// FIXME: standard definition? +#define ADD_CRC_BYTE(__crc, __c) \ + CYG_MACRO_START \ + (__crc) = ((__crc) << 1) ^ (__c); \ + CYG_MACRO_END + +// FIXME: Hack to allow easy ASCII transfer. +#define FIX_CRC(__crc, __icrc) \ + CYG_MACRO_START \ + __icrc = (int) (__crc); \ + if (__icrc < 0) \ + __icrc = -__icrc; \ + CYG_MACRO_END + +//---------------------------------------------------------------------------- +// Macros for read/write to serial with error cheking. +cyg_uint32 r_stamp; + +// This routine will be called if the read "times out" +static void +do_abort(void *handle) +{ + cyg_io_handle_t io_handle = (cyg_io_handle_t)handle; + cyg_int32 len = 1; // Need something here + cyg_io_get_config(io_handle, CYG_IO_GET_CONFIG_SERIAL_ABORT, 0, &len); +} +#include "timeout.inl" + +// Read with timeout (__t = timeout in ticks, int* __r = result) +#define Tcyg_io_read_timeout(__h, __d, __l, __t, __r) \ + CYG_MACRO_START \ + int __res; \ + r_stamp = timeout((__t), do_abort, (__h)); \ + __res = cyg_io_read((__h), (__d), (__l)); \ + CYG_TEST_CHECK((ENOERR == __res || -EINTR == __res),"cyg_io_read failed");\ + *(__r) = __res; \ + untimeout(r_stamp); \ + CYG_MACRO_END + +#define Tcyg_io_read(__h, __d, __l) \ + CYG_MACRO_START \ + int __res = cyg_io_read((__h), (__d), (__l)); \ + CYG_TEST_CHECK(ENOERR == __res, "cyg_io_read failed"); \ + CYG_MACRO_END + +#define Tcyg_io_write(__h, __d, __l) \ + CYG_MACRO_START \ + int __res; \ + cyg_uint32 __len = 1; \ + __res = cyg_io_write((__h), (__d), (__l)); \ + CYG_TEST_CHECK(ENOERR == __res, "cyg_io_write failed"); \ + __res = cyg_io_get_config((__h), \ + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN, \ + 0, &__len); \ + CYG_TEST_CHECK(ENOERR == __res, "DRAIN failed"); \ + CYG_MACRO_END + + +//---------------------------------------------------------------------------- +// Some libc like functions that are handy to have around. +static int +strlen(const char *c) +{ + int l = 0; + while (*c++) l++; + return l; +} + +static char* +strcpy(char* dest, const char* src) +{ + char c; + while ((c = *src++)) { + *dest++ = c; + } + *dest = c; + + return dest; +} + +static char* +itoa(char* dest, int v) +{ + char b[16]; + char* p = &b[16]; + + *--p = 0; + if (v) { + while (v){ + *--p = (v % 10) + '0'; + v = v / 10; + } + } else + *--p = '0'; + + return strcpy(dest, p); +} + +#define min(_a, _b) ((_a) < (_b)) ? (_a) : (_b) + +void +hang(void) +{ + while (1); +} + +//----------------------------------------------------------------------------- +// Configuration changing function. +// FIXME: This is still slightly bogus in that it doesn't check for target +// capabilities. Correct way is; +// o try setting new cfg +// o restore +// o if OK: +// o send cfg to target +// o if reply OK: +// o change to new cfg +// +// Host&protocol currently only supports: +// - no/even parity +int +change_config(cyg_io_handle_t handle, cyg_ser_cfg_t* cfg) +{ + const char cmd[] = "@CONFIG:"; + char reply[2]; + int msglen; + int res; + cyg_uint8 *p1; + + // Prepare and send the command. + p1 = &cmd_buffer[0]; + p1 = strcpy(p1, &cmd[0]); + p1 = itoa(p1, cfg->baud_rate); + *p1++ = ':'; + p1 = itoa(p1, cfg->data_bits); + *p1++ = ':'; + p1 = itoa(p1, cfg->stop_bits); + *p1++ = ':'; + p1 = itoa(p1, cfg->parity); + *p1++ = '!'; + *p1++ = 0; + + CYG_TEST_INFO(&cmd_buffer[1]); + + msglen = strlen(&cmd_buffer[0]); + Tcyg_io_write(handle, &cmd_buffer[0], &msglen); + + msglen = 2; + Tcyg_io_read(handle, &reply[0], &msglen); + + if (reply[0] == 'O') { + // Change config + cyg_serial_info_t serial_info; + int len = sizeof(serial_info); + res = cyg_io_get_config(handle, CYG_IO_GET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't get serial config - DEVIO error: %d\n", res); + hang(); + } + + serial_info.baud = cfg->baud_rate; + serial_info.word_length = cfg->data_bits; + serial_info.stop = cfg->stop_bits; + serial_info.parity = cfg->parity; + + res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, &serial_info, &len); + if (res != ENOERR) { + diag_printf("Can't set serial config - DEVIO error: %d\n", res); + hang(); + } + + res = ENOERR; + } else { + res = ENOSUPP; +#ifdef __DEVELOPER__ + diag_printf("Host didn't accept config (%02x, %02x).\n", + reply[0], reply[1]); +#endif + } + +#if 0 + // FIXME: This is needed to prevent sending data at the new baud rate + // before the host is ready.... Need to fiddle this a bit more. + // Loop counts for ARM and PII in host side source. Replace with + // timed loops. + { + int i; + for (i = 0; i < 100000; i++); + } +#else + cyg_thread_delay(80); // this requires kernel +#endif + + return res; +} + + +//----------------------------------------------------------------------------- +// Host sends CRC in decimal ASCII, terminated with ! +int +read_host_crc(cyg_io_handle_t handle) +{ + int crc, len; + cyg_uint8 ch; + + crc = 0; + while (1) { + len = 1; + Tcyg_io_read(handle, &ch, &len); + if ('!' == ch) + break; + +#ifdef __DEVELOPER__ + if (!((ch >= '0' && ch <= '9'))){ + diag_printf("CHAR: %02x\n", ch); + } +#endif + + CYG_TEST_CHECK((ch >= '0' && ch <= '9'), + "Illegal CRC format from host"); + + crc = crc*10 + (ch - '0'); + } + + return crc; +} + +//--------------------------------------------------------------------------- +// Test binary data transmission. +// Format out: +// "@BINARY::!" +// Format in: +// !<#size bytes data> +// For echo modes, also: +// Format out: +// <#size bytes data> +// Format in: +// OK/ER +// Format out: +// DONE +// +// The last DONE allows the host to eat bytes if target is sending too many. +// +// Mode: +// MODE_NO_ECHO: +// Just receive data and verify CRC. +// MODE_EOP_ECHO: +// Receive data, verify CRC, resend data. +// Expect OK/ER reply from host when done. +// MODE_DUPLEX_ECHO: +// Receive data, echo data, verify CRC. +// Expect OK/ER reply from host when done. +// +// Note: +// Using diag_printf while talking with the host may cause some funky +// errors (bytes from the host side being lost!?!?) +// +// To Do: +// MODE_DUPLEX_ECHO: +// The current implementation is simple and may not stress the +// driver enough. Also, it's command packet format doesn't match +// that of the other modes. +cyg_test_return_t +test_binary(cyg_io_handle_t handle, int size, cyg_mode_t mode) +{ + const char cmd[] = "@BINARY:"; + int msglen; + cyg_uint32 xcrc; + int icrc, host_crc; + cyg_uint8 *p1; + cyg_int8 host_status = 'O'; // host is happy by default + int spurious = 0; + + // Verify that the test can be run with available ressources. + if (MODE_EOP_ECHO == mode && size > IN_BUFFER_SIZE) + return TEST_RETURN_NA; + + // Prepare and send the command. + p1 = &cmd_buffer[0]; + p1 = strcpy(p1, &cmd[0]); + p1 = itoa(p1, size); + *p1++ = ':'; + p1 = itoa(p1, mode); + *p1++ = '!'; + *p1++ = 0; + + CYG_TEST_INFO(&cmd_buffer[1]); + + msglen = strlen(&cmd_buffer[0]); + Tcyg_io_write(handle, &cmd_buffer[0], &msglen); + + // Get CRC back. + host_crc = read_host_crc(handle); + + // Depending on mode, start reading data. + xcrc = 0; + switch (mode) { + case MODE_NO_ECHO: + { + // Break transfers into chunks no larger than the buffer size. + int tx_len, chunk_len, i; + while (size > 0) { + chunk_len = min(IN_BUFFER_SIZE, size); + tx_len = chunk_len; + size -= chunk_len; + + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + + for (i = 0; i < tx_len; i++) { + ADD_CRC_BYTE(xcrc, in_buffer[i]); + } + } + + // Reply that we have completed the test. + { + const char msg_done[] = "DONE"; + + chunk_len = strlen(&msg_done[0]); + Tcyg_io_write(handle, &msg_done[0], &chunk_len); + } + + } + break; + case MODE_EOP_ECHO: + { + // We have already checked that the in buffer is large enough. + int i, tx_len, chunk_len; + chunk_len = tx_len = size; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + + for (i = 0; i < tx_len; i++) { + ADD_CRC_BYTE(xcrc, in_buffer[i]); + } + + // Echo data back. + chunk_len = size; + Tcyg_io_write(handle, &in_buffer[0], &chunk_len); + + // Now read host side's status + chunk_len = 2; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + host_status = in_buffer[0]; + +#if HANDLE_SPURIOUS + // FIXME: This occassionally reads back a spurious character + // from the transmission. It's not just noise, it's definitely + // a byte from the previously transmitted data. + if (in_buffer[0] != 'O' && in_buffer[1] == 'O') { + spurious = in_buffer[0]; + chunk_len = 1; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + if (in_buffer[0] == 'K') { + host_status = 'O'; + } + } +#endif + + // Reply that we have completed the test. + { + const char msg_done[] = "DONE"; + + chunk_len = strlen(&msg_done[0]); + Tcyg_io_write(handle, &msg_done[0], &chunk_len); + } + +#if HANDLE_SPURIOUS + if (spurious) { + diag_printf("******* Spurious byte 0x%02x *******\n", spurious); + } +#endif + + } + break; + case MODE_DUPLEX_ECHO: + { + int chunk_len; + int block_size = 64; + + // This is a simple implementation (maybe too simple). + // Host sends 4 packets with the same size (64 bytes atm). + // Target echoes in this way: + // packet1 -> packet1 + // packet2 -> packet2, packet2 + // packet3 -> packet3 + // packet4 -> /dev/null + // + // The reads/writes are interleaved in a way that should ensure + // the target out buffer to be full before the target starts to read + // packet3. That is, the target should be both receiving (packet3) + // and sending (packet2) at the same time. + + while (size--) { + // block_size -> block_size + chunk_len = block_size; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + chunk_len = block_size; + Tcyg_io_write(handle, &in_buffer[0], &chunk_len); + + // block_size -> 2 x block_size + chunk_len = block_size; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + chunk_len = block_size; + Tcyg_io_write(handle, &in_buffer[0], &chunk_len); + chunk_len = block_size; + Tcyg_io_write(handle, &in_buffer[0], &chunk_len); + + // block_size -> block_size + chunk_len = block_size; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + chunk_len = block_size; + Tcyg_io_write(handle, &in_buffer[0], &chunk_len); + + // block_size -> 0 + chunk_len = block_size; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + } + + // Kill the CRC. Leave packet verification to the host for now. + xcrc = host_crc = 0; + + // Now read host side's status + chunk_len = 2; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + host_status = in_buffer[0]; + +#if HANDLE_SPURIOUS + // FIXME: This occassionally reads back a spurious character + // from the transmission. It's not just noise, it's definitely + // a byte from the previously transmitted data. + if (in_buffer[0] != 'O' && in_buffer[1] == 'O') { + spurious = in_buffer[0]; + chunk_len = 1; + Tcyg_io_read(handle, &in_buffer[0], &chunk_len); + if (in_buffer[0] == 'K') { + host_status = 'O'; + } + } +#endif + + // Reply that we have completed the test. + { + const char msg_done[] = "DONE"; + + chunk_len = strlen(&msg_done[0]); + Tcyg_io_write(handle, &msg_done[0], &chunk_len); + } + +#if HANDLE_SPURIOUS + if (spurious) { + diag_printf("******* Spurious byte 0x%02x *******\n", spurious); + } +#endif + } + break; + default: + CYG_TEST_CHECK(0, "unknown mode"); + } + + + // Verify that the CRC matches the one from the host. + FIX_CRC(xcrc, icrc); +#ifdef __DEVELOPER__ + if (host_crc != icrc) + diag_printf("%d != %d\n", icrc, host_crc); +#endif + CYG_TEST_CHECK(host_crc == icrc, "CRC failed!"); + + // Verify that the host is happy with the data we echoed. + CYG_TEST_CHECK('O' == host_status, "Host failed checksum on echoed data"); + + CYG_TEST_PASS("Binary test completed"); + return TEST_RETURN_OK; +} + +//--------------------------------------------------------------------------- +// Test transformations on text transmissions +// Format out: +// "@TEXT:!<4 bytes binary checksum>" +// Format in: +// "" +// OK/ER +// +// Mode: +// MODE_EOP_ECHO: +// Receive data, verify CRC, resend data. +// Expect OK/ER reply from host when done. +// MODE_DUPLEX_ECHO: +// Receive data, echo data, verify CRC. +// Expect OK/ER reply from host when done. +// +cyg_test_return_t +test_text(cyg_io_handle_t handle, cyg_mode_t mode, const char* s_base, + const char* s_out, const char* s_in) +{ + return TEST_RETURN_NA; +} + +//--------------------------------------------------------------------------- +// Send PING to host, verifying the filter's presence. +// Format out: +// "@PING!" +// Format in: +// "OK" +// or +// No response if directly connected to GDB. +// +// This call only returns if the ser_filter is listening. Otherwise it +// sends N/A and hangs. +void +test_ping(cyg_io_handle_t handle) +{ + char msg[] = "@PING:!"; + char msg2[] = "\n"; + int msglen = strlen(msg); + int res; + + msglen = strlen(msg); + Tcyg_io_write(handle, msg, &msglen); + + // Now read host side's status + msglen = 2; + Tcyg_io_read_timeout(handle, &in_buffer[0], &msglen, 100, &res); + if (ENOERR == res && 'O' == in_buffer[0] && 'K' == in_buffer[1]) + return; + + msglen = strlen(msg2); + Tcyg_io_write(handle, msg2, &msglen); + + CYG_TEST_NA("No host side testing harness detected."); +} + +//--------------------------------------------------------------------------- +// Some helper functions to get a test started. +void +test_open_ser( cyg_io_handle_t* handle ) +{ +#ifndef SER_NOP_TEST + Cyg_ErrNo res; + + if (cyg_test_is_simulator) + CYG_TEST_NA("Cannot run from simulator"); + +#if defined(HAL_VSR_SET_TO_ECOS_HANDLER) +# if defined(SER_OVERRIDE_INT_1) + HAL_VSR_SET_TO_ECOS_HANDLER(SER_OVERRIDE_INT_1, NULL); +# endif +# if defined(SER_OVERRIDE_INT_2) + HAL_VSR_SET_TO_ECOS_HANDLER(SER_OVERRIDE_INT_2, NULL); +# endif +#endif + + res = cyg_io_lookup(TEST_SER_DEV, handle); + if (res != ENOERR) { + CYG_TEST_FAIL_FINISH("Can't lookup " TEST_SER_DEV); + } +#else + CYG_TEST_NA("No test device specified"); +#endif +} + +void +test_open_tty( cyg_io_handle_t* handle ) +{ +#ifndef TTY_NOP_TEST + Cyg_ErrNo res; + + if (cyg_test_is_simulator) + CYG_TEST_NA("Cannot run from simulator"); + +#if defined(HAL_VSR_SET_TO_ECOS_HANDLER) +# if defined(SER_OVERRIDE_INT_1) + HAL_VSR_SET_TO_ECOS_HANDLER(SER_OVERRIDE_INT_1, NULL); +# endif +# if defined(SER_OVERRIDE_INT_2) + HAL_VSR_SET_TO_ECOS_HANDLER(SER_OVERRIDE_INT_2, NULL); +# endif +#endif + + res = cyg_io_lookup(TEST_TTY_DEV, handle); + if (res != ENOERR) { + CYG_TEST_FAIL_FINISH("Can't lookup " TEST_TTY_DEV); + } +#else + CYG_TEST_NA("No test device specified"); +#endif +} + +//--------------------------------------------------------------------------- +// end of ser_test_protocol.inl diff --git a/packages/io/serial/current/tests/serial1.c b/packages/io/serial/current/tests/serial1.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/serial1.c @@ -0,0 +1,142 @@ +//========================================================================== +// +// serial1.c +// +// Test serial driver API +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Test the serial driver API. +// +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// Serial test main function. + + +void +serial_api_test(cyg_io_handle_t* handle) +{ + int res, len; + unsigned char buffer[16]; + + // Always return... + if (handle) + return; + + CYG_TEST_FAIL_FINISH("Not reached"); + + // read & write + res = cyg_io_read(handle, &buffer[0], &len); + res = cyg_io_write(handle, &buffer[0], &len); + + // cyg_io_get_config + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_INFO, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_ABORT, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_FLUSH, &buffer[0], &len); + + // cyg_io_set_config + cyg_io_set_config(handle, + CYG_IO_SET_CONFIG_SERIAL_INFO, &buffer[0], &len); +} + + +void +serial_test( void ) +{ + cyg_io_handle_t ser_handle; + + test_open_ser(&ser_handle); + + serial_api_test(&ser_handle); + + CYG_TEST_PASS_FINISH("serial1 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + 0, // + "serial_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} + + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF serial1.c diff --git a/packages/io/serial/current/tests/serial2.c b/packages/io/serial/current/tests/serial2.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/serial2.c @@ -0,0 +1,114 @@ +//========================================================================== +// +// serial2.c +// +// Test simple string output. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Test simple string output. +// +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// Serial test main function. +void +serial_test( void ) +{ + char test_msg1[]="This is a test message!\n"; + char test_msg2[]="$O5468697320697320612074657374206d657373616765210d0a#12"; + int msglen; + cyg_io_handle_t ser_handle; + + test_open_ser(&ser_handle); + + CYG_TEST_INFO("Writing a raw string to the serial device..."); + msglen = strlen(&test_msg1[0]); + Tcyg_io_write(ser_handle, &test_msg1[0], &msglen); + + CYG_TEST_INFO("Writing a GDB encoded string to the serial device..."); + msglen = strlen(&test_msg2[0]); + Tcyg_io_write(ser_handle, &test_msg2[0], &msglen); + + CYG_TEST_PASS_FINISH("serial2 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + 0, // + "serial_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF serial2.c diff --git a/packages/io/serial/current/tests/serial3.c b/packages/io/serial/current/tests/serial3.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/serial3.c @@ -0,0 +1,150 @@ +//========================================================================== +// +// serial3.c +// +// Test data half-duplex receive and send. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Test the half-duplex receive and send capabilities of +// the serial driver. +// Requirements: This test requires the ser_filter on the host side. +// +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// Serial test main function. +void +serial_test( void ) +{ + cyg_io_handle_t ser_handle; + + test_open_ser(&ser_handle); + + // We need the filter for this test. + test_ping(ser_handle); + +#if defined(CYGPKG_HAL_ARM_AEB) + { + // The AEB board is too slow to run the driver in interrupt mode + // at the default 38400 baud when doing this test. + cyg_ser_cfg_t arm_aeb_cfg = { + CYGNUM_SERIAL_BAUD_14400, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }; + + change_config(ser_handle, &arm_aeb_cfg); + } +#endif + + // Start slowly, the go for max size. + { + test_binary(ser_handle, 16, MODE_EOP_ECHO); + test_binary(ser_handle, 128, MODE_EOP_ECHO); + test_binary(ser_handle, 256, MODE_EOP_ECHO); + test_binary(ser_handle, IN_BUFFER_SIZE, MODE_EOP_ECHO); + } + + // Write some varying length packets. + { + int i; + for(i = 0; i < 8; i++) { + // No echo. + test_binary(ser_handle, 256 + 42*i, MODE_NO_ECHO); + test_binary(ser_handle, 64 + 7*i, MODE_NO_ECHO); + // Echo. + test_binary(ser_handle, 256 + 42*i, MODE_EOP_ECHO); + test_binary(ser_handle, 64 + 7*i, MODE_EOP_ECHO); + } + } + +#if 0 // Disable this for now. + // End with some long packets. + { + test_binary(ser_handle, 2048, MODE_NO_ECHO); + test_binary(ser_handle, 16384, MODE_NO_ECHO); + test_binary(ser_handle, 65536, MODE_NO_ECHO); + } +#endif + + CYG_TEST_PASS_FINISH("serial3 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + 0, // + "serial_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF serial3.c diff --git a/packages/io/serial/current/tests/serial4.c b/packages/io/serial/current/tests/serial4.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/serial4.c @@ -0,0 +1,128 @@ +//========================================================================== +// +// serial4.c +// +// Test serial configuration changing +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Test the configuration capabilities of the serial driver. +// Requirements: This test requires the ser_filter on the host side. +// +// To Do: +// This test should do a full test of the configuration combinations. +// This will get possible with proper test_change_config protocol +// implementation. +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// Serial test main function. +void +serial_test( void ) +{ + cyg_io_handle_t ser_handle; + + test_open_ser(&ser_handle); + + // We need the filter for this test. + test_ping(ser_handle); + + // Test multiple configurations (defined in the protocol file). + // FIXME: This will get replaced with a test over the full configuration + // permutation space. + { + int i; + int count = sizeof(test_configs) / sizeof(cyg_ser_cfg_t); + char msg[] = "This is a test\n"; + int msglen = strlen(msg); + + for (i = 0; i < count; i++){ + change_config(ser_handle, &test_configs[i]); + test_binary(ser_handle, 128, MODE_EOP_ECHO); + test_binary(ser_handle, 256, MODE_NO_ECHO); + Tcyg_io_write(ser_handle, msg, &msglen); + } + } + + CYG_TEST_PASS_FINISH("serial4 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + 0, // + "serial_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF serial4.c diff --git a/packages/io/serial/current/tests/serial5.c b/packages/io/serial/current/tests/serial5.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/serial5.c @@ -0,0 +1,131 @@ +//========================================================================== +// +// serial5.c +// +// Test data duplex receive and send. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-19 +// Description: Test the duplex receive and send capabilities of +// the serial driver. +// Requirements: This test requires the ser_filter on the host side. +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// Serial test main function. +void +serial_test( void ) +{ + cyg_io_handle_t ser_handle; + + test_open_ser(&ser_handle); + + // We need the filter for this test. + test_ping(ser_handle); + +#if defined(CYGPKG_HAL_ARM_AEB) + { + // The AEB board is too slow to run the driver in interrupt mode + // at the default 38400 baud when doing this test. + cyg_ser_cfg_t arm_aeb_cfg = { + CYGNUM_SERIAL_BAUD_9600, CYGNUM_SERIAL_WORD_LENGTH_8, + CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE }; + + change_config(ser_handle, &arm_aeb_cfg); + } +#endif + + // Start out slow, then go for many tests. Each cycle causes + // 512 bytes to be sent over the wire. + test_binary(ser_handle, 1, MODE_DUPLEX_ECHO); + test_binary(ser_handle, 2, MODE_DUPLEX_ECHO); + test_binary(ser_handle, 5, MODE_DUPLEX_ECHO); + +#if 0 // Disable these until the ser_filter produces status output. + test_binary(ser_handle, 128, MODE_DUPLEX_ECHO); + test_binary(ser_handle, 512, MODE_DUPLEX_ECHO); + test_binary(ser_handle, 1024, MODE_DUPLEX_ECHO); +#endif + + CYG_TEST_PASS_FINISH("serial5 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)serial_test, // entry + 0, // + "serial_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + serial_test(); +#endif +} + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF serial5.c diff --git a/packages/io/serial/current/tests/timeout.inl b/packages/io/serial/current/tests/timeout.inl new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/timeout.inl @@ -0,0 +1,132 @@ +#ifndef CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL +#define CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL +//========================================================================== +// +// timeout.inl +// +// Simple timeout support for serial I/O testing. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-05 +// Description: Simple timeout functions +//####DESCRIPTIONEND#### + +// Timeout support + +typedef void (timeout_fun)(void *); +#ifndef NTIMEOUTS +#define NTIMEOUTS 8 +#endif +typedef struct { + cyg_int32 delta; // Number of "ticks" in the future for this timeout + timeout_fun *fun; // Function to execute when it expires + void *arg; // Argument to pass when it does +} timeout_entry; +static timeout_entry timeouts[NTIMEOUTS]; +static cyg_handle_t timeout_alarm_handle; +static cyg_alarm timeout_alarm; +static cyg_int32 last_delta; + +static void +do_timeout(cyg_handle_t alarm, cyg_addrword_t data) +{ + int i; + cyg_int32 min_delta; + timeout_entry *e = timeouts; + min_delta = 0x7FFFFFFF; // Maxint + for (i = 0; i < NTIMEOUTS; i++, e++) { + if (e->delta) { + e->delta -= last_delta; + if (e->delta == 0) { + // Time for this item to 'fire' + (e->fun)(e->arg); + } else { + if (e->delta < min_delta) min_delta = e->delta; + } + } + } + if (min_delta != 0x7FFFFFFF) { + // Still something to do, schedule it + cyg_alarm_initialize(timeout_alarm_handle, min_delta, 0); + last_delta = min_delta; + } +} + +static cyg_uint32 +timeout(cyg_int32 delta, timeout_fun *fun, void *arg) +{ + int i; + cyg_int32 min_delta; + static bool init = false; + timeout_entry *e = timeouts; + cyg_uint32 stamp; + if (!init) { + cyg_handle_t h; + cyg_clock_to_counter(cyg_real_time_clock(), &h); + cyg_alarm_create(h, do_timeout, 0, &timeout_alarm_handle, &timeout_alarm); + init = true; + } + stamp = 0; // Assume no slots available + for (i = 0; i < NTIMEOUTS; i++, e++) { + if ((e->delta == 0) && (e->fun == 0)) { + // Free entry + e->delta = delta; + e->fun = fun; + e->arg = arg; + stamp = (cyg_uint32)e; + break; + } + } + e = timeouts; + min_delta = 0x7FFFFFFF; + for (i = 0; i < NTIMEOUTS; i++, e++) { + if (e->delta && (e->delta < min_delta)) min_delta = e->delta; + } + if (min_delta != 0x7FFFFFFF) { + // Still something to do, schedule it + cyg_alarm_initialize(timeout_alarm_handle, min_delta, 0); + last_delta = min_delta; + } + return stamp; +} + +static void +untimeout(cyg_uint32 stamp) +{ + if (stamp != 0) { + timeout_entry *e = (timeout_entry *)stamp; + if (e->fun != 0) { + e->delta = 0; + e->fun = 0; + e->arg = 0; + } + } +} + +#endif // CYGONCE_IO_SERIAL_MISC_TIMEOUT_INL diff --git a/packages/io/serial/current/tests/tty1.c b/packages/io/serial/current/tests/tty1.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/tty1.c @@ -0,0 +1,150 @@ +//========================================================================== +// +// tty.c +// +// Test TTY driver API +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-04-08 +// Description: Test the TTY driver API. +// +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// TTY test main function. + + +void +tty_api_test(cyg_io_handle_t* handle) +{ + int res, len; + unsigned char buffer[16]; + + // Always return... + if (handle) + return; + + CYG_TEST_FAIL_FINISH("Not reached"); + + // read & write + res = cyg_io_read(handle, &buffer[0], &len); + res = cyg_io_write(handle, &buffer[0], &len); + + // cyg_io_get_config + // TTY layer + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_TTY_INFO, &buffer[0], &len); + // Call-throughs to serial layer. + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_INFO, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_ABORT, &buffer[0], &len); + cyg_io_get_config(handle, + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_FLUSH, &buffer[0], &len); + + // cyg_io_set_config + // TTY layer. + cyg_io_set_config(handle, + CYG_IO_SET_CONFIG_TTY_INFO, &buffer[0], &len); + // Call-throughs to serial layer. + cyg_io_set_config(handle, + CYG_IO_SET_CONFIG_SERIAL_INFO, &buffer[0], &len); +} + + +void +tty_test( void ) +{ + cyg_io_handle_t tty_handle; + + test_open_tty(&tty_handle); + + tty_api_test(&tty_handle); + + CYG_TEST_PASS_FINISH("tty1 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)tty_test, // entry + 0, // + "tty_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + tty_test(); +#endif +} + + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF tty1.c diff --git a/packages/io/serial/current/tests/tty2.c b/packages/io/serial/current/tests/tty2.c new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/tests/tty2.c @@ -0,0 +1,114 @@ +//========================================================================== +// +// tty2.c +// +// Test simple string output. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 1999-03-17 +// Description: Test simple string output. +// +//####DESCRIPTIONEND#### + +#include + +#include // test macros +#include // assertion macros + +#if defined(CYGPKG_IO_SERIAL) && defined(CYGPKG_KERNEL) + +#ifdef CYGPKG_KERNEL +#include +#ifdef CYGFUN_KERNEL_API_C +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL +#include +unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; +cyg_thread thread_data; +cyg_handle_t thread_handle; +#endif +#endif + +#include "ser_test_protocol.inl" + +//--------------------------------------------------------------------------- +// TTY test main function. +void +tty_test( void ) +{ + char test_msg1[]="This is a test message!\n"; + char test_msg2[]="$O5468697320697320612074657374206d657373616765210d0a#12"; + int msglen; + cyg_io_handle_t tty_handle; + + test_open_tty(&tty_handle); + + CYG_TEST_INFO("Writing a raw string to the TTY device..."); + msglen = strlen(&test_msg1[0]); + Tcyg_io_write(tty_handle, &test_msg1[0], &msglen); + + CYG_TEST_INFO("Writing a GDB encoded string to the TTY device..."); + msglen = strlen(&test_msg2[0]); + Tcyg_io_write(tty_handle, &test_msg2[0], &msglen); + + CYG_TEST_PASS_FINISH("tty2 test OK"); +} + +void +cyg_start(void) +{ + CYG_TEST_INIT(); +#ifdef CYGFUN_KERNEL_API_C + cyg_thread_create(10, // Priority - just a number + (cyg_thread_entry_t*)tty_test, // entry + 0, // + "tty_thread", // Name + &stack[0], // Stack + CYGNUM_HAL_STACK_SIZE_TYPICAL, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); + cyg_scheduler_start(); +#else + tty_test(); +#endif +} + +#else // ifdef CYGPKG_IO_SERIAL + +void +cyg_start(void) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Requires serial device driver and kernel"); +} + +#endif +// EOF tty2.c diff --git a/packages/kernel/current/ChangeLog b/packages/kernel/current/ChangeLog --- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,950 @@ +1999-04-28 Jesper Skov + PR 19850 + * tests/stress_threads.c: Don't print text from alarm handler. + +1999-04-27 Gary Thomas + + * tests/tm_basic.cxx: + Use/test 'cyg_thread_delete()' function. + Add ability to compute statistics with first datum removed which + can show up cache effects. + Show thread stack usage. + +1999-04-26 Hugo Tyson + + * include/kapi.h: Add missing function cyg_thread_delete(); + otherwise there is no way in the C API to re-use thread memory + safely. It just calls the destructor of the Cyg_Thread class. + + * src/common/kapi.cxx (cyg_thread_delete): Implement it. + +1999-04-26 Hugo Tyson + + * tests/stress_threads.c: Commit a better version for Mark since I + happen to have it here; having addressed the main concern of my + approval process. It runs better in sims so long as the + constructor execution isn't messed with, nor timeslicing nor + priority inheritance. + +1999-04-23 Mark Galassi + + * tests/stress_threads.c (setup_death_alarm): shortened the + simulator time by another factor of 10, hoping that it will not + slow down nightly testing for simulator platforms too much. + (perform_stressful_tasks): added writing of a bit pattern to the + malloc()-ed spaces. Also reduced stack requirements for threads. + +1999-04-23 Hugo Tyson + + * src/common/timer.cxx (Cyg_Timer::activate): we must also disable + the alarm when resetting it so as to remove it from its queue, so + that the enable afterwards places it on the right queue instead of + assuming that, being enabled, it's already there. (if not + enabling, the behaviour is unchanged and correct) This was + detected by uITRON tests[cx]4, with some random perms including + enable CYGIMP_KERNEL_COUNTERS_MULTI_LIST, + value CYGNUM_KERNEL_COUNTERS_MULTI_LIST_SIZE {8}. + The PR is 19475. + +1999-04-21 Hugo Tyson + + * tests/bin_sem1.cxx (bin_sem1_main): Doh! Use priorities 4 and 5 + for the two threads so that they are unique (with a bitmap + scheduler, the threads had prios 0 and 1 resp, which causes an + assert in the attempt to set thread 0's prio to 1, "prios not + unique"). PR 19904. + +1999-04-20 Hugo Tyson + + * tests/stress_threads.c: applied my patch to fix stack sizes. + And timing, in simulator; branch now matches the trunk. + +1999-04-20 Jonathan Larmour + + * tests/kcache2.c: + Reduce iterations for time_ilock(), time_dlock(), and test_dzero() + if a simulated environment is detected + Fix for PR 19853 + +1999-04-19 Jonathan Larmour + + * tests/kill.cxx: Make delay ticks greater than 1 to prevent + scheduling problems if the clock rolls over immediately + Fix for PR 19516 + +1999-04-19 Hugo Tyson + + * tests/bin_sem1.cxx (bin_sem1_main): Add priorities to the + threads so that they run sequentially like the tester expected. + Otherwise simple timing, and shorter timeslicing, causes failure + to be reported; likewise if the kernel happens not to run entry0 + first! + (another checkin) + (bin_sem1_main): Add conditional use of set_priority on + CYGIMP_THREAD_PRIORITY as it should be. + +1999-04-14 Jesper Skov + + * src/debug/dbg_gdb.cxx: Fixed compiler warnings, cleaned up stub + requirements (removed FIX ME). + +1999-04-14 Gary Thomas + + * include/intr.hxx: + * src/intr/intr.cxx (call_pending_DSRs_inner): Rework calling of + DSRs to allow calls from HAL code. This will allow for proper + use of a separate interrupt stack. + +1999-04-14 Mark Galassi + + * tests/PKGconf.mak: added an ifndef for the AEB-1 board so that + stress_threads is only built conditionally. + + * tests/stress_threads.c: added more config smarts suggested by + Jesper for his configurations. + +1999-04-13 Jesper Skov + PR 19822 + * src/debug/dbg_gdb.cxx: Current thread's registers live in + registers, not _registers. + +1999-04-13 Mark Galassi + + * tests/stress_threads.c: simple stressing of thread + creation/deletion with some memory-intensive and alarm-based + tasks. This version is set so that it dies after DEATH_TIME_LIMIT + seconds, currently set to 120. #undef-ing DEATH_TIME_LIMIT makes + the test run forever. This is currently not working with the + bitmap scheduler, probably for some simple reason, but I have not + yet broken it down to see why. + +1999-04-12 Jonathan Larmour + + * tests/except1.cxx: + * tests/kexcept1.cxx: + Remove now unnecessary tx39-specific setting of + CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS VSR + Part of cleanup for PR 19731 + +1999-04-09 Hugo Tyson + + Generally: thread->to_queue_head() moves a thread to the head of + whatever queue it is on, if relevant. This is so that a thread + can change priority and then put itself at the front of its new + run queue instead of the end; otherwise it yields too, which may + be undesirable. Particularly for internal use of priorities in + the uITRON compatibility layer. + + * include/thread.hxx (class Cyg_Thread): to_queue_head(): new + function. Define Cyg_Thread::rotate_queue() for all schedulers. + Public inheritance of Cyg_ThreadQueue_Implementation. + + * include/thread.inl (class Cyg_Thread): to_queue_head(): new + function. Define Cyg_Thread::rotate_queue() for all schedulers. + + * include/mlqueue.hxx (class Cyg_SchedThread_Implementation): + to_queue_head(), ...ThreadQueue...::to_head(): new functions. + + * src/sched/mlqueue.cxx (class Cyg_SchedThread_Implementation): + to_queue_head(), ...ThreadQueue...::to_head(): new functions. + + * include/bitmap.hxx (class Cyg_SchedThread_Implementation): + Add empty placeholders for rotate_queue() and to_queue_head() to + maintain commonality of interface. + +1999-04-08 Jesper Skov + PR 19667 + * kernel/current/src/common/thread.cxx: + Removed obsolete Cyg_Thread constructor. + + * kernel/current/tests/testaux.hxx: + * kernel/current/tests/thread0.cxx: + * kernel/current/tests/thread1.cxx: + Changed to use the new Cyg_Thread constructor. + +1999-04-08 Jesper Skov + + * src/common/kapi.cxx: Minor indentation fixes. + +1999-04-07 Jesper Skov + PR 19743 + * include/mfiximpl.inl (Cyg_Mempool_Fixed_Implementation): Moved + argument assertions before the first use of the arguments. + +1999-04-07 Hugo Tyson + + * tests/kexcept1.c (except0_main): + * tests/except1.cxx (except0_main): + Use macro HAL_VSR_SET_TO_ECOS_HANDLER() if defined, to reset + likely exception handler VSRs to eCos' default handlers - the + target side equivalent to CYG_TEST_GDBCMD("handle SIGBUS nostop"); + The VSR may not be the eCos standard one in some implementations + of cooperation with CygMon. + +1999-03-31 Nick Garnett + + * include/pkgconf/kernel.h (CYGNUM_KERNEL_COUNTERS_RTC_PERIOD): + Fixed value of this option for TX39 66MHz to correct number. + +1999-03-25 Gary Thomas + + * tests/tm_basic.cxx: More adjustments to get clock latency correct. + Some fine tuning of messages and layout to fit well within 80 columns. + +1999-03-24 Nick Garnett + + * include/pkgconf/kernel.h: Fixed an ifdef error. + +1999-03-24 Gary Thomas + + * tests/tm_basic.cxx (NTEST_THREADS): Reduce # threads so test can + build on smaller machines. Also, only adjust timings by single + "overhead" value instead of the more generous 2*overhead. + + * src/common/clock.cxx: Clock latency measurement defaults to 'off'. + +1999-03-23 Nick Garnett + + * tests/kcache2.c: Reduced number of loops in time_ilock(). On the + MN10300 and TX39 this caused the test to timeout in the testing + farm. + +1999-03-23 Gary Thomas + + * tests/tm_basic.cxx: + * src/common/clock.cxx: Add 'measure_clock_latency' boolean which + is used to turn clock latency measurements on/off. + +1999-03-23 Nick Garnett + + * tests/tm_basic.cxx (run_all_tests): Changed initial delay from + 100 ticks to 2. This is adequate for the purpose of letting the + clock get going, while 100 ticks was too long on simulators. + +1999-03-23 Hugo Tyson + + * tests/kcache1.c: + * tests/kcache2.c: + * tests/kclock1.c: + * tests/kexcept1.c: + * tests/kflag1.c: + * tests/kmbox1.c: + * tests/kmemfix1.c: + * tests/kmemvar1.c: + * tests/kmutex1.c: + * tests/ksched1.c: + * tests/ksem1.c: + * tests/kthread0.c: + * tests/thread0.cxx: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL instead of "4096" and include + hal_arch.h where necessary to get it. + +1999-03-22 Hugo Tyson + + * include/thread.inl (attach_stack): + Fix typo in assert; missing comma. + +1999-03-22 Jonathan Larmour + + * src/debug/dbg-thread-syscall.h: Update copyright + +1999-03-22 Hugo Tyson + + * include/thread.inl: + * src/common/thread.cxx: + * tests/kthread1.c: + * tests/testaux.hxx: + * tests/thread1.cxx: + * tests/thread_gdb.c: + * tests/tm_basic.cxx: + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + Except for stack checking and the idle thread stack which uses + CYGNUM_HAL_STACK_SIZE_MINIMUM. + +1999-03-19 Nick Garnett + + * tests/kcache1.c: + * tests/kcache2.c: + Made all CYG_INTERRUPT_STATE variables register variables. The + value of this variable has to survive cache invalidation and does + not in some testing permutations that are unoptimized. + Fixes PR 19165. + + * include/kapi.h: Type of cyg_tick_count_t changed to cyg_uint64. + Response to PR 19320. + +1999-03-19 Gary Thomas + + * tests/tm_basic.cxx: Much better analysis of clock interrupt times. + Print average deviation instead of variance. Also print "confidence" + numbers which are a measure of "how likely" a particular number would + be relative to the mean and min of the sample set. + +1999-03-17 Gary Thomas + + * tests/tm_basic.cxx: Improve messages and layout. + Better message for 'hardware clock tick' value. + + * src/common/clock.cxx: Be more careful about clock latency delta + values that are used/kept - some hardware can yield incorrect values. + + * tests/testaux.hxx: Use HAL recommended stack size for default. + +1999-03-16 Nick Garnett + + * src/common/thread.cxx: + Removed MIPS specific definition of idle_thread_stack[]. This is + so it gets the benefit of the redefinition of + CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE. This definition has also + been made static, since the MIPS compiler would otherwise put it + in the .data section. + + * include/intr.hxx (class Cyg_Interrupt): + Changed implementation of Cyg_Interrupt::interrupts_enabled() to + test the value of disable_counter, rather than the hardware. + +1999-03-15 Nick Garnett + + * tests/kcache1.c: + * tests/kcache2.c: + Added interrupt disables around cache operations. If these take + too long, an inopportune interrupt can disrupt the cache contents, + or result in the interrupt seeing an inconsistent world. + +1999-03-15 Gary Thomas + + * tests/tm_basic.cxx: Improved and cleaned up messages overall. + +1999-03-15 Jesper Skov + PR 19504 + * tests/tm_basic.cxx: Kill created threads after mutex, mbox and + semaphore tests. + +1999-03-12 Hugo Tyson + + * src/debug/dbg-thread-demux.c: + Only try handling the SPARClite-SLEB vector correctly if + CYG_HAL_USE_ROM_MONITOR_CYGMON ie. we are talking with CygMon. + Otherwise the code is wrong, but also not used. No matter. + +1999-03-12 Hugo Tyson + + * tests/kthread1.c: + * tests/thread1.cxx: + * tests/thread_gdb.c: + Deal with CYGNUM_HAL_MINIMUM_STACK_SIZE requirement. + +1999-03-12 Gary Thomas + + * include/thread.inl (attach_stack): Add check/assert for minimum + stack size (HAL defined) + +1999-03-11 Hugo Tyson + + * src/debug/dbg-thread-demux.c (patch_dbg_syscalls): + Use the correct vector table slot for SPARClite-SLEB; it's not 15 + on here, it's BSP_VEC_MT_DEBUG from the hal's hal_cygm.h + +1999-03-11 Nick Garnett + + * tests/testaux.hxx: + Move definition of inline placement operator new outside of ifdef + for NTHREADS so that it can be used by other code. + + * tests/intr0.cxx: + * tests/thread1.cxx: + Make use of placement operator new rather than dynamic one in + intr0. Removed duplicate definition from thread1. + +1999-03-11 Jesper Skov + PR 19472 + * tests/kill.cxx: Increased delays for the synthetic target. + +1999-03-11 Jesper Skov + PR 19468 + * tests/intr0.cxx (intr0_main): + * tests/kintr0.c (kintr0_main): + Only attach interrupt handlers to vectors not in use. + +1999-03-10 Jesper Skov + PR 19368 + * src/sched/sched.cxx (start): Change the dependency for + referencing the RTC to make its inclusion independent of scheduler + choice. + +1999-03-10 Jesper Skov + PR 17357 + * src/intr/intr.cxx (attach): Assert that interrupt vector attach + will succeed. + +1999-03-10 Nick Garnett + + * include/pkgconf/kernel.h: + Changed names used to control clock frequency on TX39 target. + +1999-03-08 Gary Thomas + + * src/sync/mutex.cxx: Allow 'Cyg_Condition_Variable::wait()' + to be entered with the scheduler locked (and thsu exit in + the same state). This will allow for fully thread-safe use + of 'Cyg_Condition_Variable::wait()'. + +1999-02-26 Jonathan Larmour + + * tests/except1.cxx (except0_main): + * tests/kexcept1.c (except0_main): + Move CYG_TEST_GDBCMD back to being before CYG_TEST_INIT + +1999-02-26 Jesper Skov + PR 19283 + + * src/common/kapi.cxx: Changed cyg_exception_call_handler + definition to be consistent with declaration. + + * include/kapi.h: Change cyg_code_t to signed type. + + * tests/except1.cxx (except0_main): + * tests/kexcept1.c (except0_main): + Init diag before making first output. + +1999-02-26 Jesper Skov + PR 19284 + * tests/mutex2.cxx (mutex2_main): Set priorities in a different + order. + +1999-02-25 Nick Garnett + + * include/sched.hxx (class Cyg_Scheduler_Base): + Added CYGBLD_ATTRIB_ASM_ALIAS(cyg_scheduler_sched_lock) to + declaration of sched_lock member. This makes it have the given + name in the object and assembler files. This in turn eliminates + the need to have a C++ mangled name in the HAL. + + * src/intr/intr.cxx: + Cyg_Interrupt::detach() was not translating the vector to a table + index correctly in the chained case. Fixed. + +1999-02-24 Nick Garnett + + * include/intr.hxx: + * src/intr/intr.cxx: + Added an interrupt disable counter to + Cyg_Interrupt::disable_interrupts() and + Cyg_Interrupt::enable_interrupts(). + +1999-02-23 Nick Garnett + + * include/pkgconf/kernel.h: + Added support for 66MHz part. + + * include/instrmnt.h: + Added CYG_INSTRUMENT_EVENT_MUTEX_RELEASE and + CYG_INSTRUMENT_EVENT_MUTEX_RELEASED. This should have been part of + the 1999-02-22 checkin. + +1999-02-23 Jonathan Larmour + + * tests/clock0.cxx, tests/clock1.cxx, tests/except1.cxx, + tests/kcache1.c, tests/kcache2.c, tests/kclock0.c, tests/kclock1.c, + tests/kexcept1.c, tests/kflag0.c, tests/kflag1.c, tests/kill.cxx, + tests/kintr0.c, tests/kmbox1.c, tests/kmemfix1.c, tests/kmemvar1.c, + tests/kmutex0.c, tests/kmutex1.c, tests/ksched1.c, tests/ksem0.c, + tests/ksem1.c, tests/kthread0.c, tests/kthread1.c, tests/thread1.cxx: + Use CYG_TEST_NA() rather than CYG_TEST_PASS_FINISH() for tests that + are not applicable for this configuration + +1999-02-22 Nick Garnett + + * include/kapi.h: + * include/mutex.hxx: + * src/sync/mutex.cxx: + * src/common/kapi.cxx: + * tests/mutex2.cxx: + * tests/PKGconf.mak: + Added Kernel API support for thread release, which allows a thread + to be broken out of any wait. Also added support for releasing all + threads waiting to lock a mutex, both at C++ and Kernel API + levels. Added a test program, mutex2, to test this fuctionality + out. + +1999-02-20 Jonathan Larmour + + * include/except.hxx: + * include/kapidata.h + Rename CYG_EXCEPTION_COUNT -> CYGNUM_HAL_EXCEPTION_COUNT in line + with HAL changes + Rename deliver_exception() -> cyg_hal_deliver_exception() + QA improvements + + * src/common/clock.cxx: + Rename CYG_VECTOR_RTC -> CYGNUM_HAL_INTERRUPT_RTC in line with + HAL changes + + * src/common/except.cxx: + Rename CYG_EXCEPTION_* -> CYGNUM_HAL_EXCEPTION_* in line + with HAL changes + Allow for CYGNUM_HAL_EXCEPTION_MIN != 0 + Rename deliver_exception() -> cyg_hal_deliver_exception() + Add more tracing, and fix some existing + QA improvements + + * src/intr/intr.cxx: + Rename CYG_ISR_* -> CYGNUM_HAL_ISR_* in line with HAL changes + Add more tracing, and fix some existing + QA improvements + + * src/sched/bitmap.cxx: + * src/sched/mlqueue.cxx: + * src/sync/mutex.cxx: + Add more tracing and fix some existing + QA improvements + + * tests/except1.cxx: + * tests/kexcept1.c + Rename CYG_EXCEPTION_* -> CYGNUM_HAL_EXCEPTION_* in line + with HAL changes + QA improvements + Use new CYG_TEST_GDBCMD to tell GDB not to stop + Remove special simulator case as it should now work + + * tests/intr0.cxx: + * tests/kintr0.c: + Rename CYG_ISR/VSR_* -> CYGNUM_HAL_ISR/VSR_* in line + with HAL changes + QA improvements + +1999-02-16 Jonathan Larmour + + * tests/kexcept1.c (except0_main): Tell GDB to not stop on + SIGBUS or SIGSEGV since we know we're going to cause an exception + +1999-02-12 Hugo Tyson + + * src/common/thread.cxx (idle_thread_stack): + Override CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE if + CYGNUM_HAL_MINIMUM_STACK_SIZE demands it. + + * include/pkgconf/kernel.h (CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE): + Document that this option can be overridden by HALs demands. + +1999-02-11 Jesper Skov + + * src/debug/dbg-thread-syscall.h: + * src/debug/dbg-thread-demux.c: + Added handling of dbg_scheduler_func calls. + +1999-02-11 Nick Garnett + + * include/kapi.h: + * src/common/kapi.cxx: + Added API support for per-thread data. + + * include/kapi.h: + * src/common/kapi.cxx: + * tests/ksem1.c: + * tests/tm_basic.cxx: + Changed arguments to Kernel C API semaphore functions to take + cyg_count32 rather than cyg_ucount32. This makes them consistent + with the underlying implementation and allows for negative counts + in the future. Changed some tests to match. + Fixes PR 17877. + +1999-02-08 Jesper Skov + + * tests/kexcept1.c (entry0): + * tests/except1.cxx (entry0): + Don't call cause_exception on SIMs. + +1999-02-05 Jesper Skov + + * src/common/clock.cxx (isr): Ignore a latency of 0 when finding + min_clock_latency. + +1999-02-04 Jesper Skov + PR 19075 + * include/instrmnt.h: Slightly overdid the use of CYG_UNUSED_PARAM + macros. + +1999-02-04 Jesper Skov + + * src/intr/intr.cxx: + Make instrumentation macros always use the parameters to avoid + compiler warnings. + +1999-02-03 Jesper Skov + PR 18075 + * tests/memfix1.cxx: + * tests/kmemfix1.c: + Make timing less sensitive. + +1999-02-02 Jesper Skov + + * tests/bin_sem2.cxx: Fixed compiler warning. + +1999-02-02 Jesper Skov + PR 18971 + * tests/bin_sem2.cxx (bin_sem2_main): Reduce run time in SIM. + +1999-02-01 Nick Garnett + + * tests/kcache2.c: Added calls to HAL_DCACHE_SYNC() before all + relevant calls to HAL_DCACHE_DISABLE(). This should have been done + on 1999-01-25 where is was only done to one instance. + +1999-02-01 Gary Thomas + + * tests/tm_basic.cxx: Adjust stack sizes for platforms with + limited memory. + +1999-01-28 Nick Garnett + + * src/intr/intr.cxx: When using chained interrupts, + interrupt_end() is passed NULL as the intr argument. If + instrumentation is also enabled, the CYG_INSTRUMENT_INTR() calls + will try to indirect through zero. Added ifdefs to avoid + this. Also test intr for NULL before trying to post the DSR. + Fixes PR 18771. + +1999-01-28 Jesper Skov + + * tests/tm_basic.cxx: Fixed strings. + +1999-01-26 Hugo Tyson + + * tests/kcache1.c (time0): Waste much less time if running in a + simulator. Do only 40 loops instead of 4000. + In consequence the nasty meddling with MAX_STRIDE depending on + HAL_xxx_SIM package definitions can go. + +1999-01-26 Jesper Skov + PR 18902 + * src/debug/dbg-thread-demux.c: Oops. Undid my change of 1999-01-21. + +1999-01-25 Jonathan Larmour + + * src/common/except.cxx: Make global exception initialisation object + be constructed at INTERRUPT priority + +1999-01-25 Jesper Skov + PR 18002 + * tests/thread_gdb.c: Ensure that there are enough priorities. + +1999-01-25 Jesper Skov + PR 18875 + * tests/tm_basic.cxx: Ensure that there are enough priorities. + +1999-01-25 Nick Garnett + + * tests/kcache2.c (test_dstore): Added call to HAL_DCACHE_SYNC() + before disabling cache. On some architectures disabling the cache + would cause the following call to do nothing. + Fixes PR 18849. + +1999-01-22 Jesper Skov + + * tests/tm_basic.cxx: Don't run on Linux target. + +1999-01-21 Hugo Tyson + These changes are to get tests working with the SPARClite port; it + doesn't do 8-byte register access unless it's properly aligned. + + * tests/philo.cxx (cyg_start): + Use tests/testaux.hxx to get new threads, to get the alignment + required; see below. + + * tests/thread2.cxx (thread2_main): + Use tests/testaux.hxx to get new threads, to get the alignment + required; see below. + + * tests/tm_basic.cxx: + Larger stack for greedy processor. + + * tests/testaux.hxx: + thread_obj[][] and stack[][] are now 8-byte aligned like certain + processors require; Cyg_Thread contains cyg_tick_count which is + 64-bit so any "standalone" C++ object would be so aligned. These + dynamically allocated ones should be too. + +1999-01-21 Jesper Skov + PR 18747 + * tests/flag1.cxx: Increase delays/timeouts to prevent failure + when configured with full trace logging. + +1999-01-21 Jesper Skov + + * src/debug/dbg-thread-demux.c: Removed PR 17327 workarounds. + +1999-01-19 Jonathan Larmour + + * src/sched/sched.cxx (start): + CYG_REFERENCE_SYMBOL -> CYG_REFERENCE_OBJECT in line with + cyg_type.h change + +1999-01-19 Jesper Skov + PR 18824 + * src/sync/mutex.cxx: + * include/pkgconf/kernel.h: Let + CYGMFN_KERNEL_SYNCH_CONDVAR_TIMED_WAIT require + CYGFUN_KERNEL_THREADS_TIMER. + +1999-01-18 Nick Garnett + + * src/debug/dbg-thread-demux.c (patch_dbg_syscalls): Added test + for CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT in patch_dbg_syscalls(). + +1999-01-15 Gary Thomas + + * include/mvarimpl.inl (free): Memory list sort was incorrect. + + * tests/PKGconf.mak (TESTS): Don't build cache tests on + some platforms. + +1999-01-15 Jesper Skov + PR 18768 + + * tests/kmbox1.c: + * tests/mbox1.cxx: + Increase delays used so the overhead of GDB packets doesn't make + the tests fail. + +1999-01-14 Jesper Skov + + * src/sched/sched.cxx (start): Use new CYG_REFERENCE_SYMBOL macro. + +1999-01-14 Nick Garnett + + * src/debug/dbg_gdb.cxx: Extended return types to include success, + fail and caller-do-it as required by msnyder. + + * src/debug/dbg-thread-demux.c: Moved prototype of dbg_scheduler() + to dbg-threads-api.h. + +1999-01-13 Jesper Skov + + * src/sched/sched.cxx (start): Better implementation of the + real_time_clock reference. + +1999-01-13 Jesper Skov + + * include/pkgconf/kernel.h: Disable CYGSEM_KERNEL_SCHED_TIMESLICE + in CYG_HAL_ROM_MONITOR magic. + +1999-01-07 Jesper Skov + + * include/pkgconf/kernel.h: Added RTC values for i386/Linux. + + +1999-01-12 Nick Garnett + + * src/debug/dbg-thread-demux.c: + Changed API of patch_dbg_syscalls() to take a pointer to the start + of the vector and insert several vectors. + + * src/debug/dbg_gdb.cxx: + Added dbg_scheduler() function to allow debuggers to lock and + unlock the scheduler. This helps when stepping multithreaded code. + + * include/sched.hxx: + * include/sched.inl: + Added Cyg_Scheduler::unlock_simple() to decrement the lock without + rescheduling. + +1999-01-05 Jesper Skov + PR 18574 + + * src/sched/sched.cxx (start): Reference the real time clock to + ensure it is included when linking. + +1999-01-04 Jesper Skov + + * tests/thread1.cxx: + * tests/mbox1.cxx: + * tests/kmbox1.c: + * tests/kill.cxx: + * tests/kflag1.c: + * tests/kclock1.c: + * tests/flag1.cxx: + * src/common/thread.cxx: + CYGFUN_KERNEL_THREADS_TIMER requires CYGVAR_KERNEL_COUNTERS_CLOCK + so don't check for the latter explicitly. + +1999-01-04 Jesper Skov + PR 18573 + + * tests/thread1.cxx: + * tests/mbox1.cxx: + * tests/kmbox1.c: + * tests/kflag1.c: + * tests/flag1.cxx: + Don't run tests that rely on delay() when delay() is only defined + as an empty function. + +1998-12-24 Bart Veer + + * src/sync/mutex.cxx: + * src/sync/mbox.cxx: + * src/sync/flag.cxx: + * src/sched/sched.cxx: + * src/mem/memvar.cxx: + * src/mem/memfixed.cxx: + * src/common/thread.cxx: + * src/common/clock.cxx: + * include/mempoolt.inl: + * include/mempolt2.inl: + * include/mboxt2.inl: + * include/mboxt.inl: + check_this() member functions should now be const + +1998-12-22 Nick Garnett + + * include/instrmnt.h: Fixed casts for arguments to + cyg_instrument() to work in C. Fixes PR 18413. + +1998-12-21 Gary Thomas + + * include/pkgconf/kernel.h: Change AEB-1 clock scale. + +1998-12-17 Gary Thomas + + * tests/tm_basic.cxx: Calculate system clock resolution + based on 'CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION' + +1998-12-16 Gary Thomas + + * include/pkgconf/kernel.h (CYGNUM_KERNEL_COUNTERS_RTC_PERIOD): + Add support for new ARM AEB-1. + +1998-12-16 Hugo Tyson + + * tests/intr0.cxx (intr0_main): + * tests/kintr0.c (kintr0_main): + Conditionally use a different interrupt vector number on tx39 when + in the simulator (according to cyg_test_is_simulator) so that + these tests execute correctly in simulators. + +1998-12-16 Jesper Skov + PR 18546 + + * tests/kill.cxx (cyg_start): Do NOP test if required kernel + functionality is disabled. + +1998-12-15 Jesper Skov + + * include/pkgconf/kernel.h: Changed + CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS to + CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS. + +1998-12-14 Jesper Skov + + * tests/tm_basic.cxx: Made use of cyg_mbox_get() conditional on + CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT. + +1998-12-14 Jesper Skov + + * tests/tm_basic.cxx: Added requirement for kernel RTC. + +1998-12-11 Jesper Skov + + * tests/kcache2.c: Added tests of three more macros. + +1998-12-10 Jesper Skov + + * tests/kcache2.c: Added tests of three more macros. + +1998-12-10 Jesper Skov + + * tests/PKGconf.mak: + * tests/kcache2.c: + Added new cache test. + +1998-12-04 Nick Garnett + + * include/intr.hxx: + * src/intr/intr.cxx (cyg_interrupt_post_dsr): Added this function + to allow functions in the HAL, which are always only in C, to call + Cyg_Interrupt::post_dsr(). Have also returned post_dsr() to + private parts of Cyg_Interrupt. + +1998-12-04 Jesper Skov + + * include/intr.hxx (class Cyg_Interrupt): Made post_dsr public so + it can be called from HAL interrupt arbiters. + +1998-12-04 Jesper Skov + + * include/pkgconf/kernel.h (CYGNUM_KERNEL_COUNTERS_RTC_PERIOD): + Set to the correct value for a 33.333MHz clock. + +1998-12-02 Jesper Skov + + * src/intr/intr.cxx (interrupt_end, chain_isr): Got rid of magic + interrupt constants. + +1998-11-30 Gary Thomas + + * include/pkgconf/kernel.h: Fix spelling of CYGVAR_KERNEL_COUNTERS_CLOCK + +1998-11-25 Jesper Skov + + * src/common/thread.cxx (check_this): Check that stack_ptr is + within its limits. + +Wed Nov 25 18:45:12 1998 Jonathan Larmour + + * include/sched.inl (unlock) (lock): + * src/common/thread.cxx (thread_entry): + * src/sched/sched.cxx (unlock_inner): + + Ensure all accesses to sched_lock cannot be reordered by the + optimiser + +1998-11-24 Jesper Skov + + * src/common/thread.cxx (thread_entry): Prevent scheduler lock + from being released too early. + +1998-11-23 Nick Garnett + + * include/pkgconf/kernel.h: + * src/common/clock.cxx: + Added CYGIMP_KERNEL_COUNTERS_SORT_LIST option to determine whether + the alarm lists in counters are sorted or not. + + * tests/tm_basic.cxx: Added a test for many alarms firing + separately. + +1998-11-23 Jesper Skov + + * tests/kcache1.c: Only run with stride 1 on SIMs. + +1998-11-19 Gary Thomas + + * tests/tm_basic.cxx: Insure appropriate kernel configuration for + building tool. Needs at least kernel C API and multi-level scheduler. + +1998-11-18 Gary Thomas + + * tests/tm_basic.cxx: Add interrupt latency support. Print + results to 10ns accuracy. + + * tests/PKGconf.mak: Add 'tm_basic' (the kernel timing test + program) to list of built tests. + + * src/intr/intr.cxx: Change usage of HAL_INTERRUPT_MASK to have + trailing ';' to match similar macros. + + * src/common/clock.cxx: + * include/pkgconf/kernel.h: Add CDL option + CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY used to define if interrupt + latency measurements should be built into kernel. + +1998-11-17 Jesper Skov + + * include/pkgconf/kernel.h: Renamed CYG_HAL_POWERPC_MP860 to + CYG_HAL_POWERPC_MPC860. + + 1998-10-28 David Moore * include/pkgconf/kernel.h @@ -1187,7 +2134,7 @@ Wed Mar 11 13:18:17 GMT 1998 Chris Prov // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/include/bitmap.hxx b/packages/kernel/current/include/bitmap.hxx --- a/packages/kernel/current/include/bitmap.hxx +++ b/packages/kernel/current/include/bitmap.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// bitmap.hxx +// bitmap.hxx // -// Bitmap scheduler class declaration(s) +// Bitmap scheduler class declaration(s) // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-10 -// Purpose: Define bitmap scheduler implementation -// Description: The classes defined here are used as base classes +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-10 +// Purpose: Define bitmap scheduler implementation +// Description: The classes defined here are used as base classes // by the common classes that define schedulers and thread // things. // Usage: Included according to configuration by @@ -140,6 +140,9 @@ protected: void yield(); // Yield CPU to next thread + // These are not applicable in a bitmap scheduler; placeholders: + inline void rotate_queue( cyg_priority pri ) { }; + inline void to_queue_head( void ) { }; }; // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/include/clock.hxx b/packages/kernel/current/include/clock.hxx --- a/packages/kernel/current/include/clock.hxx +++ b/packages/kernel/current/include/clock.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// clock.hxx +// clock.hxx // -// Clock and Alarm class declaration(s) +// Clock and Alarm class declaration(s) // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Clock and Alarm class interfaces -// Description: The classes defined here collectively implement the +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Clock and Alarm class interfaces +// Description: The classes defined here collectively implement the // internal API used to create, configure and manage Counters, // Clocks and Alarms. // Usage: #include diff --git a/packages/kernel/current/include/clock.inl b/packages/kernel/current/include/clock.inl --- a/packages/kernel/current/include/clock.inl +++ b/packages/kernel/current/include/clock.inl @@ -3,9 +3,9 @@ //========================================================================== // -// clock.inl +// clock.inl // -// Clock and Alarm class inlines +// Clock and Alarm class inlines // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-30 -// Purpose: Define Clock and Alarm class inlines -// Description: Define inline functions for counter, clock and alarm +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-30 +// Purpose: Define Clock and Alarm class inlines +// Description: Define inline functions for counter, clock and alarm // classes. // Usage: #include // #include diff --git a/packages/kernel/current/include/diag.h b/packages/kernel/current/include/diag.h --- a/packages/kernel/current/include/diag.h +++ b/packages/kernel/current/include/diag.h @@ -3,9 +3,9 @@ /*============================================================================= // -// diag.h +// diag.h // -// Diagnostic Routines for Kernel Development +// Diagnostic Routines for Kernel Development // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,19 +25,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: Diagnostic Routines for Kernel Development -// Description: Diagnostic routines for use during kernel development. -// Usage: #include +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: Diagnostic Routines for Kernel Development +// Description: Diagnostic routines for use during kernel development. +// Usage: #include // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/errors.h b/packages/kernel/current/include/errors.h --- a/packages/kernel/current/include/errors.h +++ b/packages/kernel/current/include/errors.h @@ -3,9 +3,9 @@ //========================================================================== // -// errors.h +// errors.h // -// Error values from kernel +// Error values from kernel // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-07 -// Purpose: Define error codes -// Description: Error codes returned by various bits of the kernel. +// Author(s): nickg +// Contributors: nickg +// Date: 1997-10-07 +// Purpose: Define error codes +// Description: Error codes returned by various bits of the kernel. // Usage: #include // //####DESCRIPTIONEND#### diff --git a/packages/kernel/current/include/except.hxx b/packages/kernel/current/include/except.hxx --- a/packages/kernel/current/include/except.hxx +++ b/packages/kernel/current/include/except.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// except.hxx +// except.hxx // -// Exception handling declarations +// Exception handling declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-04-09 -// Purpose: Define exception interfaces -// Description: The classes defined here collectively implement the -// internal API used to register, manage and deliver -// exceptions. -// Usage: #include +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-16 +// Purpose: Define exception interfaces +// Description: The classes defined here collectively implement the +// internal API used to register, manage and deliver +// exceptions. +// Usage: #include // //####DESCRIPTIONEND#### // @@ -62,7 +62,7 @@ typedef void cyg_exception_handler( // Exception delivery interface. This function is exported to the HAL which // invokes it for all exceptions that it is not able to handle itself. -externC void deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); // ------------------------------------------------------------------------- // Exception control class. Depending on the configuration there is either @@ -74,9 +74,9 @@ class Cyg_Exception_Control { #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - cyg_exception_handler *exception_handler[CYG_EXCEPTION_COUNT]; + cyg_exception_handler *exception_handler[CYGNUM_HAL_EXCEPTION_COUNT]; - CYG_ADDRWORD exception_data[CYG_EXCEPTION_COUNT]; + CYG_ADDRWORD exception_data[CYGNUM_HAL_EXCEPTION_COUNT]; #else cyg_exception_handler *exception_handler; // Handler function diff --git a/packages/kernel/current/include/flag.hxx b/packages/kernel/current/include/flag.hxx --- a/packages/kernel/current/include/flag.hxx +++ b/packages/kernel/current/include/flag.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// flag.hxx +// flag.hxx // -// Flag object class declarations +// Flag object class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Flag class interfaces -// Description: The classes defined here provide the APIs for flags. -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Flag class interfaces +// Description: The classes defined here provide the APIs for flags. +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -83,10 +83,10 @@ private: class FlagWaitInfo { public: - Cyg_FlagValue allmask; // these are separate words to - Cyg_FlagValue anymask; // save time in wakeup. - Cyg_FlagValue value_out; // return the value that satisfied - cyg_bool do_clear; + Cyg_FlagValue allmask; // these are separate words to + Cyg_FlagValue anymask; // save time in wakeup. + Cyg_FlagValue value_out; // return the value that satisfied + cyg_bool do_clear; FlagWaitInfo() { value_out = 0; } }; diff --git a/packages/kernel/current/include/instrmnt.h b/packages/kernel/current/include/instrmnt.h --- a/packages/kernel/current/include/instrmnt.h +++ b/packages/kernel/current/include/instrmnt.h @@ -3,9 +3,9 @@ //========================================================================== // -// instrmnt.hxx +// instrmnt.hxx // -// Kernel Instrumentation mechanism +// Kernel Instrumentation mechanism // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-24 -// Purpose: Define kernel instrumentation -// Description: A set of definitions and macros used to implement an +// Author(s): nickg +// Contributors: nickg +// Date: 1997-10-24 +// Purpose: Define kernel instrumentation +// Description: A set of definitions and macros used to implement an // instrumentation interface for the kernel. -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -72,11 +72,15 @@ externC void cyg_instrument_disable( cyg #ifdef CYGPKG_KERNEL_INSTRUMENT -#define CYG_INSTRUMENT(_type_,_arg1_,_arg2_) cyg_instrument(_type_, CYG_ADDRWORD(_arg1_), CYG_ADDRWORD(_arg2_)) +#define CYG_INSTRUMENT(_type_,_arg1_,_arg2_) cyg_instrument(_type_, (CYG_ADDRWORD)(_arg1_), (CYG_ADDRWORD)(_arg2_)) #else // ifdef CYGPKG_KERNEL_INSTRUMENT -#define CYG_INSTRUMENT(_type_,_arg1_,_arg2_) +#define CYG_INSTRUMENT(_type_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif // ifdef CYGPKG_KERNEL_INSTRUMENT @@ -141,6 +145,8 @@ externC void cyg_instrument_disable( cyg #define CYG_INSTRUMENT_EVENT_MUTEX_TRY 4 #define CYG_INSTRUMENT_EVENT_MUTEX_UNLOCK 5 #define CYG_INSTRUMENT_EVENT_MUTEX_WAKE 6 +#define CYG_INSTRUMENT_EVENT_MUTEX_RELEASE 7 +#define CYG_INSTRUMENT_EVENT_MUTEX_RELEASED 8 // Condition variable events #define CYG_INSTRUMENT_EVENT_CONDVAR_WAIT 1 @@ -181,13 +187,13 @@ externC void cyg_instrument_disable( cyg #define CYG_INSTRUMENT_EVENT_ALARM_INTERVAL 6 // Mboxt events -#define CYG_INSTRUMENT_EVENT_MBOXT_WAIT 1 -#define CYG_INSTRUMENT_EVENT_MBOXT_GET 2 -#define CYG_INSTRUMENT_EVENT_MBOXT_GOT 3 -#define CYG_INSTRUMENT_EVENT_MBOXT_TIMEOUT 4 -#define CYG_INSTRUMENT_EVENT_MBOXT_WAKE 5 -#define CYG_INSTRUMENT_EVENT_MBOXT_TRY 6 -#define CYG_INSTRUMENT_EVENT_MBOXT_PUT 7 +#define CYG_INSTRUMENT_EVENT_MBOXT_WAIT 1 +#define CYG_INSTRUMENT_EVENT_MBOXT_GET 2 +#define CYG_INSTRUMENT_EVENT_MBOXT_GOT 3 +#define CYG_INSTRUMENT_EVENT_MBOXT_TIMEOUT 4 +#define CYG_INSTRUMENT_EVENT_MBOXT_WAKE 5 +#define CYG_INSTRUMENT_EVENT_MBOXT_TRY 6 +#define CYG_INSTRUMENT_EVENT_MBOXT_PUT 7 @@ -231,7 +237,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_SCHED(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_SCHED(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -245,7 +255,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_THREAD(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_THREAD(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -259,7 +273,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_INTR(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_INTR(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -273,7 +291,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_MUTEX(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_MUTEX(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -287,7 +309,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_CONDVAR(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_CONDVAR(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -301,7 +327,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_BINSEM(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_BINSEM(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -315,7 +345,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_CNTSEM(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_CNTSEM(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -329,7 +363,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_CLOCK(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_CLOCK(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -343,7 +381,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_ALARM(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_ALARM(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -357,7 +399,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_MBOXT(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_MBOXT(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif @@ -371,7 +417,11 @@ externC void cyg_instrument_disable( cyg #else -#define CYG_INSTRUMENT_USER(_event_,_arg1_,_arg2_) +#define CYG_INSTRUMENT_USER(_event_,_arg1_,_arg2_) \ + CYG_MACRO_START \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg1_)); \ + CYG_UNUSED_PARAM(CYG_ADDRWORD, (CYG_ADDRWORD)(_arg2_)); \ + CYG_MACRO_END #endif diff --git a/packages/kernel/current/include/intr.hxx b/packages/kernel/current/include/intr.hxx --- a/packages/kernel/current/include/intr.hxx +++ b/packages/kernel/current/include/intr.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// intr.hxx +// intr.hxx // -// Interrupt class declaration(s) +// Interrupt class declaration(s) // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Interrupt class interfaces -// Description: The classes defined here provide the APIs for handling +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Interrupt class interfaces +// Description: The classes defined here provide the APIs for handling // interrupts. // Usage: #include "intr.hxx" -// +// // //####DESCRIPTIONEND#### // @@ -87,6 +87,9 @@ externC void interrupt_end( HAL_SavedRegisters *ctx ); +externC void cyg_interrupt_post_dsr( CYG_ADDRWORD intr_obj ); +externC void cyg_interrupt_call_pending_DSRs( void ); + // ------------------------------------------------------------------------- // Interrupt class. This both represents each interrupt and provides a static // interface for controlling the interrupt hardware. @@ -98,6 +101,8 @@ class Cyg_Interrupt friend void interrupt_end( cyg_uint32, Cyg_Interrupt *, HAL_SavedRegisters *); + friend void cyg_interrupt_post_dsr( CYG_ADDRWORD intr_obj ); + friend void cyg_interrupt_call_pending_DSRs( void ); cyg_vector vector; // Interrupt vector @@ -118,8 +123,14 @@ class Cyg_Interrupt // Call any pending DSRs static void call_pending_DSRs(); + static void call_pending_DSRs_inner(); + + // DSR handling interface called by the scheduler and HAL + // interrupt arbiters. void post_dsr(); // Post the DSR for this interrupt + + // Data structures for handling DSR calls. We implement two DSR // handling mechanisms, a list based one and a table based @@ -166,9 +177,11 @@ class Cyg_Interrupt static cyg_uint32 chain_isr(cyg_vector vector, CYG_ADDRWORD data); // Table of interrupt chains - static Cyg_Interrupt *chain_list[CYG_ISR_COUNT]; + static Cyg_Interrupt *chain_list[CYGNUM_HAL_ISR_COUNT]; #endif + + static cyg_int32 disable_counter; // Disable level counter public: @@ -221,9 +234,7 @@ public: // Are interrupts enabled at the CPU? static inline cyg_bool interrupts_enabled() { - CYG_WORD result; // needs to be register sized - HAL_QUERY_INTERRUPTS( result ); - return (0 != result); + return (0 == disable_counter); } // Get the vector for the following calls diff --git a/packages/kernel/current/include/kapi.h b/packages/kernel/current/include/kapi.h --- a/packages/kernel/current/include/kapi.h +++ b/packages/kernel/current/include/kapi.h @@ -3,9 +3,9 @@ /*========================================================================== // -// kapi.h +// kapi.h // -// Native API for Kernel +// Native API for Kernel // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg, dsm -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: Native API for Kernel -// Description: This file describes the native API for using the kernel. +// Author(s): nickg, dsm +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: Native API for Kernel +// Description: This file describes the native API for using the kernel. // It is essentially a set of C wrappers for the C++ class // member functions. -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -60,13 +60,13 @@ extern "C" { /* The following are derived types, they may have different */ /* definitions from these depending on configuration. */ -typedef CYG_ADDRWORD cyg_addrword_t; /* May hold pointer or word */ -typedef cyg_addrword_t cyg_handle_t; /* Object handle */ -typedef cyg_uint32 cyg_priority_t; /* type for priorities */ -typedef cyg_uint32 cyg_code_t; /* type for various codes */ -typedef cyg_uint32 cyg_vector_t; /* Interrupt vector id */ +typedef CYG_ADDRWORD cyg_addrword_t; /* May hold pointer or word */ +typedef cyg_addrword_t cyg_handle_t; /* Object handle */ +typedef cyg_uint32 cyg_priority_t; /* type for priorities */ +typedef cyg_int32 cyg_code_t; /* type for various codes */ +typedef cyg_uint32 cyg_vector_t; /* Interrupt vector id */ -typedef unsigned long long cyg_tick_count_t; +typedef cyg_uint64 cyg_tick_count_t; typedef int cyg_bool_t; @@ -132,9 +132,9 @@ void cyg_scheduler_unlock(void); typedef void cyg_thread_entry_t(cyg_addrword_t); void cyg_thread_create( - cyg_addrword_t sched_info, /* scheduling info (eg pri) */ + cyg_addrword_t sched_info, /* scheduling info (eg pri) */ cyg_thread_entry_t *entry, /* entry point function */ - cyg_addrword_t entry_data, /* entry data */ + cyg_addrword_t entry_data, /* entry data */ char *name, /* optional thread name */ void *stack_base, /* stack base, NULL = alloc */ cyg_ucount32 stack_size, /* stack size, 0 = default */ @@ -144,6 +144,7 @@ void cyg_thread_create( void cyg_thread_exit(void); +void cyg_thread_delete(cyg_handle_t thread); void cyg_thread_suspend(cyg_handle_t thread); @@ -151,6 +152,7 @@ void cyg_thread_resume(cyg_handle_t thre void cyg_thread_kill(cyg_handle_t thread); +void cyg_thread_release(cyg_handle_t thread); void cyg_thread_yield(void); @@ -174,6 +176,23 @@ void cyg_thread_deadline_wait( void cyg_thread_delay(cyg_tick_count_t delay); /*---------------------------------------------------------------------------*/ +/* Per-thread Data */ + +#ifdef CYGVAR_KERNEL_THREADS_DATA + +cyg_ucount32 cyg_thread_new_data_index(void); + +void cyg_thread_free_data_index(cyg_ucount32 index); + +CYG_ADDRWORD cyg_thread_get_data(cyg_ucount32 index); + +CYG_ADDRWORD *cyg_thread_get_data_ptr(cyg_ucount32 index); + +void cyg_thread_set_data(cyg_ucount32 index, CYG_ADDRWORD data); + +#endif + +/*---------------------------------------------------------------------------*/ /* Exception handling. */ /* Replace current exception handler, this may apply to either the */ @@ -197,7 +216,7 @@ void cyg_exception_clear_handler( void cyg_exception_call_handler( cyg_handle_t thread, cyg_code_t exception_number, - cyg_addrword_t exception_info + cyg_addrword_t exception_info ); @@ -218,7 +237,7 @@ enum cyg_ISR_results void cyg_interrupt_create( cyg_vector_t vector, /* Vector to attach to */ cyg_priority_t priority, /* Queue priority */ - cyg_addrword_t data, /* Data pointer */ + cyg_addrword_t data, /* Data pointer */ cyg_ISR_t *isr, /* Interrupt Service Routine */ cyg_DSR_t *dsr, /* Deferred Service Routine */ cyg_handle_t *handle, /* returned handle */ @@ -328,7 +347,7 @@ typedef void cyg_alarm_t(cyg_handle_t al void cyg_alarm_create( cyg_handle_t counter, /* Attached to this counter */ cyg_alarm_t *alarmfn, /* Call-back function */ - cyg_addrword_t data, /* Call-back data */ + cyg_addrword_t data, /* Call-back data */ cyg_handle_t *handle, /* Returned alarm object */ cyg_alarm *alarm /* put alarm here */ ); @@ -487,7 +506,7 @@ void cyg_mempool_fix_get_info(cyg_handle void cyg_semaphore_init( cyg_sem_t *sem, /* Semaphore to init */ - cyg_ucount32 val /* Initial semaphore value */ + cyg_count32 val /* Initial semaphore value */ ); void cyg_semaphore_destroy( cyg_sem_t *sem ); @@ -505,7 +524,7 @@ cyg_bool_t cyg_semaphore_trywait( cyg_se void cyg_semaphore_post( cyg_sem_t *sem ); -void cyg_semaphore_peek( cyg_sem_t *sem, cyg_ucount32 *val ); +void cyg_semaphore_peek( cyg_sem_t *sem, cyg_count32 *val ); /*---------------------------------------------------------------------------*/ /* Flags */ @@ -564,12 +583,14 @@ void cyg_mutex_init( void cyg_mutex_destroy( cyg_mutex_t *mutex ); -void cyg_mutex_lock( cyg_mutex_t *mutex ); +cyg_bool_t cyg_mutex_lock( cyg_mutex_t *mutex ); cyg_bool_t cyg_mutex_trylock( cyg_mutex_t *mutex ); void cyg_mutex_unlock( cyg_mutex_t *mutex ); +void cyg_mutex_release( cyg_mutex_t *mutex ); + /*---------------------------------------------------------------------------*/ /* Condition Variables */ diff --git a/packages/kernel/current/include/kapidata.h b/packages/kernel/current/include/kapidata.h --- a/packages/kernel/current/include/kapidata.h +++ b/packages/kernel/current/include/kapidata.h @@ -3,9 +3,9 @@ /*============================================================================= // -// kapidata.h +// kapidata.h // -// Native API data structures +// Native API data structures // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,22 +25,22 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-03-13 -// Purpose: Native API data structures -// Description: This file defines the structures used in the native API. The +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-13 +// Purpose: Native API data structures +// Description: This file defines the structures used in the native API. The // sizes of these structures are dependent on the system // configuration and must be kept in step with their real // counterparts in the C++ headers. -// Usage: included by kapi.h +// Usage: included by kapi.h // //####DESCRIPTIONEND#### // @@ -163,9 +163,9 @@ struct cyg_alarm typedef struct { #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - cyg_exception_handler_t *exception_handler[CYG_EXCEPTION_COUNT]; + cyg_exception_handler_t *exception_handler[CYGNUM_HAL_EXCEPTION_COUNT]; - CYG_ADDRWORD exception_data[CYG_EXCEPTION_COUNT]; + CYG_ADDRWORD exception_data[CYGNUM_HAL_EXCEPTION_COUNT]; #else cyg_exception_handler_t *exception_handler; // Handler function @@ -300,7 +300,7 @@ struct cyg_mbox #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT cyg_threadqueue put_threadq; /* Queue of waiting threads */ #endif - void * itemqueue[ CYGNUM_KERNEL_SYNCH_MBOX_QUEUE_SIZE ]; + void * itemqueue[ CYGNUM_KERNEL_SYNCH_MBOX_QUEUE_SIZE ]; }; /*---------------------------------------------------------------------------*/ diff --git a/packages/kernel/current/include/kernel.hxx b/packages/kernel/current/include/kernel.hxx --- a/packages/kernel/current/include/kernel.hxx +++ b/packages/kernel/current/include/kernel.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// kernel.hxx +// kernel.hxx // -// Kernel mega-include file +// Kernel mega-include file // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Include all kernel files -// Description: This file contains includes for all the kernel +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Include all kernel files +// Description: This file contains includes for all the kernel // headers. This simplifys things in the sources. -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/ktypes.h b/packages/kernel/current/include/ktypes.h --- a/packages/kernel/current/include/ktypes.h +++ b/packages/kernel/current/include/ktypes.h @@ -3,9 +3,9 @@ //========================================================================== // -// ktypes.h +// ktypes.h // -// Standard types used in the kernel and its interfaces +// Standard types used in the kernel and its interfaces // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,11 +36,11 @@ // Contributors: nickg // Date: 1997-09-08 // Purpose: Define kernel specific types -// Description: Kernel specific types +// Description: Kernel specific types // Usage: #include -// ... -// cyg_priority priority; // etc -// +// ... +// cyg_priority priority; // etc +// //####DESCRIPTIONEND#### // //========================================================================== diff --git a/packages/kernel/current/include/llistt.hxx b/packages/kernel/current/include/llistt.hxx --- a/packages/kernel/current/include/llistt.hxx +++ b/packages/kernel/current/include/llistt.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// llistt.hxx +// llistt.hxx // -// Llistt linked list template class declarations +// Llistt linked list template class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Llistt template class -// Description: The classes defined here provide the APIs for llistts. -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Llistt template class +// Description: The classes defined here provide the APIs for llistts. +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/lottery.hxx b/packages/kernel/current/include/lottery.hxx --- a/packages/kernel/current/include/lottery.hxx +++ b/packages/kernel/current/include/lottery.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// lottery.hxx +// lottery.hxx // -// Lottery scheduler class declarations +// Lottery scheduler class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-10 -// Purpose: Define lottery scheduler implementation -// Description: The classes defined here are used as base classes +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-10 +// Purpose: Define lottery scheduler implementation +// Description: The classes defined here are used as base classes // by the common classes that define schedulers and thread // things. A lottery scheduler provides each thread with a // share of the processor based on the number of tickets that diff --git a/packages/kernel/current/include/mbox.hxx b/packages/kernel/current/include/mbox.hxx --- a/packages/kernel/current/include/mbox.hxx +++ b/packages/kernel/current/include/mbox.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mbox.hxx +// mbox.hxx // -// Plain (void *) Mbox (Message Box/Mailbox) class declarations +// Plain (void *) Mbox (Message Box/Mailbox) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mbox class interfaces -// Description: The classes defined here provide the APIs for mboxes. -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mbox class interfaces +// Description: The classes defined here provide the APIs for mboxes. +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -83,22 +83,22 @@ public: Cyg_Mbox(); // Constructor ~Cyg_Mbox(); // Destructor - void * get(); // get an item; wait if none + void * get(); // get an item; wait if none #ifdef CYGFUN_KERNEL_THREADS_TIMER - void * get( cyg_tick_count timeout ); + void * get( cyg_tick_count timeout ); #endif - void * tryget(); // just one attempt + void * tryget(); // just one attempt - void * peek_item(); // Get next item to be returned + void * peek_item(); // Get next item to be returned // without removing it #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT // then we support it too - cyg_bool put( void *item ); // put an item; wait if full + cyg_bool put( void *item ); // put an item; wait if full #ifdef CYGFUN_KERNEL_THREADS_TIMER - cyg_bool put( void *item, cyg_tick_count timeout ); + cyg_bool put( void *item, cyg_tick_count timeout ); #endif #endif - cyg_bool tryput( void *item ); // fails if Q full + cyg_bool tryput( void *item ); // fails if Q full inline cyg_count32 peek() // Get current count value @@ -107,12 +107,12 @@ public: } inline - cyg_bool waiting_to_get() // Any threads waiting to get? + cyg_bool waiting_to_get() // Any threads waiting to get? { return m.waiting_to_get(); } inline - cyg_bool waiting_to_put() // Any threads waiting to put? + cyg_bool waiting_to_put() // Any threads waiting to put? { return m.waiting_to_put(); } diff --git a/packages/kernel/current/include/mboxt.hxx b/packages/kernel/current/include/mboxt.hxx --- a/packages/kernel/current/include/mboxt.hxx +++ b/packages/kernel/current/include/mboxt.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mboxt.hxx +// mboxt.hxx // -// Mboxt (Message Box/Mailbox) class declarations +// Mboxt (Message Box/Mailbox) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mboxt class interfaces -// Description: The classes defined here provide the APIs for mboxtes. -// Usage: #include -// #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mboxt class interfaces +// Description: The classes defined here provide the APIs for mboxtes. +// Usage: #include +// #include +// // //####DESCRIPTIONEND#### // @@ -68,12 +68,12 @@ private: Cyg_ThreadQueue put_threadq; // Queue of waiting threads #endif static const - cyg_count32 size = QUEUE_SIZE; - T itemqueue[ QUEUE_SIZE ]; + cyg_count32 size = QUEUE_SIZE; + T itemqueue[ QUEUE_SIZE ]; // queue of items // private utility functions // wake up a thread from some queue - inline void wakeup_waiter( Cyg_ThreadQueue &q ); + inline void wakeup_waiter( Cyg_ThreadQueue &q ); public: @@ -82,22 +82,22 @@ public: Cyg_Mboxt(); // Constructor ~Cyg_Mboxt(); // Destructor - cyg_bool get( T &ritem ); // get an item; wait if none + cyg_bool get( T &ritem ); // get an item; wait if none #ifdef CYGFUN_KERNEL_THREADS_TIMER - cyg_bool get( T &ritem, cyg_tick_count abs_timeout ); + cyg_bool get( T &ritem, cyg_tick_count abs_timeout ); #endif - cyg_bool tryget( T &ritem ); // just one attempt + cyg_bool tryget( T &ritem ); // just one attempt - cyg_bool peek_item( T &ritem ); // get next item without + cyg_bool peek_item( T &ritem ); // get next item without // removing it #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT - cyg_bool put( const T item ); // put an item; wait if full + cyg_bool put( const T item ); // put an item; wait if full #ifdef CYGFUN_KERNEL_THREADS_TIMER - cyg_bool put( const T item, cyg_tick_count abs_timeout ); + cyg_bool put( const T item, cyg_tick_count abs_timeout ); #endif #endif - cyg_bool tryput( const T item ); // fails if Q full + cyg_bool tryput( const T item ); // fails if Q full inline cyg_count32 peek() // Get current count value @@ -106,13 +106,13 @@ public: } inline - cyg_bool waiting_to_get() // Any threads waiting? + cyg_bool waiting_to_get() // Any threads waiting? { return ! get_threadq.empty(); } inline - cyg_bool waiting_to_put() // Any threads waiting? + cyg_bool waiting_to_put() // Any threads waiting? { #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT return ! put_threadq.empty(); diff --git a/packages/kernel/current/include/mboxt.inl b/packages/kernel/current/include/mboxt.inl --- a/packages/kernel/current/include/mboxt.inl +++ b/packages/kernel/current/include/mboxt.inl @@ -2,9 +2,9 @@ #define CYGONCE_KERNEL_MBOXT_INL //========================================================================== // -// mboxt.inl +// mboxt.inl // -// Mboxt mbox template class implementation +// Mboxt mbox template class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -24,18 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Mboxt template implementation -// Description: This file contains the implementations of the mboxt +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Mboxt template implementation +// Description: This file contains the implementations of the mboxt // template classes. // //####DESCRIPTIONEND#### @@ -106,7 +106,7 @@ Cyg_Mboxt::~Cyg_Mboxt() template cyg_bool -Cyg_Mboxt::check_this(cyg_assert_class_zeal zeal) +Cyg_Mboxt::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); diff --git a/packages/kernel/current/include/mboxt2.hxx b/packages/kernel/current/include/mboxt2.hxx --- a/packages/kernel/current/include/mboxt2.hxx +++ b/packages/kernel/current/include/mboxt2.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mboxt2.hxx +// mboxt2.hxx // -// Mboxt2 (Message Box/Mailbox) class declarations +// Mboxt2 (Message Box/Mailbox) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mboxt2 class interfaces -// Description: The classes defined here provide the APIs for mboxt2es. -// Usage: #include -// #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mboxt2 class interfaces +// Description: The classes defined here provide the APIs for mboxt2es. +// Usage: #include +// #include +// // //####DESCRIPTIONEND#### // @@ -69,14 +69,14 @@ private: Cyg_ThreadQueue put_threadq; // Queue of waiting threads #endif static const - cyg_count32 size = QUEUE_SIZE; - T itemqueue[ QUEUE_SIZE ]; + cyg_count32 size = QUEUE_SIZE; + T itemqueue[ QUEUE_SIZE ]; // queue of items // private utility functions // wake up a thread from some queue - inline void wakeup_winner( const T &msg ); + inline void wakeup_winner( const T &msg ); #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT - inline void wakeup_putter( void ); + inline void wakeup_putter( void ); #endif public: @@ -86,22 +86,22 @@ public: Cyg_Mboxt2(); // Constructor ~Cyg_Mboxt2(); // Destructor - cyg_bool get( T &ritem ); // get an item; wait if none + cyg_bool get( T &ritem ); // get an item; wait if none #ifdef CYGFUN_KERNEL_THREADS_TIMER - cyg_bool get( T &ritem, cyg_tick_count abs_timeout ); + cyg_bool get( T &ritem, cyg_tick_count abs_timeout ); #endif - cyg_bool tryget( T &ritem ); // just one attempt + cyg_bool tryget( T &ritem ); // just one attempt - cyg_bool peek_item( T &ritem ); // get next item without + cyg_bool peek_item( T &ritem ); // get next item without // removing it #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT - cyg_bool put( const T item ); // put an item; wait if full + cyg_bool put( const T item ); // put an item; wait if full #ifdef CYGFUN_KERNEL_THREADS_TIMER - cyg_bool put( const T item, cyg_tick_count abs_timeout ); + cyg_bool put( const T item, cyg_tick_count abs_timeout ); #endif #endif - cyg_bool tryput( const T item ); // fails if Q full + cyg_bool tryput( const T item ); // fails if Q full inline cyg_count32 peek() // Get current count value @@ -110,13 +110,13 @@ public: } inline - cyg_bool waiting_to_get() // Any threads waiting? + cyg_bool waiting_to_get() // Any threads waiting? { return ! get_threadq.empty(); } inline - cyg_bool waiting_to_put() // Any threads waiting? + cyg_bool waiting_to_put() // Any threads waiting? { #ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT return ! put_threadq.empty(); diff --git a/packages/kernel/current/include/mboxt2.inl b/packages/kernel/current/include/mboxt2.inl --- a/packages/kernel/current/include/mboxt2.inl +++ b/packages/kernel/current/include/mboxt2.inl @@ -2,9 +2,9 @@ #define CYGONCE_KERNEL_MBOXT2_INL //========================================================================== // -// mboxt2.inl +// mboxt2.inl // -// Mboxt2 mbox template class implementation +// Mboxt2 mbox template class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -24,18 +24,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Mboxt2 template implementation -// Description: This file contains the implementations of the mboxt2 +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Mboxt2 template implementation +// Description: This file contains the implementations of the mboxt2 // template classes. // //####DESCRIPTIONEND#### @@ -161,7 +161,7 @@ Cyg_Mboxt2::~Cyg_Mboxt2() template cyg_bool -Cyg_Mboxt2::check_this(cyg_assert_class_zeal zeal) +Cyg_Mboxt2::check_this(cyg_assert_class_zeal zeal) const { if ( Cyg_Thread::DESTRUCT == Cyg_Thread::self()->get_wake_reason() ) // then the whole thing is invalid, and we know it. diff --git a/packages/kernel/current/include/memfixed.hxx b/packages/kernel/current/include/memfixed.hxx --- a/packages/kernel/current/include/memfixed.hxx +++ b/packages/kernel/current/include/memfixed.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// memfixed.hxx +// memfixed.hxx // -// Memory pool with fixed block class declarations +// Memory pool with fixed block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-23 -// Purpose: Define Memfixed class interface -// Description: Inline class for constructing a fixed block allocator -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-23 +// Purpose: Define Memfixed class interface +// Description: Inline class for constructing a fixed block allocator +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mempolt2.hxx b/packages/kernel/current/include/mempolt2.hxx --- a/packages/kernel/current/include/mempolt2.hxx +++ b/packages/kernel/current/include/mempolt2.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mempolt2.hxx +// mempolt2.hxx // -// Mempolt2 (Memory pool template) class declarations +// Mempolt2 (Memory pool template) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,23 +25,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mempolt2 class interface +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mempolt2 class interface // Description: The class defined here provides the APIs for thread-safe, // kernel-savvy memory managers; make a class with the // underlying allocator as the template parameter. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mempolt2.inl b/packages/kernel/current/include/mempolt2.inl --- a/packages/kernel/current/include/mempolt2.inl +++ b/packages/kernel/current/include/mempolt2.inl @@ -3,9 +3,9 @@ //========================================================================== // -// mempolt2.inl +// mempolt2.inl // -// Mempolt2 (Memory pool template) class declarations +// Mempolt2 (Memory pool template) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,23 +25,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mempolt2 class interface +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mempolt2 class interface // Description: The class defined here provides the APIs for thread-safe, // kernel-savvy memory managers; make a class with the // underlying allocator as the template parameter. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -395,7 +395,7 @@ Cyg_Mempolt2::get_allocation_size( cy template inline cyg_bool -Cyg_Mempolt2::check_this(cyg_assert_class_zeal zeal) +Cyg_Mempolt2::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); diff --git a/packages/kernel/current/include/mempoolt.hxx b/packages/kernel/current/include/mempoolt.hxx --- a/packages/kernel/current/include/mempoolt.hxx +++ b/packages/kernel/current/include/mempoolt.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mempoolt.hxx +// mempoolt.hxx // -// Mempoolt (Memory pool template) class declarations +// Mempoolt (Memory pool template) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,23 +25,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mempoolt class interface +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mempoolt class interface // Description: The class defined here provides the APIs for thread-safe, // kernel-savvy memory managers; make a class with the // underlying allocator as the template parameter. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mempoolt.inl b/packages/kernel/current/include/mempoolt.inl --- a/packages/kernel/current/include/mempoolt.inl +++ b/packages/kernel/current/include/mempoolt.inl @@ -3,9 +3,9 @@ //========================================================================== // -// mempoolt.inl +// mempoolt.inl // -// Mempoolt (Memory pool template) class declarations +// Mempoolt (Memory pool template) class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,23 +25,23 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-10 -// Purpose: Define Mempoolt class interface +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-10 +// Purpose: Define Mempoolt class interface // Description: The class defined here provides the APIs for thread-safe, // kernel-savvy memory managers; make a class with the // underlying allocator as the template parameter. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -361,7 +361,7 @@ Cyg_Mempoolt::get_allocation_size( cy template inline cyg_bool -Cyg_Mempoolt::check_this(cyg_assert_class_zeal zeal) +Cyg_Mempoolt::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); diff --git a/packages/kernel/current/include/memvar.hxx b/packages/kernel/current/include/memvar.hxx --- a/packages/kernel/current/include/memvar.hxx +++ b/packages/kernel/current/include/memvar.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// memvar.hxx +// memvar.hxx // -// Memory pool with variable block class declarations +// Memory pool with variable block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-05-21 -// Purpose: Define Memvar class interface -// Description: Inline class for constructing a variable block allocator -// Usage: #include -// +// Author(s): dsm +// Contributors: dsm +// Date: 1998-05-21 +// Purpose: Define Memvar class interface +// Description: Inline class for constructing a variable block allocator +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mfiximpl.hxx b/packages/kernel/current/include/mfiximpl.hxx --- a/packages/kernel/current/include/mfiximpl.hxx +++ b/packages/kernel/current/include/mfiximpl.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mfiximpl.hxx +// mfiximpl.hxx // -// Memory pool with fixed block class declarations +// Memory pool with fixed block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-23 -// Purpose: Define Mfiximpl class interface -// Description: Inline class for constructing a fixed block allocator -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-23 +// Purpose: Define Mfiximpl class interface +// Description: Inline class for constructing a fixed block allocator +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mfiximpl.inl b/packages/kernel/current/include/mfiximpl.inl --- a/packages/kernel/current/include/mfiximpl.inl +++ b/packages/kernel/current/include/mfiximpl.inl @@ -3,9 +3,9 @@ //========================================================================== // -// mfiximpl.inl +// mfiximpl.inl // -// Memory pool with fixed block class declarations +// Memory pool with fixed block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-23 -// Purpose: Define Mfiximpl class interface -// Description: Inline class for constructing a fixed block allocator -// Usage: #include -// #include +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-23 +// Purpose: Define Mfiximpl class interface +// Description: Inline class for constructing a fixed block allocator +// Usage: #include +// #include // //####DESCRIPTIONEND#### // @@ -55,12 +55,14 @@ Cyg_Mempool_Fixed_Implementation::Cyg_Me cyg_int32 i; bitmap = (cyg_uint32 *)base; blocksize = alloc_unit; - numblocks = size / blocksize; - top = base + size; CYG_ASSERT( blocksize > 0, "Bad blocksize" ); CYG_ASSERT( size > 2, "Bad blocksize" ); CYG_ASSERT( blocksize < size, "blocksize, size bad" ); + + numblocks = size / blocksize; + top = base + size; + CYG_ASSERT( numblocks >= 2, "numblocks bad" ); i = (numblocks + 31)/32; // number of words to map blocks diff --git a/packages/kernel/current/include/mlqueue.hxx b/packages/kernel/current/include/mlqueue.hxx --- a/packages/kernel/current/include/mlqueue.hxx +++ b/packages/kernel/current/include/mlqueue.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mlqueue.hxx +// mlqueue.hxx // -// Multi-Level Queue scheduler class declarations +// Multi-Level Queue scheduler class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-10 -// Purpose: Define multilevel queue scheduler implementation -// Description: The classes defined here are used as base classes +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-10 +// Purpose: Define multilevel queue scheduler implementation +// Description: The classes defined here are used as base classes // by the common classes that define schedulers and thread // things. The MLQ scheduler in various configurations // provides standard FIFO, round-robin and single priority @@ -122,6 +122,9 @@ protected: cyg_bool empty(); void rotate(); // Rotate the queue + + void to_head(Cyg_Thread *thread); + }; inline cyg_bool Cyg_ThreadQueue_Implementation::empty() @@ -236,6 +239,10 @@ protected: static void rotate_queue( cyg_priority pri ); // Rotate that run queue + + void to_queue_head( void ); // Move this thread to the head + // of its queue (not necessarily + // a scheduler queue) }; // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/include/mutex.hxx b/packages/kernel/current/include/mutex.hxx --- a/packages/kernel/current/include/mutex.hxx +++ b/packages/kernel/current/include/mutex.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mutex.hxx +// mutex.hxx // -// Mutex class declarations +// Mutex class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Mutex class interfaces -// Description: The classes defined here provide the APIs for mutexes +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Mutex class interfaces +// Description: The classes defined here provide the APIs for mutexes // and condition variables. // Usage: #include -// +// // //####DESCRIPTIONEND#### // @@ -76,6 +76,8 @@ public: cyg_bool trylock(); // try to lock and return success void unlock(); // unlock + + void release(); // release all waiting threads }; diff --git a/packages/kernel/current/include/mvarimpl.hxx b/packages/kernel/current/include/mvarimpl.hxx --- a/packages/kernel/current/include/mvarimpl.hxx +++ b/packages/kernel/current/include/mvarimpl.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// mvarimpl.hxx +// mvarimpl.hxx // -// Memory pool with variable block class declarations +// Memory pool with variable block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-05-21 -// Purpose: Define Mvarimpl class interface -// Description: Inline class for constructing a variable block allocator -// Usage: #include -// +// Author(s): dsm +// Contributors: dsm +// Date: 1998-05-21 +// Purpose: Define Mvarimpl class interface +// Description: Inline class for constructing a variable block allocator +// Usage: #include +// // //####DESCRIPTIONEND#### // diff --git a/packages/kernel/current/include/mvarimpl.inl b/packages/kernel/current/include/mvarimpl.inl --- a/packages/kernel/current/include/mvarimpl.inl +++ b/packages/kernel/current/include/mvarimpl.inl @@ -3,9 +3,9 @@ //========================================================================== // -// mvarimpl.inl +// mvarimpl.inl // -// Memory pool with variable block class declarations +// Memory pool with variable block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-23 -// Purpose: Define Mvarimpl class interface -// Description: Inline class for constructing a variable block allocator -// Usage: #include -// #include +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-23 +// Purpose: Define Mvarimpl class interface +// Description: Inline class for constructing a variable block allocator +// Usage: #include +// #include // //####DESCRIPTIONEND#### // @@ -194,8 +194,8 @@ Cyg_Mempool_Variable_Implementation::fre struct memdq *idq; for (idq = hdq->next; idq != hdq; idq = idq->next) { - if (idq < dq) - break; + if (idq->next > dq) + break; } dq->size = size; if (idq != hdq) { @@ -205,21 +205,21 @@ Cyg_Mempool_Variable_Implementation::fre dq->next->prev = dq; } else { dq->next = idq; - dq->prev = idq->prev; - idq->prev = dq; - dq->prev->next = dq; + dq->prev = idq->prev; + idq->prev = dq; + dq->prev->next = dq; } // Now do coalescing if ((char *)dq + dq->size == (char *)dq->next) { - dq->size += dq->next->size; + dq->size += dq->next->size; dq->next = dq->next->next; - dq->next->prev = dq; + dq->next->prev = dq; } if ((char *)dq->prev + dq->prev->size == (char *)dq) { dq->prev->size += dq->size; - dq->prev->next = dq->next; - dq->next->prev = dq->prev; - dq = dq->prev; + dq->prev->next = dq->next; + dq->next->prev = dq->prev; + dq = dq->prev; } #else dq->prev = hdq; diff --git a/packages/kernel/current/include/pkgconf/kernel.h b/packages/kernel/current/include/pkgconf/kernel.h --- a/packages/kernel/current/include/pkgconf/kernel.h +++ b/packages/kernel/current/include/pkgconf/kernel.h @@ -2,9 +2,9 @@ #define CYGONCE_PKGCONF_KERNEL_H // ==================================================================== // -// pkgconf/kernel.h +// pkgconf/kernel.h // -// Kernel configuration file +// Kernel configuration file // // ==================================================================== //####COPYRIGHTBEGIN#### @@ -24,17 +24,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### // ==================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-29 -// Purpose: To allow the user to edit kernel configuration options. +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-29 +// Purpose: To allow the user to edit kernel configuration options. // Description: // //####DESCRIPTIONEND#### @@ -415,7 +415,7 @@ details. In addition the clock resolution numerator and denominator values should be updated. Typical values for this option would be 150000 on the MN10300 stdeval1 board, - 15625 on the tx39 jmr3904 board, and 20625 on the powerpc + 15625 on the tx39 jmr3904 board, and 20833 on the powerpc cogent board." } @@ -512,6 +512,32 @@ doc ref/ecos-ref/counters-clocks-and-alarms.html } + cdl_option CYGIMP_KERNEL_COUNTERS_SORT_LIST { + display "Sort the counter list" + parent CYGPKG_KERNEL_COUNTERS + type bool + description " + Sorting the counter lists reduces the amount of work that + has to be done when a counter tick is processed, since the + next alarm to expire is always at the front of the list. + However, it makes adding an alarm to the list more expensive + since a search must be done for the correct place to put it. + Many alarms are used to implement timeouts, which seldom trigger, + so it is worthwhile optimizing this case. For this reason + sorted list are disabled by default." + } + + cdl_option CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY { + display "Measure real-time [clock] interrupt latency" + parent CYGPKG_KERNEL_COUNTERS + requires CYGVAR_KERNEL_COUNTERS_CLOCK + description " + Measure the interrupt latency as seen by the real-time clock + timer interrupt. This requires hardware support, defined by + the HAL_CLOCK_LATENCY() macro." + doc ref/ecos-ref/counters-clocks-and-alarms.html + } + }}CFG_DATA */ #define CYGVAR_KERNEL_COUNTERS_CLOCK @@ -522,6 +548,8 @@ #define CYGIMP_KERNEL_COUNTERS_SINGLE_LIST #undef CYGIMP_KERNEL_COUNTERS_MULTI_LIST #define CYGNUM_KERNEL_COUNTERS_MULTI_LIST_SIZE 8 +#undef CYGIMP_KERNEL_COUNTERS_SORT_LIST +#undef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY /* --------------------------------------------------------------------- * Thread-related options @@ -626,8 +654,11 @@ the requirements of all interrupt handlers - these requirements are cumulative if nested interrupted are enabled. Depending on the target architecture, the stack size - typically has to be a multiple of eight or sixteen bytes." - + typically has to be a multiple of eight or sixteen bytes. + This will be overridden where it is used if the + architectural HAL requires a minimum stack size + to handle interrupts correctly." + doc ref/ecos-ref/thread-operations.html } @@ -715,7 +746,7 @@ cdl_option CYGMFN_KERNEL_SYNCH_CONDVAR_TIMED_WAIT { display "Condition variable timed-wait support" parent CYGPKG_KERNEL_SYNCH - requires CYGVAR_KERNEL_COUNTERS_CLOCK + requires CYGFUN_KERNEL_THREADS_TIMER description " This option enables the condition variable timed wait facility." @@ -1000,7 +1031,7 @@ The eCos kernel is implemented in C++, so a C++ interface to the kernel is always available. There is also an optional C API. Additional API's may be provided in future versions." - doc ref/ecos-ref/kernel-apis.html + doc ref/ecos-ref/kernel-apis.html } cdl_option CYGFUN_KERNEL_API_C { @@ -1092,8 +1123,13 @@ #if defined(CYG_HAL_MIPS_JMR3904) #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} -#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 15360 - +#if (CYGHWR_HAL_MIPS_CPU_FREQ == 50) +# define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 15360 +#elif (CYGHWR_HAL_MIPS_CPU_FREQ == 66) +# define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 20736 +#else +#error Unsupported clock frequency +#endif #endif #if defined(CYG_HAL_MIPS_SIM) @@ -1103,13 +1139,27 @@ #endif -#if defined(CYG_HAL_POWERPC_MP860) +#if defined(CYG_HAL_POWERPC_MPC860) +// Period is busclock/16/100. #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} -#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 20625 +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 20833 #endif +#if defined(CYG_HAL_ARM_PID) +#define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 12500 +#endif +#if defined(CYG_HAL_ARM_AEB) +#define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD (240000/16) +#endif + +#if defined(CYG_HAL_I386_LINUX) +#define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} +#define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 10000 +#endif #ifndef CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION @@ -1133,8 +1183,8 @@ * * It is hoped that these defaults are helpful rather than interfering. */ -#define CYGNUM_KERNEL_MAX_SUSPEND_COUNT_ASSERT (500) -#define CYGNUM_KERNEL_MAX_COUNTED_WAKE_COUNT_ASSERT (500) +#define CYGNUM_KERNEL_MAX_SUSPEND_COUNT_ASSERT (500) +#define CYGNUM_KERNEL_MAX_COUNTED_WAKE_COUNT_ASSERT (500) /* * If the scheduler configuration only has a single priority level, @@ -1210,12 +1260,13 @@ #undef CYGVAR_KERNEL_COUNTERS_CLOCK #undef CYGFUN_KERNEL_THREADS_TIMER #undef CYGPKG_KERNEL_EXCEPTIONS +#undef CYGSEM_KERNEL_SCHED_TIMESLICE #undef CYGSEM_KERNEL_SYNCH_MUTEX_PRIORITY_INHERITANCE_SIMPLE #undef CYGSEM_KERNEL_SYNCH_MUTEX_PRIORITY_INHERITANCE #undef CYGPKG_KERNEL_INSTRUMENT #undef CYGDBG_INFRA_DIAG_USE_DEVICE // now lives in infra -#define CYGDBG_KERNEL_DEBUG_GDB_INCLUDE_STUBS +#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS #endif */ diff --git a/packages/kernel/current/include/sched.hxx b/packages/kernel/current/include/sched.hxx --- a/packages/kernel/current/include/sched.hxx +++ b/packages/kernel/current/include/sched.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// sched.hxx +// sched.hxx // -// Scheduler class declaration(s) +// Scheduler class declaration(s) // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Scheduler class interfaces -// Description: These class definitions supply the internal API +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Scheduler class interfaces +// Description: These class definitions supply the internal API // used to scheduler threads. -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -62,8 +62,9 @@ protected: // The following variables are implicit in the API, but are // not publically visible. - static volatile cyg_ucount32 sched_lock; // lock counter - + static volatile cyg_ucount32 sched_lock // lock counter + CYGBLD_ATTRIB_ASM_ALIAS( cyg_scheduler_sched_lock ); + static Cyg_Thread *current_thread; // current running thread static cyg_bool need_reschedule; // set when schedule needed @@ -112,9 +113,12 @@ public: // claim the preemption lock static void lock(); - // release the preemption lock + // release the preemption lock and possibly reschedule static void unlock(); + // release the preemption lock without rescheduling + static void unlock_simple(); + // return a pointer to the current thread static Cyg_Thread *get_current_thread(); diff --git a/packages/kernel/current/include/sched.inl b/packages/kernel/current/include/sched.inl --- a/packages/kernel/current/include/sched.inl +++ b/packages/kernel/current/include/sched.inl @@ -3,9 +3,9 @@ //========================================================================== // -// sched.inl +// sched.inl // -// Scheduler class inlines +// Scheduler class inlines // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,25 +25,25 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define inlines for scheduler classes -// Description: Inline functions for the scheduler classes. These are +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define inlines for scheduler classes +// Description: Inline functions for the scheduler classes. These are // not defined in the header so that we have the option // of making them non-inline. // Usage: // #include // ... -// #include -// ... +// #include +// ... // //####DESCRIPTIONEND#### // @@ -63,6 +63,8 @@ inline void Cyg_Scheduler::lock() // partway through the increment, the lock will be returned to the same // value before we are resumed/rescheduled. + HAL_REORDER_BARRIER(); + sched_lock++; HAL_REORDER_BARRIER(); @@ -83,10 +85,30 @@ inline void Cyg_Scheduler::unlock() HAL_REORDER_BARRIER(); - register cyg_ucount32 lock = sched_lock - 1; + cyg_ucount32 __lock = sched_lock - 1; - if( lock == 0 ) unlock_inner(); - else sched_lock = lock; + if( __lock == 0 ) unlock_inner(); + else sched_lock = __lock; + + HAL_REORDER_BARRIER(); +} + +inline void Cyg_Scheduler::unlock_simple() +{ + // This function decrements the lock, but does not call unlock_inner(). + // Therefore does not immediately allow another thread to run: + // merely makes it possible for some other thread to run at some + // indeterminate future time. This is mainly for use by + // debuggers, it should not normally be used anywhere else. + + CYG_INSTRUMENT_SCHED(UNLOCK,sched_lock,0); + + HAL_REORDER_BARRIER(); + + if (sched_lock > 0) + sched_lock = sched_lock - 1; + + HAL_REORDER_BARRIER(); } diff --git a/packages/kernel/current/include/sema.hxx b/packages/kernel/current/include/sema.hxx --- a/packages/kernel/current/include/sema.hxx +++ b/packages/kernel/current/include/sema.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// sema.hxx +// sema.hxx // -// Semaphore class declarations +// Semaphore class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Semaphore class interfaces -// Description: The classes defined here provide the APIs for binary +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Semaphore class interfaces +// Description: The classes defined here provide the APIs for binary // and counting semaphores. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -110,7 +110,7 @@ public: cyg_count32 peek(); // Get current count value inline - cyg_bool waiting() // Is anyone waiting? + cyg_bool waiting() // Is anyone waiting? { return !queue.empty(); } diff --git a/packages/kernel/current/include/sema2.hxx b/packages/kernel/current/include/sema2.hxx --- a/packages/kernel/current/include/sema2.hxx +++ b/packages/kernel/current/include/sema2.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// sema2.hxx +// sema2.hxx // -// Semaphore class declarations +// Semaphore class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,21 +25,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Semaphore class interfaces -// Description: The classes defined here provide the APIs for binary +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Semaphore class interfaces +// Description: The classes defined here provide the APIs for binary // and counting semaphores. -// Usage: #include -// +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -114,7 +114,7 @@ public: cyg_count32 peek(); // Get current count value inline - cyg_bool waiting() // Is anyone waiting? + cyg_bool waiting() // Is anyone waiting? { return !queue.empty(); } diff --git a/packages/kernel/current/include/thread.hxx b/packages/kernel/current/include/thread.hxx --- a/packages/kernel/current/include/thread.hxx +++ b/packages/kernel/current/include/thread.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// thread.hxx +// thread.hxx // -// Thread class declarations +// Thread class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,20 +25,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define Thread class interfaces -// Description: The classes defined here collectively implement the +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define Thread class interfaces +// Description: The classes defined here collectively implement the // internal API used to create, configure and manage threads. -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -203,7 +203,7 @@ public: RUNNING = 0, // Thread is runnable or running SLEEPING = 1, // Thread is waiting for something to happen - COUNTSLEEP = 2, // Sleep in counted manner + COUNTSLEEP = 2, // Sleep in counted manner SUSPENDED = 4, // Suspend count is non-zero CREATING = 8, // Thread is being created EXITED = 16, // Thread has exited @@ -313,10 +313,12 @@ public: static void yield(); // Yield CPU to another thread -#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE - static void rotate_queue( cyg_priority pri ); + static void rotate_queue( cyg_priority pri ); // Rotate that run queue -#endif + + void to_queue_head( void ); + // Move to the head of its queue + // (not necessarily a scheduler q) static Cyg_Thread *self(); // Return current thread @@ -490,7 +492,7 @@ public: // This defines the main API for manipulating queues of threads. class Cyg_ThreadQueue - : private Cyg_ThreadQueue_Implementation + : public Cyg_ThreadQueue_Implementation { public: diff --git a/packages/kernel/current/include/thread.inl b/packages/kernel/current/include/thread.inl --- a/packages/kernel/current/include/thread.inl +++ b/packages/kernel/current/include/thread.inl @@ -3,9 +3,9 @@ //========================================================================== // -// thread.inl +// thread.inl // -// Thread class inlines +// Thread class inlines // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,24 +25,24 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-09 -// Purpose: Define inlines for thread classes -// Description: Inline implementations of various member functions defined +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-09 +// Purpose: Define inlines for thread classes +// Description: Inline implementations of various member functions defined // in various Thread classes. // Usage: // #include // ... -// #include -// ... +// #include +// ... // //####DESCRIPTIONEND#### @@ -62,6 +62,10 @@ // do this, then we use that, otherwise assume a falling stack. inline void Cyg_HardwareThread::attach_stack(CYG_ADDRESS s_base, cyg_uint32 s_size) { +#ifdef CYGNUM_HAL_STACK_SIZE_MINIMUM + CYG_ASSERT( s_size >= CYGNUM_HAL_STACK_SIZE_MINIMUM, + "Stack size too small"); +#endif stack_base = s_base; stack_size = s_size; #ifdef CYGFUN_KERNEL_THREADS_STACK_LIMIT @@ -228,13 +232,19 @@ inline void Cyg_Thread::yield() // ------------------------------------------------------------------------- -#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE inline void Cyg_Thread::rotate_queue( cyg_priority pri ) { self()->Cyg_SchedThread::rotate_queue( pri ); } -#endif + +// ------------------------------------------------------------------------- + +inline void +Cyg_Thread::to_queue_head( void ) +{ + this->Cyg_SchedThread::to_queue_head(); +} // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/include/timer.hxx b/packages/kernel/current/include/timer.hxx --- a/packages/kernel/current/include/timer.hxx +++ b/packages/kernel/current/include/timer.hxx @@ -3,9 +3,9 @@ //========================================================================== // -// timer.hxx +// timer.hxx // -// Timer handler class declaration(s) +// Timer handler class declaration(s) // //========================================================================== //####COPYRIGHTBEGIN#### @@ -25,18 +25,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-10 -// Purpose: Define Timer class interfaces -// Description: This file defines the Timer class which is derived from +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-10 +// Purpose: Define Timer class interfaces +// Description: This file defines the Timer class which is derived from // the Alarm class to support uITRON type functionality // Usage: #include // diff --git a/packages/kernel/current/src/PKGconf.mak b/packages/kernel/current/src/PKGconf.mak --- a/packages/kernel/current/src/PKGconf.mak +++ b/packages/kernel/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/kernel/current/src/common/clock.cxx b/packages/kernel/current/src/common/clock.cxx --- a/packages/kernel/current/src/common/clock.cxx +++ b/packages/kernel/current/src/common/clock.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// common/clock.cxx +// common/clock.cxx // -// Clock class implementations +// Clock class implementations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-15 -// Purpose: Clock class implementation +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-15 +// Purpose: Clock class implementation // Description: This file contains the definitions of the counter, // clock and alarm class member functions that are common // to all clock implementations. @@ -107,7 +107,7 @@ Cyg_Counter::~Cyg_Counter() #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Counter::check_this( cyg_assert_class_zeal zeal) +bool Cyg_Counter::check_this( cyg_assert_class_zeal zeal) const { // check that we have a non-NULL pointer first if( this == NULL ) return false; @@ -174,6 +174,11 @@ void Cyg_Counter::tick( cyg_uint32 ticks // Now that we have the list pointer, we can use common code for // both list oragnizations. +#ifdef CYGIMP_KERNEL_COUNTERS_SORT_LIST + + // With a sorted alarm list, we can simply pick alarms off the + // front of the list until we find one that is in the future. + while( *alarm_list_ptr != NULL ) { Cyg_Alarm *alarm = *alarm_list_ptr; @@ -204,7 +209,71 @@ void Cyg_Counter::tick( cyg_uint32 ticks } else break; } +#else + // With an unsorted list, we must scan the whole list for + // candidates. We move the whole list to a temporary location + // before doing this so that we are not disturbed by new + // alarms being added to the list. As we consider and + // eliminate alarms we put them onto the done_list and at the + // end we then move it back to where it belongs. + + Cyg_Alarm *done_list = NULL; + + Cyg_Alarm *alarm_list = *alarm_list_ptr; + *alarm_list_ptr = NULL; + + while( alarm_list != NULL ) + { + Cyg_Alarm *alarm = alarm_list; + + CYG_ASSERTCLASS(alarm, "Bad alarm in counter list" ); + + // remove alarm from list + alarm_list = alarm->next; + + if( alarm->trigger <= counter ) + { + if( alarm->interval != 0 ) + { + // The alarm has a retrigger interval. + // Reset the trigger time and requeue + // the alarm. + alarm->trigger += alarm->interval; + add_alarm( alarm ); + } + else alarm->enabled = false; + + CYG_INSTRUMENT_ALARM( CALL, this, alarm ); + + // call alarm function + alarm->alarm(alarm, alarm->data); + + // all done, loop + } + else + { + // add unused alarm to done list. + alarm->next = done_list; + done_list = alarm; + } + } + + // Transfer any alarms that might have been added to the + // alarm list by alarm callbacks to the done list. This + // happens very rarely. + while( *alarm_list_ptr != NULL ) + { + Cyg_Alarm *alarm = *alarm_list_ptr; + *alarm_list_ptr = alarm->next; + alarm->next = done_list; + done_list = alarm; + } + + // return done list to real list + *alarm_list_ptr = done_list; + +#endif Cyg_Scheduler::unlock(); } @@ -287,7 +356,8 @@ void Cyg_Counter::add_alarm( Cyg_Alarm * #error "No CYGIMP_KERNEL_COUNTERS_x_LIST config" #endif - +#ifdef CYGIMP_KERNEL_COUNTERS_SORT_LIST + // Now that we have the list pointer, we can use common code for // both list oragnizations. @@ -304,7 +374,7 @@ void Cyg_Counter::add_alarm( Cyg_Alarm * if( list_alarm->trigger > alarm->trigger ) break; else alarm_list_ptr = &list_alarm->next; } - +#endif // Insert the new alarm at *alarm_list_ptr alarm->next = *alarm_list_ptr; @@ -393,7 +463,7 @@ Cyg_Clock::~Cyg_Clock() #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Clock::check_this( cyg_assert_class_zeal zeal) +bool Cyg_Clock::check_this( cyg_assert_class_zeal zeal) const { // check that we have a non-NULL pointer first if( this == NULL ) return false; @@ -456,7 +526,7 @@ Cyg_Alarm::~Cyg_Alarm() #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Alarm::check_this( cyg_assert_class_zeal zeal) +bool Cyg_Alarm::check_this( cyg_assert_class_zeal zeal) const { // check that we have a non-NULL pointer first if( this == NULL ) return false; @@ -577,7 +647,7 @@ Cyg_RealTimeClock Cyg_RealTimeClock::rtc Cyg_RealTimeClock::Cyg_RealTimeClock() : Cyg_Clock(rtc_resolution), - interrupt(CYG_VECTOR_RTC, 1, (CYG_ADDRWORD)this, isr, dsr) + interrupt(CYGNUM_HAL_INTERRUPT_RTC, 1, (CYG_ADDRWORD)this, isr, dsr) { CYG_REPORT_FUNCTION(); @@ -585,22 +655,44 @@ Cyg_RealTimeClock::Cyg_RealTimeClock() interrupt.attach(); - interrupt.unmask_interrupt(CYG_VECTOR_RTC); + interrupt.unmask_interrupt(CYGNUM_HAL_INTERRUPT_RTC); Cyg_Clock::real_time_clock = this; } +#ifdef HAL_CLOCK_LATENCY +cyg_tick_count total_clock_latency, total_clock_interrupts; +cyg_int32 min_clock_latency = 0x7FFFFFFF; +cyg_int32 max_clock_latency = 0; +bool measure_clock_latency = false; +#endif + // ------------------------------------------------------------------------- cyg_uint32 Cyg_RealTimeClock::isr(cyg_vector vector, CYG_ADDRWORD data) { // CYG_REPORT_FUNCTION(); +#ifdef HAL_CLOCK_LATENCY + if (measure_clock_latency) { + cyg_int32 delta; + HAL_CLOCK_LATENCY(&delta); + // Note: Ignore a latency of 0 when finding min_clock_latency. + if (delta > 0) { + // Valid delta measured + total_clock_latency += delta; + total_clock_interrupts++; + if (min_clock_latency > delta) min_clock_latency = delta; + if (max_clock_latency < delta) max_clock_latency = delta; + } + } +#endif + CYG_INSTRUMENT_CLOCK( ISR, 0, 0); - HAL_CLOCK_RESET( CYG_VECTOR_RTC, CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); + HAL_CLOCK_RESET( CYGNUM_HAL_INTERRUPT_RTC, CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); - Cyg_Interrupt::acknowledge_interrupt(CYG_VECTOR_RTC); + Cyg_Interrupt::acknowledge_interrupt(CYGNUM_HAL_INTERRUPT_RTC); return Cyg_Interrupt::CALL_DSR; } diff --git a/packages/kernel/current/src/common/except.cxx b/packages/kernel/current/src/common/except.cxx --- a/packages/kernel/current/src/common/except.cxx +++ b/packages/kernel/current/src/common/except.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// common/except.cxx +// common/except.cxx // -// Exception handling implementation +// Exception handling implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-04-09 -// Purpose: Exception handling implementation -// Description: This file contains the code that registers and delivers -// exceptions. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-16 +// Purpose: Exception handling implementation +// Description: This file contains the code that registers and delivers +// exceptions. // //####DESCRIPTIONEND#### // @@ -62,13 +62,18 @@ // Null exception handler. This is used to capture exceptions that are // not caught by user supplied handlers. -void cyg_null_exception_handler( +void +cyg_null_exception_handler( CYG_ADDRWORD data, // user supplied data cyg_code exception_number, // exception being raised CYG_ADDRWORD exception_info // any exception specific info ) { + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG3("data=%08x, exception=%d, info=%08x", data, + exception_number, exception_info); CYG_TRACE1( 1, "Uncaught exception: %d", exception_number); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -76,9 +81,10 @@ void cyg_null_exception_handler( Cyg_Exception_Control::Cyg_Exception_Control() { + CYG_REPORT_FUNCTION(); #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - for( int i = 0; i < CYG_EXCEPTION_COUNT ; i++ ) + for( int i = 0; i < CYGNUM_HAL_EXCEPTION_COUNT ; i++ ) exception_handler[i] = cyg_null_exception_handler, exception_data[i] = 0; #else @@ -87,7 +93,7 @@ Cyg_Exception_Control::Cyg_Exception_Con exception_data = 0; #endif - + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -97,7 +103,8 @@ Cyg_Exception_Control::Cyg_Exception_Con // also returns the old values of the exception handler and data to allow // chaining to be implemented. -void Cyg_Exception_Control::register_exception( +void +Cyg_Exception_Control::register_exception( cyg_code exception_number, // exception number cyg_exception_handler handler, // handler function CYG_ADDRWORD data, // data argument @@ -106,10 +113,14 @@ void Cyg_Exception_Control::register_exc ) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG5("exception=%d, handler func=%08x, data=%08x, " + "space for old handler=%08x,space for old data=%08x", + exception_number, handler, data, old_handler, + old_data); - CYG_ASSERT( exception_number <= CYG_EXCEPTION_MAX, + CYG_ASSERT( exception_number <= CYGNUM_HAL_EXCEPTION_MAX, "Out of range exception number"); - CYG_ASSERT( exception_number >= CYG_EXCEPTION_MIN, + CYG_ASSERT( exception_number >= CYGNUM_HAL_EXCEPTION_MIN, "Out of range exception number"); @@ -119,11 +130,13 @@ void Cyg_Exception_Control::register_exc #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE if( old_handler != NULL ) - *old_handler = exception_handler[exception_number]; + *old_handler = exception_handler[exception_number - + CYGNUM_HAL_EXCEPTION_MIN]; if( old_data != NULL ) - *old_data = exception_data[exception_number]; - exception_handler[exception_number] = handler; - exception_data[exception_number] = data; + *old_data = exception_data[exception_number - + CYGNUM_HAL_EXCEPTION_MIN]; + exception_handler[exception_number - CYGNUM_HAL_EXCEPTION_MIN] = handler; + exception_data[exception_number - CYGNUM_HAL_EXCEPTION_MIN] = data; #else @@ -135,28 +148,31 @@ void Cyg_Exception_Control::register_exc exception_data = data; #endif - + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Exception deregistation. Revert the handler for the exception number // to the default. -void Cyg_Exception_Control::deregister_exception( +void +Cyg_Exception_Control::deregister_exception( cyg_code exception_number // exception number ) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("exception number=%d", exception_number); - CYG_ASSERT( exception_number <= CYG_EXCEPTION_MAX, + CYG_ASSERT( exception_number <= CYGNUM_HAL_EXCEPTION_MAX, "Out of range exception number"); - CYG_ASSERT( exception_number >= CYG_EXCEPTION_MIN, + CYG_ASSERT( exception_number >= CYGNUM_HAL_EXCEPTION_MIN, "Out of range exception number"); #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - exception_handler[exception_number] = cyg_null_exception_handler; - exception_data[exception_number] = 0; + exception_handler[exception_number - CYGNUM_HAL_EXCEPTION_MIN] = + cyg_null_exception_handler; + exception_data[exception_number - CYGNUM_HAL_EXCEPTION_MIN] = 0; #else @@ -164,29 +180,35 @@ void Cyg_Exception_Control::deregister_e exception_data = 0; #endif - + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Exception delivery. Call the appropriate exception handler. -void Cyg_Exception_Control::deliver_exception( +void +Cyg_Exception_Control::deliver_exception( cyg_code exception_number, // exception being raised CYG_ADDRWORD exception_info // exception specific info ) { + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG2("exception number=%d, exception info=%08x", + exception_number, exception_info); + cyg_exception_handler *handler = NULL; CYG_ADDRWORD data = 0; - CYG_ASSERT( exception_number <= CYG_EXCEPTION_MAX, + CYG_ASSERT( exception_number <= CYGNUM_HAL_EXCEPTION_MAX, "Out of range exception number"); - CYG_ASSERT( exception_number >= CYG_EXCEPTION_MIN, + CYG_ASSERT( exception_number >= CYGNUM_HAL_EXCEPTION_MIN, "Out of range exception number"); #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - handler = exception_handler[exception_number]; - data = exception_data[exception_number]; + handler = exception_handler[exception_number - CYGNUM_HAL_EXCEPTION_MIN]; + data = exception_data[exception_number - CYGNUM_HAL_EXCEPTION_MIN]; #else @@ -200,16 +222,20 @@ void Cyg_Exception_Control::deliver_exce // just go ahead and call it. handler( data, exception_number, exception_info ); - + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Exception delivery function called from the HAL as a result of a // hardware exception being raised. -externC void deliver_exception( CYG_WORD code, CYG_ADDRWORD data ) +externC void +cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ) { - Cyg_Thread::self()->deliver_exception( code, data ); + CYG_REPORT_FUNCTION(); + Cyg_Thread::self()->deliver_exception( (cyg_code)code, data ); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -218,13 +244,14 @@ externC void deliver_exception( CYG_WORD #ifdef CYGSEM_KERNEL_EXCEPTIONS_GLOBAL -Cyg_Exception_Control Cyg_Thread::exception_control; +Cyg_Exception_Control Cyg_Thread::exception_control + CYG_INIT_PRIORITY(INTERRUPTS); #endif // ------------------------------------------------------------------------- -#endif +#endif // ifdef CYGPKG_KERNEL_EXCEPTIONS // ------------------------------------------------------------------------- // EOF common/except.cxx diff --git a/packages/kernel/current/src/common/kapi.cxx b/packages/kernel/current/src/common/kapi.cxx --- a/packages/kernel/current/src/common/kapi.cxx +++ b/packages/kernel/current/src/common/kapi.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// common/kapi.cxx +// common/kapi.cxx // -// C API Implementation +// C API Implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg, dsm -// Contributors: nickg -// Date: 1998-03-02 -// Purpose: C API Implementation -// Description: C++ implementation of the C API +// Author(s): nickg, dsm +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: C API Implementation +// Description: C++ implementation of the C API // // //####DESCRIPTIONEND#### @@ -134,9 +134,9 @@ externC void cyg_scheduler_unlock(void) /* Thread operations */ externC void cyg_thread_create( - cyg_addrword_t sched_info, /* scheduling info (eg pri) */ + cyg_addrword_t sched_info, /* scheduling info (eg pri) */ cyg_thread_entry_t *entry, /* entry point function */ - cyg_addrword_t entry_data, /* entry data */ + cyg_addrword_t entry_data, /* entry data */ char *name, /* optional thread name */ void *stack_base, /* stack base, NULL = alloc */ cyg_ucount32 stack_size, /* stack size, 0 = default */ @@ -151,8 +151,8 @@ externC void cyg_thread_create( (cyg_thread_entry *)entry, (CYG_ADDRWORD) entry_data, name, - (CYG_ADDRWORD) stack_base, - stack_size + (CYG_ADDRWORD) stack_base, + stack_size ); t=t; @@ -165,6 +165,14 @@ externC void cyg_thread_exit() Cyg_Thread::exit(); } +externC void cyg_thread_delete( cyg_handle_t thread ) +{ + Cyg_Thread *th = (Cyg_Thread *)thread; + if( th->get_state() != Cyg_Thread::EXITED ) + th->kill(); + th->~Cyg_Thread(); +} + externC void cyg_thread_suspend(cyg_handle_t thread) { ((Cyg_Thread *)thread)->suspend(); @@ -188,6 +196,11 @@ externC void cyg_thread_kill( cyg_handle ((Cyg_Thread *)thread)->kill(); } +externC void cyg_thread_release( cyg_handle_t thread) +{ + ((Cyg_Thread *)thread)->release(); +} + externC void cyg_thread_yield() { Cyg_Thread::yield(); @@ -226,6 +239,37 @@ externC void cyg_thread_delay(cyg_tick_c Cyg_Thread::self()->delay(delay); } +/*---------------------------------------------------------------------------*/ +/* Per-thread data */ + +#ifdef CYGVAR_KERNEL_THREADS_DATA + +externC cyg_ucount32 cyg_thread_new_data_index() +{ + return Cyg_Thread::new_data_index(); +} + +externC void cyg_thread_free_data_index(cyg_ucount32 index) +{ + Cyg_Thread::free_data_index(index); +} + +externC CYG_ADDRWORD cyg_thread_get_data(cyg_ucount32 index) +{ + return Cyg_Thread::get_data(index); +} + +externC CYG_ADDRWORD *cyg_thread_get_data_ptr(cyg_ucount32 index) +{ + return Cyg_Thread::get_data_ptr(index); +} + +externC void cyg_thread_set_data(cyg_ucount32 index, CYG_ADDRWORD +data) +{ + Cyg_Thread::self()->set_data(index, data); +} +#endif /*---------------------------------------------------------------------------*/ /* Exception handling. */ @@ -234,9 +278,9 @@ externC void cyg_thread_delay(cyg_tick_c externC void cyg_exception_set_handler( cyg_code_t exception_number, cyg_exception_handler_t *new_handler, - cyg_addrword_t new_data, + cyg_addrword_t new_data, cyg_exception_handler_t **old_handler, - cyg_addrword_t *old_data + cyg_addrword_t *old_data ) { Cyg_Thread::register_exception( @@ -260,7 +304,7 @@ externC void cyg_exception_clear_handler externC void cyg_exception_call_handler( cyg_handle_t thread, cyg_code_t exception_number, - cyg_code_t error_code + cyg_addrword_t error_code ) { Cyg_Thread *t = (Cyg_Thread *)thread; @@ -275,7 +319,7 @@ externC void cyg_exception_call_handler( externC void cyg_interrupt_create( cyg_vector_t vector, /* Vector to attach to */ cyg_priority_t priority, /* Queue priority */ - cyg_addrword_t data, /* Data pointer */ + cyg_addrword_t data, /* Data pointer */ cyg_ISR_t *isr, /* Interrupt Service Routine */ cyg_DSR_t *dsr, /* Deferred Service Routine */ cyg_handle_t *handle, /* returned handle */ @@ -489,7 +533,7 @@ externC cyg_tick_count_t cyg_current_tim externC void cyg_alarm_create( cyg_handle_t counter, /* Attached to this counter */ cyg_alarm_t *alarmfn, /* Call-back function */ - cyg_addrword_t data, /* Call-back data */ + cyg_addrword_t data, /* Call-back data */ cyg_handle_t *handle, /* Returned alarm object */ cyg_alarm *alarm /* put alarm here */ ) @@ -498,8 +542,8 @@ externC void cyg_alarm_create( Cyg_Alarm *t = new((void *)alarm) Cyg_Alarm ( (Cyg_Counter *)counter, - (cyg_alarm_fn *)alarmfn, - (CYG_ADDRWORD)data + (cyg_alarm_fn *)alarmfn, + (CYG_ADDRWORD)data ); t=t; @@ -520,8 +564,8 @@ externC void cyg_alarm_initialize( ) { ((Cyg_Alarm *)alarm)->initialize( - (cyg_tick_count)trigger, - (cyg_tick_count)interval); + (cyg_tick_count)trigger, + (cyg_tick_count)interval); } externC void cyg_alarm_enable( cyg_handle_t alarm ) @@ -635,7 +679,7 @@ externC void cyg_mempool_var_create( Cyg_Mempool_Variable *t = new((void *)var) Cyg_Mempool_Variable ( (cyg_uint8 *)base, - size + size ); t=t; @@ -728,7 +772,7 @@ externC void cyg_mempool_fix_create( Cyg_Mempool_Fixed *t = new((void *)fix) Cyg_Mempool_Fixed ( (cyg_uint8 *)base, - size, + size, blocksize ); t=t; @@ -807,7 +851,7 @@ externC void cyg_mempool_fix_get_info( externC void cyg_semaphore_init( cyg_sem_t *sem, /* Semaphore to init */ - cyg_ucount32 val /* Initial semaphore value */ + cyg_count32 val /* Initial semaphore value */ ) { CYG_ASSERT_SIZES( cyg_sem_t, Cyg_Counting_Semaphore ); @@ -847,7 +891,7 @@ externC void cyg_semaphore_post( cyg_sem ((Cyg_Counting_Semaphore *)sem)->post(); } -externC void cyg_semaphore_peek( cyg_sem_t *sem, cyg_ucount32 *val ) +externC void cyg_semaphore_peek( cyg_sem_t *sem, cyg_count32 *val ) { CYG_CHECK_DATA_PTR( val, "Bad val parameter" ); @@ -950,9 +994,9 @@ externC void cyg_mutex_destroy( cyg_mute // no need to do anything here } -externC void cyg_mutex_lock( cyg_mutex_t *mutex ) +externC cyg_bool_t cyg_mutex_lock( cyg_mutex_t *mutex ) { - ((Cyg_Mutex *)mutex)->lock(); + return ((Cyg_Mutex *)mutex)->lock(); } externC cyg_bool_t cyg_mutex_trylock( cyg_mutex_t *mutex ) @@ -965,6 +1009,11 @@ externC void cyg_mutex_unlock( cyg_mutex ((Cyg_Mutex *)mutex)->unlock(); } +externC void cyg_mutex_release( cyg_mutex_t *mutex ) +{ + ((Cyg_Mutex *)mutex)->release(); +} + /*---------------------------------------------------------------------------*/ /* Condition Variables */ diff --git a/packages/kernel/current/src/common/thread.cxx b/packages/kernel/current/src/common/thread.cxx --- a/packages/kernel/current/src/common/thread.cxx +++ b/packages/kernel/current/src/common/thread.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// common/thread.cxx +// common/thread.cxx // -// Thread class implementations +// Thread class implementations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-15 -// Purpose: Thread class implementation -// Description: This file contains the definitions of the thread class +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-15 +// Purpose: Thread class implementation +// Description: This file contains the definitions of the thread class // member functions that are common to all thread implementations. // //####DESCRIPTIONEND#### @@ -42,6 +42,9 @@ #include // kernel configuration file +#include // HAL_REORDER_BARRIER & + // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include // base kernel types #include // tracing macros #include // assertion macros @@ -78,7 +81,9 @@ Cyg_HardwareThread::thread_entry( Cyg_Th #endif // Zero the lock - Cyg_Scheduler::sched_lock = 0; + HAL_REORDER_BARRIER (); // Prevent the compiler from moving + Cyg_Scheduler::sched_lock = 0; // the assignment into the code above. + HAL_REORDER_BARRIER(); // Call entry point in a loop. @@ -160,59 +165,6 @@ operator new(size_t size, Cyg_Thread *pt { return (void *)ptr; }; // Constructor -// This constructor is deprecated and should be replaced with the new -// one below. Until that happens, any changes must be made to both -// constructors. - -Cyg_Thread::Cyg_Thread( - cyg_thread_entry *entry, // entry point function - CYG_ADDRWORD entry_data, // entry data - cyg_ucount32 stack_size, // stack size, 0 = use default - CYG_ADDRESS stack_base // stack base, NULL = allocate -) -: Cyg_HardwareThread(entry, entry_data, stack_size, stack_base), - Cyg_SchedThread(this, CYG_SCHED_DEFAULT_INFO) -#ifdef CYGFUN_KERNEL_THREADS_TIMER - ,timer(this) -#endif -{ - CYG_REPORT_FUNCTION(); - - // Start the thread in suspended state. - state = SUSPENDED; - suspend_count = 1; - - // Initialize sleep_reason which is used by kill, release - sleep_reason = NONE; - wake_reason = NONE; - - // Assign a 16 bit id to the thread. - unique_id = next_unique_id++; - -#ifdef CYGVAR_KERNEL_THREADS_DATA - // Zero all per-thread data entries. - for( int i = 0; i < CYGNUM_KERNEL_THREADS_DATA_MAX; i++ ) - thread_data[i] = 0; -#endif -#ifdef CYGVAR_KERNEL_THREADS_NAME - name = 0; -#endif -#ifdef CYGVAR_KERNEL_THREADS_LIST - // Add thread to housekeeping list - add_to_list(); -#endif - - Cyg_Scheduler::scheduler.register_thread(this); - - init_context(this); - - CYG_REPORT_RETURN(); -} - -// ------------------------------------------------------------------------- -// Constructor -// This is an alternative constructor that will become the default -// eventually. Cyg_Thread::Cyg_Thread( CYG_ADDRWORD sched_info, // Scheduling parameter(s) @@ -327,7 +279,7 @@ Cyg_Thread::~Cyg_Thread() #ifdef CYGDBG_USE_ASSERTS bool -Cyg_Thread::check_this( cyg_assert_class_zeal zeal) +Cyg_Thread::check_this( cyg_assert_class_zeal zeal) const { // CYG_REPORT_FUNCTION(); @@ -341,6 +293,11 @@ Cyg_Thread::check_this( cyg_assert_class case cyg_thorough: if( (state & SUSPENDED) && (suspend_count == 0) ) return false; case cyg_quick: + // Check that the stackpointer is within its limits. + // Note: This does not check the current stackpointer value + // of the executing thread. + if( (stack_ptr > (stack_base + stack_size)) || + (stack_ptr < stack_base) ) return false; case cyg_trivial: case cyg_none: default: @@ -958,7 +915,7 @@ Cyg_Thread::delay( cyg_tick_count delay) { CYG_REPORT_FUNCTION(); -#if defined(CYGFUN_KERNEL_THREADS_TIMER) && defined(CYGVAR_KERNEL_COUNTERS_CLOCK) +#ifdef CYGFUN_KERNEL_THREADS_TIMER CYG_INSTRUMENT_THREAD(DELAY,this,delay); @@ -1143,12 +1100,19 @@ Cyg_ThreadTimer::alarm( // Data definitions // stack +#ifdef CYGNUM_HAL_STACK_SIZE_MINIMUM +# ifdef CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE +# if CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_MINIMUM -#ifdef CYG_HAL_MIPS -extern char idle_thread_stack[CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE]; -#else -char idle_thread_stack[CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE]; -#endif +// then override the configured stack size +# undef CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE +# define CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM + +# endif // CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_MINIMUM +# endif // CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE +#endif // CYGNUM_HAL_STACK_SIZE_MINIMUM + +static char idle_thread_stack[CYGNUM_KERNEL_THREADS_IDLE_STACK_SIZE]; // Loop counter for debugging/housekeeping cyg_uint32 idle_thread_loops = 1; diff --git a/packages/kernel/current/src/common/timer.cxx b/packages/kernel/current/src/common/timer.cxx --- a/packages/kernel/current/src/common/timer.cxx +++ b/packages/kernel/current/src/common/timer.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// common/timer.cxx +// common/timer.cxx // -// Timer class implementations +// Timer class implementations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-06-11 -// Purpose: Clock class implementation -// Description: This file implements the Timer class which is derived from +// Author(s): dsm +// Contributors: dsm +// Date: 1998-06-11 +// Purpose: Clock class implementation +// Description: This file implements the Timer class which is derived from // the Alarm class to support uITRON type functionality // //####DESCRIPTIONEND#### @@ -95,8 +95,12 @@ Cyg_Timer::initialize( void Cyg_Timer::activate(cyg_uint32 action) // (DISABLE | ENABLE) [|RESET] { - if(!(action & ENABLE)) - disable(); + // we must also disable the alarm when resetting it so as to remove it + // from its queue, so that the enable afterwards places it on the right + // queue instead of assuming that, being enabled, it's already there. + // (if not enabling, the behaviour is unchanged and correct) + if(!(action & ENABLE) || (action & RESET) ) + disable(); // otherwise, the enable below does nothing... if((action & RESET)) { @@ -106,7 +110,7 @@ Cyg_Timer::activate(cyg_uint32 action) } if((action & ENABLE)) { - enable(); + enable(); // ...when it should put the timer on a new queue. } } diff --git a/packages/kernel/current/src/debug/dbg-thread-demux.c b/packages/kernel/current/src/debug/dbg-thread-demux.c --- a/packages/kernel/current/src/debug/dbg-thread-demux.c +++ b/packages/kernel/current/src/debug/dbg-thread-demux.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -66,17 +66,21 @@ // ------------------------------------------------------------------------- +#include // for CYGPKG... and STARTUP + #include +#include + #include "cyg/hal/dbg-threads-api.h" #include "dbg-thread-syscall.h" // ------------------------------------------------------------------------- static int dbg_thread_syscall_rmt( - enum dbg_syscall_ids id, - union dbg_thread_syscall_parms * p - ) + enum dbg_syscall_ids id, + union dbg_thread_syscall_parms * p + ) { switch (id) { @@ -91,23 +95,28 @@ static int dbg_thread_syscall_rmt( break ; case dbg_threadlist_func : return dbg_threadlist(p->threadlist_parms.startflag, - p->threadlist_parms.lastid, - p->threadlist_parms.nextthreadid) ; + p->threadlist_parms.lastid, + p->threadlist_parms.nextthreadid) ; break ; case dbg_threadinfo_func : return dbg_threadinfo(p->info_parms.ref, - p->info_parms.info - ) ; + p->info_parms.info + ) ; break ; case dbg_getthreadreg_func : return dbg_getthreadreg(p->reg_parms.thread, - p->reg_parms.regcount, - p->reg_parms.registers) ; + p->reg_parms.regcount, + p->reg_parms.registers) ; break ; case dbg_setthreadreg_func : return dbg_setthreadreg(p->reg_parms.thread, - p->reg_parms.regcount, - p->reg_parms.registers) ; + p->reg_parms.regcount, + p->reg_parms.registers) ; + break ; + case dbg_scheduler_func : + return dbg_scheduler(p->scheduler_parms.thread, + p->scheduler_parms.lock, + p->scheduler_parms.mode) ; break ; #endif /* CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT */ default : @@ -121,9 +130,9 @@ static int dbg_thread_syscall_rmt( #ifdef CYG_HAL_TX39 static int dbg_thread_syscall_rmt_1( - enum dbg_syscall_ids id, - union dbg_thread_syscall_parms * p - ) + enum dbg_syscall_ids id, + union dbg_thread_syscall_parms * p + ) { register long gp_save; @@ -145,15 +154,37 @@ static int dbg_thread_syscall_rmt_1( // ------------------------------------------------------------------------- +#define DBG_SYSCALL_THREAD_VEC_NUM 15 + +#ifdef CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + +#ifdef CYG_HAL_SPARCLITE_SLEB +# include +# ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON +// then we support talking to CygMon... +# undef DBG_SYSCALL_THREAD_VEC_NUM +# define DBG_SYSCALL_THREAD_VEC_NUM BSP_VEC_MT_DEBUG +# endif +// otherwise this code is wrong for SPARClite but also not used. +#endif + +#endif + void patch_dbg_syscalls(void * vector) { dbg_syscall_func * f ; f = vector ; + +#ifdef CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + #ifdef CYG_HAL_TX39 - *f = dbg_thread_syscall_rmt_1 ; + f[DBG_SYSCALL_THREAD_VEC_NUM] = dbg_thread_syscall_rmt_1 ; #else - *f = dbg_thread_syscall_rmt ; -#endif + f[DBG_SYSCALL_THREAD_VEC_NUM] = dbg_thread_syscall_rmt ; +#endif + +#endif + } // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/src/debug/dbg-thread-syscall.h b/packages/kernel/current/src/debug/dbg-thread-syscall.h --- a/packages/kernel/current/src/debug/dbg-thread-syscall.h +++ b/packages/kernel/current/src/debug/dbg-thread-syscall.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 1998 Cygnus Support + * Copyright (c) 1998,1999 Cygnus Solutions * * The authors hereby grant permission to use, copy, modify, distribute, * and license this software and its documentation for any purpose, provided @@ -28,7 +28,8 @@ enum dbg_syscall_ids dbg_threadlist_func, dbg_threadinfo_func, dbg_getthreadreg_func, - dbg_setthreadreg_func + dbg_setthreadreg_func, + dbg_scheduler_func, } ; @@ -63,8 +64,14 @@ union dbg_thread_syscall_parms int regcount ; void * registers ; } reg_parms ; + struct + { + threadref * thread ; /* 64-bit thread identifier */ + int lock; /* 0 == unlock, 1 == lock */ + int mode; /* 0 == short (step), 1 == continue */ + } scheduler_parms ; } ; typedef int (*dbg_syscall_func) (enum dbg_syscall_ids id, - union dbg_thread_syscall_parms * p ) ; + union dbg_thread_syscall_parms * p ) ; diff --git a/packages/kernel/current/src/debug/dbg_gdb.cxx b/packages/kernel/current/src/debug/dbg_gdb.cxx --- a/packages/kernel/current/src/debug/dbg_gdb.cxx +++ b/packages/kernel/current/src/debug/dbg_gdb.cxx @@ -1,8 +1,8 @@ /*========================================================================== // -// dbg_gdb.c +// dbg_gdb.c // -// GDB Debugging Interface +// GDB Debugging Interface // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-08-22 +// Author(s): nickg +// Contributors: nickg +// Date: 1998-08-22 // Purpose: GDB Debugging Interface -// Description: Interface for calls from GDB stubs into the OS. These +// Description: Interface for calls from GDB stubs into the OS. These // currently mostly support thread awareness. // //####DESCRIPTIONEND#### @@ -54,14 +54,7 @@ #include #include - -#if !defined(CYG_HAL_USE_ROM_MONITOR_CYGMON) \ - && defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) -// FIXME: This really needs to be handled in some other way. #include -externC void __stub_copy_registers(target_register_t * dest, - target_register_t *src); -#endif extern "C" { @@ -179,8 +172,8 @@ externC int dbg_currthread_id(void) //-------------------------------------------------------------------------- externC int dbg_threadlist(int startflag, - threadref * lastthreadid, - threadref * next_thread) + threadref * lastthreadid, + threadref * next_thread) { Cyg_Thread *thread; if( startflag ) @@ -256,8 +249,8 @@ static char *dbg_adddec(char *s, int x) //-------------------------------------------------------------------------- externC int dbg_threadinfo( - threadref * threadid, - struct cygmon_thread_debug_info * info) + threadref * threadid, + struct cygmon_thread_debug_info * info) { static char statebuf[60]; @@ -310,9 +303,9 @@ externC int dbg_threadinfo( //-------------------------------------------------------------------------- externC int dbg_getthreadreg( - threadref * osthreadid, - int regcount, /* count of registers in the array */ - void * regval) /* fillin this array */ + threadref * osthreadid, + int regcount, /* count of registers in the array */ + void * regval) /* fillin this array */ { Cyg_Thread *thread = dbg_get_thread(osthreadid); @@ -325,10 +318,8 @@ externC int dbg_getthreadreg( // got that and we cannot get at it. return 0; #elif defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) - // _registers hold the state of the current thread. - extern target_register_t * _registers; - - __stub_copy_registers ((target_register_t *)regval, _registers); + // registers hold the state of the current thread. + __stub_copy_registers ((target_register_t *)regval, registers); #else return 0; #endif @@ -345,11 +336,11 @@ externC int dbg_getthreadreg( } //-------------------------------------------------------------------------- - + externC int dbg_setthreadreg( - threadref * osthreadid, - int regcount , /* number of registers */ - void * regval) + threadref * osthreadid, + int regcount , /* number of registers */ + void * regval) { Cyg_Thread *thread = dbg_get_thread(osthreadid); @@ -362,10 +353,8 @@ externC int dbg_setthreadreg( // got that and we cannot get at it. return 0; #elif defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) - // _registers hold the state of the current thread. - extern target_register_t * _registers; - - __stub_copy_registers (_registers, (target_register_t *)regval); + // registers hold the state of the current thread. + __stub_copy_registers (registers, (target_register_t *)regval); #else return 0; #endif @@ -378,10 +367,61 @@ externC int dbg_setthreadreg( HAL_SET_GDB_REGISTERS (regs, regval); } - return 1; } +//-------------------------------------------------------------------------- +// Thread scheduler control for debugger. +// Arguments: +// osthreadid : must match currently executing thread. +// Future use: change the currently executing thread. +// lock : 0 == unlock scheduler, 1 == lock scheduler +// mode : 0 == single-instruction step, 1 == free running +// +// Return values: +// 1 == success +// 0 == failure +// -1 == request that the caller handle this itself +// (eg.by disabling interrupts) +// + +externC int dbg_scheduler( + threadref * osthreadid, + int lock, /* 0 == unlock, 1 == lock */ + int mode) /* 0 == step, 1 == continue */ +{ +#if 0 + /* Minimal implementation: let stub do the work. */ + return -1; // Stub will disable interrupts +#else + Cyg_Thread *thread = dbg_get_thread(osthreadid); + + if( thread == 0 ) return 0; // fail + + if( thread == Cyg_Scheduler::get_current_thread() ) + { + // OK to proceed + + if (lock) + { + Cyg_Scheduler::lock(); + } + else + { + if (Cyg_Scheduler::get_sched_lock() >= 1) + Cyg_Scheduler::unlock_simple(); + } + return 1; // success + } + else + { + // Cannot accept any thread other than current one + return 0; // fail + } +#endif +} + + #endif // CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT //-------------------------------------------------------------------------- diff --git a/packages/kernel/current/src/instrmnt/meminst.cxx b/packages/kernel/current/src/instrmnt/meminst.cxx --- a/packages/kernel/current/src/instrmnt/meminst.cxx +++ b/packages/kernel/current/src/instrmnt/meminst.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// instrmnt/meminst.cxx +// instrmnt/meminst.cxx // -// Memory buffer instrumentation functions +// Memory buffer instrumentation functions // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-27 -// Purpose: Instrumentation functions -// Description: The functions in this file are implementations of the +// Author(s): nickg +// Contributors: nickg +// Date: 1997-10-27 +// Purpose: Instrumentation functions +// Description: The functions in this file are implementations of the // standard instrumentation functions that place records // into a memory buffer. // diff --git a/packages/kernel/current/src/instrmnt/nullinst.cxx b/packages/kernel/current/src/instrmnt/nullinst.cxx --- a/packages/kernel/current/src/instrmnt/nullinst.cxx +++ b/packages/kernel/current/src/instrmnt/nullinst.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// instrmnt/null.cxx +// instrmnt/null.cxx // -// Null instrumentation functions +// Null instrumentation functions // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-24 -// Purpose: Instrumentation functions -// Description: The functions in this file are null implementations of the +// Author(s): nickg +// Contributors: nickg +// Date: 1997-10-24 +// Purpose: Instrumentation functions +// Description: The functions in this file are null implementations of the // standard instrumentation functions. These can be used to // eliminate all instrumentation without recompiling. // diff --git a/packages/kernel/current/src/intr/intr.cxx b/packages/kernel/current/src/intr/intr.cxx --- a/packages/kernel/current/src/intr/intr.cxx +++ b/packages/kernel/current/src/intr/intr.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// intr/intr.cxx +// intr/intr.cxx // -// Interrupt class implementations +// Interrupt class implementations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-15 -// Purpose: Interrupt class implementation -// Description: This file contains the definitions of the interrupt -// class. +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-17 +// Purpose: Interrupt class implementation +// Description: This file contains the definitions of the interrupt +// class. // //####DESCRIPTIONEND#### // @@ -54,6 +54,14 @@ #include // ------------------------------------------------------------------------- +// Statics + +// Interrupt disable counter. Note that this is initialized to 1 since +// enable_interrupts() is called in Cyg_Scheduler::start(). + +cyg_int32 Cyg_Interrupt::disable_counter = 1; + +// ------------------------------------------------------------------------- Cyg_Interrupt::Cyg_Interrupt( cyg_vector vec, // Vector to attach to @@ -63,6 +71,10 @@ Cyg_Interrupt::Cyg_Interrupt( cyg_DSR *dr // Deferred Service Routine ) { + CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG5("vector=%d, priority=%d, data=%08x, isr=%08x, " + "dsr=%08x", vec, pri, d, ir, dr); + vector = vec; priority = pri; isr = ir; @@ -81,6 +93,8 @@ Cyg_Interrupt::Cyg_Interrupt( next = NULL; #endif + + CYG_REPORT_RETURN(); }; @@ -88,7 +102,9 @@ Cyg_Interrupt::Cyg_Interrupt( Cyg_Interrupt::~Cyg_Interrupt() { + CYG_REPORT_FUNCTION(); detach(); + CYG_REPORT_RETURN(); }; // ------------------------------------------------------------------------- @@ -96,7 +112,8 @@ Cyg_Interrupt::~Cyg_Interrupt() #ifdef CYGIMP_KERNEL_INTERRUPTS_DSRS_TABLE -Cyg_Interrupt *Cyg_Interrupt::dsr_table[CYGNUM_KERNEL_INTERRUPTS_DSRS_TABLE_SIZE]; +Cyg_Interrupt * +Cyg_Interrupt::dsr_table[CYGNUM_KERNEL_INTERRUPTS_DSRS_TABLE_SIZE]; cyg_ucount32 Cyg_Interrupt::dsr_table_head = 0; @@ -113,7 +130,8 @@ Cyg_Interrupt *Cyg_Interrupt::dsr_list = // ------------------------------------------------------------------------- // Call any pending DSRs -void Cyg_Interrupt::call_pending_DSRs() +void +Cyg_Interrupt::call_pending_DSRs_inner(void) { // CYG_REPORT_FUNCTION(); @@ -159,9 +177,29 @@ void Cyg_Interrupt::call_pending_DSRs() }; +externC void +cyg_interrupt_call_pending_DSRs(void) +{ + Cyg_Interrupt::call_pending_DSRs_inner(); +} + +// This function will be provided by HALs that fully implement +// interrupt stack functionality +externC void +hal_interrupt_stack_call_pending_DSRs(void) + __attribute__ ((weak, alias("cyg_interrupt_call_pending_DSRs"))); + +void +Cyg_Interrupt::call_pending_DSRs(void) +{ + hal_interrupt_stack_call_pending_DSRs(); +} + + // ------------------------------------------------------------------------- -void Cyg_Interrupt::post_dsr() +void +Cyg_Interrupt::post_dsr(void) { // CYG_REPORT_FUNCTION(); @@ -202,8 +240,21 @@ void Cyg_Interrupt::post_dsr() }; // ------------------------------------------------------------------------- +// A C callable interface to Cyg_Interrupt::post_dsr() that can be used from +// the HAL. -externC void interrupt_end( +externC void +cyg_interrupt_post_dsr( CYG_ADDRWORD intr_obj ) +{ + Cyg_Interrupt* intr = (Cyg_Interrupt*) intr_obj; + intr->post_dsr (); +} + +// ------------------------------------------------------------------------- + +// FIXME: should have better name - Jifl +externC void +interrupt_end( cyg_uint32 isr_ret, Cyg_Interrupt *intr, HAL_SavedRegisters *regs @@ -211,15 +262,19 @@ externC void interrupt_end( { // CYG_REPORT_FUNCTION(); - CYG_INSTRUMENT_INTR(END, intr->vector, isr_ret); - + // Sometimes we have a NULL intr object pointer. + cyg_vector vector = (intr!=NULL)?intr->vector:0; + + CYG_INSTRUMENT_INTR(END, vector, isr_ret); + + #ifndef CYGIMP_KERNEL_INTERRUPTS_CHAIN // Only do this if we are in a non-chained configuration. // If we are chained, then chain_isr below will do the DSR // posting. - if( isr_ret & 2 ) intr->post_dsr(); + if( isr_ret & Cyg_Interrupt::CALL_DSR && intr != NULL ) intr->post_dsr(); #endif @@ -246,8 +301,7 @@ externC void interrupt_end( #endif - - CYG_INSTRUMENT_INTR(RESTORE, intr->vector, 0); + CYG_INSTRUMENT_INTR(RESTORE, vector, 0); } // ------------------------------------------------------------------------- @@ -255,7 +309,7 @@ externC void interrupt_end( #ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN -Cyg_Interrupt *Cyg_Interrupt::chain_list[CYG_ISR_COUNT]; +Cyg_Interrupt *Cyg_Interrupt::chain_list[CYGNUM_HAL_ISR_COUNT]; #endif @@ -264,7 +318,8 @@ Cyg_Interrupt *Cyg_Interrupt::chain_list #ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN -cyg_uint32 Cyg_Interrupt::chain_isr(cyg_vector vector, CYG_ADDRWORD data) +cyg_uint32 +Cyg_Interrupt::chain_isr(cyg_vector vector, CYG_ADDRWORD data) { Cyg_Interrupt *p = *(Cyg_Interrupt **)data; @@ -276,9 +331,9 @@ cyg_uint32 Cyg_Interrupt::chain_isr(cyg_ { register cyg_uint32 isr_ret = p->isr(vector, p->data); - if( isr_ret & 2 ) p->post_dsr(); + if( isr_ret & Cyg_Interrupt::CALL_DSR ) p->post_dsr(); - if( isr_ret & 1 ) break; + if( isr_ret & Cyg_Interrupt::HANDLED ) break; } p = p->next; @@ -292,12 +347,13 @@ cyg_uint32 Cyg_Interrupt::chain_isr(cyg_ // ------------------------------------------------------------------------- // Attach an ISR to an interrupt vector. -void Cyg_Interrupt::attach() +void +Cyg_Interrupt::attach(void) { CYG_REPORT_FUNCTION(); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(ATTACH, vector, 0); @@ -313,11 +369,14 @@ void Cyg_Interrupt::attach() if( chain_list[index] == NULL ) { + int in_use; // First Interrupt on this chain, just assign it and register // the chain_isr with the HAL. chain_list[index] = this; + HAL_INTERRUPT_IN_USE( vector, in_use ); + CYG_ASSERT( 0 == in_use, "Interrupt vector not free."); HAL_INTERRUPT_ATTACH( vector, chain_isr, &chain_list[index], NULL ); } else @@ -341,20 +400,30 @@ void Cyg_Interrupt::attach() #else - HAL_INTERRUPT_ATTACH( vector, isr, data, this ); + { + int in_use; + + + HAL_INTERRUPT_IN_USE( vector, in_use ); + CYG_ASSERT( 0 == in_use, "Interrupt vector not free."); + + HAL_INTERRUPT_ATTACH( vector, isr, data, this ); + } #endif + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Detach the ISR from the vector -void Cyg_Interrupt::detach() +void +Cyg_Interrupt::detach(void) { CYG_REPORT_FUNCTION(); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(DETACH, vector, 0); @@ -362,7 +431,11 @@ void Cyg_Interrupt::detach() // Remove the interrupt object from the vector chain. - Cyg_Interrupt **p = &chain_list[vector]; + cyg_uint32 index; + + HAL_TRANSLATE_VECTOR( vector, index ); + + Cyg_Interrupt **p = &chain_list[index]; while( *p != NULL ) { @@ -379,7 +452,7 @@ void Cyg_Interrupt::detach() // If this was the last one, detach the vector. - if( chain_list[vector] == NULL ) + if( chain_list[index] == NULL ) HAL_INTERRUPT_DETACH( vector, chain_isr ); #else @@ -387,33 +460,44 @@ void Cyg_Interrupt::detach() HAL_INTERRUPT_DETACH( vector, isr ); #endif + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Get the current service routine -void Cyg_Interrupt::get_vsr(cyg_vector vector, cyg_VSR **vsr) +void +Cyg_Interrupt::get_vsr(cyg_vector vector, cyg_VSR **vsr) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG2("vector = %d, mem to put VSR in is at %08x", vector, + vsr); - CYG_ASSERT( vector >= CYG_VSR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_VSR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_VSR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_VSR_MAX, "Invalid vector"); HAL_VSR_GET( vector, vsr ); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Install a vector service routine -void Cyg_Interrupt::set_vsr(cyg_vector vector, cyg_VSR *vsr, cyg_VSR **old) +void +Cyg_Interrupt::set_vsr(cyg_vector vector, cyg_VSR *vsr, cyg_VSR **old) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG3( "vector = %d, new vsr is at %08x, mem to put " + "old VSR in is at %08x", vector, vsr, old); + CYG_INSTRUMENT_INTR(SET_VSR, vector, vsr); - CYG_ASSERT( vector >= CYG_VSR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_VSR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_VSR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_VSR_MAX, "Invalid vector"); CYG_INTERRUPT_STATE old_ints; @@ -422,78 +506,103 @@ void Cyg_Interrupt::set_vsr(cyg_vector v HAL_VSR_SET( vector, vsr, old ); HAL_RESTORE_INTERRUPTS(old_ints); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Disable interrupts at the CPU -void Cyg_Interrupt::disable_interrupts() +void +Cyg_Interrupt::disable_interrupts(void) { CYG_REPORT_FUNCTION(); - CYG_INSTRUMENT_INTR(DISABLE, 0, 0); + CYG_INSTRUMENT_INTR(DISABLE, disable_counter+1, 0); CYG_INTERRUPT_STATE dummy; HAL_DISABLE_INTERRUPTS(dummy); - // Keep a disable level counter?? + CYG_ASSERT( disable_counter >= 0 , "Disable counter negative"); + + disable_counter++; + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Re-enable CPU interrupts -void Cyg_Interrupt::enable_interrupts() +void +Cyg_Interrupt::enable_interrupts(void) { CYG_REPORT_FUNCTION(); - CYG_INSTRUMENT_INTR(ENABLE, 0, 0); + CYG_INSTRUMENT_INTR(ENABLE, disable_counter, 0); + + CYG_ASSERT( disable_counter > 0 , "Disable counter not greater than zero"); + + disable_counter--; - HAL_ENABLE_INTERRUPTS(); + if ( disable_counter == 0 ) + { + HAL_ENABLE_INTERRUPTS(); + } + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Mask a specific interrupt in a PIC -void Cyg_Interrupt::mask_interrupt(cyg_vector vector) +void +Cyg_Interrupt::mask_interrupt(cyg_vector vector) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("vector=%d", vector); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(MASK, vector, 0); - HAL_INTERRUPT_MASK( vector ) + HAL_INTERRUPT_MASK( vector ); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Clear PIC mask -void Cyg_Interrupt::unmask_interrupt(cyg_vector vector) +void +Cyg_Interrupt::unmask_interrupt(cyg_vector vector) { CYG_REPORT_FUNCTION(); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(UNMASK, vector, 0); HAL_INTERRUPT_UNMASK( vector ); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Acknowledge interrupt at PIC -void Cyg_Interrupt::acknowledge_interrupt(cyg_vector vector) +void +Cyg_Interrupt::acknowledge_interrupt(cyg_vector vector) { // CYG_REPORT_FUNCTION(); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(ACK, vector, 0); @@ -503,20 +612,25 @@ void Cyg_Interrupt::acknowledge_interrup // ------------------------------------------------------------------------- // Change interrupt detection at PIC -void Cyg_Interrupt::configure_interrupt( +void +Cyg_Interrupt::configure_interrupt( cyg_vector vector, // vector to control cyg_bool level, // level or edge triggered cyg_bool up // hi/lo level, rising/falling edge ) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG3("vector = %d, level = %d, up = %d", vector, level, + up); - CYG_ASSERT( vector >= CYG_ISR_MIN, "Invalid vector"); - CYG_ASSERT( vector <= CYG_ISR_MAX, "Invalid vector"); + CYG_ASSERT( vector >= CYGNUM_HAL_ISR_MIN, "Invalid vector"); + CYG_ASSERT( vector <= CYGNUM_HAL_ISR_MAX, "Invalid vector"); CYG_INSTRUMENT_INTR(CONFIGURE, vector, (level<<1)|up); HAL_INTERRUPT_CONFIGURE( vector, level, up ); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/src/mem/memfixed.cxx b/packages/kernel/current/src/mem/memfixed.cxx --- a/packages/kernel/current/src/mem/memfixed.cxx +++ b/packages/kernel/current/src/mem/memfixed.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// memfixed.cxx +// memfixed.cxx // -// Memory pool with fixed block class declarations +// Memory pool with fixed block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,20 +22,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-03-23 -// Purpose: Define Memfixed class interface -// Description: Inline class for constructing a fixed block allocator -// Usage: #include -// +// Author(s): hmt +// Contributors: hmt +// Date: 1998-03-23 +// Purpose: Define Memfixed class interface +// Description: Inline class for constructing a fixed block allocator +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -66,7 +66,7 @@ #ifdef CYGDBG_USE_ASSERTS cyg_bool -Cyg_Mempool_Fixed::check_this(cyg_assert_class_zeal zeal) +Cyg_Mempool_Fixed::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); // check that we have a non-NULL pointer first diff --git a/packages/kernel/current/src/mem/memvar.cxx b/packages/kernel/current/src/mem/memvar.cxx --- a/packages/kernel/current/src/mem/memvar.cxx +++ b/packages/kernel/current/src/mem/memvar.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// memvar.cxx +// memvar.cxx // -// Memory pool with variable block class declarations +// Memory pool with variable block class declarations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-05-22 -// Description: -// Usage: #include -// +// Author(s): dsm +// Contributors: dsm +// Date: 1998-05-22 +// Description: +// Usage: #include +// // //####DESCRIPTIONEND#### // @@ -63,7 +63,7 @@ #ifdef CYGDBG_USE_ASSERTS cyg_bool -Cyg_Mempool_Variable::check_this(cyg_assert_class_zeal zeal) +Cyg_Mempool_Variable::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); // check that we have a non-NULL pointer first diff --git a/packages/kernel/current/src/sched/bitmap.cxx b/packages/kernel/current/src/sched/bitmap.cxx --- a/packages/kernel/current/src/sched/bitmap.cxx +++ b/packages/kernel/current/src/sched/bitmap.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sched/bitmap.cxx +// sched/bitmap.cxx // -// Bitmap scheduler class implementation +// Bitmap scheduler class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-16 -// Purpose: Bitmap scheduler class implementation -// Description: This file contains the implementations of +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-16 +// Purpose: Bitmap scheduler class implementation +// Description: This file contains the implementations of // Cyg_Scheduler_Implementation and Cyg_SchedThread_Implementation. // // @@ -219,6 +219,8 @@ Cyg_ThreadQueue_Implementation::Cyg_Thre CYG_REPORT_FUNCTION(); wait_queue = 0; // empty queue + + CYG_REPORT_RETURN(); } diff --git a/packages/kernel/current/src/sched/lottery.cxx b/packages/kernel/current/src/sched/lottery.cxx --- a/packages/kernel/current/src/sched/lottery.cxx +++ b/packages/kernel/current/src/sched/lottery.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sched/lottery.cxx +// sched/lottery.cxx // -// Lottery scheduler class implementation +// Lottery scheduler class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-16 -// Purpose: Lottery scheduler class implementation -// Description: This file contains the implementations of +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-16 +// Purpose: Lottery scheduler class implementation +// Description: This file contains the implementations of // Cyg_Scheduler_Implementation and // Cyg_SchedThread_Implementation. // @@ -156,7 +156,7 @@ Cyg_Thread *Cyg_Scheduler_Implementation } CYG_TRACE3( CYG_ENABLE_TRACE, - "seed %08x ticket %d thread %08x", + "seed %08x ticket %d thread %08x", rand_seed, tick, thread); // If the thread has any compensation tickets, take them away since diff --git a/packages/kernel/current/src/sched/mlqueue.cxx b/packages/kernel/current/src/sched/mlqueue.cxx --- a/packages/kernel/current/src/sched/mlqueue.cxx +++ b/packages/kernel/current/src/sched/mlqueue.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sched/mlqueue.cxx +// sched/mlqueue.cxx // -// Multi-level queue scheduler class implementation +// Multi-level queue scheduler class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-16 -// Purpose: Multilevel queue scheduler class implementation -// Description: This file contains the implementations of -// Cyg_Scheduler_Implementation and Cyg_SchedThread_Implementation. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-17 +// Purpose: Multilevel queue scheduler class implementation +// Description: This file contains the implementations of +// Cyg_Scheduler_Implementation and +// Cyg_SchedThread_Implementation. // // //####DESCRIPTIONEND#### @@ -92,14 +93,17 @@ Cyg_Scheduler_Implementation::Cyg_Schedu CYG_REPORT_FUNCTION(); queue_map = 0; + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Choose the best thread to run next -Cyg_Thread *Cyg_Scheduler_Implementation::schedule() +Cyg_Thread * +Cyg_Scheduler_Implementation::schedule(void) { - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTYPE("returning thread %08x"); // The run queue may _never_ be empty, there is always // an idle thread at the lowest priority. @@ -116,14 +120,18 @@ Cyg_Thread *Cyg_Scheduler_Implementation CYG_ASSERT( thread != NULL , "No threads in run queue"); + CYG_REPORT_RETVAL(thread); + return thread; } // ------------------------------------------------------------------------- -void Cyg_Scheduler_Implementation::add_thread(Cyg_Thread *thread) +void +Cyg_Scheduler_Implementation::add_thread(Cyg_Thread *thread) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("thread=%08x", thread); cyg_priority pri = thread->priority; Cyg_ThreadQueue_Implementation *queue = &run_queue[pri]; @@ -157,14 +165,18 @@ void Cyg_Scheduler_Implementation::add_t CYG_ASSERT( queue_map & (1<enqueue(thread); + queue->enqueue(thread); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- -void Cyg_Scheduler_Implementation::rem_thread(Cyg_Thread *thread) +void +Cyg_Scheduler_Implementation::rem_thread(Cyg_Thread *thread) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("thread=%08x", thread); CYG_ASSERT( queue_map != 0, "Run queue empty"); @@ -189,36 +201,44 @@ void Cyg_Scheduler_Implementation::rem_t CYG_ASSERT( queue_map != 0, "Run queue empty"); CYG_ASSERT( queue_map & (1<next = CYG_CLASSFROMBASE(Cyg_Thread, Cyg_SchedThread_Implementation, @@ -287,12 +312,15 @@ void Cyg_SchedThread_Implementation::ins thread->prev = prev; prev->next = thread; prev = thread; + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // remove this from queue -void Cyg_SchedThread_Implementation::remove() +void +Cyg_SchedThread_Implementation::remove(void) { CYG_REPORT_FUNCTION(); @@ -301,12 +329,14 @@ void Cyg_SchedThread_Implementation::rem next = prev = CYG_CLASSFROMBASE(Cyg_Thread, Cyg_SchedThread_Implementation, this); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Yield the processor to another thread -void Cyg_SchedThread_Implementation::yield() +void +Cyg_SchedThread_Implementation::yield(void) { CYG_REPORT_FUNCTION(); @@ -348,6 +378,7 @@ void Cyg_SchedThread_Implementation::yie // Unlock the scheduler and switch threads Cyg_Scheduler::unlock(); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -358,6 +389,7 @@ void Cyg_SchedThread_Implementation::rotate_queue( cyg_priority pri ) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("priority=%d", pri); // Prevent preemption Cyg_Scheduler::lock(); @@ -376,6 +408,34 @@ Cyg_SchedThread_Implementation::rotate_q // Unlock the scheduler and switch threads Cyg_Scheduler::unlock(); + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Move this thread to the head of its queue +// (not necessarily a scheduler queue) + +void +Cyg_SchedThread_Implementation::to_queue_head( void ) +{ + CYG_REPORT_FUNCTION(); + + // Prevent preemption + Cyg_Scheduler::lock(); + + Cyg_Thread *thread = CYG_CLASSFROMBASE(Cyg_Thread, + Cyg_SchedThread_Implementation, + this); + + CYG_ASSERTCLASS( thread, "Bad current thread"); + + Cyg_ThreadQueue *q = thread->get_current_queue(); + q->to_head( thread ); + + // Unlock the scheduler and switch threads + Cyg_Scheduler::unlock(); + + CYG_REPORT_RETURN(); } //========================================================================== @@ -386,13 +446,17 @@ Cyg_ThreadQueue_Implementation::Cyg_Thre CYG_REPORT_FUNCTION(); queue = NULL; // empty queue + + CYG_REPORT_RETURN(); } -void Cyg_ThreadQueue_Implementation::enqueue(Cyg_Thread *thread) +void +Cyg_ThreadQueue_Implementation::enqueue(Cyg_Thread *thread) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("thread=%08x", thread); if( queue == NULL ) queue = thread; else queue->insert(thread); @@ -400,16 +464,20 @@ void Cyg_ThreadQueue_Implementation::enq thread->queue = CYG_CLASSFROMBASE(Cyg_ThreadQueue, Cyg_ThreadQueue_Implementation, this); - + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- -Cyg_Thread *Cyg_ThreadQueue_Implementation::dequeue() +Cyg_Thread * +Cyg_ThreadQueue_Implementation::dequeue(void) { - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTYPE("returning thread %08x"); - if( queue == NULL ) return NULL; + if( queue == NULL ) { + CYG_REPORT_RETVAL(NULL); + return NULL; + } Cyg_Thread *thread = queue; @@ -427,23 +495,27 @@ Cyg_Thread *Cyg_ThreadQueue_Implementati thread->queue = NULL; + CYG_REPORT_RETVAL(thread); return thread; } // ------------------------------------------------------------------------- -Cyg_Thread *Cyg_ThreadQueue_Implementation::highpri() +Cyg_Thread * +Cyg_ThreadQueue_Implementation::highpri(void) { - CYG_REPORT_FUNCTION(); - + CYG_REPORT_FUNCTYPE("returning thread %08x"); + CYG_REPORT_RETVAL(queue); return queue; } // ------------------------------------------------------------------------- -void Cyg_ThreadQueue_Implementation::remove(Cyg_Thread *thread) +void +Cyg_ThreadQueue_Implementation::remove(Cyg_Thread *thread) { CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCARG1("thread=%08x", thread); // If the thread we want it the at the head // of the list, and is on its own, clear the @@ -466,16 +538,33 @@ void Cyg_ThreadQueue_Implementation::rem thread->Cyg_SchedThread_Implementation::remove(); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Rotate the front thread on the queue to the back. -void Cyg_ThreadQueue_Implementation::rotate() +void +Cyg_ThreadQueue_Implementation::rotate(void) { CYG_REPORT_FUNCTION(); queue = queue->next; + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Rotate or move the thread quoted to the front. + +void +Cyg_ThreadQueue_Implementation::to_head(Cyg_Thread *thread) +{ + CYG_REPORT_FUNCTION(); + + queue = thread; + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- diff --git a/packages/kernel/current/src/sched/sched.cxx b/packages/kernel/current/src/sched/sched.cxx --- a/packages/kernel/current/src/sched/sched.cxx +++ b/packages/kernel/current/src/sched/sched.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sched/sched.cxx +// sched/sched.cxx // -// Scheduler class implementations +// Scheduler class implementations // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-15 -// Purpose: Scheduler class implementation -// Description: This file contains the definitions of the scheduler class +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-15 +// Purpose: Scheduler class implementation +// Description: This file contains the definitions of the scheduler class // member functions that are common to all scheduler // implementations. // @@ -171,8 +171,11 @@ void Cyg_Scheduler::unlock_inner() need_reschedule = false; // finished rescheduling } + HAL_REORDER_BARRIER(); // Make sure everything above has happened + // by this point sched_lock = 0; // Clear the lock - + HAL_REORDER_BARRIER(); + #ifdef CYGIMP_KERNEL_INTERRUPTS_DSRS // Now check whether any DSRs got posted during the thread @@ -181,8 +184,6 @@ void Cyg_Scheduler::unlock_inner() // a DSR could have been posted during a reschedule, but would // not be run until the _next_ time we release the sched lock. - HAL_REORDER_BARRIER(); - if( Cyg_Interrupt::DSRs_pending() ) { sched_lock = 1; // reclaim the lock continue; // go back to head of loop @@ -219,6 +220,13 @@ void Cyg_Scheduler::start() need_reschedule = false; // finished rescheduling current_thread = next; // restore current thread pointer +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + // Reference the real time clock. This ensures that at least one + // reference to the kernel_clock.o object exists, without which + // the object will not be included while linking. + CYG_REFERENCE_OBJECT( Cyg_Clock::real_time_clock ); +#endif + // Let the interrupts go Cyg_Interrupt::enable_interrupts(); @@ -231,7 +239,7 @@ void Cyg_Scheduler::start() #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Scheduler::check_this( cyg_assert_class_zeal zeal) +bool Cyg_Scheduler::check_this( cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); diff --git a/packages/kernel/current/src/sync/bin_sem.cxx b/packages/kernel/current/src/sync/bin_sem.cxx --- a/packages/kernel/current/src/sync/bin_sem.cxx +++ b/packages/kernel/current/src/sync/bin_sem.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sync/bin_sem.cxx +// sync/bin_sem.cxx // -// Binary semaphore implementation +// Binary semaphore implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-24 -// Purpose: Cyg_Binary_Semaphore implementation -// Description: This file contains the implementations of the binary semaphore +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-24 +// Purpose: Cyg_Binary_Semaphore implementation +// Description: This file contains the implementations of the binary semaphore // class. // //####DESCRIPTIONEND#### diff --git a/packages/kernel/current/src/sync/cnt_sem.cxx b/packages/kernel/current/src/sync/cnt_sem.cxx --- a/packages/kernel/current/src/sync/cnt_sem.cxx +++ b/packages/kernel/current/src/sync/cnt_sem.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sync/cnt_sem.cxx +// sync/cnt_sem.cxx // -// Counting semaphore implementation +// Counting semaphore implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-24 -// Purpose: Cyg_Counting_Semaphore implementation -// Description: This file contains the implementations of the counting semaphore +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-24 +// Purpose: Cyg_Counting_Semaphore implementation +// Description: This file contains the implementations of the counting semaphore // class. // //####DESCRIPTIONEND#### diff --git a/packages/kernel/current/src/sync/cnt_sem2.cxx b/packages/kernel/current/src/sync/cnt_sem2.cxx --- a/packages/kernel/current/src/sync/cnt_sem2.cxx +++ b/packages/kernel/current/src/sync/cnt_sem2.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sync/cnt_sem2.cxx +// sync/cnt_sem2.cxx // -// Counting semaphore implementation +// Counting semaphore implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-09-24 -// Purpose: Cyg_Counting_Semaphore implementation -// Description: This file contains the implementations of the counting semaphore +// Author(s): nickg +// Contributors: nickg +// Date: 1997-09-24 +// Purpose: Cyg_Counting_Semaphore implementation +// Description: This file contains the implementations of the counting semaphore // class. // //####DESCRIPTIONEND#### diff --git a/packages/kernel/current/src/sync/flag.cxx b/packages/kernel/current/src/sync/flag.cxx --- a/packages/kernel/current/src/sync/flag.cxx +++ b/packages/kernel/current/src/sync/flag.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// flag.cxx +// flag.cxx // -// Flag class implementation +// Flag class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-11 -// Purpose: Flag implementation -// Description: This file contains the implementations of the flag class +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-11 +// Purpose: Flag implementation +// Description: This file contains the implementations of the flag class // //####DESCRIPTIONEND#### // @@ -91,7 +91,7 @@ Cyg_Flag::~Cyg_Flag() #ifdef CYGDBG_USE_ASSERTS cyg_bool -Cyg_Flag::check_this(cyg_assert_class_zeal zeal) +Cyg_Flag::check_this(cyg_assert_class_zeal zeal) const { CYG_REPORT_FUNCTION(); diff --git a/packages/kernel/current/src/sync/mbox.cxx b/packages/kernel/current/src/sync/mbox.cxx --- a/packages/kernel/current/src/sync/mbox.cxx +++ b/packages/kernel/current/src/sync/mbox.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// mbox.cxx +// mbox.cxx // -// Mbox mbox template class implementation +// Mbox mbox template class implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,18 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt -// Contributors: hmt -// Date: 1998-02-11 -// Purpose: Mbox implementation -// Description: This file contains the implementations of the mbox class +// Author(s): hmt +// Contributors: hmt +// Date: 1998-02-11 +// Purpose: Mbox implementation +// Description: This file contains the implementations of the mbox class // //####DESCRIPTIONEND#### // @@ -86,7 +86,7 @@ Cyg_Mbox::~Cyg_Mbox() #ifdef CYGDBG_USE_ASSERTS cyg_bool -Cyg_Mbox::check_this(cyg_assert_class_zeal zeal) +Cyg_Mbox::check_this(cyg_assert_class_zeal zeal) const { return m.check_this(zeal); } @@ -124,7 +124,7 @@ Cyg_Mbox::tryget() return p; } -#ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT +#ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT cyg_bool Cyg_Mbox::put( void *item ) { diff --git a/packages/kernel/current/src/sync/mutex.cxx b/packages/kernel/current/src/sync/mutex.cxx --- a/packages/kernel/current/src/sync/mutex.cxx +++ b/packages/kernel/current/src/sync/mutex.cxx @@ -1,8 +1,8 @@ //========================================================================== // -// sync/mutex.cxx +// sync/mutex.cxx // -// Mutex and condition variable implementation +// Mutex and condition variable implementation // //========================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1997-10-21 -// Purpose: Mutex implementation -// Description: This file contains the implementations of the mutex -// and condition variable classes. +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-02-17 +// Purpose: Mutex implementation +// Description: This file contains the implementations of the mutex +// and condition variable classes. // //####DESCRIPTIONEND#### // @@ -63,6 +63,8 @@ Cyg_Mutex::Cyg_Mutex() locked = false; owner = NULL; + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -74,13 +76,15 @@ Cyg_Mutex::~Cyg_Mutex() CYG_ASSERT( owner == NULL, "Deleting mutex with owner"); CYG_ASSERT( queue.empty(), "Deleting mutex with waiting threads"); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Mutex::check_this( cyg_assert_class_zeal zeal) +bool +Cyg_Mutex::check_this( cyg_assert_class_zeal zeal) const { // CYG_REPORT_FUNCTION(); @@ -109,9 +113,10 @@ bool Cyg_Mutex::check_this( cyg_assert_c // ------------------------------------------------------------------------- // Lock and/or wait -cyg_bool Cyg_Mutex::lock() +cyg_bool +Cyg_Mutex::lock(void) { - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTYPE("returning %d"); cyg_bool result = true; Cyg_Thread *self = Cyg_Thread::self(); @@ -128,7 +133,7 @@ cyg_bool Cyg_Mutex::lock() // thread grabbing the mutex between the wakeup in unlock() and // this thread actually starting. - while( locked ) + while( locked && result ) { CYG_ASSERT( self != owner, "Locking mutex I already own"); @@ -191,15 +196,18 @@ cyg_bool Cyg_Mutex::lock() CYG_ASSERTCLASS( this, "Bad this pointer"); + CYG_REPORT_RETVAL(result); + return result; } // ------------------------------------------------------------------------- // Try to lock and return success -cyg_bool Cyg_Mutex::trylock() +cyg_bool +Cyg_Mutex::trylock(void) { - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTYPE("returning %d"); CYG_ASSERTCLASS( this, "Bad this pointer"); @@ -230,13 +238,15 @@ cyg_bool Cyg_Mutex::trylock() // Unlock the scheduler and maybe switch threads Cyg_Scheduler::unlock(); + CYG_REPORT_RETVAL(result); return result; } // ------------------------------------------------------------------------- // unlock -void Cyg_Mutex::unlock() +void +Cyg_Mutex::unlock(void) { CYG_REPORT_FUNCTION(); @@ -281,6 +291,44 @@ void Cyg_Mutex::unlock() // Unlock the scheduler and maybe switch threads Cyg_Scheduler::unlock(); + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Release all waiting threads. + +void Cyg_Mutex::release() +{ + CYG_REPORT_FUNCTION(); + + // Prevent preemption + Cyg_Scheduler::lock(); + + CYG_INSTRUMENT_MUTEX(RELEASE, this, 0); + + CYG_ASSERTCLASS( this, "Bad this pointer"); + + while( !queue.empty() ) + { + // The queue is non-empty, so grab each + // thread from it and release it. + + Cyg_Thread *thread = queue.dequeue(); + + CYG_ASSERTCLASS( thread, "Bad thread pointer"); + + thread->release(); + + CYG_INSTRUMENT_MUTEX(RELEASED, this, thread); + + } + + CYG_ASSERTCLASS( this, "Bad this pointer"); + + // Unlock the scheduler and maybe switch threads + Cyg_Scheduler::unlock(); + + CYG_REPORT_RETURN(); } //========================================================================== @@ -295,6 +343,8 @@ Cyg_Condition_Variable::Cyg_Condition_Va mutex = &mx; CYG_ASSERTCLASS( mutex, "Invalid mutex argument"); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- @@ -305,48 +355,67 @@ Cyg_Condition_Variable::~Cyg_Condition_V CYG_REPORT_FUNCTION(); CYG_ASSERT( queue.empty(), "Deleting condvar with waiting threads"); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- #ifdef CYGDBG_USE_ASSERTS -bool Cyg_Condition_Variable::check_this( cyg_assert_class_zeal zeal) +bool +Cyg_Condition_Variable::check_this( cyg_assert_class_zeal zeal) const { - CYG_REPORT_FUNCTION(); + bool result = true; + + CYG_REPORT_FUNCTYPE("returning %d"); + CYG_REPORT_FUNCARG1("zeal = %d", zeal); // check that we have a non-NULL pointer first - if( this == NULL ) return false; - - switch( zeal ) - { - case cyg_system_test: - case cyg_extreme: - case cyg_thorough: - if( !mutex->check_this(zeal) ) return false; - case cyg_quick: - case cyg_trivial: - case cyg_none: - default: - break; - }; + if( this == NULL ) + result = false; + else { + + switch( zeal ) + { + case cyg_system_test: + case cyg_extreme: + case cyg_thorough: + if( !mutex->check_this(zeal) ) + result = false; + case cyg_quick: + case cyg_trivial: + case cyg_none: + default: + break; + } + } - return true; + CYG_REPORT_RETVAL(result); + return result; } #endif // ------------------------------------------------------------------------- // Wait for condition to be true +// Note: if this function is entered with the scheduler locked (e.g. to +// suspend DSR processing) then there is no need to take the lock. Also +// in this case, exit with the scheduler locked, which allows this function +// to be used in a totally thread-safe manner. -void Cyg_Condition_Variable::wait() +void +Cyg_Condition_Variable::wait(void) { CYG_REPORT_FUNCTION(); Cyg_Thread *self = Cyg_Thread::self(); - // Prevent preemption - Cyg_Scheduler::lock(); + cyg_int32 current_lock = Cyg_Scheduler::get_sched_lock(); + + if (current_lock == 0) + // Prevent preemption + Cyg_Scheduler::lock(); CYG_ASSERTCLASS( this, "Bad this pointer"); CYG_ASSERTCLASS( mutex, "Corrupt mutex"); @@ -388,18 +457,29 @@ void Cyg_Condition_Variable::wait() // atomically relative to other threads, to avoid races, it is not // necessary for us to re-acquire the mutex in the same atomic // action. Hence we can do it after unlocking the scheduler. - - mutex->lock(); + // We need to loop here in case the thread is released while waiting + // for the mutex. It is essential that we exit this function with the + // mutex claimed. + + while ( !mutex->lock() ) + continue; CYG_ASSERTCLASS( this, "Bad this pointer"); CYG_ASSERTCLASS( mutex, "Corrupt mutex"); CYG_ASSERT( mutex->owner == self, "Not mutex owner"); + + CYG_REPORT_RETURN(); + + if (current_lock) + // Reacquire the DSR pseudo lock + Cyg_Scheduler::lock(); } // ------------------------------------------------------------------------- // Wake one thread -void Cyg_Condition_Variable::signal() +void +Cyg_Condition_Variable::signal(void) { CYG_REPORT_FUNCTION(); @@ -434,12 +514,14 @@ void Cyg_Condition_Variable::signal() // Unlock the scheduler and maybe switch threads Cyg_Scheduler::unlock(); + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Set cond true, wake all threads -void Cyg_Condition_Variable::broadcast() +void +Cyg_Condition_Variable::broadcast(void) { CYG_REPORT_FUNCTION(); @@ -472,16 +554,20 @@ void Cyg_Condition_Variable::broadcast() // Unlock the scheduler and maybe switch threads Cyg_Scheduler::unlock(); + + CYG_REPORT_RETURN(); } // ------------------------------------------------------------------------- // Optional timed wait on a CV -#if defined(CYGMFN_KERNEL_SYNCH_CONDVAR_TIMED_WAIT) && defined(CYGFUN_KERNEL_THREADS_TIMER) +#if defined(CYGMFN_KERNEL_SYNCH_CONDVAR_TIMED_WAIT) -cyg_bool Cyg_Condition_Variable::wait( cyg_tick_count timeout ) +cyg_bool +Cyg_Condition_Variable::wait( cyg_tick_count timeout ) { - CYG_REPORT_FUNCTION(); + CYG_REPORT_FUNCTYPE("returning %d"); + CYG_REPORT_FUNCARG1("timeout = %d", timeout); CYG_ASSERTCLASS( this, "Bad this pointer"); CYG_ASSERTCLASS( mutex, "Corrupt mutex"); @@ -547,10 +633,15 @@ cyg_bool Cyg_Condition_Variable::wait( c // necessary for us to re-acquire the mutex in the same atomic // action. Hence we can do it after unlocking the scheduler. - mutex->lock(); + // FIXME: what if we woke up above due to TIMEOUT/DESTRUCT/BREAK? + // In that situation is it correct to not lock the mutex? + if (false != result) + result = mutex->lock(); CYG_ASSERTCLASS( this, "Bad this pointer"); CYG_ASSERTCLASS( mutex, "Corrupt mutex"); + + CYG_REPORT_RETVAL(result); return result; } diff --git a/packages/kernel/current/tests/PKGconf.mak b/packages/kernel/current/tests/PKGconf.mak --- a/packages/kernel/current/tests/PKGconf.mak +++ b/packages/kernel/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -30,14 +30,23 @@ PACKAGE := kernel include ../../../pkgconf/pkgconf.mak +include ../../../pkgconf/system.mak TESTS := bin_sem0 bin_sem1 bin_sem2 clock0 clock1 cnt_sem0 cnt_sem1 \ - except1 flag0 flag1 intr0\ + except1 flag0 flag1 intr0 \ kclock0 kclock1 kexcept1 kintr0 kmbox1 kmemfix1 kmemvar1 \ - kmutex0 kmutex1 ksched1 ksem0 ksem1 kcache1 kflag0 kflag1 \ + kmutex0 kmutex1 ksched1 ksem0 ksem1 kflag0 kflag1 \ kthread0 kthread1 mbox1 memfix1 memfix2 memvar1 memvar2\ - mutex0 mutex1 sched1 sync2 sync3 \ - thread0 thread1 thread2 release kill thread_gdb + mutex0 mutex1 mutex2 sched1 sync2 sync3 \ + thread0 thread1 thread2 release kill thread_gdb \ + tm_basic +ifndef CYG_HAL_ARM +TESTS += kcache1 kcache2 +endif + +ifndef CYGPKG_HAL_ARM_AEB +TESTS += stress_threads +endif include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/kernel/current/tests/bin_sem0.cxx b/packages/kernel/current/tests/bin_sem0.cxx --- a/packages/kernel/current/tests/bin_sem0.cxx +++ b/packages/kernel/current/tests/bin_sem0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/bin_sem1.cxx b/packages/kernel/current/tests/bin_sem1.cxx --- a/packages/kernel/current/tests/bin_sem1.cxx +++ b/packages/kernel/current/tests/bin_sem1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -98,6 +98,11 @@ void bin_sem1_main( void ) new_thread( entry0, 0); new_thread( entry1, 1); +#ifdef CYGIMP_THREAD_PRIORITY + thread[0]->set_priority( 4 ); + thread[1]->set_priority( 5 ); // make sure the threads execute as intended +#endif + Cyg_Scheduler::start(); CYG_TEST_FAIL_FINISH("Not reached"); diff --git a/packages/kernel/current/tests/bin_sem2.cxx b/packages/kernel/current/tests/bin_sem2.cxx --- a/packages/kernel/current/tests/bin_sem2.cxx +++ b/packages/kernel/current/tests/bin_sem2.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -49,15 +49,7 @@ #include -#if defined(CYG_HAL_MIPS_SIM) -// Reduce number of loops in simulated TX39 so that -// it runs within the timeout. -#define PHILO_LOOPS 100 -#else - -#define PHILO_LOOPS 1000 - -#endif +static cyg_ucount16 PHILO_LOOPS = 1000; #define PHILOSOPHERS 15 #define NTHREADS PHILOSOPHERS @@ -67,7 +59,7 @@ static Cyg_Binary_Semaphore chopstick[PH static char pstate[PHILOSOPHERS+1]; // state of each philosopher -static cyg_ucount8 state_changes = 0; +static cyg_ucount16 state_changes = 0; // state_changes keep track of number of changes to pstate so // we can exit after we've seen enough. @@ -195,6 +187,9 @@ void bin_sem2_main( void ) { CYG_TEST_INIT(); + if (cyg_test_is_simulator) + PHILO_LOOPS = 100; + for( int i = 0; i < PHILOSOPHERS; i++ ) { pstate[i] = 'T'; // starting state diff --git a/packages/kernel/current/tests/clock0.cxx b/packages/kernel/current/tests/clock0.cxx --- a/packages/kernel/current/tests/clock0.cxx +++ b/packages/kernel/current/tests/clock0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -131,7 +131,7 @@ void clock0_main(void) CHECK( 0xfffffffc == counter0.current_value_lo() ); CHECK( 0 == counter0.current_value_hi() ); - counter0.tick( 0x13 ); // Overflows 32 bits + counter0.tick( 0x13 ); // Overflows 32 bits CHECK( 0x10000000fULL == counter0.current_value() ); CHECK( 0xf == counter0.current_value_lo() ); @@ -184,47 +184,47 @@ void clock0_main(void) alarm2.initialize(21,2); CHECK( 0x00 == called ); - counter0.tick(); // 12 a0 + counter0.tick(); // 12 a0 CHECK( 0x01 == called ); alarm1.initialize(13,0); - counter0.tick(); // 13 a1 + counter0.tick(); // 13 a1 CHECK( 0x03 == called ); alarm1.initialize(17,0); - counter0.tick(); // 14 + counter0.tick(); // 14 CHECK( 0x03 == called ); - counter0.tick(); // 15 a0 + counter0.tick(); // 15 a0 CHECK( 0x02 == called ); - counter0.tick(2); // 17 a1 + counter0.tick(2); // 17 a1 CHECK( 0x00 == called ); - counter0.tick(); // 18 a0 + counter0.tick(); // 18 a0 CHECK( 0x01 == called ); - counter0.tick(3); // 21 a0 a2 + counter0.tick(3); // 21 a0 a2 CHECK( 0x14 == called ); - counter0.tick(2); // 23 a2 + counter0.tick(2); // 23 a2 CHECK( 0x00 == called ); alarm2.disable(); - counter0.tick(2); // 25 a0(24) + counter0.tick(2); // 25 a0(24) CHECK( 0x01 == called ); alarm2.enable(); // a2 (enabled at 25) CHECK( 0x15 == called ); - counter0.tick(); // 26 + counter0.tick(); // 26 CHECK( 0x15 == called ); - counter0.tick(2); // 28 a0(27) a2(27) + counter0.tick(2); // 28 a0(27) a2(27) CHECK( 0x00 == called ); - counter0.tick(3); // 31 a0(30) a2(29 31) + counter0.tick(3); // 31 a0(30) a2(29 31) CHECK( 0x01 == called ); Cyg_Clock::cyg_resolution res0; @@ -265,7 +265,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH( "N/A: Kernel real-time clock disabled"); + CYG_TEST_NA( "Kernel real-time clock disabled"); } #endif // def CYGVAR_KERNEL_COUNTERS_CLOCK diff --git a/packages/kernel/current/tests/clock1.cxx b/packages/kernel/current/tests/clock1.cxx --- a/packages/kernel/current/tests/clock1.cxx +++ b/packages/kernel/current/tests/clock1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -61,21 +61,14 @@ #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK -#if defined(CYG_HAL_MIPS_SIM) -// Reduce time in simulated TX39 so that -// it runs within the timeout. -#define TEST_DELAY 1000000000ll -#else - -#define TEST_DELAY 5000000000ll - -#endif #define NTHREADS 1 #include "testaux.hxx" static cyg_uint32 ticks; // Number of ticks thread[0] will delay for +static cyg_uint64 TEST_DELAY; + static void entry0( CYG_ADDRWORD data ) { ((Cyg_Thread *)data)->delay(ticks); @@ -87,6 +80,12 @@ void clock1_main( void ) { CYG_TEST_INIT(); + if (cyg_test_is_simulator) { + TEST_DELAY = 100000000ll; + } else { + TEST_DELAY = 3000000000ll; + } + new_thread(entry0, (CYG_ADDRWORD)&thread_obj[0]); Cyg_Clock::cyg_resolution res; @@ -111,7 +110,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH( "N/A: Kernel real-time clock disabled"); + CYG_TEST_NA( "Kernel real-time clock disabled"); } #endif // def CYGVAR_KERNEL_COUNTERS_CLOCK diff --git a/packages/kernel/current/tests/cnt_sem0.cxx b/packages/kernel/current/tests/cnt_sem0.cxx --- a/packages/kernel/current/tests/cnt_sem0.cxx +++ b/packages/kernel/current/tests/cnt_sem0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/cnt_sem1.cxx b/packages/kernel/current/tests/cnt_sem1.cxx --- a/packages/kernel/current/tests/cnt_sem1.cxx +++ b/packages/kernel/current/tests/cnt_sem1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/except1.cxx b/packages/kernel/current/tests/except1.cxx --- a/packages/kernel/current/tests/except1.cxx +++ b/packages/kernel/current/tests/except1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,8 +30,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm -// Date: 1998-06-15 +// Contributors: dsm, jlarmour +// Date: 1999-02-16 // Description: Test basic exception functionality //####DESCRIPTIONEND#### @@ -76,7 +76,7 @@ static void handler1(CYG_ADDRWORD data, CYG_TEST_CHECK((CYG_ADDRWORD)&d0 == data, "handler given wrong data"); #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - CYG_TEST_CHECK(number == CYG_EXCEPTION_MAX, "handler given wrong number"); + CYG_TEST_CHECK(number == CYGNUM_HAL_EXCEPTION_MAX, "handler given wrong number"); #else CYG_UNUSED_PARAM(cyg_code, number); #endif @@ -110,14 +110,14 @@ static void entry0( CYG_ADDRWORD data ) CYG_UNUSED_PARAM(CYG_ADDRESS, data); p->register_exception( - CYG_EXCEPTION_MAX, + CYGNUM_HAL_EXCEPTION_MAX, &handler1, (CYG_ADDRWORD)&d0, &old_handler, &old_data); p->register_exception( - CYG_EXCEPTION_MAX, + CYGNUM_HAL_EXCEPTION_MAX, &handler1, (CYG_ADDRWORD)&d0, &old_handler1, @@ -128,14 +128,19 @@ static void entry0( CYG_ADDRWORD data ) CYG_TEST_CHECK(old_data1 == (CYG_ADDRWORD)&d0, "register exception: old_data not those previously registered"); - p->deliver_exception(CYG_EXCEPTION_MAX, (CYG_ADDRWORD)99); + p->deliver_exception(CYGNUM_HAL_EXCEPTION_MAX, (CYG_ADDRWORD)99); CYG_TEST_INFO("handler 1 returned"); - p->deregister_exception(CYG_EXCEPTION_MAX); - p->deregister_exception(CYG_EXCEPTION_MAX); + p->deregister_exception(CYGNUM_HAL_EXCEPTION_MAX); + p->deregister_exception(CYGNUM_HAL_EXCEPTION_MAX); - for(n = CYG_EXCEPTION_MIN; n <= CYG_EXCEPTION_MAX; n++) { +#ifdef CYGPKG_HAL_I386_LINUX + // We can't catch segmentation violation exceptions on Linux. + CYG_TEST_PASS_FINISH("Except 1 OK"); +#endif + + for(n = CYGNUM_HAL_EXCEPTION_MIN; n <= CYGNUM_HAL_EXCEPTION_MAX; n++) { p->register_exception( n, handler0, @@ -144,7 +149,7 @@ static void entry0( CYG_ADDRWORD data ) &old_data1); } - CYG_TEST_INFO("Attempting to provoke exception"); + CYG_TEST_PASS("Attempting to provoke exception"); cause_exception(); @@ -160,12 +165,23 @@ cyg_VSR *old_vsr; void except0_main( void ) { + // Use CYG_TEST_GDBCMD _before_ CYG_TEST_INIT() + CYG_TEST_GDBCMD("handle SIGBUS nostop"); + CYG_TEST_GDBCMD("handle SIGSEGV nostop"); + CYG_TEST_INIT(); -#ifdef CYG_HAL_TX39_JMR3904 - - HAL_VSR_SET( CYG_VECTOR_LOAD_ADDRESS, __default_exception_vsr, &old_vsr ); - +#ifdef HAL_VSR_SET_TO_ECOS_HANDLER + // Reclaim the VSR off CygMon possibly +#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, NULL ); +#endif #endif new_thread(entry0, 0); @@ -184,7 +200,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("NA: Exceptions disabled"); + CYG_TEST_NA("Exceptions disabled"); } #endif // def CYGPKG_KERNEL_EXCEPTIONS diff --git a/packages/kernel/current/tests/flag0.cxx b/packages/kernel/current/tests/flag0.cxx --- a/packages/kernel/current/tests/flag0.cxx +++ b/packages/kernel/current/tests/flag0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/flag1.cxx b/packages/kernel/current/tests/flag1.cxx --- a/packages/kernel/current/tests/flag1.cxx +++ b/packages/kernel/current/tests/flag1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -92,7 +92,7 @@ static void entry0( CYG_ADDRWORD data ) f2.wait(0x2, Cyg_Flag::OR); CYG_TEST_CHECK(20==q,"bad synchronization"); f2.wait(0x10, Cyg_Flag::AND, - Cyg_Clock::real_time_clock->current_value()+20); + Cyg_Clock::real_time_clock->current_value()+80); CYG_TEST_CHECK(21==q++,"bad synchronization"); #endif f0.wait(1, Cyg_Flag::OR); @@ -136,7 +136,7 @@ static void entry1( CYG_ADDRWORD data ) CYG_TEST_CHECK(!f0.waiting(), "waiting()"); #ifdef CYGFUN_KERNEL_THREADS_TIMER - thread[1]->delay(10); // allow other threads to reach wait on f1 + thread[1]->delay(40); // allow other threads to reach wait on f1 CYG_TEST_CHECK(f1.waiting(), "waiting() not true"); f1.setbits(); // wake one of t0,t2 CYG_TEST_CHECK(f1.waiting(), "waiting() not true"); @@ -152,7 +152,7 @@ static void entry1( CYG_ADDRWORD data ) f2.setbits(0x2); // synchronize with t0,t2 CYG_TEST_CHECK(20==q,"bad synchronization"); f2.wait(0x20, Cyg_Flag::AND, - Cyg_Clock::real_time_clock->current_value()+10); + Cyg_Clock::real_time_clock->current_value()+40); CYG_TEST_CHECK(22==q++,"bad synchronization"); #endif @@ -169,7 +169,7 @@ static void entry2( CYG_ADDRWORD data ) f2.wait(0x2, Cyg_Flag::OR); CYG_TEST_CHECK(20==q,"bad synchronization"); CYG_TEST_CHECK(0==f2.wait(0x40, Cyg_Flag::AND, - Cyg_Clock::real_time_clock->current_value()+5), + Cyg_Clock::real_time_clock->current_value()+20), "timed wait() wrong"); CYG_TEST_CHECK(20==q++,"bad synchronization"); // Now wake t0 before it times out diff --git a/packages/kernel/current/tests/intr0.cxx b/packages/kernel/current/tests/intr0.cxx --- a/packages/kernel/current/tests/intr0.cxx +++ b/packages/kernel/current/tests/intr0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,8 +30,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm -// Date: 1998-06-15 +// Contributors: dsm, jlarmour +// Date: 1999-02-16 // Description: Very basic test of interrupt objects // Options: // CYGIMP_KERNEL_INTERRUPTS_DSRS_TABLE @@ -51,6 +51,9 @@ static cyg_ISR isr0, isr1; static cyg_DSR dsr0, dsr1; +static char intr0_obj[sizeof(Cyg_Interrupt)]; +static char intr1_obj[sizeof(Cyg_Interrupt)]; + static cyg_uint32 isr0(cyg_vector vector, CYG_ADDRWORD data) { CYG_UNUSED_PARAM(CYG_ADDRWORD, data); @@ -100,28 +103,38 @@ void intr0_main( void ) CHECK(flash()); CHECK(flash()); - Cyg_Interrupt intr0 = - Cyg_Interrupt( 1 % (CYG_ISR_COUNT), 1, (CYG_ADDRWORD)777, isr0, dsr0 ); - - Cyg_Interrupt intr1 = - Cyg_Interrupt( 15 % (CYG_ISR_COUNT), 1, 888, isr1, dsr1 ); - + // Make sure the chosen levels are not already in use. + int in_use; + cyg_vector lvl1 = 1 % (CYGNUM_HAL_ISR_COUNT); + HAL_INTERRUPT_IN_USE( lvl1, in_use ); + Cyg_Interrupt* intr0 = NULL; + if (!in_use) + intr0 = new((void *)&intr0_obj[0]) Cyg_Interrupt( lvl1, 1, (CYG_ADDRWORD)777, isr0, dsr0 ); + + cyg_vector lvl2 = 15 % (CYGNUM_HAL_ISR_COUNT); + HAL_INTERRUPT_IN_USE( lvl2, in_use ); + Cyg_Interrupt* intr1 = NULL; + if (!in_use && lvl1 != lvl2) + intr1 = new((void *)&intr1_obj[0]) Cyg_Interrupt( lvl2, 1, 888, isr1, dsr1 ); // Check these functions at least exist - Cyg_Interrupt::enable_interrupts(); Cyg_Interrupt::disable_interrupts(); - intr0.attach(); - intr1.attach(); - intr0.detach(); - intr1.detach(); + if (intr0) + intr0->attach(); + if (intr1) + intr1->attach(); + if (intr0) + intr0->detach(); + if (intr1) + intr1->detach(); // If this attaching interrupt replaces the previous interrupt // instead of adding to it we could be in a big mess if the // vector is being used by something important. - - cyg_vector v = 11 % CYG_VSR_COUNT; + + cyg_vector v = 11 % CYGNUM_HAL_VSR_COUNT; cyg_VSR *old_vsr, *new_vsr; Cyg_Interrupt::set_vsr( v, vsr0, &old_vsr ); Cyg_Interrupt::get_vsr( v, &new_vsr ); @@ -133,7 +146,7 @@ void intr0_main( void ) Cyg_Interrupt::set_vsr( v, new_vsr ); new_vsr = NULL; - Cyg_Interrupt::get_vsr( v, &new_vsr ); + Cyg_Interrupt::get_vsr( v, &new_vsr ); CHECK( vsr0 == new_vsr ); Cyg_Interrupt::set_vsr( v, old_vsr ); @@ -141,11 +154,18 @@ void intr0_main( void ) new_vsr = NULL; Cyg_Interrupt::get_vsr( v, &new_vsr ); CHECK( old_vsr == new_vsr ); - + CHECK( NULL != vsr0 ); - cyg_vector v1 = 6 % CYG_ISR_COUNT; - + cyg_vector v1; +#ifdef CYGPKG_HAL_TX39 + // This can be removed when PR 17831 is fixed + if ( cyg_test_is_simulator ) + v1 = 12 % CYGNUM_HAL_ISR_COUNT; + else /* NOTE TRAILING ELSE... */ +#endif + v1 = 6 % CYGNUM_HAL_ISR_COUNT; + Cyg_Interrupt::mask_interrupt(v1); Cyg_Interrupt::unmask_interrupt(v1); diff --git a/packages/kernel/current/tests/kcache1.c b/packages/kernel/current/tests/kcache1.c --- a/packages/kernel/current/tests/kcache1.c +++ b/packages/kernel/current/tests/kcache1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -35,6 +35,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -44,6 +46,7 @@ #include #include +#include // ------------------------------------------------------------------------- // If the HAL does not supply this, we supply our own version @@ -68,7 +71,7 @@ CYG_MACRO_END // ------------------------------------------------------------------------- #define NTHREADS 1 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -79,6 +82,10 @@ static char stack[NTHREADS][STACKSIZE]; volatile char m[MAXSIZE]; +#ifndef MAX_STRIDE +#define MAX_STRIDE 64 +#endif + // ------------------------------------------------------------------------- static void time0(register cyg_uint32 stride) @@ -90,7 +97,11 @@ static void time0(register cyg_uint32 st count0 = cyg_current_time(); - for(k=0; k<4000;k++) { + k = 0; + if ( cyg_test_is_simulator ) + k = 3960; + + for(; k<4000;k++) { for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) { c=m[stride*j]; } @@ -107,7 +118,7 @@ void time1(void) { cyg_uint32 i; - for(i=1; i<65; i+=i) { + for(i=1; i<=MAX_STRIDE; i+=i) { time0(i); } } @@ -118,48 +129,59 @@ void time1(void) static void entry0( cyg_addrword_t data ) { + register CYG_INTERRUPT_STATE oldints; + + HAL_DISABLE_INTERRUPTS(oldints); HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache off"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache on Icache off"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_ENABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache on"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_ENABLE(); HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache on Icache on"); time1(); + HAL_DISABLE_INTERRUPTS(oldints); HAL_DCACHE_PURGE_ALL(); HAL_ICACHE_INVALIDATE_ALL(); HAL_DCACHE_INVALIDATE_ALL(); HAL_ICACHE_DISABLE(); HAL_DCACHE_DISABLE(); + HAL_RESTORE_INTERRUPTS(oldints); CYG_TEST_INFO("Dcache off Icache off"); time1(); - CYG_TEST_PASS_FINISH("End of test"); } @@ -170,7 +192,7 @@ void kcache2_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kcache1", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_scheduler_start(); @@ -198,7 +220,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("N/A: " N_A_MSG); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG diff --git a/packages/kernel/current/tests/kcache2.c b/packages/kernel/current/tests/kcache2.c new file mode 100644 --- /dev/null +++ b/packages/kernel/current/tests/kcache2.c @@ -0,0 +1,614 @@ +/*================================================================= +// +// kcache2.c +// +// Cache feature/timing tests +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov, based on kcache1.c by dsm +// Contributors: jskov +// Date: 1998-12-10 +// Description: Tests some of the more exotic cache macros. +//####DESCRIPTIONEND#### +*/ + +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + +#include + +#include + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK +#ifdef CYGFUN_KERNEL_API_C + +#include +#include + +// ------------------------------------------------------------------------- + +#define NTHREADS 1 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL + +// The following are defaults for loop variables. Note they will be overriden +// on simulator targets, where detected - there is no point testing a cache +// which doesn't exist :-). + +#define TEST_DZERO_LOOPS 5000 // default number of loops for test_dzero() +#define TIME_ILOCK_LOOPS 10000 // default number of loops for time_ilock() +#define TIME_DLOCK_LOOPS 10000 // default number of loops for time_dlock() + + +static cyg_handle_t thread[NTHREADS]; + +static cyg_thread thread_obj[NTHREADS]; +static char stack[NTHREADS][STACKSIZE]; + +#define MAXSIZE 1<<18 + +volatile char m[MAXSIZE]; + +// ------------------------------------------------------------------------- +// Test of data cache zero. +// o Timing comparison with instructions doing the same amount of work. +// o Check that area cleared with the DCACHE_ZERO macro contains zeros. +#ifdef HAL_DCACHE_ZERO +static void test_dzero(void) +{ + register cyg_uint32 k, i; + cyg_tick_count_t count0, count1; + cyg_ucount32 t; + volatile cyg_uint32* aligned_p; + volatile cyg_uint32* p; + register CYG_INTERRUPT_STATE oldints; + cyg_ucount32 test_dzero_loops = TEST_DZERO_LOOPS; + + CYG_TEST_INFO("Data cache zero"); + + if (cyg_test_is_simulator) + test_dzero_loops=10; + + aligned_p = (volatile cyg_uint32*) + (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) + & ~(HAL_DCACHE_LINE_SIZE-1)); + + // Time with conventional instructions. + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + count0 = cyg_current_time(); + for (k = 0; k < test_dzero_loops; k++) { + p = aligned_p; + for (i = 0; i < HAL_DCACHE_SETS; i++) { +#if (16 == HAL_DCACHE_LINE_SIZE) + *p++ = 0; + *p++ = 0; + *p++ = 0; + *p++ = 0; +#else +#error "Not defined for this cache line size." +#endif + } + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time with instructions: %d\n", t); + + // Initialize the area with non-zero so we can check whether + // the macro cleared the area properly. + p = aligned_p; + for (i = 0; + i < HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE/sizeof(cyg_uint32); + i++) { + *p++ = 0xdeadbeef; + } + + // Time with DCACHE_ZERO. + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + count0 = cyg_current_time(); + for (k = 0; k < test_dzero_loops; k++) { + HAL_DCACHE_ZERO(aligned_p, HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time with HAL_DCACHE_ZERO: %d\n", t); + + // Verify that the area was actually cleared. + { + cyg_uint32 d; + + d = 0; + p = aligned_p; + for (i = 0; + i < HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE/sizeof(cyg_uint32); + i++) { + d |= *p++; + } + + CYG_TEST_CHECK(0 == d, "region not properly cleared"); + } + +} +#endif + +// ------------------------------------------------------------------------- +// Test of data cache write hint. +// Just check that the macro compiles. +#ifdef HAL_DCACHE_WRITE_HINT +static void test_dwrite_hint(void) +{ + register cyg_uint32 k; + register CYG_INTERRUPT_STATE oldints; + + CYG_TEST_INFO("Data cache write hint"); + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + HAL_DCACHE_WRITE_HINT(&m[HAL_DCACHE_LINE_SIZE*2], 2*HAL_DCACHE_LINE_SIZE); + for (k = 0; k < 20; k++); + m[HAL_DCACHE_LINE_SIZE*2] = 42; +} +#endif + +// ------------------------------------------------------------------------- +// Test of data cache read hint. +// Just check that the macro compiles. +#ifdef HAL_DCACHE_READ_HINT +static void test_dread_hint(void) +{ + register char c; + register cyg_uint32 k; + register CYG_INTERRUPT_STATE oldints; + + CYG_TEST_INFO("Data cache read hint"); + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + HAL_DCACHE_READ_HINT(&m[HAL_DCACHE_LINE_SIZE*2], 2*HAL_DCACHE_LINE_SIZE); + for (k = 0; k < 20; k++); + c = m[HAL_DCACHE_LINE_SIZE*2]; +} +#endif + +// ------------------------------------------------------------------------- +// Test of data cache line store. +// Just check that the macro compiles. +#ifdef HAL_DCACHE_STORE +static void test_dstore(void) +{ + volatile cyg_uint8* aligned_p; + cyg_int32 i; + register CYG_INTERRUPT_STATE oldints; + + CYG_TEST_INFO("Data cache store region"); + + for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) + m[i] = 0; + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + aligned_p = (volatile cyg_uint8*) + (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) + & ~(HAL_DCACHE_LINE_SIZE-1)); + + aligned_p[0] = 42; + + HAL_DCACHE_STORE(aligned_p, HAL_DCACHE_LINE_SIZE); +} +#endif + +// ------------------------------------------------------------------------- +// Test of data cache line flush. +// o Requires write-back cache. +// o Check that flushed data is written to memory. +// o Simple range check of macro. +#ifdef HAL_DCACHE_FLUSH +static void test_dflush(void) +{ + volatile cyg_uint8* aligned_p; + cyg_int32 i; + register CYG_INTERRUPT_STATE oldints; + + CYG_TEST_INFO("Data cache flush region"); + + for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) + m[i] = 0; + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + aligned_p = (volatile cyg_uint8*) + (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) + & ~(HAL_DCACHE_LINE_SIZE-1)); + + aligned_p[0] = 42; + aligned_p[HAL_DCACHE_LINE_SIZE] = 43; + + HAL_DCACHE_FLUSH(aligned_p, HAL_DCACHE_LINE_SIZE); + + HAL_DCACHE_DISABLE(); + + CYG_TEST_CHECK(42 == aligned_p[0], + "memory didn't contain flushed data"); + CYG_TEST_CHECK(0 == aligned_p[HAL_DCACHE_LINE_SIZE], + "flushed beyond region"); + + HAL_DCACHE_ENABLE(); + +} +#endif + +// ------------------------------------------------------------------------- +// Test of data cache line invalidate. +// o Requires write-back cache. +// o Check that invalidated data is not written to memory and is invalidated +// in the cache. +// o Simple range check of macro. +#ifdef HAL_DCACHE_INVALIDATE +static void test_dinvalidate(void) +{ + volatile cyg_uint8* aligned_p; + cyg_int32 i; + register CYG_INTERRUPT_STATE oldints; + + CYG_TEST_INFO("Data cache invalidate region"); + + for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) + m[i] = 0; + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + aligned_p = (volatile cyg_uint8*) + (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) + & ~(HAL_DCACHE_LINE_SIZE-1)); + + aligned_p[0] = 43; + aligned_p[HAL_DCACHE_LINE_SIZE-1] = 43; + + aligned_p[HAL_DCACHE_LINE_SIZE] = 42; + + HAL_DCACHE_INVALIDATE(aligned_p, HAL_DCACHE_LINE_SIZE); + + CYG_TEST_CHECK(0 == aligned_p[0] && + 0 == aligned_p[HAL_DCACHE_LINE_SIZE-1], + "cache/memory contained invalidated data"); + CYG_TEST_CHECK(42 == aligned_p[HAL_DCACHE_LINE_SIZE], + "invalidated beyond range"); +} +#endif + +// ------------------------------------------------------------------------- +// Test of instruction cache locking. +// o Time difference between repeatedly executing a bunch of instructions +// with and without locking. +#ifdef HAL_ICACHE_LOCK +static void iloop(unsigned long* start, unsigned long* end) +{ + register char c; + register CYG_INTERRUPT_STATE oldints; + + label_start: + // Invalidating shouldn't affect locked lines. + HAL_DISABLE_INTERRUPTS(oldints); + HAL_ICACHE_DISABLE(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + + c = m[HAL_DCACHE_LINE_SIZE*0]; + c = m[HAL_DCACHE_LINE_SIZE*1]; + c = m[HAL_DCACHE_LINE_SIZE*2]; + c = m[HAL_DCACHE_LINE_SIZE*3]; + c = m[HAL_DCACHE_LINE_SIZE*4]; + c = m[HAL_DCACHE_LINE_SIZE*5]; + c = m[HAL_DCACHE_LINE_SIZE*6]; + c = m[HAL_DCACHE_LINE_SIZE*7]; + c = m[HAL_DCACHE_LINE_SIZE*8]; + c = m[HAL_DCACHE_LINE_SIZE*9]; + c = m[HAL_DCACHE_LINE_SIZE*10]; + c = m[HAL_DCACHE_LINE_SIZE*11]; + c = m[HAL_DCACHE_LINE_SIZE*12]; + c = m[HAL_DCACHE_LINE_SIZE*13]; + c = m[HAL_DCACHE_LINE_SIZE*14]; + c = m[HAL_DCACHE_LINE_SIZE*15]; + c = m[HAL_DCACHE_LINE_SIZE*16]; + c = m[HAL_DCACHE_LINE_SIZE*17]; + c = m[HAL_DCACHE_LINE_SIZE*18]; + c = m[HAL_DCACHE_LINE_SIZE*19]; + c = m[HAL_DCACHE_LINE_SIZE*20]; + c = m[HAL_DCACHE_LINE_SIZE*21]; + c = m[HAL_DCACHE_LINE_SIZE*22]; + c = m[HAL_DCACHE_LINE_SIZE*23]; + c = m[HAL_DCACHE_LINE_SIZE*24]; + c = m[HAL_DCACHE_LINE_SIZE*25]; + c = m[HAL_DCACHE_LINE_SIZE*26]; + c = m[HAL_DCACHE_LINE_SIZE*27]; + c = m[HAL_DCACHE_LINE_SIZE*28]; + c = m[HAL_DCACHE_LINE_SIZE*29]; + c = m[HAL_DCACHE_LINE_SIZE*30]; + c = m[HAL_DCACHE_LINE_SIZE*31]; + c = m[HAL_DCACHE_LINE_SIZE*32]; + c = m[HAL_DCACHE_LINE_SIZE*33]; + c = m[HAL_DCACHE_LINE_SIZE*34]; + c = m[HAL_DCACHE_LINE_SIZE*35]; + c = m[HAL_DCACHE_LINE_SIZE*36]; + c = m[HAL_DCACHE_LINE_SIZE*37]; + c = m[HAL_DCACHE_LINE_SIZE*38]; + c = m[HAL_DCACHE_LINE_SIZE*39]; + c = m[HAL_DCACHE_LINE_SIZE*40]; + c = m[HAL_DCACHE_LINE_SIZE*41]; + c = m[HAL_DCACHE_LINE_SIZE*42]; + c = m[HAL_DCACHE_LINE_SIZE*43]; + c = m[HAL_DCACHE_LINE_SIZE*44]; + c = m[HAL_DCACHE_LINE_SIZE*45]; + c = m[HAL_DCACHE_LINE_SIZE*46]; + c = m[HAL_DCACHE_LINE_SIZE*47]; + c = m[HAL_DCACHE_LINE_SIZE*48]; + c = m[HAL_DCACHE_LINE_SIZE*49]; + c = m[HAL_DCACHE_LINE_SIZE*50]; + c = m[HAL_DCACHE_LINE_SIZE*51]; + c = m[HAL_DCACHE_LINE_SIZE*52]; + c = m[HAL_DCACHE_LINE_SIZE*53]; + c = m[HAL_DCACHE_LINE_SIZE*54]; + c = m[HAL_DCACHE_LINE_SIZE*55]; + c = m[HAL_DCACHE_LINE_SIZE*56]; + c = m[HAL_DCACHE_LINE_SIZE*57]; + c = m[HAL_DCACHE_LINE_SIZE*58]; + c = m[HAL_DCACHE_LINE_SIZE*59]; + c = m[HAL_DCACHE_LINE_SIZE*60]; + c = m[HAL_DCACHE_LINE_SIZE*61]; + c = m[HAL_DCACHE_LINE_SIZE*62]; + c = m[HAL_DCACHE_LINE_SIZE*63]; + + label_end: + + *start = (unsigned long) &&label_start; + *end = (unsigned long) &&label_end; +} + +static void time_ilock(void) +{ + register cyg_ucount32 k; + cyg_tick_count_t count0, count1; + cyg_ucount32 t; + unsigned long start, end; + register cyg_ucount32 time_ilock_loops = TIME_ILOCK_LOOPS; + + CYG_TEST_INFO("Instruction cache lock"); + + if (cyg_test_is_simulator) + time_ilock_loops = 10; + + count0 = cyg_current_time(); + for (k = 0; k < time_ilock_loops; k++) { + iloop(&start, &end); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time without lock: %d\n", t); + + HAL_ICACHE_LOCK(start, end-start); + + count0 = cyg_current_time(); + for (k = 0; k < time_ilock_loops; k++) { + iloop(&start, &end); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time with lock: %d\n", t); + + HAL_ICACHE_UNLOCK(start, end-start); +} +#endif // ifdef HAL_ICACHE_LOCK + +// ------------------------------------------------------------------------- +// Test of data cache locking. +// o Time difference between repeatedly accessing a memory region +// with and without locking. +#ifdef HAL_DCACHE_LOCK +static void dloop(void) +{ + register cyg_uint32 j; + register char c; + register CYG_INTERRUPT_STATE oldints; + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + HAL_RESTORE_INTERRUPTS(oldints); + for (j = 0; j < HAL_DCACHE_SETS; j++) { + c = m[HAL_DCACHE_LINE_SIZE*j]; + } +} + +static void time_dlock(void) +{ + register cyg_ucount32 k; + cyg_tick_count_t count0, count1; + cyg_ucount32 t; + register cyg_ucount32 time_dlock_loops = TIME_DLOCK_LOOPS; + + CYG_TEST_INFO("Data cache lock"); + + if (cyg_test_is_simulator) + time_dlock_loops = 10; + + count0 = cyg_current_time(); + for (k = 0; k < time_dlock_loops; k++) { + dloop(); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time without lock: %d\n", t); + + HAL_DCACHE_LOCK(&m[0], HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); + + count0 = cyg_current_time(); + for (k = 0; k < time_dlock_loops; k++) { + dloop(); + } + count1 = cyg_current_time(); + t = count1 - count0; + diag_printf("time with lock: %d\n", t); + + HAL_DCACHE_UNLOCK(&m[0], HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); +} +#endif // ifdef HAL_DCACHE_LOCK + +// ------------------------------------------------------------------------- +static void entry0( cyg_addrword_t data ) +{ +#ifdef HAL_DCACHE_LOCK + time_dlock(); +#endif +#ifdef HAL_ICACHE_LOCK + time_ilock(); +#endif +#ifdef HAL_DCACHE_STORE + test_dstore(); +#endif +#ifdef HAL_DCACHE_READ_HINT + test_dread_hint(); +#endif +#ifdef HAL_DCACHE_WRITE_HINT + test_dwrite_hint(); +#endif +#ifdef HAL_DCACHE_ZERO + test_dzero(); +#endif + + // The below tests only work on a copy-back cache. + if (0) { +#ifdef HAL_DCACHE_FLUSH + test_dflush(); +#endif +#ifdef HAL_DCACHE_INVALIDATE + test_dinvalidate(); +#endif + } + + CYG_TEST_PASS_FINISH("End of test"); +} + +// ------------------------------------------------------------------------- + +void kcache2_main( void ) +{ + CYG_TEST_INIT(); + + cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kcache2", + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + cyg_thread_resume(thread[0]); + + cyg_scheduler_start(); +} + +// ------------------------------------------------------------------------- + +externC void +cyg_start( void ) +{ + kcache2_main(); +} + +// ------------------------------------------------------------------------- + +#else // def CYGFUN_KERNEL_API_C +#define N_A_MSG "Kernel C API layer disabled" +#endif // def CYGFUN_KERNEL_API_C +#else // def CYGVAR_KERNEL_COUNTERS_CLOCK +#define N_A_MSG "Kernel real-time clock disabled" +#endif // def CYGVAR_KERNEL_COUNTERS_CLOCK + +#ifdef N_A_MSG +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA( N_A_MSG ); +} +#endif // N_A_MSG + +// ------------------------------------------------------------------------- +/* EOF kcache2.c */ diff --git a/packages/kernel/current/tests/kclock0.c b/packages/kernel/current/tests/kclock0.c --- a/packages/kernel/current/tests/kclock0.c +++ b/packages/kernel/current/tests/kclock0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -129,7 +129,7 @@ void kclock0_main(void) CHECK( 0xffffffff == cyg_counter_current_value(counter0) ); - cyg_counter_tick(counter0); // Overflows 32 bits + cyg_counter_tick(counter0); // Overflows 32 bits CHECK( 0x100000000ULL == cyg_counter_current_value(counter0) ); @@ -153,55 +153,55 @@ void kclock0_main(void) cyg_alarm_initialize(alarm2, 21,2); CHECK( 0x00 == called ); - cyg_counter_tick(counter0); /* 12 a0 */ + cyg_counter_tick(counter0); /* 12 a0 */ CHECK( 0x01 == called ); cyg_alarm_initialize(alarm1, 13,0); - cyg_counter_tick(counter0); /* 13 a1 */ + cyg_counter_tick(counter0); /* 13 a1 */ CHECK( 0x03 == called ); cyg_alarm_initialize(alarm1, 17,0); - cyg_counter_tick(counter0); /* 14 */ + cyg_counter_tick(counter0); /* 14 */ CHECK( 0x03 == called ); - cyg_counter_tick(counter0); /* 15 a0 */ + cyg_counter_tick(counter0); /* 15 a0 */ CHECK( 0x02 == called ); - cyg_counter_tick(counter0); /* 16 */ - cyg_counter_tick(counter0); /* 17 a1 */ + cyg_counter_tick(counter0); /* 16 */ + cyg_counter_tick(counter0); /* 17 a1 */ CHECK( 0x00 == called ); - cyg_counter_tick(counter0); /* 18 a0 */ + cyg_counter_tick(counter0); /* 18 a0 */ CHECK( 0x01 == called ); - cyg_counter_tick(counter0); /* 19 */ - cyg_counter_tick(counter0); /* 20 */ - cyg_counter_tick(counter0); /* 21 a0 a2 */ + cyg_counter_tick(counter0); /* 19 */ + cyg_counter_tick(counter0); /* 20 */ + cyg_counter_tick(counter0); /* 21 a0 a2 */ CHECK( 0x14 == called ); - cyg_counter_tick(counter0); /* 22 */ - cyg_counter_tick(counter0); /* 23 a2 */ + cyg_counter_tick(counter0); /* 22 */ + cyg_counter_tick(counter0); /* 23 a2 */ CHECK( 0x00 == called ); cyg_alarm_disable(alarm2); - cyg_counter_tick(counter0); /* 24 a0 */ - cyg_counter_tick(counter0); /* 25 */ + cyg_counter_tick(counter0); /* 24 a0 */ + cyg_counter_tick(counter0); /* 25 */ CHECK( 0x01 == called ); cyg_alarm_enable(alarm2); /* a2 (enabled at 25) */ CHECK( 0x15 == called ); - cyg_counter_tick(counter0); /* 26 */ + cyg_counter_tick(counter0); /* 26 */ CHECK( 0x15 == called ); - cyg_counter_tick(counter0); /* 27 a0 a2 */ - cyg_counter_tick(counter0); /* 28 */ + cyg_counter_tick(counter0); /* 27 a0 a2 */ + cyg_counter_tick(counter0); /* 28 */ CHECK( 0x00 == called ); - cyg_counter_tick(counter0); /* 29 a2 */ - cyg_counter_tick(counter0); /* 30 a0 */ - cyg_counter_tick(counter0); /* 31 a2 */ + cyg_counter_tick(counter0); /* 29 a2 */ + cyg_counter_tick(counter0); /* 30 a0 */ + cyg_counter_tick(counter0); /* 31 a2 */ CHECK( 0x01 == called ); res0.dividend = 100; @@ -256,7 +256,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("N/A: " N_A_MSG); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG diff --git a/packages/kernel/current/tests/kclock1.c b/packages/kernel/current/tests/kclock1.c --- a/packages/kernel/current/tests/kclock1.c +++ b/packages/kernel/current/tests/kclock1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -50,32 +50,23 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include -#if defined(CYG_HAL_MIPS_SIM) - -// Reduce time in simulated TX39 so that -// it runs within the timeout. -#define TEST_DELAY 1000000000ll - -#else +static cyg_uint64 TEST_DELAY; -#define TEST_DELAY 5000000000ll - -#endif - -#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK) \ - && defined(CYGFUN_KERNEL_THREADS_TIMER) +#ifdef CYGFUN_KERNEL_THREADS_TIMER #ifdef CYGFUN_KERNEL_API_C #include "testaux.h" #define NTHREADS 1 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -113,8 +104,14 @@ void kclock1_main( void ) { CYG_TEST_INIT(); + if (cyg_test_is_simulator) { + TEST_DELAY = 100000000ll; + } else { + TEST_DELAY = 3000000000ll; + } + cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kclock1", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_scheduler_start(); @@ -126,19 +123,19 @@ cyg_start( void ) kclock1_main(); } -#else // def CYGFUN_KERNEL_API_C +#else // def CYGFUN_KERNEL_API_C #define N_A_MSG "Kernel C API layer disabled" #endif // def CYGFUN_KERNEL_API_C -#else // def CYGVAR_KERNEL_COUNTERS_CLOCK && CYGFUN_KERNEL_THREADS_TIMER -#define N_A_MSG "Kernel real-time clock/threads timer disabled" -#endif // def CYGVAR_KERNEL_COUNTERS_CLOCK && CYGFUN_KERNEL_THREADS_TIMER +#else // def CYGFUN_KERNEL_THREADS_TIMER +#define N_A_MSG "Kernel threads timer disabled" +#endif // def CYGFUN_KERNEL_THREADS_TIMER #ifdef N_A_MSG externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("N/A: " N_A_MSG); + CYG_TEST_NA( N_A_MSG ); } #endif // N_A_MSG diff --git a/packages/kernel/current/tests/kexcept1.c b/packages/kernel/current/tests/kexcept1.c --- a/packages/kernel/current/tests/kexcept1.c +++ b/packages/kernel/current/tests/kexcept1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,12 +30,14 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm -// Date: 1998-06-15 +// Contributors: dsm, jlarmour +// Date: 1999-02-16 // Description: Test basic exception functionality //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -49,7 +51,7 @@ #include "testaux.h" #define NTHREADS 1 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -80,7 +82,7 @@ static void handler1(cyg_addrword_t data CYG_TEST_CHECK((cyg_addrword_t)&d0 == data, "handler given wrong data"); #ifdef CYGSEM_KERNEL_EXCEPTIONS_DECODE - CYG_TEST_CHECK(number == CYG_EXCEPTION_MAX, "handler given wrong number"); + CYG_TEST_CHECK(number == CYGNUM_HAL_EXCEPTION_MAX, "handler given wrong number"); #else CYG_UNUSED_PARAM(cyg_code_t, number); #endif @@ -113,14 +115,14 @@ static void entry0( CYG_ADDRWORD data ) CYG_UNUSED_PARAM(CYG_ADDRESS, data); cyg_exception_set_handler( - CYG_EXCEPTION_MAX, + CYGNUM_HAL_EXCEPTION_MAX, &handler1, (cyg_addrword_t)&d0, &old_handler, &old_data); cyg_exception_set_handler( - CYG_EXCEPTION_MAX, + CYGNUM_HAL_EXCEPTION_MAX, &handler1, (cyg_addrword_t)&d0, &old_handler1, @@ -133,15 +135,20 @@ static void entry0( CYG_ADDRWORD data ) cyg_exception_call_handler( cyg_thread_self(), - CYG_EXCEPTION_MAX, + CYGNUM_HAL_EXCEPTION_MAX, (cyg_addrword_t)99); CYG_TEST_INFO("handler 1 returned"); - cyg_exception_clear_handler(CYG_EXCEPTION_MAX); - cyg_exception_clear_handler(CYG_EXCEPTION_MAX); + cyg_exception_clear_handler(CYGNUM_HAL_EXCEPTION_MAX); + cyg_exception_clear_handler(CYGNUM_HAL_EXCEPTION_MAX); - for(n = CYG_EXCEPTION_MIN; n <= CYG_EXCEPTION_MAX; n++) { +#ifdef CYGPKG_HAL_I386_LINUX + // We can't catch segmentation violation exceptions on Linux. + CYG_TEST_PASS_FINISH("Except 1 OK"); +#endif + + for(n = CYGNUM_HAL_EXCEPTION_MIN; n <= CYGNUM_HAL_EXCEPTION_MAX; n++) { cyg_exception_set_handler( n, handler0, @@ -150,7 +157,7 @@ static void entry0( CYG_ADDRWORD data ) &old_data1); } - CYG_TEST_INFO("Attempting to provoke exception"); + CYG_TEST_PASS("Attempting to provoke exception"); cause_exception(); @@ -165,16 +172,27 @@ extern void __default_exception_vsr(void void except0_main( void ) { + // Use CYG_TEST_GDBCMD _before_ CYG_TEST_INIT() + CYG_TEST_GDBCMD("handle SIGBUS nostop"); + CYG_TEST_GDBCMD("handle SIGSEGV nostop"); + CYG_TEST_INIT(); -#ifdef CYG_HAL_TX39_JMR3904 +#ifdef HAL_VSR_SET_TO_ECOS_HANDLER + // Reclaim the VSR off CygMon possibly +#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, NULL ); +#endif +#endif - cyg_interrupt_set_vsr( CYG_VECTOR_LOAD_ADDRESS, __default_exception_vsr ); - -#endif - cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kexcept1", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_scheduler_start(); @@ -200,7 +218,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH( "N/A: " N_A_MSG); + CYG_TEST_NA( N_A_MSG); } #endif // N_A_MSG diff --git a/packages/kernel/current/tests/kflag0.c b/packages/kernel/current/tests/kflag0.c --- a/packages/kernel/current/tests/kflag0.c +++ b/packages/kernel/current/tests/kflag0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -81,7 +81,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kflag1.c b/packages/kernel/current/tests/kflag1.c --- a/packages/kernel/current/tests/kflag1.c +++ b/packages/kernel/current/tests/kflag1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -46,7 +48,7 @@ #define NTHREADS 3 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -194,15 +196,15 @@ void kflag1_main( void ) #endif cyg_thread_create( 1, entry0 , (cyg_addrword_t)0, "kflag1-0", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create( 1, entry1 , (cyg_addrword_t)1, "kflag1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_thread_create( 1, entry2 , (cyg_addrword_t)2, "kflag1-2", - (void *)stack[2], STACKSIZE, &thread[2], &thread_obj[2]); + (void *)stack[2], STACKSIZE, &thread[2], &thread_obj[2]); cyg_thread_resume(thread[2]); cyg_scheduler_start(); @@ -221,7 +223,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kill.cxx b/packages/kernel/current/tests/kill.cxx --- a/packages/kernel/current/tests/kill.cxx +++ b/packages/kernel/current/tests/kill.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): nickg -// Contributors: nickg +// Contributors: nickg // Date: 1998-04-24 // Description: Tests the functionality of thread kill() and // reinitalize(). @@ -46,12 +46,28 @@ #include +#ifdef CYGFUN_KERNEL_THREADS_TIMER + #include #define NTHREADS 3 #include "testaux.hxx" +#ifdef CYGPKG_HAL_I386_LINUX +// On the synthetic target the delay needs to be a bit bigger to avoid +// potential problems due to timing inaccuracy and scheduling of Linux +// tasks. +int delay_ticks = 5; +#else +// if we delayed for just one tick, there's a good chance the clock may +// roll over immediately, giving a negligible practical delay. So always use +// a value greater than 1 +int delay_ticks = 2; +#endif + + + static Cyg_Binary_Semaphore s0, s1; volatile cyg_atomic thread0_state; @@ -80,7 +96,7 @@ static void entry1( CYG_ADDRWORD data ) thread1_state = 1; - self->delay(1); + self->delay(delay_ticks); if( thread2_state != 1 ) CYG_TEST_FAIL_FINISH("Thread2 in wrong state"); @@ -95,7 +111,7 @@ static void entry1( CYG_ADDRWORD data ) thread1_state = 4; - self->delay(1); + self->delay(delay_ticks); thread1_state = 5; thread2_state = 0; @@ -103,14 +119,14 @@ static void entry1( CYG_ADDRWORD data ) thread[2]->reinitialize(); thread[2]->resume(); - self->delay(1); + self->delay(delay_ticks); if( thread2_state != 1 ) CYG_TEST_FAIL_FINISH("Thread2 in wrong state"); thread1_state = 6; - self->delay(1); + self->delay(delay_ticks); if( thread2_state != 2 ) CYG_TEST_FAIL_FINISH("Thread2 in wrong state"); @@ -158,5 +174,16 @@ cyg_start( void ) { release_main(); } + +#else // ifdef CYGFUN_KERNEL_THREADS_TIMER + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Kernel threads timer disabled"); +} + +#endif // ifdef CYGFUN_KERNEL_THREADS_TIMER // EOF kill.cxx diff --git a/packages/kernel/current/tests/kintr0.c b/packages/kernel/current/tests/kintr0.c --- a/packages/kernel/current/tests/kintr0.c +++ b/packages/kernel/current/tests/kintr0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,8 +30,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm -// Date: 1998-06-15 +// Contributors: dsm, jlarmour +// Date: 1999-02-16 // Description: Very basic test of interrupt objects // Options: // CYGIMP_KERNEL_INTERRUPTS_DSRS_TABLE @@ -105,36 +105,57 @@ static void vsr0() void kintr0_main( void ) { - cyg_vector_t v = 11 % CYG_VSR_COUNT; - cyg_vector_t v1 = 6 % CYG_ISR_COUNT; + cyg_vector_t v = 11 % CYGNUM_HAL_VSR_COUNT; + cyg_vector_t v1; + cyg_vector_t lvl1 = 1 % (CYGNUM_HAL_ISR_COUNT); + cyg_vector_t lvl2 = 15 % (CYGNUM_HAL_ISR_COUNT); + int in_use; + cyg_VSR_t *old_vsr, *new_vsr; CYG_TEST_INIT(); + +#ifdef CYGPKG_HAL_TX39 + // This can be removed when PR 17831 is fixed + if ( cyg_test_is_simulator ) + v1 = 12 % CYGNUM_HAL_ISR_COUNT; + else /* NOTE TRAILING ELSE... */ +#endif + v1 = 6 % CYGNUM_HAL_ISR_COUNT; CHECK(flash()); CHECK(flash()); - cyg_interrupt_create(1 % (CYG_ISR_COUNT), 1, (cyg_addrword_t)777, - isr0, dsr0, &intr0, &intr_obj[0]); + // Make sure the chosen levels are not already in use. + HAL_INTERRUPT_IN_USE( lvl1, in_use ); + intr0 = 0; + if (!in_use) + cyg_interrupt_create(lvl1, 1, (cyg_addrword_t)777, isr0, dsr0, + &intr0, &intr_obj[0]); - cyg_interrupt_create(15 % (CYG_ISR_COUNT), 1, 888, - isr1, dsr1, &intr1, &intr_obj[1]); - + HAL_INTERRUPT_IN_USE( lvl2, in_use ); + intr1 = 0; + if (!in_use && lvl1 != lvl2) + cyg_interrupt_create(lvl2, 1, 888, isr1, dsr1, &intr1, &intr_obj[1]); // Check these functions at least exist cyg_interrupt_enable(); cyg_interrupt_disable(); - cyg_interrupt_attach(intr0); - cyg_interrupt_attach(intr1); - cyg_interrupt_detach(intr0); - cyg_interrupt_detach(intr1); + if (intr0) + cyg_interrupt_attach(intr0); + if (intr1) + cyg_interrupt_attach(intr1); + if (intr0) + cyg_interrupt_detach(intr0); + if (intr1) + cyg_interrupt_detach(intr1); // If this attaching interrupt replaces the previous interrupt // instead of adding to it we could be in a big mess if the // vector is being used by something important. - + cyg_interrupt_get_vsr( v, &old_vsr ); cyg_interrupt_set_vsr( v, vsr0 ); cyg_interrupt_get_vsr( v, &new_vsr ); @@ -147,7 +168,7 @@ void kintr0_main( void ) cyg_interrupt_set_vsr( v, new_vsr ); new_vsr = NULL; - cyg_interrupt_get_vsr( v, &new_vsr ); + cyg_interrupt_get_vsr( v, &new_vsr ); CHECK( vsr0 == new_vsr ); cyg_interrupt_set_vsr( v, old_vsr ); @@ -155,7 +176,7 @@ void kintr0_main( void ) new_vsr = NULL; cyg_interrupt_get_vsr( v, &new_vsr ); CHECK( old_vsr == new_vsr ); - + CHECK( NULL != vsr0 ); cyg_interrupt_mask(v1); @@ -177,7 +198,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kmbox1.c b/packages/kernel/current/tests/kmbox1.c --- a/packages/kernel/current/tests/kmbox1.c +++ b/packages/kernel/current/tests/kmbox1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -45,7 +47,7 @@ #include "testaux.h" #define NTHREADS 2 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -110,7 +112,7 @@ static void entry0( cyg_addrword_t data CYG_TEST_CHECK(2==q++, "bad synchronization"); #ifdef CYGFUN_KERNEL_THREADS_TIMER - CYG_TEST_CHECK(NULL==cyg_mbox_timed_get(m0, cyg_current_time()+2), + CYG_TEST_CHECK(NULL==cyg_mbox_timed_get(m0, cyg_current_time()+10), "unexpectedly found message"); CYG_TEST_CHECK(3==q++, "bad synchronization"); // Allow t1 to run as this get times out @@ -125,7 +127,7 @@ static void entry0( cyg_addrword_t data // m0 now contains ( 6 ... 6 ) CYG_TEST_CHECK(10==q++, "bad synchronization"); cyg_mbox_put(m1, (void*)4); // wake t1 - CYG_TEST_CHECK(!cyg_mbox_timed_put(m0, (void*)8, cyg_current_time()+2), + CYG_TEST_CHECK(!cyg_mbox_timed_put(m0, (void*)8, cyg_current_time()+10), "timed put() unexpectedly worked"); CYG_TEST_CHECK(12==q++, "bad synchronization"); // m0 still contains ( 6 ... 6 ) @@ -144,16 +146,16 @@ static void entry1( cyg_addrword_t data CYG_TEST_CHECK(1==q++, "bad synchronization"); cyg_mbox_PUT(m0, (void *)3); // wake t0 -#ifdef CYGFUN_KERNEL_THREADS_TIMER +#if defined(CYGFUN_KERNEL_THREADS_TIMER) CYG_TEST_INFO("Testing timed functions"); - CYG_TEST_CHECK(7==(cyg_count8)cyg_mbox_timed_get(m0,cyg_current_time()+4), + CYG_TEST_CHECK(7==(cyg_count8)cyg_mbox_timed_get(m0,cyg_current_time()+20), "timed get()"); CYG_TEST_CHECK(4==q++, "bad synchronization"); #ifdef CYGMTH_MBOX_PUT_CAN_WAIT CYG_TEST_CHECK(4==(cyg_count8)cyg_mbox_get(m1)); CYG_TEST_CHECK(11==q++, "bad synchronization"); - thread[0]->delay(4); // allow t0 to reach put on m1 + thread[0]->delay(20); // allow t0 to reach put on m1 CYG_TEST_CHECK(14==q++, "bad synchronization"); CYG_TEST_CHECK(cyg_mbox_waiting_to_put(m0), "waiting_to_put()"); do { @@ -171,11 +173,11 @@ void kmbox1_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kmbox1-0", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create(4, entry1 , (cyg_addrword_t)1, "kmbox1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_mbox_create( &m0, &mbox0 ); @@ -197,7 +199,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kmemfix1.c b/packages/kernel/current/tests/kmemfix1.c --- a/packages/kernel/current/tests/kmemfix1.c +++ b/packages/kernel/current/tests/kmemfix1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -47,7 +49,7 @@ #include "testaux.h" #define NTHREADS 2 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -104,7 +106,7 @@ static void entry0( cyg_addrword_t data p1 = NULL; while((p2 = cyg_mempool_fix_try_alloc(mempool0) )) - p1 = p2; + p1 = p2; cyg_mempool_fix_get_info(mempool0, &info1); cyg_mempool_fix_free(mempool0, p0); @@ -127,13 +129,13 @@ static void entry0( cyg_addrword_t data // This shouldn't have to wait p0 = cyg_mempool_fix_timed_alloc(mempool0, cyg_current_time()+100000); check_in_mp0(p0, 100); - p1 = cyg_mempool_fix_timed_alloc(mempool0, cyg_current_time()+2); + p1 = cyg_mempool_fix_timed_alloc(mempool0, cyg_current_time()+20); check_in_mp0(p1, 10); - p1 = cyg_mempool_fix_timed_alloc(mempool0, cyg_current_time()+2); + p1 = cyg_mempool_fix_timed_alloc(mempool0, cyg_current_time()+20); CYG_TEST_CHECK(NULL == p1, "Timed alloc unexpectedly worked"); // Expect thread 1 to have run while processing previous timed - // allocation. It should therefore tbe waiting. + // allocation. It should therefore be waiting. CYG_TEST_CHECK(cyg_mempool_fix_waiting(mempool1), "There should be a thread waiting"); #endif @@ -154,11 +156,11 @@ void kmemfix1_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kmemfix1-0", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create(4, entry1 , (cyg_addrword_t)1, "kmemfix1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_mempool_fix_create(mem[0], MEMSIZE, 100, &mempool0, &mempool_obj[0]); @@ -180,7 +182,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kmemvar1.c b/packages/kernel/current/tests/kmemvar1.c --- a/packages/kernel/current/tests/kmemvar1.c +++ b/packages/kernel/current/tests/kmemvar1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -47,7 +49,7 @@ #include "testaux.h" #define NTHREADS 2 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -162,11 +164,11 @@ void kmemvar1_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kmemvar1-0", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create(4, entry1 , (cyg_addrword_t)1, "kmemvar1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_mempool_var_create(mem[0], MEMSIZE, &mempool0, &mempool_obj[0]); @@ -188,7 +190,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kmutex0.c b/packages/kernel/current/tests/kmutex0.c --- a/packages/kernel/current/tests/kmutex0.c +++ b/packages/kernel/current/tests/kmutex0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -80,7 +80,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kmutex1.c b/packages/kernel/current/tests/kmutex1.c --- a/packages/kernel/current/tests/kmutex1.c +++ b/packages/kernel/current/tests/kmutex1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -37,6 +37,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -46,7 +48,7 @@ #include "testaux.h" #define NTHREADS 3 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -134,15 +136,15 @@ void kmutex1_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kmutex1-0", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create(4, entry1 , (cyg_addrword_t)1, "kmutex1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_thread_create(4, entry2 , (cyg_addrword_t)2, "kmutex1-2", - (void *)stack[2], STACKSIZE, &thread[2], &thread_obj[2]); + (void *)stack[2], STACKSIZE, &thread[2], &thread_obj[2]); cyg_thread_resume(thread[2]); cyg_mutex_init( &m0 ); @@ -168,7 +170,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kphilo.c b/packages/kernel/current/tests/kphilo.c --- a/packages/kernel/current/tests/kphilo.c +++ b/packages/kernel/current/tests/kphilo.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/ksched1.c b/packages/kernel/current/tests/ksched1.c --- a/packages/kernel/current/tests/ksched1.c +++ b/packages/kernel/current/tests/ksched1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -45,7 +47,7 @@ #include "testaux.h" #define NTHREADS 2 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -64,7 +66,7 @@ void ksched1_main(void) CYG_TEST_INIT(); cyg_thread_create( 4, entry0 , (cyg_addrword_t)222, "ksched1", - (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_scheduler_start(); @@ -83,7 +85,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/ksem0.c b/packages/kernel/current/tests/ksem0.c --- a/packages/kernel/current/tests/ksem0.c +++ b/packages/kernel/current/tests/ksem0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -82,7 +82,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/ksem1.c b/packages/kernel/current/tests/ksem1.c --- a/packages/kernel/current/tests/ksem1.c +++ b/packages/kernel/current/tests/ksem1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -45,7 +47,7 @@ #include "testaux.h" #define NTHREADS 2 -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static cyg_handle_t thread[NTHREADS]; @@ -86,7 +88,7 @@ static void entry0( cyg_addrword_t data static void entry1( cyg_addrword_t data ) { - cyg_ucount32 val; + cyg_count32 val; cyg_semaphore_peek(&s1, &val); CHECK( 2 == val); @@ -125,11 +127,11 @@ void ksem1_main( void ) cyg_semaphore_init( &s2, 0); cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "ksem1-0", - (void *)stack[0], STACKSIZE,&thread[0], &thread_obj[0]); + (void *)stack[0], STACKSIZE,&thread[0], &thread_obj[0]); cyg_thread_resume(thread[0]); cyg_thread_create(4, entry1 , (cyg_addrword_t)1, "ksem1-1", - (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); + (void *)stack[1], STACKSIZE, &thread[1], &thread_obj[1]); cyg_thread_resume(thread[1]); cyg_scheduler_start(); @@ -149,7 +151,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kthread0.c b/packages/kernel/current/tests/kthread0.c --- a/packages/kernel/current/tests/kthread0.c +++ b/packages/kernel/current/tests/kthread0.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -36,6 +36,8 @@ //####DESCRIPTIONEND#### */ +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + #include #include @@ -44,7 +46,7 @@ #include "testaux.h" -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static char stack[STACKSIZE]; @@ -73,7 +75,7 @@ static bool flash( void ) #endif cyg_thread_create(4, entry, (cyg_addrword_t)p, "kthread0", - (void *)stack, STACKSIZE, &t2, &thread2 ); + (void *)stack, STACKSIZE, &t2, &thread2 ); return true; } @@ -100,7 +102,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/kthread1.c b/packages/kernel/current/tests/kthread1.c --- a/packages/kernel/current/tests/kthread1.c +++ b/packages/kernel/current/tests/kthread1.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -44,7 +44,13 @@ #include "testaux.h" +#include // for CYGNUM_HAL_STACK_SIZE_TYPICAL + +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#else #define STACKSIZE 2000 +#endif static char stack[2][STACKSIZE]; @@ -80,7 +86,7 @@ static void entry1( cyg_addrword_t data cyg_thread_suspend(pt1); - cyg_thread_exit(); // no guarantee this will be called + cyg_thread_exit(); // no guarantee this will be called } void kthread1_main( void ) @@ -88,9 +94,9 @@ void kthread1_main( void ) CYG_TEST_INIT(); cyg_thread_create(4, entry0, (cyg_addrword_t)222, "kthread1-0", - (void *)stack[0], STACKSIZE, &pt0, &thread[0] ); + (void *)stack[0], STACKSIZE, &pt0, &thread[0] ); cyg_thread_create(4, entry1, (cyg_addrword_t)333, "kthread1-1", - (void *)stack[1], STACKSIZE, &pt1, &thread[1] ); + (void *)stack[1], STACKSIZE, &pt1, &thread[1] ); cyg_thread_resume(pt0); cyg_thread_resume(pt1); @@ -112,7 +118,7 @@ externC void cyg_start( void ) { CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("Kernel C API layer disabled"); + CYG_TEST_NA("Kernel C API layer disabled"); } #endif /* def CYGFUN_KERNEL_API_C */ diff --git a/packages/kernel/current/tests/mbox1.cxx b/packages/kernel/current/tests/mbox1.cxx --- a/packages/kernel/current/tests/mbox1.cxx +++ b/packages/kernel/current/tests/mbox1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -111,7 +111,7 @@ static void entry0( CYG_ADDRWORD data ) #ifdef CYGFUN_KERNEL_THREADS_TIMER CYG_TEST_CHECK(NULL==m0.get( - Cyg_Clock::real_time_clock->current_value() + 2), + Cyg_Clock::real_time_clock->current_value() + 10), "unexpectedly found message"); CYG_TEST_CHECK(3==q++, "bad synchronization"); // Allow t1 to run as this get times out @@ -147,13 +147,13 @@ static void entry1( CYG_ADDRWORD data ) #ifdef CYGFUN_KERNEL_THREADS_TIMER CYG_TEST_INFO("Testing timed functions"); CYG_TEST_CHECK(7==(cyg_count8)m0.get( - Cyg_Clock::real_time_clock->current_value() + 4), "timed get()"); + Cyg_Clock::real_time_clock->current_value() + 20), "timed get()"); CYG_TEST_CHECK(4==q++, "bad synchronization"); #ifdef CYGMTH_MBOX_PUT_CAN_WAIT CYG_TEST_CHECK(4==(cyg_count8)m1.get()); CYG_TEST_CHECK(11==q++, "bad synchronization"); - thread[0]->delay(4); // allow t0 to reach put on m1 + thread[0]->delay(20); // allow t0 to reach put on m1 CYG_TEST_CHECK(14==q++, "bad synchronization"); CYG_TEST_CHECK(m0.waiting_to_put(), "waiting_to_put()"); do { diff --git a/packages/kernel/current/tests/memfix1.cxx b/packages/kernel/current/tests/memfix1.cxx --- a/packages/kernel/current/tests/memfix1.cxx +++ b/packages/kernel/current/tests/memfix1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -109,7 +109,7 @@ static void entry0( CYG_ADDRWORD data ) p1 = NULL; while((p2 = mempool0.try_alloc())) - p1 = p2; + p1 = p2; f1 = mempool0.get_freemem(); CYG_TEST_CHECK(mempool0.free(p0), "Couldn't free"); @@ -131,9 +131,9 @@ static void entry0( CYG_ADDRWORD data ) // This shouldn't have to wait p0 = mempool0.alloc(Cyg_Clock::real_time_clock->current_value()+100000); check_in_mp0(p0, 100); - p1 = mempool0.alloc(Cyg_Clock::real_time_clock->current_value()+2); + p1 = mempool0.alloc(Cyg_Clock::real_time_clock->current_value()+20); check_in_mp0(p1, 10); - p1 = mempool0.alloc(Cyg_Clock::real_time_clock->current_value()+2); + p1 = mempool0.alloc(Cyg_Clock::real_time_clock->current_value()+20); CYG_TEST_CHECK(NULL == p1, "Timed alloc unexpectedly worked"); // Expect thread 1 to have run while processing previous timed diff --git a/packages/kernel/current/tests/memfix2.cxx b/packages/kernel/current/tests/memfix2.cxx --- a/packages/kernel/current/tests/memfix2.cxx +++ b/packages/kernel/current/tests/memfix2.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/memvar1.cxx b/packages/kernel/current/tests/memvar1.cxx --- a/packages/kernel/current/tests/memvar1.cxx +++ b/packages/kernel/current/tests/memvar1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/memvar2.cxx b/packages/kernel/current/tests/memvar2.cxx --- a/packages/kernel/current/tests/memvar2.cxx +++ b/packages/kernel/current/tests/memvar2.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/mutex0.cxx b/packages/kernel/current/tests/mutex0.cxx --- a/packages/kernel/current/tests/mutex0.cxx +++ b/packages/kernel/current/tests/mutex0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/mutex1.cxx b/packages/kernel/current/tests/mutex1.cxx --- a/packages/kernel/current/tests/mutex1.cxx +++ b/packages/kernel/current/tests/mutex1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/mutex2.cxx b/packages/kernel/current/tests/mutex2.cxx new file mode 100644 --- /dev/null +++ b/packages/kernel/current/tests/mutex2.cxx @@ -0,0 +1,221 @@ +//========================================================================== +// +// mutex1.cxx +// +// Mutex test 1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-19 +// Description: Tests mutex release functionality +//####DESCRIPTIONEND#### + +#include + +#include // Cyg_Scheduler::start() +#include // Cyg_Thread + +#include + +#include + +#include +#include + + +#define NTHREADS 4 +#include "testaux.hxx" +#include "testaux.h" + +static Cyg_Mutex m0, m1; +static Cyg_Condition_Variable cvar0( m0 ), cvar1( m0 ), cvar2( m1 ); + +volatile int thread_state[NTHREADS]; + +// This thread is meant to get hung up trying to re-acquire m0 +// after waiting on the cv. +static void entry0( CYG_ADDRWORD data ) +{ + CYG_TEST_INFO( "thread0: lock mutex 0"); + + m0.lock(); + + CYG_TEST_INFO( "thread0: wait cvar 0"); + + thread_state[data] = 1; + + cvar0.wait(); + + thread_state[data] = 2; + + CYG_TEST_INFO( "thread0: woke from cvar 0"); + + CYG_TEST_INFO( "thread0: unlock mutex 0"); + + m0.unlock(); + + thread_state[data] = 3; + + CYG_TEST_INFO( "thread0: exit"); + + thread[data]->exit(); +} + +// This thread is meant to claim and keep m0. +static void entry1( CYG_ADDRWORD data ) +{ + CYG_TEST_INFO( "thread1: lock mutex 0"); + + m0.lock(); + + CYG_TEST_INFO( "thread1: lock mutex 1"); + + thread_state[data] = 1; + + m1.lock(); + + thread_state[data] = 2; + + CYG_TEST_INFO( "thread1: wait cvar 2"); + + cvar2.wait(); + + thread_state[data] = 3; + + CYG_TEST_INFO( "thread1: woke from cvar 2"); + + CYG_TEST_INFO( "thread1: unlock mutex 1"); + + m1.unlock(); + + thread_state[data] = 4; + + CYG_TEST_INFO( "thread1: unlock m0"); + + m0.unlock(); + + thread_state[data] = 5; + + CYG_TEST_INFO( "thread1: exit"); + + thread[data]->exit(); +} + +// This thread is meant to get hung trying to acquire m0, and then get +// released out of it by thread3. + +static void entry2( CYG_ADDRWORD data ) +{ + CYG_TEST_INFO( "thread2: lock mutex 0"); + + thread_state[data] = 1; + + if( m0.lock() ) + { + thread_state[data] = 2; + + CYG_TEST_INFO( "thread2: lock mutex 0 - returned TRUE"); + CYG_TEST_FAIL_FINISH(" m0.lock() returned TRUE" ); + } + else + { + thread_state[data] = 3; + CYG_TEST_INFO( "thread2: lock mutex 0 - returned FALSE"); + } + + CYG_TEST_INFO( "thread2: exit"); + + thread[data]->exit(); +} + +static void entry3( CYG_ADDRWORD data ) +{ + + CHECK( thread_state[0] == 1 ); + CHECK( thread_state[1] == 2 ); + CHECK( thread_state[2] == 1 ); + + CYG_TEST_INFO( "thread3: signal cvar 0"); + + cvar0.signal(); + + CHECK( thread_state[0] == 1 ); + CHECK( thread_state[1] == 2 ); + CHECK( thread_state[2] == 1 ); + + CYG_TEST_INFO( "thread3: release mutex 0"); + + m0.release(); + + CHECK( thread_state[0] == 1 ); + CHECK( thread_state[1] == 2 ); + CHECK( thread_state[2] == 3 ); + + CYG_TEST_INFO( "thread3: signal cvar 2"); + + cvar2.signal(); + + CHECK( thread_state[0] == 3 ); + CHECK( thread_state[1] == 5 ); + CHECK( thread_state[2] == 3 ); + + CYG_TEST_PASS_FINISH( "mutex2 finished OK"); + + CYG_TEST_INFO( "thread3: exit"); + + thread[data]->exit(); +} + +void mutex2_main( void ) +{ + CYG_TEST_INIT(); + + new_thread(entry0, 0); + new_thread(entry1, 1); + new_thread(entry2, 2); + new_thread(entry3, 3); + + // Set priorities from the top to prevent two threads getting + // the same priority: this causes an ASSERT on some configurations. + thread[3]->set_priority( 5 ); + thread[2]->set_priority( 4 ); + thread[1]->set_priority( 3 ); + thread[0]->set_priority( 2 ); + + Cyg_Scheduler::start(); + + CYG_TEST_FAIL_FINISH("Not reached"); +} + +externC void +cyg_start( void ) +{ + mutex2_main(); +} + +// EOF mutex2.cxx diff --git a/packages/kernel/current/tests/philo.cxx b/packages/kernel/current/tests/philo.cxx --- a/packages/kernel/current/tests/philo.cxx +++ b/packages/kernel/current/tests/philo.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -43,17 +43,11 @@ // ------------------------------------------------------------------------- // Data for the philosophers problem -#define PHILOSOPHERS 15 // number of philosophers +#define PHILOSOPHERS 15 // number of philosophers #define STACKSIZE (2*1024) // size of thread stack -// array of stacks for philosopher threads -char thread_stack[PHILOSOPHERS][STACKSIZE]; - -// array of threads. We use the new operator defined -// below to make these into real threads. -char thread[PHILOSOPHERS][sizeof(Cyg_Thread)]; - -inline void *operator new(size_t size, void *ptr) { return ptr; }; +#define NTHREADS PHILOSOPHERS +#include "testaux.hxx" // array of chopsticks Cyg_Binary_Semaphore chopstick[PHILOSOPHERS]; @@ -214,11 +208,7 @@ cyg_start( void ) change_state(i,'T'); // starting state // Start the philosopher - Cyg_Thread *t = new((void *)&thread[i]) Cyg_Thread(Philosopher, - i, - STACKSIZE, - CYG_ADDRESS(&thread_stack[i]) - ); + Cyg_Thread *t = new_thread( Philosopher, i ); // resume it t->resume(); diff --git a/packages/kernel/current/tests/release.cxx b/packages/kernel/current/tests/release.cxx --- a/packages/kernel/current/tests/release.cxx +++ b/packages/kernel/current/tests/release.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/sched1.cxx b/packages/kernel/current/tests/sched1.cxx --- a/packages/kernel/current/tests/sched1.cxx +++ b/packages/kernel/current/tests/sched1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/stress_threads.c b/packages/kernel/current/tests/stress_threads.c new file mode 100644 --- /dev/null +++ b/packages/kernel/current/tests/stress_threads.c @@ -0,0 +1,559 @@ +//========================================================================== +// +// stress_threads.cxx +// +// Basic thread stress test +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): rosalia +// Contributors: rosalia +// Date: 1999-04-13 +// Description: Very simple thread stress test, with some memory +// allocation and alarm handling. +//####DESCRIPTIONEND#### + +#include +#include + +#include + +#if defined(CYGPKG_KERNEL) && defined(CYGPKG_IO) && defined(CYGPKG_LIBC) + +#include +#include + +#if defined(CYGFUN_KERNEL_API_C) + +#include + +#ifdef CYGPKG_LIBC_STDIO + +#include +#include + +#if defined(CYGPKG_LIBM) + +#include +#include + +#if defined(CYGFUN_KERNEL_THREADS_TIMER) +#if defined(CYGPKG_LIBC_MALLOC) + +/* if TIME_LIMIT is defined, it represents the number of seconds this + test should last; if it is undefined the test will go forever */ +#define DEATH_TIME_LIMIT 15 +/* #undef DEATH_TIME_LIMIT */ + +#define STACK_SIZE (CYGNUM_HAL_STACK_SIZE_TYPICAL) +#define STACK_SIZE2 (8*1024 + CYGNUM_HAL_STACK_SIZE_TYPICAL) + +#define N_CLIENTS 4 +#define N_LISTENERS 4 +#define MAX_HANDLERS 19 + +#if (CYGNUM_KERNEL_SCHED_PRIORITIES < (N_CLIENTS+N_LISTENERS+MAX_HANDLERS)) +# error "not enough priorities available" +#endif + +/* if we use the bitmap scheduler we must make sure we don't use the + same priority more than once, so we must store those already in use */ +static char priority_in_use[N_CLIENTS+N_LISTENERS+MAX_HANDLERS]; + +/* now declare (and allocate space for) some kernel objects, like the + threads we will use */ +cyg_thread client_thread_s[N_CLIENTS]; +cyg_thread listener_thread_s[N_LISTENERS]; +cyg_thread handler_thread_s[MAX_HANDLERS]; + +/* space for stacks for all threads */ +char client_stack[N_CLIENTS][STACK_SIZE]; +char listener_stack[N_LISTENERS][STACK_SIZE]; +char handler_stack[MAX_HANDLERS][STACK_SIZE2]; + +/* now the handles for the threads */ +cyg_handle_t clientH[N_CLIENTS]; +cyg_handle_t listenerH[N_LISTENERS]; +cyg_handle_t handlerH[MAX_HANDLERS]; + +#ifdef DEATH_TIME_LIMIT +/* how many client threads have been killed by the death handler */ +int n_clients_killed = 0; +#endif /* DEATH_TIME_LIMIT */ + +/* and now variables for the procedure which is the thread */ +cyg_thread_entry_t client_program, listener_program, handler_program; + +/* a few mutexes used in the code */ +cyg_mutex_t client_request_lock, handler_slot_lock, statistics_print_lock; + +/* a global variable with which the client and server coordinate */ +int client_makes_request = 0; + +/* indicates that it's time to print out a report */ +int time_to_report = 0; + +/*** now application-specific variables ***/ +/* an array that stores whether the handler threads are in use */ +int handler_thread_in_use[MAX_HANDLERS]; + +/***** statistics-gathering variables *****/ +struct s_statistics { + /* store the number of times each handler has been invoked */ + unsigned long handler_invocation_histogram[MAX_HANDLERS]; + + /* store how many times malloc has been attempted and how many times + it has failed */ + unsigned long malloc_tries, malloc_failures; + + /* how many threads have been created */ + unsigned long thread_creations, thread_exits; +}; + +struct s_statistics statistics; + +/* some function prototypes; those with the sc_ prefix are + "statistics-collecting" versions of the cyg_ primitives */ +void sc_thread_create( + cyg_addrword_t sched_info, /* scheduling info (eg pri) */ + cyg_thread_entry_t *entry, /* entry point function */ + cyg_addrword_t entry_data, /* entry data */ + char *name, /* optional thread name */ + void *stack_base, /* stack base, NULL = alloc */ + cyg_ucount32 stack_size, /* stack size, 0 = default */ + cyg_handle_t *handle, /* returned thread handle */ + cyg_thread *thread /* put thread here */ +); +void sc_thread_exit(void); + +int get_handler_slot(cyg_handle_t current_threadH); +void perform_stressful_tasks(void); +void permute_array(char a[], int size, int seed); +void setup_death_alarm(cyg_addrword_t data, cyg_handle_t *deathHp, + cyg_alarm *death_alarm_p, int *killed_p); +void handle_death(cyg_handle_t deathH, cyg_handle_t alarmH); +void print_statistics(void); + +/* we need to declare the alarm handling function (which is defined + below), so that we can pass it to cyg_alarm_initialize() */ +cyg_alarm_t report_alarm_func, death_alarm_func; + +/* handle and alarm for the report alarm */ +cyg_handle_t report_alarmH, counterH, system_clockH; +cyg_alarm report_alarm; + +/* we install our own startup routine which sets up threads */ +void cyg_user_start(void) +{ + int i; + + CYG_TEST_INIT(); + CYG_TEST_INFO("# Entering stress's cyg_user_start() function"); + + cyg_mutex_init(&client_request_lock); + cyg_mutex_init(&statistics_print_lock); + + /* initialize statistics */ + memset(&statistics, 0, sizeof(statistics)); + + /* initialize all handler threads to not be in use */ + for (i = 0; i < MAX_HANDLERS; ++i) { + handler_thread_in_use[i] = 0; + } + for (i = 0; i < N_CLIENTS; ++i) { + int prio; + char thread_name[20]; + sprintf(thread_name, "client-%02d", i); + prio = i; + sc_thread_create(prio, client_program, (cyg_addrword_t) i, + thread_name, (void *) client_stack[i], STACK_SIZE, + &(clientH[i]), &client_thread_s[i]); + priority_in_use[prio] = 1; + } + for (i = 0; i < N_LISTENERS; ++i) { + int prio; + char thread_name[20]; + sprintf(thread_name, "listener-%02d", i); + prio = N_CLIENTS + i; + sc_thread_create(prio, listener_program, (cyg_addrword_t) i, + thread_name, (void *) listener_stack[i], STACK_SIZE, + &listenerH[i], &listener_thread_s[i]); + priority_in_use[prio] = 1; + } + + for (i = 0; i < N_CLIENTS; ++i) { + cyg_thread_resume(clientH[i]); + } + for (i = 0; i < N_LISTENERS; ++i) { + cyg_thread_resume(listenerH[i]); + } + + /* set up the alarm which gives periodic wakeups to say "time to + print a report */ + system_clockH = cyg_real_time_clock(); + cyg_clock_to_counter(system_clockH, &counterH); + + cyg_alarm_create(counterH, report_alarm_func, + (cyg_addrword_t) 4000, + &report_alarmH, &report_alarm); + if (cyg_test_is_simulator) { + cyg_alarm_initialize(report_alarmH, cyg_current_time()+300, 400); + } else { + cyg_alarm_initialize(report_alarmH, cyg_current_time()+300, 4000); + } + +} + +/* client_program() -- an obnoxious client which makes a lot of requests */ +void client_program(cyg_addrword_t data) +{ + int delay; + + cyg_handle_t counterH, deathH, system_clockH; + cyg_alarm death_alarm; + int is_dead = 0; + + setup_death_alarm(data, &deathH, &death_alarm, &is_dead); + + printf("# Starting client-%d\n", (int) data); + + system_clockH = cyg_real_time_clock(); + cyg_clock_to_counter(system_clockH, &counterH); + + for (;;) { + delay = (rand() % 3); + + /* now send a request to the server */ + cyg_mutex_lock(&client_request_lock); { + ++client_makes_request; +/* printf("client_makes_request %d\n", client_makes_request); */ + } cyg_mutex_unlock(&client_request_lock); + + cyg_thread_delay(10+delay); +/* cyg_thread_delay(0); */ +#ifdef DEATH_TIME_LIMIT + if (is_dead) { + handle_death(deathH, report_alarmH); + } +#endif /* DEATH_TIME_LIMIT */ + } +} + +/* listener_program() -- listens for a request and spawns a handler to + take care of the request */ +void listener_program(cyg_addrword_t data) +{ +/* int message = (int) data; */ + int handler_slot; + + printf("# Beginning execution; thread data is %d\n", (int) data); + + for (;;) { +#ifdef DEATH_TIME_LIMIT + /* as an extra task, the listener sees if all clients have been + killed off, so it can report that the test is over */ + if (n_clients_killed == N_CLIENTS) { + n_clients_killed = -1; /* so we don't call this again */ + CYG_TEST_PASS_FINISH("Kernel thread stress test OK"); + } +#endif /* DEATH_TIME_LIMIT */ + if (client_makes_request > 0) { + int prio; + /* printf("just got a request from a client (count = %d)\n", */ + /* client_makes_request); */ + cyg_mutex_lock(&client_request_lock); { + --client_makes_request; + } cyg_mutex_unlock(&client_request_lock); + + handler_slot = get_handler_slot(listenerH[(int) data]); + prio = N_CLIENTS+N_LISTENERS+handler_slot; + priority_in_use[prio] = 1; + sc_thread_create(prio, handler_program, + (cyg_addrword_t) handler_slot, + "handler", (void *) handler_stack[handler_slot], + STACK_SIZE2, &handlerH[handler_slot], + &handler_thread_s[handler_slot]); + cyg_thread_resume(handlerH[handler_slot]); + ++statistics.handler_invocation_histogram[handler_slot]; + } + cyg_thread_delay(1); + } +} + +/* handler_program() -- is spawned to handle each incoming request */ +void handler_program(cyg_addrword_t data) +{ + /* here is where we perform specific stressful tasks */ + perform_stressful_tasks(); + + if (time_to_report) { + time_to_report = 0; + print_statistics(); + } + + cyg_thread_delay(4 + (int) (0.5*log(1.0 + fabs((rand() % 1000000))))); +/* cyg_thread_delay(0); */ + + /* lock the scheduler before we declare this thread slot available + and quit; note that cyg_thread_exit() will unlock the scheduler + as many times as necessary */ + cyg_mutex_lock(&handler_slot_lock); { + handler_thread_in_use[data] = 0; + priority_in_use[N_CLIENTS + N_LISTENERS + (int) data] = 0; + } cyg_mutex_unlock(&handler_slot_lock); + /* FIXME: could there be a race condition right here? I unlock the + scheduler, so I could get pre-empted out, but meanwhile I have + declared this thread available again. must fix it. */ + sc_thread_exit(); +} + +/* look for an available handler thread */ +int get_handler_slot(cyg_handle_t current_threadH) +{ + int i; + int found = 0; + + while (!found) { + for (i = 0; i < MAX_HANDLERS; ++i) { + cyg_mutex_lock(&handler_slot_lock); { + if (!handler_thread_in_use[i]) { + found = 1; + handler_thread_in_use[i] = 1; + } + } cyg_mutex_unlock(&handler_slot_lock); + if (found) { + break; + } +#ifdef DEATH_TIME_LIMIT + /* must do a check here to see if all clients have been killed, + since otherwise we might end up in an infinite loop */ + if (n_clients_killed == N_CLIENTS) { + n_clients_killed = -1; /* so we don't call this again */ + CYG_TEST_PASS_FINISH("Kernel thread stress test OK"); + } +#endif + } + cyg_thread_delay(1); + } + return i; +} + +/* do things which will stress the system */ +void perform_stressful_tasks() +{ +#define MAX_MALLOCED_SPACES 100 /* do this many mallocs at most */ +#define MALLOCED_BASE_SIZE 1 /* basic size in bytes */ + char *spaces[MAX_MALLOCED_SPACES]; + unsigned int i; + + cyg_mutex_t tmp_lock; + + cyg_uint8 pool_space[10][100]; + cyg_handle_t mempool_handles[10]; + cyg_mempool_fix mempool_objects[10]; + + cyg_mutex_init(&tmp_lock); + + /* here I use malloc, which uses the kernel's variable memory pools. + note that malloc/free is a bit simple-minded here: it does not + try to really fragment things, and it does not try to make the + allocation/deallocation concurrent with other thread execution + (although I'm about to throw in a yield()) */ + for (i = 0; i < MAX_MALLOCED_SPACES; ++i) { + ++statistics.malloc_tries; +/* spaces[i] = (char *) malloc(((int)(sqrt(i*2.0))+1)*MALLOCED_BASE_SIZE); */ + spaces[i] = (char *) malloc(((int)i*2.0+1)*MALLOCED_BASE_SIZE); + if (i % 100 == 0) { + cyg_thread_yield(); + } + } + + /* now free it all up */ + for (i = 0; i < MAX_MALLOCED_SPACES; ++i) { + if (spaces[i] != NULL) { + unsigned int j; + for (j = 0; j < (i*2+1)*MALLOCED_BASE_SIZE; ++j) { + spaces[i][j] = 0xAA; /* write a bit pattern */ + } + free(spaces[i]); + } else { + ++statistics.malloc_failures; + } + } + /* now allocate and then free some fixed-size memory pools; for + now this is simple-minded because it does not have many threads + sharing the memory pools and racing for memory. */ + for (i = 0; i < 10; ++i) { + cyg_mempool_fix_create(pool_space[i], 100, (i+1)*3, + &mempool_handles[i], &mempool_objects[i]); + } + + for (i = 0; i < 10; ++i) { + spaces[i] = cyg_mempool_fix_try_alloc(mempool_handles[i]); + } + + for (i = 0; i < 10; ++i) { + if (spaces[i]) { + cyg_mempool_fix_delete(mempool_handles[i]); + } + } + + cyg_mutex_destroy(&tmp_lock); +} + +/* report_alarm_func() is invoked as an alarm handler, so it should be + quick and simple. in this case it sets a global flag which is + checked by threads. */ +void report_alarm_func(cyg_handle_t alarmH, cyg_addrword_t data) +{ + time_to_report = 1; +} + +/* this sets up death alarms. it gets the handle and alarm from the + caller, since they must persist for the life of the alarm */ +void setup_death_alarm(cyg_addrword_t data, cyg_handle_t *deathHp, + cyg_alarm *death_alarm_p, int *killed_p) +{ +#ifdef DEATH_TIME_LIMIT + cyg_handle_t system_clockH, counterH; + cyg_resolution_t rtc_res; + + system_clockH = cyg_real_time_clock(); + cyg_clock_to_counter(system_clockH, &counterH); + + cyg_alarm_create(counterH, death_alarm_func, + (cyg_addrword_t) killed_p, + deathHp, death_alarm_p); + rtc_res = cyg_clock_get_resolution(system_clockH); + { + cyg_tick_count_t tick_delay; + tick_delay = (long long) + ((1000000000.0*rtc_res.divisor) + *((double)DEATH_TIME_LIMIT)/((double)rtc_res.dividend)); + if ( cyg_test_is_simulator ) + tick_delay /= 10; + cyg_alarm_initialize(*deathHp, cyg_current_time() + tick_delay, 0); + } +#endif /* DEATH_TIME_LIMIT */ +} + +/* death_alarm_func() is the alarm handler that kills the current + thread after a specified timeout. It does so by setting a flag the + thread is constantly checking. */ +void death_alarm_func(cyg_handle_t alarmH, cyg_addrword_t data) +{ + int *killed_p; + killed_p = (int *) data; + *killed_p = 1; +} + +#ifdef DEATH_TIME_LIMIT +/* handle_death is called by a client thread when it dies; it kills + off the alarm */ +void handle_death(cyg_handle_t deathH, cyg_handle_t alarmH) +{ + ++n_clients_killed; + cyg_alarm_delete(deathH); + cyg_alarm_delete(alarmH); + cyg_thread_exit(); +} +#endif /* DEATH_TIME_LIMIT */ + +/* now I write the sc_ versions of the cyg_functions */ +void sc_thread_create( + cyg_addrword_t sched_info, /* scheduling info (eg pri) */ + cyg_thread_entry_t *entry, /* entry point function */ + cyg_addrword_t entry_data, /* entry data */ + char *name, /* optional thread name */ + void *stack_base, /* stack base, NULL = alloc */ + cyg_ucount32 stack_size, /* stack size, 0 = default */ + cyg_handle_t *handle, /* returned thread handle */ + cyg_thread *thread /* put thread here */ +) +{ +/*printf("Creating a thread -- priority is %lu\n", (unsigned long) sched_info);*/ +/* fflush(stdout); */ + ++statistics.thread_creations; + cyg_thread_create(sched_info, entry, entry_data, name, + stack_base, stack_size, handle, thread); +} + +void sc_thread_exit() +{ +/* printf("exiting\n"); */ +/* fflush(stdout); */ + ++statistics.thread_exits; + cyg_thread_exit(); +} + +void print_statistics(void) +{ + int i; + + cyg_mutex_lock(&statistics_print_lock); { + printf("Handler-invocations: "); + for (i = 0; i < MAX_HANDLERS; ++i) { + printf("%4lu ", statistics.handler_invocation_histogram[i]); + } + printf("\n"); + printf("malloc()-tries/failures: -- %7lu %7lu\n", + statistics.malloc_tries, statistics.malloc_failures); + printf("client_makes_request: %d\n", client_makes_request); + } cyg_mutex_unlock(&statistics_print_lock); +} + +#else /* CYGSEM_LIBC_MALLOC */ +# define N_A_MSG "this test needs malloc" +#endif /* CYGSEM_LIBC_MALLOC */ + +#else /* CYGFUN_KERNEL_THREADS_TIMER */ +# define N_A_MSG "this test needs kernel threads timer" +#endif /* CYGFUN_KERNEL_THREADS_TIMER */ + +#else /* CYGPKG_LIBM */ +# define N_A_MSG "this test needs libm" +#endif /* CYGPKG_LIBM */ + +#else /* CYGSEM_LIBC_STDIO */ +# define N_A_MSG "this test needs stdio" +#endif /* CYGSEM_LIBC_STDIO */ + +#else // def CYGFUN_KERNEL_API_C +# define N_A_MSG "this test needs Kernel C API" +#endif + +#else // def CYGPKG_KERNEL && CYGPKG_IO && CYGPKG_LIBC +# define N_A_MSG "this tests needs Kernel, libc and IO" +#endif + +#ifdef N_A_MSG +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA( N_A_MSG); +} +#endif // N_A_MSG diff --git a/packages/kernel/current/tests/sync2.cxx b/packages/kernel/current/tests/sync2.cxx --- a/packages/kernel/current/tests/sync2.cxx +++ b/packages/kernel/current/tests/sync2.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -71,18 +71,18 @@ static cyg_ucount8 m0d=99, sd=2, cd0=99, static void entry0( CYG_ADDRWORD data ) { for(cyg_ucount16 i=0; i #include +bool cyg_test_is_simulator=false; // infrastructure changes as necessary + void cyg_test_init() { diag_init(); diff --git a/packages/kernel/current/tests/testaux.h b/packages/kernel/current/tests/testaux.h --- a/packages/kernel/current/tests/testaux.h +++ b/packages/kernel/current/tests/testaux.h @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/kernel/current/tests/testaux.hxx b/packages/kernel/current/tests/testaux.hxx --- a/packages/kernel/current/tests/testaux.hxx +++ b/packages/kernel/current/tests/testaux.hxx @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -33,7 +33,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): dsm -// Contributors: dsm +// Contributors: dsm // Date: 1998-03-09 // Description: // Defines some convenience functions to get us going. In @@ -43,16 +43,27 @@ // //####DESCRIPTIONEND#### + +static inline void *operator new(size_t size, void *ptr) { return ptr; }; + + #ifdef NTHREADS -#define STACKSIZE 4096 +#ifndef STACKSIZE +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#endif static Cyg_Thread *thread[NTHREADS]; -static char thread_obj[NTHREADS][sizeof(Cyg_Thread)]; -static char stack[NTHREADS][STACKSIZE]; +typedef CYG_WORD64 CYG_ALIGNMENT_TYPE; -static inline void *operator new(size_t size, void *ptr) { return ptr; }; +static CYG_ALIGNMENT_TYPE thread_obj[NTHREADS] [ + (sizeof(Cyg_Thread)+sizeof(CYG_ALIGNMENT_TYPE)-1) + / sizeof(CYG_ALIGNMENT_TYPE) ]; + +static CYG_ALIGNMENT_TYPE stack[NTHREADS] [ + (STACKSIZE+sizeof(CYG_ALIGNMENT_TYPE)-1) + / sizeof(CYG_ALIGNMENT_TYPE) ]; static int nthreads = 0; @@ -62,7 +73,10 @@ static Cyg_Thread *new_thread(cyg_thread "Attempt to create more than NTHREADS threads"); thread[nthreads] = new( (void *)&thread_obj[nthreads] ) - Cyg_Thread(entry, data, STACKSIZE, (CYG_ADDRESS)stack[nthreads] ); + Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + entry, data, + NULL, // no name + (CYG_ADDRESS)stack[nthreads], STACKSIZE ); thread[nthreads]->resume(); diff --git a/packages/kernel/current/tests/thread0.cxx b/packages/kernel/current/tests/thread0.cxx --- a/packages/kernel/current/tests/thread0.cxx +++ b/packages/kernel/current/tests/thread0.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -48,7 +48,7 @@ #include "testaux.hxx" -#define STACKSIZE 4096 +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL static char stack[STACKSIZE]; @@ -71,7 +71,10 @@ static bool flash( void ) CYG_ASSERTCLASS(&t1, "error"); #endif - Cyg_Thread t2( entry, (CYG_ADDRWORD)p, STACKSIZE, (CYG_ADDRESS)stack ); + Cyg_Thread t2( CYG_SCHED_DEFAULT_INFO, + entry, (CYG_ADDRWORD)p, + "thread t2", + (CYG_ADDRESS)stack, STACKSIZE ); CYG_ASSERTCLASS(&t2, "error"); diff --git a/packages/kernel/current/tests/thread1.cxx b/packages/kernel/current/tests/thread1.cxx --- a/packages/kernel/current/tests/thread1.cxx +++ b/packages/kernel/current/tests/thread1.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -53,19 +53,23 @@ #include +#ifdef CYGFUN_KERNEL_THREADS_TIMER + #include #include #include "testaux.hxx" +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#else #define STACKSIZE 2000 +#endif static char stack[2][STACKSIZE]; static char thread[2][sizeof(Cyg_Thread)]; -inline void *operator new(size_t size, void *ptr) { return ptr; }; - static Cyg_Thread *pt0,*pt1; static cyg_uint16 uid0,uid1; @@ -80,7 +84,7 @@ static void entry0( CYG_ADDRWORD data ) pt1->resume(); do { - pt0->delay(1); + pt0->delay(1); } while( Cyg_Thread::RUNNING == pt1->get_state() ); CHECK( Cyg_Thread::SLEEPING == pt1->get_state() ); @@ -105,7 +109,7 @@ static void entry1( CYG_ADDRWORD data ) pt1->sleep(); pt1->suspend(); - Cyg_Thread::exit(); // no guarantee this will be called + Cyg_Thread::exit(); // no guarantee this will be called } void thread1_main( void ) @@ -113,9 +117,15 @@ void thread1_main( void ) CYG_TEST_INIT(); pt0 = new((void *)&thread[0]) - Cyg_Thread(entry0, 222, STACKSIZE, (CYG_ADDRESS)stack[0] ); + Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + entry0, 222, + "thread 0", + (CYG_ADDRESS)stack[0], STACKSIZE ); pt1 = new((void *)&thread[1]) - Cyg_Thread(entry1, 333, STACKSIZE, (CYG_ADDRESS)stack[1] ); + Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + entry1, 333, + "thread 1", + (CYG_ADDRESS)stack[1], STACKSIZE ); CYG_ASSERTCLASS( pt0, "error" ); CYG_ASSERTCLASS( pt1, "error" ); @@ -134,4 +144,15 @@ cyg_start( void ) thread1_main(); } +#else // ifdef CYGFUN_KERNEL_THREADS_TIMER + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Kernel threads timer disabled"); +} + +#endif // ifdef CYGFUN_KERNEL_THREADS_TIMER + // EOF thread1.cxx diff --git a/packages/kernel/current/tests/thread2.cxx b/packages/kernel/current/tests/thread2.cxx --- a/packages/kernel/current/tests/thread2.cxx +++ b/packages/kernel/current/tests/thread2.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -65,26 +65,18 @@ #include -#include "testaux.hxx" - #ifndef CYGIMP_THREAD_PRIORITY #error "Test requires thread priorities" #endif -#define STACKSIZE 4096 - -static char stack[3][STACKSIZE]; - static Cyg_Counting_Semaphore s0, s1, s2; static volatile cyg_ucount8 q = 0; static Cyg_Thread *thread0, *thread1, *thread2; -static char thread[3][sizeof(Cyg_Thread)]; - -inline void *operator new(size_t size, void *ptr) { return ptr; }; - +#define NTHREADS 3 +#include "testaux.hxx" static void entry0( CYG_ADDRWORD data ) { @@ -161,12 +153,9 @@ void thread2_main( void ) { CYG_TEST_INIT(); - thread0 = new((void *)&thread[0]) - Cyg_Thread(entry0, 0, STACKSIZE, (CYG_ADDRESS)stack[0] ); - thread1 = new((void *)&thread[1]) - Cyg_Thread(entry1, 1, STACKSIZE, (CYG_ADDRESS)stack[1] ); - thread2 = new((void *)&thread[2]) - Cyg_Thread(entry2, 2, STACKSIZE, (CYG_ADDRESS)stack[2] ); + thread0 = new_thread( entry0, 0 ); + thread1 = new_thread( entry1, 1 ); + thread2 = new_thread( entry2, 2 ); thread0->resume(); thread1->resume(); diff --git a/packages/kernel/current/tests/thread_gdb.c b/packages/kernel/current/tests/thread_gdb.c --- a/packages/kernel/current/tests/thread_gdb.c +++ b/packages/kernel/current/tests/thread_gdb.c @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -42,13 +42,20 @@ #include -#if defined(CYGFUN_KERNEL_API_C) && defined(CYGSEM_KERNEL_SCHED_MLQUEUE) +#if defined(CYGFUN_KERNEL_API_C) && defined(CYGSEM_KERNEL_SCHED_MLQUEUE) &&\ + (CYGNUM_KERNEL_SCHED_PRIORITIES > 26) + +#include // for CYGNUM_HAL_STACK_SIZE_TYPICAL // ------------------------------------------------------------------------- #define THREADS 10 +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +#else #define STACKSIZE (2*1024) +#endif #define CONTROLLER_PRI_HI 0 #define CONTROLLER_PRI_LO 25 @@ -320,7 +327,7 @@ void controller( cyg_addrword_t id ) // again). Change my prio to low, so that they all get to run and hit the // breakpoint. // +++ A different one running every time, others in a mixture of -// ready and sleeping states. +// ready and sleeping states. worker_state = WORKER_STATE_BREAK; @@ -389,7 +396,7 @@ cyg_start( void ) CYG_TEST_INIT(); CYG_TEST_PASS_FINISH("Incorrect configuration for this test"); } -#endif /* def CYGFUN_KERNEL_API_C && !def CYGSEM_KERNEL_SCHED_MLQUEUE */ +#endif /* def CYGFUN_KERNEL_API_C && ... */ // ------------------------------------------------------------------------- // EOF thread_gdb.c diff --git a/packages/kernel/current/tests/tm_basic.cxx b/packages/kernel/current/tests/tm_basic.cxx --- a/packages/kernel/current/tests/tm_basic.cxx +++ b/packages/kernel/current/tests/tm_basic.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ // Author(s): gthomas // Contributors: gthomas // Date: 1998-10-19 -// Description: Very simple timing test setup +// Description: Very simple kernel timing test //####DESCRIPTIONEND#### #include @@ -48,6 +48,17 @@ #include #include + +// Define this to see the statistics with the first sample datum removed. +// This can expose the effects of caches on the speed of operations. +#undef STATS_WITHOUT_FIRST_SAMPLE + +#if defined(CYGFUN_KERNEL_API_C) && \ + defined(CYGSEM_KERNEL_SCHED_MLQUEUE) && \ + defined(CYGVAR_KERNEL_COUNTERS_CLOCK) && \ + !defined(CYGPKG_HAL_I386_LINUX) && \ + (CYGNUM_KERNEL_SCHED_PRIORITIES > 12) + #define NTHREADS 1 #include "testaux.hxx" @@ -57,8 +68,8 @@ typedef struct fun_times { cyg_uint32 end; } fun_times; -#define NSAMPLES 10 -#define NTEST_THREADS 32 +#define NSAMPLES 32 +#define NTEST_THREADS 24 #define NTHREAD_SWITCHES 128 #define NMUTEXES 32 #define NMBOXES 32 @@ -67,7 +78,28 @@ typedef struct fun_times { #define NCOUNTERS 32 #define NALARMS 32 -#define STACK_SIZE 2048 // Is this large enough? +#define NSAMPLES_SIM 2 +#define NTEST_THREADS_SIM 2 +#define NTHREAD_SWITCHES_SIM 4 +#define NMUTEXES_SIM 2 +#define NMBOXES_SIM 2 +#define NSEMAPHORES_SIM 2 +#define NSCHEDS_SIM 4 +#define NCOUNTERS_SIM 2 +#define NALARMS_SIM 2 + +static int nsamples; +static int ntest_threads; +static int nthread_switches; +static int nmutexes; +static int nmboxes; +static int nsemaphores; +static int nscheds; +static int ncounters; +static int nalarms; + +#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM + static char stacks[NTEST_THREADS][STACK_SIZE]; static cyg_thread test_threads[NTEST_THREADS]; static cyg_handle_t threads[NTEST_THREADS]; @@ -103,8 +135,17 @@ static cyg_alarm test_alarms[NALARMS]; static cyg_handle_t alarms[NALARMS]; static fun_times alarm_ft[NALARMS]; +static long rtc_resolution[] = CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION; +static long ns_per_system_clock; + +#ifdef HAL_CLOCK_LATENCY +// Data kept by kernel real time clock measuring clock interrupt latency +extern cyg_tick_count total_clock_latency, total_clock_interrupts; +extern cyg_int32 min_clock_latency, max_clock_latency; +extern bool measure_clock_latency; +#endif + externC void diag_printf(const char *, ...); -externC void sprintf(char *, const char *, ...); void run_sched_tests(void); void run_thread_tests(void); @@ -118,32 +159,195 @@ void run_semaphore_circuit_test(void); void run_counter_tests(void); void run_alarm_tests(void); -#ifdef HAL_CLOCK_LATENCY -extern cyg_tick_count total_clock_latency, total_clock_interrupts; -extern cyg_int32 min_clock_latency, max_clock_latency; -#endif - -cyg_uint32 -ticks_to_us(cyg_uint32 ticks) -{ - int us; - // Assumes that the clock is set up for 10ms ticks - us = (10000 * ticks) / CYGNUM_KERNEL_COUNTERS_RTC_PERIOD; - return (us); -} - // Wait until a clock tick [real time clock] has passed. This should keep it // from happening again during a measurement, thus minimizing any fluctuations void wait_for_tick(void) { - cyg_uint32 tv0, tv1; - HAL_CLOCK_READ(&tv0); + cyg_tick_count_t tv0, tv1; + tv0 = cyg_current_time(); while (true) { - HAL_CLOCK_READ(&tv1); - if (tv1 < tv0) break; - tv0 = tv1; + tv1 = cyg_current_time(); + if (tv1 != tv0) break; + } +} + +// Display a number of ticks as microseconds +// Note: for improved calculation significance, values are kept in ticks*1000 +void +show_ticks_in_us(cyg_uint32 ticks) +{ + long long ns; + ns = (ns_per_system_clock * (long long)ticks) / CYGNUM_KERNEL_COUNTERS_RTC_PERIOD; + ns += 5; // for rounding to .01us + diag_printf("%5d.%02d", (int)(ns/1000), (int)((ns%1000)/10)); +} + +// +// If the kernel is instrumented to measure clock interrupt latency, these +// measurements can be drastically perturbed by printing via "diag_printf()" +// since that code may run with interrupts disabled for long periods. +// +// In order to get accurate/reasonable latency figures _for the kernel +// primitive functions beint tested_, the kernel's latency measurements +// are suspended while the printing actually takes place. +// +// The measurements are reenabled after the printing, thus allowing for +// fair measurements of the kernel primitives, which are not distorted +// by the printing mechanisms. + +#ifdef HAL_CLOCK_LATENCY +void +disable_clock_latency_measurement(void) +{ + wait_for_tick(); + measure_clock_latency = false; +} + +void +enable_clock_latency_measurement(void) +{ + wait_for_tick(); + measure_clock_latency = true; +} + +// Ensure that the measurements are reasonable (no startup anomalies) +void +reset_clock_latency_measurement(void) +{ + disable_clock_latency_measurement(); + total_clock_latency = 0; + total_clock_interrupts = 0; + min_clock_latency = 0x7FFFFFFF; + max_clock_latency = 0; + enable_clock_latency_measurement(); +} +#else +#define disable_clock_latency_measurement() +#define enable_clock_latency_measurement() +#define reset_clock_latency_measurement() +#endif + +void +show_times_hdr(void) +{ + disable_clock_latency_measurement(); + diag_printf("\n"); + diag_printf(" Confidence\n"); + diag_printf(" Ave Min Max Var Ave Min Function\n"); + diag_printf(" ====== ====== ====== ====== ========== ========\n"); + enable_clock_latency_measurement(); +} + +void +show_times_detail(fun_times ft[], int nsamples, char *title, bool ignore_first) +{ + int i, delta, min, max, con_ave, con_min, ave_dev; + int start_sample, total_samples; + cyg_int32 total, ave; + + if (ignore_first) { + start_sample = 1; + total_samples = nsamples-1; + } else { + start_sample = 0; + total_samples = nsamples; } + total = 0; + min = 0x7FFFFFFF; + max = 0; + for (i = start_sample; i < nsamples; i++) { + if (ft[i].end < ft[i].start) { + // Clock wrapped around (timer tick) + delta = (ft[i].end+CYGNUM_KERNEL_COUNTERS_RTC_PERIOD) - ft[i].start; + } else { + delta = ft[i].end - ft[i].start; + } + delta -= overhead; + if (delta < 0) delta = 0; + delta *= 1000; + total += delta; + if (delta < min) min = delta; + if (delta > max) max = delta; + } + ave = total / total_samples; + total = 0; + ave_dev = 0; + for (i = start_sample; i < nsamples; i++) { + if (ft[i].end < ft[i].start) { + // Clock wrapped around (timer tick) + delta = (ft[i].end+CYGNUM_KERNEL_COUNTERS_RTC_PERIOD) - ft[i].start; + } else { + delta = ft[i].end - ft[i].start; + } + delta -= overhead; + if (delta < 0) delta = 0; + delta *= 1000; + delta = delta - ave; + if (delta < 0) delta = -delta; + ave_dev += delta; + } + ave_dev /= total_samples; + con_ave = 0; + con_min = 0; + for (i = start_sample; i < nsamples; i++) { + if (ft[i].end < ft[i].start) { + // Clock wrapped around (timer tick) + delta = (ft[i].end+CYGNUM_KERNEL_COUNTERS_RTC_PERIOD) - ft[i].start; + } else { + delta = ft[i].end - ft[i].start; + } + delta -= overhead; + if (delta < 0) delta = 0; + delta *= 1000; + if ((delta <= (ave+ave_dev)) && (delta >= (ave-ave_dev))) con_ave++; + if ((delta <= (min+ave_dev)) && (delta >= (min-ave_dev))) con_min++; + } + con_ave = (con_ave * 100) / total_samples; + con_min = (con_min * 100) / total_samples; + show_ticks_in_us(ave); + show_ticks_in_us(min); + show_ticks_in_us(max); + show_ticks_in_us(ave_dev); + disable_clock_latency_measurement(); + diag_printf(" %3d%% %3d%%", con_ave, con_min); + diag_printf(" %s\n", title); + enable_clock_latency_measurement(); +} + +void +show_times(fun_times ft[], int nsamples, char *title) +{ + show_times_detail(ft, nsamples, title, false); +#ifdef STATS_WITHOUT_FIRST_SAMPLE + show_times_detail(ft, nsamples, "", true); +#endif +} + +void +show_test_parameters(void) +{ + disable_clock_latency_measurement(); + diag_printf("\nTesting parameters:\n"); + diag_printf(" Clock samples: %3d\n", nsamples); + diag_printf(" Threads: %3d\n", ntest_threads); + diag_printf(" Thread switches: %3d\n", nthread_switches); + diag_printf(" Mutexes: %3d\n", nmutexes); + diag_printf(" Mailboxes: %3d\n", nmboxes); + diag_printf(" Semaphores: %3d\n", nsemaphores); + diag_printf(" Scheduler operations: %3d\n", nscheds); + diag_printf(" Counters: %3d\n", ncounters); + diag_printf(" Alarms: %3d\n", nalarms); + diag_printf("\n"); + enable_clock_latency_measurement(); +} + +void +end_of_test_group(void) +{ + disable_clock_latency_measurement(); + diag_printf("\n"); + enable_clock_latency_measurement(); } // Compute a name for a thread @@ -164,7 +368,7 @@ test0(cyg_uint32 indx) void test1(cyg_uint32 indx) { - if (indx == (NTEST_THREADS-1)) { + if (indx == (cyg_uint32)(ntest_threads-1)) { cyg_semaphore_post(&synchro); // Signal that last thread is dying } cyg_thread_exit(); @@ -175,7 +379,7 @@ void test2(cyg_uint32 indx) { int i; - for (i = 0; i < NTHREAD_SWITCHES; i++) { + for (i = 0; i < nthread_switches; i++) { if (indx == 0) { HAL_CLOCK_READ(&test2_ft[i].start); } else { @@ -195,7 +399,7 @@ mutex_test(cyg_uint32 indx) { int i; cyg_mutex_lock(&test_mutexes[0]); - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { cyg_semaphore_wait(&synchro); wait_for_tick(); // Wait until the next clock tick to minimize aberations HAL_CLOCK_READ(&mutex_ft[i].start); @@ -215,7 +419,7 @@ mbox_test(cyg_uint32 indx) item = cyg_mbox_get(test_mbox_handles[0]); HAL_CLOCK_READ(&mbox_ft[(int)item].end); cyg_semaphore_post(&synchro); - } while ((int)item != (NMBOXES-1)); + } while ((int)item != (nmboxes-1)); cyg_thread_exit(); } @@ -224,7 +428,7 @@ void semaphore_test(cyg_uint32 indx) { int i; - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { cyg_semaphore_wait(&test_semaphores[0]); HAL_CLOCK_READ(&semaphore_ft[i].end); cyg_semaphore_post(&synchro); @@ -232,69 +436,9 @@ semaphore_test(cyg_uint32 indx) cyg_thread_exit(); } -void -show_times_hdr(void) -{ - diag_printf("\n"); - diag_printf(" Ave Min Max Variance Function\n"); - diag_printf("====== ====== ====== ======== ========\n"); -} - -void -show_times(fun_times ft[], int nsamples, char *title) -{ - int i, delta, min, max; - cyg_uint32 total, ave, var; - total = 0; - min = 0x7FFFFFFF; - max = 0; - for (i = 0; i < nsamples; i++) { - if (ft[i].end < ft[i].start) { - // Clock wrapped around (timer tick) - delta = (ft[i].end+CYGNUM_KERNEL_COUNTERS_RTC_PERIOD) - ft[i].start; - } else { - delta = ft[i].end - ft[i].start; - } - delta -= 2*overhead; - if (delta < 0) delta = 0; - total += delta; - if (delta < min) min = delta; - if (delta > max) max = delta; - } - ave = total / nsamples; - total = 0; - for (i = 0; i < nsamples; i++) { - if (ft[i].end < ft[i].start) { - // Clock wrapped around (timer tick) - delta = (ft[i].end+CYGNUM_KERNEL_COUNTERS_RTC_PERIOD) - ft[i].start; - } else { - delta = ft[i].end - ft[i].start; - } - delta -= 2*overhead; - if (delta < 0) delta = 0; - total = (delta - ave) * (delta - ave); - } - var = total / (nsamples - 1); - diag_printf("%6d %6d %6d %6d %s\n", - ticks_to_us(ave), ticks_to_us(min), ticks_to_us(max), ticks_to_us(var), title); -} - -void -show_test_parameters(void) -{ - diag_printf("\nTesting parameters:\n"); - diag_printf(" Clock samples: %3d\n", NSAMPLES); - diag_printf(" Threads: %3d\n", NTEST_THREADS); - diag_printf(" Thread switches: %3d\n", NTHREAD_SWITCHES); - diag_printf(" Mutexes: %3d\n", NMUTEXES); - diag_printf(" Mailboxes: %3d\n", NMBOXES); - diag_printf(" Semaphores: %3d\n", NSEMAPHORES); - diag_printf(" Scheduler operations: %3d\n", NSCHEDS); - diag_printf(" Counters: %3d\n", NCOUNTERS); - diag_printf(" Alarms: %3d\n", NALARMS); - diag_printf("\n"); -} - +// +// This set of tests is used to measure kernel primitives that deal with threads +// void run_thread_tests(void) { @@ -305,7 +449,7 @@ run_thread_tests(void) cyg_thread_set_priority(cyg_thread_self(), 2); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_create(10, // Priority - just a number test0, // entry @@ -318,69 +462,69 @@ run_thread_tests(void) ); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Create thread"); + show_times(thread_ft, ntest_threads, "Create thread"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_yield(); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Yield thread [all suspended]"); + show_times(thread_ft, ntest_threads, "Yield thread [all suspended]"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_suspend(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Suspend [suspended] thread"); + show_times(thread_ft, ntest_threads, "Suspend [suspended] thread"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_resume(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Resume thread"); + show_times(thread_ft, ntest_threads, "Resume thread"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_set_priority(threads[i], 11); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Set priority"); + show_times(thread_ft, ntest_threads, "Set priority"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); prio = cyg_thread_get_priority(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Get priority"); + show_times(thread_ft, ntest_threads, "Get priority"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_kill(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Kill [suspended] thread"); + show_times(thread_ft, ntest_threads, "Kill [suspended] thread"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_yield(); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Yield [no other] thread"); + show_times(thread_ft, ntest_threads, "Yield [no other] thread"); // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); // Recreate the test set - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { cyg_thread_create(10, // Priority - just a number test0, // entry i, // index @@ -393,56 +537,87 @@ run_thread_tests(void) } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { + HAL_CLOCK_READ(&thread_ft[i].start); + cyg_thread_resume(threads[i]); + HAL_CLOCK_READ(&thread_ft[i].end); + } + show_times(thread_ft, ntest_threads, "Resume [suspended low prio] thread"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_resume(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Resume [suspended low priority] thread"); + show_times(thread_ft, ntest_threads, "Resume [runnable low prio] thread"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); - cyg_thread_resume(threads[i]); + cyg_thread_suspend(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Resume [runnable low priority] thread"); + show_times(thread_ft, ntest_threads, "Suspend [runnable] thread"); + wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { + HAL_CLOCK_READ(&thread_ft[i].start); + cyg_thread_yield(); + HAL_CLOCK_READ(&thread_ft[i].end); + } + show_times(thread_ft, ntest_threads, "Yield [only low prio] thread"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_suspend(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Suspend [runnable] thread"); - - - wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { - HAL_CLOCK_READ(&thread_ft[i].start); - cyg_thread_yield(); - HAL_CLOCK_READ(&thread_ft[i].end); - } - show_times(thread_ft, NTEST_THREADS, "Yield [only low prio] thread"); - - wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { - HAL_CLOCK_READ(&thread_ft[i].start); - cyg_thread_suspend(threads[i]); - HAL_CLOCK_READ(&thread_ft[i].end); - } - show_times(thread_ft, NTEST_THREADS, "Suspend [runnable->not runnable] thread"); - for (i = 0; i < NTEST_THREADS; i++) { + show_times(thread_ft, ntest_threads, "Suspend [runnable->not runnable]"); + for (i = 0; i < ntest_threads; i++) { cyg_thread_resume(threads[i]); } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_kill(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Kill [runnable] thread"); + show_times(thread_ft, ntest_threads, "Kill [runnable] thread"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < ntest_threads; i++) { + HAL_CLOCK_READ(&thread_ft[i].start); + cyg_thread_delete(threads[i]); + HAL_CLOCK_READ(&thread_ft[i].end); + } + show_times(thread_ft, ntest_threads, "Destroy [dead] thread"); + + // Recreate the test set + for (i = 0; i < ntest_threads; i++) { + cyg_thread_create(10, // Priority - just a number + test0, // entry + i, // index + thread_name("thread", i), // Name + &stacks[i][0], // Stack + STACK_SIZE, // Size + &threads[i], // Handle + &test_threads[i] // Thread data structure + ); + cyg_thread_resume(threads[i]); + } + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < ntest_threads; i++) { + HAL_CLOCK_READ(&thread_ft[i].start); + cyg_thread_delete(threads[i]); + HAL_CLOCK_READ(&thread_ft[i].end); + } + show_times(thread_ft, ntest_threads, "Destroy [runnable] thread"); + // Set my priority lower than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 3); @@ -450,7 +625,7 @@ run_thread_tests(void) cyg_semaphore_init(&synchro, 0); // Recreate the test set - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { cyg_thread_create(2, // Priority - just a number test1, // entry i, // index @@ -463,19 +638,20 @@ run_thread_tests(void) } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { HAL_CLOCK_READ(&thread_ft[i].start); cyg_thread_resume(threads[i]); HAL_CLOCK_READ(&thread_ft[i].end); } - show_times(thread_ft, NTEST_THREADS, "Resume [high priority] thread"); + show_times(thread_ft, ntest_threads, "Resume [high priority] thread"); cyg_semaphore_wait(&synchro); // Wait for all threads to finish // Make sure they are all dead - for (i = 0; i < NTEST_THREADS; i++) { - cyg_thread_kill(threads[i]); + for (i = 0; i < ntest_threads; i++) { + cyg_thread_delete(threads[i]); } run_thread_switch_test(); + end_of_test_group(); } void @@ -500,10 +676,10 @@ run_thread_switch_test(void) cyg_semaphore_init(&synchro, 0); cyg_semaphore_wait(&synchro); wait_for_tick(); // Wait until the next clock tick to minimize aberations - show_times(test2_ft, NTHREAD_SWITCHES, "Thread switch"); + show_times(test2_ft, nthread_switches, "Thread switch"); // Clean up for (i = 0; i < 2; i++) { - cyg_thread_kill(threads[i]); + cyg_thread_delete(threads[i]); } } @@ -514,53 +690,54 @@ run_mutex_tests(void) // Mutex primitives wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_init(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Init mutex"); + show_times(mutex_ft, nmutexes, "Init mutex"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_lock(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Lock [unlocked] mutex"); + show_times(mutex_ft, nmutexes, "Lock [unlocked] mutex"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_unlock(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Unlock [locked] mutex"); + show_times(mutex_ft, nmutexes, "Unlock [locked] mutex"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_trylock(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Trylock [unlocked] mutex"); + show_times(mutex_ft, nmutexes, "Trylock [unlocked] mutex"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_trylock(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Trylock [locked] mutex"); + show_times(mutex_ft, nmutexes, "Trylock [locked] mutex"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { HAL_CLOCK_READ(&mutex_ft[i].start); cyg_mutex_destroy(&test_mutexes[i]); HAL_CLOCK_READ(&mutex_ft[i].end); } - show_times(mutex_ft, NMUTEXES, "Destroy mutex"); + show_times(mutex_ft, nmutexes, "Destroy mutex"); run_mutex_circuit_test(); + end_of_test_group(); } void @@ -584,14 +761,15 @@ run_mutex_circuit_test(void) cyg_thread_resume(mutex_test_thread_handle); // Need to raise priority so that this thread will block on the "lock" cyg_thread_set_priority(cyg_thread_self(), 2); - for (i = 0; i < NMUTEXES; i++) { + for (i = 0; i < nmutexes; i++) { cyg_semaphore_post(&synchro); cyg_mutex_lock(&test_mutexes[0]); HAL_CLOCK_READ(&mutex_ft[i].end); cyg_mutex_unlock(&test_mutexes[0]); cyg_semaphore_wait(&synchro); } - show_times(mutex_ft, NMUTEXES, "Unlock/Lock mutex"); + cyg_thread_delete(mutex_test_thread_handle); + show_times(mutex_ft, nmutexes, "Unlock/Lock mutex"); } void @@ -601,139 +779,143 @@ run_mbox_tests(void) void *item; // Mailbox primitives wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_create(&test_mbox_handles[i], &test_mboxes[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Create mbox"); + show_times(mbox_ft, nmboxes, "Create mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { - HAL_CLOCK_READ(&mbox_ft[i].start); - cnt = cyg_mbox_peek(test_mbox_handles[i]); - HAL_CLOCK_READ(&mbox_ft[i].end); - } - show_times(mbox_ft, NMBOXES, "Peek [empty] mbox"); - - wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { - HAL_CLOCK_READ(&mbox_ft[i].start); - cyg_mbox_put(test_mbox_handles[i], (void *)i); - HAL_CLOCK_READ(&mbox_ft[i].end); - } - show_times(mbox_ft, NMBOXES, "Put [first] mbox"); - - wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cnt = cyg_mbox_peek(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Peek [1 msg] mbox"); + show_times(mbox_ft, nmboxes, "Peek [empty] mbox"); +#ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_put(test_mbox_handles[i], (void *)i); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Put [second] mbox"); + show_times(mbox_ft, nmboxes, "Put [first] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cnt = cyg_mbox_peek(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Peek [2 msgs] mbox"); + show_times(mbox_ft, nmboxes, "Peek [1 msg] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { + HAL_CLOCK_READ(&mbox_ft[i].start); + cyg_mbox_put(test_mbox_handles[i], (void *)i); + HAL_CLOCK_READ(&mbox_ft[i].end); + } + show_times(mbox_ft, nmboxes, "Put [second] mbox"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < nmboxes; i++) { + HAL_CLOCK_READ(&mbox_ft[i].start); + cnt = cyg_mbox_peek(test_mbox_handles[i]); + HAL_CLOCK_READ(&mbox_ft[i].end); + } + show_times(mbox_ft, nmboxes, "Peek [2 msgs] mbox"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_get(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Get [first] mbox"); + show_times(mbox_ft, nmboxes, "Get [first] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_get(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Get [second] mbox"); + show_times(mbox_ft, nmboxes, "Get [second] mbox"); +#endif // ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_tryput(test_mbox_handles[i], (void *)i); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Tryput [first] mbox"); + show_times(mbox_ft, nmboxes, "Tryput [first] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_peek_item(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Peek item [non-empty] mbox"); + show_times(mbox_ft, nmboxes, "Peek item [non-empty] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_tryget(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Tryget [non-empty] mbox"); + show_times(mbox_ft, nmboxes, "Tryget [non-empty] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_peek_item(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Peek item [empty] mbox"); + show_times(mbox_ft, nmboxes, "Peek item [empty] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); item = cyg_mbox_tryget(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Tryget [empty] mbox"); + show_times(mbox_ft, nmboxes, "Tryget [empty] mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_waiting_to_get(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Waiting to get mbox"); + show_times(mbox_ft, nmboxes, "Waiting to get mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_waiting_to_put(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Waiting to put mbox"); + show_times(mbox_ft, nmboxes, "Waiting to put mbox"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_delete(test_mbox_handles[i]); HAL_CLOCK_READ(&mbox_ft[i].end); } - show_times(mbox_ft, NMBOXES, "Delete mbox"); + show_times(mbox_ft, nmboxes, "Delete mbox"); run_mbox_circuit_test(); + end_of_test_group(); } void run_mbox_circuit_test(void) { +#ifdef CYGMFN_KERNEL_SYNCH_MBOXT_PUT_CAN_WAIT int i; // Set my priority lower than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 3); @@ -750,79 +932,82 @@ run_mbox_circuit_test(void) &mbox_test_thread // Thread data structure ); cyg_thread_resume(mbox_test_thread_handle); - for (i = 0; i < NMBOXES; i++) { + for (i = 0; i < nmboxes; i++) { wait_for_tick(); // Wait until the next clock tick to minimize aberations HAL_CLOCK_READ(&mbox_ft[i].start); cyg_mbox_put(test_mbox_handles[0], (void *)i); cyg_semaphore_wait(&synchro); } - show_times(mbox_ft, NMBOXES, "Put/Get mbox"); + cyg_thread_delete(mbox_test_thread_handle); + show_times(mbox_ft, nmboxes, "Put/Get mbox"); +#endif } void run_semaphore_tests(void) { int i; - cyg_ucount32 sem_val; + cyg_count32 sem_val; // Semaphore primitives wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_init(&test_semaphores[i], 0); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Init semaphore"); + show_times(semaphore_ft, nsemaphores, "Init semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_post(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Post [0] semaphore"); + show_times(semaphore_ft, nsemaphores, "Post [0] semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_wait(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Wait [1] semaphore"); + show_times(semaphore_ft, nsemaphores, "Wait [1] semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_trywait(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Trywait [0] semaphore"); + show_times(semaphore_ft, nsemaphores, "Trywait [0] semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { cyg_semaphore_post(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_trywait(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Trywait [1] semaphore"); + show_times(semaphore_ft, nsemaphores, "Trywait [1] semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_peek(&test_semaphores[i], &sem_val); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Peek semaphore"); + show_times(semaphore_ft, nsemaphores, "Peek semaphore"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_destroy(&test_semaphores[i]); HAL_CLOCK_READ(&semaphore_ft[i].end); } - show_times(semaphore_ft, NSEMAPHORES, "Destroy semaphore"); + show_times(semaphore_ft, nsemaphores, "Destroy semaphore"); run_semaphore_circuit_test(); + end_of_test_group(); } void @@ -844,60 +1029,62 @@ run_semaphore_circuit_test(void) &semaphore_test_thread // Thread data structure ); cyg_thread_resume(semaphore_test_thread_handle); - for (i = 0; i < NSEMAPHORES; i++) { + for (i = 0; i < nsemaphores; i++) { wait_for_tick(); // Wait until the next clock tick to minimize aberations HAL_CLOCK_READ(&semaphore_ft[i].start); cyg_semaphore_post(&test_semaphores[0]); cyg_semaphore_wait(&synchro); } - show_times(semaphore_ft, NSEMAPHORES, "Post/Wait semaphore"); + cyg_thread_delete(semaphore_test_thread_handle); + show_times(semaphore_ft, nsemaphores, "Post/Wait semaphore"); } void run_counter_tests(void) { int i; - cyg_tick_count_t val; + cyg_tick_count_t val=0; wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_create(&counters[i], &test_counters[i]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Create counter"); + show_times(counter_ft, ncounters, "Create counter"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); val = cyg_counter_current_value(counters[i]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Get counter value"); + show_times(counter_ft, ncounters, "Get counter value"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_set_value(counters[i], val); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Set counter value"); + show_times(counter_ft, ncounters, "Set counter value"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_tick(counters[i]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Tick counter"); + show_times(counter_ft, ncounters, "Tick counter"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_delete(counters[i]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Delete counter"); + show_times(counter_ft, ncounters, "Delete counter"); + end_of_test_group(); } // Alarm callback function @@ -912,10 +1099,10 @@ static volatile int alarm_cnt; void alarm_cb2(cyg_handle_t alarm, cyg_addrword_t indx) { - if (alarm_cnt == NSCHEDS) return; + if (alarm_cnt == nscheds) return; sched_ft[alarm_cnt].start = 0; HAL_CLOCK_READ(&sched_ft[alarm_cnt++].end); - if (alarm_cnt == NSCHEDS) { + if (alarm_cnt == nscheds) { cyg_semaphore_post(&synchro); } } @@ -937,50 +1124,50 @@ run_alarm_tests(void) cyg_handle_t rtc_handle; wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { cyg_counter_create(&counters[i], &test_counters[i]); } - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { HAL_CLOCK_READ(&alarm_ft[i].start); cyg_alarm_create(counters[0], alarm_cb, 0, &alarms[i], &test_alarms[i]); HAL_CLOCK_READ(&alarm_ft[i].end); } - show_times(alarm_ft, NALARMS, "Create alarm"); + show_times(alarm_ft, nalarms, "Create alarm"); wait_for_tick(); // Wait until the next clock tick to minimize aberations init_val = 0; step_val = 0; - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { HAL_CLOCK_READ(&alarm_ft[i].start); cyg_alarm_initialize(alarms[i], init_val, step_val); HAL_CLOCK_READ(&alarm_ft[i].end); } - show_times(alarm_ft, NALARMS, "Initialize alarm"); + show_times(alarm_ft, nalarms, "Initialize alarm"); wait_for_tick(); // Wait until the next clock tick to minimize aberations init_val = 0; step_val = 0; - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { HAL_CLOCK_READ(&alarm_ft[i].start); cyg_alarm_disable(alarms[i]); HAL_CLOCK_READ(&alarm_ft[i].end); } - show_times(alarm_ft, NALARMS, "Disable alarm"); + show_times(alarm_ft, nalarms, "Disable alarm"); wait_for_tick(); // Wait until the next clock tick to minimize aberations init_val = 0; step_val = 0; - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { HAL_CLOCK_READ(&alarm_ft[i].start); cyg_alarm_enable(alarms[i]); HAL_CLOCK_READ(&alarm_ft[i].end); } - show_times(alarm_ft, NALARMS, "Enable alarm"); + show_times(alarm_ft, nalarms, "Enable alarm"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { HAL_CLOCK_READ(&alarm_ft[i].start); cyg_alarm_delete(alarms[i]); HAL_CLOCK_READ(&alarm_ft[i].end); } - show_times(alarm_ft, NALARMS, "Delete alarm"); + show_times(alarm_ft, nalarms, "Delete alarm"); wait_for_tick(); // Wait until the next clock tick to minimize aberations cyg_counter_create(&counters[0], &test_counters[0]); @@ -988,27 +1175,27 @@ run_alarm_tests(void) init_val = 9999; step_val = 9999; cyg_alarm_initialize(alarms[0], init_val, step_val); cyg_alarm_enable(alarms[0]); - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_tick(counters[0]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Tick counter [1 alarm]"); + show_times(counter_ft, ncounters, "Tick counter [1 alarm]"); wait_for_tick(); // Wait until the next clock tick to minimize aberations cyg_counter_create(&counters[0], &test_counters[0]); - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { cyg_alarm_create(counters[0], alarm_cb, 0, &alarms[i], &test_alarms[i]); init_val = 9999; step_val = 9999; cyg_alarm_initialize(alarms[i], init_val, step_val); cyg_alarm_enable(alarms[i]); } - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_tick(counters[0]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Tick counter [many alarms]"); + show_times(counter_ft, ncounters, "Tick counter [many alarms]"); wait_for_tick(); // Wait until the next clock tick to minimize aberations cyg_counter_create(&counters[0], &test_counters[0]); @@ -1016,30 +1203,48 @@ run_alarm_tests(void) init_val = 1; step_val = 1; cyg_alarm_initialize(alarms[0], init_val, step_val); cyg_alarm_enable(alarms[0]); - for (i = 0; i < NCOUNTERS; i++) { + for (i = 0; i < ncounters; i++) { HAL_CLOCK_READ(&counter_ft[i].start); cyg_counter_tick(counters[0]); HAL_CLOCK_READ(&counter_ft[i].end); } - show_times(counter_ft, NCOUNTERS, "Tick & fire counter [1 alarm]"); + show_times(counter_ft, ncounters, "Tick & fire counter [1 alarm]"); wait_for_tick(); // Wait until the next clock tick to minimize aberations cyg_counter_create(&counters[0], &test_counters[0]); - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { cyg_alarm_create(counters[0], alarm_cb, i, &alarms[i], &test_alarms[i]); init_val = 1; step_val = 1; cyg_alarm_initialize(alarms[i], init_val, step_val); cyg_alarm_enable(alarms[i]); } - for (i = 0; i < NCOUNTERS; i++) { - HAL_CLOCK_READ(&counter_ft[i].start); + for (i = 0; i < nalarms; i++) { + HAL_CLOCK_READ(&alarm_ft[i].start); cyg_counter_tick(counters[0]); - HAL_CLOCK_READ(&counter_ft[i].end); + HAL_CLOCK_READ(&alarm_ft[i].end); } - for (i = 0; i < NALARMS; i++) { + for (i = 0; i < nalarms; i++) { cyg_alarm_delete(alarms[i]); } - show_times(counter_ft, NCOUNTERS, "Tick & fire counter [many alarms]"); + show_times(alarm_ft, nalarms, "Tick & fire counters [>1 together]"); + + wait_for_tick(); // Wait until the next clock tick to minimize aberations + cyg_counter_create(&counters[0], &test_counters[0]); + for (i = 0; i < nalarms; i++) { + cyg_alarm_create(counters[0], alarm_cb, i, &alarms[i], &test_alarms[i]); + init_val = i+1; step_val = nalarms+1; + cyg_alarm_initialize(alarms[i], init_val, step_val); + cyg_alarm_enable(alarms[i]); + } + for (i = 0; i < nalarms; i++) { + HAL_CLOCK_READ(&alarm_ft[i].start); + cyg_counter_tick(counters[0]); + HAL_CLOCK_READ(&alarm_ft[i].end); + } + for (i = 0; i < nalarms; i++) { + cyg_alarm_delete(alarms[i]); + } + show_times(alarm_ft, nalarms, "Tick & fire counters [>1 separately]"); wait_for_tick(); // Wait until the next clock tick to minimize aberations cyg_clock_to_counter(cyg_real_time_clock(), &rtc_handle); @@ -1051,7 +1256,7 @@ run_alarm_tests(void) cyg_semaphore_wait(&synchro); cyg_alarm_disable(alarms[0]); cyg_alarm_delete(alarms[0]); - show_times(sched_ft, NSCHEDS, "Alarm latency [0 threads]"); + show_times(sched_ft, nscheds, "Alarm latency [0 threads]"); // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); @@ -1077,15 +1282,15 @@ run_alarm_tests(void) cyg_semaphore_wait(&synchro); cyg_alarm_disable(alarms[0]); cyg_alarm_delete(alarms[0]); - show_times(sched_ft, NSCHEDS, "Alarm latency [2 threads]"); + show_times(sched_ft, nscheds, "Alarm latency [2 threads]"); for (i = 0; i < 2; i++) { cyg_thread_suspend(threads[i]); - cyg_thread_kill(threads[i]); + cyg_thread_delete(threads[i]); } // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { cyg_thread_create(10, // Priority - just a number alarm_test, // entry i, // index @@ -1107,11 +1312,12 @@ run_alarm_tests(void) cyg_semaphore_wait(&synchro); cyg_alarm_disable(alarms[0]); cyg_alarm_delete(alarms[0]); - show_times(sched_ft, NSCHEDS, "Alarm latency [many threads]"); - for (i = 0; i < NTEST_THREADS; i++) { + show_times(sched_ft, nscheds, "Alarm latency [many threads]"); + for (i = 0; i < ntest_threads; i++) { cyg_thread_suspend(threads[i]); - cyg_thread_kill(threads[i]); + cyg_thread_delete(threads[i]); } + end_of_test_group(); } void @@ -1120,22 +1326,22 @@ run_sched_tests(void) int i; wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSCHEDS; i++) { + for (i = 0; i < nscheds; i++) { HAL_CLOCK_READ(&sched_ft[i].start); cyg_scheduler_lock(); HAL_CLOCK_READ(&sched_ft[i].end); cyg_scheduler_unlock(); } - show_times(sched_ft, NSCHEDS, "Scheduler lock"); + show_times(sched_ft, nscheds, "Scheduler lock"); wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSCHEDS; i++) { + for (i = 0; i < nscheds; i++) { cyg_scheduler_lock(); HAL_CLOCK_READ(&sched_ft[i].start); cyg_scheduler_unlock(); HAL_CLOCK_READ(&sched_ft[i].end); } - show_times(sched_ft, NSCHEDS, "Scheduler unlock [0 threads]"); + show_times(sched_ft, nscheds, "Scheduler unlock [0 threads]"); // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); @@ -1151,20 +1357,20 @@ run_sched_tests(void) ); } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSCHEDS; i++) { + for (i = 0; i < nscheds; i++) { cyg_scheduler_lock(); HAL_CLOCK_READ(&sched_ft[i].start); cyg_scheduler_unlock(); HAL_CLOCK_READ(&sched_ft[i].end); } - show_times(sched_ft, NSCHEDS, "Scheduler unlock [1 suspended thread]"); + show_times(sched_ft, nscheds, "Scheduler unlock [1 suspended]"); for (i = 0; i < 1; i++) { - cyg_thread_kill(threads[i]); + cyg_thread_delete(threads[i]); } // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { cyg_thread_create(10, // Priority - just a number test0, // entry i, // index @@ -1176,20 +1382,20 @@ run_sched_tests(void) ); } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSCHEDS; i++) { + for (i = 0; i < nscheds; i++) { cyg_scheduler_lock(); HAL_CLOCK_READ(&sched_ft[i].start); cyg_scheduler_unlock(); HAL_CLOCK_READ(&sched_ft[i].end); } - show_times(sched_ft, NSCHEDS, "Scheduler unlock [many suspended threads]"); - for (i = 0; i < NTEST_THREADS; i++) { - cyg_thread_kill(threads[i]); + show_times(sched_ft, nscheds, "Scheduler unlock [many suspended]"); + for (i = 0; i < ntest_threads; i++) { + cyg_thread_delete(threads[i]); } // Set my priority higher than any I plan to create cyg_thread_set_priority(cyg_thread_self(), 2); - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < ntest_threads; i++) { cyg_thread_create(10, // Priority - just a number test0, // entry i, // index @@ -1202,24 +1408,26 @@ run_sched_tests(void) cyg_thread_resume(threads[i]); } wait_for_tick(); // Wait until the next clock tick to minimize aberations - for (i = 0; i < NSCHEDS; i++) { + for (i = 0; i < nscheds; i++) { cyg_scheduler_lock(); HAL_CLOCK_READ(&sched_ft[i].start); cyg_scheduler_unlock(); HAL_CLOCK_READ(&sched_ft[i].end); } - show_times(sched_ft, NSCHEDS, "Scheduler unlock [many low prio threads]"); - for (i = 0; i < NTEST_THREADS; i++) { - cyg_thread_kill(threads[i]); + show_times(sched_ft, nscheds, "Scheduler unlock [many low prio]"); + for (i = 0; i < ntest_threads; i++) { + cyg_thread_delete(threads[i]); } + end_of_test_group(); } void run_all_tests(CYG_ADDRESS id) { - int i; - cyg_uint32 tv[NSAMPLES], tv0, tv1, us; - cyg_tick_count_t ticks; + int i, j; + cyg_uint32 tv[nsamples], tv0, tv1; + cyg_uint32 min_stack, max_stack, total_stack, actual_stack; + cyg_tick_count_t ticks, tick0, tick1; #ifdef CYG_SCHEDULER_LOCK_TIMINGS cyg_uint32 lock_ave, lock_max; #endif @@ -1227,39 +1435,57 @@ run_all_tests(CYG_ADDRESS id) cyg_int32 clock_ave; #endif - for (i = 0; i < NSAMPLES; i++) { + disable_clock_latency_measurement(); + diag_printf("\neCos Kernel Timings\n"); + diag_printf("Notes: all times are in microseconds (.000001) unless otherwise stated\n"); +#ifdef STATS_WITHOUT_FIRST_SAMPLE + diag_printf(" second line of results have first sample removed\n"); +#endif + + cyg_thread_delay(2); // Make sure the clock is actually running + + ns_per_system_clock = 1000000/rtc_resolution[1]; + + for (i = 0; i < nsamples; i++) { HAL_CLOCK_READ(&tv[i]); } - diag_printf("Clock: "); tv0 = 0; - for (i = 0; i < NSAMPLES; i++) { - diag_printf("%x ", tv[i]); - if (i > 0) { - tv0 += tv[i] - tv[i-1]; - } + for (i = 1; i < nsamples; i++) { + tv0 += tv[i] - tv[i-1]; } - diag_printf("\n"); + end_of_test_group(); - overhead = tv0 / (NSAMPLES-1); - diag_printf("Average %d clock ticks overhead\n", overhead); + overhead = tv0 / (nsamples-1); + diag_printf("Reading the hardware clock takes %d 'ticks' overhead\n", overhead); + diag_printf("... this value will be factored out of all other measurements\n"); // Try and measure how long the clock interrupt handling takes - HAL_CLOCK_READ(&tv0); - while (true) { - HAL_CLOCK_READ(&tv1); - if (tv1 < tv0) break; - tv0 = tv1; + for (i = 0; i < nsamples; i++) { + tick0 = cyg_current_time(); + while (true) { + tick1 = cyg_current_time(); + if (tick0 != tick1) break; + } + HAL_CLOCK_READ(&tv[i]); } + tv1 = 0; + for (i = 0; i < nsamples; i++) { + tv1 += tv[i] * 1000; + } + tv1 = tv1 / nsamples; tv1 -= overhead; // Adjust out the cost of getting the timer value - us = ticks_to_us(tv1); - diag_printf("Clock interrupt took %d microseconds (%d clock ticks)\n", us, tv1); + diag_printf("Clock interrupt took"); + show_ticks_in_us(tv1); + diag_printf(" microseconds (%d raw clock ticks)\n", tv1/1000); + enable_clock_latency_measurement(); ticks = cyg_current_time(); - diag_printf("Ticks: %x\n", (int)ticks); show_test_parameters(); show_times_hdr(); + reset_clock_latency_measurement(); + run_thread_tests(); run_sched_tests(); run_mutex_tests(); @@ -1270,17 +1496,48 @@ run_all_tests(CYG_ADDRESS id) #ifdef CYG_SCHEDULER_LOCK_TIMINGS Cyg_Scheduler::get_lock_times(&lock_ave, &lock_max); - diag_printf("\nMax lock: %d, Ave lock: %d\n", ticks_to_us(lock_max), ticks_to_us(lock_ave)); + diag_printf("\nMax lock:"); + show_ticks_in_us(lock_max); + diag_printf(", Ave lock:"); + show_ticks_in_us(lock_ave); + diag_printf("\n"); #endif #ifdef HAL_CLOCK_LATENCY - clock_ave = total_clock_latency / total_clock_interrupts; - diag_printf("\nClock/interrupt latency - ave: %d, min: %d, max: %d\n", - ticks_to_us(clock_ave), ticks_to_us(min_clock_latency), ticks_to_us(max_clock_latency)); + // Display latency figures in same format as all other numbers + disable_clock_latency_measurement(); + clock_ave = (total_clock_latency*1000) / total_clock_interrupts; + show_ticks_in_us(clock_ave); + show_ticks_in_us(min_clock_latency*1000); + show_ticks_in_us(max_clock_latency*1000); + show_ticks_in_us(0); + diag_printf(" Clock/interrupt latency\n\n"); + enable_clock_latency_measurement(); #endif + disable_clock_latency_measurement(); + min_stack = STACK_SIZE; + max_stack = 0; + total_stack = 0; + for (i = 0; i < NTEST_THREADS; i++) { + for (j = 0; j < STACK_SIZE; j++) { + if (stacks[i][j]) break; + } + actual_stack = STACK_SIZE-j; + if (actual_stack < min_stack) min_stack = actual_stack; + if (actual_stack > max_stack) max_stack = actual_stack; + total_stack += actual_stack; + } + for (j = 0; j < STACKSIZE; j++) { + if (stack[j]) break; + } + diag_printf("%5d %5d %5d (main stack: %5d) Thread stack used (%d total)\n", + total_stack/NTEST_THREADS, min_stack, max_stack, + STACKSIZE - j, STACK_SIZE); + enable_clock_latency_measurement(); + ticks = cyg_current_time(); - diag_printf("\nTiming complete - %d ms total\n", (int)ticks*10); + diag_printf("\nTiming complete - %d ms total\n\n", (int)((ticks*ns_per_system_clock)/1000)); CYG_TEST_PASS_FINISH("Basic timing OK"); } @@ -1289,6 +1546,28 @@ void tm_basic_main( void ) { CYG_TEST_INIT(); + if (cyg_test_is_simulator) { + nsamples = NSAMPLES_SIM; + ntest_threads = NTEST_THREADS_SIM; + nthread_switches = NTHREAD_SWITCHES_SIM; + nmutexes = NMUTEXES_SIM; + nmboxes = NMBOXES_SIM; + nsemaphores = NSEMAPHORES_SIM; + nscheds = NSCHEDS_SIM; + ncounters = NCOUNTERS_SIM; + nalarms = NALARMS_SIM; + } else { + nsamples = NSAMPLES; + ntest_threads = NTEST_THREADS; + nthread_switches = NTHREAD_SWITCHES; + nmutexes = NMUTEXES; + nmboxes = NMBOXES; + nsemaphores = NSEMAPHORES; + nscheds = NSCHEDS; + ncounters = NCOUNTERS; + nalarms = NALARMS; + } + new_thread(run_all_tests, 0); Cyg_Scheduler::scheduler.start(); @@ -1299,4 +1578,20 @@ cyg_start( void ) { tm_basic_main(); } + +#else // CYGFUN_KERNEL_API_C + +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("Timing tests require:\n" + "CYGFUN_KERNEL_API_C && \n" + "CYGSEM_KERNEL_SCHED_MLQUEUE &&\n" + "CYGVAR_KERNEL_COUNTERS_CLOCK &&\n" + "!CYGPKG_HAL_I386_LINUX &&\n" + "(CYGNUM_KERNEL_SCHED_PRIORITIES > 12)\n"); +} +#endif // CYGFUN_KERNEL_API_C, etc. + // EOF tm_basic.cxx diff --git a/packages/language/c/libc/current/ChangeLog b/packages/language/c/libc/current/ChangeLog --- a/packages/language/c/libc/current/ChangeLog +++ b/packages/language/c/libc/current/ChangeLog @@ -1,3 +1,861 @@ +1999-04-19 Jonathan Larmour + + * include/time.inl: + Ensure all calls to cyg_libc_time_year_is_leap() are with the full + year, and not the direct contents of a struct tm, which are (year-1900) + +1999-04-15 Jonathan Larmour + + * src/clibincl/stdiosupp.hxx: + Add prototype for new cyg_libc_stdio_flush_all_but() function + + * src/clibincl/stream.hxx: + Don't include stdiosupp.hxx any more to prevent circular dependency, + therefore manually provide _setvbuf prototype + Make sure pkgconf/kernel.h is included before mutex.hxx + + * src/clibincl/stream.inl (Cyg_StdioStream::set_error()): + Add missing unlock_me() + + * src/stdio/common/fflush.cxx: + Separate most of code for fflush(NULL) into separate + cyg_libc_stdio_flush_all_but() function, which has the extra + capability of omitting one stream + + * src/stdio/common/stderr.cxx: + * src/stdio/common/stdin.cxx: + * src/stdio/common/stdout.cxx: + * src/stdio/common/vsnprintf.cxx: + * src/stdio/common/vsscanf.cxx: + Add missing clibincl/stdiosupp.hxx include + + * src/stdio/common/stream.cxx (Cyg_StdioStream::read()): + When reading, ensure we flush all output streams + + * src/stdio/common/stream.cxx (Cyg_StdioStream::flush_output_unlocked): + Flush the device as well + +1999-04-15 Jonathan Larmour + + * src/stdio/common/streambuf.cxx (set_buffer): + * src/stdio/common/stdioinlines.cxx (_setbuf): + * src/clibincl/streambuf.inl: + * src/clibincl/streambuf.hxx: + * src/clibincl/stream.hxx (class Cyg_StdioStream): + * include/pkgconf/libc.h: + * include/stdio.inl (setbuf): + Fix dumb typo: BUFSIZE -> BUFSIZ + This fixes PR19837 + +1999-04-15 Jonathan Larmour + + * src/stdio/common/stdioinlines.cxx (_setbuf): + * include/stdio.inl (setbuf): + Use _IONBF when buf==NULL, and _IOLBF otherwise. + Fix for PR 19836 + +1999-04-15 John Dallaway + + * include/pkgconf/libc.h: Tidy display string capitalization. + +1999-04-12 Jonathan Larmour + + * include/pkgconf/libc.h: + Clarify CDL description of CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE + + * tests/signal/signal2.c: Try harder to generate an exception by + accessing a misaligned address + Don't handle SIGTRAP any more + Part of fix for PRs 19731/19607 + +1999-04-07 Jesper Skov + PR 19667 + * src/support/mainthread.cxx: + Changed to use the new Cyg_Thread constructor. + +1999-04-07 Hugo Tyson + + * tests/signal/signal2.c (main): Use new macro + HAL_VSR_SET_TO_ECOS_HANDLER if defined, to wrest control from + CygMon, for example, by reinstalling eCos' default VSRs for + exceptions that we are provoking. + +1999-03-29 Jonathan Larmour + + * src/signal/siginit.cxx: Include stdlib.h for exit() + Fix for PR 19720 + +1999-03-29 Jonathan Larmour + + * tests/time/clock.c (test): Disable instruction cache + Hopefully fixes PR 19308 + +1999-03-29 Jesper Skov + + * tests/signal/signal2.c: Disabled test 3 for PPC as it cannot + trap division by zero. + +1999-03-26 Jonathan Larmour + + * src/support/main.cxx (main): Invoke cyg_user_start() if no kernel + Only sensible thing to do in our default main in a non-kernel config + +1999-03-25 Jonathan Larmour + + * tests/time/time.c: + Increase MAX_TIMEOUT since the sparclite gets very close to overrunning + it even when working. + Should return -1 iff CYGSEM_LIBC_TIME_TIME_WORKING isn't defined + Cosmetic changes + +1999-03-25 Hugo Tyson + + * tests/time/time.c (test): Take into account setting of + CYGSEM_LIBC_TIME_SETTIME_WORKING ie. does cyg_libc_time_settime() + work? If not, check that it returns an error. + This was exposed by the random combo in PR#19479. + +1999-03-23 Jonathan Larmour + + * include/pkgconf/libc.h: + Rename CYGSEM_LIBC_RAND_SIMPLEST and CYGSEM_LIBC_RAND_KNUTH1 to + CYGIMP_... + + Add another rand implementation CYGIMP_LIBC_RAND_SIMPLE1 which is + the default + + Part of fix for PR 19562 + + * include/sys/cstartup.h: + Tidy and remove unnecessary dependencies + + * src/stdlib/rand.cxx: + Rename algorithms from CYGSEM_... to CYGIMP_... + Add new "simple1" algorithm + + * tests/ctype/ctype.c: + Tidy + + * tests/stdlib/rand3.c: + Fix so that 0..RAND_MAX is split evenly over buckets, which it wasn't + before + Deal with case of RAND_MAX not being divisible by NUM_BUCKETS + exactly + Increase TEST_LENGTH to 200000 to provide more representative sample + Add CYG_TEST_INFO output to help ensure it doesn't time out + Tidy + + * tests/stdlib/rand4.c: + Only fail if more than _two_ thirds (rather than one third) match. + This is because half would match for a perfectly random distribution + This is the rest of the fix for PR 19562 + Cosmetic changes + +1999-03-22 Hugo Tyson + + * src/support/mainthread.cxx (CYGNUM_LIBC_MAIN_STACK_SIZE): + Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of + CYGNUM_HAL_MINIMUM_STACK_SIZE. + +1999-03-22 Jonathan Larmour + + * tests/PKGconf.mak: Add -Wno-format when building strftime otherwise + it generates warnings for things that we do want to test (null + string, and %y format) + +1999-03-19 Jonathan Larmour + + * include/pkgconf/libc.h (CYGNUM_LIBC_TIME_DST_DEFAULT_STATE): + Put brackets back round negative number since sdf says the config + tool is fixed now (PR 19537) + + Add new CYGSEM_LIBC_RAND_SIMPLEST and CYGSEM_LIBC_RAND_KNUTH1 + options for different rand() algorithms in a so far failed attempt + to fix PR 19562 + + * src/stdlib/rand.cxx: + Add new optional algorithm from Knuth vol.2 + + * tests/stdlib/rand4.c: + Some tidies + Don't run test when using simplest algorithm + + * tests/signal/signal2.c (main): + Don't try to make an FPE on tx39 - its possible to detect but requires + too much HAL work to be sensible + +1999-03-18 Jonathan Larmour + + * src/signal/siginit.cxx (cyg_libc_signals_hwexcept_handler): + Use HAL_ENABLE_INTERRUPTS() rather than kernel to enable interrupts + +1999-03-18 Mark Galassi + + * tests/PKGconf.mak (TESTS): added rand4 compilation. + + * tests/stdlib/rand4.c: added this test for periodicity in the + least significant bit of rand(). + +1999-03-18 Jonathan Larmour + + * include/pkgconf/libc.h: Remove CYGFUN_LIBC_TIME_POSIX dependency + on CYGPKG_LIBC_STDIO + + * src/stdlib/itoa.cxx: + New file to convert integers to ascii + + * include/stdlib.h: + Add proto for new cyg_libc_itoa() function + + * include/time.inl: + Rework __asctime_r() to use memcpy() and cyg_libc_itoa() rather than + sprintf() + + * src/PKGconf.mak: + Build stdlib/itoa.cxx + + The above changes fix PR 19448 + +1999-03-17 Jonathan Larmour + + * include/time.h: Add #define of __time_t_defined to placate newlib + if it is used by accident. This is just a temporary workaround though. + +1999-03-16 Gary Thomas + + * src/PKGconf.mak: Add compile option to step around ARM compiler bug. + +1999-03-16 Jonathan Larmour + + * include/pkgconf/libc.h (CYGNUM_LIBC_TIME_DST_DEFAULT_STATE): + Don't use parentheses for now + + * src/stdio/common/stream.cxx (refill_read_buffer): + Silence bogus compiler warning + +1999-03-16 Jesper Skov + + * tests/signal/signal2.c (main): Enable SIGSEGV test for + i386/Linux. + + +1999-03-15 Jonathan Larmour + + * src/signal/siginit.cxx (cyg_libc_signals_hwexcept_handler): + Only enable interrupts if they were disabled + + * include/sys/timeutil.h: + * src/time/timeutil.cxx: + Add FIX ME line as a reminder that the workaround there can go away + in future + + * include/pkgconf/libc.h: + Add proper define for CYGSEM_LIBC_EXIT_CALLS_FFLUSH + Put brackets round negative CYGNUM_LIBC_TIME_DST_DEFAULT_STATE define + Fix run time typo + + * include/time.inl (__localtime_r): + Include sys/timeutil.h before this to get + cyg_libc_time_normalize_structtm() + +1999-03-12 Gary Thomas + + * include/sys/timeutil.h: + * src/time/timeutil.cxx: Remove 'const' from char arrays since + this fails [silently] on ARM when -fwritable-strings (PR19440) + +1999-03-12 Jesper Skov + + * tests/signal/signal2.c (main): Compiler warnings fix was + slightly broken. + +1999-03-12 Jesper Skov + PR 19473 + * tests/signal/signal2.c (main): + Disabling SIGTRAP handling on i386/Linux is not a good idea. +1999-03-11 Jesper Skov + PR 19473 + * tests/signal/signal2.c: + Added compiler warnings fix. + Added N/A handling for i386/Linux. + +1999-03-10 Gary Thomas + + * include/pkgconf/libc.h: Force "haldiag" device to be present. + 'asctime' and friends need 'stdio' as well. + + * include/time.inl: Fix syntax error on difftime() declaration. + +1999-03-08 Gary Thomas + + * src/clibincl/stream.hxx: needed for this file. + + * src/stdio/common/vsscanf.cxx (str_read): Fix problem with string + pointer [created by merge with new I/O package]. + +1999-03-05 John Dallaway + + * include/pkgconf/libc.h: + Add legal values for CYGNUM_LIBC_TIME_STD_DEFAULT_OFFSET + and CYGNUM_LIBC_TIME_DST_DEFAULT_OFFSET. + +1999-03-05 Jonathan Larmour + + * include/time.inl (cyg_libc_time_year_is_leap): + Fix bug with modulo year 400 + Fix typo in asctime_r macro + Fix gmtime_r, and mktime as a result of testing + + * tests/time/asctime.c, tests/time/ctime.c, tests/time/gmtime.c, + tests/time/gmtime.c, tests/time/localtime.c, tests/time/mktime.c, + tests/time/strftime.c, tests/time/time.c: + New tests + + * tests/PKGconf.mak: + Build above new tests + + * include/pkgconf/libc.h: + Add reminder FIX ME about extra config option + + * src/time/strftime.cxx: + Fix %w and %Y parameters as a result of testing + + * src/time/timeutil.cxx: + Fix cyg_libc_time_normalize_structtm() as a result of testing + of mktime() + + * tests/time/clock.c: + Reformat, remove obsolete bits and tidy + + * include/time.h: + Add Cyg_libc_time_dst type and new functions + cyg_libc_time_setzoneoffsets(), cyg_libc_time_setdst(), + cyg_libc_time_getzoneoffsets(), cyg_libc_time_settime() + + * include/time.inl: + Implement the above functions. This allows us to adjust for timezone + diffences and set the time. + Change localtime() to adjust for STD/DST + Change mktime() to adjust for STD/DST + + * include/libc.h: + Add new config options CYGSEM_LIBC_TIME_SETTIME_WORKING + and component CYGPKG_LIBC_TIME_ZONES containing options + CYGNUM_LIBC_TIME_DST_DEFAULT_STATE, + CYGNUM_LIBC_TIME_STD_DEFAULT_OFFSET, + CYGNUM_LIBC_TIME_DST_DEFAULT_OFFSET + + * src/strftime.cxx: + Adjust handling of %Z to _not_ deal with STD/DST + + * src/time/settime.cxx: + New file to implement cyg_libc_time_settime() + + * src/PKGconf.mak: + Build settime.cxx + + * src/time/timeutil.cxx: + Supply outline versions of cyg_libc_time_setzoneoffsets(), + cyg_libc_time_setdst(), and cyg_libc_time_getzoneoffsets() + Add variables for STD/DST state + Some minor comment changes + + * include/errno.h: + Use CYGBLD_ATTRIB_CONST instead of __attribute__((const)) directly + + * include/signal.h: + Change format of function comment headers + + * include/signal.inl: + Restrict errno.h inclusion to when its actually used + Fix a spelling typo + + * include/stdlib.h: + Add CYGBLD_ATTRIB_CONST to abs, div, labs, ldiv + + * include/stdlib.inl: + Reformat and tidy + Include new versions of div and ldiv which are more portable and + are cleanly rewritten so aren't covered by the BSD licence, which + is now removed + + * src/stdlib/div.cxx, src/stdlib/ldiv.cxx: + Non-inline, non-BSD and portable versions of the new versions of div + and ldiv from stdlib.inl + + * include/time.h: + Much reformatting, tidying and improving comments + Change CLOCKS_PER_SEC from 1000 to 1000000 + Add new functions asctime_r, ctime_r, gmtime_r, localtime_r, clock, + difftime, mktime, time, asctime, ctime, gmtime, localtime, strftime + Include new time.inl file + + * include/pkgconf/libc.h: + Add new options CYGSEM_LIBC_TIME_CLOCK_WORKING, + CYGSEM_LIBC_TIME_TIME_WORKING, CYGFUN_LIBC_TIME_POSIX, + CYGNUM_LIBC_TIME_CLOCK_TRACE_LEVEL, CYGIMP_LIBC_TIME_ASCTIME_INLINE, + CYGIMP_LIBC_TIME_CTIME_INLINE, CYGIMP_LIBC_TIME_DIFFTIME_INLINE, + CYGIMP_LIBC_TIME_GMTIME_INLINE, CYGIMP_LIBC_TIME_LOCALTIME_INLINE, + CYGIMP_LIBC_TIME_MKTIME_INLINE, CYGIMP_LIBC_TIME_ASCTIME_R_INLINE, + CYGIMP_LIBC_TIME_CTIME_R_INLINE, CYGIMP_LIBC_TIME_GMTIME_R_INLINE, + and CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE + + * time/asctime.cxx, time/asctime_r.cxx, time/clock.cxx, time/ctime.cxx, + time/ctime_r.cxx, time/difftime.cxx, time/gmtime.cxx, + time/gmtime_r.cxx, time/localtime.cxx, time/localtime_r.cxx, + time/mktime.cxx, time/strftime.cxx, time/time.cxx, time/timeutil.cxx, + include/time.inl: + New files to implement the new time functions. Many of them simply + provide the outline definitions, but the real body of the function + comes from time.inl + + * src/PKGconf.mak: + Build new .cxx files + + * src/clibincl/stdlibsupp.hxx: + Remove _div and _ldiv prototypes since they're no longer needed + + * src/clibincl/timesupp.hxx: + Delete as its now obsolete + + * src/time/clock.cxx: + Use new CYGSEM_LIBC_TIME_CLOCK_WORKING option to control whether it + just returns (clock_t)-1 or not. + Much reformatting and tidying + Change real imlpementation from _clock to __clock + Use CYGBLD_ATTRIB_WEAK_ALIAS now + + * tests/stdlib/div.c, tests/stdlib/ldiv.c: + Add some extra tests for handling of negative numbers + Reformat and tidy a bit, including removing the test for CYGPKG_LIBC + since its now always defined if the test is to be compiled + + * tests/time/clock.c: + Remove duplication CYG_TEST_INFO line + Check if unimplemented using "(clock_t)-1" and not just "-1" + +1999-03-04 Jonathan Larmour + + * src/stdlib/system.cxx: + Make sure system() is a weak alias for __system() + + * include/pkgconf/libc.h: Rework CDL description for + CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE and change its default to + "/dev/haldiag" + + * src/stdio/common/stream.cxx: + Check that dev is valid when passed to stream constructor + + * src/stdio/common/stdiosupp.cxx: + Tidy + + * src/support/mainthread.cxx: Make this depend on + CYGSEM_LIBC_STARTUP_MAIN_THREAD rather than just CYGPKG_KERNEL + +1999-03-04 Gary Thomas + + Merged in changes from 'ecos-new_devs-19990216-branch' + + (1999-02-24 Jonathan Larmour ) + + * src/stdio/common/stream.cxx: + Add "fix me" comments and remove a couple of commented out lines + + * src/stdio/common/vsnprintf.cxx: + * src/stdio/common/vsscanf.cxx: + Revert to using pointer to string for private data, not just string. + This preserves the state across multiple calls + + (1999-02-24 Gary Thomas ) + + * src/stdio/common/vsscanf.cxx: + * src/stdio/common/vsnprintf.cxx: + * src/stdio/common/stream.cxx: + * src/stdio/common/stdiosupp.cxx: + * src/stdio/common/fopen.cxx: + * src/clibincl/stream.inl: + * src/clibincl/stream.hxx: + * src/clibincl/stdiosupp.hxx: + * include/pkgconf/libc.h: Changes for new I/O system. + +1999-03-03 Jonathan Larmour + + * tests/stdlib/atexit.c: Forgot to config atexit test for + CYGFUN_LIBC_ATEXIT option + + * include/pkgconf/libc.h: + Require CYGVAR_KERNEL_THREADS_DATA for CYGSEM_LIBC_PER_THREAD_STRTOK + This fixes PR 19362 + Require CYGPKG_KERNEL for thread safe streams + Also don't need "requires CYGPKG_KERNEL" for per-thread rand and errno + if we already require a finer granularity kernel option + +1999-02-25 Jonathan Larmour + + * include/pkgconf/libc.h: Fix CYGNUM_LIBC_MAIN_STACK_SIZE by changing + CYGPKG_LIBC_STARTUP_MAIN_THREAD -> CYGSEM_LIBC_STARTUP_MAIN_THREAD + Fix for PR 19304 + +1999-02-23 Jonathan Larmour + + * src/stdlib/system.cxx: Add to implement trivial system() call + * include/stdlib.h: Add system() prototype + * src/PKGconf.mak: Build system.cxx + + * tests/ctype/ctype.c, tests/i18n/setlocale.c, tests/setjmp/setjmp.c, + tests/signal/signal1.c, tests/signal/signal2.c, + tests/stdio/sprintf1.c, tests/stdio/sprintf2.c, tests/stdio/sscanf.c, + tests/stdio/stdiooutput.c, tests/stdlib/atexit.c, + tests/stdlib/atoi.c, tests/stdlib/atol.c, tests/stdlib/bsearch.c, + tests/stdlib/div.c, tests/stdlib/getenv.c, tests/stdlib/labs.c, + tests/stdlib/ldiv.c, tests/stdlib/malloc1.c, tests/stdlib/malloc2.c, + tests/stdlib/malloc3.c, tests/stdlib/qsort.c, tests/stdlib/rand1.c, + tests/stdlib/rand2.c, tests/stdlib/rand3.c, tests/stdlib/realloc.c, + tests/stdlib/srand.c, tests/stdlib/strtol.c, tests/stdlib/strtoul.c, + tests/string/memchr.c, tests/string/memcmp1.c, + tests/string/memcmp2.c, tests/string/memcpy1.c, + tests/string/memcpy2.c, tests/string/memmove1.c, + tests/string/memmove2.c, tests/string/memset.c, + tests/string/strcat1.c, tests/string/strcat2.c, + tests/string/strchr.c, tests/string/strcmp1.c, + tests/string/strcmp2.c, tests/string/strcoll1.c, + tests/string/strcpy1.c, tests/string/strcpy2.c, + tests/string/strcspn.c, tests/string/strlen.c, + tests/string/strncat1.c, tests/string/strncat2.c, + tests/string/strncpy1.c, tests/string/strncpy2.c, + tests/string/strpbrk.c, tests/string/strrchr.c, + tests/string/strspn.c, tests/string/strstr.c, tests/string/strtok.c, + tests/string/strxfrm1.c, tests/string/strxfrm2.c, tests/time/clock.c: + Use CYG_TEST_NA() macro for non-applicable test configurations + +1999-02-20 Jonathan Larmour + + * include/signal.h: + * include/signal.inl: + * src/signal/raise.cxx: + * src/signal/siginit.cxx: + * src/signal/signal.cxx: + * tests/signal/signal1.c + * tests/signal/signal2.c: + New files to implement ISO standard signals + + * src/PKGconf.mak (TESTS): + * tests/PKGconf.mak (TESTS): + Update to build new files above + + * include/stdlib.h: + * src/clibincl/stdlibsupp.hxx: + Comment and QA changes (including giving better names to some types) + + * include/libc.h: + Add new configuration options for signals + Add new CYGSEM_LIBC_STARTUP_MAIN_THREAD option + Add a note to CYGNUM_LIBC_MAIN_STACK_SIZE option that it may be + overriden by HAL + Add new CYGFUN_LIBC_ATEXIT option and move ...ATEXIT_HANDLERS under + it + Add new CYGSEM_LIBC_EXIT_CALLS_FFLUSH option + Require CYGSEM_LIBC_STARTUP_MAIN_THREAD for "Invoke default static + constructors" option + + * src/stdlib/atexit.cxx: + Support above CYGFUN_LIBC_ATEXIT and QA changes + + * src/stdlib/exit.cxx: + Support for above new libc.h options, and some QA changes + + * src/support/cstartup.cxx: + Add support for new CYGSEM_LIBC_STARTUP_MAIN_THREAD option + + * src/support/mainthread.cxx: + Override main stack size if the HAL has a minimum + + * src/string/strncpy.cxx: + Use improved algorithm for aligned copies - imported from newlib + QA changes + + * src/stdlib/abort.cxx: + Support raise(SIGABRT), and some QA + + * include/errno.h: + Add const attribute + + * tests/stdlib/abs.c: + QA improvements + +1999-02-04 Jesper Skov + + * src/support/cstartup.cxx: Only define cyg_libc_main_thread when + the kernel is around. + +1999-02-01 Jesper Skov + + * tests/time/clock.c: Joined the two test/NOP checks into + one. + Increased tolerance in attempt to fix PRs 18737,18787,18846. + Fixed typo. + +1999-01-28 Jonathan Larmour + + * src/string/strtok.cxx: + * src/stdlib/rand.cxx: + Include if we use kernel header files + +1999-01-25 Jonathan Larmour + + * tests/stdio/sscanf.c (test): + CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT should be + CYGSEM_LIBC_STDIO_SCANF_FLOATING_POINT + Fix for PR 18786 + + * src/string/strtok.cxx: + * src/stdio/common/stdiofiles.cxx: + * src/errno/errno.cxx: + * src/stdlib/rand.cxx: + Give mutex protection objects a libc constructor priority + + * src/support/invokemain.cxx: + Add prototype for cyg_hal_invoke_constructors() + + * src/support/mainthread.cxx: + Give cyg_libc_dummy_constructor_obj a libc constructor priority, + and make its class have a public constructor + + * src/stdio/common/stderr.cxx: + * src/stdio/common/stdout.cxx: + * src/stdio/common/stdin.cxx: + Give cyg_libc_stdio_stdin/out/err static objects a libc constructor + priority + + * src/clibincl/streambuf.hxx (class Cyg_StdioStreamBuffer): + * src/clibincl/stream.hxx (class Cyg_StdioStream): + Remove private copy constructor. Needed to make prioritised + static constructors work. Fix for PR 18898 + +1999-01-22 Jonathan Larmour + + * src/errno/errno.cxx: + Include pkgconf/kernel.h otherwise it fails with per-thread errno + enabled + + * include/pkgconf/libc.h: + Enable per-thread errno by default since that is what POSIX would + want + + * tests/time/clock.c (test): + Placate compiler by initializing clock_first/second/third anyway, + even though they won't be in practice. This is only a test program + so adding an extra instruction doesn't matter. + + * src/i18n/locale.cxx (_setlocale): + Placate compiler, since it is dumb, by nesting, not serializing, if's + This is an idempotent change, but screws up the formatting :-(. + + * src/string/strpbrk.cxx (_strpbrk): + Change while loop to do loop to placate compiler. It'll even save an + instruction too (wow!) + +1999-01-22 John Dallaway + + * include/pkgconf/libc.h: + Add closing curly brace to CYGPKG_LIBC_STRING_STRTOK definition + +1999-01-21 Jonathan Larmour + + * include/errno.h: + Tidy up and add to header description + Change cyg_get_errno_p() to cyg_libc_get_errno_p() + Remove ifdef CYGPKG_LIBC + + * include/sys/file_if.h: + Remove - move contents to stdio.h + + * include/stdio.h: + Tidy up header description + Move FILE typedef here from sys/file_if.h + SEEK_SET, SEEK_CUR, SEEK_END defined to 0, 1, 2 respectively + for backwards compatibility with old UNIX + Change definitions of stdin/out/err to be addresses of FILE + globals - even though they're actually Cyg_StdioStream it'll work + + * include/pkgconf/libc.h: + Make CYGPRI_LIBC_WEAK et al macros depend on new ones in infra + Reorganise trace options under the individual components they are + associated with. + Reorganise thread-safety options under the individual components + they are associated with. + Add new CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS option + Misc. reformatting + Remove dependency on pkgconf/kernel.h - Configuration Tool will + generate check macros anyway. + Remove CYGPKG_LIBC_TRACE, CYGFUN_LIBC_strtok, CYGPKG_LIBC_RAND + options + Tidy up description header + + * src/clibincl/clibdata.hxx: + * src/clibincl/clibdata.inl: + * src/support/clibdata.cxx: + Remove and instead rely on each component to initialise its own data + + * src/clibincl/stdiofiles.hxx, src/clibincl/stdiofiles.inl: + New files to contain global file list and lock (if applicable). + Implemented as class with member access functions + + * src/errno/errno.cxx: + Reorganise with self-contained per-thread data, if applicable + Remove ifdef CYGPKG_LIBC + Tidy up description header + Rename cyg_get_errno_p() to cyg_libc_get_errno_p() + + * src/stdio/common/fclose.cxx: + * src/stdio/common/fflush.cxx: + * src/stdio/common/fopen.cxx: + * src/stdio/common/freopen.cxx: + Remove ifdef CYGPKG_LIBC + Use new global file access method from stdiofiles.hxx + Tidy up description header + Use new CYGBLD_ATTRIB_WEAK_ALIAS + Access errno "normally" rather than clibdata way + + * src/stdio/common/stdin.cxx: + * src/stdio/common/stdout.cxx + * src/stdio/common/stderr.cxx: + New files. Implement Cyg_StdioStream objects for each stream. In + separate self-contained files so using one doesn't bring in the + others + + * src/stdio/common/stdiofiles.cxx: + New file. Implements global files array and lock + + * src/stdlib/_exit.cxx: + Tidy up description header + Remove ifdef CYGPKG_LIBC + Use infra CYGBLD* macros + + * src/stdlib/malloc.cxx: + Tidy up description header + Remove ifdef CYGPKG_LIBC + Add pkgconf/kernel.h now that pkgconf/libc.h doesn't have it + Use infra CYGBLD* macros + Make pool visible externally with weak attribute and new name + cyg_libc_malloc_memorypool + + * src/stdlib/rand.cxx: + * src/stdlib/strtok.cxx: + Reorganise with self-contained per-thread data, if applicable + Remove ifdef CYGPKG_LIBC + Tidy up description header + Use infra CYGBLD* macros + + * src/support/cstartup.cxx: + Split into smaller files to make selective linking work better, + fix i386 port problem and make GDB happy + + * src/support/environ.cxx: + * src/support/invokemain.cxx: + * src/support/main.cxx: + * src/support/mainthread.cxx: + New files from bits of the old cstartup.cxx + Add support for CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + + * src/PKGconf.mak: + Update to reflect file additions/deletion + + * tests/stdlib/rand1.c: + * tests/stdlib/rand2.c: + * tests/stdlib/rand3.c: + * tests/stdlib/srand.c: + Make conform to coding standards + Remove ifdef CYGPKG_LIBC_RAND + Tidy up description header + + * tests/string/strtok.c: + Make conform to coding standards + Remove ifdef CYGFUN_LIBC_strtok + Tidy up description header + +1999-01-15 Mark Galassi + + * tests/stdlib/getenv.c (main): added tests for the case in which + the user does not supply environ and in which the user supplies a + NULL environ. + +1999-01-15 Jesper Skov + + * src/support/cstartup.cxx: Added workaround for weak aliasing + problem in i386 gcc. + + +1999-01-15 Gary Thomas + + * include/pkgconf/libc.h (CYGNUM_LIBC_MAIN_STACK_SIZE): + (CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE): Change defaults to be + more reasonable on small systems. + +1999-01-04 Jonathan Larmour + + * src/support/clibdata.cxx: + Minor bug with environ not being initialised correctly by + default + +1998-12-24 Bart Veer + + * src/clibincl/stream.inl (Cyg_StdioStream): + check_this() member functions should now be const + +1998-12-22 Jonathan Larmour + + * src/string/memchr.cxx (_memchr): + treat search value parameter to memchr as an unsigned byte, + not a signed int - copied fix from newlib PR 18471 + +1998-12-21 Jonathan Larmour + + * tests/stdlib/realloc.c: + * tests/stdlib/malloc3.c: + * tests/stdlib/malloc2.c: + Warning cleanup + +1998-12-14 Jonathan Larmour + + * tests/stdlib/malloc2.c, tests/stdlib/malloc3.c, + tests/stdlib/realloc.c: + Only run these tests when we have a coalescing memory allocator + +1998-12-14 Jonathan Larmour + + * src/stdio/common/stream.cxx: + Only check buffer init success if buffering + + * src/stdio/common/streambuf.cxx (set_buffer): + Check for diff of requested size against buffer_size, not + get_buffer_size(), since this may return -1, which won't be + equal to size, and will cause malloc to be called + +1998-12-01 Jesper Skov + + * tests/stdlib/getenv.c (main): Don't declare variables when they + are not used. + +Thu Nov 26 17:59:12 1998 Jonathan Larmour + + * tests/string/strncpy1.c: + Fix off-by-one error since it called my_strcmp() and not + my_strncmp(), which meant in included the trailing NULL when it + shouldn't have. + +1998-11-26 Jesper Skov + + * src/stdlib/qsort.cxx (_qsort): + * src/stdlib/rand.cxx (_srand): + Changed CYG_REPORT_FUNCNAMETYPE to CYG_REPORT_FUNCNAME in void + functions. + +Mon Oct 26 18:49:00 1998 Jonathan Larmour + + * src/support/cstartup.cxx (cyg_libc_dummy_main): + Silence compiler warning with cast of char * to CYG_ADDRWORD + Wed Oct 28 17:31:21 1998 Jonathan Larmour * src/time/clock.cxx (_clock): @@ -1636,7 +2494,7 @@ Thu Mar 19 11:41:56 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/language/c/libc/current/include/assert.h b/packages/language/c/libc/current/include/assert.h --- a/packages/language/c/libc/current/include/assert.h +++ b/packages/language/c/libc/current/include/assert.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: ANSI standard assertion support as per ANSI chapter 7.2 diff --git a/packages/language/c/libc/current/include/ctype.h b/packages/language/c/libc/current/include/ctype.h --- a/packages/language/c/libc/current/include/ctype.h +++ b/packages/language/c/libc/current/include/ctype.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/include/ctype.inl b/packages/language/c/libc/current/include/ctype.inl --- a/packages/language/c/libc/current/include/ctype.inl +++ b/packages/language/c/libc/current/include/ctype.inl @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -33,7 +33,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/include/errno.h b/packages/language/c/libc/current/include/errno.h --- a/packages/language/c/libc/current/include/errno.h +++ b/packages/language/c/libc/current/include/errno.h @@ -4,7 +4,7 @@ // // errno.h // -// ANSI error code routines +// ISO C errno variable and constants // //======================================================================== //####COPYRIGHTBEGIN#### @@ -24,19 +24,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: This file provides the errno variable (or more strictly +// expression) and the E* error codes required by ISO C +// and POSIX 1003.1 // Description: -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -46,9 +48,6 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions etc. @@ -58,8 +57,8 @@ #ifdef CYGSEM_LIBC_PER_THREAD_ERRNO -externC Cyg_ErrNo * -cyg_get_errno_p( void ); +externC Cyg_ErrNo * const +cyg_libc_get_errno_p( void ) CYGBLD_ATTRIB_CONST; #endif // ifdef CYGSEM_LIBC_PER_THREAD_ERRNO @@ -67,7 +66,7 @@ cyg_get_errno_p( void ); #ifdef CYGSEM_LIBC_PER_THREAD_ERRNO -# define errno (*cyg_get_errno_p()) // Global error status +# define errno (*cyg_libc_get_errno_p()) // Global error status #else @@ -76,8 +75,6 @@ externC Cyg_ErrNo errno; // G #endif // ifdef CYGSEM_LIBC_PER_THREAD_ERRNO -#endif // ifdef CYGPKG_LIBC - #endif // CYGONCE_LIBC_ERRNO_H multiple inclusion protection // EOF errno.h diff --git a/packages/language/c/libc/current/include/locale.h b/packages/language/c/libc/current/include/locale.h --- a/packages/language/c/libc/current/include/locale.h +++ b/packages/language/c/libc/current/include/locale.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: This implementation is designed to implement the contents diff --git a/packages/language/c/libc/current/include/pkgconf/libc.h b/packages/language/c/libc/current/include/pkgconf/libc.h --- a/packages/language/c/libc/current/include/pkgconf/libc.h +++ b/packages/language/c/libc/current/include/pkgconf/libc.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,8 +32,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Contributors: jlarmour +// Date: 1999-01-20 // Purpose: Configuration of the ISO C library // Description: The preprocessor defines here can be used to configure // the ISO C library, preferably with a graphical tool, @@ -51,25 +51,19 @@ // to be included at all #include -// Make sure kernel config is already there for -// CYGNUM_KERNEL_THREADS_DATA_LIBC and CYGVAR_KERNEL_THREADS_DATA -#ifdef CYGPKG_KERNEL -# include -#endif - /* {{CFG_DATA cdl_package CYGPKG_LIBC { - display "C Library" + display "C library" description "This package enables compatibility with the ISO C standard - ISO/IEC 9899:1990. This allows the user application to use well known standard C library functions, and in eCos starts a thread to invoke the user function main()" type boolean - requires CYGPKG_ERROR - doc ref/ecos-ref/the-iso-standard-c-and-math-libraries.html + requires CYGPKG_ERROR + doc ref/ecos-ref/the-iso-standard-c-and-math-libraries.html } }}CFG_DATA @@ -90,7 +84,6 @@ functions. This may improve performance and as the functions are small, may even improve code size." - type boolean parent CYGPKG_LIBC } @@ -109,7 +102,6 @@ display "String functions" description "Options associated with the standard string functions" - type dummy parent CYGPKG_LIBC } @@ -122,17 +114,6 @@ functions. This may improve performance, and as the functions are small, may even improve code size." - - type boolean - parent CYGPKG_LIBC_STRING - } - - cdl_option CYGFUN_LIBC_strtok { - display "Provides strtok()" - description "This option chooses whether the strtok() function - is to be available. Some space may be saved if - not." - type boolean parent CYGPKG_LIBC_STRING } @@ -146,9 +127,8 @@ approach is geared towards smaller code size, while the other tries to improve execution speed at the expense of code size. " - type dummy - parent CYGPKG_LIBC_STRING + parent CYGPKG_LIBC_STRING } cdl_option CYGIMP_LIBC_STRING_PREFER_FAST { @@ -157,7 +137,6 @@ speed at the expense of code size. This option is overriden if the code is compiled with the -Os option to the compiler." - type radio parent CYGPKG_LIBC_STRING_OPTIMIZATIONS } @@ -168,18 +147,52 @@ code size at the expense of execution speed. The same effect can be produced if the code is compiled with the -Os option to the compiler." - type radio parent CYGPKG_LIBC_STRING_OPTIMIZATIONS } + cdl_component CYGPKG_LIBC_STRING_STRTOK { + display "strtok" + description "These options control the behaviour of the + strtok() and strtok_r() string tokenization + functions." + type dummy + parent CYGPKG_LIBC_STRING + } + + cdl_option CYGSEM_LIBC_PER_THREAD_STRTOK { + display "Per-thread strtok()" + description "This option controls whether the string function + strtok() has its state recorded on a per-thread + basis rather than global. If this option is + disabled, some per-thread space can be saved. + Note there is also a POSIX-standard strtok_r() + function to achieve a similar effect with user + support. Enabling this option will use one slot + of kernel per-thread data. You should ensure you + have enough slots configured for all your + per-thread data." + doc ref/ecos-ref/c-and-math-library-overview-thread-safety.html + type boolean + parent CYGPKG_LIBC_STRING_STRTOK + requires CYGVAR_KERNEL_THREADS_DATA + } + + cdl_option CYGNUM_LIBC_STRTOK_TRACE_LEVEL { + display "Tracing level" + description "Trace verbosity level for debugging the + functions strtok() and strtok_r(). Increase this + value to get additional trace output." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_STRING_STRTOK + } + }}CFG_DATA */ #define CYGIMP_LIBC_STRING_INLINES -#define CYGFUN_LIBC_strtok - #undef CYGIMP_LIBC_STRING_PREFER_SMALL #define CYGIMP_LIBC_STRING_PREFER_FAST @@ -188,6 +201,10 @@ # define CYGIMP_LIBC_STRING_PREFER_SMALL_TO_FAST #endif +#undef CYGSEM_LIBC_PER_THREAD_STRTOK + +#define CYGNUM_LIBC_STRTOK_TRACE_LEVEL 0 + //======================================================================== // SETJMP CONFIGURATION OPTIONS @@ -200,7 +217,6 @@ is available as an inline function. This may improve performance, and as the function is small may even improve code size. " - type boolean parent CYGPKG_LIBC } @@ -220,7 +236,6 @@ display "Standard utility functions" description "Options associated with the standard utility functions in " - type dummy parent CYGPKG_LIBC } @@ -233,20 +248,35 @@ functions. This may improve performance, and as the functions are small, may even improve code size." - type boolean parent CYGPKG_LIBC_STDLIB } cdl_component CYGPKG_LIBC_RAND { - display "Provide rand() and srand()" - description "This option chooses whether the pseudo-random - number generator functions rand() and - srand() are available. Some space may - saved if not." - - type boolean - parent CYGPKG_LIBC_STDLIB + display "Random number generation" + description "These options control the behaviour of the + functions rand(), srand() and rand_r()" + type dummy + parent CYGPKG_LIBC_STDLIB + } + + cdl_option CYGSEM_LIBC_PER_THREAD_RAND { + display "Per-thread random seed" + description "This option controls whether the pseudo-random + number generation functions rand() and srand() + have their state recorded on a per-thread + basis rather than global. If this option is + disabled, some per-thread space can be saved. + Note there is also a POSIX-standard rand_r() + function to achieve a similar effect with user + support. Enabling this option will use one slot + of kernel per-thread data. You should ensure you + have enough slots configured for all your + per-thread data." + doc ref/ecos-ref/c-and-math-library-overview-thread-safety.html + type boolean + requires CYGVAR_KERNEL_THREADS_DATA + parent CYGPKG_LIBC_RAND } cdl_option CYGNUM_LIBC_RAND_SEED { @@ -255,12 +285,54 @@ rand()'s pseudo-random number generator. For strict ISO standard compliance, this should be 1, as per section 7.10.2.2 of the standard." - type count legal_values 0 to 0x7fffffff parent CYGPKG_LIBC_RAND } + cdl_option CYGNUM_LIBC_RAND_TRACE_LEVEL { + display "Tracing level" + description "Trace verbosity level for debugging the rand(), + srand() and rand_r() functions. Increase this + value to get additional trace output." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_RAND + } + + cdl_option CYGIMP_LIBC_RAND_SIMPLEST { + display "Simplest implementation" + description "This provides a very simple implementation of rand() + that does not perform well with randomness in the + lower significant bits. However it is exceptionally + fast. It uses the sample algorithm from the ISO C + standard itself." + type radio + parent CYGPKG_LIBC_RAND + } + + cdl_option CYGIMP_LIBC_RAND_SIMPLE1 { + display "Simple implementation #1" + description "This provides a very simple implementation of rand() + based on the simplest implementation above. However + it does try to work around the lack of randomness + in the lower significant bits, at the expense of a + little speed." + type radio + parent CYGPKG_LIBC_RAND + } + + cdl_option CYGIMP_LIBC_RAND_KNUTH1 { + display "Knuth implementation #1" + description "This implements a slightly more complex algorithm + published in Donald E. Knuth's Art of Computer + Programming Vol.2 section 3.6 (p.185 in the 3rd ed.). + This produces better random numbers than the + simplest approach but is slower." + type radio + parent CYGPKG_LIBC_RAND + } + cdl_component CYGPKG_LIBC_MALLOC { display "Support for dynamic memory allocation" description "This enables support for dynamic memory @@ -270,7 +342,6 @@ overhead, disabling them here can ensure they cannot even be used accidentally when static allocation is preferred." - type boolean parent CYGPKG_LIBC_STDLIB requires CYGPKG_KERNEL @@ -280,7 +351,10 @@ display "Size of the dynamic memory pool in bytes" description "At this stage, dynamic memory allocation by malloc() and calloc() must be from a fixed-size, - contiguous memory pool. This option is the size + contiguous memory pool (note here that it is the + pool that is of a fixed size, but malloc() is still + able to allocate variable sized chunks of memory + from it). This option is the size of that pool, in bytes. Note that not all of this is available for programs to use - some is needed for internal information @@ -289,7 +363,6 @@ memory aligned on word (or double word) boundaries - a very common architecture constraint." - type count legal_values 32 to 0x7fffffff parent CYGPKG_LIBC_MALLOC @@ -305,7 +378,6 @@ even if it is not explicitly called and new/delete are not used. This increases code and data size needlessly." - type bool parent CYGPKG_LIBC_MALLOC } @@ -317,22 +389,47 @@ from string to double precision floating point numbers. Disabling this option removes the dependency on the math library package." - type boolean parent CYGPKG_LIBC_STDLIB requires CYGPKG_LIBM } + cdl_option CYGNUM_LIBC_BSEARCH_TRACE_LEVEL { + display "bsearch() tracing level" + description "Trace verbosity level for debugging the + binary search function bsearch(). Increase this + value to get additional trace output." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_STDLIB + } + + cdl_option CYGNUM_LIBC_QSORT_TRACE_LEVEL { + display "qsort() tracing level" + description "Trace verbosity level for debugging the + quicksort function qsort(). Increase this value + to get additional trace output." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_STDLIB + } + }}CFG_DATA */ #define CYGIMP_LIBC_STDLIB_INLINES -#define CYGPKG_LIBC_RAND +#undef CYGSEM_LIBC_PER_THREAD_RAND + +#define CYGNUM_LIBC_RAND_SEED 1 + +#define CYGNUM_LIBC_RAND_TRACE_LEVEL 0 -#ifdef CYGPKG_LIBC_RAND -#define CYGNUM_LIBC_RAND_SEED 1 -#endif +#undef CYGIMP_LIBC_RAND_SIMPLEST + +#define CYGIMP_LIBC_RAND_SIMPLE1 + +#undef CYGIMP_LIBC_RAND_KNUTH1 #define CYGPKG_LIBC_MALLOC @@ -340,17 +437,16 @@ #undef CYGIMP_LIBC_MALLOC_CXX_DELETE_CALLS_FREE -#ifndef CYGPKG_KERNEL -# error You must have the Kernel enabled to use the C library dynamic \ - memory allocation functions -#endif - -#define CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE 32768 +#define CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE 16384 #endif // ifdef CYGPKG_LIBC_MALLOC #define CYGFUN_LIBC_strtod +#define CYGNUM_LIBC_BSEARCH_TRACE_LEVEL 0 + +#define CYGNUM_LIBC_QSORT_TRACE_LEVEL 0 + #ifdef CYGFUN_LIBC_strtod # ifndef CYGPKG_LIBM # error You must enable the Math library package to use strtod() or atof() @@ -367,10 +463,10 @@ display "Standard Input/Output functions" description "This enables support for standard I/O functions from ." - type boolean parent CYGPKG_LIBC - requires CYGPKG_DEVICES + requires CYGPKG_IO + requires CYGPKG_IO_SERIAL_HALDIAG } cdl_option CYGIMP_LIBC_STDIO_INLINES { @@ -381,7 +477,6 @@ functions. This may improve performance, and as the functions are small, may even improve code size." - type boolean parent CYGPKG_LIBC_STDIO } @@ -394,7 +489,6 @@ 7.9.1), and if strictly compliant, it must be at least 8 (para 7.9.3). In practice it can be as low as 3 - for stdin, stdout and stderr." - type count legal_values 3 to 0x7fffffff parent CYGPKG_LIBC_STDIO @@ -405,7 +499,6 @@ description "This option defines the maximum allowed size of a filename in characters. The ISO C standard requires it to be defined (para 7.9.1)." - type count legal_values 1 to 0x7fffffff parent CYGPKG_LIBC_STDIO @@ -418,10 +511,9 @@ tmpnam(). It is measured in characters, and the ISO C standard requires it to be defined (para 7.9.1)." - - type count - legal_values 1 to 0x7fffffff - parent CYGPKG_LIBC_STDIO + type count + legal_values 1 to 0x7fffffff + parent CYGPKG_LIBC_STDIO } cdl_option TMP_MAX { @@ -430,7 +522,6 @@ unique file names generated by tmpnam(). The ISO C standard requires it to be defined (para 7.9.1)." - type count legal_values 0 to 0x7fffffff parent CYGPKG_LIBC_STDIO @@ -446,7 +537,6 @@ except now it can never be altered back to buffered mode. Disabling buffering is strictly non-compliant with the ISO C standard." - type boolean parent CYGPKG_LIBC_STDIO } @@ -458,12 +548,11 @@ size for buffered streams that have not had either setbuf() or setvbuf() invoked on them. It is exactly equivalent to the standard - constant BUFSIZE, except that it is 0 if + constant BUFSIZ, except that it is 0 if CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO is disabled. The ISO C standard requires this to be defined (para 7.9.1), and says it must be at least 256 (para 7.9.2)." - type count legal_values 1 to 0x7fffffff parent CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO @@ -480,17 +569,16 @@ to pass a user-supplied buffer to setbuf() or setvbuf() will fail - the buffer is implemented internally as a static array of taking the size - of the configuration option BUFSIZE. The only + of the configuration option BUFSIZ. The only exception is if a user buffer is not supplied, and the buffer size requested is less than - BUFSIZE. In this case, the buffer will + BUFSIZ. In this case, the buffer will be configured to only use that amount of buffering. However the unused memory left over will NOT be freed. If this option is enabled, then CYGPKG_LIBC_MALLOC must also be enabled. Either setting can be considered to be compliant with the ISO C standard." - type boolean parent CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO requires CYGPKG_LIBC_MALLOC @@ -503,7 +591,6 @@ saved, and speed is improved. Note that you MUST have this defined if you want to use the scanf() family of functions." - type boolean parent CYGPKG_LIBC_STDIO } @@ -518,7 +605,6 @@ fopen() and fclose(). If disabled, only the default console streams - stdin, stdout and stderr - will be available." - type boolean parent CYGPKG_LIBC_STDIO requires CYGPKG_LIBC_MALLOC @@ -530,11 +616,13 @@ default console device. In the current implementation, all these devices begin with the prefix /dev/ and are followed by - the name of a device as listed in the - devs/common/current/src/table.cxx file in the - source repository. Look at that file to see - list of available devices." - + the name of a device. The name of the device + depends on the device drivers you have + configured in your system. For example, + /dev/haldiag could be the HAL diagnostic output + pseudo-device, or /dev/tty0 could be your + first serial driver, depending on your + configuration." type string parent CYGPKG_LIBC_STDIO } @@ -544,7 +632,6 @@ description "This component allows floating point support to be enabled in certain standard I/O functions." - type dummy parent CYGPKG_LIBC_STDIO } @@ -559,7 +646,6 @@ is disabled then floating point specifiers (%e, %f, %g) are ignored, and nothing is output." - type boolean parent CYGPKG_LIBC_STDIO_FLOATING_POINT requires CYGPKG_LIBM @@ -575,13 +661,24 @@ is disabled then floating point specifiers (%e, %f, %g) are ignored, and nothing is converted." - type boolean parent CYGPKG_LIBC_STDIO_FLOATING_POINT requires CYGPKG_LIBM requires CYGFUN_LIBC_strtod } + cdl_option CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS { + display "Thread safe I/O streams" + description "This option controls whether standard I/O streams + are thread-safe. Having this option set allows + the streams to be locked when accessed by + multiple threads simultaneously." + doc ref/ecos-ref/c-and-math-library-overview-thread-safety.html + type boolean + parent CYGPKG_LIBC_STDIO + requires CYGPKG_KERNEL + } + }}CFG_DATA */ @@ -589,7 +686,7 @@ #ifdef CYGPKG_LIBC_STDIO -#ifndef CYGPKG_DEVICES +#ifndef CYGPKG_IO # error You must have generic device driver support enabled for C library \ standard I/O #endif @@ -609,9 +706,9 @@ #define CYGNUM_LIBC_STDIO_BUFSIZE 256 #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO -# define BUFSIZE CYGNUM_LIBC_STDIO_BUFSIZE +# define BUFSIZ CYGNUM_LIBC_STDIO_BUFSIZE #else -# define BUFSIZE 0 +# define BUFSIZ 0 #endif #undef CYGSEM_LIBC_STDIO_DYNAMIC_SETVBUF @@ -641,6 +738,7 @@ // device names should be prefixed with "/dev/". // // So what is the name of the device that is the default console device + #define CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE "/dev/haldiag" #define CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT @@ -663,103 +761,8 @@ #endif // ifdef CYGPKG_LIBC_STDIO -//======================================================================== - -// THREAD SAFETY CONFIGURATION OPTIONS - -/* - - {{CFG_DATA - - cdl_component CYGSEM_LIBC_THREAD_SAFETY { - display "Thread safety" - description "This option controls whether the C library has - support for thread safe operation in general. - This requires eCos kernel support for per-thread - data, and adjustment of the stack limit." - doc ref/ecos-ref/c-and-math-library-overview-thread-safety.html - type boolean - parent CYGPKG_LIBC - requires CYGPKG_KERNEL - requires CYGVAR_KERNEL_THREADS_DATA - requires CYGFUN_KERNEL_THREADS_STACK_LIMIT - } - - cdl_option CYGSEM_LIBC_PER_THREAD_ERRNO { - display "Per-thread errno" - description "This option controls whether the standard error - code reporting variable errno is a per-thread - variable, rather than global." - type boolean - parent CYGSEM_LIBC_THREAD_SAFETY - } - - cdl_option CYGSEM_LIBC_PER_THREAD_STRTOK { - display "Per-thread strtok()" - description "This option controls whether the string function - strtok() has its state recorded on a per-thread - basis rather than global. If this option is - disabled, some per-thread space can be saved. - Note there is also a POSIX-standard strtok_r() - function to achieve a similar effect with user - support." - type boolean - parent CYGSEM_LIBC_THREAD_SAFETY - } - - cdl_option CYGSEM_LIBC_PER_THREAD_RAND { - display "Per-thread rand()" - description "This option controls whether the pseudo-random - number generation functions rand() and srand() - have their state recorded on a per-thread - basis rather than global. If this option is - disabled, some per-thread space can be saved. - Note there is also a POSIX-standard rand_r() - function to achieve a similar effect with user - support." - type boolean - parent CYGSEM_LIBC_THREAD_SAFETY - } - - cdl_option CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS { - display "Thread safe I/O streams" - description "This option controls whether standard I/O streams - are thread-safe. Having this option set allows - the streams to be locked when accessed by - multiple threads simultaneously." - type boolean - parent CYGSEM_LIBC_THREAD_SAFETY - } - - - - }}CFG_DATA - -*/ - -#undef CYGSEM_LIBC_THREAD_SAFETY - -#ifdef CYGSEM_LIBC_THREAD_SAFETY - -#define CYGSEM_LIBC_PER_THREAD_ERRNO - -#define CYGSEM_LIBC_PER_THREAD_STRTOK - -#define CYGSEM_LIBC_PER_THREAD_RAND - #define CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS -// Consistency check for kernel support -# if !defined(CYGVAR_KERNEL_THREADS_DATA) || !defined(CYGFUN_KERNEL_THREADS_STACK_LIMIT) - -# error Sorry, the kernel must have per-thread data and stack limit \ - support configured to allow a thread-safe C library - -# endif // if !defined(CYGVAR_KERNEL_THREADS_DATA) || - // !defined(CYGFUN_KERNEL_THREADS_STACK_LIMIT) - -#endif // ifdef CYGSEM_LIBC_THREAD_SAFETY - //======================================================================== // INTERNATIONALIZATION AND LOCALIZATION OPTIONS @@ -782,7 +785,6 @@ This depends on the length of locale names, hence this option. If just the C locale is present, this option can be set as low as 2." - type count legal_values 2 to 0x7fffffff parent CYGPKG_LIBC @@ -796,6 +798,193 @@ //======================================================================== +// SIGNAL CONFIGURATION OPTIONS + +/* + {{CFG_DATA + cdl_component CYGPKG_LIBC_SIGNALS { + display "Signals" + description "This component controls signal functionality, + as implemented in ISO C chapter 7.7 with the + signal() and raise() functions. As well as + allowing a program to send itself signals, it is + also possible to cause hardware exceptions to + be signalled to the program in a similar way." + type boolean + parent CYGPKG_LIBC + } + + cdl_option CYGSEM_LIBC_SIGNALS_THREAD_SAFE { + display "Thread safe signals" + description "Because signal handlers are global, and not + thread-specific (as mandated by POSIX 1003.1) + it is possible for multiple threads to clash + and corrupt data if setting the same signal + handler at the same time. With this option + enabled, a kernel mutex will be used to protect + the shared data." + type boolean + requires CYGPKG_KERNEL + parent CYGPKG_LIBC_SIGNALS + } + + cdl_component CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS { + display "Hardware exceptions cause signals" + description "This causes hardware exceptions like + arithmetic exceptions (e.g. divide by zero) + or bad memory accesses to be passed through as + signals. It is thus possible for a program to + handle these exceptions in a generic way using + the appropriate signal handlers. The details of + exactly which exceptions are passed through + under what circumstances depend on the + underlying HAL implementation. Consequently it + must be remembered that signal handlers cannot + be guaranteed to be invoked in the expected + circumstances if you do not know about the + underlying HAL implementation - it is possible + that the architecture is unable to detect that + exception." + type boolean + requires CYGSEM_KERNEL_EXCEPTIONS_GLOBAL + requires CYGSEM_KERNEL_EXCEPTIONS_DECODE + parent CYGPKG_LIBC_SIGNALS + } + + cdl_option CYGSEM_LIBC_SIGNALS_CHAIN_HWEXCEPTIONS { + display "Chain old exception handlers" + description "When hardware exceptions are generated, it + is possible to chain into the old kernel exception + handler before calling any registered signal + handler. If this is not required, disable this + option and only the signal handler will be + called when this exception occurs. Disabling + this option will also save some space and code + usage." + type boolean + requires !CYGPKG_HAL_I386_LINUX + parent CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + } + + cdl_component CYGPKG_LIBC_SIGNALS_INLINE { + display "Inline versions of functions" + description "Some functions can be made inline instead of + being function calls. These can be set here." + type dummy + parent CYGPKG_LIBC_SIGNALS + } + + cdl_option CYGIMP_LIBC_SIGNALS_RAISE_INLINE { + display "raise()" + description "Enabling this option makes raise() an inline + function." + type boolean + parent CYGPKG_LIBC_SIGNALS_INLINE + } + + cdl_option CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE { + display "signal()" + description "Enabling this option makes signal() an inline + function." + type boolean + parent CYGPKG_LIBC_SIGNALS_INLINE + } + + cdl_component CYGPKG_LIBC_SIGNALS_ERROR_HANDLING { + display "Error handling" + description "You may or may not want errno to be set by + certain functions. Not using errno could save + both space, code, and avoid worrying about + interactions between multiple threads when + setting it." + type dummy + parent CYGPKG_LIBC_SIGNALS + } + + cdl_option CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL { + display "Bad signal fatal" + description "Enabling this option will cause an assertion + failure if the signal handling code is + passed a bad signal. Otherwise an error will + be returned, or in the case of a + hardware-generated exception it will be silently + ignored." + type boolean + requires CYGDBG_USE_ASSERTS + parent CYGPKG_LIBC_SIGNALS_ERROR_HANDLING + } + + cdl_option CYGSEM_LIBC_SIGNALS_RAISE_SETS_ERRNO { + display "raise() sets errno" + description "You may or may not want errno to be set by + raise() on error conditions. Not using errno + could save both space, code, and avoid worrying + about interactions between multiple threads when + setting it. Strictly ISO C does not mandate + that errno be set by raise()." + type boolean + parent CYGPKG_LIBC_SIGNALS_ERROR_HANDLING + } + + cdl_option CYGSEM_LIBC_SIGNALS_SIGNAL_SETS_ERRNO { + display "signal() sets errno" + description "You may or may not want errno to be set by + signal() on error conditions. Not using errno + could save both space, code, and avoid worrying + about interactions between multiple threads when + setting it. Strictly ISO C mandates + that errno be set by signal()." + type boolean + parent CYGPKG_LIBC_SIGNALS_ERROR_HANDLING + } + + cdl_component CYGPKG_LIBC_SIGNALS_TRACING { + display "Tracing" + description "These options control the trace output for the C + library internal signal implementation." + type dummy + parent CYGPKG_LIBC_SIGNALS + } + + cdl_option CYGNUM_LIBC_SIGNALS_RAISE_TRACE_LEVEL { + display "Default trace level for raise()" + description "This gives the default tracing level for the + raise() function. Higher numbers are more + verbose." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_SIGNALS_TRACING + } + + cdl_option CYGNUM_LIBC_SIGNALS_HWHANDLER_TRACE_LEVEL { + display "Default hardware exception handler trace level" + description "This gives the default tracing level for the + hardware exception handler function (if enabled). + Higher numbers are more verbose." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_SIGNALS_TRACING + } + + }}CFG_DATA +*/ + +#define CYGPKG_LIBC_SIGNALS +#define CYGSEM_LIBC_SIGNALS_THREAD_SAFE +#undef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS +# define CYGSEM_LIBC_SIGNALS_CHAIN_HWEXCEPTIONS +#endif +#define CYGIMP_LIBC_SIGNALS_RAISE_INLINE +#define CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE +#undef CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL +#define CYGSEM_LIBC_SIGNALS_RAISE_SETS_ERRNO +#define CYGSEM_LIBC_SIGNALS_SIGNAL_SETS_ERRNO +#define CYGNUM_LIBC_SIGNALS_RAISE_TRACE_LEVEL 0 +#define CYGNUM_LIBC_SIGNALS_HWHANDLER_TRACE_LEVEL 0 + +//======================================================================== + // STARTUP OPTIONS /* @@ -812,7 +1001,7 @@ It also includes at the other end of things, what happens when main() returns or exit() is called." - doc ref/ecos-ref/c-library-startup.html.html + doc ref/ecos-ref/c-library-startup.html.html type dummy parent CYGPKG_LIBC } @@ -829,11 +1018,30 @@ entry must be NULL. Conventionally if argv[0] is supplied, it is used to inform the program of its name." - type string parent CYGPKG_LIBC_STARTUP } + cdl_component CYGSEM_LIBC_STARTUP_MAIN_THREAD { + display "main() invoked as thread" + description "It is normally expected (e.g. in a POSIX 1003.1 + environment) that main() is run in the context + of a thread just like any other thread. If this + option is disabled then main() will instead be + called in the context of the initialization + routines, without the scheduler running and + using the interrupt stack. This means that + any functions that may require interactions + with a running kernel will not work (including + libc functions, if configured to be thread safe + for example), so you should restrict yourself + to only calling fully re-entrant functions from + within main() in this case." + type boolean + requires CYGPKG_KERNEL + parent CYGPKG_LIBC_STARTUP + } + cdl_option CYGNUM_LIBC_MAIN_STACK_SIZE { display "main()'s thread stack size" description "With an eCos kernel, when the cyg_iso_c_start() @@ -842,12 +1050,23 @@ a separate thread is created to call main(). This option controls the size of that thread's stack, which is allocated in the BSS. It - must be a multiple of 8." - + must be a multiple of 8. Note, a low number + here may be overriden by the HAL if there is + a minimum requirement to process interrupts + etc." type count legal_values 16 to 0x7fffffff + parent CYGSEM_LIBC_STARTUP_MAIN_THREAD + } + + cdl_component CYGFUN_LIBC_ATEXIT { + display "Include atexit() function" + description "This option enables the use of the atexit() + function, and ensure that the atexit handlers + are invoked from within exit() as defined in + the ISO C standard." + type boolean parent CYGPKG_LIBC_STARTUP - #requires CYGPKG_KERNEL } cdl_option CYGNUM_LIBC_ATEXIT_HANDLERS { @@ -860,10 +1079,19 @@ cyg_iso_c_start() ). For strict compliance with the ISO C standard this should be at least 32." - type count + parent CYGFUN_LIBC_ATEXIT + legal_values 1 to 0x7fffffff + } + + cdl_option CYGSEM_LIBC_EXIT_CALLS_FFLUSH { + display "Make exit() call fflush()" + description "This option will ensure that all output + streams are flushed when exitting using + exit() as prescribed by the ISO C standard." + type boolean parent CYGPKG_LIBC_STARTUP - legal_values 1 to 0x7fffffff + requires CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO } cdl_option CYGSEM_LIBC_EXIT_STOPS_SYSTEM { @@ -878,7 +1106,6 @@ disable this option. If there is no eCos scheduler, then _exit() simply loops irrespective of the setting of this option." - type boolean parent CYGPKG_LIBC_STARTUP requires CYGPKG_KERNEL @@ -890,7 +1117,6 @@ and the global environment pointer char **environ defined by POSIX 1003.1. Disabling this saves a small amount of space." - type boolean parent CYGPKG_LIBC_STARTUP } @@ -903,19 +1129,46 @@ char **environ defined by POSIX 1003.1. Strings must be of the form NAME=VALUE, and the final entry must be NULL." - type string parent CYGPKG_LIBC_ENVIRONMENT } + cdl_option CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS { + display "Invoke default static constructors" + description "This option causes the C library to call + static constructors with default priority + from within the context of the main() thread, + working with the co-operation of the HAL. + This may be needed for environments that + expect static constructors to be run in a + thread context. Note that this uses an object + with priority 65534. Therefore do not use + priority 65534 for any other static objects + with this option enabled." + type boolean + requires CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + requires CYGSEM_LIBC_STARTUP_MAIN_THREAD + parent CYGPKG_LIBC_STARTUP + } + }}CFG_DATA */ #define CYGDAT_LIBC_ARGUMENTS { "", NULL } -#define CYGNUM_LIBC_MAIN_STACK_SIZE 32768 +#define CYGSEM_LIBC_STARTUP_MAIN_THREAD + +#ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD +#define CYGNUM_LIBC_MAIN_STACK_SIZE 8192 +#endif +#define CYGFUN_LIBC_ATEXIT + +#ifdef CYGFUN_LIBC_ATEXIT #define CYGNUM_LIBC_ATEXIT_HANDLERS 32 +#endif + +#define CYGSEM_LIBC_EXIT_CALLS_FFLUSH #undef CYGSEM_LIBC_EXIT_STOPS_SYSTEM @@ -923,110 +1176,292 @@ #define CYGDAT_LIBC_DEFAULT_ENVIRONMENT { NULL } +#undef CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS //======================================================================== -// TRACING OPTIONS +// ERRNO OPTIONS /* {{CFG_DATA - cdl_component CYGPKG_LIBC_TRACE { - display "Tracing output levels in C library" - description "Tracing support is useful for debugging. Some - C library modules can be configured with - different levels of tracing verbosity. These - levels can be configured here." - - type boolean - requires CYGDBG_USE_TRACING + cdl_component CYGPKG_LIBC_ERRNO { + display "errno" + description "This package controls the behaviour of the + errno variable (or more strictly, expression) + from ." + type dummy parent CYGPKG_LIBC } - - cdl_option CYGNUM_LIBC_RAND_TRACE_LEVEL { - display "rand(), srand() and rand_r()" - description "Trace level for debugging the rand(), srand() - and rand_r() functions." - - type count - legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE + + cdl_option CYGSEM_LIBC_PER_THREAD_ERRNO { + display "Per-thread errno" + description "This option controls whether the standard error + code reporting variable errno is a per-thread + variable, rather than global. Enabling this + option will use one slot of kernel per-thread data. + You should ensure you have enough slots configured + for all your per-thread data." + doc ref/ecos-ref/c-and-math-library-overview-thread-safety.html + type boolean + requires CYGVAR_KERNEL_THREADS_DATA + parent CYGPKG_LIBC_ERRNO } cdl_option CYGNUM_LIBC_ERRNO_TRACE_LEVEL { - display "errno" - description "Trace level for debugging the errno retrieval - mechanism in errno.cxx." - - type count - legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE - } - - cdl_option CYGNUM_LIBC_BSEARCH_TRACE_LEVEL { - display "bsearch()" - description "Trace level for debugging the binary - search function bsearch()." - + display "Tracing level" + description "Trace verbosity level for debugging the errno + retrieval mechanism in errno.cxx. Increase this + value to get additional trace output." type count legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE - } - - cdl_option CYGNUM_LIBC_QSORT_TRACE_LEVEL { - display "qsort()" - description "Trace level for debugging the - quicksort function qsort()." - - type count - legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE - } - - cdl_option CYGNUM_LIBC_CLOCK_TRACE_LEVEL { - display "clock()" - description "Trace level for debugging the function - clock()." - - type count - legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE - } - - cdl_option CYGNUM_LIBC_STRTOK_TRACE_LEVEL { - display "strtok() and strtok_r()" - description "Trace level for debugging the - functions strtok() and strtok_r()." - - type count - legal_values 0 to 1 - parent CYGPKG_LIBC_TRACE + parent CYGPKG_LIBC_ERRNO } }}CFG_DATA */ -#undef CYGPKG_LIBC_TRACE - -#ifdef CYGPKG_LIBC_TRACE - -#define CYGNUM_LIBC_RAND_TRACE_LEVEL 0 +#define CYGSEM_LIBC_PER_THREAD_ERRNO #define CYGNUM_LIBC_ERRNO_TRACE_LEVEL 0 -#define CYGNUM_LIBC_BSEARCH_TRACE_LEVEL 0 - -#define CYGNUM_LIBC_QSORT_TRACE_LEVEL 0 - -#define CYGNUM_LIBC_CLOCK_TRACE_LEVEL 0 - -#define CYGNUM_LIBC_STRTOK_TRACE_LEVEL 0 - -#endif // ifdef CYGPKG_LIBC_TRACE //======================================================================== -// MISCELLANEOUS CONFIGURATION OPTIONS +// TIME OPTIONS + +/* + {{CFG_DATA + + cdl_component CYGPKG_LIBC_TIME { + display "Date/Time" + description "Options for date and time related functions + from " + type dummy + parent CYGPKG_LIBC + } + + cdl_option CYGSEM_LIBC_TIME_CLOCK_WORKING { + display "Working clock() function" + description "This option controls whether clock() will + actually try and determine the process time + usage. With this option disabled, clock() does + not disappear, but will permanently return + (clock_t)-1 as mandated by the ISO C standard." + type boolean + requires CYGFUN_KERNEL_THREADS_TIMER + requires CYGVAR_KERNEL_COUNTERS_CLOCK + parent CYGPKG_LIBC_TIME + } + + cdl_option CYGSEM_LIBC_TIME_TIME_WORKING { + display "Working time() function" + description "This option controls whether time() will + actually try and determine the current calendar + time. With this option disabled, time() does + not disappear, but will permanently return + (time_t)-1 as mandated by the ISO C standard." + type boolean + requires CYGPKG_DEVICES_WALLCLOCK + parent CYGPKG_LIBC_TIME + } + + cdl_option CYGSEM_LIBC_TIME_SETTIME_WORKING { + display "Working cyg_libc_time_settime() function" + description "This option controls whether cyg_libc_time_settime() + will actually try and set the current calendar + time. With this option disabled, + cyg_libc_time_settime() does not disappear, but + will permanently return an error." + type boolean + requires CYGPKG_DEVICES_WALLCLOCK + parent CYGPKG_LIBC_TIME + } + + cdl_option CYGFUN_LIBC_TIME_POSIX { + display "POSIX time functions" + description "Enabling this option allows the use of the + following functions defined in POSIX 1003.1: + asctime_r(), ctime_r(), gmtime_r(), and + localtime_r()." + type boolean + parent CYGPKG_LIBC_TIME + } + + cdl_component CYGPKG_LIBC_TIME_ZONES { + display "Time zone offsets" + description "These options control the default STandarD (STD) + and Daylight Savings Time (DST) + time offsets so that dates can be set correctly + for the local environment." + type dummy + parent CYGPKG_LIBC_TIME + } + + cdl_option CYGNUM_LIBC_TIME_DST_DEFAULT_STATE { + display "Default Daylight Savings Time state" + description "This option controls whether the initial + time environment is set up as STD, DST or + unknown. Use the value 1 for DST, 0 for STD, + and (-1) for unknown. This can also be set at + runtime using the cyg_libc_time_setdst() + function." + type count + legal_values -1 to 1 + parent CYGPKG_LIBC_TIME_ZONES + } + + cdl_option CYGNUM_LIBC_TIME_STD_DEFAULT_OFFSET { + display "Default Standard Time offset" + description "This option controls the offset from UTC in + seconds when in local Standard Time. This + value can be positive or negative. It + can also be set at run time using the + cyg_libc_time_setzoneoffsets() function." + type count + legal_values -90000 to 90000 + parent CYGPKG_LIBC_TIME_ZONES + } + + cdl_option CYGNUM_LIBC_TIME_DST_DEFAULT_OFFSET { + display "Default Daylight Savings Time offset" + description "This option controls the offset from UTC in + seconds when in local Daylight Savings Time. This + value can be positive or negative. It + can also be set at run time using the + cyg_libc_time_setzoneoffsets() function." + type count + legal_values -90000 to 90000 + parent CYGPKG_LIBC_TIME_ZONES + } + + + cdl_component CYGPKG_LIBC_TIME_INLINES { + display "Inline functions" + description "These options control whether certain functions + are available in inline form. This may lead to + faster code at the expense of code space. But for + some functions, or some functions with constant + arguments, it may in fact lead to smaller code." + type dummy + parent CYGPKG_LIBC_TIME + } + + cdl_option CYGIMP_LIBC_TIME_ASCTIME_INLINE { + display "asctime()" + description "Allow the asctime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_CTIME_INLINE { + display "ctime()" + description "Allow the ctime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_DIFFTIME_INLINE { + display "difftime()" + description "Allow the difftime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_GMTIME_INLINE { + display "gmtime()" + description "Allow the gmtime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_LOCALTIME_INLINE { + display "localtime()" + description "Allow the localtime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_MKTIME_INLINE { + display "mktime()" + description "Allow the mktime() function to be inlined" + type boolean + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_ASCTIME_R_INLINE { + display "asctime_r()" + description "Allow the asctime_r() function to be inlined" + type boolean + requires CYGFUN_LIBC_TIME_POSIX + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_CTIME_R_INLINE { + display "ctime_r()" + description "Allow the ctime_r() function to be inlined" + type boolean + requires CYGFUN_LIBC_TIME_POSIX + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_GMTIME_R_INLINE { + display "gmtime_r()" + description "Allow the gmtime_r() function to be inlined" + type boolean + requires CYGFUN_LIBC_TIME_POSIX + parent CYGPKG_LIBC_TIME_INLINES + } + + cdl_option CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE { + display "localtime_r()" + description "Allow the localtime_r() function to be inlined" + type boolean + requires CYGFUN_LIBC_TIME_POSIX + parent CYGPKG_LIBC_TIME_INLINES + } + +# FIXME: Also want "inline all" and "don't inline any" options which requires +# (or not) all the above, but +# if we do that then we will require the ones that also depend on +# CYGFUN_LIBC_TIME_POSIX :-( Wait for full CDL to fix this + + cdl_option CYGNUM_LIBC_TIME_CLOCK_TRACE_LEVEL { + display "clock() tracing level" + description "Trace verbosity level for debugging the clock() + function. Increase this value to get + additional trace output when tracing is enabled." + type count + legal_values 0 to 1 + parent CYGPKG_LIBC_TIME + } + + }}CFG_DATA +*/ + +#define CYGSEM_LIBC_TIME_CLOCK_WORKING +#define CYGSEM_LIBC_TIME_TIME_WORKING +#define CYGSEM_LIBC_TIME_SETTIME_WORKING +#define CYGFUN_LIBC_TIME_POSIX +#define CYGNUM_LIBC_TIME_DST_DEFAULT_STATE (-1) +#define CYGNUM_LIBC_TIME_STD_DEFAULT_OFFSET 0 +#define CYGNUM_LIBC_TIME_DST_DEFAULT_OFFSET 3600 +#define CYGNUM_LIBC_TIME_CLOCK_TRACE_LEVEL 0 +#define CYGIMP_LIBC_TIME_ASCTIME_INLINE +#define CYGIMP_LIBC_TIME_CTIME_INLINE +#define CYGIMP_LIBC_TIME_DIFFTIME_INLINE +#define CYGIMP_LIBC_TIME_GMTIME_INLINE +#define CYGIMP_LIBC_TIME_LOCALTIME_INLINE +#define CYGIMP_LIBC_TIME_MKTIME_INLINE +#define CYGIMP_LIBC_TIME_ASCTIME_R_INLINE +#define CYGIMP_LIBC_TIME_CTIME_R_INLINE +#define CYGIMP_LIBC_TIME_GMTIME_R_INLINE +#define CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE + +//======================================================================== + +// MISCELLANEOUS DEFINES + // These are not really adjustable by the user. Do not change these unless // you know what you are doing! @@ -1034,19 +1469,27 @@ // How to define inline functions #define CYGPRI_LIBC_INLINE extern __inline__ -// How to define weak symbols - may disappear as this is only relevant for -// ELF and a.out -#define CYGPRI_LIBC_WEAK __attribute__ ((weak)) +// The following isn't supported yet - I'm leaving it for now +#ifdef __GNUC__xxxxxx +# define CYGPRI_LIBC_ATTRIB_FORMAT_STRFTIME \ + __attribute__ ((format (strftime, 3))) +#else +# define CYGPRI_LIBC_ATTRIB_FORMAT_STRFTIME +#endif + +// The following are only for compatibility, and will eventually be removed +// once they are eliminated entirely from the code base + +#define CYGPRI_LIBC_WEAK CYGBLD_ATTRIB_WEAK // How to define aliases -#define CYGPRI_LIBC_ALIAS(X) __attribute__ ((alias (X))) +#define CYGPRI_LIBC_ALIAS(__symbol__) __attribute__ ((alias (__symbol__))) -// How to define weak aliases or an equivalent hack if not available - -#define CYGPRI_LIBC_WEAK_ALIAS(X) __attribute__ ((weak, alias (X))) +# define CYGPRI_LIBC_WEAK_ALIAS(__symbol__) \ + CYGBLD_ATTRIB_WEAK CYGPRI_LIBC_ALIAS(__symbol__) // How to define functions that don't return -#define CYGPRI_LIBC_NORETURN __attribute__ ((noreturn)) +#define CYGPRI_LIBC_NORETURN CYGBLD_ATTRIB_NORET #endif // CYGONCE_PKGCONF_LIBC_H multiple inclusion protection diff --git a/packages/language/c/libc/current/include/setjmp.h b/packages/language/c/libc/current/include/setjmp.h --- a/packages/language/c/libc/current/include/setjmp.h +++ b/packages/language/c/libc/current/include/setjmp.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Header file to implement ANSI standard non-local jumps as diff --git a/packages/language/c/libc/current/include/setjmp.inl b/packages/language/c/libc/current/include/setjmp.inl --- a/packages/language/c/libc/current/include/setjmp.inl +++ b/packages/language/c/libc/current/include/setjmp.inl @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Inline functions to implement ANSI standard non-local jumps as diff --git a/packages/language/c/libc/current/include/signal.h b/packages/language/c/libc/current/include/signal.h new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/include/signal.h @@ -0,0 +1,217 @@ +#ifndef CYGONCE_LIBC_SIGNAL_H +#define CYGONCE_LIBC_SIGNAL_H +//======================================================================== +// +// signal.h +// +// Definitions for ISO C and POSIX 1003.1 signals +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-03 +// Purpose: Provides description of interface to ISO C and POSIX 1003.1 +// signal functionality +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_SIGNALS + +// INCLUDES + +#include // Common type definitions and support + +#ifdef CYGSEM_LIBC_SIGNALS_POSIX +# include // _POSIX_* macros +#endif + + +// TYPE DEFINITIONS + +// Integral type that can be accessed atomically - from ISO C 7.7 +typedef cyg_atomic sig_atomic_t; + +// Type of signal handler functions +typedef void (*__sighandler_t)(int); + +#ifdef CYGSEM_LIBC_SIGNALS_POSIX + +// Signal sets from POSIX 1003.1 chap 3.3.3 and other chaps +typedef cyg_uint32 sigset_t; + +// POSIX 1003.1 chap 3.3.1.2 +union sigval { + int sival_int; // used when application-defined value is an int + void *sival_ptr; // used when application-defined value is a pointer +}; + +// Signal information structure passed to a __siginfoaction_t style handler +// from POSIX 1003.1 chap 3.3.1.3 +typedef struct { + int si_signo; // signal number + int si_code; // cause of signal + union sigval si_value; // signal value +} siginfo_t; + + +// Type of signal handler used if SA_SIGINFO is set in flags to sigaction +// from POSIX 1003.1 chap 3.3.1.3 +typedef void (*__siginfoaction_t)(int __signo, siginfo_t *__info, + void *__context); + +// struct sigaction describes the action to be taken when we get a signal +// From POSIX 1003.1 chap. 3.3.4.2 +struct sigaction { + sigset_t sa_mask; // Additional signals to be blocked + int sa_flags; // Special flags + union { + __sighandler_t sa_handler; // signal handler + __siginfoaction_t sa_sigaction; // Function to call instead of + // sa_handler if SA_SIGINFO is + // set in sa_flags + } __sigactionhandler; +#define sa_handler __sigactionhandler.sa_handler +#define sa_sigaction __sigactionhandler.sa_sigaction +}; + + +#endif // ifdef CYGSEM_LIBC_SIGNALS_POSIX + + +// CONSTANTS + +// Signal handlers for use with signal(). We avoid 0 because in an embedded +// system this may be e.g. start of ROM and thus a possible function pointer +// for reset! + +#define SIG_DFL ((__sighandler_t) 1) // Default action +#define SIG_IGN ((__sighandler_t) 2) // Ignore action +#define SIG_ERR ((__sighandler_t)-1) // Error return + +// NB. We do not need to restrict SIG* definitions (e.g. by eliminating +// POSIX signals) when using strict ISO C (permitted in 7.7) + +#define SIGNULL 0 // Reserved signal - do not use (POSIX 3.3.1.1) +#define SIGHUP 1 // Hangup on controlling terminal (POSIX) +#define SIGINT 2 // Interactive attention (ISO C) +#define SIGQUIT 3 // Interactive termination (POSIX) +#define SIGILL 4 // Illegal instruction (not reset when caught) (ISO C) +#define SIGTRAP 5 // Trace trap (not reset when caught) +#define SIGIOT 6 // IOT instruction +#define SIGABRT 6 // Abnormal termination - used by abort() (ISO C) +#define SIGEMT 7 // EMT instruction +#define SIGFPE 8 // Floating Point Exception e.g. div by 0 (ISO C) +#define SIGKILL 9 // Kill (cannot be caught or ignored) (POSIX) +#if 1 // FIXME - should be #ifdef _POSIX_MEMORY_PROTECTION? +# define SIGBUS 10 // Bus error (POSIX) +#endif +#define SIGSEGV 11 // Invalid memory reference (ISO C) +#define SIGSYS 12 // Bad argument to system call (used by anything?) +#define SIGPIPE 13 // Write on a pipe with no one to read it (POSIX) +#define SIGALRM 14 // Alarm timeout (POSIX) +#define SIGTERM 15 // Software termination request (ISO C) +#define SIGUSR1 16 // Application-defined signal 1 (POSIX) +#define SIGUSR2 17 // Application-defined signal 2 (POSIX) + +#define CYGNUM_LIBC_SIGNALS 18 // Maximum signal number + 1 + +#ifdef _POSIX_JOB_CONTROL +# define SIGCHLD 18 // Child process terminated or stopped (POSIX) +# define SIGCONT 19 // Continue if stopped (POSIX) +# define SIGSTOP 20 // Stop (cannot be caught or ignored) (POSIX) +# define SIGTSTP 21 // Interactive stop (POSIX) +# define SIGTTIN 22 // Terminal read attempted by backgrounded + // process (POSIX) +# define SIGTTOU 23 // Terminal write attempted by backgrounded + // process (POSIX) +#undef CYGNUM_LIBC_SIGNALS +#define CYGNUM_LIBC_SIGNALS 24 +#endif + +// FIXME - strictly by POSIX in 3.3.1.1 we should define SIGRTMIN/SIGRTMAX +// But if so, to what value if it _isn't_ supported?! + +#ifdef CYGSEM_LIBC_SIGNALS_POSIX +// sa_flag bits in struct sigaction +#define SA_NOCLDSTOP 1 // Don't generate SIGCHLD when children stop +#define SA_SIGINFO 2 // Use the __siginfoaction_t style signal + // handler, instead of the single argument handler +#endif // ifdef CYGSEM_LIBC_SIGNALS_POSIX + + +// FUNCTION PROTOTYPES + +#ifdef __cplusplus +extern "C" { +#endif + +//=========================================================================== + +// ISO C functions + +////////////////////////////// +// signal() - ISO C 7.7.1 // +////////////////////////////// +// +// Installs a new signal handler for the specified signal, and returns +// the old handler +// + +extern __sighandler_t +signal(int __sig, __sighandler_t __handler); + +/////////////////////////// +// raise() - ISO C 7.7.2 // +/////////////////////////// +// +// Raises the signal, which will cause the current signal handler for +// that signal to be called +// + +extern int +raise(int __sig); + + +#ifdef __cplusplus +} // extern "C" +#endif + +#include + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +#endif // CYGONCE_LIBC_SIGNAL_H multiple inclusion protection + +// EOF signal.h diff --git a/packages/language/c/libc/current/include/signal.inl b/packages/language/c/libc/current/include/signal.inl new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/include/signal.inl @@ -0,0 +1,271 @@ +#ifndef CYGONCE_LIBC_SIGNAL_INL +#define CYGONCE_LIBC_SIGNAL_INL +//======================================================================== +// +// signal.inl +// +// Inline functions for implementation of ISO C and POSIX signals +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-17 +// Purpose: Implements required inline functions of ISO C and +// POSIX 1003.1 signals +// Description: +// Usage: Do not include this file directly, instead use +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_SIGNALS + +// INCLUDES + +#include // Header for this file, just in case +#include // Assertion infrastructure +#include // Tracing infrastructure + +// GLOBALS + +extern __sighandler_t cyg_libc_signal_handlers[]; +#ifdef CYGDBG_USE_TRACING +extern cyg_uint8 cyg_libc_signals_raise_trace_level; +#endif + +// DEFINES + +// The following are overriden by the libc implementation to get a non-inline +// version to prevent duplication of code +#ifndef CYGPRI_LIBC_SIGNALS_RAISE_INLINE +# define CYGPRI_LIBC_SIGNALS_RAISE_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_SIGNALS_SIGNAL_INLINE +# define CYGPRI_LIBC_SIGNALS_SIGNAL_INLINE extern __inline__ +#endif + +// FUNCTION PROTOTYPES + +#ifdef __cplusplus +extern "C" { +#endif + +// Default signal handler - SIG_DFL +extern void cyg_libc_signals_default_handler(int __sig); + +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE +extern cyg_bool cyg_libc_signals_lock_do_lock(void); +extern void cyg_libc_signals_lock_do_unlock(void); +#endif + +// INLINE FUNCTIONS + +///////////////////////////// +// cyg_libc_signals_lock() // +///////////////////////////// + +static inline cyg_bool +cyg_libc_signals_lock(void) +{ +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE + return cyg_libc_signals_lock_do_lock(); +#else + return true; +#endif +} // cyg_libc_signals_lock() + +/////////////////////////////// +// cyg_libc_signals_unlock() // +/////////////////////////////// + +static inline void +cyg_libc_signals_unlock(void) +{ +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE + cyg_libc_signals_lock_do_unlock(); +#else + return; +#endif +} // cyg_libc_signals_unlock() + +// ISO C functions + +////////////////////////////// +// signal() - ISO C 7.7.1 // +////////////////////////////// + + +#ifdef CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE + +#ifdef CYGSEM_LIBC_SIGNALS_SIGNAL_SETS_ERRNO +# include // errno +#endif + +CYGPRI_LIBC_SIGNALS_SIGNAL_INLINE __sighandler_t +signal(int __sig, __sighandler_t __handler) +{ + __sighandler_t __old_handler; + CYG_REPORT_FUNCNAMETYPE( "__signal", "returning %08x" ); + + CYG_REPORT_FUNCARG2( "signal number = %d, requested handler is at %08x", + __sig, __handler ); + + // check valid signal - raise should not raise the null signal either + if ( (__sig >= CYGNUM_LIBC_SIGNALS) || (__sig <= 0) ) { + +#ifdef CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL + CYG_FAIL("__signal() passed bad signal number"); +#else +# ifdef CYGSEM_LIBC_SIGNALS_SIGNAL_SETS_ERRNO + errno = EINVAL; +# endif + return SIG_ERR; +#endif + } + + // paranoia + CYG_CHECK_DATA_PTR( cyg_libc_signal_handlers, + "signal handler array is invalid!" ); + if ( (__handler != SIG_IGN) && (__handler != SIG_DFL) ) + CYG_CHECK_FUNC_PTR( __handler, "__signal() passed invalid handler"); + + if (!cyg_libc_signals_lock()) { +#ifdef CYGSEM_LIBC_SIGNALS_SIGNAL_SETS_ERRNO + errno = EINTR; +#endif + return SIG_ERR; + } // if + + __old_handler = cyg_libc_signal_handlers[__sig]; + cyg_libc_signal_handlers[__sig] = __handler; + + cyg_libc_signals_unlock(); + + CYG_REPORT_RETVAL( __old_handler ); + + return __old_handler; +} // signal() +#endif // ifdef CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE + + +/////////////////////////// +// raise() - ISO C 7.7.2 // +/////////////////////////// + +#ifdef CYGIMP_LIBC_SIGNALS_RAISE_INLINE + +#ifdef CYGSEM_LIBC_SIGNALS_RAISE_SETS_ERRNO +# include // errno +#endif + +CYGPRI_LIBC_SIGNALS_RAISE_INLINE int +raise(int __sig) +{ + int __ret=0; + __sighandler_t __sigfun; + + CYG_REPORT_FUNCNAMETYPE( "__raise", "returning %d" ); + + CYG_REPORT_FUNCARG1( "signal number = %d", __sig ); + + // check valid signal - raise should not raise the null signal either + if ( (__sig >= CYGNUM_LIBC_SIGNALS) || (__sig <= 0) ) { + +#ifdef CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL + CYG_FAIL("__raise() passed bad signal number"); +#else +# ifdef CYGSEM_LIBC_SIGNALS_RAISE_SETS_ERRNO + errno = EINVAL; +# endif + return -1; +#endif + } + + // paranoia + CYG_CHECK_DATA_PTR( cyg_libc_signal_handlers, + "signal handler array is invalid!" ); + + if (!cyg_libc_signals_lock()) { +#ifdef CYGSEM_LIBC_SIGNALS_RAISE_SETS_ERRNO + errno = EINTR; +#endif + return -1; + } // if + + __sigfun = cyg_libc_signal_handlers[__sig]; + + switch ( (CYG_ADDRESS)__sigfun ) { + + case (CYG_ADDRESS)SIG_DFL: + CYG_TRACE0(cyg_libc_signals_raise_trace_level, + "signal handler returned is SIG_DFL"); + cyg_libc_signals_unlock(); + cyg_libc_signals_default_handler(__sig); + break; + + case (CYG_ADDRESS)SIG_IGN: + CYG_TRACE0(cyg_libc_signals_raise_trace_level, + "signal handler returned is SIG_IGN"); + cyg_libc_signals_unlock(); + + break; + + default: + CYG_TRACE1(cyg_libc_signals_raise_trace_level, + "signal handler returned is at %08x", __sigfun); + // call the signal handler directly + cyg_libc_signal_handlers[__sig] = SIG_DFL; + + cyg_libc_signals_unlock(); + CYG_CHECK_FUNC_PTR( __sigfun, "returned signal handler invalid!"); + + (*__sigfun)(__sig); + break; + } + + CYG_REPORT_RETVAL( __ret ); + + return __ret; +} // raise() +#endif // ifdef CYGIMP_LIBC_SIGNALS_RAISE_INLINE + + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +#endif // CYGONCE_LIBC_SIGNAL_INL multiple inclusion protection + +// EOF signal.inl diff --git a/packages/language/c/libc/current/include/stdio.h b/packages/language/c/libc/current/include/stdio.h --- a/packages/language/c/libc/current/include/stdio.h +++ b/packages/language/c/libc/current/include/stdio.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,9 +32,9 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Contributors: jlarmour +// Date: 1999-01-19 +// Purpose: ISO C standard I/O routines // Description: // Usage: #include // @@ -54,7 +54,6 @@ #include // common type definitions and support #include // NULL and size_t from compiler #include // va_list from compiler -#include // FILE definition // CONSTANTS @@ -74,9 +73,9 @@ // SEEK_CUR, SEEK_END and SEEK_SET are used with fseek() as position // anchors - ISO C standard chap. 7.9.1 -#define SEEK_CUR (-16) -#define SEEK_END (-32) -#define SEEK_SET (-64) +#define SEEK_SET 0 +#define SEEK_CUR 1 +#define SEEK_END 2 // TYPE DEFINITIONS @@ -86,12 +85,33 @@ typedef cyg_ucount32 fpos_t; +typedef CYG_ADDRESS FILE; // FILE is just cast to an address here. It is + // uncast internally to the C library in stream.hxx + // as the C++ Cyg_StdioStream class. Optional + // run-time checking can be enabled to ensure that + // the cast is valid, using the standard assertion + // functionality + // EXTERNAL VARIABLES // Default file streams for input/output. These only need to be // expressions, not l-values - ISO C standard chap. 7.9.1 +// +// cyg_libc_stdio_stdin/out/err aren't really files of course, +// but they are only named here so that we can take the address of +// them, in which case it doesn't matter what type they point to really +// +// CYGPRI_LIBC_STDIO_NO_DEFAULT_STREAMS is used when initializing +// cyg_libc_stdio_stdin/out/err privately inside the C library -externC FILE *stdin, *stdout, *stderr; +#ifndef CYGPRI_LIBC_STDIO_NO_DEFAULT_STREAMS +extern FILE cyg_libc_stdio_stdin, cyg_libc_stdio_stdout, + cyg_libc_stdio_stderr; + +#define stdin (&cyg_libc_stdio_stdin) +#define stdout (&cyg_libc_stdio_stdout) +#define stderr (&cyg_libc_stdio_stderr) +#endif // FUNCTION PROTOTYPES diff --git a/packages/language/c/libc/current/include/stdio.inl b/packages/language/c/libc/current/include/stdio.inl --- a/packages/language/c/libc/current/include/stdio.inl +++ b/packages/language/c/libc/current/include/stdio.inl @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -69,9 +69,12 @@ CYGPRI_LIBC_INLINE void setbuf( FILE *stream, char *buf ) { if (buf == NULL) - setvbuf( stream, NULL, _IOFBF, BUFSIZE ); + setvbuf( stream, NULL, _IONBF, BUFSIZ ); else - setvbuf( stream, buf, _IONBF, BUFSIZE ); + // NB: Should use full buffering by default ordinarily, but in + // the current system we're always connected to an interactive + // terminal, so use line buffering + setvbuf( stream, buf, _IOLBF, BUFSIZ ); } // setbuf() diff --git a/packages/language/c/libc/current/include/stdlib.h b/packages/language/c/libc/current/include/stdlib.h --- a/packages/language/c/libc/current/include/stdlib.h +++ b/packages/language/c/libc/current/include/stdlib.h @@ -24,19 +24,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-17 // Purpose: // Description: -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -46,9 +46,6 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions and support @@ -57,12 +54,14 @@ // CONSTANTS -// as described in ANSI para 7.10 +// as described in ISO para 7.10 // codes to pass to exit() -#define EXIT_SUCCESS 0 // Successful exit status -#define EXIT_FAILURE 1 // Failing exit status +// Successful exit status - must be zero (POSIX 1003.1 8.1) +#define EXIT_SUCCESS 0 +// Failing exit status - must be non-zero (POSIX 1003.1 8.1) +#define EXIT_FAILURE 1 // Maximum value returned by rand() @@ -100,7 +99,7 @@ typedef int (*Cyg_comparison_fn_t)(const const void * /* object2 */); // Similarly, type of function used by atexit() -typedef void (*Cyg_atexit_fn_t)( void ); +typedef void (*Cyg_libc_atexit_fn_t)( void ); // FUNCTION PROTOTYPES @@ -168,22 +167,25 @@ realloc( void * /* ptr */, size_t /* siz // 7.10.4 Communication with the environment externC void -abort( void ) CYGPRI_LIBC_NORETURN; +abort( void ) CYGBLD_ATTRIB_NORET; externC int -atexit( Cyg_atexit_fn_t /* func_to_register */ ); +atexit( Cyg_libc_atexit_fn_t /* func_to_register */ ); externC void -exit( int /* status */ ) CYGPRI_LIBC_NORETURN; +exit( int /* status */ ) CYGBLD_ATTRIB_NORET; /* POSIX 1003.1 section 3.2.2 "Terminate a process" */ externC void -_exit( int /* status */ ) CYGPRI_LIBC_NORETURN; +_exit( int /* status */ ) CYGBLD_ATTRIB_NORET; externC char * getenv( const char * /* name */ ); +externC int +system( const char * /* command */ ); + //======================================================================== @@ -204,27 +206,43 @@ qsort( void * /* first_object */, size_t // 7.10.6 Integer arithmetic functions externC int -abs( int /* val */ ); +abs( int /* val */ ) CYGBLD_ATTRIB_CONST; externC div_t -div( int /* numerator */, int /* denominator */ ); +div( int /* numerator */, int /* denominator */ ) CYGBLD_ATTRIB_CONST; externC long -labs( long /* val */ ); +labs( long /* val */ ) CYGBLD_ATTRIB_CONST; externC ldiv_t -ldiv( long /* numerator */, long /* denominator */ ); +ldiv( long /* numerator */, long /* denominator */ ) CYGBLD_ATTRIB_CONST; //======================================================================== +// NON-STANDARD FUNCTIONS + +///////////////////// +// cyg_libc_itoa() // +///////////////////// +// +// This converts num to a string and puts it into s padding with +// "0"'s if padzero is set, or spaces otherwise if necessary. +// The number of chars written to s is returned +// + +externC cyg_uint8 +cyg_libc_itoa( cyg_uint8 *__s, cyg_int32 __num, cyg_uint8 __width, + cyg_bool __padzero ); + +//======================================================================== + + // INLINE FUNCTIONS #ifdef CYGIMP_LIBC_STDLIB_INLINES #include #endif -#endif // ifdef CYGPKG_LIBC - #endif // CYGONCE_LIBC_STDLIB_H multiple inclusion protection // EOF stdlib.h diff --git a/packages/language/c/libc/current/include/stdlib.inl b/packages/language/c/libc/current/include/stdlib.inl --- a/packages/language/c/libc/current/include/stdlib.inl +++ b/packages/language/c/libc/current/include/stdlib.inl @@ -25,76 +25,34 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour@ +// Date: 1999-03-02 // Purpose: // Description: -// Usage: #include - do not include this file directly +// Usage: Do not include this file directly - include instead // //####DESCRIPTIONEND#### // //=========================================================================== -// -// The div() and ldiv() functions in this file are based on original -// code with the following copyright: -// -// Note that only div() and ldiv() have this copyright -// -/* - * Copyright (c) 1990 Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Chris Torek. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ // CONFIGURATION #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES -#include // NULL, wchar_t and size_t from compiler -#include // Just to be sure that the main header is there +#include // NULL, wchar_t and size_t from compiler +#include // Header for this file, just in case +#include // Assertion support +#include // Tracing support // FUNCTIONS @@ -128,79 +86,131 @@ atol( const char *nptr ) CYGPRI_LIBC_INLINE int -abs( int j ) +abs( int __j ) { - return (j<0) ? -j : j; + return (__j<0) ? -__j : __j; } // abs() CYGPRI_LIBC_INLINE div_t -div( int numer, int denom ) +div( int __numer, int __denom ) { - div_t result; + div_t __ret; + + CYG_REPORT_FUNCNAMETYPE( "div", "quotient: %d"); + CYG_REPORT_FUNCARG2DV( __numer, __denom ); + // FIXME: what if they want it handled with SIGFPE? Should have option + CYG_PRECONDITION(__denom != 0, "division by zero attempted!"); - // The ANSI standard says that |r.quot| <= |n/d|, where - // n/d is to be computed in infinite precision. In other - // words, we should always truncate the quotient towards - // 0, never -infinity. + __ret.quot = __numer / __denom; + __ret.rem = __numer % __denom; + + // But the modulo is implementation-defined for -ve numbers (ISO C 6.3.5) + // and we are required to "round" to zero (ISO C 7.10.6.2) // - // Machine division and remainer may work either way when - // one or both of n or d is negative. If only one is - // negative and r.quot has been truncated towards -inf, - // r.rem will have the same sign as denom and the opposite - // sign of num; if both are negative and r.quot has been - // truncated towards -inf, r.rem will be positive (will - // have the opposite sign of num). These are considered - // `wrong'. + // The cases we have to deal with are inexact division of: + // a) + div + + // b) + div - + // c) - div + + // d) - div - // - // If both are num and denom are positive, r will always - // be positive. + // a) can never go wrong and the quotient and remainder are always positive + // b) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be negative when it + // should be positive or zero + // c) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be positive when it + // should be negative or zero + // d) only goes wrong if the positive quotient has been rounded to + // +infinity - if so then the remainder will be positive when it + // should be negative or zero // - // This all boils down to: - // if num >= 0, but r.rem < 0, we got the wrong answer. - // In that case, to get the right answer, add 1 to r.quot and - // subtract denom from r.rem. + // So the correct sign of the remainder corresponds to the sign of the + // numerator. Which means we can say that the result needs adjusting + // iff the sign of the numerator is different from the sign of the + // remainder. + // + // You may be interested to know that the Berkeley version of div() + // would get this wrong for e.g. (c) and (d) on some targets. + // e.g. for (-5)/4 it could leave the result as -2R3 - result.quot = numer / denom; - result.rem = numer % denom; + if ((__ret.rem < 0) && (__numer > 0)) { + ++__ret.quot; + __ret.rem -= __denom; + } else if ((__ret.rem > 0) && (__numer < 0)) { + --__ret.quot; + __ret.rem += __denom; + } // else - if ( (numer >= 0) && (result.rem < 0) ) - { - result.quot++; - result.rem -= denom; - } // if + CYG_REPORT_RETVAL( __ret.quot ); - return result; + return __ret; } // div() CYGPRI_LIBC_INLINE long -labs( long j ) +labs( long __j ) { - return (j<0) ? -j : j; + return (__j<0) ? -__j : __j; } // labs() CYGPRI_LIBC_INLINE ldiv_t -ldiv( long numer, long denom ) +ldiv( long __numer, long __denom ) { - ldiv_t result; + ldiv_t __ret; - result.quot = numer / denom; - result.rem = numer % denom; + CYG_REPORT_FUNCNAMETYPE( "ldiv", "quotient: %d"); + CYG_REPORT_FUNCARG2DV( __numer, __denom ); + // FIXME: what if they want it handled with SIGFPE? Should have option + CYG_PRECONDITION(__denom != 0, "division by zero attempted!"); + + __ret.quot = __numer / __denom; + __ret.rem = __numer % __denom; - if ( (numer >= 0) && (result.rem < 0) ) - { - result.quot++; - result.rem -= denom; - } // if + // But the modulo is implementation-defined for -ve numbers (ISO C 6.3.5) + // and we are required to "round" to zero (ISO C 7.10.6.2) + // + // The cases we have to deal with are inexact division of: + // a) + div + + // b) + div - + // c) - div + + // d) - div - + // + // a) can never go wrong and the quotient and remainder are always positive + // b) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be negative when it + // should be positive or zero + // c) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be positive when it + // should be negative or zero + // d) only goes wrong if the positive quotient has been rounded to + // +infinity - if so then the remainder will be positive when it + // should be negative or zero + // + // So the correct sign of the remainder corresponds to the sign of the + // numerator. Which means we can say that the result needs adjusting + // iff the sign of the numerator is different from the sign of the + // remainder. + // + // You may be interested to know that the Berkeley version of ldiv() + // would get this wrong for e.g. (c) and (d) on some targets. + // e.g. for (-5)/4 it could leave the result as -2R3 - return result; + if ((__ret.rem < 0) && (__numer > 0)) { + ++__ret.quot; + __ret.rem -= __denom; + } else if ((__ret.rem > 0) && (__numer < 0)) { + --__ret.quot; + __ret.rem += __denom; + } // else + + CYG_REPORT_RETVAL( __ret.quot ); + + return __ret; } // ldiv() -#endif // ifdef CYGPKG_LIBC - #endif // CYGONCE_LIBC_STDLIB_INL multiple inclusion protection // EOF stdlib.inl diff --git a/packages/language/c/libc/current/include/string.h b/packages/language/c/libc/current/include/string.h --- a/packages/language/c/libc/current/include/string.h +++ b/packages/language/c/libc/current/include/string.h @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/include/string.inl b/packages/language/c/libc/current/include/string.inl --- a/packages/language/c/libc/current/include/string.inl +++ b/packages/language/c/libc/current/include/string.inl @@ -25,7 +25,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -33,7 +33,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/include/sys/cstartup.h b/packages/language/c/libc/current/include/sys/cstartup.h --- a/packages/language/c/libc/current/include/sys/cstartup.h +++ b/packages/language/c/libc/current/include/sys/cstartup.h @@ -24,42 +24,36 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-08-27 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-23 // Purpose: // Description: -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // //=========================================================================== -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -// INCLUDES - -#include // Common type definitions and support - // FUNCTION PROTOTYPES -externC void +#ifdef __cplusplus +extern "C" { +#endif + +extern void cyg_iso_c_start( void ); - -#endif // ifdef CYGPKG_LIBC +#ifdef __cplusplus +} +#endif #endif CYGONCE_LIBC_CSTARTUP_H multiple inclusion protection diff --git a/packages/language/c/libc/current/include/sys/file_if.h b/packages/language/c/libc/current/include/sys/file_if.h deleted file mode 100644 --- a/packages/language/c/libc/current/include/sys/file_if.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef CYGONCE_LIBC_FILE_IF_H -#define CYGONCE_LIBC_FILE_IF_H -//=========================================================================== -// -// file_if.h -// -// File interface definitions -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//=========================================================================== - -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -// INCLUDES - -#include // Common type definitions and support - -// TYPE DEFINITIONS - -typedef CYG_ADDRESS FILE; // This address is cast to an address here. It is - // uncast internally to the C library in stream.hxx - // as the C++ Cyg_StdioStream class. Optional - // run-time checking can be enabled to ensure that - // the cast is valid - -#endif // ifdef CYGPKG_LIBC - -#endif // CYGONCE_LIBC_FILE_IF_H multiple inclusion protection - -// EOF file_if.h diff --git a/packages/language/c/libc/current/include/sys/timeutil.h b/packages/language/c/libc/current/include/sys/timeutil.h new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/include/sys/timeutil.h @@ -0,0 +1,82 @@ +#ifndef CYGONCE_LIBC_SYS_TIMEUTIL_H +#define CYGONCE_LIBC_SYS_TIMEUTIL_H +//======================================================================== +// +// sys/timeutil.h +// +// ISO C date and time implementation support functions +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-03 +// Purpose: Provide declarations for support functions used by the +// ISO C date and time implementation +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// INCLUDES + +#include // Common type definitions and support + +#ifdef __cplusplus +extern "C" { +#endif + +// GLOBALS + +// Strings of the days and month names +// FIXME: uncomment "const" when PR 19440 is fixed +extern /*const*/ char cyg_libc_time_day_name[7][10]; +extern const cyg_uint8 cyg_libc_time_day_name_len[7]; +extern /*const*/ char cyg_libc_time_month_name[12][10]; +extern const cyg_uint8 cyg_libc_time_month_name_len[12]; + +// number of days in each month, defined for normal and leap years +extern const cyg_uint8 cyg_libc_time_month_lengths[2][12]; + + +// FUNCTION PROTOTYPES + +// cyg_libc_time_normalize_structtm() will adjust the fields of a struct tm +// so that they are within the normal ranges expected. +// tm_wday, tm_yday, and tm_isdst are ignored + +extern void +cyg_libc_time_normalize_structtm( struct tm *__timeptr ); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // CYGONCE_LIBC_SYS_TIMEUTIL_H multiple inclusion protection + +// EOF sys/timeutil.h diff --git a/packages/language/c/libc/current/include/time.h b/packages/language/c/libc/current/include/time.h --- a/packages/language/c/libc/current/include/time.h +++ b/packages/language/c/libc/current/include/time.h @@ -4,7 +4,7 @@ // // time.h // -// ANSI standard time routines defined in section 7.12 of the standard +// Date and time routines from ISO C section 7.12 and POSIX 1003.1 // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -24,19 +24,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-25 +// Purpose: Provide definitions required by ISO C section 7.12 and +// POSIX 1003.1 8.3.4-8.3.7 // Description: -// Usage: #include +// Usage: #include // //####DESCRIPTIONEND#### // @@ -44,30 +45,44 @@ // CONFIGURATION -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC +#include // C library configuration // INCLUDES -#include // ECC common type definitions and support -#include // NULL and size_t from compiler +#include // Common type definitions and support +#include // is required to provide NULL + // and size_t, so we get them from compiler // CONSTANTS // What to divide clock_t by to get seconds (para 7.12.1) -#define CLOCKS_PER_SEC 1000 +// According to CAE XSH, Issue 4, V2, CLOCKS_PER_SEC must be 1 million on all +// XSI-conformant systems +#define CLOCKS_PER_SEC 1000000 // TYPE DEFINITIONS -// as per para 7.12.1 +// Define clock_t as per ISO C para 7.12.1 +// We make it very big since CLOCKS_PER_SEC is so large - this should last +// for 584942 years :-) An int32 would only last a little over an hour :-( typedef cyg_int64 clock_t; +// Define time_t as per ISO C para 7.12.1 +// In the implementation we give it the meaning of seconds since the +// Epoch (00:00:00 GMT, 1970-01-01), but don't rely on this - always use +// the type opaquely +// A 32-bit value will overflow in the year 2038. Hopefully we will have +// moved forward from 32-bit CPUs by then, so making it a cyg_count* type +// may suffice ;-) typedef cyg_count32 time_t; +#define __time_t_defined // FIXME: this is temporary to stop newlib's + // complaining. This should be resolved + // properly and a new provided +// Define struct tm as per ISO C para 7.12.1 struct tm { - int tm_sec; // seconds after the minute - [0..61] + int tm_sec; // seconds after the minute - [0..61] + // (note 61 allows for two leap seconds) int tm_min; // minutes after the hour - [0..59] int tm_hour; // hours since midnight - [0..23] int tm_mday; // days of the month - [1..31] @@ -80,16 +95,229 @@ struct tm { // is not available }; +// The following struct is used by the implementation-defined functions +// to manipulate the Daylight Savings Time state +typedef enum { + CYG_LIBC_TIME_DSTNA = -1, + CYG_LIBC_TIME_DSTOFF = 0, + CYG_LIBC_TIME_DSTON = 1 +} Cyg_libc_time_dst; + // FUNCTION PROTOTYPES +#ifdef __cplusplus +extern "C" { +#endif + +//=========================================================================== +// +// POSIX 1003.1 functions + +#ifdef CYGFUN_LIBC_TIME_POSIX + +///////////////////////////////// +// asctime_r() - POSIX.1 8.3.4 // +///////////////////////////////// +// +// This returns a textual representation of a struct tm, and writes +// the string to return into __buf +// + +extern char * +asctime_r( const struct tm *__timeptr, char *__buf ); + +/////////////////////////////// +// ctime_r() - POSIX.1 8.3.5 // +/////////////////////////////// +// +// This returns the equivalent of ctime() but writes to __buf +// to store the returned string +// + +extern char * +ctime_r( const time_t *__timer, char *__buf ); + +//////////////////////////////// +// gmtime_r() - POSIX.1 8.3.6 // +//////////////////////////////// +// +// This converts a time_t into a struct tm expressed in UTC, and stores +// the result in the space occupied by __result +// + +extern struct tm * +gmtime_r( const time_t *__timer, struct tm *__result ); + +/////////////////////////////////// +// localtime_r() - POSIX.1 8.3.7 // +/////////////////////////////////// +// +// This converts a time_t into a struct tm expressed in local time, and +// stores the result in the space occupied by __result +// + +extern struct tm * +localtime_r( const time_t *__timer, struct tm *__result ); + + +#endif // ifdef CYGFUN_LIBC_TIME_POSIX + //=========================================================================== -// 7.12.2 Time manipulation functions +// ISO C functions + +// Time manipulation functions - ISO C 7.12.2 -externC clock_t +////////////////////////////// +// clock() - ISO C 7.12.2.1 // +////////////////////////////// +// +// Returns processor time used in "clock"s. For a single process, +// multi-threaded system this will just be the time since booting +// + +extern clock_t clock( void ); -#endif // ifdef CYGPKG_LIBC +///////////////////////////////// +// difftime() - ISO C 7.12.2.2 // +///////////////////////////////// +// +// This returns (__time1 - __time0) in seconds +// + +extern double +difftime( time_t __time1, time_t __time0 ); + +/////////////////////////////// +// mktime() - ISO C 7.12.2.3 // +/////////////////////////////// +// +// This converts a "struct tm" to a "time_t" +// + +extern time_t +mktime( struct tm *__timeptr ); + +///////////////////////////// +// time() - ISO C 7.12.2.4 // +///////////////////////////// +// +// This returns calendar time as a time_t +// + +extern time_t +time( time_t *__timer ); + +// Time conversion functions - ISO C 7.12.3 + +//////////////////////////////// +// asctime() - ISO C 7.12.3.1 // +//////////////////////////////// +// +// This returns a textual representation of a struct tm +// + +extern char * +asctime( const struct tm *__timeptr ); + +////////////////////////////// +// ctime() - ISO C 7.12.3.2 // +////////////////////////////// +// +// This returns asctime(localtime(__timeptr)) +// + +extern char * +ctime( const time_t *__timer ); + +/////////////////////////////// +// gmtime() - ISO C 7.12.3.3 // +/////////////////////////////// +// +// This converts a time_t into a struct tm expressed in UTC +// + +extern struct tm * +gmtime( const time_t *__timer ); + +////////////////////////////////// +// localtime() - ISO C 7.12.3.4 // +////////////////////////////////// +// +// This converts a time_t into a struct tm expressed in local time +// + +extern struct tm * +localtime( const time_t *__timer ); + +///////////////////////////////// +// strftime() - ISO C 7.12.3.5 // +///////////////////////////////// +// +// This converts a string using format specifiers that signify various +// time-related quantities +// + +extern size_t +strftime( char *__s, size_t __maxsize, const char *__format, + const struct tm *__timeptr) CYGPRI_LIBC_ATTRIB_FORMAT_STRFTIME; + +//=========================================================================== + +// Implementation-specific functions + +//////////////////////////////////// +// cyg_libc_time_setzoneoffsets() // +//////////////////////////////////// +// +// This function sets the offsets used when Daylight Savings Time is enabled +// or disabled. The offsets are in time_t's +// + +extern void +cyg_libc_time_setzoneoffsets( time_t __stdoffset, time_t __dstoffset ); + +//////////////////////////// +// cyg_libc_time_setdst() // +//////////////////////////// +// +// This function sets the state of Daylight Savings Time: on, off, or unknown +// + +extern void +cyg_libc_time_setdst( Cyg_libc_time_dst __state ); + + +//////////////////////////////////// +// cyg_libc_time_getzoneoffsets() // +//////////////////////////////////// +// +// This function retrieves the current state of the Daylight Savings Time +// and the offsets of both STD and DST +// The offsets are both in time_t's +// + +extern Cyg_libc_time_dst +cyg_libc_time_getzoneoffsets( time_t *__stdoffset, time_t *__dstoffset ); + +///////////////////////////// +// cyg_libc_time_settime() // +///////////////////////////// +// +// This function sets the current time for the system. The time is +// specified as a time_t in UTC. It returns non-zero on error. +// + +extern cyg_bool +cyg_libc_time_settime( time_t __utctime ); + + +#ifdef __cplusplus +} // extern "C" +#endif + +#include #endif // CYGONCE_LIBC_TIME_H multiple inclusion protection diff --git a/packages/language/c/libc/current/include/time.inl b/packages/language/c/libc/current/include/time.inl new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/include/time.inl @@ -0,0 +1,853 @@ +#ifndef CYGONCE_LIBC_TIME_INL +#define CYGONCE_LIBC_TIME_INL +//=========================================================================== +// +// time.inl +// +// Inline implementations of date and time routines from +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-25 +// Purpose: Provide inline implementations for some of the date and time +// routines declared in for ISO C section 7.12 and +// POSIX 1003.1 8.3.4-8.3.7 +// Description: +// Usage: Do not include this file directly. Instead include +// +//####DESCRIPTIONEND#### +// +//=========================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Header for this file +#include // Assertion infrastructure +#include // Tracing infrastructure + +// DEFINES + +// The following are overriden by the libc implementation to get a non-inline +// version to prevent duplication of code + +#ifndef CYGPRI_LIBC_TIME_ASCTIME_R_INLINE +# define CYGPRI_LIBC_TIME_ASCTIME_R_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_CTIME_R_INLINE +# define CYGPRI_LIBC_TIME_CTIME_R_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_GMTIME_R_INLINE +# define CYGPRI_LIBC_TIME_GMTIME_R_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_LOCALTIME_R_INLINE +# define CYGPRI_LIBC_TIME_LOCALTIME_R_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_DIFFTIME_INLINE +# define CYGPRI_LIBC_TIME_DIFFTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_MKTIME_INLINE +# define CYGPRI_LIBC_TIME_MKTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_ASCTIME_INLINE +# define CYGPRI_LIBC_TIME_ASCTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_CTIME_INLINE +# define CYGPRI_LIBC_TIME_CTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_GMTIME_INLINE +# define CYGPRI_LIBC_TIME_GMTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_LOCALTIME_INLINE +# define CYGPRI_LIBC_TIME_LOCALTIME_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_GETZONEOFFSETS_INLINE +# define CYGPRI_LIBC_TIME_GETZONEOFFSETS_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_SETZONEOFFSETS_INLINE +# define CYGPRI_LIBC_TIME_SETZONEOFFSETS_INLINE extern __inline__ +#endif + +#ifndef CYGPRI_LIBC_TIME_SETDST_INLINE +# define CYGPRI_LIBC_TIME_SETDST_INLINE extern __inline__ +#endif + +#define CYGNUM_LIBC_TIME_EPOCH_WDAY 4 // Jan 1st 1970 was a Thursday + +#ifdef __cplusplus +extern "C" { +#endif + +// EXTERNS + +// These are used in the dst access functions below. Do not access these +// directly - use the functions declared in time.h instead + +extern Cyg_libc_time_dst cyg_libc_time_current_dst_stat; +extern time_t cyg_libc_time_current_std_offset; +extern time_t cyg_libc_time_current_dst_offset; + +// INLINE FUNCTIONS + +//=========================================================================== +// +// Utility functions + +////////////////////////////////// +// cyg_libc_time_year_is_leap() // +////////////////////////////////// +// +// This returns true if the year is a leap year. +// The argument is of type int in line with struct tm +// + +static __inline__ cyg_bool +cyg_libc_time_year_is_leap( int __year ) +{ + cyg_bool _leap=false; + + if (!(__year % 400)) + _leap = true; + else if (!(__year % 4) && (__year % 100)) + _leap = true; + return _leap; +} // cyg_libc_time_year_is_leap() + + +//////////////////////////////////// +// cyg_libc_time_getzoneoffsets() // +//////////////////////////////////// +// +// This function retrieves the current state of the Daylight Savings Time +// and the offsets of both STD and DST +// The offsets are both in time_t's i.e. seconds +// + +CYGPRI_LIBC_TIME_GETZONEOFFSETS_INLINE Cyg_libc_time_dst +cyg_libc_time_getzoneoffsets( time_t *__stdoffset, time_t *__dstoffset ) +{ + CYG_REPORT_FUNCNAMETYPE("cyg_libc_time_getzoneoffsets", + "returning DST state %d"); + CYG_REPORT_FUNCARG2("__stdoffset is at address %08x, " + "__dstoffset is at %08x", __stdoffset, __dstoffset); + + CYG_CHECK_DATA_PTR(__stdoffset, "__stdoffset is not a valid pointer!"); + CYG_CHECK_DATA_PTR(__dstoffset, "__dstoffset is not a valid pointer!"); + + *__stdoffset = cyg_libc_time_current_std_offset; + *__dstoffset = cyg_libc_time_current_dst_offset; + + CYG_REPORT_RETVAL(cyg_libc_time_current_dst_stat); + + return cyg_libc_time_current_dst_stat; +} // cyg_libc_time_getzoneoffsets() + + +//////////////////////////////////// +// cyg_libc_time_setzoneoffsets() // +//////////////////////////////////// +// +// This function sets the offsets used when Daylight Savings Time is enabled +// or disabled. The offsets are in time_t's i.e. seconds +// + +CYGPRI_LIBC_TIME_SETZONEOFFSETS_INLINE void +cyg_libc_time_setzoneoffsets( time_t __stdoffset, time_t __dstoffset ) +{ + CYG_REPORT_FUNCNAME("cyg_libc_time_setzoneoffsets"); + CYG_REPORT_FUNCARG2DV(__stdoffset, __dstoffset); + + cyg_libc_time_current_std_offset = __stdoffset; + cyg_libc_time_current_dst_offset = __dstoffset; + + CYG_REPORT_RETURN(); +} // cyg_libc_time_setzoneoffsets() + + +//////////////////////////// +// cyg_libc_time_setdst() // +//////////////////////////// +// +// This function sets the state of Daylight Savings Time: on, off, or unknown +// + +CYGPRI_LIBC_TIME_SETDST_INLINE void +cyg_libc_time_setdst( Cyg_libc_time_dst __state ) +{ + CYG_REPORT_FUNCNAME("cyg_libc_time_setdst"); + CYG_REPORT_FUNCARG1("__state=%d", __state); + + cyg_libc_time_current_dst_stat = __state; + + CYG_REPORT_RETURN(); +} // cyg_libc_time_setdst() + + + +//=========================================================================== +// +// POSIX 1003.1 functions + +///////////////////////////////// +// asctime_r() - POSIX.1 8.3.4 // +///////////////////////////////// +// +// This returns a textual representation of a struct tm, and writes +// the string to return into __buf +// + +#ifdef CYGIMP_LIBC_TIME_ASCTIME_R_INLINE + +#include // for sprintf() +#include // for cyg_libc_time_{day,month}_name +#include // for memcpy() +#include // for cyg_libc_itoa() + +CYGPRI_LIBC_TIME_ASCTIME_R_INLINE char * +__asctime_r( const struct tm *__timeptr, char *__buf ) +{ + cyg_uint8 __i; + + // These initializers are [4] since C++ dictates you _must_ leave space + // for the trailing '\0', even though ISO C says you don't need to! + + CYG_REPORT_FUNCNAMETYPE("__asctime_r", "returning \"%s\""); + CYG_REPORT_FUNCARG2("__timeptr = %08x, __buf = %08x", __timeptr, __buf); + + // paranoia - most of these aren't required but could be helpful to + // a programmer debugging their own app. + CYG_CHECK_DATA_PTR(__timeptr, "__timeptr is not a valid pointer!"); + CYG_CHECK_DATA_PTR(__buf, "__buf is not a valid pointer!"); + + CYG_PRECONDITION((__timeptr->tm_sec >= 0) && (__timeptr->tm_sec < 62), + "__timeptr->tm_sec out of range!"); + CYG_PRECONDITION((__timeptr->tm_min >= 0) && (__timeptr->tm_min < 60), + "__timeptr->tm_min out of range!"); + CYG_PRECONDITION((__timeptr->tm_hour >= 0) && (__timeptr->tm_hour < 24), + "__timeptr->tm_hour out of range!"); + // Currently I don't check _actual_ numbers of days in each month here + // FIXME: No reason why not though + CYG_PRECONDITION((__timeptr->tm_mday >= 1) && (__timeptr->tm_mday < 32), + "__timeptr->tm_mday out of range!"); + CYG_PRECONDITION((__timeptr->tm_mon >= 0) && (__timeptr->tm_mon < 12), + "__timeptr->tm_mon out of range!"); + CYG_PRECONDITION((__timeptr->tm_wday >= 0) && (__timeptr->tm_wday < 7), + "__timeptr->tm_wday out of range!"); + CYG_PRECONDITION((__timeptr->tm_yday >= 0) && (__timeptr->tm_yday < 366), + "__timeptr->tm_yday out of range!"); + CYG_PRECONDITION((__timeptr->tm_year > -1900) && + (__timeptr->tm_year < 8100), + "__timeptr->tm_year out of range!"); + + // we can't use strftime because ISO C is stupid enough not to allow + // the strings in asctime() to be localized. Duh. + + // day of the week + memcpy(&__buf[0], cyg_libc_time_day_name[__timeptr->tm_wday], 3); + __buf[3] = ' '; + + // month + memcpy(&__buf[4], cyg_libc_time_month_name[__timeptr->tm_mon], 3); + __buf[7] = ' '; + + __i = 8; + + // day of the month + __i += cyg_libc_itoa( (cyg_uint8 *)&__buf[__i], __timeptr->tm_mday, 2, + true); + __buf[__i++] = ' '; + + // hour + __i += cyg_libc_itoa( (cyg_uint8 *)&__buf[__i], __timeptr->tm_hour, 2, + true); + __buf[__i++] = ':'; + + // minute + __i += cyg_libc_itoa( (cyg_uint8 *)&__buf[__i], __timeptr->tm_min, 2, + true); + __buf[__i++] = ':'; + + // second + __i += cyg_libc_itoa((cyg_uint8 *) &__buf[__i], __timeptr->tm_sec, 2, + true); + __buf[__i++] = ' '; + + // year + __i += cyg_libc_itoa( (cyg_uint8 *)&__buf[__i], 1900+__timeptr->tm_year, + 0, true); + + __buf[__i++] = '\n'; + __buf[__i++] = '\0'; + + CYG_REPORT_RETVAL(__buf); + return __buf; +} // __asctime_r() + +# ifdef CYGFUN_LIBC_TIME_POSIX +# define asctime_r(__timeptr, __buf) __asctime_r(__timeptr, __buf) +# endif + +#else + +extern char * +__asctime_r( const struct tm *__timeptr, char *__buf ); + +#endif // ifdef CYGIMP_LIBC_TIME_ASCTIME_R_INLINE + +//////////////////////////////// +// gmtime_r() - POSIX.1 8.3.6 // +//////////////////////////////// +// +// This converts a time_t into a struct tm expressed in UTC, and stores +// the result in the space occupied by __result +// + +#ifdef CYGIMP_LIBC_TIME_GMTIME_R_INLINE + +#include // for cyg_libc_time_month_lengths + +CYGPRI_LIBC_TIME_GMTIME_R_INLINE struct tm * +__gmtime_r( const time_t *__timer, struct tm *__result ) +{ + time_t _tim; + const cyg_uint8 *_months_p; + + CYG_REPORT_FUNCNAMETYPE("__gmtime_r", "returning %08x"); + CYG_CHECK_DATA_PTR(__timer, "__timer is not a valid pointer!"); + CYG_CHECK_DATA_PTR(__result, "__result is not a valid pointer!"); + CYG_REPORT_FUNCARG2("*__timer=%d, __result is at %08x", + *__timer, __result); + +#define CYGNUM_LIBC_TIME_SECSPERDAY (60*60*24) +#define CYGNUM_LIBC_TIME_SECSPERYEAR (CYGNUM_LIBC_TIME_SECSPERDAY * 365) +#define CYGNUM_LIBC_TIME_SECSPERLEAPYEAR (CYGNUM_LIBC_TIME_SECSPERDAY * 366) + + _tim = *__timer; + + // First, work out year. Start off with 1970 and work forwards or backwards + // depending on the sign of _tim + __result->tm_year = 70; + + // we also work out the day of the week of the start of the year as we + // go along + __result->tm_wday = CYGNUM_LIBC_TIME_EPOCH_WDAY; + + while (_tim < 0) { + // Work backwards + + --__result->tm_year; + + // Check for a leap year. + if (cyg_libc_time_year_is_leap(1900 + __result->tm_year)) { + _tim += CYGNUM_LIBC_TIME_SECSPERLEAPYEAR; + __result->tm_wday -= 366; + } // if + else { + _tim += CYGNUM_LIBC_TIME_SECSPERYEAR; + __result->tm_wday -= 365; + } // else + + } // while + + while (_tim >= CYGNUM_LIBC_TIME_SECSPERYEAR) { + // Work forwards + + if (cyg_libc_time_year_is_leap(1900 + __result->tm_year)) { + + // But if this is a leap year, its possible that we are in the + // middle of the last "extra" day + if (_tim < CYGNUM_LIBC_TIME_SECSPERLEAPYEAR) + break; + + _tim -= CYGNUM_LIBC_TIME_SECSPERLEAPYEAR; + __result->tm_wday += 366; + } // if + else { + _tim -= CYGNUM_LIBC_TIME_SECSPERYEAR; + __result->tm_wday += 365; + } + ++__result->tm_year; + } // while + + // Day of the year. We know _tim is +ve now + CYG_ASSERT(_tim >= 0, + "Number of seconds since start of year is negative!"); + // assign tm_mday as well for further below + __result->tm_mday = __result->tm_yday = _tim / CYGNUM_LIBC_TIME_SECSPERDAY; + + // Day of the week. Normalize to be 0..6, and note that it might + // be negative, so we have to deal with the modulus being + // implementation-defined for -ve numbers (ISO C 6.3.5) + __result->tm_wday = (((__result->tm_wday + __result->tm_yday)%7)+7)%7; + + // Month and Day of the month + + _months_p = cyg_libc_time_month_lengths[ + cyg_libc_time_year_is_leap(1900 + __result->tm_year)]; + + for (__result->tm_mon = 0; + __result->tm_mday > _months_p[__result->tm_mon]; + ++__result->tm_mon) { + + __result->tm_mday -= _months_p[__result->tm_mon]; + + } // for + + // The month day is now in the range 0..30 + // We move it to 1..31 + ++__result->tm_mday; + + _tim -= __result->tm_yday*CYGNUM_LIBC_TIME_SECSPERDAY; + + // hours, mins secs + __result->tm_hour = (int) (_tim / 3600); + _tim %= 3600; + __result->tm_min = (int) (_tim / 60); + __result->tm_sec = (int) (_tim % 60); + + __result->tm_isdst = 0; // gmtime always returns non-DST + + CYG_REPORT_RETVAL(__result); + + return __result; +} // __gmtime_r() + +# ifdef CYGFUN_LIBC_TIME_POSIX +# define gmtime_r(__timer, __result) __gmtime_r(__timer, __result) +# endif + +#else + +extern struct tm * +__gmtime_r( const time_t *__timer, struct tm *__result ); + +#endif // ifdef CYGIMP_LIBC_TIME_GMTIME_R_INLINE + +/////////////////////////////////// +// localtime_r() - POSIX.1 8.3.7 // +/////////////////////////////////// +// +// This converts a time_t into a struct tm expressed in local time, and +// stores the result in the space occupied by __result +// + +#ifdef CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE + +#include // for cyg_libc_time_normalize_structtm() + +CYGPRI_LIBC_TIME_LOCALTIME_R_INLINE struct tm * +__localtime_r( const time_t *__timer, struct tm *__result ) +{ + time_t __stdoffset, __dstoffset; + CYG_REPORT_FUNCNAMETYPE("__localtime_r", "returning %08x"); + CYG_CHECK_DATA_PTR(__timer, "__timer is not a valid pointer!"); + CYG_CHECK_DATA_PTR(__result, "__result is not a valid pointer!"); + CYG_REPORT_FUNCARG2("*__timer=%d, __result is at %08x", + *__timer, __result); + + __gmtime_r(__timer, __result); + + // Adjust for STD/DST + __result->tm_isdst = cyg_libc_time_getzoneoffsets(&__stdoffset, + &__dstoffset); + + if (__result->tm_isdst == 0) { // STD + __result->tm_sec += __stdoffset; + cyg_libc_time_normalize_structtm( __result ); + } // if + else if (__result->tm_isdst > 0) { // DST + __result->tm_sec += __dstoffset; + cyg_libc_time_normalize_structtm( __result ); + } // if + // Don't do anything for tm_isdst == -1 + + CYG_REPORT_RETVAL(__result); + + return __result; +} // __localtime_r() + +# ifdef CYGFUN_LIBC_TIME_POSIX +# define localtime_r(__timer, __result) __localtime_r(__timer, __result) +# endif + +#else + +extern struct tm * +__localtime_r( const time_t *__timer, struct tm *__result ); + +#endif // ifdef CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE + +/////////////////////////////// +// ctime_r() - POSIX.1 8.3.5 // +/////////////////////////////// +// +// This returns the equivalent of ctime() but writes to __buf +// to store the returned string +// + +#ifdef CYGIMP_LIBC_TIME_CTIME_R_INLINE + +CYGPRI_LIBC_TIME_CTIME_R_INLINE char * +__ctime_r( const time_t *__timer, char *__buf ) +{ + struct tm _mytm; + + CYG_REPORT_FUNCNAMETYPE("__ctime_r", "returning \"%s\""); + + CYG_CHECK_DATA_PTR(__timer, "__timer is not a valid pointer!"); + CYG_CHECK_DATA_PTR(__buf, "__buf is not a valid pointer!"); + + CYG_REPORT_FUNCARG2("*__timer = %d, __buf=%08x", *__timer, __buf); + + __localtime_r( __timer, &_mytm ); + + __asctime_r(&_mytm, __buf); + + CYG_REPORT_RETVAL(__buf); + + return __buf; +} // __ctime_r() + +# ifdef CYGFUN_LIBC_TIME_POSIX +# define ctime_r(__timer, __buf) __ctime_r(__timer, __buf) +# endif + +#else + +extern char * +__ctime_r( const time_t *__timer, char *__buf ); + +#endif // ifdef CYGIMP_LIBC_TIME_CTIME_R_INLINE + +//=========================================================================== +// +// ISO C functions + +// Time manipulation functions - ISO C 7.12.2 + +///////////////////////////////// +// difftime() - ISO C 7.12.2.2 // +///////////////////////////////// +// +// This returns (__time1 - __time0) in seconds +// + +#ifdef CYGIMP_LIBC_TIME_DIFFTIME_INLINE + +CYGPRI_LIBC_TIME_DIFFTIME_INLINE double +__difftime( time_t __time1, time_t __time0 ) +{ + double _ret; + + CYG_REPORT_FUNCNAMETYPE("__difftime", "returning %f"); + CYG_REPORT_FUNCARG2("__time1=%d, __time0=%d", __time1, __time0); + + _ret = (double)(__time1 - __time0); + + CYG_REPORT_RETVAL(_ret); + + return _ret; +} // __difftime() + +# define difftime(__time1, __time0) __difftime(__time1, __time0) + +#else + +extern double +__difftime( time_t __time1, time_t __time0 ); + +#endif // ifdef CYGIMP_LIBC_TIME_DIFFTIME_INLINE + +/////////////////////////////// +// mktime() - ISO C 7.12.2.3 // +/////////////////////////////// +// +// This converts a "struct tm" to a "time_t" +// + +#ifdef CYGIMP_LIBC_TIME_MKTIME_INLINE + +#include // for cyg_libc_time_normalize_structtm() + // and cyg_libc_time_month_lengths + +CYGPRI_LIBC_TIME_MKTIME_INLINE time_t +__mktime( struct tm *__timeptr ) +{ + time_t _ret; + cyg_count16 _i; + cyg_count32 _daycount; + cyg_bool _leap; + + CYG_REPORT_FUNCNAMETYPE("__mktime", "returning %d"); + CYG_REPORT_FUNCARG1( "__timeptr is at address %08x", __timeptr); + + CYG_CHECK_DATA_PTR(__timeptr, "__timeptr is not a valid pointer!"); + + // First deal with STD/DST. If tm_isdst==-1 (the "autodetect" value) + // we assume its already in UTC. FIXME: is this correct behaviour? Hmm.... + +#if 0 +// FIXME: This doesn't seem to be the way to go + if (__timeptr->tm_isdst == 0) { // STD + // take _off_ the std offset to get us back to UTC from localtime + __timeptr->tm_sec -= (int)cyg_libc_time_current_std_offset; + } // if + else if (__timeptr->tm_isdst > 0) { // DST + // take _off_ the dst offset to get us back to UTC from localtime + __timeptr->tm_sec -= (int)cyg_libc_time_current_dst_offset; + } // if +#endif + + cyg_libc_time_normalize_structtm(__timeptr); + + // check if a time_t can hold the year. FIXME: we assume it is + // 32 bits which gives the year range 1902 - 2038 + if ( (__timeptr->tm_year <= 2) || (__timeptr->tm_year >= 138) ) { + CYG_REPORT_RETVAL(-1); + return (time_t)-1; + } + + // fill in the rest of the struct tm i.e. tm_wday and tm_yday + + _leap = cyg_libc_time_year_is_leap(1900 + __timeptr->tm_year); + + for (_i=0, _daycount=0; _i<12; ++_i) { + if (_i == __timeptr->tm_mon) { + _daycount += __timeptr->tm_mday - 1; + break; + } // if + else { + _daycount += cyg_libc_time_month_lengths[_leap][_i]; + } // else + } // for + + CYG_ASSERT(_i<12, "Reached end of year. __timeptr->tm_mon must be bad"); + + __timeptr->tm_yday = _daycount; + + // now tm_wday + + if (__timeptr->tm_year > 70) { + for (_i=70; _i < __timeptr->tm_year; ++_i) + _daycount += (cyg_libc_time_year_is_leap(1900 + _i) ? 366 : 365); + } // if + else if (__timeptr->tm_year < 70) { + for (_i=70; _i > __timeptr->tm_year; --_i) + _daycount -= (cyg_libc_time_year_is_leap(1900 + _i-1) ? 366 : 365); + } // else if + + __timeptr->tm_wday = (_daycount + CYGNUM_LIBC_TIME_EPOCH_WDAY) % 7; + + // if _daycount was negative, on some targets the modulo operator will + // return negative, so we adjust for that + + if (__timeptr->tm_wday < 0) + __timeptr->tm_wday += 7; + + // now finally work out return value + + _ret = __timeptr->tm_sec + 60*__timeptr->tm_min + 60*60*__timeptr->tm_hour; + _ret += _daycount*24*60*60; + + CYG_REPORT_RETVAL(_ret); + + return _ret; +} // __mktime() + +# define mktime(__timeptr) __mktime(__timeptr) + +#else + +extern time_t +__mktime( struct tm *__timeptr ); + +#endif // ifdef CYGIMP_LIBC_TIME_MKTIME_INLINE + +// Time conversion functions - ISO C 7.12.3 + +//////////////////////////////// +// asctime() - ISO C 7.12.3.1 // +//////////////////////////////// +// +// This returns a textual representation of a struct tm +// + +#ifdef CYGIMP_LIBC_TIME_ASCTIME_INLINE + +extern char cyg_libc_time_asctime_buf[]; + +CYGPRI_LIBC_TIME_ASCTIME_INLINE char * +__asctime( const struct tm *__timeptr ) +{ + CYG_REPORT_FUNCNAMETYPE("__asctime", "returning \"%s\""); + CYG_REPORT_FUNCARG1("__timeptr = %08x", __timeptr); + + // paranoia + CYG_CHECK_DATA_PTR(__timeptr, "__timeptr is not a valid pointer!"); + + (void)__asctime_r( __timeptr, cyg_libc_time_asctime_buf ); + + CYG_REPORT_RETVAL(cyg_libc_time_asctime_buf); + + return cyg_libc_time_asctime_buf; +} // __asctime() + +# define asctime(__timeptr) __asctime(__timeptr) + +#else + +extern char * +__asctime( const struct tm *__timeptr ); + +#endif // ifdef CYGIMP_LIBC_TIME_ASCTIME_INLINE + +/////////////////////////////// +// gmtime() - ISO C 7.12.3.3 // +/////////////////////////////// +// +// This converts a time_t into a struct tm expressed in UTC +// + +#ifdef CYGIMP_LIBC_TIME_GMTIME_INLINE + +extern struct tm cyg_libc_time_gmtime_buf; + +CYGPRI_LIBC_TIME_GMTIME_INLINE struct tm * +__gmtime( const time_t *__timer ) +{ + CYG_REPORT_FUNCNAMETYPE("__gmtime", "returning %08x"); + CYG_CHECK_DATA_PTR(__timer, "__timer is not a valid pointer!"); + CYG_REPORT_FUNCARG1("*__timer=%d", *__timer); + + __gmtime_r(__timer, &cyg_libc_time_gmtime_buf); + + CYG_REPORT_RETVAL(&cyg_libc_time_gmtime_buf); + + return &cyg_libc_time_gmtime_buf; +} // __gmtime() + +# define gmtime(__timer) __gmtime(__timer) + +#else + +extern struct tm * +__gmtime( const time_t *__timer); + +#endif // ifdef CYGIMP_LIBC_TIME_GMTIME_INLINE + +////////////////////////////////// +// localtime() - ISO C 7.12.3.4 // +////////////////////////////////// +// +// This converts a time_t into a struct tm expressed in local time +// + +#ifdef CYGIMP_LIBC_TIME_LOCALTIME_INLINE + +extern struct tm cyg_libc_time_localtime_buf; + +CYGPRI_LIBC_TIME_LOCALTIME_INLINE struct tm * +__localtime( const time_t *__timer ) +{ + CYG_REPORT_FUNCNAMETYPE("__localtime", "returning %08x"); + CYG_CHECK_DATA_PTR(__timer, "__timer is not a valid pointer!"); + CYG_REPORT_FUNCARG1("*__timer=%d", *__timer); + + __localtime_r(__timer, &cyg_libc_time_localtime_buf); + + CYG_REPORT_RETVAL(&cyg_libc_time_localtime_buf); + + return &cyg_libc_time_localtime_buf; +} // __localtime() + +# define localtime(__timer) __localtime(__timer) + +#else + +extern struct tm * +__localtime( const time_t *__timer ); + +#endif // ifdef CYGIMP_LIBC_TIME_LOCALTIME_INLINE + +////////////////////////////// +// ctime() - ISO C 7.12.3.2 // +////////////////////////////// +// +// This returns asctime(localtime(__timeptr)) +// + +#ifdef CYGIMP_LIBC_TIME_CTIME_INLINE + +CYGPRI_LIBC_TIME_CTIME_INLINE char * +__ctime( const time_t *__timer ) +{ + char *_str; + + CYG_REPORT_FUNCNAMETYPE("__ctime", "returning \"%s\""); + CYG_CHECK_DATA_PTR( __timer, "__timer is not a valid pointer!"); + CYG_REPORT_FUNCARG1("*__timer = %d", *__timer); + + _str = __asctime(__localtime(__timer)); + + CYG_REPORT_RETVAL(_str); + + return _str; +} // __ctime() + +# define ctime(__timer) __ctime(__timer) + +#else + +extern char * +__ctime( const time_t *__timer ); + +#endif // ifdef CYGIMP_LIBC_TIME_CTIME_INLINE + + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // CYGONCE_LIBC_TIME_INL multiple inclusion protection + +// EOF time.inl diff --git a/packages/language/c/libc/current/src/PKGconf.mak b/packages/language/c/libc/current/src/PKGconf.mak --- a/packages/language/c/libc/current/src/PKGconf.mak +++ b/packages/language/c/libc/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -30,59 +30,76 @@ PACKAGE := libc include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak LIBRARY := libtarget.a -COMPILE := ctype/isalnum.cxx ctype/isalpha.cxx ctype/iscntrl.cxx \ - ctype/isdigit.cxx ctype/isgraph.cxx ctype/islower.cxx \ - ctype/isprint.cxx ctype/ispunct.cxx ctype/isspace.cxx \ - ctype/isupper.cxx ctype/isxdigit.cxx ctype/tolower.cxx \ - ctype/toupper.cxx \ - \ - errno/errno.cxx \ - \ - i18n/locale.cxx \ - \ - setjmp/longjmp.cxx \ - \ - stdio/common/fclose.cxx stdio/common/fflush.cxx \ - stdio/common/fopen.cxx stdio/common/freopen.cxx \ - stdio/common/setvbuf.cxx stdio/common/snprintf.cxx \ - stdio/common/sprintf.cxx stdio/common/sscanf.cxx \ - stdio/common/stdioinlines.cxx stdio/common/stdiosupp.cxx \ - stdio/common/stream.cxx stdio/common/streambuf.cxx \ - stdio/common/ungetc.cxx stdio/common/vsnprintf.cxx \ - stdio/common/vsscanf.cxx stdio/input/fgetc.cxx \ - stdio/input/fgets.cxx stdio/input/fread.cxx \ - stdio/input/fscanf.cxx stdio/input/gets.cxx \ - stdio/input/scanf.cxx stdio/input/vfscanf.cxx \ - stdio/output/fnprintf.cxx stdio/output/fprintf.cxx \ - stdio/output/fputc.cxx stdio/output/fputs.cxx \ - stdio/output/fwrite.cxx stdio/output/printf.cxx \ - stdio/output/vfnprintf.cxx \ - \ - stdlib/_exit.cxx stdlib/abort.cxx stdlib/abs.cxx \ - stdlib/atexit.cxx stdlib/atof.cxx stdlib/atoi.cxx \ - stdlib/atol.cxx stdlib/bsearch.cxx stdlib/div.cxx \ - stdlib/exit.cxx stdlib/getenv.cxx stdlib/labs.cxx \ - stdlib/ldiv.cxx stdlib/malloc.cxx stdlib/qsort.cxx \ - stdlib/rand.cxx stdlib/strtod.cxx stdlib/strtol.cxx \ - stdlib/strtoul.cxx \ - \ - string/memchr.cxx string/memcmp.cxx string/memmove.cxx \ - string/strcat.cxx string/strchr.cxx string/strcmp.cxx \ - string/strcoll.cxx string/strcpy.cxx string/strcspn.cxx \ - string/strlen.cxx string/strncat.cxx string/strncmp.cxx \ - string/strncpy.cxx string/strpbrk.cxx string/strrchr.cxx \ - string/strspn.cxx string/strstr.cxx string/strsuppt.cxx\ - string/strtok.cxx string/strxfrm.cxx \ - \ - support/clibdata.cxx support/cstartup.cxx \ - \ - time/clock.cxx +COMPILE := ctype/isalnum.cxx ctype/isalpha.cxx ctype/iscntrl.cxx \ + ctype/isdigit.cxx ctype/isgraph.cxx ctype/islower.cxx \ + ctype/isprint.cxx ctype/ispunct.cxx ctype/isspace.cxx \ + ctype/isupper.cxx ctype/isxdigit.cxx ctype/tolower.cxx \ + ctype/toupper.cxx \ + \ + errno/errno.cxx \ + \ + i18n/locale.cxx \ + \ + setjmp/longjmp.cxx \ + \ + signal/raise.cxx signal/siginit.cxx \ + signal/signal.cxx \ + \ + stdio/common/fclose.cxx stdio/common/fflush.cxx \ + stdio/common/fopen.cxx stdio/common/freopen.cxx \ + stdio/common/setvbuf.cxx stdio/common/snprintf.cxx \ + stdio/common/sprintf.cxx stdio/common/sscanf.cxx \ + stdio/common/stderr.cxx stdio/common/stdin.cxx \ + stdio/common/stdiofiles.cxx \ + stdio/common/stdioinlines.cxx stdio/common/stdiosupp.cxx \ + stdio/common/stdout.cxx stdio/common/stream.cxx \ + stdio/common/streambuf.cxx stdio/common/ungetc.cxx \ + stdio/common/vsnprintf.cxx stdio/common/vsscanf.cxx \ + stdio/input/fgetc.cxx stdio/input/fgets.cxx \ + stdio/input/fread.cxx stdio/input/fscanf.cxx \ + stdio/input/gets.cxx stdio/input/scanf.cxx \ + stdio/input/vfscanf.cxx stdio/output/fnprintf.cxx \ + stdio/output/fprintf.cxx stdio/output/fputc.cxx \ + stdio/output/fputs.cxx stdio/output/fwrite.cxx \ + stdio/output/printf.cxx stdio/output/vfnprintf.cxx \ + \ + stdlib/_exit.cxx stdlib/abort.cxx stdlib/abs.cxx \ + stdlib/atexit.cxx stdlib/atof.cxx stdlib/atoi.cxx \ + stdlib/atol.cxx stdlib/bsearch.cxx stdlib/div.cxx \ + stdlib/exit.cxx stdlib/getenv.cxx stdlib/itoa.cxx \ + stdlib/labs.cxx stdlib/ldiv.cxx stdlib/malloc.cxx \ + stdlib/qsort.cxx stdlib/rand.cxx stdlib/strtod.cxx \ + stdlib/strtol.cxx stdlib/strtoul.cxx stdlib/system.cxx \ + \ + string/memchr.cxx string/memcmp.cxx string/memmove.cxx \ + string/strcat.cxx string/strchr.cxx string/strcmp.cxx \ + string/strcoll.cxx string/strcpy.cxx string/strcspn.cxx \ + string/strlen.cxx string/strncat.cxx string/strncmp.cxx \ + string/strncpy.cxx string/strpbrk.cxx string/strrchr.cxx \ + string/strspn.cxx string/strstr.cxx string/strsuppt.cxx \ + string/strtok.cxx string/strxfrm.cxx \ + \ + support/cstartup.cxx support/environ.cxx \ + support/invokemain.cxx support/main.cxx \ + support/mainthread.cxx \ + \ + time/asctime.cxx time/asctime_r.cxx time/clock.cxx \ + time/ctime.cxx time/ctime_r.cxx time/difftime.cxx \ + time/gmtime.cxx time/gmtime_r.cxx time/localtime.cxx \ + time/localtime_r.cxx time/mktime.cxx time/settime.cxx \ + time/strftime.cxx time/time.cxx time/timeutil.cxx OTHER_OBJS := OTHER_TARGETS := OTHER_CLEAN := +ifdef CYG_HAL_ARM +# Special options +vfscanf.cxx-CXXFLAGS = -g0 +endif + include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/language/c/libc/current/src/clibincl/clibdata.hxx b/packages/language/c/libc/current/src/clibincl/clibdata.hxx deleted file mode 100644 --- a/packages/language/c/libc/current/src/clibincl/clibdata.hxx +++ /dev/null @@ -1,235 +0,0 @@ -#ifndef CYGONCE_LIBC_CLIBINCL_CLIBDATA_HXX -#define CYGONCE_LIBC_CLIBINCL_CLIBDATA_HXX -//======================================================================== -// -// clibdata.hxx -// -// C library internal data - held in one place to make thread support -// easier -// -//======================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//======================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: #include "clibincl/clibdata.hxx" -// -//####DESCRIPTIONEND#### -// -//======================================================================== - -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -#include // Common project-wide type definitions -#include // For errno type - -#ifdef CYGSEM_LIBC_THREAD_SAFETY -# include // Kernel thread support -# include // and inline functions -#endif - -#ifdef CYGPKG_LIBC_STDIO -# include "clibincl/stdiosupp.hxx" // _fopen() declarations -# include "clibincl/stream.hxx" // Cyg_StdioStream internal class -#endif - -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS -# include -#endif - - -// TYPE DEFINITIONS - -class Cyg_CLibInternalData -{ -#ifdef CYGPKG_LIBC_STDIO - // allow fopen only to access the files - friend FILE *_fopen( const char *filename, const char *mode ); - friend int _fclose( FILE *stream ); -#endif - -private: - -#ifdef CYGPKG_LIBC_STDIO - // the streams are separated for compatibility with newlib - - static // Make the following members static - Cyg_StdioStream *stdin, *stdout, *stderr; // default I/O streams - - - // List of open files - static // Make the following member static (and initialises to NULL) - Cyg_StdioStream *files[FOPEN_MAX - 3]; // subtract 3 for stdin, stdout, - // and stderr -# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - // lock for the above - static - Cyg_Mutex files_lock; -# endif - -#endif // ifdef CYGPKG_LIBC_STDIO - - -# ifdef CYGSEM_LIBC_PER_THREAD_ERRNO - Cyg_ErrNo safe_errno; -# endif // ifdef CYGSEM_LIBC_PER_THREAD_ERRNO - - -#ifdef CYGFUN_LIBC_strtok -# ifndef CYGSEM_LIBC_PER_THREAD_STRTOK - static // Make the following member static -# endif - // last saved position of strtok() - char *strtok_last; -#endif // ifdef CYGFUN_LIBC_strtok - - -#ifdef CYGPKG_LIBC_RAND - - typedef cyg_ucount32 Cyg_rand_seed_t; - -# ifndef CYGSEM_LIBC_PER_THREAD_RAND - static // Make the following member static -# endif - // random seed to be used with rand() - Cyg_rand_seed_t rand_seed; -#endif // ifdef CYGPKG_LIBC_RAND - - -public: - - // Normal constructor - Cyg_CLibInternalData( void ); - - // same as above but allows the constructor to be invoked explicitly - // when needed, when it wouldn't otherwise be invoked - void - construct( void ); - -#ifdef CYGFUN_LIBC_strtok - char ** - get_strtok_last_p( void ); -#endif - -#ifdef CYGPKG_LIBC_RAND - Cyg_rand_seed_t * - get_rand_seed_p( void ); -#endif - -#ifdef CYGPKG_LIBC_STDIO - static Cyg_StdioStream * - get_file_stream( cyg_ucount32 fd ); - - static void - set_file_stream( cyg_ucount32 fd, Cyg_StdioStream *stream ); - -#endif // ifdef CYGPKG_LIBC_STDIO - - Cyg_ErrNo * - get_errno_p( void ); - -}; // class Cyg_CLibInternalData - - -// MACROS - -// CYGPRI_LIBC_INTERNAL_DATA_PREAMBLE is used at the start of a function in -// case any "magic" at the start is required for this implementation to get -// at the data. Or in some cases, it may just be helpful for speed. -// -// CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE is used at the "upper" -// entry points to the C library, to ensure that the internal data is -// allocated. It also does what CYGPRI_LIBC_INTERNAL_DATA_PREAMBLE does. -// -// CYGPRI_LIBC_INTERNAL_DATA is used to get at the C library internal data, -// available when the above two macros have been invoked. -// -// These macros pollute the namespace of the functions they are invoked in, -// but these should only be used internally by the C library, so that is -// fine. - -#ifdef CYGSEM_LIBC_THREAD_SAFETY - -#define CYGPRI_LIBC_INTERNAL_DATA_PREAMBLE \ - Cyg_CLibInternalData *cyg_tsd_xxx = \ - ( (Cyg_CLibInternalData *)(Cyg_Thread::self()-> \ - get_data(CYGNUM_KERNEL_THREADS_DATA_LIBC)) ) - - -#define CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE \ - Cyg_Thread *cyg_self_xxx = Cyg_Thread::self(); \ - Cyg_CLibInternalData *cyg_tsd_xxx; \ - if ( cyg_self_xxx->get_data(CYGNUM_KERNEL_THREADS_DATA_LIBC) == 0 ) \ - { \ - cyg_tsd_xxx = (Cyg_CLibInternalData *)cyg_self_xxx-> \ - increment_stack_limit(sizeof(Cyg_CLibInternalData));\ - cyg_self_xxx->set_data( CYGNUM_KERNEL_THREADS_DATA_LIBC, \ - (CYG_ADDRWORD) cyg_tsd_xxx ); \ - cyg_tsd_xxx->construct(); \ - } \ - else \ - cyg_tsd_xxx = ( (Cyg_CLibInternalData *)(Cyg_Thread::self()-> \ - get_data(CYGNUM_KERNEL_THREADS_DATA_LIBC)) ) - - -#define CYGPRI_LIBC_INTERNAL_DATA (*cyg_tsd_xxx) - -#define CYGPRI_LIBC_INTERNAL_DATA_CHECK \ - CYG_ASSERT( Cyg_Thread::self()-> \ - get_data(CYGNUM_KERNEL_THREADS_DATA_LIBC) != 0, \ - "C library internal data has not been initialised!" ) - -#else // ifdef CYGSEM_LIBC_THREAD_SAFETY - -extern Cyg_CLibInternalData cyg_my_clib_internal_data; - -#define CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE CYG_EMPTY_STATEMENT - -#define CYGPRI_LIBC_INTERNAL_DATA_PREAMBLE CYG_EMPTY_STATEMENT - -#define CYGPRI_LIBC_INTERNAL_DATA cyg_my_clib_internal_data - -#define CYGPRI_LIBC_INTERNAL_DATA_CHECK CYG_EMPTY_STATEMENT - -#endif // ifdef CYGSEM_LIBC_THREAD_SAFETY - - -// Inline functions for this class -#include "clibincl/clibdata.inl" - - -#endif // ifdef CYGPKG_LIBC - -#endif // CYGONCE_LIBC_CLIBINCL_CLIBDATA_HXX multiple inclusion protection - -// EOF clibdata.hxx diff --git a/packages/language/c/libc/current/src/clibincl/clibdata.inl b/packages/language/c/libc/current/src/clibincl/clibdata.inl deleted file mode 100644 --- a/packages/language/c/libc/current/src/clibincl/clibdata.inl +++ /dev/null @@ -1,174 +0,0 @@ -#ifndef CYGONCE_LIBC_CLIBINCL_CLIBDATA_INL -#define CYGONCE_LIBC_CLIBINCL_CLIBDATA_INL -//=========================================================================== -// -// clibdata.inl -// -// Inline functions for C library internal data -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: Do not include this file directly. -// Instead #include "clibincl/clibdata.hxx" -// -//####DESCRIPTIONEND#### -// -//=========================================================================== - -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -#include // Common project-wide type definitions -#include // Assert interface -#include "clibincl/clibdata.hxx" // header for this file - just in case - -#ifdef CYGPKG_LIBC_STDIO -# include "clibincl/stream.hxx" // Cyg_StdioStream internal class -#endif - -#ifndef CYGSEM_LIBC_PER_THREAD_ERRNO -# include // for errno variable -#endif - - -// INLINE METHODS - -inline void -Cyg_CLibInternalData::construct( void ) -{ - -#ifdef CYGSEM_LIBC_PER_THREAD_ERRNO - // errno is initialised to 0 at program startup - ANSI 7.1.4 - safe_errno = 0; -#endif // ifdef CYGSEM_LIBC_PER_THREAD_ERRNO - - -#ifdef CYGPKG_LIBC_RAND - // Initialise seed for rand() - rand_seed = CYGNUM_LIBC_RAND_SEED; -#endif - -} // construct() - -inline -Cyg_CLibInternalData::Cyg_CLibInternalData( void ) -{ - construct(); -} // Cyg_CLibInternalData() constructor - - -#ifdef CYGFUN_LIBC_strtok -inline char ** -Cyg_CLibInternalData::get_strtok_last_p( void ) -{ - return &strtok_last; -} // get_strtok_last_p() -#endif - - - -#ifdef CYGPKG_LIBC_RAND -inline Cyg_CLibInternalData::Cyg_rand_seed_t * -Cyg_CLibInternalData::get_rand_seed_p( void ) -{ - return &rand_seed; -} // get_rand_seed_p() -#endif - - -#ifdef CYGPKG_LIBC_STDIO - -inline Cyg_StdioStream * -Cyg_CLibInternalData::get_file_stream( cyg_ucount32 fd ) -{ - CYG_PRECONDITION( (fd < FOPEN_MAX), - "Attempt to open larger file descriptor than FOPEN_MAX!" ); - - switch (fd) - { - case 0: - return stdin; - case 1: - return stdout; - case 2: - return stderr; - default: - return files[fd - 3]; // shift 3 for stdin/stdout/stderr - } // switch - -} // get_file_stream() - - -inline void -Cyg_CLibInternalData::set_file_stream( cyg_ucount32 fd, - Cyg_StdioStream *stream ) -{ - CYG_PRECONDITION( (fd < FOPEN_MAX), - "Attempt to set larger file descriptor than FOPEN_MAX!" ); - - switch (fd) - { - case 0: - stdin = stream; - break; - case 1: - stdout = stream; - break; - case 2: - stderr = stream; - break; - default: - files[fd - 3] = stream; // shift 3 for stdin/stdout/stderr - break; - } // switch -} // set_file_stream() - -#endif // ifdef CYGPKG_LIBC_STDIO - -inline Cyg_ErrNo * -Cyg_CLibInternalData::get_errno_p( void ) -{ -#ifdef CYGSEM_LIBC_PER_THREAD_ERRNO - return &safe_errno; -#else - return &errno; -#endif -} // get_errno_p() - -#endif // ifdef CYGPKG_LIBC - -#endif CYGONCE_LIBC_CLIBINCL_CLIBDATA_INL multiple inclusion protection - -// EOF clibdata.inl diff --git a/packages/language/c/libc/current/src/clibincl/ctypesupp.hxx b/packages/language/c/libc/current/src/clibincl/ctypesupp.hxx --- a/packages/language/c/libc/current/src/clibincl/ctypesupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/ctypesupp.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/clibincl/i18nsupp.hxx b/packages/language/c/libc/current/src/clibincl/i18nsupp.hxx --- a/packages/language/c/libc/current/src/clibincl/i18nsupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/i18nsupp.hxx @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.com -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/clibincl/setjmpsupp.hxx b/packages/language/c/libc/current/src/clibincl/setjmpsupp.hxx --- a/packages/language/c/libc/current/src/clibincl/setjmpsupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/setjmpsupp.hxx @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Header file to support ANSI standard non-local jumps as diff --git a/packages/language/c/libc/current/src/clibincl/stdiofiles.hxx b/packages/language/c/libc/current/src/clibincl/stdiofiles.hxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/clibincl/stdiofiles.hxx @@ -0,0 +1,110 @@ +#ifndef CYGONCE_LIBC_STDIOFILES_HXX +#define CYGONCE_LIBC_STDIOFILES_HXX +//======================================================================== +// +// stdiofiles.hxx +// +// ISO C library stdio central file access +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: +// Description: +// Usage: #include "clibincl/stdiosupp.hxx" +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_STDIO + +// INCLUDES + +#include // cyg_bool, cyg_ucount8, cyg_ucount16 +#include "clibincl/stream.hxx" // Cyg_StdioStream + +#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS +# include // mutexes +#endif + +// CLASSES + +class Cyg_libc_stdio_files +{ + // List of open files - global for now + static + Cyg_StdioStream *files[FOPEN_MAX]; + +# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + // lock for the above + static + Cyg_Mutex files_lock; +# endif + +public: + +# if FOPEN_MAX < 256 + typedef cyg_ucount8 fd_t; +# else + typedef cyg_ucount16 fd_t; +# endif + + static Cyg_StdioStream * + get_file_stream( fd_t fd ); + + static void + set_file_stream( fd_t fd, Cyg_StdioStream *stream ); + + + // the following functions lock(), trylock() and unlock() do nothing + // if we haven't got thread-safe streams + static cyg_bool + lock(void); + + static cyg_bool + trylock(void); + + static void + unlock(void); + +}; // class Cyg_libc_stdio_files + + +// Inline functions for this class +#include "clibincl/stdiofiles.inl" + +#endif // ifdef CYGPKG_LIBC_STDIO + +#endif // CYGONCE_LIBC_STDIOFILES_HXX multiple inclusion protection + +// EOF stdiofiles.hxx diff --git a/packages/language/c/libc/current/src/clibincl/stdiofiles.inl b/packages/language/c/libc/current/src/clibincl/stdiofiles.inl new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/clibincl/stdiofiles.inl @@ -0,0 +1,119 @@ +#ifndef CYGONCE_LIBC_STDIOFILES_INL +#define CYGONCE_LIBC_STDIOFILES_INL +//======================================================================== +// +// stdiofiles.inl +// +// ISO C library stdio central file inlines +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: +// Description: +// Usage: Do not include this file directly. Instead use: +// #include "clibincl/stdiosupp.hxx" +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_STDIO + +// INCLUDES + +#include // cyg_bool +#include // Assert interface +#include "clibincl/stdiofiles.hxx" // header for this file +#include "clibincl/stream.hxx" // Cyg_StdioStream + +#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS +# include // mutexes +#endif + +// INLINE METHODS + +inline Cyg_StdioStream * +Cyg_libc_stdio_files::get_file_stream( fd_t fd ) +{ + CYG_PRECONDITION( (fd < FOPEN_MAX), + "Attempt to open larger file descriptor than FOPEN_MAX!" ); + + return files[fd]; + +} // Cyg_libc_stdio_files::get_file_stream() + +inline void +Cyg_libc_stdio_files::set_file_stream( fd_t fd, Cyg_StdioStream *stream ) +{ + CYG_PRECONDITION( (fd < FOPEN_MAX), + "Attempt to set larger file descriptor than FOPEN_MAX!" ); + + files[fd] = stream; + +} // Cyg_libc_stdio_files::set_file_stream() + + +inline cyg_bool +Cyg_libc_stdio_files::lock(void) +{ +# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + return files_lock.lock(); +# else + return true; +# endif +} // Cyg_libc_stdio_files::lock() + +inline cyg_bool +Cyg_libc_stdio_files::trylock(void) +{ +# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + return files_lock.trylock(); +# else + return true; +# endif +} // Cyg_libc_stdio_files::trylock() + +inline void +Cyg_libc_stdio_files::unlock(void) +{ +# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + files_lock.unlock(); +# endif +} // Cyg_libc_stdio_files::unlock() + + +#endif // ifdef CYGPKG_LIBC_STDIO + +#endif // CYGONCE_LIBC_STDIOFILES_INL multiple inclusion protection + +// EOF stdiofiles.inl diff --git a/packages/language/c/libc/current/src/clibincl/stdiosupp.hxx b/packages/language/c/libc/current/src/clibincl/stdiosupp.hxx --- a/packages/language/c/libc/current/src/clibincl/stdiosupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/stdiosupp.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -55,8 +55,9 @@ #include // NULL and size_t from compiler #include // va_list from compiler #include // Main standard I/O header -#include // Device table - +#include // Device table +#include "clibincl/stream.hxx" // Cyg_StdioStream +#include // Cyg_ErrNo // FUNCTION PROTOTYPES @@ -64,9 +65,11 @@ // Miscellaneous support functions -extern struct Cyg_Device_Table_t * +externC cyg_io_handle_t Cyg_libc_stdio_find_filename( const char *filename ); +externC Cyg_ErrNo +cyg_libc_stdio_flush_all_but( Cyg_StdioStream *not_this_stream ); //======================================================================== diff --git a/packages/language/c/libc/current/src/clibincl/stdlibsupp.hxx b/packages/language/c/libc/current/src/clibincl/stdlibsupp.hxx --- a/packages/language/c/libc/current/src/clibincl/stdlibsupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/stdlibsupp.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -128,21 +128,21 @@ externC void * // 7.10.4 Communication with the environment externC void -_abort( void ) CYGPRI_LIBC_NORETURN; +_abort( void ) CYGBLD_ATTRIB_NORET; externC int -_atexit( Cyg_atexit_fn_t /* func_to_register */ ); +_atexit( Cyg_libc_atexit_fn_t /* func_to_register */ ); // The "real" names for exit() and _exit() are different for obvious name // clash issues externC void -__libc_exit( int /* status */ ) CYGPRI_LIBC_NORETURN; +__libc_exit( int /* status */ ) CYGBLD_ATTRIB_NORET; // POSIX 1003.1 section 3.2.2 "Terminate a process" externC void -__libc__exit( int /* status */ ) CYGPRI_LIBC_NORETURN; +__libc__exit( int /* status */ ) CYGBLD_ATTRIB_NORET; externC char * _getenv( const char * /* name */ ); @@ -169,15 +169,9 @@ externC void externC int _abs( int /* val */ ); -externC div_t -_div( int /* numerator */, int /* denominator */ ); - externC long _labs( long /* val */ ); -externC ldiv_t -_ldiv( long /* numerator */, long /* denominator */ ); - //======================================================================== diff --git a/packages/language/c/libc/current/src/clibincl/stream.hxx b/packages/language/c/libc/current/src/clibincl/stream.hxx --- a/packages/language/c/libc/current/src/clibincl/stream.hxx +++ b/packages/language/c/libc/current/src/clibincl/stream.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -53,19 +53,26 @@ // INCLUDES #include // Common project-wide type definitions +#include // Get assertion macros, as appropriate #include // Cyg_ErrNo #include // fpos_t and IOBUF defines #include "clibincl/streambuf.hxx" // Stdio stream file buffers -#include "clibincl/stdiosupp.hxx" // for _setvbuf() -#include // Device table for Cyg_Device_Table_t +#include // General I/O support #ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS +#include #include // Cyg_Mutex #endif +// FUNCTION PROTOTYPES + +// can't get this from stdiosupp.hxx due to potential header recursion +externC int +_setvbuf( FILE * /* stream */, char * /* buffer */, int /* mode */, + size_t /* size */ ); + // TYPE DEFINITIONS - class Cyg_StdioStream { friend int _setvbuf( FILE *, char *, int, size_t ); @@ -76,7 +83,7 @@ private: Cyg_ErrNo error; - struct Cyg_Device_Table_t *my_device; + cyg_io_handle_t my_device; #ifdef CYGFUN_LIBC_STDIO_ungetc cyg_uint8 unread_char_buf; @@ -139,9 +146,6 @@ private: cyg_ucount32 magic_validity_word; #endif - // do not permit a copy constructor (yet) - Cyg_StdioStream( const Cyg_StdioStream & ); - public: // different modes when constructing (i.e. opening). typedef enum { @@ -179,9 +183,9 @@ public: // The "return code" is set by assignment to the error member of this // stream - use the get_error() method to check - Cyg_StdioStream( Cyg_Device_Table_t *dev, OpenMode open_mode, + Cyg_StdioStream( cyg_io_handle_t dev, OpenMode open_mode, cyg_bool append, cyg_bool binary, int buffer_mode, - cyg_ucount32 buffer_size=BUFSIZE, + cyg_ucount32 buffer_size=BUFSIZ, cyg_uint8 *buffer_addr=NULL ); // DESTRUCTOR diff --git a/packages/language/c/libc/current/src/clibincl/stream.inl b/packages/language/c/libc/current/src/clibincl/stream.inl --- a/packages/language/c/libc/current/src/clibincl/stream.inl +++ b/packages/language/c/libc/current/src/clibincl/stream.inl @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -62,7 +62,7 @@ #ifdef CYGDBG_USE_ASSERTS inline bool -Cyg_StdioStream::check_this( cyg_assert_class_zeal zeal ) +Cyg_StdioStream::check_this( cyg_assert_class_zeal zeal ) const { // check that it has the magic word set meaning it is valid. if ( magic_validity_word != 0x7b4321ce ) @@ -131,9 +131,8 @@ Cyg_StdioStream::~Cyg_StdioStream() flush_output_unlocked(); - if (my_device->close) { - (*my_device->close)( my_device->cookie ); // @@@ discard error? - } // if + // Currently there is no I/O function defined for "close" + // Add such a call if this is ever defined. unlock_me(); @@ -282,6 +281,8 @@ Cyg_StdioStream::set_error( Cyg_ErrNo er } // if errno = error = errno_to_set; + + unlock_me(); } // set_error() diff --git a/packages/language/c/libc/current/src/clibincl/streambuf.hxx b/packages/language/c/libc/current/src/clibincl/streambuf.hxx --- a/packages/language/c/libc/current/src/clibincl/streambuf.hxx +++ b/packages/language/c/libc/current/src/clibincl/streambuf.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: This file implements the buffer class used by Cyg_StdioStream @@ -72,7 +72,7 @@ private: cyg_bool call_free; // should we free the old buffer if set_buffer is // called? #else - cyg_uint8 buffer_bottom[BUFSIZE]; + cyg_uint8 buffer_bottom[BUFSIZ]; #endif cyg_ucount32 buffer_size; @@ -81,9 +81,6 @@ private: cyg_uint8 *current_buffer_position; - // do not permit a copy constructor - Cyg_StdioStreamBuffer( const Cyg_StdioStreamBuffer & ); - public: // CONSTRUCTORS @@ -91,7 +88,7 @@ public: // You can change the size, or even supply your own buffer, although // this only has an effect with dynamic buffers. Otherwise it is // silently ignored - Cyg_StdioStreamBuffer( cyg_ucount32 size=BUFSIZE, + Cyg_StdioStreamBuffer( cyg_ucount32 size=BUFSIZ, cyg_uint8 *new_buffer=NULL ); @@ -105,7 +102,7 @@ public: // only has an effect with dynamic buffers, although EINVAL is returned // in that case. ENOMEM may also be returned Cyg_ErrNo - set_buffer( cyg_ucount32 size=BUFSIZE, cyg_uint8 *new_buffer=NULL ); + set_buffer( cyg_ucount32 size=BUFSIZ, cyg_uint8 *new_buffer=NULL ); // Find out how much buffer space is in use cyg_ucount32 diff --git a/packages/language/c/libc/current/src/clibincl/streambuf.inl b/packages/language/c/libc/current/src/clibincl/streambuf.inl --- a/packages/language/c/libc/current/src/clibincl/streambuf.inl +++ b/packages/language/c/libc/current/src/clibincl/streambuf.inl @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -64,7 +64,7 @@ // FUNCTIONS inline -Cyg_StdioStreamBuffer::Cyg_StdioStreamBuffer( cyg_ucount32 size=BUFSIZE, +Cyg_StdioStreamBuffer::Cyg_StdioStreamBuffer( cyg_ucount32 size=BUFSIZ, cyg_uint8 *new_buffer=NULL ) : #ifdef CYGSEM_LIBC_STDIO_DYNAMIC_SETVBUF buffer_bottom( NULL ), diff --git a/packages/language/c/libc/current/src/clibincl/stringsupp.hxx b/packages/language/c/libc/current/src/clibincl/stringsupp.hxx --- a/packages/language/c/libc/current/src/clibincl/stringsupp.hxx +++ b/packages/language/c/libc/current/src/clibincl/stringsupp.hxx @@ -24,7 +24,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/clibincl/timesupp.hxx b/packages/language/c/libc/current/src/clibincl/timesupp.hxx deleted file mode 100644 --- a/packages/language/c/libc/current/src/clibincl/timesupp.hxx +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef CYGONCE_LIBC_CLIBINCL_TIMESUPP_HXX -#define CYGONCE_LIBC_CLIBINCL_TIMESUPP_HXX -//=========================================================================== -// -// timesupp.hxx -// -// Support for the ANSI standard time functions -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: -// -//####DESCRIPTIONEND#### -// -//=========================================================================== - -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -// INCLUDES - -#include // Common type definitions - -// FUNCTION PROTOTYPES - -// These are function prototypes for the aliased functions that actually -// implement the time functions - -//=========================================================================== - -// 7.12.2 Time manipulation functions - -externC clock_t -_clock( void ); - - -#endif // ifdef CYGPKG_LIBC - -#endif // CYGONCE_LIBC_CLIBINCL_TIMESUPP_HXX multiple inclusion protection - -// EOF timesupp.hxx diff --git a/packages/language/c/libc/current/src/ctype/isalnum.cxx b/packages/language/c/libc/current/src/ctype/isalnum.cxx --- a/packages/language/c/libc/current/src/ctype/isalnum.cxx +++ b/packages/language/c/libc/current/src/ctype/isalnum.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isalpha.cxx b/packages/language/c/libc/current/src/ctype/isalpha.cxx --- a/packages/language/c/libc/current/src/ctype/isalpha.cxx +++ b/packages/language/c/libc/current/src/ctype/isalpha.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/iscntrl.cxx b/packages/language/c/libc/current/src/ctype/iscntrl.cxx --- a/packages/language/c/libc/current/src/ctype/iscntrl.cxx +++ b/packages/language/c/libc/current/src/ctype/iscntrl.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isdigit.cxx b/packages/language/c/libc/current/src/ctype/isdigit.cxx --- a/packages/language/c/libc/current/src/ctype/isdigit.cxx +++ b/packages/language/c/libc/current/src/ctype/isdigit.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isgraph.cxx b/packages/language/c/libc/current/src/ctype/isgraph.cxx --- a/packages/language/c/libc/current/src/ctype/isgraph.cxx +++ b/packages/language/c/libc/current/src/ctype/isgraph.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/islower.cxx b/packages/language/c/libc/current/src/ctype/islower.cxx --- a/packages/language/c/libc/current/src/ctype/islower.cxx +++ b/packages/language/c/libc/current/src/ctype/islower.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isprint.cxx b/packages/language/c/libc/current/src/ctype/isprint.cxx --- a/packages/language/c/libc/current/src/ctype/isprint.cxx +++ b/packages/language/c/libc/current/src/ctype/isprint.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/ispunct.cxx b/packages/language/c/libc/current/src/ctype/ispunct.cxx --- a/packages/language/c/libc/current/src/ctype/ispunct.cxx +++ b/packages/language/c/libc/current/src/ctype/ispunct.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isspace.cxx b/packages/language/c/libc/current/src/ctype/isspace.cxx --- a/packages/language/c/libc/current/src/ctype/isspace.cxx +++ b/packages/language/c/libc/current/src/ctype/isspace.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isupper.cxx b/packages/language/c/libc/current/src/ctype/isupper.cxx --- a/packages/language/c/libc/current/src/ctype/isupper.cxx +++ b/packages/language/c/libc/current/src/ctype/isupper.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/isxdigit.cxx b/packages/language/c/libc/current/src/ctype/isxdigit.cxx --- a/packages/language/c/libc/current/src/ctype/isxdigit.cxx +++ b/packages/language/c/libc/current/src/ctype/isxdigit.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/tolower.cxx b/packages/language/c/libc/current/src/ctype/tolower.cxx --- a/packages/language/c/libc/current/src/ctype/tolower.cxx +++ b/packages/language/c/libc/current/src/ctype/tolower.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/ctype/toupper.cxx b/packages/language/c/libc/current/src/ctype/toupper.cxx --- a/packages/language/c/libc/current/src/ctype/toupper.cxx +++ b/packages/language/c/libc/current/src/ctype/toupper.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/errno/errno.cxx b/packages/language/c/libc/current/src/errno/errno.cxx --- a/packages/language/c/libc/current/src/errno/errno.cxx +++ b/packages/language/c/libc/current/src/errno/errno.cxx @@ -22,18 +22,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-20 +// Purpose: Provide the errno variable +// Description: This file either provides the errno variable directly, +// or if thread-safe, using a kernel per-thread data +// access function // Usage: // //####DESCRIPTIONEND#### @@ -44,9 +46,6 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common project-wide type definitions @@ -54,7 +53,10 @@ #include // Header for this file #ifdef CYGSEM_LIBC_PER_THREAD_ERRNO -# include "clibincl/clibdata.hxx" // C library internal data +# include // kernel configuration +# include // per-thread data +# include // per-thread data +# include // mutexes #endif // GLOBAL VARIABLES @@ -73,22 +75,47 @@ static int errno_trace = CYGNUM_LIBC_ERR # define TL1 (0) # endif +// STATICS + +static cyg_ucount32 errno_data_index=CYGNUM_KERNEL_THREADS_DATA_MAX; +static Cyg_Mutex errno_data_mutex CYG_INIT_PRIORITY(LIBC); + // FUNCTIONS -Cyg_ErrNo * -cyg_get_errno_p( void ) +Cyg_ErrNo * const +cyg_libc_get_errno_p( void ) { Cyg_ErrNo *errno_p; - CYG_REPORT_FUNCNAMETYPE( "cyg_get_errno_p", "&errno is %d"); + CYG_REPORT_FUNCNAMETYPE( "cyg_libc_get_errno_p", "&errno is %d"); // set up the thread data, allocating if necessary (even though the // user _shouldn't_ read errno before its set, we can't stop them - and // ANSI prescribes it has a sensible value (0) before its set too anyway. - CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE; + Cyg_Thread *self = Cyg_Thread::self(); + + // Get a per-thread data slot if we haven't got one already + // Do a simple test before locking and retrying test, as this is a + // rare situation + if (CYGNUM_KERNEL_THREADS_DATA_MAX==errno_data_index) { + errno_data_mutex.lock(); + if (CYGNUM_KERNEL_THREADS_DATA_MAX==errno_data_index) { - errno_p = CYGPRI_LIBC_INTERNAL_DATA.get_errno_p(); + // the kernel just throws an assert if this doesn't work + // FIXME: Should use real CDL to pre-allocate a slot at compile + // time to ensure there are enough slots + errno_data_index = self->new_data_index(); + + // errno is initialised to 0 at program startup - ANSI 7.1.4 + self->set_data(errno_data_index, 0); + } + errno_data_mutex.unlock(); + } // if + + // we have a valid index now + + errno_p = (Cyg_ErrNo *)self->get_data_ptr(errno_data_index); CYG_TRACE1( TL1, "errno is %d", *errno_p ); @@ -96,11 +123,8 @@ cyg_get_errno_p( void ) // return the internal data's errno return errno_p; -} // cyg_get_errno_p() - +} // cyg_libc_get_errno_p() -#endif // ifndef CYGSEM_LIBC_PER_THREAD_ERRNO - -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#endif // ifdef CYGSEM_LIBC_PER_THREAD_ERRNO // EOF errno.cxx diff --git a/packages/language/c/libc/current/src/i18n/locale.cxx b/packages/language/c/libc/current/src/i18n/locale.cxx --- a/packages/language/c/libc/current/src/i18n/locale.cxx +++ b/packages/language/c/libc/current/src/i18n/locale.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.com -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: @@ -266,46 +266,52 @@ externC char * ++str; token_len = strcspn( str, "#" ); loc = find_locale_data( str, token_len ); + if (loc!=NULL) { temp_collate_locale=loc; str += token_len+1; token_len = strcspn( str, "#" ); loc = find_locale_data( str, token_len ); - } // if - if (loc!=NULL) { - temp_ctype_locale=loc; - str += token_len+1; - token_len = strcspn( str, "#" ); - loc = find_locale_data( str, token_len ); - } // if - if (loc!=NULL) { - temp_monetary_locale=loc; - str += token_len+1; - token_len = strcspn( str, "#" ); - loc = find_locale_data( str, token_len ); - } // if - if (loc!=NULL) { - temp_numeric_locale=loc; - str += token_len+1; - token_len = strcspn( str, "#" ); - loc = find_locale_data( str, token_len ); - } // if - if (loc!=NULL) { - temp_time_locale=loc; - str += token_len+1; - token_len = strcspn( str, "#" ); - loc = find_locale_data( str, token_len ); - } // if - if (loc!=NULL) { - // if we've got this far and loc still isn't NULL, - // then everything's fine, and we've matched everything + + if (loc!=NULL) { + temp_ctype_locale=loc; + str += token_len+1; + token_len = strcspn( str, "#" ); + loc = find_locale_data( str, token_len ); + + if (loc!=NULL) { + temp_monetary_locale=loc; + str += token_len+1; + token_len = strcspn( str, "#" ); + loc = find_locale_data( str, token_len ); + + if (loc!=NULL) { + temp_numeric_locale=loc; + str += token_len+1; + token_len = strcspn( str, "#" ); + loc = find_locale_data( str, token_len ); - current_collate_locale = temp_collate_locale; - current_ctype_locale = temp_ctype_locale; - current_monetary_locale = temp_monetary_locale; - current_numeric_locale = temp_numeric_locale; - current_time_locale = temp_time_locale; + if (loc!=NULL) { + temp_time_locale=loc; + str += token_len+1; + token_len = strcspn( str, "#" ); + loc = find_locale_data( str, token_len ); + if (loc!=NULL) { + // if we've got this far and loc still isn't NULL, + // then everything's fine, and we've matched everything + + current_collate_locale = temp_collate_locale; + current_ctype_locale = temp_ctype_locale; + current_monetary_locale = temp_monetary_locale; + current_numeric_locale = temp_numeric_locale; + current_time_locale = temp_time_locale; + + } // if + } // if + } // if + } // if + } // if } // if } // if diff --git a/packages/language/c/libc/current/src/setjmp/longjmp.cxx b/packages/language/c/libc/current/src/setjmp/longjmp.cxx --- a/packages/language/c/libc/current/src/setjmp/longjmp.cxx +++ b/packages/language/c/libc/current/src/setjmp/longjmp.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Implements ANSI standard non-local jump function longjmp() diff --git a/packages/language/c/libc/current/src/signal/raise.cxx b/packages/language/c/libc/current/src/signal/raise.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/signal/raise.cxx @@ -0,0 +1,79 @@ +//======================================================================== +// +// raise.cxx +// +// ISO C and POSIX 1003.1 signals implementation for raise() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C and POSIX 1003.1 raise() +// Description: This file provides the linkable symbol version of raise() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_SIGNALS + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __raise() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_SIGNALS_RAISE_INLINE +#ifndef CYGIMP_LIBC_SIGNALS_RAISE_INLINE +# define CYGIMP_LIBC_SIGNALS_RAISE_INLINE +#endif + +#define raise(a) __raise(a) + +#include // Main signals definitions + +// SYMBOL DEFINITIONS + +#undef raise + +externC int raise(int __sig) CYGBLD_ATTRIB_WEAK_ALIAS(__raise); + +// GLOBALS + +#ifdef CYGDBG_USE_TRACING +cyg_uint8 +cyg_libc_signals_raise_trace_level = CYGNUM_LIBC_SIGNALS_RAISE_TRACE_LEVEL; +#endif + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +// EOF raise.cxx diff --git a/packages/language/c/libc/current/src/signal/siginit.cxx b/packages/language/c/libc/current/src/signal/siginit.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/signal/siginit.cxx @@ -0,0 +1,427 @@ +//======================================================================== +// +// siginit.cxx +// +// ISO C and POSIX 1003.1 signals implementation +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-12 +// Purpose: Provide implementation of ISO C and POSIX 1003.1 signals +// Description: This file initializes all hardware exceptions, +// initializes the signal handler table and provides the +// default action function for signals +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_SIGNALS + +// INCLUDES + +#include // Common type definitions and support +#include // Main signals definitions +#include // Assertion infrastructure +#include // Tracing infrastructure +#include // exit() + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS +# include // required for kernel includes +# include // Kernel exception API +# include // Cyg_Thread::self() +# include // inline definitions for above +# include // Interrupt enable +# include // HAL interrupt control +#endif + +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE +# include // required for kernel includes +# include +#endif + +// TYPE DEFINITIONS + +// define dummy class to allow initialization of cyg_libc_signal_handlers + +class Cyg_libc_signals_dummy_init_class { +public: + Cyg_libc_signals_dummy_init_class(); +}; + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +struct exception_signal_mapping_t { + cyg_code exception; + int signal; +}; + +// EXTERNS + +extern cyg_exception_handler cyg_null_exception_handler; + +#endif // ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +// GLOBALS + +// main signal handlers +__sighandler_t cyg_libc_signal_handlers[CYGNUM_LIBC_SIGNALS]; + +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE +Cyg_Mutex cyg_libc_signal_handlers_mutex CYG_INIT_PRIORITY(LIBC); +#endif + +// STATICS + +// dummy object to invoke constructor +static Cyg_libc_signals_dummy_init_class +cyg_libc_signals_dummy_init_obj CYG_INIT_PRIORITY(LIBC); + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +# ifdef CYGDBG_USE_TRACING +static cyg_uint8 cyg_libc_signals_hwhandler_trace_level = + CYGNUM_LIBC_SIGNALS_HWHANDLER_TRACE_LEVEL; +# define TL1 (0 < cyg_libc_signals_hwhandler_trace_level) +# endif + +# ifdef CYGSEM_LIBC_SIGNALS_CHAIN_HWEXCEPTIONS +// old exception info so we can chain +// FIXME: consider malloced linked list config option +static struct { + cyg_exception_handler *old_handler; + CYG_ADDRWORD old_data; +} exception_chain_data[CYGNUM_HAL_EXCEPTION_COUNT]; +# endif + +// struct that maps exceptions to signals +static const struct exception_signal_mapping_t +exception_signal_mapping[] = { + +#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS + {CYGNUM_HAL_EXCEPTION_DATA_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_WRITE + {CYGNUM_HAL_EXCEPTION_DATA_WRITE, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_ACCESS + {CYGNUM_HAL_EXCEPTION_CODE_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_WRITE + {CYGNUM_HAL_EXCEPTION_CODE_WRITE, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_EXECUTE + {CYGNUM_HAL_EXCEPTION_CODE_EXECUTE, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_IO_ACCESS + {CYGNUM_HAL_EXCEPTION_IO_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_IO_WRITE + {CYGNUM_HAL_EXCEPTION_IO_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS + {CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_WRITE + {CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_WRITE, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_TLBMISS_ACCESS + {CYGNUM_HAL_EXCEPTION_CODE_TLBMISS_ACCESS, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_TLBMISS_WRITE + {CYGNUM_HAL_EXCEPTION_CODE_TLBMISS_WRITE, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_ACCESS + {CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_ACCESS, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_WRITE + {CYGNUM_HAL_EXCEPTION_DATA_TLBERROR_WRITE, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_TLBERROR_ACCESS + {CYGNUM_HAL_EXCEPTION_CODE_TLBERROR_ACCESS, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_CODE_TLBERROR_WRITE + {CYGNUM_HAL_EXCEPTION_CODE_TLBERROR_WRITE, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS + {CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_WRITE + {CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_WRITE, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_IO_UNALIGNED_ACCESS + {CYGNUM_HAL_EXCEPTION_IO_UNALIGNED_ACCESS, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_IO_UNALIGNED_WRITE + {CYGNUM_HAL_EXCEPTION_IO_UNALIGNED_WRITE, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION + {CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, SIGILL}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_INTERRUPT + {CYGNUM_HAL_EXCEPTION_INTERRUPT, SIGINT}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_TRAP + {CYGNUM_HAL_EXCEPTION_TRAP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DIV_BY_ZERO + {CYGNUM_HAL_EXCEPTION_DIV_BY_ZERO, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_OVERFLOW + {CYGNUM_HAL_EXCEPTION_OVERFLOW, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_BOUNDS + {CYGNUM_HAL_EXCEPTION_BOUNDS, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_SINGLE_STEP + {CYGNUM_HAL_EXCEPTION_SINGLE_STEP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP + {CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_PERIPHERAL_BP + {CYGNUM_HAL_EXCEPTION_PERIPHERAL_BP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_BP + {CYGNUM_HAL_EXCEPTION_DATA_BP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DEVELOPMENT_BP + {CYGNUM_HAL_EXCEPTION_DEVELOPMENT_BP, SIGTRAP}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_STACK_OVERFLOW + {CYGNUM_HAL_EXCEPTION_STACK_OVERFLOW, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_STACK_FAULT + {CYGNUM_HAL_EXCEPTION_STACK_FAULT, SIGSEGV}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_PARITY + {CYGNUM_HAL_EXCEPTION_PARITY, SIGBUS}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_FPU + {CYGNUM_HAL_EXCEPTION_FPU, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL + {CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_FPU_OVERFLOW + {CYGNUM_HAL_EXCEPTION_FPU_OVERFLOW, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_FPU_UNDERFLOW + {CYGNUM_HAL_EXCEPTION_FPU_UNDERFLOW, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO + {CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO, SIGFPE}, +#endif +#ifdef CYGNUM_HAL_EXCEPTION_SYSTEM_CALL + {CYGNUM_HAL_EXCEPTION_SYSTEM_CALL, SIGSYS}, +#endif + {0, 0} // dummy value to ensure compiler is happy +}; + + +// FUNCTIONS + +///////////////////////////////////////// +// cyg_libc_signals_hwexcept_handler() // +///////////////////////////////////////// + +// FIXME: should be able to get this work with +// CYGSEM_KERNEL_EXCEPTIONS_DECODE disabled as well as enabled +static void +cyg_libc_signals_hwexcept_handler( CYG_ADDRWORD data, cyg_code exception, + CYG_ADDRWORD info) +{ + int signal = (int)data; + int ret; + + CYG_REPORT_FUNCNAME("cyg_libc_signals_hwexcept_handler"); + + CYG_REPORT_FUNCARG3( "data = %08x, exception = %d, info = %08x", + data, exception, info ); + +#ifdef CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL + CYG_PRECONDITION((signal > 0) && (signal < CYGNUM_LIBC_SIGNALS), + "Signal number not valid!"); +#endif + +// chain first as it may be more useful more low-level stuff needed +#ifdef CYGSEM_LIBC_SIGNALS_CHAIN_HWEXCEPTIONS + // map exception to 0..CYGNUM_HAL_EXCEPTION_COUNT + exception -= CYGNUM_HAL_EXCEPTION_MIN; + + // special case for null handler since it is only for uncaught exceptions + + if (exception_chain_data[exception].old_handler != + cyg_null_exception_handler) { + (*exception_chain_data[exception].old_handler)( + exception_chain_data[exception].old_data, exception, info); + CYG_TRACE0(TL1, "Chained exception handler returned"); + } // if +#endif + +#ifndef CYGSEM_LIBC_SIGNALS_BAD_SIGNAL_FATAL + // if not fatal, silently return + if ((signal <= 0) || (signal >= CYGNUM_LIBC_SIGNALS)) { + CYG_REPORT_RETURN(); + return; + } +#endif + + CYG_TRACE0(TL1, "Enabling interrupts"); + HAL_ENABLE_INTERRUPTS(); + + CYG_TRACE0(TL1, "Raising signal"); + ret = raise(signal); + + if (ret) { + CYG_TRACE1(TL1, "raise() returned non-zero value %d!!!", ret); + } // if + + CYG_REPORT_RETURN(); +} // cyg_libc_signals_hwexcept_handler() + + +////////////////// +// reg_except() // +////////////////// + +static void inline +reg_except( cyg_code exception, int signal ) +{ + Cyg_Thread::self()->register_exception( + exception, &cyg_libc_signals_hwexcept_handler, (CYG_ADDRWORD)signal, +#ifdef CYGSEM_LIBC_SIGNALS_CHAIN_HWEXCEPTIONS + &exception_chain_data[exception - + CYGNUM_HAL_EXCEPTION_MIN].old_handler, + &exception_chain_data[exception - CYGNUM_HAL_EXCEPTION_MIN].old_data +#else + NULL, NULL +#endif + ); + +} // reg_except(); + +#endif // ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +/////////////////////////////////////////////////// +// Cyg_libc_signals_dummy_init_class constructor // +/////////////////////////////////////////////////// + +Cyg_libc_signals_dummy_init_class::Cyg_libc_signals_dummy_init_class() +{ + cyg_ucount8 i; + + CYG_REPORT_FUNCNAME("Cyg_libc_signals_dummy_init_class constructor"); + + // FIXME: some should be SIG_IGN? + for (i=0; i= + CYGNUM_HAL_EXCEPTION_MIN), + "Asked to register bad exception"); + + CYG_ASSERT( (exception_signal_mapping[i].signal > 0) && + (exception_signal_mapping[i].signal < + CYGNUM_LIBC_SIGNALS), "Asked to register bad signal" ); + + reg_except( exception_signal_mapping[i].exception, + exception_signal_mapping[i].signal); + } +#endif + + CYG_REPORT_RETURN(); +} // Cyg_libc_signals_dummy_init_class() constructor + + +//////////////////////////////////////// +// cyg_libc_signals_default_handler() // +//////////////////////////////////////// + +// Default signal handler - SIG_DFL +externC void +cyg_libc_signals_default_handler(int sig) +{ + CYG_REPORT_FUNCNAME( "cyg_libc_signals_default_handler" ); + + CYG_REPORT_FUNCARG1( "signal number = %d", sig ); + + exit(1000 + sig); // FIXME + + CYG_REPORT_RETURN(); +} // cyg_libc_signals_default_handler() + +#ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE +///////////////////////////////////// +// cyg_libc_signals_lock_do_lock() // +///////////////////////////////////// + +externC cyg_bool +cyg_libc_signals_lock_do_lock(void) +{ + cyg_bool ret; + CYG_REPORT_FUNCNAMETYPE("cyg_libc_signals_lock_do_lock", "returning %d"); + + ret = cyg_libc_signal_handlers_mutex.lock(); + + CYG_REPORT_RETVAL(ret); + + return ret; +} // cyg_libc_signals_lock_do_lock() + +/////////////////////////////////////// +// cyg_libc_signals_lock_do_unlock() // +/////////////////////////////////////// + +externC void +cyg_libc_signals_lock_do_unlock(void) +{ + CYG_REPORT_FUNCNAME("cyg_libc_signals_lock_do_unlock"); + + cyg_libc_signal_handlers_mutex.unlock(); + + CYG_REPORT_RETURN(); +} // cyg_libc_signals_lock_do_unlock() + +#endif // ifdef CYGSEM_LIBC_SIGNALS_THREAD_SAFE + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +// EOF siginit.cxx diff --git a/packages/language/c/libc/current/src/signal/signal.cxx b/packages/language/c/libc/current/src/signal/signal.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/signal/signal.cxx @@ -0,0 +1,73 @@ +//======================================================================== +// +// signal.cxx +// +// ISO C and POSIX 1003.1 signals implementation +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-12 +// Purpose: Provide implementation of ISO C and POSIX 1003.1 signals +// Description: This file provides the linkable symbol version of raise() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_SIGNALS + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __raise() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_SIGNALS_SIGNAL_INLINE +#ifndef CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE +# define CYGIMP_LIBC_SIGNALS_SIGNAL_INLINE +#endif + +#define signal(a, b) __signal(a, b) + +#include // Main signals definitions + +// SYMBOL DEFINITIONS + +#undef signal + +externC __sighandler_t signal(int __sig, __sighandler_t __handler) + CYGBLD_ATTRIB_WEAK_ALIAS(__signal); + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +// EOF signal.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/fclose.cxx b/packages/language/c/libc/current/src/stdio/common/fclose.cxx --- a/packages/language/c/libc/current/src/stdio/common/fclose.cxx +++ b/packages/language/c/libc/current/src/stdio/common/fclose.cxx @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Implements ISO C fclose() function // Description: // Usage: // @@ -45,10 +45,8 @@ #include // Configuration header -// Include the C library? And do we want the stdio stuff? And we can't have -// fclose() without fopen() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && \ - defined(CYGPKG_LIBC_STDIO_OPEN) +// Do we want the stdio stuff? And we can't have fclose() without fopen() +#if defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // INCLUDES @@ -57,7 +55,7 @@ #include // Error codes #include // header for fclose() #include "clibincl/stdlibsupp.hxx" // _free() -#include "clibincl/clibdata.hxx" // C library private data +#include "clibincl/stdiofiles.hxx" // C library files #include "clibincl/stream.hxx" // C libray streams #include "clibincl/stdiosupp.hxx" // support for stdio @@ -65,7 +63,7 @@ // EXPORTED SYMBOLS externC int -fclose( FILE * ) CYGPRI_LIBC_WEAK_ALIAS("_fclose"); +fclose( FILE * ) CYGBLD_ATTRIB_WEAK_ALIAS(_fclose); // FUNCTIONS @@ -77,14 +75,12 @@ externC int Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; int i; -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - Cyg_CLibInternalData::files_lock.lock(); -#endif // CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + Cyg_libc_stdio_files::lock(); // find the stream in the table for (i=0; i < FOPEN_MAX; i++) { - if (real_stream == Cyg_CLibInternalData::get_file_stream(i)) + if (real_stream == Cyg_libc_stdio_files::get_file_stream(i)) break; } // for @@ -94,7 +90,8 @@ externC int return EOF; } // if - + + // FIXME: should use delete? // Explicitly call destructor - this flushes the output too real_stream->~Cyg_StdioStream(); @@ -102,17 +99,14 @@ externC int _free(real_stream); // and mark the stream available for use - Cyg_CLibInternalData::set_file_stream(i, NULL); + Cyg_libc_stdio_files::set_file_stream(i, NULL); -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - Cyg_CLibInternalData::files_lock.unlock(); -#endif // CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + Cyg_libc_stdio_files::unlock(); return 0; } // _fclose() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && - // defined(CYGPKG_LIBC_STDIO_OPEN) +#endif // if defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // EOF fclose.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/fflush.cxx b/packages/language/c/libc/current/src/stdio/common/fflush.cxx --- a/packages/language/c/libc/current/src/stdio/common/fflush.cxx +++ b/packages/language/c/libc/current/src/stdio/common/fflush.cxx @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provides ISO C fflush() function // Description: // Usage: // @@ -44,9 +44,8 @@ #include // Configuration header - -// Include the C library? And do we want the stdio stuff? -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +// Do we want the stdio stuff? +#ifdef CYGPKG_LIBC_STDIO // INCLUDES @@ -55,61 +54,71 @@ #include // Error codes #include // header for fflush() #include "clibincl/stream.hxx" // C library streams -#include "clibincl/clibdata.hxx" // C library private data +#include "clibincl/stdiofiles.hxx" // C library files #include "clibincl/stdiosupp.hxx" // support for stdio // EXPORTED SYMBOLS externC int -fflush( FILE * ) CYGPRI_LIBC_WEAK_ALIAS("_fflush"); +fflush( FILE * ) CYGBLD_ATTRIB_WEAK_ALIAS(_fflush); // FUNCTIONS +// flush all but one stream +externC Cyg_ErrNo +cyg_libc_stdio_flush_all_but( Cyg_StdioStream *not_this_stream ) +{ + cyg_bool files_flushed[FOPEN_MAX] = { false }; // sets all to 0 + cyg_bool loop_again; + cyg_ucount32 i; + Cyg_ErrNo err=ENOERR; + Cyg_StdioStream *stream; + + do { + loop_again = false; + + for (i=0; (itrylock_me() ) { + err = stream->flush_output_unlocked(); + stream->unlock_me(); + files_flushed[i] = true; + } // if + else + loop_again = true; + } // else + } // if + } // for + } // do + while(loop_again && !err); + + return err; +} // cyg_libc_stdio_flush_all_but() externC int _fflush( FILE *stream ) { Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; - int i; - Cyg_ErrNo err=ENOERR; + Cyg_ErrNo err; if (stream == NULL) { // tells us to flush ALL streams - cyg_bool files_flushed[FOPEN_MAX] = { false }; // sets all to 0 - cyg_bool loop_again; - - do { - loop_again = false; - - for (i=0; (itrylock_me() ) { - err = real_stream->flush_output_unlocked(); - real_stream->unlock_me(); - files_flushed[i] = true; - } // if - else - loop_again = true; - } // else - } // if - } // for - } // do - while(loop_again && !err); - + err = cyg_libc_stdio_flush_all_but(NULL); } // if else { err = real_stream->flush_output(); @@ -124,6 +133,6 @@ externC int } // _fflush() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#endif // ifdef CYGPKG_LIBC_STDIO // EOF fflush.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/fopen.cxx b/packages/language/c/libc/current/src/stdio/common/fopen.cxx --- a/packages/language/c/libc/current/src/stdio/common/fopen.cxx +++ b/packages/language/c/libc/current/src/stdio/common/fopen.cxx @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Implements ISO C fopen() function // Description: // Usage: // @@ -45,29 +45,26 @@ #include // Configuration header -// Include the C library? And do we want the stdio stuff? And fopen()? -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && \ - defined(CYGPKG_LIBC_STDIO_OPEN) +// Do we want the stdio stuff? And fopen()? +#if defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // INCLUDES #include // Common project-wide type definitions #include // NULL and size_t from compiler #include // Error codes -#include // Cyg_IORB -#include // Device table +#include // I/O system #include // header for fopen() #include "clibincl/stdlibsupp.hxx" // _malloc() #include "clibincl/stringsupp.hxx" // _strncmp() and _strcmp() -#include "clibincl/clibdata.hxx" // C library private data +#include "clibincl/stdiofiles.hxx" // C library files #include "clibincl/stream.hxx" // C library streams -#include "clibincl/stdiosupp.hxx" // support for stdio // EXPORTED SYMBOLS externC FILE * -fopen( const char *, const char * ) CYGPRI_LIBC_WEAK_ALIAS("_fopen"); +fopen( const char *, const char * ) CYGBLD_ATTRIB_WEAK_ALIAS(_fopen); // FUNCTIONS @@ -127,43 +124,38 @@ process_mode( const char *mode, Cyg_Stdi externC FILE * _fopen( const char *filename, const char *mode ) { - struct Cyg_Device_Table_t *dev; + cyg_io_handle_t dev; Cyg_StdioStream *curr_stream; int i; Cyg_ErrNo err; Cyg_StdioStream::OpenMode open_mode; cyg_bool binary, append; - CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE; - - dev = Cyg_libc_stdio_find_filename( filename ); + err = cyg_io_lookup( filename, &dev ); // if not found - if (!dev) { - *CYGPRI_LIBC_INTERNAL_DATA.get_errno_p() = ENOENT; + if (err != ENOERR) { + errno = ENOENT; return NULL; } // if // process_mode returns true on error if (process_mode( mode, &open_mode, &binary, &append )) { - *CYGPRI_LIBC_INTERNAL_DATA.get_errno_p() = EINVAL; + errno = EINVAL; return NULL; } // if -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - CYGPRI_LIBC_INTERNAL_DATA.files_lock.lock(); -#endif // CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + Cyg_libc_stdio_files::lock(); // find an empty slot for (i=0; i < FOPEN_MAX; i++) { - curr_stream = CYGPRI_LIBC_INTERNAL_DATA.get_file_stream(i); + curr_stream = Cyg_libc_stdio_files::get_file_stream(i); if (curr_stream == NULL) break; } // for if (i == FOPEN_MAX) { // didn't find an empty slot - *CYGPRI_LIBC_INTERNAL_DATA.get_errno_p() = EMFILE; - + errno = EMFILE; return NULL; } // if @@ -174,7 +166,7 @@ externC FILE * _IONBF ); if (curr_stream == NULL) { - *CYGPRI_LIBC_INTERNAL_DATA.get_errno_p() = ENOMEM; + errno = ENOMEM; return NULL; } // if @@ -182,29 +174,24 @@ externC FILE * // it puts any error in its own error flag if (( err=curr_stream->get_error() )) { -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - CYGPRI_LIBC_INTERNAL_DATA.files_lock.unlock(); -#endif // CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + Cyg_libc_stdio_files::unlock(); _free( curr_stream ); - *CYGPRI_LIBC_INTERNAL_DATA.get_errno_p() = err; + errno = err; return NULL; } // if - CYGPRI_LIBC_INTERNAL_DATA.set_file_stream(i, curr_stream); + Cyg_libc_stdio_files::set_file_stream(i, curr_stream); -#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS - CYGPRI_LIBC_INTERNAL_DATA.files_lock.unlock(); -#endif // CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS + Cyg_libc_stdio_files::unlock(); return (FILE *)(curr_stream); } // _fopen() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && - // defined(CYGPKG_LIBC_STDIO_OPEN) +#endif // defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // EOF fopen.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/freopen.cxx b/packages/language/c/libc/current/src/stdio/common/freopen.cxx --- a/packages/language/c/libc/current/src/stdio/common/freopen.cxx +++ b/packages/language/c/libc/current/src/stdio/common/freopen.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,9 +30,9 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provides ISO C freopen() function // Description: Implementation of C library freopen() function as per // ISO C standard chap. 7.9.5.4 // Usage: @@ -45,29 +45,23 @@ #include // Configuration header - -// Include the C library? And do we want the stdio stuff? And we only want -// freopen if we have fopen() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && \ - defined(CYGPKG_LIBC_STDIO_OPEN) +// Do we want the stdio stuff? And we only want freopen() if we have fopen() +#if defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // INCLUDES #include // Common project-wide type definitions #include // NULL and size_t from compiler -#include // Error codes #include // header for freopen() -#include "clibincl/stream.hxx" // C libray streams -#include "clibincl/clibdata.hxx" // C library private data #include "clibincl/stdiosupp.hxx" // support for stdio // EXPORTED SYMBOLS externC FILE * -freopen( const char *, const char *, FILE * ) - CYGPRI_LIBC_WEAK_ALIAS("_freopen"); +freopen( const char *, const char *, FILE * ) + CYGBLD_ATTRIB_WEAK_ALIAS(_freopen); // FUNCTIONS @@ -76,10 +70,9 @@ freopen( const char *, const char *, FIL externC FILE * _freopen( const char *, const char *, FILE * ) { - return NULL; // Returning NULL is valid! + return NULL; // Returning NULL is valid! FIXME } // _freopen() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) && - // defined(CYGPKG_LIBC_STDIO_OPEN) +#endif // if defined(CYGPKG_LIBC_STDIO) && defined(CYGPKG_LIBC_STDIO_OPEN) // EOF freopen.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/setvbuf.cxx b/packages/language/c/libc/current/src/stdio/common/setvbuf.cxx --- a/packages/language/c/libc/current/src/stdio/common/setvbuf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/setvbuf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/common/snprintf.cxx b/packages/language/c/libc/current/src/stdio/common/snprintf.cxx --- a/packages/language/c/libc/current/src/stdio/common/snprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/snprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/common/sprintf.cxx b/packages/language/c/libc/current/src/stdio/common/sprintf.cxx --- a/packages/language/c/libc/current/src/stdio/common/sprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/sprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/common/sscanf.cxx b/packages/language/c/libc/current/src/stdio/common/sscanf.cxx --- a/packages/language/c/libc/current/src/stdio/common/sscanf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/sscanf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/common/stderr.cxx b/packages/language/c/libc/current/src/stdio/common/stderr.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdio/common/stderr.cxx @@ -0,0 +1,92 @@ +//======================================================================== +// +// stderr.cxx +// +// Initialization of stderr stream for ISO C library +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-15 +// Purpose: Initialization of stderr stream for ISO C library +// Description: We put all this in a separate file in the hope that if +// no-one uses stderr, then it is not included in the image +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // Configuration header + +#ifdef CYGPKG_LIBC_STDIO + +// Don't let us get the stream definitions of stdin/out/err from stdio.h +// since we are going to break the type safety :-( +#define CYGPRI_LIBC_STDIO_NO_DEFAULT_STREAMS + +// And we don't need the stdio inlines, which will otherwise complain if +// stdin/out/err are not available +#ifdef CYGIMP_LIBC_STDIO_INLINES +# undef CYGIMP_LIBC_STDIO_INLINES +#endif + +// INCLUDES + +#include // Common type definitions and support +#include "clibincl/stream.hxx" // Cyg_StdioStream class +#include "clibincl/stdiofiles.hxx" // C library files +#include "clibincl/stdiosupp.hxx" // Cyg_libc_stdio_find_filename() + +// STATICS + +Cyg_StdioStream +cyg_libc_stdio_stderr CYG_INIT_PRIORITY(LIBC) = Cyg_StdioStream( + Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), + Cyg_StdioStream::CYG_STREAM_WRITE, false, false, _IONBF, 0, NULL ); + +// CLASSES + +// This is a dummy class just so we can execute arbitrary code when +// stderr is requested + +class cyg_libc_dummy_stderr_init_class { +public: + cyg_libc_dummy_stderr_init_class(void) { + Cyg_libc_stdio_files::set_file_stream(2, &cyg_libc_stdio_stderr); + } +}; + +// And here's an instance of the class just to make the code run +static cyg_libc_dummy_stderr_init_class cyg_libc_dummy_stderr_init + CYG_INIT_PRIORITY(LIBC); + +#endif // ifdef CYGPKG_LIBC_STDIO + +// EOF stderr.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/stdin.cxx b/packages/language/c/libc/current/src/stdio/common/stdin.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdio/common/stdin.cxx @@ -0,0 +1,93 @@ +//======================================================================== +// +// stdin.cxx +// +// Initialization of stdin stream for ISO C library +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-15 +// Purpose: Initialization of stdin stream for ISO C library +// Description: We put all this in a separate file in the hope that if +// no-one uses stdin, then it is not included in the image +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // Configuration header + +#ifdef CYGPKG_LIBC_STDIO + +// Don't let us get the stream definitions of stdin/out/err from stdio.h +// since we are going to break the type safety :-( +#define CYGPRI_LIBC_STDIO_NO_DEFAULT_STREAMS + +// And we don't need the stdio inlines, which will otherwise complain if +// stdin/out/err are not available +#ifdef CYGIMP_LIBC_STDIO_INLINES +# undef CYGIMP_LIBC_STDIO_INLINES +#endif + +// INCLUDES + +#include // Common type definitions and support +#include "clibincl/stream.hxx" // Cyg_StdioStream class +#include "clibincl/stdiofiles.hxx" // C library files +#include "clibincl/stdiosupp.hxx" // Cyg_libc_stdio_find_filename() + +// STATICS + +Cyg_StdioStream +cyg_libc_stdio_stdin CYG_INIT_PRIORITY(LIBC) = Cyg_StdioStream( + Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), + Cyg_StdioStream::CYG_STREAM_READ, false, false, _IOLBF ); + + +// CLASSES + +// This is a dummy class just so we can execute arbitrary code when +// stdin is requested + +class cyg_libc_dummy_stdin_init_class { +public: + cyg_libc_dummy_stdin_init_class(void) { + Cyg_libc_stdio_files::set_file_stream(0, &cyg_libc_stdio_stdin); + } +}; + +// And here's an instance of the class just to make the code run +static cyg_libc_dummy_stdin_init_class cyg_libc_dummy_stdin_init + CYG_INIT_PRIORITY(LIBC); + +#endif // ifdef CYGPKG_LIBC_STDIO + +// EOF stdin.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/stdiofiles.cxx b/packages/language/c/libc/current/src/stdio/common/stdiofiles.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdio/common/stdiofiles.cxx @@ -0,0 +1,74 @@ +//======================================================================== +// +// stdiofiles.cxx +// +// ISO C library stdio central file data +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Allocate storage for central file data object +// Description: This file allocates the actual objects used by the +// Cyg_libc_stdio_files class defined in +// "clibincl/stdiofiles.hxx" +// Usage: +// +//####DESCRIPTIONEND#### +// +//========================================================================= + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGPKG_LIBC_STDIO + +// INCLUDES + +#include // NULL +#include "clibincl/stream.hxx" // Cyg_StdioStream +#include "clibincl/stdiofiles.hxx" // Class definition for + // Cyg_libc_stdio_files + +#ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS +# include // CYG_INIT_PRIORITY +# include // mutexes +#endif + + +// GLOBAL VARIABLES + +Cyg_StdioStream *Cyg_libc_stdio_files::files[FOPEN_MAX] = { NULL }; + +# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS +Cyg_Mutex Cyg_libc_stdio_files::files_lock CYG_INIT_PRIORITY(LIBC); +# endif + +#endif // ifdef CYGPKG_LIBC_STDIO + +// EOF stdiofiles.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/stdioinlines.cxx b/packages/language/c/libc/current/src/stdio/common/stdioinlines.cxx --- a/packages/language/c/libc/current/src/stdio/common/stdioinlines.cxx +++ b/packages/language/c/libc/current/src/stdio/common/stdioinlines.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -100,9 +100,12 @@ externC void _setbuf( FILE *stream, char *buf ) { if (buf == NULL) - _setvbuf( stream, NULL, _IOFBF, BUFSIZE ); + _setvbuf( stream, NULL, _IONBF, BUFSIZ ); else - _setvbuf( stream, buf, _IONBF, BUFSIZE ); + // NB: Should use full buffering by default ordinarily, but in + // the current system we're always connected to an interactive + // terminal, so use line buffering + _setvbuf( stream, buf, _IOLBF, BUFSIZ ); } // _setbuf() diff --git a/packages/language/c/libc/current/src/stdio/common/stdiosupp.cxx b/packages/language/c/libc/current/src/stdio/common/stdiosupp.cxx --- a/packages/language/c/libc/current/src/stdio/common/stdiosupp.cxx +++ b/packages/language/c/libc/current/src/stdio/common/stdiosupp.cxx @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-04 // Purpose: // Description: // Usage: @@ -46,43 +46,31 @@ // Include the C library? And do we want the stdio stuff? -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#ifdef CYGPKG_LIBC_STDIO // INCLUDES -#include // Common project-wide type definitions -#include // NULL and size_t from compiler -#include // Device table -#include "clibincl/stringsupp.hxx" // _strncmp() and _strcmp() -#include "clibincl/stdiosupp.hxx" // Header for this file +#include // Common project-wide type definitions +#include // NULL and size_t from compiler +#include // I/O system +#include "clibincl/stringsupp.hxx" // _strncmp() and _strcmp() +#include "clibincl/stdiosupp.hxx" // Header for this file +externC void cyg_io_init(void); -struct Cyg_Device_Table_t * +cyg_io_handle_t Cyg_libc_stdio_find_filename( const char *filename ) { - int i; - struct Cyg_Device_Table_t *dev=NULL; - - // Find the "file" in the device table - if ( _strncmp( filename, "/dev/", 5) ) - { - return NULL; - } // if - - // match the bit after the "/dev/" - for (i=0; (Cyg_Device_Table[i].name != NULL); i++ ) - { - if ( !_strcmp( &filename[5], Cyg_Device_Table[i].name) ) - { - dev=&Cyg_Device_Table[i]; - break; - } - } // for - - return dev; // dev will still be NULL if the filename wasn't found + cyg_io_handle_t dev=NULL; + // FIXME - Remove this call to 'cyg_io_init()' when contructor + // priority bug PR 19285 is fixed + cyg_io_init(); + cyg_io_lookup(filename, &dev); + + return dev; } // Cyg_libc_stdio_find_filename() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#endif // ifdef CYGPKG_LIBC_STDIO // EOF stdiosupp.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/stdout.cxx b/packages/language/c/libc/current/src/stdio/common/stdout.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdio/common/stdout.cxx @@ -0,0 +1,92 @@ +//======================================================================== +// +// stdout.cxx +// +// Initialization of stdout stream for ISO C library +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-15 +// Purpose: Initialization of stdout stream for ISO C library +// Description: We put all this in a separate file in the hope that if +// no-one uses stdout, then it is not included in the image +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // Configuration header + +#ifdef CYGPKG_LIBC_STDIO + +// Don't let us get the stream definitions of stdin/out/err from stdio.h +// since we are going to break the type safety :-( +#define CYGPRI_LIBC_STDIO_NO_DEFAULT_STREAMS + +// And we don't need the stdio inlines, which will otherwise complain if +// stdin/out/err are not available +#ifdef CYGIMP_LIBC_STDIO_INLINES +# undef CYGIMP_LIBC_STDIO_INLINES +#endif + +// INCLUDES + +#include // Common type definitions and support +#include "clibincl/stream.hxx" // Cyg_StdioStream class +#include "clibincl/stdiofiles.hxx" // C library files +#include "clibincl/stdiosupp.hxx" // Cyg_libc_stdio_find_filename() + +// STATICS + +Cyg_StdioStream +cyg_libc_stdio_stdout CYG_INIT_PRIORITY(LIBC) = Cyg_StdioStream( + Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), + Cyg_StdioStream::CYG_STREAM_WRITE, false, false, _IOLBF ); + +// CLASSES + +// This is a dummy class just so we can execute arbitrary code when +// stdout is requested + +class cyg_libc_dummy_stdout_init_class { +public: + cyg_libc_dummy_stdout_init_class(void) { + Cyg_libc_stdio_files::set_file_stream(1, &cyg_libc_stdio_stdout); + } +}; + +// And here's an instance of the class just to make the code run +static cyg_libc_dummy_stdout_init_class cyg_libc_dummy_stdout_init + CYG_INIT_PRIORITY(LIBC); + +#endif // ifdef CYGPKG_LIBC_STDIO + +// EOF stdout.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/stream.cxx b/packages/language/c/libc/current/src/stdio/common/stream.cxx --- a/packages/language/c/libc/current/src/stdio/common/stream.cxx +++ b/packages/language/c/libc/current/src/stdio/common/stream.cxx @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-16 // Purpose: // Description: // Usage: @@ -46,22 +46,24 @@ // Include the C library? And do we want the stdio stuff? -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#ifdef CYGPKG_LIBC_STDIO // INCLUDES -#include // Common project-wide type definitions -#include // NULL and size_t from compiler -#include // Error codes -#include "clibincl/stringsupp.hxx" // _memcpy() -#include "clibincl/stream.hxx" // Header for this file -#include // Cyg_IORB -#include // Device table +#include // Common project-wide type definitions +#include // Assertion infrastructure +#include // NULL and size_t from compiler +#include // Error codes +#include "clibincl/stringsupp.hxx" // _memcpy() +#include "clibincl/stream.hxx" // Header for this file +#include "clibincl/stdiosupp.hxx" // Stdio support functions +#include // I/O system +#include // CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN // FUNCTIONS -Cyg_StdioStream::Cyg_StdioStream(Cyg_Device_Table_t *dev, +Cyg_StdioStream::Cyg_StdioStream(cyg_io_handle_t dev, OpenMode open_mode, cyg_bool append, cyg_bool binary, int buffer_mode, cyg_ucount32 buffer_size, @@ -71,6 +73,9 @@ Cyg_StdioStream::Cyg_StdioStream(Cyg_Dev #endif { + + CYG_CHECK_DATA_PTR(dev, "Attempt to open invalid device!"); + #ifdef CYGDBG_USE_ASSERTS magic_validity_word = 0xbadbad; #endif @@ -98,11 +103,13 @@ Cyg_StdioStream::Cyg_StdioStream(Cyg_Dev if (flags.opened_for_write) { +#if 0 + // FIXME: need some replacement for this if (!my_device->write_blocking) { error = EDEVNOSUPP; return; } // if - +#endif #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO flags.last_buffer_op_was_read = false; #endif @@ -110,10 +117,13 @@ Cyg_StdioStream::Cyg_StdioStream(Cyg_Dev if (flags.opened_for_read) { +#if 0 + // FIXME: need some replacement for this if (!my_device->read_blocking) { error = EDEVNOSUPP; return; } // if +#endif // NB also if opened for read AND write, then say last op was read #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO @@ -154,13 +164,14 @@ Cyg_StdioStream::Cyg_StdioStream(Cyg_Dev } // switch // one way of checking the buffer was set up correctly - if (io_buf.get_buffer_size()==-1) { + if (flags.buffering && io_buf.get_buffer_size()==-1) { error = ENOMEM; return; } #endif +#if 0 // FIXME - Need to set binary mode. if (my_device->open) { error = (*my_device->open)( my_device->cookie, binary ? CYG_DEVICE_OPEN_MODE_RAW @@ -169,6 +180,7 @@ Cyg_StdioStream::Cyg_StdioStream(Cyg_Dev return; // keep error code the same } // if +#endif #ifdef CYGDBG_USE_ASSERTS magic_validity_word = 0x7b4321ce; @@ -182,7 +194,8 @@ Cyg_ErrNo Cyg_StdioStream::refill_read_buffer( void ) { Cyg_ErrNo read_err; - Cyg_IORB iorb; + cyg_uint8 *buffer; + cyg_uint32 len; CYG_ASSERTCLASS( this, "Stream object is not a valid stream!" ); @@ -213,38 +226,39 @@ Cyg_StdioStream::refill_read_buffer( voi flags.last_buffer_op_was_read = true; if (flags.buffering) { - iorb.buffer_length = - io_buf.get_buffer_addr_to_write( (cyg_uint8**)&iorb.buffer ); + len = io_buf.get_buffer_addr_to_write( (cyg_uint8**)&buffer ); + if (!len) { // no buffer space available + unlock_me(); + return ENOERR; // isn't an error, just needs user to read out data + } // if } else #endif if (!flags.readbuf_char_in_use) { - iorb.buffer_length = 1; - iorb.buffer = &readbuf_char; + len = 1; + buffer = &readbuf_char; } - else - iorb.buffer_length = 0; - - if (!iorb.buffer_length) { // no buffer space available + else { + // no buffer space available unlock_me(); return ENOERR; // isn't an error, just needs user to read out data - } // if + } // else - read_err = (*my_device->read_blocking)( my_device->cookie, &iorb ); + read_err = cyg_io_read(my_device, buffer, &len); #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO if (flags.buffering) - io_buf.set_bytes_written( iorb.xferred_length ); + io_buf.set_bytes_written( len ); else #endif - flags.readbuf_char_in_use = iorb.xferred_length ? 1 : 0; + flags.readbuf_char_in_use = len ? 1 : 0; unlock_me(); if (read_err == ENOERR) { - if (iorb.xferred_length == 0) + if (len == 0) read_err = EAGAIN; } // if @@ -287,6 +301,8 @@ Cyg_StdioStream::read( cyg_uint8 *user_b // this should really only be called after refill_read_buffer, but // just in case err = flush_output_unlocked(); + if (ENOERR == err) + err = cyg_libc_stdio_flush_all_but(this); if (err != ENOERR) { unlock_me(); @@ -343,6 +359,8 @@ Cyg_StdioStream::read_byte( cyg_uint8 *c #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO if (flags.buffering) err = flush_output_unlocked(); + if (ENOERR == err) + err = cyg_libc_stdio_flush_all_but(this); if (err != ENOERR) return err; @@ -462,8 +480,9 @@ Cyg_ErrNo Cyg_StdioStream::flush_output_unlocked( void ) { #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO - Cyg_IORB iorb; Cyg_ErrNo write_err=ENOERR; + cyg_uint8 *buffer; + cyg_uint32 len; CYG_ASSERTCLASS( this, "Stream object is not a valid stream!" ); @@ -478,13 +497,19 @@ Cyg_StdioStream::flush_output_unlocked( if (io_buf.get_buffer_space_used() == 0) return ENOERR; - iorb.buffer_length = - io_buf.get_buffer_addr_to_read( (cyg_uint8 **)&iorb.buffer ); + len = io_buf.get_buffer_addr_to_read( (cyg_uint8 **)&buffer ); - CYG_ASSERT( iorb.buffer_length > 0, + CYG_ASSERT( len > 0, "There should be data to read but there isn't!"); - write_err = (*my_device->write_blocking)( my_device->cookie, &iorb ); + write_err = cyg_io_write(my_device, buffer, &len); + + // since we're doing a concerted flush, we tell the I/O layer to + // flush too, otherwise output may just sit there forever + if (!write_err) + write_err = cyg_io_get_config(my_device, + CYG_IO_GET_CONFIG_SERIAL_OUTPUT_DRAIN, + NULL, NULL); // we've just read it all, so just wipe it out io_buf.drain_buffer(); @@ -530,14 +555,11 @@ Cyg_StdioStream::write( const cyg_uint8 if (!flags.buffering) { #endif - Cyg_IORB iorb; - iorb.buffer = (char *)buffer; - iorb.buffer_length = buffer_length; + cyg_uint32 len = buffer_length; - write_err = (*my_device->write_blocking)( my_device->cookie, - &iorb ); + write_err = cyg_io_write(my_device, buffer, &len); - *bytes_written = iorb.xferred_length; + *bytes_written = len; #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO } // if @@ -618,6 +640,6 @@ Cyg_StdioStream::write( const cyg_uint8 } // write() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_STDIO) +#endif // ifdef CYGPKG_LIBC_STDIO // EOF stream.cxx diff --git a/packages/language/c/libc/current/src/stdio/common/streambuf.cxx b/packages/language/c/libc/current/src/stdio/common/streambuf.cxx --- a/packages/language/c/libc/current/src/stdio/common/streambuf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/streambuf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -60,7 +60,7 @@ // FUNCTIONS Cyg_ErrNo -Cyg_StdioStreamBuffer::set_buffer( cyg_ucount32 size=BUFSIZE, +Cyg_StdioStreamBuffer::set_buffer( cyg_ucount32 size=BUFSIZ, cyg_uint8 *new_buffer=NULL ) { @@ -76,8 +76,8 @@ Cyg_StdioStreamBuffer::set_buffer( cyg_u } buffer_bottom = new_buffer; } - else if ( size != get_buffer_size() ) { // as long as its different from - // what we've got now + else if ( size != buffer_size ) { // as long as its different from + // what we've got now cyg_uint8 *malloced_buf; malloced_buf = (cyg_uint8 * )_malloc( size ); diff --git a/packages/language/c/libc/current/src/stdio/common/ungetc.cxx b/packages/language/c/libc/current/src/stdio/common/ungetc.cxx --- a/packages/language/c/libc/current/src/stdio/common/ungetc.cxx +++ b/packages/language/c/libc/current/src/stdio/common/ungetc.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/common/vsnprintf.cxx b/packages/language/c/libc/current/src/stdio/common/vsnprintf.cxx --- a/packages/language/c/libc/current/src/stdio/common/vsnprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/vsnprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -53,10 +53,10 @@ #include // NULL and size_t from compiler #include // header for this file #include // error codes -#include // Device table stuff -#include // IORBs -#include "clibincl/stdiosupp.hxx" // Support functions for stdio +#include // I/O system +#include // Device table #include "clibincl/stream.hxx" // Cyg_StdioStream +#include "clibincl/stdiosupp.hxx" // _vfnprintf() prototype // EXPORTED SYMBOLS @@ -67,12 +67,12 @@ vsnprintf( char *, size_t, const char *, // FUNCTIONS - static Cyg_ErrNo -str_write( CYG_ADDRWORD cookie, Cyg_IORB *iorb ) +str_write(cyg_io_handle_t handle, const void *buf, cyg_uint32 *len) { - cyg_uint8 **str_p = (cyg_uint8 **) cookie; - cyg_ucount32 i=0; + cyg_devtab_entry_t *dev = (cyg_devtab_entry_t *)handle; + cyg_uint8 **str_p = (cyg_uint8 **)dev->priv; + cyg_ucount32 i; // I suspect most strings passed to vsnprintf will be relatively short, // so we just take the simple approach rather than have the overhead @@ -80,17 +80,22 @@ str_write( CYG_ADDRWORD cookie, Cyg_IORB // simply copy string until we run out of user space - for (i=0; i < iorb->buffer_length; i++, (*str_p)++ ) + for (i = 0; i < *len; i++, (*str_p)++ ) { - **str_p = *((char *)iorb->buffer + i); + **str_p = *((cyg_uint8 *)buf + i); } // for - iorb->xferred_length = i; + *len = i; return ENOERR; } // str_write() +static DEVIO_TABLE(devio_table, + str_write, // write + NULL, // read + NULL, // get_config + NULL); // set_config externC int _vsnprintf( char *s, size_t size, const char *format, va_list arg ) @@ -99,17 +104,13 @@ externC int // construct a fake device with the address of the string we've // been passed as its private data. This way we can use the data // directly - struct Cyg_Device_Table_t strdev = { "strdev", - (CYG_ADDRWORD) &s, - NULL, // open - NULL, // read_cancel - NULL, // write_cancel - NULL, // read_blocking - &str_write, // write_blocking - NULL, // read_asynchronous - NULL, // write_asynchronous - NULL, // close - 0 }; // ioctl + DEVTAB_ENTRY_NO_INIT(strdev, + "strdev", // Name + NULL, // Dependent name (layered device) + &devio_table, // I/O function table + NULL, // Init + NULL, // Lookup + &s); // private Cyg_StdioStream my_stream( &strdev, Cyg_StdioStream::CYG_STREAM_WRITE, false, false, _IONBF, 0, NULL ); diff --git a/packages/language/c/libc/current/src/stdio/common/vsscanf.cxx b/packages/language/c/libc/current/src/stdio/common/vsscanf.cxx --- a/packages/language/c/libc/current/src/stdio/common/vsscanf.cxx +++ b/packages/language/c/libc/current/src/stdio/common/vsscanf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -53,10 +53,10 @@ #include // NULL and size_t from compiler #include // header for this file #include // error codes -#include // Device table stuff -#include // IORBs -#include "clibincl/stdiosupp.hxx" // Support functions for stdio +#include // I/O system +#include // Device table #include "clibincl/stream.hxx" // Cyg_StdioStream +#include "clibincl/stdiosupp.hxx" // _vsscanf() prototype // EXPORTED SYMBOLS @@ -68,16 +68,17 @@ vsscanf( const char *, const char *, va_ // FUNCTIONS static Cyg_ErrNo -str_read( CYG_ADDRWORD cookie, Cyg_IORB *iorb ) +str_read(cyg_io_handle_t handle, void *buf, cyg_uint32 *len) { - cyg_uint8 **str_p = (cyg_uint8 **) cookie; + cyg_devtab_entry_t *dev = (cyg_devtab_entry_t *)handle; + cyg_uint8 *str_p = (cyg_uint8 *)dev->priv; cyg_ucount32 i; - // we set *str_p to NULL further down when the string has finished being + // we set str_p to NULL further down when the string has finished being // read - if (*str_p == NULL) + if (str_p == NULL) { - iorb->xferred_length = 0; + *len = 0; return ENOERR; } // if @@ -86,26 +87,32 @@ str_read( CYG_ADDRWORD cookie, Cyg_IORB // of calling memcpy etc. // copy string until run out of user space, or we reach its end - for (i=0; (i < iorb->buffer_length) ; ++i) + for (i = 0; i < *len ; ++i) { - *((char *)iorb->buffer + i) = **str_p; + *((cyg_uint8 *)buf + i) = *str_p; - if (**str_p == '\0') + if (*str_p++ == '\0') { - *str_p = NULL; + str_p = NULL; ++i; break; } // if - ++(*str_p); } // for - iorb->xferred_length = i; + *len = i; + dev->priv = (void *)str_p; return ENOERR; } // str_read() +static DEVIO_TABLE(devio_table, + NULL, // write + str_read, // read + NULL, // get_config + NULL); // set_config + externC int _vsscanf( const char *s, const char *format, va_list arg ) @@ -113,17 +120,13 @@ externC int // construct a fake device with the address of the string we've // been passed as its private data. This way we can use the data // directly - struct Cyg_Device_Table_t strdev = { "strdev", - (CYG_ADDRWORD) &s, - NULL, // open - NULL, // read_cancel - NULL, // write_cancel - &str_read, // read_blocking - NULL, // write_blocking - NULL, // read_asynchronous - NULL, // write_asynchronous - NULL, // close - 0 }; // ioctl + DEVTAB_ENTRY_NO_INIT(strdev, + "strdev", // Name + NULL, // Dependent name (layered device) + &devio_table, // I/O function table + NULL, // Init + NULL, // Lookup + (void *)s); // private Cyg_StdioStream my_stream( &strdev, Cyg_StdioStream::CYG_STREAM_READ, false, false, _IONBF, 0, NULL ); diff --git a/packages/language/c/libc/current/src/stdio/input/fgetc.cxx b/packages/language/c/libc/current/src/stdio/input/fgetc.cxx --- a/packages/language/c/libc/current/src/stdio/input/fgetc.cxx +++ b/packages/language/c/libc/current/src/stdio/input/fgetc.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/fgets.cxx b/packages/language/c/libc/current/src/stdio/input/fgets.cxx --- a/packages/language/c/libc/current/src/stdio/input/fgets.cxx +++ b/packages/language/c/libc/current/src/stdio/input/fgets.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/fread.cxx b/packages/language/c/libc/current/src/stdio/input/fread.cxx --- a/packages/language/c/libc/current/src/stdio/input/fread.cxx +++ b/packages/language/c/libc/current/src/stdio/input/fread.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/fscanf.cxx b/packages/language/c/libc/current/src/stdio/input/fscanf.cxx --- a/packages/language/c/libc/current/src/stdio/input/fscanf.cxx +++ b/packages/language/c/libc/current/src/stdio/input/fscanf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/gets.cxx b/packages/language/c/libc/current/src/stdio/input/gets.cxx --- a/packages/language/c/libc/current/src/stdio/input/gets.cxx +++ b/packages/language/c/libc/current/src/stdio/input/gets.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/scanf.cxx b/packages/language/c/libc/current/src/stdio/input/scanf.cxx --- a/packages/language/c/libc/current/src/stdio/input/scanf.cxx +++ b/packages/language/c/libc/current/src/stdio/input/scanf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/input/vfscanf.cxx b/packages/language/c/libc/current/src/stdio/input/vfscanf.cxx --- a/packages/language/c/libc/current/src/stdio/input/vfscanf.cxx +++ b/packages/language/c/libc/current/src/stdio/input/vfscanf.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/fnprintf.cxx b/packages/language/c/libc/current/src/stdio/output/fnprintf.cxx --- a/packages/language/c/libc/current/src/stdio/output/fnprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/output/fnprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/fprintf.cxx b/packages/language/c/libc/current/src/stdio/output/fprintf.cxx --- a/packages/language/c/libc/current/src/stdio/output/fprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/output/fprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/fputc.cxx b/packages/language/c/libc/current/src/stdio/output/fputc.cxx --- a/packages/language/c/libc/current/src/stdio/output/fputc.cxx +++ b/packages/language/c/libc/current/src/stdio/output/fputc.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/fputs.cxx b/packages/language/c/libc/current/src/stdio/output/fputs.cxx --- a/packages/language/c/libc/current/src/stdio/output/fputs.cxx +++ b/packages/language/c/libc/current/src/stdio/output/fputs.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/fwrite.cxx b/packages/language/c/libc/current/src/stdio/output/fwrite.cxx --- a/packages/language/c/libc/current/src/stdio/output/fwrite.cxx +++ b/packages/language/c/libc/current/src/stdio/output/fwrite.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/printf.cxx b/packages/language/c/libc/current/src/stdio/output/printf.cxx --- a/packages/language/c/libc/current/src/stdio/output/printf.cxx +++ b/packages/language/c/libc/current/src/stdio/output/printf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx b/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx --- a/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/_exit.cxx b/packages/language/c/libc/current/src/stdlib/_exit.cxx --- a/packages/language/c/libc/current/src/stdlib/_exit.cxx +++ b/packages/language/c/libc/current/src/stdlib/_exit.cxx @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provides POSIX 1003.1 _exit() function // Description: // Usage: // @@ -42,10 +42,7 @@ // CONFIGURATION -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC +#include // C library configuration header // INCLUDES @@ -56,6 +53,7 @@ // (like this one) #include "clibincl/stdlibsupp.hxx" // Support for stdlib functions #ifdef CYGPKG_KERNEL +# include // kernel configuration # include // eCos kernel for thread termination # include // and # include // for stopping the scheduler @@ -66,7 +64,7 @@ // SYMBOLS externC void -_exit( int ) CYGPRI_LIBC_WEAK_ALIAS("__libc__exit") CYGPRI_LIBC_NORETURN; +_exit( int ) CYGBLD_ATTRIB_WEAK_ALIAS(__libc__exit) CYGBLD_ATTRIB_NORET; // FUNCTIONS @@ -102,6 +100,4 @@ externC void } // _exit() -#endif // ifdef CYGPKG_LIBC - // EOF _exit.cxx diff --git a/packages/language/c/libc/current/src/stdlib/abort.cxx b/packages/language/c/libc/current/src/stdlib/abort.cxx --- a/packages/language/c/libc/current/src/stdlib/abort.cxx +++ b/packages/language/c/libc/current/src/stdlib/abort.cxx @@ -22,18 +22,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-18 +// Purpose: Implement the ISO C abort() function from 7.10.4.1 +// Description: This implements abort() simply by raising SIGABRT as +// required by ISO C // Usage: // //####DESCRIPTIONEND#### @@ -44,9 +45,6 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions and support @@ -54,14 +52,30 @@ #include // Header for all stdlib functions // (like this one) +#ifdef CYGPKG_LIBC_SIGNALS +# include +#endif // FUNCTIONS externC void -abort( void ) +__abort( void ) { - CYG_REPORT_FUNCNAME( "abort" ); + CYG_REPORT_FUNCNAME( "__abort" ); + +#ifdef CYGPKG_LIBC_SIGNALS + int rc; + + rc = raise(SIGABRT); + CYG_TRACE1(1, "raise(SIGABRT) returned!!! rc=%d", rc); + + CYG_FAIL("raise(SIGABRT) returned"); + +#endif + + // ISO C clearly says that abort() cannot return to its caller + // loop forever for (;;) CYG_EMPTY_STATEMENT; @@ -69,7 +83,8 @@ abort( void ) CYG_REPORT_RETURN(); } // abort() +// EXPORTED SYMBOLS -#endif // ifdef CYGPKG_LIBC +externC void abort(void) CYGBLD_ATTRIB_WEAK_ALIAS(__abort); // EOF abort.cxx diff --git a/packages/language/c/libc/current/src/stdlib/abs.cxx b/packages/language/c/libc/current/src/stdlib/abs.cxx --- a/packages/language/c/libc/current/src/stdlib/abs.cxx +++ b/packages/language/c/libc/current/src/stdlib/abs.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/atexit.cxx b/packages/language/c/libc/current/src/stdlib/atexit.cxx --- a/packages/language/c/libc/current/src/stdlib/atexit.cxx +++ b/packages/language/c/libc/current/src/stdlib/atexit.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: @@ -44,8 +44,8 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC +// Include atexit() ? +#ifdef CYGFUN_LIBC_ATEXIT // INCLUDES @@ -59,7 +59,7 @@ // SYMBOLS externC int -atexit( Cyg_atexit_fn_t ) CYGPRI_LIBC_WEAK_ALIAS("_atexit"); +atexit( Cyg_libc_atexit_fn_t ) CYGBLD_ATTRIB_WEAK_ALIAS(_atexit); // STATICS @@ -69,7 +69,7 @@ atexit( Cyg_atexit_fn_t ) CYGPRI_LIBC_WE // or you can consider the next free handler slot in // cyg_libc_atexit_handlers. -static Cyg_atexit_fn_t +static Cyg_libc_atexit_fn_t cyg_libc_atexit_handlers[ CYGNUM_LIBC_ATEXIT_HANDLERS ]; static cyg_ucount32 cyg_libc_atexit_handlers_count; @@ -80,8 +80,7 @@ static cyg_ucount32 cyg_libc_atexit_hand externC void cyg_libc_invoke_atexit_handlers( void ) { - CYG_REPORT_FUNCNAMETYPE( "cyg_libc_invoke_atexit_handlers", - "returning" ); + CYG_REPORT_FUNCNAME( "cyg_libc_invoke_atexit_handlers"); CYG_REPORT_FUNCARGVOID(); cyg_ucount32 i; @@ -105,7 +104,7 @@ cyg_libc_invoke_atexit_handlers( void ) externC int -_atexit( Cyg_atexit_fn_t func_to_register ) +_atexit( Cyg_libc_atexit_fn_t func_to_register ) { CYG_REPORT_FUNCNAMETYPE( "_atexit", "returning %d" ); CYG_REPORT_FUNCARG1XV( func_to_register ); @@ -115,7 +114,7 @@ externC int // have we any slots left? if (cyg_libc_atexit_handlers_count >= - sizeof(cyg_libc_atexit_handlers)/sizeof(Cyg_atexit_fn_t) ) { + sizeof(cyg_libc_atexit_handlers)/sizeof(Cyg_libc_atexit_fn_t) ) { CYG_REPORT_RETVAL( 1 ); return 1; // failure @@ -129,6 +128,6 @@ externC int } // _atexit() -#endif // ifdef CYGPKG_LIBC +#endif // ifdef CYGFUN_LIBC_ATEXIT // EOF atexit.cxx diff --git a/packages/language/c/libc/current/src/stdlib/atof.cxx b/packages/language/c/libc/current/src/stdlib/atof.cxx --- a/packages/language/c/libc/current/src/stdlib/atof.cxx +++ b/packages/language/c/libc/current/src/stdlib/atof.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/atoi.cxx b/packages/language/c/libc/current/src/stdlib/atoi.cxx --- a/packages/language/c/libc/current/src/stdlib/atoi.cxx +++ b/packages/language/c/libc/current/src/stdlib/atoi.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/atol.cxx b/packages/language/c/libc/current/src/stdlib/atol.cxx --- a/packages/language/c/libc/current/src/stdlib/atol.cxx +++ b/packages/language/c/libc/current/src/stdlib/atol.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/bsearch.cxx b/packages/language/c/libc/current/src/stdlib/bsearch.cxx --- a/packages/language/c/libc/current/src/stdlib/bsearch.cxx +++ b/packages/language/c/libc/current/src/stdlib/bsearch.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/div.cxx b/packages/language/c/libc/current/src/stdlib/div.cxx --- a/packages/language/c/libc/current/src/stdlib/div.cxx +++ b/packages/language/c/libc/current/src/stdlib/div.cxx @@ -2,8 +2,7 @@ // // div.cxx // -// Real alternative for inline implementation of the ANSI standard -// div() utility function defined in section 7.10.6.2 of the standard +// ISO C implementation for div() utility function // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -23,138 +22,107 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-02 +// Purpose: Provide implementation of div() from ISO C section 7.10.6.2 +// Description: +// Usage: // //####DESCRIPTIONEND#### // //=========================================================================== // -// This code is based on code with the following copyright: -// -/* - * Copyright (c) 1990 Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Chris Torek. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - // CONFIGURATION #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions and support +#include // Assertion support #include // Tracing support // We don't want the inline versions of stdlib functions defined here #ifdef CYGIMP_LIBC_STDLIB_INLINES -#undef CYGIMP_LIBC_STDLIB_INLINES +# undef CYGIMP_LIBC_STDLIB_INLINES #endif #include // NULL, wchar_t and size_t from compiler #include // Main header for stdlib functions -#include "clibincl/stdlibsupp.hxx" // Support for stdlib functions + + +// FUNCTIONS + +externC div_t +__div( int __numer, int __denom ) +{ + div_t __ret; + + CYG_REPORT_FUNCNAMETYPE( "__div", "quotient: %d"); + CYG_REPORT_FUNCARG2DV( __numer, __denom ); + // FIXME: what if they want it handled with SIGFPE? Should have option + CYG_PRECONDITION(__denom != 0, "division by zero attempted!"); + + __ret.quot = __numer / __denom; + __ret.rem = __numer % __denom; + + // But the modulo is implementation-defined for -ve numbers (ISO C 6.3.5) + // and we are required to "round" to zero (ISO C 7.10.6.2) + // + // The cases we have to deal with are inexact division of: + // a) + div + + // b) + div - + // c) - div + + // d) - div - + // + // a) can never go wrong and the quotient and remainder are always positive + // b) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be negative when it + // should be positive or zero + // c) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be positive when it + // should be negative or zero + // d) only goes wrong if the positive quotient has been rounded to + // +infinity - if so then the remainder will be positive when it + // should be negative or zero + // + // So the correct sign of the remainder corresponds to the sign of the + // numerator. Which means we can say that the result needs adjusting + // iff the sign of the numerator is different from the sign of the + // remainder. + // + // You may be interested to know that the Berkeley version of div() + // would get this wrong for (c) and (d) on some targets. + // e.g. for (-5)/4 it could leave the result as -2R3 + + if ((__ret.rem < 0) && (__numer > 0)) { + ++__ret.quot; + __ret.rem -= __denom; + } else if ((__ret.rem > 0) && (__numer < 0)) { + --__ret.quot; + __ret.rem += __denom; + } // else + + CYG_REPORT_RETVAL( __ret.quot ); + + return __ret; +} // __div() // EXPORTED SYMBOLS externC div_t -div( int numer, int denom ) CYGPRI_LIBC_WEAK_ALIAS("_div"); +div( int __numer, int __denom ) CYGBLD_ATTRIB_WEAK_ALIAS(__div); -// FUNCTIONS - -div_t -_div( int numer, int denom ) -{ - div_t result; - - CYG_REPORT_FUNCNAMETYPE( "_div", "quotient: %d"); - CYG_REPORT_FUNCARG2DV( numer, denom ); - - // The ANSI standard says that |r.quot| <= |n/d|, where - // n/d is to be computed in infinite precision. In other - // words, we should always truncate the quotient towards - // 0, never -infinity. - // - // Machine division and remainer may work either way when - // one or both of n or d is negative. If only one is - // negative and r.quot has been truncated towards -inf, - // r.rem will have the same sign as denom and the opposite - // sign of num; if both are negative and r.quot has been - // truncated towards -inf, r.rem will be positive (will - // have the opposite sign of num). These are considered - // `wrong'. - // - // If both are num and denom are positive, r will always - // be positive. - // - // This all boils down to: - // if num >= 0, but r.rem < 0, we got the wrong answer. - // In that case, to get the right answer, add 1 to r.quot and - // subtract denom from r.rem. - - result.quot = numer / denom; - result.rem = numer % denom; - - if ( (numer >= 0) && (result.rem < 0) ) - { - result.quot++; - result.rem -= denom; - } // if - - CYG_REPORT_RETVAL( result.quot ); - - return result; -} // _div() - -#endif // ifdef CYGPKG_LIBC - // EOF div.cxx diff --git a/packages/language/c/libc/current/src/stdlib/exit.cxx b/packages/language/c/libc/current/src/stdlib/exit.cxx --- a/packages/language/c/libc/current/src/stdlib/exit.cxx +++ b/packages/language/c/libc/current/src/stdlib/exit.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: @@ -61,7 +61,7 @@ // SYMBOLS externC void -exit( int ) CYGPRI_LIBC_WEAK_ALIAS("__libc_exit") CYGPRI_LIBC_NORETURN; +exit( int ) CYGBLD_ATTRIB_WEAK_ALIAS(__libc_exit) CYGBLD_ATTRIB_NORET; // FUNCTIONS @@ -75,12 +75,12 @@ externC void // and flush stdio buffers. Anything else is for _exit() (aka // __libc__exit() within the implementation) +#ifdef CYGFUN_LIBC_ATEXIT // we start with the atexit handlers cyg_libc_invoke_atexit_handlers(); +#endif -// we only need to flush stdio if we have buffered I/O. -#if defined(CYGPKG_LIBC_STDIO) && \ - defined(CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO) +#ifdef CYGSEM_LIBC_EXIT_CALLS_FFLUSH int rc; @@ -89,8 +89,6 @@ externC void CYG_TRACE2( rc != 0, "fflush() returned non-zero. It returned %d and " "errno indicates the error: %s", rc, strerror(errno) ); - - #endif __libc__exit( status ); diff --git a/packages/language/c/libc/current/src/stdlib/getenv.cxx b/packages/language/c/libc/current/src/stdlib/getenv.cxx --- a/packages/language/c/libc/current/src/stdlib/getenv.cxx +++ b/packages/language/c/libc/current/src/stdlib/getenv.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-08-31 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/itoa.cxx b/packages/language/c/libc/current/src/stdlib/itoa.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdlib/itoa.cxx @@ -0,0 +1,131 @@ +//======================================================================== +// +// itoa.cxx +// +// FIXME +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-17 +// Purpose: +// Description: +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Assertion infrastructure +#include // Tracing infrastructure +#include // Header for this file +#include // For memcpy() + +// FUNCTIONS + +///////////////////// +// cyg_libc_itoa() // +///////////////////// +// +// This converts num to a string and puts it into s padding with +// "0"'s if padzero is set, or spaces otherwise if necessary. +// The number of chars written to s is returned +// + +// This implementation is probably suboptimal in terms of performance +// but there wouldn't be much in it with only 11 chars max to convert :-/. +// Actually FIXME: what if someone passes a width >11 + +externC cyg_uint8 +cyg_libc_itoa( cyg_uint8 *s, cyg_int32 num, cyg_uint8 width, cyg_bool padzero ) +{ + CYG_REPORT_FUNCNAMETYPE("cyg_libc_itoa", "returning %d"); + CYG_REPORT_FUNCARG4( "s=%08x, num=%d, width=%d, padzero=%d", + s, num, width, padzero ); + + CYG_CHECK_DATA_PTR(s, "input string not a valid pointer"); + + // special case for zero otherwise we'd have to treat it specially later + // on anyway + + if (num==0) { + cyg_ucount8 i; + + for (i=0; i 0)) { + *s++ = '-'; + --width; + num = abs(num); + ++ret; + } + + cyg_ucount32 i; + cyg_bool reachednum = false; + cyg_uint8 c, j; + + // i starts off with factor of 10 digits - which is the string length + // of a positive 32-bit number + for (i=1000000000, j=10; i>0; i/=10, --j) { + c = (num / i); + + if (!reachednum && c==0) { + if (j <= width) { + *s++ = padzero ? '0' : ' '; + ++ret; + } + } // if + else { + *s++ = c + '0'; + ++ret; + reachednum = true; + } + num %= i; + } // for + + CYG_POSTCONDITION(ret >= width, "Didn't output enough chars!"); + + CYG_REPORT_RETVAL(ret); + return ret; +} // cyg_libc_itoa() + +// EOF itoa.cxx diff --git a/packages/language/c/libc/current/src/stdlib/labs.cxx b/packages/language/c/libc/current/src/stdlib/labs.cxx --- a/packages/language/c/libc/current/src/stdlib/labs.cxx +++ b/packages/language/c/libc/current/src/stdlib/labs.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/ldiv.cxx b/packages/language/c/libc/current/src/stdlib/ldiv.cxx --- a/packages/language/c/libc/current/src/stdlib/ldiv.cxx +++ b/packages/language/c/libc/current/src/stdlib/ldiv.cxx @@ -2,8 +2,7 @@ // // ldiv.cxx // -// Real alternative for inline implementation of the ANSI standard -// ldiv() utility function defined in section 7.10.6.4 of the standard +// ISO C implementation for ldiv() utility function // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -23,138 +22,107 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-02 +// Purpose: Provide implementation of ldiv() from ISO C section 7.10.6.4 +// Description: +// Usage: // //####DESCRIPTIONEND#### // //=========================================================================== // -// This code is based on code with the following copyright: -// -/* - * Copyright (c) 1990 Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Chris Torek. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - // CONFIGURATION #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions and support +#include // Assertion support #include // Tracing support // We don't want the inline versions of stdlib functions defined here #ifdef CYGIMP_LIBC_STDLIB_INLINES -#undef CYGIMP_LIBC_STDLIB_INLINES +# undef CYGIMP_LIBC_STDLIB_INLINES #endif #include // NULL, wchar_t and size_t from compiler #include // Main header for stdlib functions -#include "clibincl/stdlibsupp.hxx" // Support for stdlib functions + + +// FUNCTIONS + +externC ldiv_t +__ldiv( long __numer, long __denom ) +{ + ldiv_t __ret; + + CYG_REPORT_FUNCNAMETYPE( "__ldiv", "quotient: %d"); + CYG_REPORT_FUNCARG2DV( __numer, __denom ); + // FIXME: what if they want it handled with SIGFPE? Should have option + CYG_PRECONDITION(__denom != 0, "division by zero attempted!"); + + __ret.quot = __numer / __denom; + __ret.rem = __numer % __denom; + + // But the modulo is implementation-defined for -ve numbers (ISO C 6.3.5) + // and we are required to "round" to zero (ISO C 7.10.6.2) + // + // The cases we have to deal with are inexact division of: + // a) + div + + // b) + div - + // c) - div + + // d) - div - + // + // a) can never go wrong and the quotient and remainder are always positive + // b) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be negative when it + // should be positive or zero + // c) only goes wrong if the negative quotient has been "rounded" to + // -infinity - if so then the remainder will be positive when it + // should be negative or zero + // d) only goes wrong if the positive quotient has been rounded to + // +infinity - if so then the remainder will be positive when it + // should be negative or zero + // + // So the correct sign of the remainder corresponds to the sign of the + // numerator. Which means we can say that the result needs adjusting + // iff the sign of the numerator is different from the sign of the + // remainder. + // + // You may be interested to know that the Berkeley version of ldiv() + // would get this wrong for (c) and (d) on some targets. + // e.g. for (-5)/4 it could leave the result as -2R3 + + if ((__ret.rem < 0) && (__numer > 0)) { + ++__ret.quot; + __ret.rem -= __denom; + } else if ((__ret.rem > 0) && (__numer < 0)) { + --__ret.quot; + __ret.rem += __denom; + } // else + + CYG_REPORT_RETVAL( __ret.quot ); + + return __ret; +} // __ldiv() // EXPORTED SYMBOLS externC ldiv_t -ldiv( long numer, long denom ) CYGPRI_LIBC_WEAK_ALIAS("_ldiv"); +ldiv( long __numer, long __denom ) CYGBLD_ATTRIB_WEAK_ALIAS(__ldiv); -// FUNCTIONS - -ldiv_t -_ldiv( long numer, long denom ) -{ - ldiv_t result; - - CYG_REPORT_FUNCNAMETYPE( "_ldiv", "quotient: %d"); - CYG_REPORT_FUNCARG2( "numer=%d, denom=%d", numer, denom ); - - // The ANSI standard says that |r.quot| <= |n/d|, where - // n/d is to be computed in infinite precision. In other - // words, we should always truncate the quotient towards - // 0, never -infinity. - // - // Machine ldivision and remainer may work either way when - // one or both of n or d is negative. If only one is - // negative and r.quot has been truncated towards -inf, - // r.rem will have the same sign as denom and the opposite - // sign of num; if both are negative and r.quot has been - // truncated towards -inf, r.rem will be positive (will - // have the opposite sign of num). These are considered - // `wrong'. - // - // If both are num and denom are positive, r will always - // be positive. - // - // This all boils down to: - // if num >= 0, but r.rem < 0, we got the wrong answer. - // In that case, to get the right answer, add 1 to r.quot and - // subtract denom from r.rem. - - result.quot = numer / denom; - result.rem = numer % denom; - - if ( (numer >= 0) && (result.rem < 0) ) - { - result.quot++; - result.rem -= denom; - } // if - - CYG_REPORT_RETVAL( result.quot ); - - return result; -} // _ldiv() - -#endif // ifdef CYGPKG_LIBC - // EOF ldiv.cxx diff --git a/packages/language/c/libc/current/src/stdlib/malloc.cxx b/packages/language/c/libc/current/src/stdlib/malloc.cxx --- a/packages/language/c/libc/current/src/stdlib/malloc.cxx +++ b/packages/language/c/libc/current/src/stdlib/malloc.cxx @@ -2,7 +2,7 @@ // // malloc.cxx // -// Implementation of ANSI standard allocation routines +// Implementation of ISO C memory allocation routines // //======================================================================== //####COPYRIGHTBEGIN#### @@ -22,19 +22,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: Implementation of ANSI standard allocation routines as per -// ANSI section 7.10.3 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provides ISO C calloc(), malloc(), realloc() and free() +// functions +// Description: Implementation of ANSI standard allocation routines as per +// ISO C section 7.10.3 // Usage: // //####DESCRIPTIONEND#### @@ -45,10 +46,7 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - -// And do we want these functions? +// Do we want these functions? #ifdef CYGPKG_LIBC_MALLOC // INCLUDES @@ -58,6 +56,7 @@ #include // Common assertion support #include // For memset() and memcpy() #include // header for this file +#include // kernel configuration #include // Kernel variable size block allocator #include "clibincl/stdlibsupp.hxx" // Additional support for stdlib stuff @@ -66,26 +65,29 @@ // EXPORTED SYMBOLS externC void * -calloc( size_t, size_t ) CYGPRI_LIBC_WEAK_ALIAS("_calloc"); +calloc( size_t, size_t ) CYGBLD_ATTRIB_WEAK_ALIAS(_calloc); externC void -free( void * ) CYGPRI_LIBC_WEAK_ALIAS("_free"); +free( void * ) CYGBLD_ATTRIB_WEAK_ALIAS(_free); externC void * -malloc( size_t ) CYGPRI_LIBC_WEAK_ALIAS("_malloc"); +malloc( size_t ) CYGBLD_ATTRIB_WEAK_ALIAS(_malloc); externC void * -realloc( void *, size_t ) CYGPRI_LIBC_WEAK_ALIAS("_realloc"); +realloc( void *, size_t ) CYGBLD_ATTRIB_WEAK_ALIAS(_realloc); // STATIC VARIABLES -// the data space for the memory pool -static cyg_uint8 pooldata[ CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE ]; +// the data space for the memory pool - can be externally overriden +// FIXME: but should be in different file for this to work +cyg_uint8 cyg_libc_malloc_memorypool[ CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE ] + CYGBLD_ATTRIB_WEAK; // the memory pool object itself static Cyg_Mempool_Variable pool CYG_INIT_PRIORITY( LIBC ) = -Cyg_Mempool_Variable( pooldata, CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE ); +Cyg_Mempool_Variable( cyg_libc_malloc_memorypool, + CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE ); // FUNCTIONS @@ -218,6 +220,4 @@ externC void * #endif // ifdef CYGPKG_LIBC_MALLOC -#endif // ifdef CYGPKG_LIBC - // EOF malloc.cxx diff --git a/packages/language/c/libc/current/src/stdlib/qsort.cxx b/packages/language/c/libc/current/src/stdlib/qsort.cxx --- a/packages/language/c/libc/current/src/stdlib/qsort.cxx +++ b/packages/language/c/libc/current/src/stdlib/qsort.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -192,7 +192,7 @@ void char *pa, *pb, *pc, *pd, *pl, *pm, *pn; int d, r, swaptype, swap_cnt; - CYG_REPORT_FUNCNAMETYPE( "_qsort", "returning" ); + CYG_REPORT_FUNCNAME( "_qsort" ); CYG_REPORT_FUNCARG4( "base=%08x, nmemb=%d, size=%d, compar=%08x", base, nmemb, size, compar ); diff --git a/packages/language/c/libc/current/src/stdlib/rand.cxx b/packages/language/c/libc/current/src/stdlib/rand.cxx --- a/packages/language/c/libc/current/src/stdlib/rand.cxx +++ b/packages/language/c/libc/current/src/stdlib/rand.cxx @@ -2,7 +2,7 @@ // // rand.cxx // -// ANSI and POSIX 1003.1 standard random number generation functions +// ISO and POSIX 1003.1 standard random number generation functions // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,20 +22,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: This implements rand() and srand() of section 7.10.2.1 of -// the ANSI standard. Also rand_r() defined in section 8.3.8 -// of the POSIX 1003.1 standard +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1990-01-20 +// Purpose: Provides ISO C rand() and srand() functions, along with +// POSIX 1003.1 rand_r() function +// Description: This implements rand() and srand() of section 7.10.2.1 of +// the ISO C standard. Also rand_r() defined in section 8.3.8 +// of the POSIX 1003.1 standard // Usage: // //####DESCRIPTIONEND#### @@ -46,9 +47,6 @@ #include // Configuration header -// Include the C library? -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) - // INCLUDES #include // Common type definitions and support @@ -57,8 +55,13 @@ #include // Header for all stdlib functions // (like this one) #include "clibincl/stdlibsupp.hxx" // Support for stdlib functions -#include "clibincl/clibdata.hxx" // Header for thread-specific data such - // as random seed + +#ifdef CYGSEM_LIBC_PER_THREAD_RAND +# include // kernel configuration +# include // per-thread data +# include // per-thread data +# include // mutexes +#endif // TRACE @@ -73,34 +76,68 @@ static int rand_trace = CYGNUM_LIBC_RAND // EXPORTED SYMBOLS externC int -rand( void ) CYGPRI_LIBC_WEAK_ALIAS("_rand"); +rand( void ) CYGBLD_ATTRIB_WEAK_ALIAS(_rand); externC int -rand_r( unsigned int *seed ) CYGPRI_LIBC_WEAK_ALIAS("_rand_r"); +rand_r( unsigned int *seed ) CYGBLD_ATTRIB_WEAK_ALIAS(_rand_r); externC void -srand( unsigned int seed ) CYGPRI_LIBC_WEAK_ALIAS("_srand"); +srand( unsigned int seed ) CYGBLD_ATTRIB_WEAK_ALIAS(_srand); + + +// STATICS +#ifdef CYGSEM_LIBC_PER_THREAD_RAND +static cyg_ucount32 rand_data_index=CYGNUM_KERNEL_THREADS_DATA_MAX; +static Cyg_Mutex rand_data_mutex CYG_INIT_PRIORITY(LIBC); +#else +static unsigned int cyg_libc_rand_seed = CYGNUM_LIBC_RAND_SEED; +#endif // FUNCTIONS int _rand( void ) { - Cyg_CLibInternalData::Cyg_rand_seed_t *seed_p; + unsigned int *seed_p; int retval; CYG_REPORT_FUNCNAMETYPE( "_rand", "returning %d" ); - CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE; + // get seed for this thread (if relevant ) +#ifdef CYGSEM_LIBC_PER_THREAD_RAND + Cyg_Thread *self = Cyg_Thread::self(); + + // Get a per-thread data slot if we haven't got one already + // Do a simple test before locking and retrying test, as this is a + // rare situation + if (CYGNUM_KERNEL_THREADS_DATA_MAX==rand_data_index) { + rand_data_mutex.lock(); + if (CYGNUM_KERNEL_THREADS_DATA_MAX==rand_data_index) { - // get seed for this thread (if relevant ) - seed_p = CYGPRI_LIBC_INTERNAL_DATA.get_rand_seed_p(); + // the kernel just throws an assert if this doesn't work + // FIXME: Should use real CDL to pre-allocate a slot at compile + // time to ensure there are enough slots + rand_data_index = self->new_data_index(); + + // Initialize seed + self->set_data(rand_data_index, CYGNUM_LIBC_RAND_SEED); + } + rand_data_mutex.unlock(); + } // if + + // we have a valid index now + + seed_p = (unsigned int *)self->get_data_ptr(rand_data_index); +#else + seed_p = &cyg_libc_rand_seed; +#endif CYG_TRACE2( TL1, "Retrieved seed address %08x containing %d", seed_p, *seed_p ); + CYG_CHECK_DATA_PTR( seed_p, "Help! Returned address of seed is invalid!" ); - retval = _rand_r( (unsigned int *) seed_p ); + retval = _rand_r( seed_p ); CYG_REPORT_RETVAL( retval ); @@ -118,10 +155,56 @@ int CYG_CHECK_DATA_PTR( seed, "pointer to seed invalid!" ); +#if defined(CYGIMP_LIBC_RAND_SIMPLEST) + + // This algorithm sucks in the lower bits + *seed = (*seed * 1103515245) + 12345; // permutate seed retval = (int)( *seed & RAND_MAX ); +#elif defined(CYGIMP_LIBC_RAND_SIMPLE1) + + // The above algorithm sucks in the lower bits, so we shave them off + // and repeat a couple of times to make it up + + unsigned int s=*seed; + unsigned int uret; + + s = (s * 1103515245) + 12345; // permutate seed + // Only use top 11 bits + uret = s & 0xffe00000; + + s = (s * 1103515245) + 12345; // permutate seed + // Only use top 14 bits + uret += (s & 0xfffc0000) >> 11; + + s = (s * 1103515245) + 12345; // permutate seed + // Only use top 7 bits + uret += (s & 0xfe000000) >> (11+14); + + retval = (int)(uret & RAND_MAX); + *seed = s; + +#elif defined(CYGIMP_LIBC_RAND_KNUTH1) + +// This is the code supplied in Knuth Vol 2 section 3.6 p.185 bottom + +#define MM 2147483647 // a Mersenne prime +#define AA 48271 // this does well in the spectral test +#define QQ 44488 // (long)(MM/AA) +#define RR 3399 // MM % AA; it is important that RRnew_data_index(); - *seed_p = (Cyg_CLibInternalData::Cyg_rand_seed_t) seed; + } + rand_data_mutex.unlock(); + } // if + + // we have a valid index now + + self->set_data(rand_data_index, (CYG_ADDRWORD) seed); +#else + cyg_libc_rand_seed = seed; +#endif CYG_REPORT_RETURN(); } // _srand() - -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) - // EOF rand.cxx diff --git a/packages/language/c/libc/current/src/stdlib/strtod.cxx b/packages/language/c/libc/current/src/stdlib/strtod.cxx --- a/packages/language/c/libc/current/src/stdlib/strtod.cxx +++ b/packages/language/c/libc/current/src/stdlib/strtod.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/strtol.cxx b/packages/language/c/libc/current/src/stdlib/strtol.cxx --- a/packages/language/c/libc/current/src/stdlib/strtol.cxx +++ b/packages/language/c/libc/current/src/stdlib/strtol.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/strtoul.cxx b/packages/language/c/libc/current/src/stdlib/strtoul.cxx --- a/packages/language/c/libc/current/src/stdlib/strtoul.cxx +++ b/packages/language/c/libc/current/src/stdlib/strtoul.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/stdlib/system.cxx b/packages/language/c/libc/current/src/stdlib/system.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/stdlib/system.cxx @@ -0,0 +1,60 @@ +//======================================================================== +// +// system.cxx +// +// Implementation of ISO C system() function from section 7.10.4.5 +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-04 +// Purpose: This file implements the ISO C system() function +// Description: This file provides a trivial implementation of the +// system() function from ISO C section 7.10.4.5. It +// simply exists to show that a command processor is +// not available +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// INCLUDES + +#include // Header for this file + +// FUNCTIONS + +extern "C" int +__system( const char * ) +{ + return 0; +} // system() + +extern "C" int system( const char * ) CYGBLD_ATTRIB_WEAK_ALIAS(__system); + +// EOF system.cxx diff --git a/packages/language/c/libc/current/src/string/memchr.cxx b/packages/language/c/libc/current/src/string/memchr.cxx --- a/packages/language/c/libc/current/src/string/memchr.cxx +++ b/packages/language/c/libc/current/src/string/memchr.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -75,6 +75,8 @@ void * #if defined(CYGIMP_LIBC_STRING_PREFER_SMALL_TO_FAST) || defined(__OPTIMIZE_SIZE__) const unsigned char *src = (const unsigned char *) s; + c &= 0xff; + while (n--) { if (*src == c) @@ -92,6 +94,8 @@ void * CYG_WORD buffer; CYG_WORD mask; cyg_ucount8 i; + + c &= 0xff; // If the size is small, or src is unaligned, then // use the bytewise loop. We can hope this is rare. diff --git a/packages/language/c/libc/current/src/string/memcmp.cxx b/packages/language/c/libc/current/src/string/memcmp.cxx --- a/packages/language/c/libc/current/src/string/memcmp.cxx +++ b/packages/language/c/libc/current/src/string/memcmp.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/memmove.cxx b/packages/language/c/libc/current/src/string/memmove.cxx --- a/packages/language/c/libc/current/src/string/memmove.cxx +++ b/packages/language/c/libc/current/src/string/memmove.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strcat.cxx b/packages/language/c/libc/current/src/string/strcat.cxx --- a/packages/language/c/libc/current/src/string/strcat.cxx +++ b/packages/language/c/libc/current/src/string/strcat.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strchr.cxx b/packages/language/c/libc/current/src/string/strchr.cxx --- a/packages/language/c/libc/current/src/string/strchr.cxx +++ b/packages/language/c/libc/current/src/string/strchr.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strcmp.cxx b/packages/language/c/libc/current/src/string/strcmp.cxx --- a/packages/language/c/libc/current/src/string/strcmp.cxx +++ b/packages/language/c/libc/current/src/string/strcmp.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strcoll.cxx b/packages/language/c/libc/current/src/string/strcoll.cxx --- a/packages/language/c/libc/current/src/string/strcoll.cxx +++ b/packages/language/c/libc/current/src/string/strcoll.cxx @@ -23,7 +23,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -31,7 +31,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strcpy.cxx b/packages/language/c/libc/current/src/string/strcpy.cxx --- a/packages/language/c/libc/current/src/string/strcpy.cxx +++ b/packages/language/c/libc/current/src/string/strcpy.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strcspn.cxx b/packages/language/c/libc/current/src/string/strcspn.cxx --- a/packages/language/c/libc/current/src/string/strcspn.cxx +++ b/packages/language/c/libc/current/src/string/strcspn.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strlen.cxx b/packages/language/c/libc/current/src/string/strlen.cxx --- a/packages/language/c/libc/current/src/string/strlen.cxx +++ b/packages/language/c/libc/current/src/string/strlen.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strncat.cxx b/packages/language/c/libc/current/src/string/strncat.cxx --- a/packages/language/c/libc/current/src/string/strncat.cxx +++ b/packages/language/c/libc/current/src/string/strncat.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strncmp.cxx b/packages/language/c/libc/current/src/string/strncmp.cxx --- a/packages/language/c/libc/current/src/string/strncmp.cxx +++ b/packages/language/c/libc/current/src/string/strncmp.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strncpy.cxx b/packages/language/c/libc/current/src/string/strncpy.cxx --- a/packages/language/c/libc/current/src/string/strncpy.cxx +++ b/packages/language/c/libc/current/src/string/strncpy.cxx @@ -2,7 +2,7 @@ // // strncpy.cxx // -// ANSI standard strncpy() routine +// ISO C standard strncpy() routine // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-18 // Purpose: // Description: // Usage: @@ -44,9 +44,6 @@ #include // Configuration header -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES #include // Common type definitions @@ -61,7 +58,7 @@ externC char * strncpy( char *s1, const char *s2, size_t n ) \ - CYGPRI_LIBC_WEAK_ALIAS("_strncpy"); + CYGBLD_ATTRIB_WEAK_ALIAS(_strncpy); // FUNCTIONS @@ -98,37 +95,25 @@ char * CYG_WORD *aligned_dst; const CYG_WORD *aligned_src; - // If SRC or DEST is unaligned, then copy bytes. - if (CYG_LIBC_STR_OPT_TOO_SMALL (n) || CYG_LIBC_STR_UNALIGNED2 (src, dst)) - { - while (n > 0) - { - --n; - if ((*dst++ = *src++) == '\0') - break; - } - - while (n -- > 0) - *dst++ = '\0'; - - CYG_REPORT_RETVAL( s1 ); + // If SRC and DEST is aligned and count large enough, then copy words. + if (!CYG_LIBC_STR_UNALIGNED2 (src, dst) && + !CYG_LIBC_STR_OPT_TOO_SMALL (n)) { + + aligned_dst = (CYG_WORD *)dst; + aligned_src = (CYG_WORD *)src; - return s1; - } - - aligned_dst = (CYG_WORD *)dst; - aligned_src = (const CYG_WORD *)src; - - // SRC and DEST are both "CYG_WORD" aligned, try to do "CYG_WORD" - // sized copies. - while (n >= sizeof (CYG_WORD) && !CYG_LIBC_STR_DETECTNULL(*aligned_src)) - { - n -= sizeof (CYG_WORD); - *aligned_dst++ = *aligned_src++; - } - - dst = (char *)aligned_dst; - src = (const char *)aligned_src; + // SRC and DEST are both "CYG_WORD" aligned, try to do "CYG_WORD" + // sized copies. + while (n >= sizeof (CYG_WORD) && + !CYG_LIBC_STR_DETECTNULL(*aligned_src)) { + + n -= sizeof (CYG_WORD); + *aligned_dst++ = *aligned_src++; + } + + dst = (char *)aligned_dst; + src = (const char *)aligned_src; + } // if while (n > 0) { @@ -147,6 +132,4 @@ char * // defined(__OPTIMIZE_SIZE__) } // _strncpy() -#endif // ifdef CYGPKG_LIBC - // EOF strncpy.cxx diff --git a/packages/language/c/libc/current/src/string/strpbrk.cxx b/packages/language/c/libc/current/src/string/strpbrk.cxx --- a/packages/language/c/libc/current/src/string/strpbrk.cxx +++ b/packages/language/c/libc/current/src/string/strpbrk.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -81,7 +81,7 @@ char * return (char *) NULL; } // if - while (*s1) + do { for (c = s2; *c; c++) { @@ -92,6 +92,7 @@ char * break; s1++; } + while (*s1); if (*c == '\0') s1 = NULL; diff --git a/packages/language/c/libc/current/src/string/strrchr.cxx b/packages/language/c/libc/current/src/string/strrchr.cxx --- a/packages/language/c/libc/current/src/string/strrchr.cxx +++ b/packages/language/c/libc/current/src/string/strrchr.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strspn.cxx b/packages/language/c/libc/current/src/string/strspn.cxx --- a/packages/language/c/libc/current/src/string/strspn.cxx +++ b/packages/language/c/libc/current/src/string/strspn.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strstr.cxx b/packages/language/c/libc/current/src/string/strstr.cxx --- a/packages/language/c/libc/current/src/string/strstr.cxx +++ b/packages/language/c/libc/current/src/string/strstr.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strsuppt.cxx b/packages/language/c/libc/current/src/string/strsuppt.cxx --- a/packages/language/c/libc/current/src/string/strsuppt.cxx +++ b/packages/language/c/libc/current/src/string/strsuppt.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/string/strtok.cxx b/packages/language/c/libc/current/src/string/strtok.cxx --- a/packages/language/c/libc/current/src/string/strtok.cxx +++ b/packages/language/c/libc/current/src/string/strtok.cxx @@ -2,7 +2,7 @@ // // strtok.cxx // -// ANSI standard strtok() routine +// ISO standard strtok() routine // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,17 +22,17 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-19 +// Purpose: Provide ISO C strtok() and POSIX strtok_r() routines // Description: // Usage: // @@ -80,9 +80,6 @@ #include // Configuration header -// Include the C library? And do we want strtok() at all? -#if defined(CYGPKG_LIBC) && defined(CYGFUN_LIBC_strtok) - // INCLUDES #include // Common type definitions @@ -92,16 +89,22 @@ #include // Compiler definitions such as size_t, NULL etc. #include "clibincl/stringsupp.hxx" // Useful string function support and // prototypes -#include "clibincl/clibdata.hxx" // C library internal data + +#ifdef CYGSEM_LIBC_PER_THREAD_STRTOK +# include // kernel configuration +# include // per-thread data +# include // per-thread data +# include // mutexes +#endif // EXPORTED SYMBOLS externC char * -strtok( char *s1, const char *s2 ) CYGPRI_LIBC_WEAK_ALIAS("_strtok"); +strtok( char *s1, const char *s2 ) CYGBLD_ATTRIB_WEAK_ALIAS(_strtok); externC char * strtok_r( char *s1, const char *s2, char **lasts ) \ - CYGPRI_LIBC_WEAK_ALIAS("_strtok_r"); + CYGBLD_ATTRIB_WEAK_ALIAS(_strtok_r); // TRACE @@ -112,6 +115,14 @@ static int strtok_trace = CYGNUM_LIBC_ST # define TL1 (0) #endif +// STATICS + +#ifdef CYGSEM_LIBC_PER_THREAD_STRTOK +static cyg_ucount32 strtok_data_index=CYGNUM_KERNEL_THREADS_DATA_MAX; +static Cyg_Mutex strtok_data_mutex CYG_INIT_PRIORITY(LIBC); +#else +static char *cyg_libc_strtok_last; +#endif // FUNCTIONS @@ -128,9 +139,31 @@ char * CYG_CHECK_DATA_PTR( s1, "s1 is not a valid pointer!" ); CYG_CHECK_DATA_PTR( s2, "s2 is not a valid pointer!" ); - CYGPRI_LIBC_INTERNAL_DATA_ALLOC_CHECK_PREAMBLE; +#ifdef CYGSEM_LIBC_PER_THREAD_STRTOK + Cyg_Thread *self = Cyg_Thread::self(); + + // Get a per-thread data slot if we haven't got one already + // Do a simple test before locking and retrying test, as this is a + // rare situation + if (CYGNUM_KERNEL_THREADS_DATA_MAX==strtok_data_index) { + strtok_data_mutex.lock(); + if (CYGNUM_KERNEL_THREADS_DATA_MAX==strtok_data_index) { - lasts = CYGPRI_LIBC_INTERNAL_DATA.get_strtok_last_p(); + // the kernel just throws an assert if this doesn't work + // FIXME: Should use real CDL to pre-allocate a slot at compile + // time to ensure there are enough slots + strtok_data_index = self->new_data_index(); + + } + strtok_data_mutex.unlock(); + } // if + + // we have a valid index now + + lasts = (char **)self->get_data_ptr(strtok_data_index); +#else + lasts = &cyg_libc_strtok_last; +#endif CYG_TRACE2( TL1, "Retrieved strtok_last address %08x containing %s", lasts, *lasts ); @@ -206,6 +239,4 @@ cont: // NOTREACHED } // _strtok_r() -#endif // if defined(CYGPKG_LIBC) && defined(CYGFUN_LIBC_strtok) - // EOF strtok.cxx diff --git a/packages/language/c/libc/current/src/string/strxfrm.cxx b/packages/language/c/libc/current/src/string/strxfrm.cxx --- a/packages/language/c/libc/current/src/string/strxfrm.cxx +++ b/packages/language/c/libc/current/src/string/strxfrm.cxx @@ -22,7 +22,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### @@ -30,7 +30,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libc/current/src/support/clibdata.cxx b/packages/language/c/libc/current/src/support/clibdata.cxx deleted file mode 100644 --- a/packages/language/c/libc/current/src/support/clibdata.cxx +++ /dev/null @@ -1,130 +0,0 @@ -//======================================================================== -// -// clibdata.cxx -// -// C library internal data support module -// -//======================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//======================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: -// Usage: -// -//####DESCRIPTIONEND#### -// -//========================================================================= - -// CONFIGURATION - -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC - -// INCLUDES - -#include // Common project-wide type definitions -#include // FILE and fopen() -#include "clibincl/stream.hxx" // Internal per-file class -#include "clibincl/clibdata.hxx" // Header and class definition for this - // file - -#ifdef CYGPKG_LIBC_STDIO -# include "clibincl/stdiosupp.hxx" // Support for stdio -#endif - -// GLOBAL VARIABLES - -#ifndef CYGSEM_LIBC_THREAD_SAFETY -// No thread support means use a global structure -Cyg_CLibInternalData cyg_my_clib_internal_data; -#endif // ifndef CYGSEM_LIBC_THREAD_SAFETY - - -#ifdef CYGPKG_LIBC_STDIO -Cyg_StdioStream *Cyg_CLibInternalData::files[FOPEN_MAX-3]; -# ifdef CYGSEM_LIBC_STDIO_THREAD_SAFE_STREAMS -Cyg_Mutex Cyg_CLibInternalData::files_lock; -# endif -#endif // ifdef CYGPKG_LIBC_STDIO - -#ifdef CYGFUN_LIBC_strtok -# ifndef CYGSEM_LIBC_PER_THREAD_STRTOK -char *Cyg_CLibInternalData::strtok_last; -# endif -#endif - -#ifdef CYGPKG_LIBC_RAND -# ifndef CYGSEM_LIBC_PER_THREAD_RAND -Cyg_CLibInternalData::Cyg_rand_seed_t Cyg_CLibInternalData::rand_seed; -# endif -#endif - -#ifdef CYGPKG_LIBC_ENVIRONMENT - -// The global environment. The default can be configured in -// -externC char *environ[]; - -char *environ[] = CYGDAT_LIBC_DEFAULT_ENVIRONMENT ; - -#endif - - -// STATIC INITIALISATION - -#ifdef CYGPKG_LIBC_STDIO - -static Cyg_StdioStream cyg_stdio_stdin( - Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), - Cyg_StdioStream::CYG_STREAM_READ, false, false, _IOLBF ); - -static Cyg_StdioStream cyg_stdio_stdout( - Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), - Cyg_StdioStream::CYG_STREAM_WRITE, false, false, _IOLBF ); - - -static Cyg_StdioStream cyg_stdio_stderr( - Cyg_libc_stdio_find_filename(CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE), - Cyg_StdioStream::CYG_STREAM_WRITE, false, false, _IONBF, 0, NULL ); - - -Cyg_StdioStream *Cyg_CLibInternalData::stdin = &cyg_stdio_stdin; -Cyg_StdioStream *Cyg_CLibInternalData::stdout = &cyg_stdio_stdout; -Cyg_StdioStream *Cyg_CLibInternalData::stderr = &cyg_stdio_stderr; - -FILE *stdin = (FILE *)&cyg_stdio_stdin; -FILE *stdout = (FILE *)&cyg_stdio_stdout; -FILE *stderr = (FILE *)&cyg_stdio_stderr; - -#endif // CYGPKG_LIBC_STDIO - -#endif // ifdef CYGPKG_LIBC - -// EOF clibdata.cxx diff --git a/packages/language/c/libc/current/src/support/cstartup.cxx b/packages/language/c/libc/current/src/support/cstartup.cxx --- a/packages/language/c/libc/current/src/support/cstartup.cxx +++ b/packages/language/c/libc/current/src/support/cstartup.cxx @@ -2,7 +2,7 @@ // // cstartup.cxx // -// Starting C library support +// Support for startup of ISO C environment // //======================================================================== //####COPYRIGHTBEGIN#### @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-08-27 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 // Purpose: // Description: // Usage: @@ -42,19 +42,15 @@ // CONFIGURATION -#include // Configuration header - -// Include the C library? -#ifdef CYGPKG_LIBC +#include // C library configuration // INCLUDES -#include // Common type definitions and support -#include // Common tracing support -#include // Common assertion support -#include "clibincl/stdlibsupp.hxx" // __libc_exit() ( i.e. exit() ) +#include // Common type definitions and support +#include // Common tracing support #ifdef CYGPKG_KERNEL +# include // eCos kernel configuration # include // eCos thread support # include #endif @@ -62,105 +58,33 @@ // FUNCTION PROTOTYPES -// We provide a weakly named main to allow this to link if the user -// doesn't provide their own main. This isn't strictly good behaviour, -// but if the user wants good performance then of _course_ they should -// play with the config options and this won't be called. Or it might -// be "giving them enough rope" etc. :-) - -// The definition of the normal user-supplied main() is here aliased -// to a dummy main function. It isn't called main itself in order to -// throw GDB off the scent, which otherwise gets confused. These -// attributes have no effect on a user-supplied main() if one is supplied - -externC int -cyg_libc_dummy_main( int argc, char *argv[] ); +externC void +cyg_libc_invoke_main( CYG_ADDRWORD ); -externC int -main( int argc, char *argv[] ) - CYGPRI_LIBC_WEAK_ALIAS("cyg_libc_dummy_main"); - -static inline void -invoke_main( CYG_ADDRWORD ); - -// STATICS - -#ifdef CYGPKG_KERNEL -static cyg_uint8 main_stack[ CYGNUM_LIBC_MAIN_STACK_SIZE ]; - - -// GLOBALS +// EXTERNS // let the main thread be global so people can play with it (e.g. suspend // or resume etc.) if that's what they want to do -Cyg_Thread cyg_libc_main_thread( &invoke_main, (CYG_ADDRWORD) 0, - CYGNUM_LIBC_MAIN_STACK_SIZE, - (CYG_ADDRESS) &main_stack ); +#ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD +extern Cyg_Thread cyg_libc_main_thread; #endif - // FUNCTIONS -externC int -cyg_libc_dummy_main( int argc, char *argv[] ) -{ - CYG_REPORT_FUNCNAMETYPE("main", "returning %d" ); - - // try to be helpful by diagnosing malformed arguments - CYG_PRECONDITION( argv != NULL, "argv is NULL!" ); - CYG_PRECONDITION( argv[argc] == NULL, "argv[argc] isn't NULL!" ); - - CYG_REPORT_FUNCARG2("argc=%d, argv[0]=%s", argc, - (argv[0]==NULL) ? "NULL" : argv[0] ); - - CYG_TRACE0( true, "This is the system-supplied default main()" ); - - CYG_REPORT_RETVAL(0); - return 0; // some CPUs have 0 hard-wired - faster than a reg -} - -// Making invoke_main() static inline has no effect if the kernel is -// present, and makes it inline if not! Cor. -static inline void -invoke_main( CYG_ADDRWORD ) -{ - CYG_REPORT_FUNCNAME( "invoke_main" ); - CYG_REPORT_FUNCARG1( "argument is %s", "ignored" ); - - // argv[argc] must be NULL according to the ISO C standard 5.1.2.2.1 - char *temp_argv[] = CYGDAT_LIBC_ARGUMENTS ; - int rc; - - rc = main( (sizeof(temp_argv)/sizeof(char *)) - 1, &temp_argv[0] ); - - CYG_TRACE1( true, "main() has returned with code %d. Calling exit()", - rc ); - - __libc_exit(rc); - - CYG_FAIL( "__libc_exit() returned!!!" ); - - CYG_REPORT_RETURN(); - -} // invoke_main(); - externC void cyg_iso_c_start( void ) { CYG_REPORT_FUNCNAME( "cyg_iso_c_start" ); CYG_REPORT_FUNCARGVOID(); -#ifdef CYGPKG_KERNEL +#ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD CYG_TRACE0( true, "Resuming cyg_libc_main_thread" ); cyg_libc_main_thread.resume(); #else - invoke_main(0); + cyg_libc_invoke_main(0); #endif CYG_REPORT_RETURN(); } // cyg_iso_c_start() - -#endif // ifdef CYGPKG_LIBC - // EOF cstartup.cxx diff --git a/packages/language/c/libc/current/src/support/environ.cxx b/packages/language/c/libc/current/src/support/environ.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/support/environ.cxx @@ -0,0 +1,67 @@ +//======================================================================== +// +// environ.cxx +// +// C library definition and allocation of POSIX 1003.1 environ +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provide extern char **environ as required by POSIX 1003.1 +// Description: C library definition and allocation of POSIX 1003.1 environ +// Usage: You can override environ at startup if you wish simply +// by redefining yourself. Setting the libc.h configuration +// option is the intended method though. +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +#ifdef CYGPKG_LIBC_ENVIRONMENT + +// GLOBALS + +// The global environment. The default can be configured in +// + +static char * const +cyg_libc_default_environ[] = CYGDAT_LIBC_DEFAULT_ENVIRONMENT; + +char **environ CYGBLD_ATTRIB_WEAK = (char **)cyg_libc_default_environ; + +#endif + +// EOF environ.cxx diff --git a/packages/language/c/libc/current/src/support/invokemain.cxx b/packages/language/c/libc/current/src/support/invokemain.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/support/invokemain.cxx @@ -0,0 +1,95 @@ +//======================================================================= +// +// invokemain.cxx +// +// Support for startup of ISO C environment +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provide entry point for thread which then calls main() +// Description: cyg_libc_invoke_main() is used as the entry point for +// the thread object that is created to call the +// user-supplied main() function. It sets up the arguments +// (if any) and invokes exit() if main() returns +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Common tracing support +#include // Common assertion support +#include "clibincl/stdlibsupp.hxx" // __libc_exit() ( i.e. exit() ) + +// FUNCTION PROTOTYPES + +externC int +main( int argc, char *argv[] ); + +externC void +cyg_hal_invoke_constructors(void); + +// FUNCTIONS + +externC void +cyg_libc_invoke_main( CYG_ADDRWORD ) +{ + CYG_REPORT_FUNCNAME( "cyg_libc_invoke_main" ); + CYG_REPORT_FUNCARG1( "argument is %s", "ignored" ); + +#ifdef CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS + // finish invoking constructors that weren't called by default + cyg_hal_invoke_constructors(); +#endif + + // argv[argc] must be NULL according to the ISO C standard 5.1.2.2.1 + char *temp_argv[] = CYGDAT_LIBC_ARGUMENTS ; + int rc; + + rc = main( (sizeof(temp_argv)/sizeof(char *)) - 1, &temp_argv[0] ); + + CYG_TRACE1( true, "main() has returned with code %d. Calling exit()", + rc ); + + __libc_exit(rc); + + CYG_FAIL( "__libc_exit() returned!!!" ); + + CYG_REPORT_RETURN(); + +} // invoke_main(); + +// EOF invokemain.cxx diff --git a/packages/language/c/libc/current/src/support/main.cxx b/packages/language/c/libc/current/src/support/main.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/support/main.cxx @@ -0,0 +1,101 @@ +//======================================================================= +// +// main.cxx +// +// Default main() function +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-26 +// Purpose: Provide a default empty main() function +// Description: This file provides a default empty main() function so +// that things don't fall apart if the user starts the +// ISO C environment (the default setting) but doesn't +// provide their own main(). This is taken advantage of +// in some tests (for example) +// Usage: Obviously simply override main() in your own program to +// prevent the use of the one below +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // for CYGPKG_KERNEL + +// INCLUDES + +#include // Common type definitions and support +#include // Common tracing support +#include // Common assertion support + +// FUNCTION PROTOTYPES + +// We provide a weakly named main to allow this to link if the user +// doesn't provide their own main. This isn't strictly good behaviour, +// but if the user wants good performance then of _course_ they should +// play with the config options and this won't be called. Or it might +// be "giving them enough rope" etc. :-) + +externC int +main( int argc, char *argv[] ) CYGBLD_ATTRIB_WEAK; + +externC void +cyg_user_start(void); + +// FUNCTIONS + +externC int +main( int argc, char *argv[] ) +{ + CYG_REPORT_FUNCNAMETYPE("main", "returning %d" ); + + // try to be helpful by diagnosing malformed arguments + CYG_PRECONDITION( argv != NULL, "argv is NULL!" ); + CYG_PRECONDITION( argv[argc] == NULL, "argv[argc] isn't NULL!" ); + + CYG_REPORT_FUNCARG2("argc=%d, argv[0]=%s", argc, + (CYG_ADDRWORD)((argv[0]==NULL) ? "NULL" : argv[0]) ); + + CYG_TRACE0( true, "This is the system-supplied default main()" ); + + // If the kernel isn't present then cyg_lib_invoke_main() will have assumed + // main() is present and will call it. But if we're here, then + // evidently the user didn't supply one - which can't be right. So we + // assume that they have useful code to run in cyg_user_start() instead. + // Its better than just exiting +#ifndef CYGPKG_KERNEL + cyg_user_start(); +#endif + + CYG_REPORT_RETVAL(0); + return 0; // some CPUs have 0 hard-wired - faster than a reg +} // main() + +// EOF main.cxx diff --git a/packages/language/c/libc/current/src/support/mainthread.cxx b/packages/language/c/libc/current/src/support/mainthread.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/support/mainthread.cxx @@ -0,0 +1,122 @@ +//======================================================================= +// +// mainthread.cxx +// +// Support for startup of ISO C environment +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 +// Purpose: Provides a thread object to call into a user-supplied +// main() +// Description: Here we define the thread object that calls +// cyg_libc_invoke_main() which in turn will invoke +// the user-supplied main() entry point function (or +// alternatively the dummy empty one supplied by eCos) +// Usage: Both the stack (cyg_libc_main_stack) and the thread +// (cyg_libc_main_thread) can be overriden if you provide +// your own symbols with those names. In the case of the +// stack obviously you need to ensure +// CYGNUM_LIBC_MAIN_STACK_SIZE corresponds to your own +// stack. +// The thread object is also available externally if you +// want to control it (suspend/resume/etc.) either by +// extern Cyg_Thread cyg_libc_main_thread; from C++, using +// the kernel C++ API, or +// extern cyg_handle_t cyg_libc_main_thread; from C using +// the kernel C API. +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +#ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD + +// INCLUDES + +#include // Common type definitions and support +#include // eCos kernel configuration +#include // eCos thread support +#include +#include // for CYGNUM_HAL_STACK_SIZE_TYPICAL + + +// EXTERNS + +#ifdef CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS +extern cyg_bool cyg_hal_stop_constructors; +#endif + +// FUNCTION PROTOTYPES + +externC void +cyg_libc_invoke_main( CYG_ADDRWORD ); + +// STATICS + +#ifdef CYGSEM_LIBC_INVOKE_DEFAULT_STATIC_CONSTRUCTORS +class cyg_libc_dummy_constructor_class { +public: + cyg_libc_dummy_constructor_class(void) { ++cyg_hal_stop_constructors; } +}; + +static cyg_libc_dummy_constructor_class cyg_libc_dummy_constructor_obj + CYG_INIT_PRIORITY(PREDEFAULT); +#endif + +// override stack size on some platforms +#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +# if CYGNUM_LIBC_MAIN_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_TYPICAL +# undef CYGNUM_LIBC_MAIN_STACK_SIZE +# define CYGNUM_LIBC_MAIN_STACK_SIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +# endif +#endif + +// Make this weak so that users can override this from their own code +// if they really want. FIXME: but its still allocated +cyg_uint8 cyg_libc_main_stack[ CYGNUM_LIBC_MAIN_STACK_SIZE ] + CYGBLD_ATTRIB_WEAK; + +// GLOBALS + +// let the main thread be global so people can play with it (e.g. suspend +// or resume etc.) if that's what they want to do +Cyg_Thread cyg_libc_main_thread CYGBLD_ATTRIB_WEAK CYG_INIT_PRIORITY(LIBC) = + Cyg_Thread(CYG_SCHED_DEFAULT_INFO, + &cyg_libc_invoke_main, (CYG_ADDRWORD) 0, + "main", + (CYG_ADDRESS) &cyg_libc_main_stack, + CYGNUM_LIBC_MAIN_STACK_SIZE); + +#endif // ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD + +// EOF mainthread.cxx diff --git a/packages/language/c/libc/current/src/time/asctime.cxx b/packages/language/c/libc/current/src/time/asctime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/asctime.cxx @@ -0,0 +1,73 @@ +//======================================================================== +// +// asctime.cxx +// +// ISO C date and time implementation for asctime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C asctime() +// Description: This file provides the linkable symbol version of asctime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __asctime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_ASCTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_ASCTIME_INLINE +# define CYGIMP_LIBC_TIME_ASCTIME_INLINE +#endif + +#include // Main date and time definitions + +// GLOBALS + +// 26 isn't such a magic value if you work out what asctime is returning +// It should do until 23:59:59 31st Dec 9999 anyway :-) +char cyg_libc_time_asctime_buf[26]; + +// SYMBOL DEFINITIONS + +#undef asctime + +externC char * +asctime( const struct tm *__timeptr ) CYGBLD_ATTRIB_WEAK_ALIAS(__asctime); + +// EOF asctime.cxx diff --git a/packages/language/c/libc/current/src/time/asctime_r.cxx b/packages/language/c/libc/current/src/time/asctime_r.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/asctime_r.cxx @@ -0,0 +1,72 @@ +//======================================================================== +// +// asctime_r.cxx +// +// POSIX 1003.1 date and time implementation for asctime_r() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of POSIX 1003.1 asctime() +// Description: This file provides the linkable symbol version of asctime_r() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __asctime_r() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_ASCTIME_R_INLINE +#ifndef CYGIMP_LIBC_TIME_ASCTIME_R_INLINE +# define CYGIMP_LIBC_TIME_ASCTIME_R_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#ifdef CYGFUN_LIBC_TIME_POSIX + +# undef asctime_r + +externC char * +asctime_r( const struct tm *__timeptr, char *__buf ) + CYGBLD_ATTRIB_WEAK_ALIAS(__asctime_r); + +#endif // ifdef CYGFUN_LIBC_TIME_POSIX + +// EOF asctime_r.cxx diff --git a/packages/language/c/libc/current/src/time/clock.cxx b/packages/language/c/libc/current/src/time/clock.cxx --- a/packages/language/c/libc/current/src/time/clock.cxx +++ b/packages/language/c/libc/current/src/time/clock.cxx @@ -2,7 +2,7 @@ // // clock.cxx // -// ANSI standard clock() routine defined in section 7.12.2.1 +// ISO C date and time implementation for clock() // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -22,18 +22,22 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 -// Purpose: -// Description: +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Purpose: Provides an implementation of the ISO C function clock() +// from ISO C section 7.12.2.1 +// Description: This file uses the kernel real time clock to determine +// the complete running time of the system - since we only +// have one task, even though there are perhaps multiple threads +// that is still the running time of the "program" // Usage: // //####DESCRIPTIONEND#### @@ -44,55 +48,42 @@ #include // Configuration header -#ifdef CYGPKG_KERNEL +#ifdef CYGSEM_LIBC_TIME_CLOCK_WORKING # include // Kernel config header #endif -// Include the C library? -#ifdef CYGPKG_LIBC - // INCLUDES -#include // Common type definitions and support -#include // Tracing support -#include // Assertion support -#include // NULL and size_t from compiler +#include // Common type definitions and support +#include // Assertion infrastructure +#include // Tracing infrastructure -#include // Header for all time-related functions -#include "clibincl/timesupp.hxx" // Support for time functions +#include // Header for all time-related functions -#if defined(CYGFUN_KERNEL_THREADS_TIMER) && \ - defined(CYGVAR_KERNEL_COUNTERS_CLOCK) -# include // Kernel clock definitions -# include // Kernel clock inline functions +#ifdef CYGSEM_LIBC_TIME_CLOCK_WORKING +# include // Kernel clock definitions +# include // Kernel clock inline functions #endif // TRACE -# if defined(CYGDBG_USE_TRACING) && defined(CYGNUM_LIBC_CLOCK_TRACE_LEVEL) -static int clock_trace = CYGNUM_LIBC_CLOCK_TRACE_LEVEL; +# if defined(CYGDBG_USE_TRACING) && defined(CYGNUM_LIBC_TIME_CLOCK_TRACE_LEVEL) +static int clock_trace = CYGNUM_LIBC_TIME_CLOCK_TRACE_LEVEL; # define TL1 (0 < clock_trace) # else # define TL1 (0) # endif - -// EXPORTED SYMBOLS - -externC clock_t -clock( void ) CYGPRI_LIBC_WEAK_ALIAS("_clock"); - // FUNCTIONS -clock_t -_clock( void ) +externC clock_t +__clock( void ) { - CYG_REPORT_FUNCNAMETYPE( "_clock", "returning clock tick %d" ); + CYG_REPORT_FUNCNAMETYPE( "__clock", "returning clock tick %d" ); CYG_REPORT_FUNCARGVOID(); - // Only if the kernel has clock device support -#if defined(CYGFUN_KERNEL_THREADS_TIMER) && defined(CYGVAR_KERNEL_COUNTERS_CLOCK) +#ifdef CYGSEM_LIBC_TIME_CLOCK_WORKING cyg_tick_count curr_clock; // kernel clock value Cyg_Clock::cyg_resolution resolution; // kernel clock resolution clock_t clocks; @@ -118,13 +109,17 @@ clock_t CYG_REPORT_RETVAL( clocks ); return clocks; -#else +#else // i.e. ifndef CYGSEM_LIBC_TIME_CLOCK_WORKING CYG_REPORT_RETVAL( -1 ); return (clock_t) -1; #endif -} // _clock() +} // __clock() + -#endif // ifdef CYGPKG_LIBC +// SYMBOL DEFINITIONS + +externC clock_t +clock( void ) CYGBLD_ATTRIB_WEAK_ALIAS(__clock); // EOF clock.cxx diff --git a/packages/language/c/libc/current/src/time/ctime.cxx b/packages/language/c/libc/current/src/time/ctime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/ctime.cxx @@ -0,0 +1,67 @@ +//======================================================================== +// +// ctime.cxx +// +// ISO C date and time implementation for ctime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C ctime() +// Description: This file provides the linkable symbol version of ctime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __ctime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_CTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_CTIME_INLINE +# define CYGIMP_LIBC_TIME_CTIME_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#undef ctime + +externC char * +ctime( const time_t *__timer ) CYGBLD_ATTRIB_WEAK_ALIAS(__ctime); + +// EOF ctime.cxx diff --git a/packages/language/c/libc/current/src/time/ctime_r.cxx b/packages/language/c/libc/current/src/time/ctime_r.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/ctime_r.cxx @@ -0,0 +1,72 @@ +//======================================================================== +// +// ctime_r.cxx +// +// POSIX 1003.1 date and time implementation for ctime_r() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of POSIX 1003.1 ctime() +// Description: This file provides the linkable symbol version of ctime_r() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __ctime_r() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_CTIME_R_INLINE +#ifndef CYGIMP_LIBC_TIME_CTIME_R_INLINE +# define CYGIMP_LIBC_TIME_CTIME_R_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#ifdef CYGFUN_LIBC_TIME_POSIX + +# undef ctime_r + +externC char * +ctime_r( const time_t *__timer, char *__buf ) + CYGBLD_ATTRIB_WEAK_ALIAS(__ctime_r); + +#endif // ifdef CYGFUN_LIBC_TIME_POSIX + +// EOF ctime_r.cxx diff --git a/packages/language/c/libc/current/src/time/difftime.cxx b/packages/language/c/libc/current/src/time/difftime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/difftime.cxx @@ -0,0 +1,68 @@ +//======================================================================== +// +// difftime.cxx +// +// ISO C date and time implementation for difftime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C difftime() +// Description: This file provides the linkable symbol version of difftime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __difftime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_DIFFTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_DIFFTIME_INLINE +# define CYGIMP_LIBC_TIME_DIFFTIME_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#undef difftime + +externC double +difftime( time_t __time1, time_t __time0 ) + CYGBLD_ATTRIB_WEAK_ALIAS(__difftime); + +// EOF difftime.cxx diff --git a/packages/language/c/libc/current/src/time/gmtime.cxx b/packages/language/c/libc/current/src/time/gmtime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/gmtime.cxx @@ -0,0 +1,71 @@ +//======================================================================== +// +// gmtime.cxx +// +// ISO C date and time implementation for gmtime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C gmtime() +// Description: This file provides the linkable symbol version of gmtime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __gmtime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_GMTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_GMTIME_INLINE +# define CYGIMP_LIBC_TIME_GMTIME_INLINE +#endif + +#include // Main date and time definitions + +// GLOBALS + +struct tm cyg_libc_time_gmtime_buf; + +// SYMBOL DEFINITIONS + +#undef gmtime + +externC struct tm * +gmtime( const time_t *__timer) CYGBLD_ATTRIB_WEAK_ALIAS(__gmtime); + +// EOF gmtime.cxx diff --git a/packages/language/c/libc/current/src/time/gmtime_r.cxx b/packages/language/c/libc/current/src/time/gmtime_r.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/gmtime_r.cxx @@ -0,0 +1,72 @@ +//======================================================================== +// +// gmtime_r.cxx +// +// POSIX 1003.1 date and time implementation for gmtime_r() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of POSIX 1003.1 gmtime() +// Description: This file provides the linkable symbol version of gmtime_r() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __gmtime_r() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_GMTIME_R_INLINE +#ifndef CYGIMP_LIBC_TIME_GMTIME_R_INLINE +# define CYGIMP_LIBC_TIME_GMTIME_R_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#ifdef CYGFUN_LIBC_TIME_POSIX + +# undef gmtime_r + +externC struct tm * +gmtime_r( const time_t *__timer, struct tm *__result ) + CYGBLD_ATTRIB_WEAK_ALIAS(__gmtime_r); + +#endif // ifdef CYGFUN_LIBC_TIME_POSIX + +// EOF gmtime_r.cxx diff --git a/packages/language/c/libc/current/src/time/localtime.cxx b/packages/language/c/libc/current/src/time/localtime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/localtime.cxx @@ -0,0 +1,71 @@ +//======================================================================== +// +// localtime.cxx +// +// ISO C date and time implementation for localtime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C localtime() +// Description: This file provides the linkable symbol version of localtime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __localtime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_LOCALTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_LOCALTIME_INLINE +# define CYGIMP_LIBC_TIME_LOCALTIME_INLINE +#endif + +#include // Main date and time definitions + +// GLOBALS + +struct tm cyg_libc_time_localtime_buf; + +// SYMBOL DEFINITIONS + +#undef localtime + +externC struct tm * +localtime( const time_t *__timer) CYGBLD_ATTRIB_WEAK_ALIAS(__localtime); + +// EOF localtime.cxx diff --git a/packages/language/c/libc/current/src/time/localtime_r.cxx b/packages/language/c/libc/current/src/time/localtime_r.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/localtime_r.cxx @@ -0,0 +1,73 @@ +//======================================================================== +// +// localtime_r.cxx +// +// POSIX 1003.1 date and time implementation for localtime_r() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of POSIX 1003.1 localtime() +// Description: This file provides the linkable symbol version of +// localtime_r() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __localtime_r() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_LOCALTIME_R_INLINE +#ifndef CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE +# define CYGIMP_LIBC_TIME_LOCALTIME_R_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#ifdef CYGFUN_LIBC_TIME_POSIX + +# undef localtime_r + +externC struct tm * +localtime_r( const time_t *__timer, struct tm *__result ) + CYGBLD_ATTRIB_WEAK_ALIAS(__localtime_r); + +#endif // ifdef CYGFUN_LIBC_TIME_POSIX + +// EOF localtime_r.cxx diff --git a/packages/language/c/libc/current/src/time/mktime.cxx b/packages/language/c/libc/current/src/time/mktime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/mktime.cxx @@ -0,0 +1,67 @@ +//======================================================================== +// +// mktime.cxx +// +// ISO C date and time implementation for mktime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of ISO C mktime() +// Description: This file provides the linkable symbol version of mktime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support + +// The following lines allow __mktime() to be included non-inline which +// actually defines it as a function here +#define CYGPRI_LIBC_TIME_MKTIME_INLINE +#ifndef CYGIMP_LIBC_TIME_MKTIME_INLINE +# define CYGIMP_LIBC_TIME_MKTIME_INLINE +#endif + +#include // Main date and time definitions + +// SYMBOL DEFINITIONS + +#undef mktime + +externC time_t +mktime( struct tm *__timeptr ) CYGBLD_ATTRIB_WEAK_ALIAS(__mktime); + +// EOF mktime.cxx diff --git a/packages/language/c/libc/current/src/time/settime.cxx b/packages/language/c/libc/current/src/time/settime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/settime.cxx @@ -0,0 +1,86 @@ +//======================================================================== +// +// settime.cxx +// +// Date and time support function to set time +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide support function to set the time +// Description: The wallclock device is used to store the time in UTC +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Main date and time definitions +#include // Assertion infrastructure +#include // Tracing infrastructure +#ifdef CYGSEM_LIBC_TIME_SETTIME_WORKING +# include // Wallclock class definitions +#endif + +// FUNCTIONS + +///////////////////////////// +// cyg_libc_time_settime() // +///////////////////////////// +// +// This function sets the current time for the system. The time is +// specified as a time_t in UTC. It returns non-zero on error. +// + +externC cyg_bool +cyg_libc_time_settime( time_t utctime ) +{ + CYG_REPORT_FUNCNAMETYPE("cyg_libc_time_settime", "returning status %d"); + CYG_REPORT_FUNCARG1DV(utctime); + +#ifdef CYGSEM_LIBC_TIME_SETTIME_WORKING + + Cyg_WallClock::wallclock->set_current_time((cyg_uint32) utctime); + + CYG_REPORT_RETVAL(false); + return false; +#else + CYG_REPORT_RETVAL(true); + return true; +#endif + +} // cyg_libc_time_settime() + +// EOF settime.cxx diff --git a/packages/language/c/libc/current/src/time/strftime.cxx b/packages/language/c/libc/current/src/time/strftime.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/strftime.cxx @@ -0,0 +1,310 @@ +//======================================================================== +// +// strftime.cxx +// +// ISO C date and time implementation for strftime() +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide implementation of the ISO C function strftime() +// from ISO C section 7.12.3.5 +// Description: This file provides the implementation of strftime() +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Assertion infrastructure +#include // Tracing infrastructure +#include // Main date and time definitions +#include // For cyg_libc_time_{day,month}_name{,_len} + +// FUNCTION PROTOTYPES + +// forward declaration for do_format() +externC size_t +__strftime( char *s, size_t maxsize, const char *format, + const struct tm *timeptr); + + +// FIXME: This all needs to be internationalized and localized, both in +// terms of reading and writing multibyte characters, and that it should +// refer to the settings of LC_TIME + +// FUNCTIONS + +// This helper function actually processes the format. Which format to insert +// is indicated by fmtchar, sizeleft is the maximum space allowed to be used +// in buf. The number of bytes written is returned, or -1 if there was no +// space + +static cyg_int8 +do_format(cyg_uint8 fmtchar, cyg_ucount32 sizeleft, char *buf, + const struct tm *timeptr) +{ + cyg_count8 i; + + switch (fmtchar) { + case 'a': + if (sizeleft<3) + return -1; + buf[0] = cyg_libc_time_day_name[timeptr->tm_wday][0]; + buf[1] = cyg_libc_time_day_name[timeptr->tm_wday][1]; + buf[2] = cyg_libc_time_day_name[timeptr->tm_wday][2]; + return 3; + case 'A': + if (sizeleft < cyg_libc_time_day_name_len[timeptr->tm_wday]) + return -1; + for (i=0; itm_wday]; ++i) + buf[i] = cyg_libc_time_day_name[timeptr->tm_wday][i]; + return i; + case 'b': + if (sizeleft<3) + return -1; + buf[0] = cyg_libc_time_month_name[timeptr->tm_mon][0]; + buf[1] = cyg_libc_time_month_name[timeptr->tm_mon][1]; + buf[2] = cyg_libc_time_month_name[timeptr->tm_mon][2]; + return 3; + case 'B': + if (sizeleft < cyg_libc_time_month_name_len[timeptr->tm_mon]) + return -1; + for (i=0; itm_mon]; ++i) + buf[i] = cyg_libc_time_month_name[timeptr->tm_mon][i]; + return i; + case 'c': + if (sizeleft < 26) + return -1; + + // Recurse! Note that we know that we will have left room for the + // trailing NULL in the strftime body + + i = __strftime( buf, sizeleft+1, "%a %b %d %I:%M:%S%p %Y", timeptr); + + return ((0==i) ? -1 : i); + case 'd': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_mday / 10) + '0'; + buf[1] = (timeptr->tm_mday % 10) + '0'; + return 2; + case 'H': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_hour / 10) + '0'; + buf[1] = (timeptr->tm_hour % 10) + '0'; + return 2; + case 'I': + if (sizeleft < 2) + return -1; + buf[0] = ((timeptr->tm_hour%12 + 1) / 10) + '0'; + buf[1] = ((timeptr->tm_hour%12 + 1) % 10) + '0'; + return 2; + case 'j': + if (sizeleft < 3) + return -1; + buf[0] = (timeptr->tm_yday / 100) + '0'; + buf[1] = ((timeptr->tm_yday % 100) / 10) + '0'; + buf[2] = (timeptr->tm_yday % 10) + '0'; + return 3; + case 'm': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_mon / 10) + '0'; + buf[1] = (timeptr->tm_mon % 10) + '0'; + return 2; + case 'M': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_min / 10) + '0'; + buf[1] = (timeptr->tm_min % 10) + '0'; + return 2; + case 'p': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_hour > 11) ? 'p' : 'a'; + buf[1] = 'm'; + return 2; + case 'S': + if (sizeleft < 2) + return -1; + buf[0] = (timeptr->tm_sec / 10) + '0'; + buf[1] = (timeptr->tm_sec % 10) + '0'; + return 2; + case 'U': + if (sizeleft < 2) + return -1; + i = (timeptr->tm_yday - timeptr->tm_wday + 7) / 7; + buf[0] = (i / 10) + '0'; + buf[1] = (i % 10) + '0'; + return 2; + case 'w': + // Don't need to check size - we'll always be called with sizeleft > 0 + buf[0] = timeptr->tm_wday + '0'; + return 1; + case 'W': + if (sizeleft < 2) + return -1; + i = (timeptr->tm_yday + ((8-timeptr->tm_wday) % 7)) / 7; + buf[0] = (i / 10) + '0'; + buf[1] = (i % 10) + '0'; + return 2; + case 'x': + if (sizeleft < 15) + return -1; + + // Recurse! Note that we know that we will have left room for the + // trailing NULL in the strftime body + + i = __strftime( buf, sizeleft+1, "%a %b %d %Y", timeptr); + + return (0==i) ? -1 : i; + case 'X': + if (sizeleft < 10) + return -1; + + // Recurse! Note that we know that we will have left room for the + // trailing NULL in the strftime body + + i = __strftime( buf, sizeleft+1, "%I:%M:%S%p", timeptr); + + return (0==i) ? -1 : i; + case 'y': + if (sizeleft < 2) + return -1; + buf[0] = ((timeptr->tm_year % 100) / 10) + '0'; + buf[1] = ((timeptr->tm_year % 100) % 10) + '0'; + return 2; + case 'Y': + if (sizeleft < 4) + return -1; + buf[0] = ((1900+timeptr->tm_year) / 1000) + '0'; + buf[1] = (((1900+timeptr->tm_year) % 1000) / 100) + '0'; + buf[2] = ((timeptr->tm_year % 100) / 10) + '0'; + buf[3] = (timeptr->tm_year % 10) + '0'; + return 4; + case 'Z': + // FIXME: Should store zone in timeptr->tm_zone, or failing that + // read TZ env variable using tzset() + return 0; + case '%': + // Don't need to check size - we'll always be called with sizeleft > 0 + buf[0] = '%'; + return 1; + default: + CYG_FAIL("invalid format character!"); + return -1; + } // switch + +} // do_format() + +externC size_t +__strftime( char *s, size_t maxsize, const char *format, + const struct tm *timeptr) +{ + CYG_REPORT_FUNCNAMETYPE("__strftime", "returning string length %d"); + CYG_CHECK_DATA_PTR(s, "string s is not a valid address!"); + CYG_CHECK_DATA_PTR(format, "format string is not at a valid address!"); + CYG_CHECK_DATA_PTR(timeptr, + "struct tm argument is not at a valid address!"); + CYG_REPORT_FUNCARG4("s is at address %08x, maxsize=%d, format=\"%s\", " + "timeptr is at address %08x", + s, maxsize, format, timeptr); + + CYG_PRECONDITION((timeptr->tm_sec >= 0) && (timeptr->tm_sec < 62), + "timeptr->tm_sec out of range!"); + CYG_PRECONDITION((timeptr->tm_min >= 0) && (timeptr->tm_min < 60), + "timeptr->tm_min out of range!"); + CYG_PRECONDITION((timeptr->tm_hour >= 0) && (timeptr->tm_hour < 24), + "timeptr->tm_hour out of range!"); + // Currently I don't check _actual_ numbers of days in each month here + // FIXME: No reason why not though + CYG_PRECONDITION((timeptr->tm_mday >= 1) && (timeptr->tm_mday < 32), + "timeptr->tm_mday out of range!"); + CYG_PRECONDITION((timeptr->tm_mon >= 0) && (timeptr->tm_mon < 12), + "timeptr->tm_mon out of range!"); + CYG_PRECONDITION((timeptr->tm_wday >= 0) && (timeptr->tm_wday < 7), + "timeptr->tm_wday out of range!"); + CYG_PRECONDITION((timeptr->tm_yday >= 0) && (timeptr->tm_yday < 366), + "timeptr->tm_yday out of range!"); + CYG_PRECONDITION((timeptr->tm_year > -1900) && + (timeptr->tm_year < 8100), + "timeptr->tm_year out of range!"); + + if (!maxsize) { + CYG_REPORT_RETVAL(0); + return 0; + } // if + + // lets leave the room for the trailing null up front + --maxsize; + + cyg_ucount32 i, spos; + cyg_int8 dof_ret; + + for (i=0, spos=0; (spos // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Assertion infrastructure +#include // Tracing infrastructure +#include // Main date and time definitions + +#ifdef CYGSEM_LIBC_TIME_TIME_WORKING +# include // Wallclock class definitions +#endif + +// FUNCTIONS + +externC time_t +__time( time_t *timer ) +{ + CYG_REPORT_FUNCNAMETYPE("__time", "returning %d"); + if (timer) // its allowed to be NULL + CYG_CHECK_DATA_PTR( timer, "timer is not a valid pointer!"); + CYG_REPORT_FUNCARG1("timer = %08x", timer); + +#ifdef CYGSEM_LIBC_TIME_TIME_WORKING + time_t ret; + + ret = (time_t) Cyg_WallClock::wallclock->get_current_time(); + + if (timer) + *timer = ret; + + CYG_REPORT_RETVAL(ret); + + return ret; + +#else // i.e. ifndef CYGSEM_LIBC_TIME_TIME_WORKING + + if (timer) + *timer = (time_t)-1; + CYG_REPORT_RETVAL(-1); + return (time_t)-1; + +#endif + +} // __time() + + +// SYMBOL DEFINITIONS + +externC time_t +time( time_t *timer ) CYGBLD_ATTRIB_WEAK_ALIAS(__time); + +// EOF time.cxx diff --git a/packages/language/c/libc/current/src/time/timeutil.cxx b/packages/language/c/libc/current/src/time/timeutil.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/src/time/timeutil.cxx @@ -0,0 +1,207 @@ +//======================================================================== +// +// timeutil.cxx +// +// ISO C date and time implementation support functions +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-26 +// Purpose: Provide support functions used by the ISO C date and time +// implementation +// Description: This file provides the functions: +// cyg_libc_time_normalize_structtm() +// cyg_libc_time_getzoneoffsets() +// cyg_libc_time_setzoneoffsets() +// cyg_libc_time_setdst() +// and the globals: +// cyg_libc_time_day_name +// cyg_libc_time_day_name_len +// cyg_libc_time_month_name +// cyg_libc_time_month_name_len +// cyg_libc_time_month_lengths +// cyg_libc_time_current_dst_stat +// cyg_libc_time_current_std_offset +// cyg_libc_time_current_dst_offset +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +// define these functions as outline, not inline, functions in this file +#define CYGPRI_LIBC_TIME_GETZONEOFFSETS_INLINE extern "C" +#define CYGPRI_LIBC_TIME_SETZONEOFFSETS_INLINE extern "C" +#define CYGPRI_LIBC_TIME_SETDST_INLINE extern "C" + +#include // Common type definitions and support +#include // Header for this file +#include // Main date and time definitions +#include // for div() + + +// GLOBALS + +// FIXME: PR19440 - const char & -fwritable-strings don't mix +/*const*/ char cyg_libc_time_day_name[7][10] = { + "Sunday", "Monday", "Tuesday", "Wednesday", "Thursday", "Friday", + "Saturday" +}; +const cyg_uint8 cyg_libc_time_day_name_len[7] = { 6, 6, 7, 9, 8, 6, 8 }; + +// FIXME: PR19440 - const char & -fwritable-strings don't mix +/*const*/ char cyg_libc_time_month_name[12][10] = { + "January", "February", "March", "April", "May", "June", + "July", "August", "September", "October", "November", "December" +}; +const cyg_uint8 cyg_libc_time_month_name_len[12] = { 7, 8, 5, 5, 3, 4, + 4, 6, 9, 7, 8, 8 }; + +const cyg_uint8 cyg_libc_time_month_lengths[2][12] = { + {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}, + {31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31} +}; + +Cyg_libc_time_dst cyg_libc_time_current_dst_stat = + (Cyg_libc_time_dst)CYGNUM_LIBC_TIME_DST_DEFAULT_STATE; +time_t cyg_libc_time_current_std_offset = + (time_t)CYGNUM_LIBC_TIME_STD_DEFAULT_OFFSET; +time_t cyg_libc_time_current_dst_offset = + (time_t)CYGNUM_LIBC_TIME_DST_DEFAULT_OFFSET; + + +// FUNCTIONS + +//////////////////////////////////////// +// cyg_libc_time_normalize_structtm() // +//////////////////////////////////////// +// +// cyg_libc_time_normalize_structtm() will adjust the fields of a struct tm +// so that they are within the normal ranges expected. +// tm_wday, tm_yday and tm_isdst are ignored + +externC void +cyg_libc_time_normalize_structtm( struct tm *timeptr ) +{ + div_t t; + + CYG_REPORT_FUNCNAME("cyg_libc_time_normalize_structtm"); + CYG_REPORT_FUNCARG1("timeptr is at address %08x", timeptr); + + // normalize seconds to 0..59 + if ((timeptr->tm_sec < 0) || (timeptr->tm_sec > 59)) { + t = div(timeptr->tm_sec, 60); + while (t.rem < 0) { + t.rem += 60; + --t.quot; + } + timeptr->tm_min += t.quot; + timeptr->tm_sec = t.rem; + } // if + + // normalize minutes to 0..59 + if ((timeptr->tm_min < 0) || (timeptr->tm_min > 59)) { + t = div(timeptr->tm_min, 60); + while (t.rem < 0) { + t.rem += 60; + --t.quot; + } + timeptr->tm_hour += t.quot; + timeptr->tm_min = t.rem; + } // if + + // normalize hours to 0..23 + if ((timeptr->tm_hour < 0) || (timeptr->tm_hour > 23)) { + t = div(timeptr->tm_hour, 24); + while (t.rem < 0) { + t.rem += 24; + --t.quot; + } + timeptr->tm_mday += t.quot; + timeptr->tm_hour = t.rem; + } // if + + // we wait before normalizing tm_mday as per ISO C 7.12.2.3 (although + // actually it only makes sense if you think about it + + // normalize months to 0..11 + if ((timeptr->tm_mon < 0) || (timeptr->tm_mon > 11)) { + t = div(timeptr->tm_mon, 12); + while (t.rem < 0) { + t.rem += 12; + --t.quot; + } + timeptr->tm_year += t.quot; + timeptr->tm_mon = t.rem; + } // if + + // now tm_mday which needs to go to 1..31 + cyg_bool leap = cyg_libc_time_year_is_leap(timeptr->tm_year); + + while (timeptr->tm_mday < 1) { + // move back a month + + if (--timeptr->tm_mon < 0) { + --timeptr->tm_year; + timeptr->tm_mon = 11; + leap = cyg_libc_time_year_is_leap(timeptr->tm_year); + } // if + + // we move backward the number of days in the _new_ current month + timeptr->tm_mday += cyg_libc_time_month_lengths[leap][timeptr->tm_mon]; + + } // while + + while (timeptr->tm_mday > + cyg_libc_time_month_lengths[leap][timeptr->tm_mon]) { + + // move forward a month + + // we move forward the number of days in the _old_ current month + timeptr->tm_mday -= cyg_libc_time_month_lengths[leap][timeptr->tm_mon]; + + if (++timeptr->tm_mon > 11) { + ++timeptr->tm_year; + timeptr->tm_mon = 0; + leap = cyg_libc_time_year_is_leap(timeptr->tm_year); + } // if + + } // while + + CYG_REPORT_RETURN(); + +} // cyg_libc_time_normalize_structtm() + + +// EOF timeutil.cxx diff --git a/packages/language/c/libc/current/tests/PKGconf.mak b/packages/language/c/libc/current/tests/PKGconf.mak --- a/packages/language/c/libc/current/tests/PKGconf.mak +++ b/packages/language/c/libc/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -37,6 +37,8 @@ TESTS := ctype/ctype \ setjmp/setjmp \ \ + signal/signal1 signal/signal2 \ + \ stdio/sprintf1 stdio/sprintf2 stdio/sscanf \ stdio/stdiooutput \ \ @@ -44,7 +46,8 @@ TESTS := ctype/ctype stdlib/bsearch stdlib/div stdlib/getenv \ stdlib/labs stdlib/ldiv stdlib/qsort stdlib/malloc1 \ stdlib/malloc2 stdlib/malloc3 stdlib/rand1 \ - stdlib/rand2 stdlib/rand3 stdlib/realloc stdlib/srand\ + stdlib/rand2 stdlib/rand3 stdlib/rand4 \ + stdlib/realloc stdlib/srand \ stdlib/strtol stdlib/strtoul \ \ string/memchr string/memcmp1 string/memcmp2 \ @@ -59,7 +62,10 @@ TESTS := ctype/ctype string/strstr string/strtok string/strxfrm1 \ string/strxfrm2 \ \ - time/clock + time/asctime time/clock time/ctime time/gmtime \ + time/localtime time/mktime time/strftime time/time +strftime.c-CFLAGS += -Wno-format + include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst diff --git a/packages/language/c/libc/current/tests/ctype/ctype.c b/packages/language/c/libc/current/tests/ctype/ctype.c --- a/packages/language/c/libc/current/tests/ctype/ctype.c +++ b/packages/language/c/libc/current/tests/ctype/ctype.c @@ -22,26 +22,21 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-03-23 // Description: Contains general testcode for C library ctype functions // // //####DESCRIPTIONEND#### -// Declarations for test system: -// -// TESTCASE_TYPE=CYG_TEST_MODULE -// COMPOUND_TESTCASE - // INCLUDES #include @@ -52,31 +47,23 @@ // FUNCTIONS -externC void +void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC int c; // character we use as a parameter -#endif CYG_TEST_INIT(); CYG_TEST_INFO( "Starting tests from testcase " __FILE__ " for C library " " functions" ); -#ifdef CYGPKG_LIBC - // Check isalnum c = 't'; CYG_TEST_PASS_FAIL( isalnum(c), "isalnum('t')"); @@ -225,11 +212,6 @@ main( int argc, char *argv[] ) CYG_TEST_FINISH( "Finished tests from testcase " __FILE__ " for C library " " functions" ); - -#else // ifdef CYGPKG_LIBC - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); -#endif - } // main() // EOF ctype.c diff --git a/packages/language/c/libc/current/tests/i18n/setlocale.c b/packages/language/c/libc/current/tests/i18n/setlocale.c --- a/packages/language/c/libc/current/tests/i18n/setlocale.c +++ b/packages/language/c/libc/current/tests/i18n/setlocale.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/8/31 // Description: Contains testcode for C library setlocale() function // @@ -137,7 +137,7 @@ main( int argc, char *argv[] ) "Set locale for LC_ALL from retrieved locale" ); #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // if defined(CYGPKG_LIBC) CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " diff --git a/packages/language/c/libc/current/tests/setjmp/setjmp.c b/packages/language/c/libc/current/tests/setjmp/setjmp.c --- a/packages/language/c/libc/current/tests/setjmp/setjmp.c +++ b/packages/language/c/libc/current/tests/setjmp/setjmp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Contains test code for C library setjmp() and longjmp() @@ -239,7 +239,7 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL ( (vol_k == 20), "Repeated longjmps from a function" ); #else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // ifndef CYGPKG_LIBC CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " diff --git a/packages/language/c/libc/current/tests/signal/signal1.c b/packages/language/c/libc/current/tests/signal/signal1.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/signal/signal1.c @@ -0,0 +1,226 @@ +//======================================================================== +// +// signal1.c +// +// ISO C signal handling test +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-18 +// Purpose: Test signal functionality +// Description: This file contains a number of tests for ISO C signal +// handling +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Test infrastructure +#include // C library initialisation + +#ifdef CYGPKG_LIBC_SIGNALS +#include // Signal functions +#include // setjmp(), longjmp() +#include // abort() + +// STATICS + +static int state; +static jmp_buf jbuf; + +// PROTOTYPES + +// Private libc abort() function +externC void __abort(void); + +#endif // CYGPKG_LIBC_SIGNALS + +// FUNCTIONS + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + +#ifdef CYGPKG_LIBC_SIGNALS + +static void +myhandler1(int signal) +{ + CYG_TEST_INFO("myhandler1 called"); + ++state; +} // myhandler1() + +static void +myhandler2(int signal) +{ + CYG_TEST_INFO("myhandler2 called"); + ++state; + longjmp(jbuf, 1); +} // myhandler2() + +#endif // ifdef CYGPKG_LIBC_SIGNALS + +int +main( int argc, char *argv[] ) +{ +#ifdef CYGPKG_LIBC_SIGNALS + __sighandler_t handler1; + int rc; + + // special callout to request GDB to alter its handling of signals + CYG_TEST_GDBCMD("handle SIGTERM nostop"); + CYG_TEST_GDBCMD("handle SIGABRT nostop"); + +#endif // ifdef CYGPKG_LIBC_SIGNALS + + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C " + "library signal functions"); +#ifdef CYGPKG_LIBC_SIGNALS + + // Test 1 + + CYG_TEST_INFO("Test 1"); + state = 1; + handler1 = signal(SIGTERM, &myhandler1); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGTERM handler initialized to default"); + + rc = raise(SIGTERM); + + CYG_TEST_PASS_FAIL(0==rc, "raise(SIGTERM) did not return error"); + + CYG_TEST_PASS_FAIL(2==state, "SIGTERM handler returned correctly"); + + // Test 2 + + CYG_TEST_INFO("Test 2"); + + state = 2; + handler1 = signal(SIGTERM, &myhandler2); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGTERM handler reset to default after test 1"); + + handler1 = signal(SIGTERM, &myhandler1); + + CYG_TEST_PASS_FAIL(handler1 == &myhandler2, + "SIGTERM handler was set correctly"); + + rc = raise(SIGTERM); + + CYG_TEST_PASS_FAIL(0==rc, "raise(SIGTERM) did not return error"); + + CYG_TEST_PASS_FAIL(3==state, "SIGTERM handler returned correctly"); + + // Test 3 + + CYG_TEST_INFO("Test 3"); + + handler1 = signal(SIGTERM, &myhandler2); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGTERM handler reset to default after test 2"); + + handler1 = signal(SIGTERM, SIG_DFL); + + CYG_TEST_PASS_FAIL(handler1 == &myhandler2, + "SIGTERM handler was set correctly"); + + // Test 4 + + CYG_TEST_INFO("Test 4"); + + state = 4; + handler1 = signal(SIGTERM, SIG_IGN); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGTERM handler was set correctly after test 3"); + rc = raise(SIGTERM); + + CYG_TEST_PASS_FAIL(0==rc, "raise(SIGTERM) did not return error"); + + CYG_TEST_PASS_FAIL(4==state, "SIGTERM ignored"); + + // Test 5 + + CYG_TEST_INFO("Test 5"); + + state = 5; + handler1 = signal(SIGTERM, &myhandler2); + + // SIG_IGN doesn't reset back to SIG_DFL after a raise() + CYG_TEST_PASS_FAIL(handler1 == SIG_IGN, + "SIGTERM handler was set correctly after test 4"); + + if (0==setjmp(jbuf)) { + raise(SIGTERM); + CYG_TEST_FAIL("raise returned"); + } + + CYG_TEST_PASS_FAIL(6==state, "SIGTERM handler returned correctly"); + + // Test 6 + + CYG_TEST_INFO("Test 6"); + + state = 6; + handler1 = signal(SIGABRT, &myhandler2); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGABRT handler initialized to default"); + + if (0==setjmp(jbuf)) { + abort(); + CYG_TEST_FAIL("abort returned"); + } + + CYG_TEST_PASS_FAIL(7==state, "SIGABRT handler returned correctly"); + +#else + CYG_TEST_NA("Testing not applicable to this configuration"); +#endif + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " + "library signal functions"); + +} // main() + +// EOF signal1.c diff --git a/packages/language/c/libc/current/tests/signal/signal2.c b/packages/language/c/libc/current/tests/signal/signal2.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/signal/signal2.c @@ -0,0 +1,259 @@ +//======================================================================== +// +// signal2.c +// +// ISO C signal handling test +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-18 +// Purpose: Test hardware signal functionality +// Description: This file contains a number of tests for ISO C signal +// handling when used with hardware exceptions +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include // Common type definitions and support +#include // Test infrastructure +#include // C library initialisation + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +#include // exception ranges & + // HAL_VSR_SET_TO_ECOS_HANDLER + +#include // Signal functions +#include // setjmp(), longjmp() + +// STATICS + +static int state; +static jmp_buf jbuf; +#endif + +// FUNCTIONS + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + +static void +myhandler(int sig) +{ + __sighandler_t handler1; + + CYG_TEST_INFO("myhandler() called"); + ++state; + + handler1 = signal(sig, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "handler reset itself to default"); + + longjmp(jbuf, 1); +} // myhandler() + +static void +cause_memerror(void) +{ + volatile int x; + volatile CYG_ADDRESS p=(CYG_ADDRESS) &state; + + do { + // do a read which prevents us accidentally writing over something + // important. Make it misaligned to increase the chances of an + // exception happening + x = *(volatile int *)(p+1); + p += (CYG_ADDRESS)0x100000; + } while(p != 0); +} // cause_memerror() + +// num must always be 0 - do it this way in case the optimizer tries to +// get smart +static double +cause_fpe(int num) +{ + return 1.0/num; +} // cause_fpe() + +#endif + +int +main( int argc, char *argv[] ) +{ +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + __sighandler_t handler1; + + // special callout to request GDB to alter its handling of signals + CYG_TEST_GDBCMD("handle SIGBUS nostop"); + CYG_TEST_GDBCMD("handle SIGSEGV nostop"); + CYG_TEST_GDBCMD("handle SIGILL nostop"); + CYG_TEST_GDBCMD("handle SIGFPE nostop"); + CYG_TEST_GDBCMD("handle SIGSYS nostop"); + +// Not sure about this - Jifl. Do any of our targets generate SIGTRAP anyway? +#if 0 +#ifndef CYGPKG_HAL_I386_LINUX + CYG_TEST_GDBCMD("handle SIGTRAP nostop pass"); +#endif +#endif +#endif // ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + + CYG_TEST_INIT(); + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + // Avoid compiler warnings if tests are not applicable. + if (0) cause_memerror(); + if (0) cause_fpe(0); +#endif + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C " + "library signal functions"); + +// Now reset the exception handlers various to eCos handlers so that we +// have control; this is the target side equivalent of the CYG_TEST_GDBCMD +// lines above: +#ifdef HAL_VSR_SET_TO_ECOS_HANDLER + // Reclaim the VSR off CygMon possibly +#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS, NULL ); +#endif +#ifdef CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION + HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, NULL ); +#endif +#endif + +#ifdef CYGSEM_LIBC_SIGNALS_HWEXCEPTIONS + + + // Test 1 + + CYG_TEST_INFO("Test 1"); + + handler1 = signal(SIGSEGV, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGSEGV handler initialized to default"); + + + handler1 = signal(SIGBUS, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGBUS handler initialized to default"); + + + handler1 = signal(SIGILL, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGILL handler initialized to default"); + + handler1 = signal(SIGSYS, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGSYS handler initialized to default"); + + handler1 = signal(SIGTRAP, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGTRAP handler initialized to default"); + + handler1 = signal(SIGFPE, &myhandler); + + CYG_TEST_PASS_FAIL(handler1 == SIG_DFL, + "SIGFPE handler initialized to default"); + + // Test 2 + + CYG_TEST_INFO("Test 2"); + + state = 2; + +#if 0 +#else + if (0==setjmp(jbuf)) { + cause_memerror(); + CYG_TEST_FAIL("Didn't cause exception"); + } + + CYG_TEST_PASS_FAIL(3==state, "handler returned correctly"); +#endif + + // Test 3 + + CYG_TEST_INFO("Test 3"); + + state = 3; + +#if 0 +#elif defined(CYGPKG_HAL_MN10300) + CYG_TEST_PASS("Test 3 not applicable to mn10300"); +#elif defined(CYGPKG_HAL_TX39) + CYG_TEST_PASS("Test 3 not applicable to mips-tx39"); +#elif defined(CYGPKG_HAL_SPARCLITE) + CYG_TEST_PASS("Test 3 not applicable to sparclite"); +#elif defined(CYGPKG_HAL_I386_LINUX) + CYG_TEST_PASS("Test 3 not applicable to i386/Linux"); + // See linux.S for details. +#elif defined(CYGPKG_HAL_POWERPC) + CYG_TEST_PASS("Test 3 not applicable to PowerPC"); +#else + + if (0==setjmp(jbuf)) { + (void)cause_fpe(0); + CYG_TEST_FAIL("Didn't cause exception"); + } + + CYG_TEST_PASS_FAIL(4==state, "handler returned correctly"); +#endif + +#else + CYG_TEST_NA("Testing not applicable to this configuration"); +#endif + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " + "library signal functions"); + +} // main() + +// EOF signal2.c diff --git a/packages/language/c/libc/current/tests/stdio/sprintf1.c b/packages/language/c/libc/current/tests/stdio/sprintf1.c --- a/packages/language/c/libc/current/tests/stdio/sprintf1.c +++ b/packages/language/c/libc/current/tests/stdio/sprintf1.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library sprintf() function // @@ -609,7 +609,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/stdio/sprintf2.c b/packages/language/c/libc/current/tests/stdio/sprintf2.c --- a/packages/language/c/libc/current/tests/stdio/sprintf2.c +++ b/packages/language/c/libc/current/tests/stdio/sprintf2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library sprintf() function // @@ -189,8 +189,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this " - "configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/stdio/sscanf.c b/packages/language/c/libc/current/tests/stdio/sscanf.c --- a/packages/language/c/libc/current/tests/stdio/sscanf.c +++ b/packages/language/c/libc/current/tests/stdio/sscanf.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library sscanf() function // @@ -212,7 +212,7 @@ test( CYG_ADDRWORD data ) CYG_TEST_PASS_FAIL(ret == 5, "Combinations #2 return code"); -#ifdef CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT +#ifdef CYGSEM_LIBC_STDIO_SCANF_FLOATING_POINT // How much _relative_ error do we allow? #define FLT_TOLERANCE 1.0e-3 @@ -293,7 +293,7 @@ test( CYG_ADDRWORD data ) #else CYG_TEST_PASS("Floating point tests skipped - not configured"); -#endif // ifdef CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT +#endif // ifdef CYGSEM_LIBC_STDIO_SCANF_FLOATING_POINT CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " @@ -314,7 +314,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/stdio/stdiooutput.c b/packages/language/c/libc/current/tests/stdio/stdiooutput.c --- a/packages/language/c/libc/current/tests/stdio/stdiooutput.c +++ b/packages/language/c/libc/current/tests/stdio/stdiooutput.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/9/4 // Description: Contains testcode for C library stdio output // functions @@ -224,8 +224,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this " - "configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/stdlib/abs.c b/packages/language/c/libc/current/tests/stdlib/abs.c --- a/packages/language/c/libc/current/tests/stdlib/abs.c +++ b/packages/language/c/libc/current/tests/stdlib/abs.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-02-12 // Description: Contains testcode for C library abs() function // // @@ -58,27 +58,20 @@ externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC int x; -#endif CYG_TEST_INIT(); CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C " "library abs() function"); -#ifdef CYGPKG_LIBC // Check 1 x = 5; CYG_TEST_PASS_FAIL( abs(x) == 5, "abs(5)"); @@ -107,10 +100,6 @@ main( int argc, char *argv[] ) x = -INT_MAX; CYG_TEST_PASS_FAIL( abs(x) == INT_MAX, "abs(-INT_MAX)"); -#else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // ifndef CYGPKG_LIBC - CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " "library abs() function"); diff --git a/packages/language/c/libc/current/tests/stdlib/atexit.c b/packages/language/c/libc/current/tests/stdlib/atexit.c --- a/packages/language/c/libc/current/tests/stdlib/atexit.c +++ b/packages/language/c/libc/current/tests/stdlib/atexit.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/8/31 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-03 // Description: Contains testcode for C library atexit() function // // @@ -63,11 +63,7 @@ static int failed; externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() @@ -108,15 +104,12 @@ myfun3( void ) int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC -#endif - CYG_TEST_INIT(); CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C " "library atexit() function"); -#if defined(CYGPKG_LIBC) +#if defined(CYGFUN_LIBC_ATEXIT) // we only have one test in us! We can only exit once :-) @@ -131,12 +124,12 @@ main( int argc, char *argv[] ) return 0; #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " "library atexit() function"); -#endif // if defined(CYGPKG_LIBC) +#endif // if defined(CYGFUN_LIBC_ATEXIT) } // main() diff --git a/packages/language/c/libc/current/tests/stdlib/atoi.c b/packages/language/c/libc/current/tests/stdlib/atoi.c --- a/packages/language/c/libc/current/tests/stdlib/atoi.c +++ b/packages/language/c/libc/current/tests/stdlib/atoi.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library atoi() function // @@ -129,7 +129,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() // EOF atoi.c diff --git a/packages/language/c/libc/current/tests/stdlib/atol.c b/packages/language/c/libc/current/tests/stdlib/atol.c --- a/packages/language/c/libc/current/tests/stdlib/atol.c +++ b/packages/language/c/libc/current/tests/stdlib/atol.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library atol() function // @@ -128,7 +128,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() // EOF atol.c diff --git a/packages/language/c/libc/current/tests/stdlib/bsearch.c b/packages/language/c/libc/current/tests/stdlib/bsearch.c --- a/packages/language/c/libc/current/tests/stdlib/bsearch.c +++ b/packages/language/c/libc/current/tests/stdlib/bsearch.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library bsearch() function // @@ -136,7 +136,7 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( result==NULL, "bsearch() nonexistent element"); #else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // ifndef CYGPKG_LIBC CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " diff --git a/packages/language/c/libc/current/tests/stdlib/div.c b/packages/language/c/libc/current/tests/stdlib/div.c --- a/packages/language/c/libc/current/tests/stdlib/div.c +++ b/packages/language/c/libc/current/tests/stdlib/div.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-03-03 // Description: Contains testcode for C library div() function // // @@ -42,10 +42,6 @@ // TESTCASE_TYPE=CYG_TEST_MODULE // COMPOUND_TESTCASE -// CONFIGURATION - -#include // Configuration header - // INCLUDES #include @@ -57,28 +53,21 @@ externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC int num, denom; div_t result; -#endif CYG_TEST_INIT(); CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " "div() function"); -#ifdef CYGPKG_LIBC num = 10232; denom = 43; result = div(num, denom); @@ -98,9 +87,30 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==0), "div( 20, 20 )"); -#else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // ifndef CYGPKG_LIBC + num = -5; + denom = 4; + result = div(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==-1) && (result.rem==-1), + "div( -5, 4 )"); + + num = 5; + denom = -4; + result = div(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==-1) && (result.rem==1), + "div( 5, -4 )"); + + num = -5; + denom = -3; + result = div(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==-2), + "div( -5, -3 )"); + + num = -7; + denom = -7; + result = div(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==0), + "div( -7, -7 )"); + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " "div() function"); diff --git a/packages/language/c/libc/current/tests/stdlib/getenv.c b/packages/language/c/libc/current/tests/stdlib/getenv.c --- a/packages/language/c/libc/current/tests/stdlib/getenv.c +++ b/packages/language/c/libc/current/tests/stdlib/getenv.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/8/31 // Description: Contains testcode for C library getenv() function // @@ -70,6 +70,7 @@ cyg_package_start( void ) #endif } // cyg_package_start() +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_ENVIRONMENT) static int my_strcmp(const char *s1, const char *s2) { @@ -81,12 +82,12 @@ my_strcmp(const char *s1, const char *s2 return (*s1 - *s2); } // my_strcmp() - +#endif int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_ENVIRONMENT) char *str; char *env1[] = { NULL }; @@ -104,48 +105,53 @@ main( int argc, char *argv[] ) "library getenv() function"); #if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_ENVIRONMENT) + // Check 1 + str = getenv("ThisIsAVeryUnlikelyName"); + CYG_TEST_PASS_FAIL( str==NULL, "Simple getenv() default environ" ); + + // Check 2 environ = (char **)&env1; str = getenv("wibble"); CYG_TEST_PASS_FAIL( str==NULL, "Simple getenv() with empty environ" ); - // Check 2 + // Check 3 environ = (char **)&env2; str = getenv("WIBBLE"); CYG_TEST_PASS_FAIL( (str != NULL) && !my_strcmp(str, "fred"), "Simple getenv()" ); - // Check 3 + // Check 4 str = getenv("wibble"); CYG_TEST_PASS_FAIL( str==NULL, "Simple getenv() for something not in the " "environment" ); - // Check 4 + // Check 5 environ = (char **)&env3; str = getenv("PATH"); CYG_TEST_PASS_FAIL( (str!= NULL) && !my_strcmp(str,"/usr/local/bin:/usr/bin"), "Multiple string environment" ); - // Check 5 + // Check 6 str = getenv("PATh"); CYG_TEST_PASS_FAIL( str==NULL, "getenv() for something not in the " "environment for multiple string environment" ); - // Check 6 + // Check 7 str = getenv("home"); CYG_TEST_PASS_FAIL( (str != NULL) && !my_strcmp(str, "hatstand"), "Case-sensitive environment names" ); - // Check 7 + // Check 8 str = getenv("TEST"); CYG_TEST_PASS_FAIL( (str != NULL) && !my_strcmp(str, "1234=5678"), "environment value containing '='" ); #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_ENVIRONMENT) CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C " diff --git a/packages/language/c/libc/current/tests/stdlib/labs.c b/packages/language/c/libc/current/tests/stdlib/labs.c --- a/packages/language/c/libc/current/tests/stdlib/labs.c +++ b/packages/language/c/libc/current/tests/stdlib/labs.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library labs() function // @@ -103,7 +103,7 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( labs(x) == 23456789, "labs(-23456789"); #else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // ifndef CYGPKG_LIBC CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " diff --git a/packages/language/c/libc/current/tests/stdlib/ldiv.c b/packages/language/c/libc/current/tests/stdlib/ldiv.c --- a/packages/language/c/libc/current/tests/stdlib/ldiv.c +++ b/packages/language/c/libc/current/tests/stdlib/ldiv.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-02-03 // Description: Contains testcode for C library ldiv() function // // @@ -42,11 +42,6 @@ // TESTCASE_TYPE=CYG_TEST_MODULE // COMPOUND_TESTCASE - -// CONFIGURATION - -#include // Configuration header - // INCLUDES #include @@ -59,28 +54,21 @@ externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() int main( int argc, char *argv[] ) { -#ifdef CYGPKG_LIBC long num, denom; ldiv_t result; -#endif CYG_TEST_INIT(); CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " "ldiv() function"); -#ifdef CYGPKG_LIBC num = 10232; denom = 43; result = ldiv(num, denom); @@ -93,13 +81,36 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( (result.quot==2) && (result.rem==232), "ldiv( 4232, 2000 )"); - num = 20; denom = 20; result = ldiv(num, denom); CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==0), "ldiv( 20, 20 )"); + num = -5; + denom = 4; + result = ldiv(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==-1) && (result.rem==-1), + "ldiv( -5, 4 )"); + + num = 5; + denom = -4; + result = ldiv(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==-1) && (result.rem==1), + "ldiv( 5, -4 )"); + + num = -5; + denom = -3; + result = ldiv(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==-2), + "ldiv( -5, -3 )"); + + num = -7; + denom = -7; + result = ldiv(num, denom); + CYG_TEST_PASS_FAIL( (result.quot==1) && (result.rem==0), + "ldiv( -7, -7 )"); + num = 90123456; denom = 12345678; result = ldiv(num, denom); @@ -112,10 +123,6 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( (result.quot==732711) && (result.rem==3), "ldiv( 90123456, 123 )"); -#else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // ifndef CYGPKG_LIBC - CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " "ldiv() function"); diff --git a/packages/language/c/libc/current/tests/stdlib/malloc1.c b/packages/language/c/libc/current/tests/stdlib/malloc1.c --- a/packages/language/c/libc/current/tests/stdlib/malloc1.c +++ b/packages/language/c/libc/current/tests/stdlib/malloc1.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library malloc(), calloc() and // free() functions @@ -226,7 +226,7 @@ main( int argc, char *argv[] ) free(str2); #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " diff --git a/packages/language/c/libc/current/tests/stdlib/malloc2.c b/packages/language/c/libc/current/tests/stdlib/malloc2.c --- a/packages/language/c/libc/current/tests/stdlib/malloc2.c +++ b/packages/language/c/libc/current/tests/stdlib/malloc2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode to stress-test C library malloc(), // calloc() and free() functions @@ -45,12 +45,15 @@ // INCLUDES -#include // config header for C library so we can know size - // of malloc pool +#include // Overall system configuration +#include // config header for C library so we can know + // size of malloc pool #include #include #include // C library initialisation - +#ifdef CYGPKG_KERNEL +# include // CYGSEM_KERNEL_MEMORY_COALESCE +#endif // CONSTANTS @@ -58,7 +61,8 @@ // GLOBALS -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) static int problem=0; #endif @@ -76,7 +80,8 @@ cyg_package_start( void ) } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) static void * safe_malloc( size_t size ) @@ -159,12 +164,15 @@ fill_with_data( char *buf, int size ) } // fill_with_data() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) int main( int argc, char *argv[] ) { -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) + char *str1, *str2, *str3; int j; #endif @@ -174,7 +182,8 @@ main( int argc, char *argv[] ) CYG_TEST_INFO("Starting stress tests from testcase " __FILE__ " for C " "library malloc(), calloc() and free() functions"); -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) if ( CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE < 300 ) { @@ -229,8 +238,9 @@ main( int argc, char *argv[] ) CYG_TEST_PASS("Stress test completed successfully"); #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) + CYG_TEST_NA("Testing is not applicable to this configuration"); +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) CYG_TEST_FINISH("Finished stress tests from testcase " __FILE__ " for C " diff --git a/packages/language/c/libc/current/tests/stdlib/malloc3.c b/packages/language/c/libc/current/tests/stdlib/malloc3.c --- a/packages/language/c/libc/current/tests/stdlib/malloc3.c +++ b/packages/language/c/libc/current/tests/stdlib/malloc3.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library malloc(), calloc() and // free() functions @@ -45,8 +45,12 @@ // INCLUDES -#include // config header for C library so we can know size - // of malloc pool +#include // Overall system configuration +#include // config header for C library so we can know + // size of malloc pool +#ifdef CYGPKG_KERNEL +# include // CYGSEM_KERNEL_MEMORY_COALESCE +#endif #include #include #include // C library initialisation @@ -65,7 +69,8 @@ cyg_package_start( void ) } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) static int fill_with_data( char *buf, int size ) { @@ -95,12 +100,16 @@ fill_with_data( char *buf, int size ) return 1; } // fill_with_data() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) + int main( int argc, char *argv[] ) { -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) + char *str; int size = CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE/2; #endif @@ -111,7 +120,8 @@ main( int argc, char *argv[] ) "malloc() and free() functions"); CYG_TEST_INFO("This checks allocation and freeing of large regions"); -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) // Don't allocate all the memory at once - leave room for any structures // used to manage the memory @@ -168,8 +178,10 @@ main( int argc, char *argv[] ) #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) + CYG_TEST_NA("Testing is not applicable to this configuration"); +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " "malloc() and free() functions"); diff --git a/packages/language/c/libc/current/tests/stdlib/qsort.c b/packages/language/c/libc/current/tests/stdlib/qsort.c --- a/packages/language/c/libc/current/tests/stdlib/qsort.c +++ b/packages/language/c/libc/current/tests/stdlib/qsort.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/6/3 // Description: Contains testcode for C library qsort() function // @@ -112,7 +112,7 @@ main( int argc, char *argv[] ) CYG_TEST_PASS_FAIL( fail == 0, "qsort() sorts correctly" ); #else // ifndef CYGPKG_LIBC - CYG_TEST_PASS("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); #endif // ifndef CYGPKG_LIBC CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " diff --git a/packages/language/c/libc/current/tests/stdlib/rand1.c b/packages/language/c/libc/current/tests/stdlib/rand1.c --- a/packages/language/c/libc/current/tests/stdlib/rand1.c +++ b/packages/language/c/libc/current/tests/stdlib/rand1.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-01-20 // Description: Contains testcode for C library rand() function // // @@ -54,7 +54,7 @@ // HOW TO START TESTS -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) # define START_TEST( test ) test(0) @@ -86,7 +86,7 @@ cyg_package_start( void ) -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) static void test( CYG_ADDRWORD data ) @@ -104,13 +104,14 @@ test( CYG_ADDRWORD data ) (array[ctr]==array[ctr+3])) hits++; - CYG_TEST_PASS_FAIL(hits <= TOLERANCE, "Simple test for rand() repetition"); + CYG_TEST_PASS_FAIL(hits <= TOLERANCE, + "Simple test for rand() repetition"); - CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " - "rand() function"); + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for " + "C library rand() function"); } // test() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#endif // if defined(CYGPKG_LIBC) int @@ -123,7 +124,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() // EOF rand1.c diff --git a/packages/language/c/libc/current/tests/stdlib/rand2.c b/packages/language/c/libc/current/tests/stdlib/rand2.c --- a/packages/language/c/libc/current/tests/stdlib/rand2.c +++ b/packages/language/c/libc/current/tests/stdlib/rand2.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-01-20 // Description: Contains testcode for C library rand() function // // @@ -55,7 +55,7 @@ // HOW TO START TESTS -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) # define START_TEST( test ) test(0) @@ -79,7 +79,7 @@ cyg_package_start( void ) } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) static void test( CYG_ADDRWORD data ) @@ -91,21 +91,18 @@ test( CYG_ADDRWORD data ) // Test that rand starts with the seed as CYGNUM_LIBC_RAND_SEED - for ( count=0; count < 100; ++count ) - { + for ( count=0; count < 100; ++count ) { rand_data1[count] = rand(); } // for // set seed to CYGNUM_LIBC_RAND_SEED srand(CYGNUM_LIBC_RAND_SEED); - for ( count=0; count < 100; ++count ) - { + for ( count=0; count < 100; ++count ) { rand_data2[count] = rand(); } // for - for ( count=0; count < 100; ++count ) - { + for ( count=0; count < 100; ++count ) { if (rand_data1[count] != rand_data2[count]) ++fail; } // for @@ -117,7 +114,7 @@ test( CYG_ADDRWORD data ) "library rand() function"); } // test() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#endif // if defined(CYGPKG_LIBC) int @@ -130,8 +127,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this " - "configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/stdlib/rand3.c b/packages/language/c/libc/current/tests/stdlib/rand3.c --- a/packages/language/c/libc/current/tests/stdlib/rand3.c +++ b/packages/language/c/libc/current/tests/stdlib/rand3.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: ctarpy, jlarmour +// Date: 1999-03-23 // Description: Contains testcode for C library rand() function. This tests // that random numbers are distributed well between 0 and // RAND_MAX @@ -39,10 +39,6 @@ // //####DESCRIPTIONEND#### -// Declarations for test system: -// -// TESTCASE_TYPE=CYG_TEST_MODULE - // CONFIGURATION @@ -56,24 +52,24 @@ #include // C library initialisation -// HOW TO START TESTS - -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) - -# define START_TEST( test ) test(0) +// CONSTANTS -#else +#define NUM_BUCKETS 1000 // how many categories to define +#define TEST_LENGTH 200000 // how many samples to take - careful + // when reducing this since it also reduces + // BUCKET_DIFF_TOLERANCE below. If you reduce + // it too low, BUCKET_DIFF_TOLERANCE will need + // a fudge factor -# define START_TEST( test ) CYG_EMPTY_STATEMENT +#define BUCKET_SIZE (RAND_MAX / NUM_BUCKETS) // number space allocated + // to bucket from 0..RAND_MAX +#define NUM_PER_BUCKET (TEST_LENGTH/NUM_BUCKETS) // Expected number that went + // into each bucket at end -#endif // if defined(CYGPKG_LIBC) +// how much the buckets can vary at the end. +#define BUCKET_DIFF_TOLERANCE (NUM_PER_BUCKET/4) // allowed to vary 25% -// CONSTANTS - -#define NUM_BUCKETS 1024 // how many categories to define -#define TEST_LENGTH 100000 // how many samples to take -#define BUCKET_DIFF_TOLERANCE 4 // how much the buckets can vary at the end // FUNCTIONS @@ -81,70 +77,27 @@ externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) - -static int +static __inline__ int my_abs(int i) { return (i < 0) ? -i : i; } // my_abs() -static void -test( CYG_ADDRWORD data ) -{ - static cyg_uint8 rand_bucket[NUM_BUCKETS]; // divide the space from - // 0..RAND_MAX into - // NUM_BUCKETS categories - cyg_ucount32 count; // loop variable - int r; // temp for rand() variable - cyg_ucount32 sum; // sum of bucket contents - cyg_ucount32 average; // average of bucket contents - - // initialise all buckets to 0 - do it ourselves rather than rely on memset - for ( count=0; count < NUM_BUCKETS; ++count ) - { - rand_bucket[ count ] = 0; - } // for - - for ( count=0; count < TEST_LENGTH; ++count ) - { - r = rand(); - ++rand_bucket[ r % NUM_BUCKETS ]; - } // for - - for ( sum=0, count=0; count < NUM_BUCKETS; ++count ) - { - sum += rand_bucket[ count ]; - } // for - - average = sum / NUM_BUCKETS; - - for ( count=0; count < NUM_BUCKETS; ++count ) - { - if ( my_abs(rand_bucket[count] - average) > BUCKET_DIFF_TOLERANCE ) - break; - } // for - - CYG_TEST_PASS_FAIL( (count >= NUM_BUCKETS), "even distribution of rand()"); - - CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " - "rand() function"); -} // test() - -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) - - int main(int argc, char *argv[]) { + // divide the space from 0..RAND_MAX into NUM_BUCKETS categories *BUT* + // RAND_MAX / NUM_BUCKETS may not divide exactly so we leave space for + // the bits left over, in case there are any! So we add 1. + + static cyg_uint8 rand_bucket[NUM_BUCKETS+1]; + cyg_ucount32 count; // loop variable + int r; // temp for rand() variable + CYG_TEST_INIT(); CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " @@ -153,9 +106,45 @@ main(int argc, char *argv[]) CYG_TEST_INFO("This test tests the distribution of random numbers and"); CYG_TEST_INFO("may take some time"); - START_TEST( test ); + for ( count=0; count < TEST_LENGTH; ++count ) { + r = rand(); + ++rand_bucket[ r / BUCKET_SIZE ]; + if ((count%10000)==0) + CYG_TEST_STILL_ALIVE(count, "Still testing..."); + } // for + + for ( count=0; count < NUM_BUCKETS; ++count ) { + cyg_ucount32 diff; + + diff = my_abs( rand_bucket[count] - NUM_PER_BUCKET ); + if ( diff > BUCKET_DIFF_TOLERANCE ) + break; + } // for - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + // if the previous loop completed, we may want to check the "extra" + // bucket (see the comment at the top) that may have some bits in if + // RAND_MAX doesn't split into NUM_BUCKETS evenly. The number of random + // digits that fell into that bucket would be expected to be proportional + // to the ratio of the remainder of (RAND_MAX % NUM_BUCKETS) to + // NUM_BUCKETS. + if (count == NUM_BUCKETS) { + cyg_ucount32 rem; + cyg_ucount32 last_bucket_expected; + cyg_ucount32 diff; + + rem = RAND_MAX % NUM_BUCKETS; + + last_bucket_expected = (rem * NUM_PER_BUCKET) / BUCKET_SIZE; + + diff = my_abs(last_bucket_expected - rand_bucket[count]); + CYG_TEST_PASS_FAIL(diff <= BUCKET_DIFF_TOLERANCE, + "Upper bound fencepost test"); + } + CYG_TEST_PASS_FAIL( (count >= NUM_BUCKETS), + "even distribution of rand()"); + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for " + "C library rand() function"); } // main() diff --git a/packages/language/c/libc/current/tests/stdlib/rand4.c b/packages/language/c/libc/current/tests/stdlib/rand4.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/stdlib/rand4.c @@ -0,0 +1,117 @@ +//================================================================= +// +// rand4.c +// +// Testcase for C library rand() +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): rosalia +// Contributors: rosalia, jlarmour +// Date: 1999-03-19 +// Description: Contains testcode for C library rand() function. This tests +// that random numbers do not have periodicity in the lower +// bit +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// CONSTANTS + +#define TEST_LENGTH 100000 // how many samples to take + +// DEFINES + +#define TEST_VALID (!defined(CYGIMP_LIBC_RAND_SIMPLEST)) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + +int +main(int argc, char *argv[]) +{ +#if TEST_VALID + int i; + int r, prev, prevprev; + int how_many_periodics = 0; +#endif + + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "rand() function"); + + CYG_TEST_INFO("This test tests the distribution of random numbers and"); + CYG_TEST_INFO("may take some time"); + +#if TEST_VALID + r = rand() % 2; + prev = r; + r = rand() % 2; + for (i = 0; i < TEST_LENGTH; ++i) { + prevprev = prev; + prev = r; + r = rand() % 2; + if (r == prevprev) { + ++how_many_periodics; + } + if (how_many_periodics > (2*TEST_LENGTH)/3) { + break; + } + } + + CYG_TEST_PASS_FAIL( (how_many_periodics <= (2*TEST_LENGTH)/3), + "periodicity of rand() in lowest bit"); + +#else + + // FIXME: should be an _expected_ fail i.e. XFAIL + CYG_TEST_NA("Chosen rand algorithm is known to fail this test"); + +#endif + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for " + "C library rand() function"); +} // main() + + +// EOF rand4.c diff --git a/packages/language/c/libc/current/tests/stdlib/realloc.c b/packages/language/c/libc/current/tests/stdlib/realloc.c --- a/packages/language/c/libc/current/tests/stdlib/realloc.c +++ b/packages/language/c/libc/current/tests/stdlib/realloc.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998/8/31 // Description: Contains testcode for C library realloc() function // @@ -44,8 +44,12 @@ // INCLUDES -#include // config header for C library so we can know size - // of malloc pool +#include // Overall system configuration +#include // config header for C library so we can know + // size of malloc pool +#ifdef CYGPKG_KERNEL +# include // CYGSEM_KERNEL_MEMORY_COALESCE +#endif #include #include #include // C library initialisation @@ -64,7 +68,8 @@ cyg_package_start( void ) } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) static const char alphabet[]="abcdefghijklmnopqrstuvwxyz{-}[]#';:@~!$^&*()" "ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890"; @@ -109,12 +114,16 @@ fill_with_alphabet( char *buf, int size, return compare_with_alphabet( buf, size, offset); // be sure } // fill_with_alphabet() -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) + int main( int argc, char *argv[] ) { -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) + char *str; int size = CYGNUM_LIBC_MALLOC_MEMPOOL_SIZE/2; #endif @@ -124,7 +133,8 @@ main( int argc, char *argv[] ) CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " "realloc() function"); -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) +#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && \ + defined(CYGSEM_KERNEL_MEMORY_COALESCE) str = (char *)realloc( NULL, size ); CYG_TEST_PASS_FAIL( str != NULL, "realloc doing only allocation"); @@ -164,8 +174,10 @@ main( int argc, char *argv[] ) #else - CYG_TEST_PASS("Testing is not applicable to this configuration"); -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) + CYG_TEST_NA("Testing is not applicable to this configuration"); +#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_MALLOC) && + // defined(CYGSEM_KERNEL_MEMORY_COALESCE) + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " "realloc() function"); diff --git a/packages/language/c/libc/current/tests/stdlib/srand.c b/packages/language/c/libc/current/tests/stdlib/srand.c --- a/packages/language/c/libc/current/tests/stdlib/srand.c +++ b/packages/language/c/libc/current/tests/stdlib/srand.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy, jlarmour +// Contributors: jlarmour +// Date: 1999-01-20 // Description: Contains testcode for C library srand() function // // @@ -54,7 +54,7 @@ // HOW TO START TESTS -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) # define START_TEST( test ) test(0) @@ -62,7 +62,7 @@ # define START_TEST( test ) CYG_EMPTY_STATEMENT -#endif // if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#endif // if defined(CYGPKG_LIBC) // CONSTANTS @@ -88,7 +88,7 @@ cyg_package_start( void ) } // cyg_package_start() -#if defined(CYGPKG_LIBC) && defined(CYGPKG_LIBC_RAND) +#if defined(CYGPKG_LIBC) static void test( CYG_ADDRWORD data ) @@ -115,8 +115,7 @@ test( CYG_ADDRWORD data ) // Make sure arrays 1 and 3 are the same fail = 0; - for (ctr=0; ctr // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int my_strcmp(const char *s1, const char *s2) +{ + for ( ; *s1 == *s2 ; s1++,s2++ ) + { + if ( *s1 == '\0' ) + break; + } // for + + return (*s1 - *s2); +} // my_strcmp() + + +static void +test( CYG_ADDRWORD data ) +{ + struct tm tm1; + char *ret; + + tm1.tm_sec = 4; + tm1.tm_min = 23; + tm1.tm_hour = 20; + tm1.tm_mday = 21; + tm1.tm_mon = 1; + tm1.tm_year = 74; + tm1.tm_wday = 4; + tm1.tm_yday = 51; + tm1.tm_isdst = 0; + + ret = asctime(&tm1); + + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Thu Feb 21 20:23:04 1974\n"), + "asctime test #1"); + tm1.tm_sec = 3; + tm1.tm_min = 51; + tm1.tm_hour = 5; + tm1.tm_mday = 2; + tm1.tm_mon = 11; + tm1.tm_year = 68; + tm1.tm_wday = 1; + tm1.tm_yday = 336; + tm1.tm_isdst = 0; + + ret = asctime(&tm1); + + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Mon Dec 02 05:51:03 1968\n"), + "asctime test #2"); + + // make this predictable - independent of the user option + cyg_libc_time_setzoneoffsets(0, 3600); + + tm1.tm_sec = 3; + tm1.tm_min = 51; + tm1.tm_hour = 5; + tm1.tm_mday = 2; + tm1.tm_mon = 6; + tm1.tm_year = 68; + tm1.tm_wday = 2; + tm1.tm_yday = 183; + tm1.tm_isdst = 1; + + ret = asctime(&tm1); + + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Tue Jul 02 05:51:03 1968\n"), + "asctime test #3"); + + tm1.tm_sec = 0; + tm1.tm_min = 0; + tm1.tm_hour = 0; + tm1.tm_mday = 1; + tm1.tm_mon = 0; + tm1.tm_year = 0; + tm1.tm_wday = 1; + tm1.tm_yday = 0; + tm1.tm_isdst = 0; + + ret = asctime(&tm1); + + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Mon Jan 01 00:00:00 1900\n"), + "asctime test #4"); + + tm1.tm_sec = 0; + tm1.tm_min = 0; + tm1.tm_hour = 0; + tm1.tm_mday = 1; + tm1.tm_mon = 0; + tm1.tm_year = 100; + tm1.tm_wday = 6; + tm1.tm_yday = 0; + tm1.tm_isdst = 0; + + ret = asctime(&tm1); + + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Sat Jan 01 00:00:00 2000\n"), + "asctime Y2K test #5"); + +#ifdef CYGFUN_LIBC_TIME_POSIX + { + char ret2[100]; + + tm1.tm_sec = 3; + tm1.tm_min = 51; + tm1.tm_hour = 5; + tm1.tm_mday = 2; + tm1.tm_mon = 11; + tm1.tm_year = 68; + tm1.tm_wday = 1; + tm1.tm_yday = 336; + tm1.tm_isdst = 0; + + ret = asctime_r(&tm1, ret2); + + CYG_TEST_PASS_FAIL((ret==ret2) && + !my_strcmp(ret, "Mon Dec 02 05:51:03 1968\n"), + "asctime_r test #1"); + + } +#endif + + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "asctime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "asctime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF asctime.c diff --git a/packages/language/c/libc/current/tests/time/clock.c b/packages/language/c/libc/current/tests/time/clock.c --- a/packages/language/c/libc/current/tests/time/clock.c +++ b/packages/language/c/libc/current/tests/time/clock.c @@ -22,16 +22,16 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): ctarpy@cygnus.co.uk, jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998/6/3 +// Author(s): ctarpy +// Contributors: ctarpy, jlarmour +// Date: 1999-03-05 // Description: Contains testcode for C library clock() function // // @@ -51,10 +51,21 @@ #include #include // C library initialisation +#define RUN_TEST 1 + +// This test is bound to fail on Linux -- we don't have exclusive access +// to the CPU. +#if defined(CYGPKG_HAL_I386_LINUX) +#undef RUN_TEST +#define RUN_TEST 0 +#endif + // HOW TO START TESTS -#if defined(CYGPKG_LIBC) +#if RUN_TEST + +#include # define START_TEST( test ) test(0) @@ -72,7 +83,7 @@ #define MAX_TIMEOUT 1000000 // Percentage error before we declare fail: range 0 - 100 -#define TOLERANCE 20 +#define TOLERANCE 40 // FUNCTIONS @@ -81,15 +92,11 @@ externC void cyg_package_start( void ) { -#ifdef CYGPKG_LIBC cyg_iso_c_start(); -#else - (void)main(0, NULL); -#endif } // cyg_package_start() -#ifdef CYGPKG_LIBC +#if RUN_TEST static int my_abs(int i) @@ -103,20 +110,21 @@ test( CYG_ADDRWORD data ) { unsigned long ctr, ctr2, err; clock_t clock_init; - clock_t clock_first, clock_second, clock_third; + clock_t clock_first=0, clock_second=0, clock_third=0; + + // First disable the instruction cache - it may affect the timing loops + // below + HAL_ICACHE_DISABLE(); // This waits for a clock tick, to ensure that we are at the // start of a clock period. Then sit in a tight loop to get // the clock period. Repeat this, and make sure that it the // two timed periods are acceptably close. - CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " - "clock() function"); - err = 101; clock_init = clock(); - if (clock_init == -1) // unimplemented is just as valid + if (clock_init == (clock_t)-1) // unimplemented is just as valid { CYG_TEST_PASS_FINISH( "clock() returns -1, meaning unimplemented"); } // if @@ -146,7 +154,7 @@ test( CYG_ADDRWORD data ) if ((clock_third=clock()) > clock_second) break; // Hit the next clock pulse } // for - if (ctr < MAX_TIMEOUT) + if (ctr2 < MAX_TIMEOUT) { err = (100 * my_abs(ctr-ctr2)) / ctr; } // if (ctr < MAX_TIMEOUT) @@ -183,7 +191,7 @@ main(int argc, char *argv[]) START_TEST( test ); - CYG_TEST_PASS_FINISH("Testing is not applicable to this configuration"); + CYG_TEST_NA("Testing is not applicable to this configuration"); } // main() diff --git a/packages/language/c/libc/current/tests/time/ctime.c b/packages/language/c/libc/current/tests/time/ctime.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/ctime.c @@ -0,0 +1,136 @@ +//================================================================= +// +// ctime.c +// +// Testcase for C library ctime() function +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library ctime() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int my_strcmp(const char *s1, const char *s2) +{ + for ( ; *s1 == *s2 ; s1++,s2++ ) + { + if ( *s1 == '\0' ) + break; + } // for + + return (*s1 - *s2); +} // my_strcmp() + + +static void +test( CYG_ADDRWORD data ) +{ + time_t t; + char *ret; + char ret2[26]; + + // make this predictable - independent of the user option + cyg_libc_time_setzoneoffsets(0, 3600); + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTOFF ); + + t = (time_t)130710184; + + ret = ctime(&t); + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Thu Feb 21 20:23:04 1974\n"), + "ctime test #1"); + + t = (time_t)946689894; + + ret = ctime(&t); + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Sat Jan 01 01:24:54 2000\n"), + "ctime Y2K test #2"); + + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTON ); + + t = (time_t)-113186106; + + ret = ctime(&t); + CYG_TEST_PASS_FAIL(!my_strcmp(ret, "Tue Jun 01 00:24:54 1966\n"), + "ctime test #3"); + +#ifdef CYGFUN_LIBC_TIME_POSIX + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTOFF ); + + t = (time_t)915510061; + + ret = ctime_r(&t, ret2); + CYG_TEST_PASS_FAIL(!my_strcmp(ret2, "Tue Jan 05 04:21:01 1999\n"), + "ctime_r test #1"); +#endif + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "ctime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "ctime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF ctime.c diff --git a/packages/language/c/libc/current/tests/time/gmtime.c b/packages/language/c/libc/current/tests/time/gmtime.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/gmtime.c @@ -0,0 +1,173 @@ +//================================================================= +// +// gmtime.c +// +// Testcase for C library gmtime() function +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library gmtime() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int +cmp_structtm(struct tm *tm1, struct tm *tm2) +{ + if ((tm1->tm_sec != tm2->tm_sec) || + (tm1->tm_min != tm2->tm_min) || + (tm1->tm_hour != tm2->tm_hour) || + (tm1->tm_mday != tm2->tm_mday) || + (tm1->tm_mon != tm2->tm_mon) || + (tm1->tm_year != tm2->tm_year) || + (tm1->tm_wday != tm2->tm_wday) || + (tm1->tm_yday != tm2->tm_yday) || + (tm1->tm_isdst != tm2->tm_isdst)) + return 1; + else + return 0; +} + +static void +test( CYG_ADDRWORD data ) +{ + struct tm tm1, *tm2; + time_t t; + + // make this predictable - independent of the user option + cyg_libc_time_setzoneoffsets(0, 3600); + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTOFF ); + + tm1.tm_sec = 4; + tm1.tm_min = 23; + tm1.tm_hour = 20; + tm1.tm_mday = 21; + tm1.tm_mon = 1; + tm1.tm_year = 74; + tm1.tm_wday = 4; + tm1.tm_yday = 51; + tm1.tm_isdst = 0; + + t = (time_t)130710184; + + tm2 = gmtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "gmtime test #1"); + + + tm1.tm_sec = 1; + tm1.tm_min = 21; + tm1.tm_hour = 4; + tm1.tm_mday = 5; + tm1.tm_mon = 0; + tm1.tm_wday = 2; + tm1.tm_yday = 4; + tm1.tm_year = 99; + tm1.tm_isdst = 0; + + t = (time_t)915510061; + + tm2 = gmtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "gmtime test #2"); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 1; + tm1.tm_mday = 1; + tm1.tm_mon = 0; + tm1.tm_year = 100; + tm1.tm_wday = 6; + tm1.tm_yday = 0; + tm1.tm_isdst = 0; + + t = (time_t)946689894; + + tm2 = gmtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "gmtime Y2K test #3"); + + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTON ); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 23; + tm1.tm_mday = 31; + tm1.tm_mon = 4; + tm1.tm_wday = 2; + tm1.tm_yday = 150; + tm1.tm_year = 66; + tm1.tm_isdst = 0; + + t = (time_t)-113186106; + + tm2 = gmtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "gmtime test #4"); + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "gmtime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "gmtime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF gmtime.c diff --git a/packages/language/c/libc/current/tests/time/localtime.c b/packages/language/c/libc/current/tests/time/localtime.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/localtime.c @@ -0,0 +1,173 @@ +//================================================================= +// +// localtime.c +// +// Testcase for C library localtime() function +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library localtime() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int +cmp_structtm(struct tm *tm1, struct tm *tm2) +{ + if ((tm1->tm_sec != tm2->tm_sec) || + (tm1->tm_min != tm2->tm_min) || + (tm1->tm_hour != tm2->tm_hour) || + (tm1->tm_mday != tm2->tm_mday) || + (tm1->tm_mon != tm2->tm_mon) || + (tm1->tm_year != tm2->tm_year) || + (tm1->tm_wday != tm2->tm_wday) || + (tm1->tm_yday != tm2->tm_yday) || + (tm1->tm_isdst != tm2->tm_isdst)) + return 1; + else + return 0; +} + +static void +test( CYG_ADDRWORD data ) +{ + struct tm tm1, *tm2; + time_t t; + + // make this predictable - independent of the user option + cyg_libc_time_setzoneoffsets(0, 3600); + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTOFF ); + + tm1.tm_sec = 4; + tm1.tm_min = 23; + tm1.tm_hour = 20; + tm1.tm_mday = 21; + tm1.tm_mon = 1; + tm1.tm_year = 74; + tm1.tm_wday = 4; + tm1.tm_yday = 51; + tm1.tm_isdst = 0; + + t = (time_t)130710184; + + tm2 = localtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "localtime test #1"); + + + tm1.tm_sec = 1; + tm1.tm_min = 21; + tm1.tm_hour = 4; + tm1.tm_mday = 5; + tm1.tm_mon = 0; + tm1.tm_wday = 2; + tm1.tm_yday = 4; + tm1.tm_year = 99; + tm1.tm_isdst = 0; + + t = (time_t)915510061; + + tm2 = localtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "localtime test #2"); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 1; + tm1.tm_mday = 1; + tm1.tm_mon = 0; + tm1.tm_year = 100; + tm1.tm_wday = 6; + tm1.tm_yday = 0; + tm1.tm_isdst = 0; + + t = (time_t)946689894; + + tm2 = localtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "localtime Y2K test #3"); + + cyg_libc_time_setdst( CYG_LIBC_TIME_DSTON ); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 0; + tm1.tm_mday = 1; + tm1.tm_mon = 5; + tm1.tm_wday = 2; + tm1.tm_yday = 150; + tm1.tm_year = 66; + tm1.tm_isdst = 1; + + t = (time_t)-113186106; + + tm2 = localtime(&t); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, tm2), "localtime test #4"); + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "localtime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "localtime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF localtime.c diff --git a/packages/language/c/libc/current/tests/time/mktime.c b/packages/language/c/libc/current/tests/time/mktime.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/mktime.c @@ -0,0 +1,175 @@ +//================================================================= +// +// mktime.c +// +// Testcase for C library mktime() function +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library mktime() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int +cmp_structtm(struct tm *tm1, struct tm *tm2) +{ + if ((tm1->tm_sec != tm2->tm_sec) || + (tm1->tm_min != tm2->tm_min) || + (tm1->tm_hour != tm2->tm_hour) || + (tm1->tm_mday != tm2->tm_mday) || + (tm1->tm_mon != tm2->tm_mon) || + (tm1->tm_year != tm2->tm_year) || + (tm1->tm_wday != tm2->tm_wday) || + (tm1->tm_yday != tm2->tm_yday) || + (tm1->tm_isdst != tm2->tm_isdst)) + return 1; + else + return 0; +} + +static void +test( CYG_ADDRWORD data ) +{ + struct tm tm1, tm2; + time_t t; + + // make this predictable - independent of the user option + cyg_libc_time_setzoneoffsets(0, 3600); + + tm1.tm_sec = 4; + tm1.tm_min = 23; + tm1.tm_hour = 20; + tm1.tm_mday = 21; + tm1.tm_mon = 1; + tm1.tm_year = 74; + tm1.tm_isdst = 0; + + tm2 = tm1; + tm2.tm_wday = 4; + tm2.tm_yday = 51; + + t = mktime(&tm1); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, &tm2), "mktime test #1"); + CYG_TEST_PASS_FAIL(t == 130710184, "mktime return test #1"); + + tm1.tm_sec = 61; + tm1.tm_min = 20; + tm1.tm_hour = 4; + tm1.tm_mday = 5; + tm1.tm_mon = 0; + tm1.tm_year = 99; + tm1.tm_isdst = 0; + + tm2 = tm1; + tm2.tm_sec=1; + tm2.tm_min = 21; + tm2.tm_wday = 2; + tm2.tm_yday = 4; + + t = mktime(&tm1); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, &tm2), "mktime test #2"); + CYG_TEST_PASS_FAIL(t == 915510061, "mktime return test #2"); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 1; + tm1.tm_mday = 1; + tm1.tm_mon = 0; + tm1.tm_year = 100; + tm1.tm_isdst = 0; + + tm2 = tm1; + tm2.tm_wday = 6; + tm2.tm_yday = 0; + + t = mktime(&tm1); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, &tm2), "mktime Y2K test #3"); + CYG_TEST_PASS_FAIL(t == 946689894, "mktime Y2K return test #3"); + + tm1.tm_sec = 54; + tm1.tm_min = 24; + tm1.tm_hour = 23; + tm1.tm_mday = 31; + tm1.tm_mon = 4; + tm1.tm_year = 66; + tm1.tm_isdst = 1; + + tm2 = tm1; + tm2.tm_wday = 2; + tm2.tm_yday = 150; + + t = mktime(&tm1); + CYG_TEST_PASS_FAIL(!cmp_structtm(&tm1, &tm2), "mktime test #4"); + CYG_TEST_PASS_FAIL(t == -113186106, "mktime return test #4"); + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "mktime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "mktime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF mktime.c diff --git a/packages/language/c/libc/current/tests/time/strftime.c b/packages/language/c/libc/current/tests/time/strftime.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/strftime.c @@ -0,0 +1,193 @@ +//================================================================= +// +// strftime.c +// +// Testcase for C library strftime() function +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library strftime() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // C library configuration + +// INCLUDES + +#include +#include +#include // C library initialisation + +// HOW TO START TESTS + +# define START_TEST( test ) test(0) + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +static int my_strcmp(const char *s1, const char *s2) +{ + for ( ; *s1 == *s2 ; s1++,s2++ ) + { + if ( *s1 == '\0' ) + break; + } // for + + return (*s1 - *s2); +} // my_strcmp() + +static void +test( CYG_ADDRWORD data ) +{ + struct tm tm1; + char s[1000]; + size_t size; + + tm1.tm_sec = 4; + tm1.tm_min = 23; + tm1.tm_hour = 20; + tm1.tm_mday = 21; + tm1.tm_mon = 1; + tm1.tm_year = 74; + tm1.tm_wday = 4; + tm1.tm_yday = 51; + tm1.tm_isdst = 0; + + size = strftime(s, 1000, "", &tm1); + CYG_TEST_PASS_FAIL((size==0) && (*s=='\0'), "strftime test #1"); + + size = strftime(s, 1000, "%a", &tm1); + CYG_TEST_PASS_FAIL((size==3) && !my_strcmp(s, "Thu"), "strftime test #2"); + + size = strftime(s, 1000, "%A", &tm1); + CYG_TEST_PASS_FAIL((size==8) && !my_strcmp(s, "Thursday"), + "strftime test #3"); + + size = strftime(s, 1000, "%b", &tm1); + CYG_TEST_PASS_FAIL((size==3) && !my_strcmp(s, "Feb"), + "strftime test #4"); + + size = strftime(s, 1000, "%B", &tm1); + CYG_TEST_PASS_FAIL((size==8) && !my_strcmp(s, "February"), + "strftime test #5"); + + size = strftime(s, 1000, "%d", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "21"), + "strftime test #6"); + + size = strftime(s, 1000, "%H", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "20"), + "strftime test #7"); + + size = strftime(s, 1000, "%I", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "09"), + "strftime test #8"); + + size = strftime(s, 1000, "%j", &tm1); + CYG_TEST_PASS_FAIL((size==3) && !my_strcmp(s, "051"), + "strftime test #9"); + + size = strftime(s, 1000, "%m", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "01"), + "strftime test #10"); + + size = strftime(s, 1000, "%M", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "23"), + "strftime test #11"); + + size = strftime(s, 1000, "%p", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "pm"), + "strftime test #12"); + + size = strftime(s, 1000, "%S", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "04"), + "strftime test #13"); + + size = strftime(s, 1000, "%U", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "07"), + "strftime test #14"); + + size = strftime(s, 1000, "%w", &tm1); + CYG_TEST_PASS_FAIL((size==1) && !my_strcmp(s, "4"), + "strftime test #15"); + + size = strftime(s, 1000, "%W", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "07"), + "strftime test #16"); + + size = strftime(s, 1000, "%y", &tm1); + CYG_TEST_PASS_FAIL((size==2) && !my_strcmp(s, "74"), + "strftime test #17"); + + size = strftime(s, 1000, "%Y", &tm1); + CYG_TEST_PASS_FAIL((size==4) && !my_strcmp(s, "1974"), + "strftime test #18"); + + size = strftime(s, 1000, "%%", &tm1); + CYG_TEST_PASS_FAIL((size==1) && !my_strcmp(s, "%"), + "strftime test #19"); + + size = strftime(s, 5, "%Y", &tm1); + CYG_TEST_PASS_FAIL((size==4) && !my_strcmp(s, "1974"), + "strftime test #20"); + + size = strftime(s, 4, "%Y", &tm1); + CYG_TEST_PASS_FAIL((size==0), "strftime test #21"); + + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "strftime() function"); +} // test() + + +int +main(int argc, char *argv[]) +{ + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "strftime() function"); + + START_TEST( test ); + + CYG_TEST_NA("Testing is not applicable to this configuration"); + +} // main() + +// EOF strftime.c diff --git a/packages/language/c/libc/current/tests/time/time.c b/packages/language/c/libc/current/tests/time/time.c new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/current/tests/time/time.c @@ -0,0 +1,121 @@ +//================================================================= +// +// time.c +// +// Testcase for C library time() +// +//================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-03-05 +// Description: Contains testcode for C library time() function +// +// +//####DESCRIPTIONEND#### + +// CONFIGURATION + +#include // Configuration header + +// INCLUDES + +#include +#include +#include // C library initialisation + +// CONSTANTS + +// This defines how many loops before we decide that +// time() doesn't work +#define MAX_TIMEOUT 5000000 + + +// FUNCTIONS + + +externC void +cyg_package_start( void ) +{ + cyg_iso_c_start(); +} // cyg_package_start() + + +int +main(int argc, char *argv[]) +{ + time_t t1, t2; + unsigned long ctr; + + CYG_TEST_INIT(); + + CYG_TEST_INFO("Starting tests from testcase " __FILE__ " for C library " + "time() function"); + + t1 = time(&t2); + + CYG_TEST_PASS_FAIL(t1==t2, "time() return value == argument"); + + if (t1 == (time_t)-1) // unimplemented is just as valid + { +#ifndef CYGSEM_LIBC_TIME_TIME_WORKING + CYG_TEST_PASS_FINISH( "time() returns -1, meaning unimplemented"); +#else + CYG_TEST_FAIL("time() returned -1 unnecessarily"); +#endif + } // if + + // First wait for a clock tick + + for (ctr = 0; ctr t1) + break; // Hit the next time pulse + } + CYG_TEST_PASS_FAIL( ctr< MAX_TIMEOUT, "time()'s state changes"); + +#ifdef CYGSEM_LIBC_TIME_SETTIME_WORKING + CYG_TEST_PASS_FAIL(cyg_libc_time_settime(0)==0, "Set time to 0"); + + t1 = time(NULL); + + // give it a small amount of tolerance + CYG_TEST_PASS_FAIL(t1 < 3, "t1 remembered setting"); + + CYG_TEST_PASS_FAIL(cyg_libc_time_settime(1000)==0, "Set time to 1000"); + + // give it a small amount of tolerance + CYG_TEST_PASS_FAIL(t1 < 1003, "t1 remembered setting"); + +#else // ! CYGSEM_LIBC_TIME_SETTIME_WORKING + CYG_TEST_PASS_FAIL(cyg_libc_time_settime(0)!=0, + "Set time expected fail"); +#endif // CYGSEM_LIBC_TIME_SETTIME_WORKING + + CYG_TEST_FINISH("Finished tests from testcase " __FILE__ " for C library " + "time() function"); +} // main() + +// EOF time.c diff --git a/packages/language/c/libm/current/ChangeLog b/packages/language/c/libm/current/ChangeLog --- a/packages/language/c/libm/current/ChangeLog +++ b/packages/language/c/libm/current/ChangeLog @@ -1,3 +1,57 @@ +1999-04-15 John Dallaway + + * include/pkgconf/libm.h: Tidy display string capitalization. + +1999-04-07 Jesper Skov + PR 19442 + * tests/vectors/vector_support.h: Make an occasional chirp to keep + the testing infra interested. + +1999-04-06 Gary Thomas + + * src/PKGconf.mak: More brute-force fix for ARM compiler + problems - PR 19772 +1999-03-31 Jonathan Larmour + + * include/pkgconf/libm.h: Remove unnecessary define + Fix for PR 19423 + +1999-03-29 Gary Thomas + + * src/PKGconf.mak: Add special compile options to work around ARM + compiler bugs. + +1999-02-09 Jonathan Larmour + + * src/mathincl/fdlibm.h: + Change definition of CYG_LIBM_HI/CYG_LIBM_LO to use inline + function + Fix for PR 18859 + +1999-01-28 Jonathan Larmour + + * src/misc/signgam.cxx: + * src/misc/compatmode.cxx: + Include if we use kernel header files + +1999-01-21 Jonathan Larmour + + * tests/vectors/vector_support.h (doTestVec): Makes more + sense to output vector number than array index + + * src/double/portable-api/s_ceil.c: Fix comment s/+inf/-inf/ + +1999-01-20 Jonathan Larmour + + * tests/vectors/vector_support.h (doTestVec): + Add output to let you know which vectors failed + +1999-01-12 Gary Thomas + + * src/mathincl/fdlibm.h: + * include/sys/ieeefp.h: Add different structure layouts for + machines that have doubles that aren't pure big/little endian. + Fri Oct 23 19:27:04 1998 Jonathan Larmour * tests/vectors/vector_support.h (START_TEST): @@ -569,7 +623,7 @@ Fri Jun 5 07:07:03 1998 Jonathan Larmo // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### diff --git a/packages/language/c/libm/current/include/math.h b/packages/language/c/libm/current/include/math.h --- a/packages/language/c/libm/current/include/math.h +++ b/packages/language/c/libm/current/include/math.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Standard mathematical functions. These can be diff --git a/packages/language/c/libm/current/include/pkgconf/libm.h b/packages/language/c/libm/current/include/pkgconf/libm.h --- a/packages/language/c/libm/current/include/pkgconf/libm.h +++ b/packages/language/c/libm/current/include/pkgconf/libm.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: Configuration of the standard mathematical function library // Description: Configuration header for mathematical function library @@ -168,13 +168,13 @@ {{CFG_DATA cdl_package CYGPKG_LIBM { - display "Math Library" + display "Math library" description "ISO standard floating point mathematical library containing many useful functions for mathematical calculations." type boolean requires CYGPKG_ERROR - doc ref/ecos-ref/the-iso-standard-c-and-math-libraries.html + doc ref/ecos-ref/the-iso-standard-c-and-math-libraries.html } }}CFG_DATA @@ -384,11 +384,11 @@ typedef enum { #undef CYGSEM_LIBM_THREAD_SAFE_COMPAT_MODE #endif -#if ( (defined(CYGSEM_LIBM_THREAD_SAFE_GAMMA_FUNCTIONS) || \ - defined(CYGSEM_LIBM_THREAD_SAFE_COMPAT_MODE)) && \ + +#if ( defined(CYGSEM_LIBM_THREAD_SAFE_COMPAT_MODE) && \ !defined(CYGVAR_KERNEL_THREADS_DATA) ) -# error The kernel must have thread-specific data (CYGVAR_KERNEL_THREADS_DATA) \ - turned on for a thread-safe math library +# error The kernel must have thread-specific data \ + (CYGVAR_KERNEL_THREADS_DATA) turned on for a thread-safe math library #endif //======================================================================== diff --git a/packages/language/c/libm/current/include/sys/ieeefp.h b/packages/language/c/libm/current/include/sys/ieeefp.h --- a/packages/language/c/libm/current/include/sys/ieeefp.h +++ b/packages/language/c/libm/current/include/sys/ieeefp.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Definitions specific to IEEE-754 floating-point format @@ -56,6 +56,9 @@ #if (CYG_BYTEORDER == CYG_MSBFIRST) // Big endian +// Note: there do not seem to be any current machines which are Big Endian but +// have a mixed up double layout. + typedef union { cyg_int32 asi32[2]; @@ -91,6 +94,7 @@ typedef union cyg_uint32 msw; cyg_uint32 lsw; } parts; + } Cyg_libm_ieee_double_shape_type; @@ -133,16 +137,34 @@ typedef union struct { +#if (CYG_DOUBLE_BYTEORDER == CYG_MSBFIRST) // Big endian + unsigned int fraction1:16; + unsigned int fraction0: 4; + unsigned int exponent :11; + unsigned int sign : 1; + unsigned int fraction3:16; + unsigned int fraction2:16; +#else unsigned int fraction3:16; unsigned int fraction2:16; unsigned int fraction1:16; unsigned int fraction0: 4; unsigned int exponent :11; unsigned int sign : 1; +#endif } number; struct { +#if (CYG_DOUBLE_BYTEORDER == CYG_MSBFIRST) // Big endian + unsigned int function1:16; + unsigned int function0:3; + unsigned int quiet:1; + unsigned int exponent: 11; + unsigned int sign : 1; + unsigned int function3:16; + unsigned int function2:16; +#else unsigned int function3:16; unsigned int function2:16; unsigned int function1:16; @@ -150,12 +172,18 @@ typedef union unsigned int quiet:1; unsigned int exponent: 11; unsigned int sign : 1; +#endif } nan; struct { +#if (CYG_DOUBLE_BYTEORDER == CYG_MSBFIRST) // Big endian + cyg_uint32 msw; + cyg_uint32 lsw; +#else cyg_uint32 lsw; cyg_uint32 msw; +#endif } parts; } Cyg_libm_ieee_double_shape_type; diff --git a/packages/language/c/libm/current/src/PKGconf.mak b/packages/language/c/libm/current/src/PKGconf.mak --- a/packages/language/c/libm/current/src/PKGconf.mak +++ b/packages/language/c/libm/current/src/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -30,6 +30,7 @@ PACKAGE := libm include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak LIBRARY := libtarget.a COMPILE := misc/matherr.c misc/standard.c misc/compatmode.cxx \ @@ -70,5 +71,57 @@ OTHER_OBJS := OTHER_TARGETS := OTHER_CLEAN := +ifdef CYG_HAL_ARM +# Work-around for PR 19698 +s_atan.c-CFLAGS += -O1 +s_ceil.c-CFLAGS += -O1 +s_copysign.c-CFLAGS += -O1 +s_cos.c-CFLAGS += -O1 +s_expm1.c-CFLAGS += -O1 +s_fabs.c-CFLAGS += -O1 +s_finite.c-CFLAGS += -O1 +s_floor.c-CFLAGS += -O1 +s_frexp.c-CFLAGS += -O1 +s_isnan.c-CFLAGS += -O1 +s_ldexp.c-CFLAGS += -O1 +s_rint.c-CFLAGS += -O1 +s_scalbn.c-CFLAGS += -O1 +s_sin.c-CFLAGS += -O1 +s_tan.c-CFLAGS += -O1 +s_modf.c-CFLAGS += -O1 +s_tanh.c-CFLAGS += -O1 +s_asinh.c-CFLAGS += -O1 +s_cbrt.c-CFLAGS += -O1 +s_erf.c-CFLAGS += -O1 +s_ilogb.c-CFLAGS += -O1 +s_log1p.c-CFLAGS += -O1 +s_logb.c-CFLAGS += -O1 +s_nextafter.c-CFLAGS += -O1 +s_significand.c-CFLAGS += -O1 + +e_fmod.c-CFLAGS += -O1 +w_fmod.c-CFLAGS += -O1 +e_acos.c-CFLAGS += -O1 +e_acosh.c-CFLAGS += -O1 +e_asin.c-CFLAGS += -O1 +e_atan2.c-CFLAGS += -O1 +e_atanh.c-CFLAGS += -O1 +e_exp.c-CFLAGS += -O1 +e_fmod.c-CFLAGS += -O1 +e_hypot.c-CFLAGS += -O1 +e_j0.c-CFLAGS += -O1 +e_j1.c-CFLAGS += -O1 +e_jn.c-CFLAGS += -O1 +e_lgamma_r.c-CFLAGS += -O1 +e_log.c-CFLAGS += -O1 +e_log10.c-CFLAGS += -O1 +e_pow.c-CFLAGS += -O1 +e_rem_pio2.c-CFLAGS += -O1 +e_remainder.c-CFLAGS += -O1 +e_sqrt.c-CFLAGS += -O1 +k_cos.c-CFLAGS += -O1 +k_tan.c-CFLAGS += -O1 +endif + include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_acos.c b/packages/language/c/libm/current/src/double/ieee754-api/w_acos.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_acos.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_acos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_asin.c b/packages/language/c/libm/current/src/double/ieee754-api/w_asin.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_asin.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_asin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_atan2.c b/packages/language/c/libm/current/src/double/ieee754-api/w_atan2.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_atan2.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_atan2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_cosh.c b/packages/language/c/libm/current/src/double/ieee754-api/w_cosh.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_cosh.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_cosh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_exp.c b/packages/language/c/libm/current/src/double/ieee754-api/w_exp.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_exp.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_exp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_fmod.c b/packages/language/c/libm/current/src/double/ieee754-api/w_fmod.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_fmod.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_fmod.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_log.c b/packages/language/c/libm/current/src/double/ieee754-api/w_log.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_log.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_log.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_log10.c b/packages/language/c/libm/current/src/double/ieee754-api/w_log10.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_log10.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_log10.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_pow.c b/packages/language/c/libm/current/src/double/ieee754-api/w_pow.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_pow.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_pow.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_scalb.c b/packages/language/c/libm/current/src/double/ieee754-api/w_scalb.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_scalb.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_scalb.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_sinh.c b/packages/language/c/libm/current/src/double/ieee754-api/w_sinh.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_sinh.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_sinh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-api/w_sqrt.c b/packages/language/c/libm/current/src/double/ieee754-api/w_sqrt.c --- a/packages/language/c/libm/current/src/double/ieee754-api/w_sqrt.c +++ b/packages/language/c/libm/current/src/double/ieee754-api/w_sqrt.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_acos.c b/packages/language/c/libm/current/src/double/ieee754-core/e_acos.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_acos.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_acos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_asin.c b/packages/language/c/libm/current/src/double/ieee754-core/e_asin.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_asin.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_asin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_atan2.c b/packages/language/c/libm/current/src/double/ieee754-core/e_atan2.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_atan2.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_atan2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_cosh.c b/packages/language/c/libm/current/src/double/ieee754-core/e_cosh.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_cosh.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_cosh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_exp.c b/packages/language/c/libm/current/src/double/ieee754-core/e_exp.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_exp.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_exp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_fmod.c b/packages/language/c/libm/current/src/double/ieee754-core/e_fmod.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_fmod.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_fmod.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_log.c b/packages/language/c/libm/current/src/double/ieee754-core/e_log.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_log.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_log.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_log10.c b/packages/language/c/libm/current/src/double/ieee754-core/e_log10.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_log10.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_log10.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_pow.c b/packages/language/c/libm/current/src/double/ieee754-core/e_pow.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_pow.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_pow.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_rem_pio2.c b/packages/language/c/libm/current/src/double/ieee754-core/e_rem_pio2.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_rem_pio2.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_rem_pio2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_scalb.c b/packages/language/c/libm/current/src/double/ieee754-core/e_scalb.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_scalb.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_scalb.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_sinh.c b/packages/language/c/libm/current/src/double/ieee754-core/e_sinh.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_sinh.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_sinh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/ieee754-core/e_sqrt.c b/packages/language/c/libm/current/src/double/ieee754-core/e_sqrt.c --- a/packages/language/c/libm/current/src/double/ieee754-core/e_sqrt.c +++ b/packages/language/c/libm/current/src/double/ieee754-core/e_sqrt.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/internal/k_cos.c b/packages/language/c/libm/current/src/double/internal/k_cos.c --- a/packages/language/c/libm/current/src/double/internal/k_cos.c +++ b/packages/language/c/libm/current/src/double/internal/k_cos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/internal/k_rem_pio2.c b/packages/language/c/libm/current/src/double/internal/k_rem_pio2.c --- a/packages/language/c/libm/current/src/double/internal/k_rem_pio2.c +++ b/packages/language/c/libm/current/src/double/internal/k_rem_pio2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/internal/k_sin.c b/packages/language/c/libm/current/src/double/internal/k_sin.c --- a/packages/language/c/libm/current/src/double/internal/k_sin.c +++ b/packages/language/c/libm/current/src/double/internal/k_sin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/internal/k_tan.c b/packages/language/c/libm/current/src/double/internal/k_tan.c --- a/packages/language/c/libm/current/src/double/internal/k_tan.c +++ b/packages/language/c/libm/current/src/double/internal/k_tan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_atan.c b/packages/language/c/libm/current/src/double/portable-api/s_atan.c --- a/packages/language/c/libm/current/src/double/portable-api/s_atan.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_atan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_ceil.c b/packages/language/c/libm/current/src/double/portable-api/s_ceil.c --- a/packages/language/c/libm/current/src/double/portable-api/s_ceil.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_ceil.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: @@ -64,7 +64,7 @@ /* * ceil(x) - * Return x rounded toward -inf to integral value + * Return x rounded toward +inf to integral value * Method: * Bit twiddling. * Exception: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_copysign.c b/packages/language/c/libm/current/src/double/portable-api/s_copysign.c --- a/packages/language/c/libm/current/src/double/portable-api/s_copysign.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_copysign.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_cos.c b/packages/language/c/libm/current/src/double/portable-api/s_cos.c --- a/packages/language/c/libm/current/src/double/portable-api/s_cos.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_cos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_expm1.c b/packages/language/c/libm/current/src/double/portable-api/s_expm1.c --- a/packages/language/c/libm/current/src/double/portable-api/s_expm1.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_expm1.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_fabs.c b/packages/language/c/libm/current/src/double/portable-api/s_fabs.c --- a/packages/language/c/libm/current/src/double/portable-api/s_fabs.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_fabs.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_finite.c b/packages/language/c/libm/current/src/double/portable-api/s_finite.c --- a/packages/language/c/libm/current/src/double/portable-api/s_finite.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_finite.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_floor.c b/packages/language/c/libm/current/src/double/portable-api/s_floor.c --- a/packages/language/c/libm/current/src/double/portable-api/s_floor.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_floor.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_frexp.c b/packages/language/c/libm/current/src/double/portable-api/s_frexp.c --- a/packages/language/c/libm/current/src/double/portable-api/s_frexp.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_frexp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_isnan.c b/packages/language/c/libm/current/src/double/portable-api/s_isnan.c --- a/packages/language/c/libm/current/src/double/portable-api/s_isnan.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_isnan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_ldexp.c b/packages/language/c/libm/current/src/double/portable-api/s_ldexp.c --- a/packages/language/c/libm/current/src/double/portable-api/s_ldexp.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_ldexp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_modf.c b/packages/language/c/libm/current/src/double/portable-api/s_modf.c --- a/packages/language/c/libm/current/src/double/portable-api/s_modf.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_modf.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_rint.c b/packages/language/c/libm/current/src/double/portable-api/s_rint.c --- a/packages/language/c/libm/current/src/double/portable-api/s_rint.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_rint.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_scalbn.c b/packages/language/c/libm/current/src/double/portable-api/s_scalbn.c --- a/packages/language/c/libm/current/src/double/portable-api/s_scalbn.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_scalbn.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_sin.c b/packages/language/c/libm/current/src/double/portable-api/s_sin.c --- a/packages/language/c/libm/current/src/double/portable-api/s_sin.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_sin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_tan.c b/packages/language/c/libm/current/src/double/portable-api/s_tan.c --- a/packages/language/c/libm/current/src/double/portable-api/s_tan.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_tan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/double/portable-api/s_tanh.c b/packages/language/c/libm/current/src/double/portable-api/s_tanh.c --- a/packages/language/c/libm/current/src/double/portable-api/s_tanh.c +++ b/packages/language/c/libm/current/src/double/portable-api/s_tanh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/src/mathincl/fdlibm.h b/packages/language/c/libm/current/src/mathincl/fdlibm.h --- a/packages/language/c/libm/current/src/mathincl/fdlibm.h +++ b/packages/language/c/libm/current/src/mathincl/fdlibm.h @@ -24,20 +24,20 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-02-09 // Purpose: -// Description: Internal implementation-specific header for math library -// based on fdlibm -// Usage: From within this package, #include "mathincl/fdlibm.h" +// Description: Internal implementation-specific header for math library +// based on fdlibm +// Usage: From within this package, #include "mathincl/fdlibm.h" // //####DESCRIPTIONEND#### // @@ -71,19 +71,10 @@ // MACRO DEFINITIONS - -#if (CYG_BYTEORDER == CYG_LSBFIRST) // little endian -#define CYG_LIBM_HI(x) (*(1+(cyg_int32*)&(x))) -#define CYG_LIBM_LO(x) (*(cyg_int32*)&(x)) -#define CYG_LIBM_HIp(x) (*(1+(cyg_int32*)(x))) -#define CYG_LIBM_LOp(x) (*(cyg_int32*)(x)) -#else // big endian -#define CYG_LIBM_HI(x) (*(cyg_int32*)&(x)) -#define CYG_LIBM_LO(x) (*(1+(cyg_int32*)&(x))) -#define CYG_LIBM_HIp(x) (*(cyg_int32*)(x)) -#define CYG_LIBM_LOp(x) (*(1+(cyg_int32*)(x))) -#endif - +#define CYG_LIBM_HI(__x) (*cyg_libm_hi(&__x)) +#define CYG_LIBM_LO(__x) (*cyg_libm_lo(&__x)) +#define CYG_LIBM_HIp(__x) (*cyg_libm_hi(__x)) +#define CYG_LIBM_LOp(__x) (*cyg_libm_lo(__x)) // REPLACEMENTS FOR STUFF FROM MATH.H DUE TO CONFIG OPTION @@ -111,6 +102,24 @@ matherr( struct exception * ); // Use #endif // ifdef CYGSYM_LIBM_NO_XOPEN_SVID_NAMESPACE_POLLUTION +// INLINE FUNCTIONS + +static __inline__ cyg_uint32 * +cyg_libm_hi(double *__x) +{ + Cyg_libm_ieee_double_shape_type *__y; + __y = (Cyg_libm_ieee_double_shape_type *)__x; + return &__y->parts.msw; +} + +static __inline__ cyg_uint32 * +cyg_libm_lo(double *__x) +{ + Cyg_libm_ieee_double_shape_type *__y; + __y = (Cyg_libm_ieee_double_shape_type *)__x; + return &__y->parts.lsw; +} + // FUNCTION PROTOTYPES diff --git a/packages/language/c/libm/current/src/misc/compatmode.cxx b/packages/language/c/libm/current/src/misc/compatmode.cxx --- a/packages/language/c/libm/current/src/misc/compatmode.cxx +++ b/packages/language/c/libm/current/src/misc/compatmode.cxx @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Contains the accessor functions to get and set the standards @@ -56,6 +56,7 @@ #include // Main header for math library #ifdef CYGSEM_LIBM_THREAD_SAFE_COMPAT_MODE +# include // Kernel configuration # include // Kernel thread header # include // and its associated inlines # include // We need mutexes too diff --git a/packages/language/c/libm/current/src/misc/infconst.c b/packages/language/c/libm/current/src/misc/infconst.c --- a/packages/language/c/libm/current/src/misc/infconst.c +++ b/packages/language/c/libm/current/src/misc/infconst.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Defines a constant cyg_libm_infinity so that we can define diff --git a/packages/language/c/libm/current/src/misc/matherr.c b/packages/language/c/libm/current/src/misc/matherr.c --- a/packages/language/c/libm/current/src/misc/matherr.c +++ b/packages/language/c/libm/current/src/misc/matherr.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Contains an empty default matherr() function which the user diff --git a/packages/language/c/libm/current/src/misc/standard.c b/packages/language/c/libm/current/src/misc/standard.c --- a/packages/language/c/libm/current/src/misc/standard.c +++ b/packages/language/c/libm/current/src/misc/standard.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: Contains the accessor functions to get and set the stored sign diff --git a/packages/language/c/libm/current/tests/PKGconf.mak b/packages/language/c/libm/current/tests/PKGconf.mak --- a/packages/language/c/libm/current/tests/PKGconf.mak +++ b/packages/language/c/libm/current/tests/PKGconf.mak @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### diff --git a/packages/language/c/libm/current/tests/vectors/acos.c b/packages/language/c/libm/current/tests/vectors/acos.c --- a/packages/language/c/libm/current/tests/vectors/acos.c +++ b/packages/language/c/libm/current/tests/vectors/acos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/acos.h b/packages/language/c/libm/current/tests/vectors/acos.h --- a/packages/language/c/libm/current/tests/vectors/acos.h +++ b/packages/language/c/libm/current/tests/vectors/acos.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/asin.c b/packages/language/c/libm/current/tests/vectors/asin.c --- a/packages/language/c/libm/current/tests/vectors/asin.c +++ b/packages/language/c/libm/current/tests/vectors/asin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/asin.h b/packages/language/c/libm/current/tests/vectors/asin.h --- a/packages/language/c/libm/current/tests/vectors/asin.h +++ b/packages/language/c/libm/current/tests/vectors/asin.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/atan.c b/packages/language/c/libm/current/tests/vectors/atan.c --- a/packages/language/c/libm/current/tests/vectors/atan.c +++ b/packages/language/c/libm/current/tests/vectors/atan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/atan.h b/packages/language/c/libm/current/tests/vectors/atan.h --- a/packages/language/c/libm/current/tests/vectors/atan.h +++ b/packages/language/c/libm/current/tests/vectors/atan.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/atan2.c b/packages/language/c/libm/current/tests/vectors/atan2.c --- a/packages/language/c/libm/current/tests/vectors/atan2.c +++ b/packages/language/c/libm/current/tests/vectors/atan2.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/atan2.h b/packages/language/c/libm/current/tests/vectors/atan2.h --- a/packages/language/c/libm/current/tests/vectors/atan2.h +++ b/packages/language/c/libm/current/tests/vectors/atan2.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/ceil.c b/packages/language/c/libm/current/tests/vectors/ceil.c --- a/packages/language/c/libm/current/tests/vectors/ceil.c +++ b/packages/language/c/libm/current/tests/vectors/ceil.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/ceil.h b/packages/language/c/libm/current/tests/vectors/ceil.h --- a/packages/language/c/libm/current/tests/vectors/ceil.h +++ b/packages/language/c/libm/current/tests/vectors/ceil.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/cos.c b/packages/language/c/libm/current/tests/vectors/cos.c --- a/packages/language/c/libm/current/tests/vectors/cos.c +++ b/packages/language/c/libm/current/tests/vectors/cos.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/cos.h b/packages/language/c/libm/current/tests/vectors/cos.h --- a/packages/language/c/libm/current/tests/vectors/cos.h +++ b/packages/language/c/libm/current/tests/vectors/cos.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/cosh.c b/packages/language/c/libm/current/tests/vectors/cosh.c --- a/packages/language/c/libm/current/tests/vectors/cosh.c +++ b/packages/language/c/libm/current/tests/vectors/cosh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/cosh.h b/packages/language/c/libm/current/tests/vectors/cosh.h --- a/packages/language/c/libm/current/tests/vectors/cosh.h +++ b/packages/language/c/libm/current/tests/vectors/cosh.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/exp.c b/packages/language/c/libm/current/tests/vectors/exp.c --- a/packages/language/c/libm/current/tests/vectors/exp.c +++ b/packages/language/c/libm/current/tests/vectors/exp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/exp.h b/packages/language/c/libm/current/tests/vectors/exp.h --- a/packages/language/c/libm/current/tests/vectors/exp.h +++ b/packages/language/c/libm/current/tests/vectors/exp.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/fabs.c b/packages/language/c/libm/current/tests/vectors/fabs.c --- a/packages/language/c/libm/current/tests/vectors/fabs.c +++ b/packages/language/c/libm/current/tests/vectors/fabs.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/fabs.h b/packages/language/c/libm/current/tests/vectors/fabs.h --- a/packages/language/c/libm/current/tests/vectors/fabs.h +++ b/packages/language/c/libm/current/tests/vectors/fabs.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/floor.c b/packages/language/c/libm/current/tests/vectors/floor.c --- a/packages/language/c/libm/current/tests/vectors/floor.c +++ b/packages/language/c/libm/current/tests/vectors/floor.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/floor.h b/packages/language/c/libm/current/tests/vectors/floor.h --- a/packages/language/c/libm/current/tests/vectors/floor.h +++ b/packages/language/c/libm/current/tests/vectors/floor.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/fmod.c b/packages/language/c/libm/current/tests/vectors/fmod.c --- a/packages/language/c/libm/current/tests/vectors/fmod.c +++ b/packages/language/c/libm/current/tests/vectors/fmod.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/fmod.h b/packages/language/c/libm/current/tests/vectors/fmod.h --- a/packages/language/c/libm/current/tests/vectors/fmod.h +++ b/packages/language/c/libm/current/tests/vectors/fmod.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/frexp.c b/packages/language/c/libm/current/tests/vectors/frexp.c --- a/packages/language/c/libm/current/tests/vectors/frexp.c +++ b/packages/language/c/libm/current/tests/vectors/frexp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/frexp.h b/packages/language/c/libm/current/tests/vectors/frexp.h --- a/packages/language/c/libm/current/tests/vectors/frexp.h +++ b/packages/language/c/libm/current/tests/vectors/frexp.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/ldexp.c b/packages/language/c/libm/current/tests/vectors/ldexp.c --- a/packages/language/c/libm/current/tests/vectors/ldexp.c +++ b/packages/language/c/libm/current/tests/vectors/ldexp.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/ldexp.h b/packages/language/c/libm/current/tests/vectors/ldexp.h --- a/packages/language/c/libm/current/tests/vectors/ldexp.h +++ b/packages/language/c/libm/current/tests/vectors/ldexp.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/log.c b/packages/language/c/libm/current/tests/vectors/log.c --- a/packages/language/c/libm/current/tests/vectors/log.c +++ b/packages/language/c/libm/current/tests/vectors/log.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/log.h b/packages/language/c/libm/current/tests/vectors/log.h --- a/packages/language/c/libm/current/tests/vectors/log.h +++ b/packages/language/c/libm/current/tests/vectors/log.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/log10.c b/packages/language/c/libm/current/tests/vectors/log10.c --- a/packages/language/c/libm/current/tests/vectors/log10.c +++ b/packages/language/c/libm/current/tests/vectors/log10.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/log10.h b/packages/language/c/libm/current/tests/vectors/log10.h --- a/packages/language/c/libm/current/tests/vectors/log10.h +++ b/packages/language/c/libm/current/tests/vectors/log10.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/modf.c b/packages/language/c/libm/current/tests/vectors/modf.c --- a/packages/language/c/libm/current/tests/vectors/modf.c +++ b/packages/language/c/libm/current/tests/vectors/modf.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/modf.h b/packages/language/c/libm/current/tests/vectors/modf.h --- a/packages/language/c/libm/current/tests/vectors/modf.h +++ b/packages/language/c/libm/current/tests/vectors/modf.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/pow.c b/packages/language/c/libm/current/tests/vectors/pow.c --- a/packages/language/c/libm/current/tests/vectors/pow.c +++ b/packages/language/c/libm/current/tests/vectors/pow.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/pow.h b/packages/language/c/libm/current/tests/vectors/pow.h --- a/packages/language/c/libm/current/tests/vectors/pow.h +++ b/packages/language/c/libm/current/tests/vectors/pow.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sin.c b/packages/language/c/libm/current/tests/vectors/sin.c --- a/packages/language/c/libm/current/tests/vectors/sin.c +++ b/packages/language/c/libm/current/tests/vectors/sin.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sin.h b/packages/language/c/libm/current/tests/vectors/sin.h --- a/packages/language/c/libm/current/tests/vectors/sin.h +++ b/packages/language/c/libm/current/tests/vectors/sin.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sinh.c b/packages/language/c/libm/current/tests/vectors/sinh.c --- a/packages/language/c/libm/current/tests/vectors/sinh.c +++ b/packages/language/c/libm/current/tests/vectors/sinh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sinh.h b/packages/language/c/libm/current/tests/vectors/sinh.h --- a/packages/language/c/libm/current/tests/vectors/sinh.h +++ b/packages/language/c/libm/current/tests/vectors/sinh.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sqrt.c b/packages/language/c/libm/current/tests/vectors/sqrt.c --- a/packages/language/c/libm/current/tests/vectors/sqrt.c +++ b/packages/language/c/libm/current/tests/vectors/sqrt.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/sqrt.h b/packages/language/c/libm/current/tests/vectors/sqrt.h --- a/packages/language/c/libm/current/tests/vectors/sqrt.h +++ b/packages/language/c/libm/current/tests/vectors/sqrt.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/tan.c b/packages/language/c/libm/current/tests/vectors/tan.c --- a/packages/language/c/libm/current/tests/vectors/tan.c +++ b/packages/language/c/libm/current/tests/vectors/tan.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/tan.h b/packages/language/c/libm/current/tests/vectors/tan.h --- a/packages/language/c/libm/current/tests/vectors/tan.h +++ b/packages/language/c/libm/current/tests/vectors/tan.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/tanh.c b/packages/language/c/libm/current/tests/vectors/tanh.c --- a/packages/language/c/libm/current/tests/vectors/tanh.c +++ b/packages/language/c/libm/current/tests/vectors/tanh.c @@ -22,15 +22,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/tanh.h b/packages/language/c/libm/current/tests/vectors/tanh.h --- a/packages/language/c/libm/current/tests/vectors/tanh.h +++ b/packages/language/c/libm/current/tests/vectors/tanh.h @@ -24,15 +24,15 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk +// Author(s): jlarmour +// Contributors: jlarmour // Date: 1998-02-13 // Purpose: // Description: diff --git a/packages/language/c/libm/current/tests/vectors/vector_support.h b/packages/language/c/libm/current/tests/vectors/vector_support.h --- a/packages/language/c/libm/current/tests/vectors/vector_support.h +++ b/packages/language/c/libm/current/tests/vectors/vector_support.h @@ -24,19 +24,19 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND#### //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour@cygnus.co.uk -// Contributors: jlarmour@cygnus.co.uk -// Date: 1998-02-13 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 1999-01-21 // Purpose: // Description: -// Usage: #include "vectors/vector_support.h" +// Usage: #include "vectors/vector_support.h" // //####DESCRIPTIONEND#### // @@ -55,6 +55,7 @@ #include // Test infrastructure #include // Header for this package #include // Cyg_libm_ieee_double_shape_type +#include #ifndef CYGSEM_LIBM_COMPAT_IEEE_ONLY # include // For Cyg_ErrNo @@ -282,6 +283,7 @@ doTestVec( CYG_ADDRESS func_ptr, cyg_ucount32 problems=0; cyg_ucount32 i; Cyg_libm_ieee_double_shape_type arg1, arg2, result_wanted, ret; + cyg_ucount32 alive_count = num_vectors / 10; if ((arg1_type != CYG_LIBM_TEST_VEC_DOUBLE) || (result_type != CYG_LIBM_TEST_VEC_DOUBLE) ) { @@ -298,6 +300,10 @@ doTestVec( CYG_ADDRESS func_ptr, for (i=0; (i < num_vectors) && (problems < PROBLEM_THRESHOLD); i++) { + + if (0 == i % alive_count) + CYG_TEST_STILL_ALIVE(i, "Still crunching, please wait..."); + arg1.parts.msw = vectors[i].arg1_msw; arg1.parts.lsw = vectors[i].arg1_lsw; @@ -320,6 +326,7 @@ doTestVec( CYG_ADDRESS func_ptr, (errno != vectors[i].errno_val)) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "error not set correctly"); } // if @@ -330,6 +337,7 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( ret, result_wanted, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Result out of tolerance"); } // if } // for @@ -346,6 +354,10 @@ doTestVec( CYG_ADDRESS func_ptr, for (i=0; (i < num_vectors) && (problems < PROBLEM_THRESHOLD); i++) { + + if (0 == i % alive_count) + CYG_TEST_STILL_ALIVE(i, "Still crunching, please wait..."); + arg1.parts.msw = vectors[i].arg1_msw; arg1.parts.lsw = vectors[i].arg1_lsw; @@ -356,6 +368,7 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( ret, result_wanted, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Result out of tolerance"); } // if } // for @@ -374,6 +387,10 @@ doTestVec( CYG_ADDRESS func_ptr, for (i=0; (i < num_vectors) && (problems < PROBLEM_THRESHOLD); i++) { + + if (0 == i % alive_count) + CYG_TEST_STILL_ALIVE(i, "Still crunching, please wait..."); + arg1.parts.msw = vectors[i].arg1_msw; arg1.parts.lsw = vectors[i].arg1_lsw; @@ -385,6 +402,7 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( ret, result_wanted, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Result out of tolerance"); } // if @@ -394,6 +412,7 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( my_doub1, my_doub2, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Integer result out of tolerance"); } // if @@ -413,6 +432,10 @@ doTestVec( CYG_ADDRESS func_ptr, for (i=0; (i < num_vectors) && (problems < PROBLEM_THRESHOLD); i++) { + + if (0 == i % alive_count) + CYG_TEST_STILL_ALIVE(i, "Still crunching, please wait..."); + arg1.parts.msw = vectors[i].arg1_msw; arg1.parts.lsw = vectors[i].arg1_lsw; @@ -427,12 +450,14 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( ret, result_wanted, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Result out of tolerance"); } // if if (checkErrorAcceptable( my_doub1, arg2, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Returned double result out of " "tolerance"); } // if @@ -452,6 +477,10 @@ doTestVec( CYG_ADDRESS func_ptr, for (i=0; (i < num_vectors) && (problems < PROBLEM_THRESHOLD); i++) { + + if (0 == i % alive_count) + CYG_TEST_STILL_ALIVE(i, "Still crunching, please wait..."); + arg1.parts.msw = vectors[i].arg1_msw; arg1.parts.lsw = vectors[i].arg1_lsw; @@ -462,6 +491,7 @@ doTestVec( CYG_ADDRESS func_ptr, if (checkErrorAcceptable( ret, result_wanted, vectors[i].tolerance) ) { ++problems; + diag_printf("Vector #%d\n", i+1); CYG_TEST_FAIL( "Result out of tolerance"); } // if } // for diff --git a/packages/packages b/packages/packages --- a/packages/packages +++ b/packages/packages @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -123,11 +123,39 @@ package CYGPKG_ERROR { include_dir cyg/error } -package CYGPKG_DEVICES { - alias { "Common Device Code" devices devices_common } - directory devs/common - default_value 1 - include_dir cyg/devs/common +package CYGPKG_HAL_ARM { + alias { "ARM common HAL" hal_arm arm_hal arm_arch_hal } + directory hal/arm/arch + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_ARM_PID { + alias { "Arm Development board support" hal_arm_pid arm_pid_hal } + directory hal/arm/pid + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_ARM_AEB { + alias { "Arm evaulation board (AEB-1) support" hal_arm_aeb arm_aeb_hal } + directory hal/arm/aeb + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_I386 { + alias { "i386 common HAL" hal_i386 i386_hal i386_arch_hal } + directory hal/i386/arch + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_I386_LINUX { + alias { "Linux Synthetic target support" hal_i386_linux } + directory hal/i386/linux + include_dir cyg/hal + hardware } package CYGPKG_HAL_MN10300 { @@ -151,6 +179,55 @@ package CYGPKG_HAL_MN10300_SIM { hardware } +package CYGPKG_HAL_POWERPC { + alias { "PowerPC common HAL" hal_powerpc powerpc_hal powerpc_arch_hal } + directory hal/powerpc/arch + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_POWERPC_COGENT { + alias { "PowerPC Cogent board support" hal_powerpc_cogent powerpc_cogent_hal } + directory hal/powerpc/cogent + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_POWERPC_FADS { + alias { "PowerPC Motorola FADS board support" hal_powerpc_fads powerpc_fads_hal } + directory hal/powerpc/fads + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_POWERPC_SIM { + alias { "PowerPC simulator support" hal_powerpc_sim powerpc_sim_hal } + directory hal/powerpc/sim + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_SPARCLITE { + alias { "SPARClite common HAL" hal_sparclite sparclite_hal sparclite_arch_hal } + directory hal/sparclite/arch + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_SPARCLITE_SLEB { + alias { "SPARClite Evaluation Board support" hal_sparclite_sleb sparclite_sleb_hal } + directory hal/sparclite/sleb + include_dir cyg/hal + hardware +} + +package CYGPKG_HAL_SPARCLITE_SIM { + alias { "SPARClite ERC32 simulator support" hal_sparclite_sim sparclite_sim_hal } + directory hal/sparclite/sim + include_dir cyg/hal + hardware +} + package CYGPKG_HAL_TX39 { alias { "TX39 common HAL" hal_tx39 tx39_hal tx39_arch_hal } directory hal/mips/arch/ @@ -172,71 +249,31 @@ package CYGPKG_HAL_TX39_SIM { hardware } -package CYGPKG_HAL_POWERPC { - alias { "PowerPC common HAL" hal_powerpc powerpc_hal powerpc_arch_hal } - directory hal/powerpc/arch - include_dir cyg/hal - hardware -} - -package CYGPKG_HAL_POWERPC_COGENT { - alias { "PowerPC Cogent board support" hal_powerpc_cogent powerpc_cogent_hal } - directory hal/powerpc/cogent - include_dir cyg/hal - hardware -} - -package CYGPKG_HAL_POWERPC_SIM { - alias { "PowerPC simulator support" hal_powerpc_sim powerpc_sim_hal } - directory hal/powerpc/sim - include_dir cyg/hal - hardware +package CYGPKG_IO { + alias { "Common I/O Code" io io_common } + directory io/common + default_value 1 + include_dir cyg/io } -package CYGPKG_DEVICES_GDB { - alias { "GDB Pseudo Device" devices_gdb device_gdb } - directory devs/gdb +package CYGPKG_IO_SERIAL { + alias { "Serial Device Drivers" io_serial io_serial_common } + directory io/serial default_value 1 - include_dir cyg/devs/gdb - hardware -} - -package CYGPKG_DEVICES_SERIAL_RS232_COMMON { - alias { "Common Serial Device Code" devices_serial_rs232_common } - directory devs/serial/rs232/common - include_dir cyg/devs/serial/rs232/common - hardware + include_dir cyg/io } package CYGPKG_DEVICES_WALLCLOCK { alias { "Wallclock Device Code" wallclock devices_wallclock device_wallclock } directory devs/wallclock + default_value 1 include_dir cyg/devs - hardware } package CYGPKG_DEVICES_WATCHDOG { alias { "Watchdog Device Code" watchdog devices_watchdog device_watchdog } directory devs/watchdog + default_value 1 include_dir cyg/devs - hardware -} - -package CYGPKG_DEVICES_SERIAL_RS232_TX39 { - alias { "TX39 Serial Device Code" devices_serial_rs232_tx39 } - directory devs/serial/rs232/tx39 - include_dir cyg/devs/serial/rs232/tx39 - hardware } - -package CYGPKG_DEVICES_SERIAL_RS232_MN10300 { - alias { "MN10300 Serial Device Code" devices_serial_rs232_mn10300 } - directory devs/serial/rs232/mn10300 - include_dir cyg/devs/serial/rs232/mn10300 - hardware -} - - - - diff --git a/packages/pkgconf.tcl b/packages/pkgconf.tcl --- a/packages/pkgconf.tcl +++ b/packages/pkgconf.tcl @@ -24,7 +24,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -139,6 +139,8 @@ namespace eval pkgconf { variable defaults_arg 0; # Do not use the values from the save file. variable use_links_arg 0; # Make use of symbolic links. variable use_copies_arg 0; # The inverse. + variable debug_arg 0; # --debug, control infrastructure options + variable nodebug_arg 0; # --nodebug, ditto # Details of all known packages. These come out of the packages file. # The variable known_packages is a simple list, and the rest of the @@ -175,6 +177,7 @@ namespace eval pkgconf { # files, the path to those header files # relative to either the component repository # or the build tree. + variable misc_dirs; # Ditto for package misc directories. variable tests_dirs; # Ditto for package tests directories. variable src_dirs; # Ditto for src directories. @@ -478,6 +481,10 @@ if { 0 } { # Similarly it is desirable to allow users to control compiler flags, e.g. # DBGFLAGS="-Wall -Werror" # +# --debug can be used to set appropriate debug options in the +# infrastructure. This should probably be --enable-debug, but that +# could cause confusion. There is also a --nodebug option. +# # A new argument is --nw, to disable the GUI environment. Other new # arguments are: # --targets and --packages to display the appropriate details @@ -573,6 +580,14 @@ proc pkgconf::parse_arguments { argv0 ar set pkgconf::use_copies_arg 1 continue } + if { [regexp -- {^-?-debug$} $args($i)] == 1 } { + set pkgconf::debug_arg 1 + continue + } + if { [regexp -- {^-?-nodebug$} $args($i)] == 1 } { + set pkgconf::nodebug_arg 1 + continue + } # Now for the directories. srcdir and builddir will have # been calculated already, but may be overridden here. @@ -783,6 +798,8 @@ proc pkgconf::parse_arguments { argv0 ar puts "defaults_arg is $pkgconf::defaults_arg" puts "use_links_arg is $pkgconf::use_links_arg" puts "use_copies_arg is $pkgconf::use_copies_arg" + puts "debug_arg is $pkgconf::debug_arg" + puts "nodebug_arg is $pkgconf::nodebug_arg" foreach i [array names pkgconf::version_args] { puts "Package $i needs version $pkgconf::version_args($i)" } @@ -851,10 +868,10 @@ proc pkgconf::read_packages { } { # The following two commands are made accessible to the slave # interpreter and are responsible for updating the actual data. proc set_package_data { name value } { - set pkgconf::package_data($name) $value + set ::pkgconf::package_data($name) $value } proc add_known_package { name } { - lappend pkgconf::known_packages $name + lappend ::pkgconf::known_packages $name } # Create the parser, add the aliased commands, and then define @@ -1093,21 +1110,20 @@ proc pkgconf::read_targets { } { ASSERT { $pkgconf::known_compiler_flags != "" } proc add_known_target { name } { - - lappend pkgconf::known_targets $name - set pkgconf::target_data($name,alias) $name - set pkgconf::target_data($name,prefix) "" - set pkgconf::target_data($name,known_platforms) "" - set pkgconf::target_data($name,packages) "" + lappend ::pkgconf::known_targets $name + set ::pkgconf::target_data($name,alias) $name + set ::pkgconf::target_data($name,prefix) "" + set ::pkgconf::target_data($name,known_platforms) "" + set ::pkgconf::target_data($name,packages) "" } proc add_known_platform { arch name } { - lappend pkgconf::target_data($arch,known_platforms) $name - set pkgconf::target_data($arch,$name,alias) "" - set pkgconf::target_data($arch,$name,startup) "" - set pkgconf::target_data($arch,$name,packages) "" + lappend ::pkgconf::target_data($arch,known_platforms) $name + set ::pkgconf::target_data($arch,$name,alias) "" + set ::pkgconf::target_data($arch,$name,startup) "" + set ::pkgconf::target_data($arch,$name,packages) "" } proc set_target_data { name value } { - set pkgconf::target_data($name) $value + set ::pkgconf::target_data($name) $value } set parser [interp create -safe] @@ -3701,7 +3717,8 @@ proc pkgconf::update_compiler_flags { } # 1) Update build tree # 2) Make # 3) Make tests -# 4) Make clean +# 4) Make misc +# 5) Make clean # # The make buttons should be disabled if the build tree is out of date. # This is controlled by the variable build_tree_needs_update, which @@ -3755,6 +3772,7 @@ proc pkgconf::nbpage_build_initialise { button $win.tree -text "Update tree" -command pkgconf::nbpage_build_update_tree button $win.make -text "Make" -command pkgconf::nbpage_build_make button $win.tests -text "Make tests" -command pkgconf::nbpage_build_tests + button $win.misc -text "Make misc" -command pkgconf::nbpage_build_misc button $win.clean -text "Make clean" -command pkgconf::nbpage_build_clean if { ($config_data(target) == "" ) || ($config_data(platform) == "") || ($config_data(startup) == "") } { @@ -3763,12 +3781,14 @@ proc pkgconf::nbpage_build_initialise { if { $build_tree_needs_update } { $win.make configure -state disabled $win.tests configure -state disabled + $win.misc configure -state disabled $win.clean configure -state disabled } grid $win.tree -row 0 -column 0 -sticky we -padx 5 -pady 5 grid $win.make -row 1 -column 0 -sticky we -padx 5 -pady 5 grid $win.tests -row 2 -column 0 -sticky we -padx 5 -pady 5 - grid $win.clean -row 3 -column 0 -sticky we -padx 5 -pady 5 + grid $win.misc -row 3 -column 0 -sticky we -padx 5 -pady 5 + grid $win.clean -row 4 -column 0 -sticky we -padx 5 -pady 5 message $win.treemsg -anchor w -justify left -width 300 -text \ "Create or update the build and install trees." @@ -3777,12 +3797,16 @@ proc pkgconf::nbpage_build_initialise { message $win.testsmsg -anchor w -justify left -width 300 -text \ "Build the test executables for the current configuration. These executables will be\ placed in the install tree." + message $win.miscmsg -anchor w -justify left -width 300 -text \ + "Build the misc executables for the current configuration. These executables will be\ + placed in the misc directory." message $win.cleanmsg -anchor w -justify left -width 300 -text \ "Perform a clean-up operation in the build and install trees." grid $win.treemsg -row 0 -column 1 -sticky we grid $win.makemsg -row 1 -column 1 -sticky we grid $win.testsmsg -row 2 -column 1 -sticky we - grid $win.cleanmsg -row 3 -column 1 -sticky we + grid $win.miscmsg -row 3 -column 1 -sticky we + grid $win.cleanmsg -row 4 -column 1 -sticky we grid columnconfigure $win 1 -weight 1 } @@ -3801,6 +3825,7 @@ proc pkgconf::nbpage_build_enter { win } if { $build_tree_needs_update } { $build_frame.grid.make configure -state disabled $build_frame.grid.tests configure -state disabled + $build_frame.grid.misc configure -state disabled $build_frame.grid.clean configure -state disabled set_status_line "The build tree must be updated before this configuration can be built." @@ -3892,6 +3917,16 @@ proc pkgconf::nbpage_build_tests { } { run_command pkgconf::nbpage_build_handle_output make -C $build_tree tests } +proc pkgconf::nbpage_build_misc { } { + + variable build_tree + variable config_data + nbpage_build_control_buttons 0 + output_add_text \ + "Building misc executables.\nBuild tree is $build_tree\nInstall tree is $config_data(prefix)\n" + run_command pkgconf::nbpage_build_handle_output make -C $build_tree misc +} + proc pkgconf::nbpage_build_clean { } { variable build_tree @@ -4263,6 +4298,8 @@ proc pkgconf::handle_command_output { pi # across PKGconf.mak. If this tests directory has any subdirectories # then these must be created as well. # +# d) similarly for any 'misc' directories +# # 3) create the install directory tree, complete with lib, include, and tests # directories, and the include/pkgconf sub-directory. Additional # sub-directories within include need not be generated at this point, @@ -4330,7 +4367,9 @@ proc pkgconf::locate_files { dir { patte # Eliminate the pathnames from all of these files set filenames "" foreach file $filelist { - lappend filenames [file tail $file] + if { [string range $file end end] != "~" } { + lappend filenames [file tail $file] + } } # Eliminate any obviously spurious entries. @@ -4798,6 +4837,14 @@ proc pkgconf::process_package { name dir process_package_tests $name $testsdir } } + + set miscdir [file join $dir "misc"] + if { [file isdir [file join $pkgconf::component_repository $miscdir]] } { + if { [file isfile [file join $pkgconf::component_repository $miscdir PKGconf.mak]] } { + lappend pkgconf::misc_dirs $miscdir + process_package_misc $miscdir + } + } } # ---------------------------------------------------------------------------- @@ -4930,6 +4977,8 @@ proc pkgconf::process_package_includes { " include [get_pathname_for_make [file join [get_dotdots_pkgconf $dir] "pkgconf.mak"]] +include [get_pathname_for_make [file join [get_dotdots_pkgconf $dir] "system.mak"]] + HEADERS := $pkg_inc_files TARGETS := \$(foreach hdr,\$(HEADERS),\$(PREFIX)/include/$pkg_incdir/\$(hdr)) .PHONY : build clean @@ -5020,6 +5069,74 @@ proc pkgconf::process_package_tests { na } } +# ---------------------------------------------------------------------------- +# Processing the misc directory is just like the src directory. +# +proc pkgconf::process_package_misc { dir } { + + set miscdir [file join $pkgconf::component_repository $dir] + set destdir [file join $pkgconf::build_tree $dir] + + file mkdir $destdir + set subdirs [locate_all_subdirs $miscdir] + foreach subdir $subdirs { + if { [is_empty_directory [file join $miscdir $subdir] ] } { + continue + } + file mkdir [file join $destdir $subdir] + } + + set makefiles [locate_all_files $miscdir "PKGconf.mak"] + foreach makefile $makefiles { + set destname [file join $destdir [file dirname $makefile] "makefile"] + + if { ([file isfile $destname] == 0) || $pkgconf::force_arg } { + file copy -force -- [file join $miscdir $makefile] $destname + make_writable $destname + } + } +} + +# }}} +# {{{ Package debug options + +# ---------------------------------------------------------------------- +# Enable appropriate debug options in various packages. Currently the +# only option that is affected is CYGPKG_INFRA_DEBUG in pkgconf/infra.h + +proc pkgconf::enable_package_debug_options { } { + + report "Enabling debug-related options" + + set fd [open [file join $pkgconf::build_tree "pkgconf" "infra.h"] "r"] + set data [read $fd] + close $fd + + if { [regexp -- {undef[ ]+CYGPKG_INFRA_DEBUG} $data] } { + regsub -- {undef[ ]+CYGPKG_INFRA_DEBUG} $data {define CYGPKG_INFRA_DEBUG} data + set fd [open [file join $pkgconf::build_tree "pkgconf" "infra.h"] "w"] + puts $fd $data + close $fd + } +} + +# Or the inverse. +proc pkgconf::disable_package_debug_options { } { + + report "Disabling debug-related options" + + set fd [open [file join $pkgconf::build_tree "pkgconf" "infra.h"] "r"] + set data [read $fd] + close $fd + + if { [regexp -- {define[ ]+CYGPKG_INFRA_DEBUG} $data] } { + regsub -- {define[ ]+CYGPKG_INFRA_DEBUG} $data {undef CYGPKG_INFRA_DEBUG} data + set fd [open [file join $pkgconf::build_tree "pkgconf" "infra.h"] "w"] + puts $fd $data + close $fd + } +} + # }}} # {{{ Install tree @@ -5326,6 +5443,12 @@ proc pkgconf::produce_misc_files { } { puts $file "COMPONENT_REPOSITORY\t\t:= [get_pathname_for_make $pkgconf::component_repository]" puts $file "BUILD_TREE\t\t\t:= [get_pathname_for_make $pkgconf::build_tree]" + # Provide details of target etc. so that packages can specify + # per-target files. + puts $file "TARGET\t\t\t\t:= $pkgconf::config_data(target)" + puts $file "PLATFORM\t\t\t:= $pkgconf::config_data(platform)" + puts $file "STARTUP\t\t\t\t:= $pkgconf::config_data(startup)" + # The prefix (i.e. install directory) should default to somewhere # relative to the build tree. set prefix $pkgconf::config_data(prefix) @@ -5433,12 +5556,48 @@ endif" } } + # Additions for the MLT + puts $file "\n" + puts $file "#define CYGHWR_MEMORY_LAYOUT_LDI " + puts $file "#define CYGHWR_MEMORY_LAYOUT_H " + puts $file "\ \n#endif /* CYGONCE_PKGCONF_SYSTEM_H */ /* EOF $filename */" close $file } + # 'system.mak' has the same basic information, but in a form + # that can be used by makefile fragments. + + if { $config_changed != 0 } { + + set filename [file join "pkgconf" "system.mak"] + set file [open [file join $pkgconf::build_tree $filename] "w"] + puts $file \ +"# +# File $filename +# +# This file is generated automatically by the pkgconf program. +# It should not be edited. Any changes to this file may be +# overwritten by pkgconf. +# +" + puts $file "CYG_HAL_[string toupper $pkgconf::config_data(target)]=1" + puts $file \ + "CYG_HAL_[string toupper $pkgconf::config_data(target)]_[string toupper $pkgconf::config_data(platform)]=1" + puts $file "CYG_HAL_STARTUP_[string toupper $pkgconf::config_data(startup)]=1" + puts $file "" + set current_packages [get_current_packages] + foreach pkg $pkgconf::known_packages { + if { [lsearch -exact $current_packages $pkg] != -1 } { + puts $file "$pkg=1" + } + } + puts $file "\n# /* EOF $filename */" + close $file + } + # Always output a makefile in the pkgconf directory. This is harmless # because there should be no file-level dependencies on this file (just # like the toplevel makefile). @@ -5497,13 +5656,19 @@ proc pkgconf::produce_makefile { } { puts $makefile \ " include pkgconf/pkgconf.mak -.PHONY: default build clean tests headers" - - puts $makefile "\nbuild: headers" +.PHONY: default build clean tests headers +.PRECIOUS: $(PREFIX)/lib/libextras.a" + + puts $makefile "\nbuild: $(PREFIX)/lib/extras.o" + puts $makefile "\t@echo Build finished." + + puts $makefile "\n$(PREFIX)/lib/extras.o: $(PREFIX)/lib/libextras.a" + puts $makefile "\t$(LD) --whole-archive $(PREFIX)/lib/libextras.a -r -o $(PREFIX)/lib/extras.o" + + puts $makefile "\n$(PREFIX)/lib/libextras.a: headers" foreach src_dir $pkgconf::src_dirs { puts $makefile "\t\$(MAKE) -C $src_dir" } - puts $makefile "\t@echo Build finished." puts $makefile "\ntests: build" foreach tests_dir $pkgconf::tests_dirs { @@ -5511,6 +5676,12 @@ include pkgconf/pkgconf.mak } puts $makefile "\t@echo Tests build finished." + puts $makefile "\nmisc: build" + foreach misc_dir $pkgconf::misc_dirs { + puts $makefile "\t\$(MAKE) -C $misc_dir" + } + puts $makefile "\t@echo Misc build finished." + puts $makefile \ "\nlibobjs := \$(wildcard \$(PREFIX)/lib/*) clean: @@ -5521,6 +5692,9 @@ endif foreach src_dir $pkgconf::src_dirs { puts $makefile "\t\$(MAKE) -C $src_dir clean" } + foreach misc_dir $pkgconf::misc_dirs { + puts $makefile "\t\$(MAKE) -C $misc_dir clean" + } foreach tests_dir $pkgconf::tests_dirs { puts $makefile "\t\$(MAKE) -C $tests_dir clean" } @@ -5574,6 +5748,7 @@ proc pkgconf::produce_build_tree { } { # tree, and related variables. set pkgconf::inc_dirs "" set pkgconf::src_dirs "" + set pkgconf::misc_dirs "" set pkgconf::tests_dirs "" set pkgconf::install_inc_dirs "pkgconf" set pkgconf::install_inc_files "" @@ -5603,6 +5778,14 @@ proc pkgconf::produce_build_tree { } { process_package $pkg $dirname } + # If this is a debug build (according to the --debug command line + # option), update the appropriate packages. + if {$pkgconf::debug_arg != 0} { + enable_package_debug_options + } elseif {$pkgconf::nodebug_arg != 0} { + disable_package_debug_options + } + # The install tree must exist before the misc files are generated. # See get_pathname_for_make for details. produce_install_tree diff --git a/packages/pkgconf/makevars b/packages/pkgconf/makevars --- a/packages/pkgconf/makevars +++ b/packages/pkgconf/makevars @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -257,20 +257,23 @@ INCLUDE_PATH := # perform most of the build operations. $(PACKAGE)_%.o : %.c - $(CC) -c $(INCLUDE_PATH) $(CFLAGS) -Wp,-MD,$(@:.o=.tmp) -o $@ $< - @echo -e "\\n$@ : $< \\\\" > $(@:.o=.d) + $(CC) -c $(INCLUDE_PATH) $(CFLAGS) $($(notdir $<)-CFLAGS) -Wp,-MD,$(@:.o=.tmp) -o $@ $< + @echo > $(@:.o=.d) + @echo $@ ':' $< '\' >> $(@:.o=.d) @$(TAIL) -n +2 $(@:.o=.tmp) >> $(@:.o=.d) @$(RM) $(@:.o=.tmp) $(PACKAGE)_%.o : %.cxx - $(CXX) -c $(INCLUDE_PATH) $(CXXFLAGS) -Wp,-MD,$(@:.o=.tmp) -o $@ $< - @echo -e "\\n$@ : $< \\\\" > $(@:.o=.d) + $(CXX) -c $(INCLUDE_PATH) $(CXXFLAGS) $($(notdir $<)-CXXFLAGS) -Wp,-MD,$(@:.o=.tmp) -o $@ $< + @echo > $(@:.o=.d) + @echo $@ ':' $< '\' >> $(@:.o=.d) @$(TAIL) -n +2 $(@:.o=.tmp) >> $(@:.o=.d) @$(RM) $(@:.o=.tmp) $(PACKAGE)_%.o : %.S $(CXX) -c $(INCLUDE_PATH) $(CFLAGS) -Wp,-MD,$(@:.o=.tmp) -o $@ $< - @echo -e "\\n$@ : $< \\\\" > $(@:.o=.d) + @echo > $(@:.o=.d) + @echo $@ ':' $< '\' >> $(@:.o=.d) @$(TAIL) -n +2 $(@:.o=.tmp) >> $(@:.o=.d) @$(RM) $(@:.o=.tmp) diff --git a/packages/pkgconf/makrules.prv b/packages/pkgconf/makrules.prv --- a/packages/pkgconf/makrules.prv +++ b/packages/pkgconf/makrules.prv @@ -24,7 +24,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -39,7 +39,7 @@ VPATH := . $(COMPONENT_REPOSITORY # The object files and the dependency files can be deduced mainly # from the list of tests. -STAMPS := $(foreach target,$(TESTS),$(target).stamp) +STAMPS := $(foreach target,$(PROGS),$(target).stamp) OBJECTS := $(STAMPS:.stamp=.o) OBJECTS := $(foreach obj,$(OBJECTS),$(dir $(obj))$(PACKAGE)_$(notdir $(obj))) DEPS := $(OBJECTS:.o=.d) $(OTHER_DEPS) @@ -62,12 +62,12 @@ DEPS := $(OBJECTS:.o=.d) $(OTHER_DE INCLUDE_PATH := $(INCLUDE_PATH) -I$(PREFIX)/include $(foreach dir,$(VPATH),-I$(dir)) # These rules cause mostof the work to be done. -build: $(STAMPS) $(OTHER_TESTS) +build: $(STAMPS) $(OTHER_PROGS) ifneq ($(strip $(DEPS)),) @$(CAT) $(DEPS) > makefile.deps endif -clean: $(foreach test,$(TESTS),$(test).clean) $(OTHER_CLEAN) +clean: $(foreach test,$(PROGS),$(test).clean) $(OTHER_CLEAN) @$(RM) makefile.deps ifneq ($(strip $(DEPS)),) @$(RM) $(DEPS) diff --git a/packages/pkgconf/makrules.src b/packages/pkgconf/makrules.src --- a/packages/pkgconf/makrules.src +++ b/packages/pkgconf/makrules.src @@ -23,7 +23,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -40,6 +40,9 @@ VPATH := . $(COMPONENT_REPOSITORY # from the list of source files. OTHER_OBJS and OTHER_DEPS are # provided as an escape mechanism, as is OTHER_TARGETS. +COMPILE += $(DRIVERS) +DRIVER_DEPS := $(DRIVERS:.c=.D) +OTHER_TARGETS += $(DRIVER_DEPS) OBJECTS := $(COMPILE:.cxx=.o) OBJECTS := $(OBJECTS:.c=.o) OBJECTS := $(OBJECTS:.S=.o) @@ -77,7 +80,7 @@ endif # Updating the library involves using ar with any object files that -# have been rebuilt. After any s +# have been rebuilt. $(LIBRARY).stamp: $(OBJECTS) ifneq ($(strip $(OBJECTS)),) @@ -85,7 +88,6 @@ ifneq ($(strip $(OBJECTS)),) endif $(TOUCH) $@ - # The clean target cleans up the intermediate files, any object # files, and any dependency files. diff --git a/packages/pkgconf/makrules.tst b/packages/pkgconf/makrules.tst --- a/packages/pkgconf/makrules.tst +++ b/packages/pkgconf/makrules.tst @@ -23,7 +23,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -79,9 +79,14 @@ endif ifneq ($(STAMPS),) LIBDEPS := $(wildcard $(PREFIX)/lib/*) +DRIVER_DEPS := $(wildcard $(PREFIX)/lib/*driver.o) %.stamp: $(PACKAGE)_%.o $(LIBDEPS) - $(CC) -o $(PREFIX)/tests/$(PACKAGE)/$*$(EXEEXT) $< $(LDFLAGS) -L$(PREFIX)/lib -Ttarget.ld -nostdlib +ifneq ($(IGNORE_LINK_ERRORS),) + -$(CC) -o $(PREFIX)/tests/$(PACKAGE)/$*$(EXEEXT) $< $(DRIVER_DEPS) $(LDFLAGS) -L$(PREFIX)/lib -Ttarget.ld -nostdlib +else + $(CC) -o $(PREFIX)/tests/$(PACKAGE)/$*$(EXEEXT) $< $(DRIVER_DEPS) $(LDFLAGS) -L$(PREFIX)/lib -Ttarget.ld -nostdlib +endif @$(TOUCH) $@ %.clean: diff --git a/packages/targets b/packages/targets --- a/packages/targets +++ b/packages/targets @@ -22,7 +22,7 @@ # September 30, 1998. # # The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. # ------------------------------------------- # #####COPYRIGHTEND#### @@ -94,11 +94,6 @@ target mn10300 { startup { ram rom } packages { CYGPKG_HAL_MN10300_STDEVAL1 - CYGPKG_DEVICES_GDB - CYGPKG_DEVICES_SERIAL_RS232_COMMON - CYGPKG_DEVICES_SERIAL_RS232_MN10300 - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG } } @@ -107,8 +102,6 @@ target mn10300 { startup { ram } packages { CYGPKG_HAL_MN10300_SIM - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG } } } @@ -134,10 +127,6 @@ target tx39 { startup { ram rom } packages { CYGPKG_HAL_TX39_JMR3904 - CYGPKG_DEVICES_SERIAL_RS232_COMMON - CYGPKG_DEVICES_SERIAL_RS232_TX39 - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG } } platform sim { @@ -145,8 +134,6 @@ target tx39 { startup { ram } packages { CYGPKG_HAL_TX39_SIM - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG } } } @@ -169,11 +156,16 @@ target powerpc { platform cogent { alias { "Cogent board" } - startup { ram rom } + startup { ram rom stubs } packages { CYGPKG_HAL_POWERPC_COGENT - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG + } + } + platform fads { + alias { "FADS board" } + startup { ram rom } + packages { + CYGPKG_HAL_POWERPC_FADS } } platform sim { @@ -181,9 +173,102 @@ target powerpc { startup { ram } packages { CYGPKG_HAL_POWERPC_SIM - CYGPKG_DEVICES_WALLCLOCK - CYGPKG_DEVICES_WATCHDOG } } } +target i386 { + alias { i386 i486 i586 i86 ix86 } + command_prefix i686-pc-linux-gnu + packages { CYGPKG_HAL_I386 } + cflags { + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-nostartfiles -nostdlib -Wl,--gc-sections" + } + + platform linux { + alias { "Linux" } + startup { ram } + packages { + CYGPKG_HAL_I386_LINUX + } + + } +} + +target arm { + alias { ARM arm-elf } + command_prefix arm-elf + packages { CYGPKG_HAL_ARM } + hal hal/arm/arch + + platform pid { + alias { "ARM PID7 development board" } + startup { ram rom stubs } + packages { + CYGPKG_HAL_ARM_PID + } + cflags { + ARCHFLAGS "-mcpu=arm7tdmi" + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" + } + } + platform aeb { + alias { "ARM Eval Board (AEB)" } + startup { ram rom stubs } + packages { + CYGPKG_HAL_ARM_AEB + } + cflags { + ARCHFLAGS "-mcpu=arm7di" + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" + } + } +} + +target sparclite { + alias { SPARClite sparclite-elf } + command_prefix sparclite-elf + packages { CYGPKG_HAL_SPARCLITE } + hal hal/sparclite/arch + + cflags { + ARCHFLAGS "-msoft-float -mcpu=sparclite" + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" + } + + platform sim { + alias { "Simulator" } + startup { ram } + packages { + CYGPKG_HAL_SPARCLITE_SIM + } + } + + platform sleb { + alias { "SPARClite Evaluation Board" } + startup { ram rom } + packages { + CYGPKG_HAL_SPARCLITE_SLEB + } + } +}