# HG changeset patch # User asl # Date 1215799324 0 # Node ID 7c92e5146d0a2257fb09f8c6a71897d7802def2d # Parent 24cb6e989e057cc128ffbe378bd90bcf0f6c1596 * src/platform.S: Startup routines for remapping the flash during startup. Defined own rom_vector table. * src/ser.c: Little updates that could cause problems after a reset with wrong settings in the serial configuration registers. * include/pkgconf/mlt_fr30_skmb91302_rom.h: * include/pkgconf/mlt_fr30_skmb91302_rom.ldi: Reworked memory layout for flash support. diff --git a/packages/hal/fr30/skmb91302/current/ChangeLog b/packages/hal/fr30/skmb91302/current/ChangeLog --- a/packages/hal/fr30/skmb91302/current/ChangeLog +++ b/packages/hal/fr30/skmb91302/current/ChangeLog @@ -1,3 +1,14 @@ +2008-07-01 Lars Poeschel + + * src/platform.S: Startup routines for remapping the flash during + startup. Defined own rom_vector table. + * src/ser.c: Little updates that could cause problems after a reset with + wrong settings in the serial configuration registers. + * include/pkgconf/mlt_fr30_skmb91302_rom.h: + * include/pkgconf/mlt_fr30_skmb91302_rom.ldi: Reworked memory layout for + flash support. + + 2007-07-09 Lars Poeschel * src/platform.S: diff --git a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_ram.h b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_ram.h --- a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_ram.h +++ b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_ram.h @@ -8,7 +8,7 @@ #endif #define CYGMEM_REGION_ram (0x2000000) -#define CYGMEM_REGION_ram_SIZE (0x7fffff) +#define CYGMEM_REGION_ram_SIZE (0x800000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #ifndef __ASSEMBLER__ extern char CYG_LABEL_NAME (__heap1) []; diff --git a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.h b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.h --- a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.h +++ b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.h @@ -8,7 +8,7 @@ #endif #define CYGMEM_REGION_ram (0x2000000) -#define CYGMEM_REGION_ram_SIZE (0x7fffff) +#define CYGMEM_REGION_ram_SIZE (0x800000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #ifndef __ASSEMBLER__ extern char CYG_LABEL_NAME (__heap1) []; diff --git a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.ldi b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.ldi --- a/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.ldi +++ b/packages/hal/fr30/skmb91302/current/include/pkgconf/mlt_fr30_skmb91302_rom.ldi @@ -6,26 +6,26 @@ MEMORY { - ram : ORIGIN = 0x3F000, LENGTH = 0x1000 + ram : ORIGIN = 0x18000, LENGTH = 0x1000 rom1 : ORIGIN = 0x80000, LENGTH = 0x7fc00 // Length = 511 kB ints : ORIGIN = 0xFFC00, LENGTH = 0x400 - rom2 : ORIGIN = 0x100000, LENGTH = 0x700000 + rom2 : ORIGIN = 0x1100000, LENGTH = 0x700000 sdram : ORIGIN = 0x2000000, LENGTH = 0x800000 } SECTIONS { SECTIONS_BEGIN - SECTION_text (rom1, 0x80000, LMA_EQ_VMA) - SECTION_fini (rom1, ALIGN (0x4), LMA_EQ_VMA) - SECTION_rodata (rom1, ALIGN (0x4), LMA_EQ_VMA) -// SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) - SECTION_fixup (rom1, ALIGN (0x4), LMA_EQ_VMA) - SECTION_gcc_except_table (rom1, ALIGN (0x4), LMA_EQ_VMA) - SECTION_rom_vectors (ints,0xffc00 , LMA_EQ_VMA) + SECTION_rom_startup(rom1, 0x80000, LMA_EQ_VMA) + SECTION_ram_startup(ram, 0x18000, FOLLOWING(.rom_startup_trampoline)) + SECTION_rom_vectors (ints, 0xffc00 , LMA_EQ_VMA) + SECTION_text (rom2, 0x1100000, AT(0x100000)) + SECTION_fini (rom2, ALIGN (0x4), FOLLOWING (.text)) + SECTION_rodata (rom2, ALIGN (0x4), FOLLOWING (.fini)) + SECTION_fixup (rom2, ALIGN (0x4), FOLLOWING (.rodata)) + SECTION_gcc_except_table (rom2, ALIGN (0x4), FOLLOWING (.fixup)) SECTION_fixed_vectors (sdram, 0x2000000, LMA_EQ_VMA) SECTION_data (sdram, ALIGN(0x4), FOLLOWING (.gcc_except_table)) -// SECTION_data (sdram, ALIGN(0x4), LMA_EQ_VMA) SECTION_bss (sdram, ALIGN (0x4), LMA_EQ_VMA) CYG_LABEL_DEFN(__heap1) = ALIGN (0x1000); SECTIONS_END diff --git a/packages/hal/fr30/skmb91302/current/include/platform.inc b/packages/hal/fr30/skmb91302/current/include/platform.inc --- a/packages/hal/fr30/skmb91302/current/include/platform.inc +++ b/packages/hal/fr30/skmb91302/current/include/platform.inc @@ -60,38 +60,6 @@ #include -#------------------------------------------------------------------------------ - -#define CYGPKG_HAL_RESET_VECTOR_FIRST_CODE - .macro hal_reset_vector_first_code - .endm - - -##----------------------------------------------------------------------------- -## ext bus interface registers -## flash part - .equ FR30_MB91301_ASR0, 0x640 - .equ FR30_MB91301_ACR0, 0x642 - .equ FR30_MB91301_AWR0, 0x660 - .equ FR30_MB91301_CSER, 0x680 - - .equ FR30_MB91301_PDR9, 0x9 - .equ FR30_MB91301_DDR9, 0x609 - .equ FR30_MB91301_PFR9, 0x619 - .equ FR30_MB91301_PCR9, 0x629 - - .equ FR30_MB91301_PDR8, 0x8 - .equ FR30_MB91301_DDR8, 0x608 - .equ FR30_MB91301_PFR8, 0x618 - .equ FR30_MB91301_PCR8, 0x628 - -## sdram part - .equ FR30_MB91301_ASR6, 0x658 - .equ FR30_MB91301_ACR6, 0x65a - .equ FR30_MB91301_AWR6, 0x66c - .equ FR30_MB91301_MCRA, 0x670 - .equ FR30_MB91301_MCRB, 0x671 - .equ FR30_MB91301_RCR, 0x684 ##------------------------------------------------------------------------------ ## ext Bus (memory controller) initialisation macros @@ -100,10 +68,17 @@ #define CYGPKG_HAL_FR30_FLASH_INIT_DEFINED +## flash init is empty for this platform because it is initialized in the +## special hal_fr30_ram_startup_trampoline to map flash to 0x1000000 .macro hal_flash_init +.endm + +## and the following macro is used in the special +## hal_fr30_ram_startup_trampoline for flash initialisation +.macro hal_flash_init_from_ram ldi:20 #FR30_MB91301_ASR0, r10 ; CS0 area starts at - ldi:8 0x000, r0 ; 0x00000000 + ldi:20 0x100, r0 ; 0x01000000 sth r0, @r10 ; ldi:20 #FR30_MB91301_ACR0, r11 ; configuration parameters for CS0 @@ -140,6 +115,16 @@ .macro hal_memc_init +## The following instruction is without function. It is only to reference +## hal_fr30_rom_startup_trampoline, because when not referenced the linker +## does not include the file platform.S in the link. If somewhen some other +## referenced code appears in platform.S the instruction here can be deleted +## (including the surrounding macro)! + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + ldi:32 #hal_fr30_rom_startup_trampoline, r10 +#endif + ldi:20 #FR30_MB91301_ASR6, r10 ; CS6 area starts at ldi:20 0x200, r0 ; 0x02000000 sth r0, @r10 ; @@ -185,5 +170,19 @@ .endm #------------------------------------------------------------------------------ +## Vector table for storage. platform.S defines a vector table and wants to +## override the one from variant.S with this define + +#define CYGPKG_HAL_FR30_ROM_VECTORS_DEFINED + +#------------------------------------------------------------------------------ +# Difference of the flash memory from the linkers LMA (loadmemoryaddress) after +# the new mapping in (mapping is done in hal_fr30_ram_startup_trampoline). + +#define CYGPKG_HAL_FR30_LMA_OFFSET 0x1000000 + + + +#------------------------------------------------------------------------------ #endif // ifndef CYGONCE_HAL_PLATFORM_INC # end of platform.inc diff --git a/packages/hal/fr30/skmb91302/current/src/platform.S b/packages/hal/fr30/skmb91302/current/src/platform.S --- a/packages/hal/fr30/skmb91302/current/src/platform.S +++ b/packages/hal/fr30/skmb91302/current/src/platform.S @@ -1,5 +1,5 @@ +##============================================================================= ## -#============================================================================= ## platform.S ## ## Fujitsu Starterkit MB91302 platform code @@ -63,10 +63,171 @@ #include ##----------------------------------------------------------------------------- +## platforms special entry point. +## it copies the code from hal_fr30_ram_startup_trampoline until +## hal_fr30_ram_startup_trampoline_end to ram and jumps there. The code there +## is for mapping the flash to 0x1000000 and then jumping to real entry +## (_start). + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .section ".rom_startup_trampoline","ax" + + .balign 4 + .global hal_fr30_rom_startup_trampoline +hal_fr30_rom_startup_trampoline: + # disable interrupts and set priority to lowest (=disable) + andccr #0xef + stilm #0x0 + + ldi:32 #__rom_trampoline_start - 4, r11 + ldi:32 #__ram_trampoline_start - 4, r13 + ldi:32 #__rom_trampoline_end - 8, r12 +1: + add #0x4, r11 + add #0x4, r13 + ld @r11, r0 + cmp r12, r11 + ble:d 1b + st r0, @r13 + +## jump to the code in ram + ldi:32 #hal_fr30_ram_startup_trampoline, r0 + jmp @r0 + +#endif ##----------------------------------------------------------------------------- # Platform Initialization. -# This code performs platform specific initialization. +# This code is copied to a location in RAM on startup and is executed there. +# It maps the the FLASH chip to 0x1000000 and sets the TBR to the new location +# of the hardware vector table (hal_fr30_vector_table). So we can reach the full +# range of the FLASH and it can be used for flashfilesystem. After that it jumps +# to the real application. + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .section ".ram_startup_trampoline","ax" + + .balign 4 + .global hal_fr30_ram_startup_trampoline +hal_fr30_ram_startup_trampoline: + hal_flash_init_from_ram + +## map TBR to the new location (for vector tables) + ldi:32 #0x10ffc00, r0 + mov r0, tbr + +## jump to real startup + ldi:32 #_start, r0 + jmp @r0 + +#endif + + +#============================================================================== +# Vector table for storage in flash, version for skmb91302 platform. +# it differs from variants/archs version in that uses a different reset vector +# that points to the special startup procedure that jumps to the normal entry +# (_start) later. +# base address is 0x000FFC00 and 0x10ffc00 after remapping the flash. +# This address stores the vector address for number 255 +# address 0x000FFFFC (0x10ffffc) is the last vector, the reset vector, which +# is not alterable. Vectors 255 to 80 are used by the INT instruction and set +# to 0 here for now ... + + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .section ".rom_vectors","ax" + + .balign 4 + .global hal_fr30_vector_table +hal_fr30_vector_table: + .rept 255-80 + 1 + .long 0x0 + .endr + .rept 79-67 + 1 + .long 0x0 + .endr + + .long 0x0 + .long 0x0 + .long 0x0 +# number 63 first interrupt source + .long hal_fr30_irq_63 + .long hal_fr30_irq_62 + .long hal_fr30_irq_61 + .long hal_fr30_irq_60 + .long hal_fr30_irq_59 + .long hal_fr30_irq_58 + .long hal_fr30_irq_57 + .long hal_fr30_irq_56 + .long hal_fr30_irq_55 + .long hal_fr30_irq_54 + .long hal_fr30_irq_53 + .long hal_fr30_irq_52 + .long hal_fr30_irq_51 + .long hal_fr30_irq_50 + .long hal_fr30_irq_49 + .long hal_fr30_irq_48 + .long hal_fr30_irq_47 + .long hal_fr30_irq_46 + .long hal_fr30_irq_45 + .long hal_fr30_irq_44 + .long hal_fr30_irq_43 + .long hal_fr30_irq_42 + .long hal_fr30_irq_41 + .long hal_fr30_irq_40 + .long hal_fr30_irq_39 + .long hal_fr30_irq_38 + .long hal_fr30_irq_37 + .long hal_fr30_irq_36 + .long hal_fr30_irq_35 + .long hal_fr30_irq_34 + .long hal_fr30_irq_33 + .long hal_fr30_irq_32 + .long hal_fr30_irq_31 + .long hal_fr30_irq_30 + .long hal_fr30_irq_29 + .long hal_fr30_irq_28 + .long hal_fr30_irq_27 + .long hal_fr30_irq_26 + .long hal_fr30_irq_25 + .long hal_fr30_irq_24 + .long hal_fr30_irq_23 + .long hal_fr30_irq_22 + .long hal_fr30_irq_21 + .long hal_fr30_irq_20 + .long hal_fr30_irq_19 + .long hal_fr30_irq_18 + .long hal_fr30_irq_17 + .long hal_fr30_irq_16 + .long hal_fr30_irq_15 + .long hal_fr30_exception_noerr_14 + .long hal_fr30_exception_noerr_13 + .long hal_fr30_exception_noerr_12 + .long hal_fr30_exception_noerr_11 + .long hal_fr30_exception_noerr_10 + .long hal_fr30_exception_noerr_9 + .long hal_fr30_exception_noerr_8 + .long hal_fr30_exception_noerr_7 + .long hal_fr30_exception_noerr_6 + .long hal_fr30_exception_noerr_5 + .long hal_fr30_exception_noerr_4 + .long hal_fr30_exception_noerr_3 + .long hal_fr30_exception_noerr_2 + +# mode vector (only the first of the four byte is relevant) + .byte 0x1 + .byte 0 + .byte 0 + .byte 0 + +# reset vector + .long hal_fr30_rom_startup_trampoline + +#endif /*CYG_HAL_STARTUP_ROM || CYG_HAL_STARTUP_ROMRAM*/ ##----------------------------------------------------------------------------- diff --git a/packages/hal/fr30/skmb91302/current/src/ser.c b/packages/hal/fr30/skmb91302/current/src/ser.c --- a/packages/hal/fr30/skmb91302/current/src/ser.c +++ b/packages/hal/fr30/skmb91302/current/src/ser.c @@ -152,12 +152,12 @@ static void cyg_hal_plf_serial_set_baudr /* and finally take the best */ if (n < nn){ /* UCC1 = 0 */ + HAL_WRITE_UINT16(port + CYG_HAL_FR30_MB91301_UTIMR_OFFSET, t); HAL_WRITE_UINT8(port + CYG_HAL_FR30_MB91301_UTIMC_OFFSET, 0x02); - HAL_WRITE_UINT16(port + CYG_HAL_FR30_MB91301_UTIMR_OFFSET, t); } else { /* UCC1 = 1 */ + HAL_WRITE_UINT16(port + CYG_HAL_FR30_MB91301_UTIMR_OFFSET, tt); HAL_WRITE_UINT8(port + CYG_HAL_FR30_MB91301_UTIMC_OFFSET, 0x82); - HAL_WRITE_UINT16(port + CYG_HAL_FR30_MB91301_UTIMR_OFFSET, tt); } } @@ -176,9 +176,11 @@ cyg_hal_plf_serial_init_channel(void* __ switch (port){ case CYG_HAL_FR30_MB91301_SER0_BASE: HAL_READ_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value); - HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value | 0x2); + value |= 0x6; + value &= ~0x1; + HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value); HAL_READ_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value); - HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value | 0x3); + HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value | 0x7); if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT == 0){ cyg_hal_plf_serial_set_baudrate_internal(port, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD); } else { @@ -188,9 +190,11 @@ cyg_hal_plf_serial_init_channel(void* __ case CYG_HAL_FR30_MB91301_SER1_BASE: HAL_READ_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value); - HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value | 0x10); + value |= 0x30; + value &= ~0x8; + HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_DDRJ, value); HAL_READ_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value); - HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value | 0x18); + HAL_WRITE_UINT8(CYG_HAL_FR30_MB91301_PFRJ, value | 0x38); if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT == 1){ cyg_hal_plf_serial_set_baudrate_internal(port, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD); } else { @@ -207,7 +211,6 @@ cyg_hal_plf_serial_init_channel(void* __ */ } - // set up U-Timer /* HAL_WRITE_UINT8(port + CYG_HAL_FR30_MB91301_UTIMC_OFFSET, 0x02); // 115200 bps @@ -226,8 +229,8 @@ cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 ssr; cyg_uint8 port; + port = ((channel_data_t*)__ch_data)->base; // wait for tx rdy - port = ((channel_data_t*)__ch_data)->base; do { HAL_READ_UINT8(port + CYG_HAL_FR30_MB91301_SSR_OFFSET, ssr); @@ -349,6 +352,7 @@ cyg_hal_plf_serial_control(void *__ch_da case __COMMCTL_SETBAUD: { cyg_uint32 baud_rate; + cyg_uint16 n, nn; va_list ap; va_start(ap, __func); @@ -389,7 +393,6 @@ cyg_hal_plf_serial_init(void) // Init channels cyg_hal_plf_serial_init_channel((void*)&channels[i]); - // Setup procs in the vector table // Set COMM callbacks for channel @@ -417,7 +420,6 @@ cyg_hal_plf_comms_init(void) return; initialized = 1; - cyg_hal_plf_serial_init(); }