# HG changeset patch
# User jlarmour
# Date 1164306090 0
# Node ID a22de7f91661aac3d98940a6f7cc8b2b77124856
# Parent  f501ab75db137a30c42f1a0f00bedfd378d55640
	* include/devices_wallclock_i386_pc.inl: Added exception for DS_READ
	  DS_WRITE. Take into account that in Intel PC platforms the 8Th bit
	  in DS_ADDR is used to enable or disable NMI gate, and therefore,
	  should be preserved.

diff --git a/packages/devs/wallclock/i386/pc/current/ChangeLog b/packages/devs/wallclock/i386/pc/current/ChangeLog
--- a/packages/devs/wallclock/i386/pc/current/ChangeLog
+++ b/packages/devs/wallclock/i386/pc/current/ChangeLog
@@ -1,3 +1,10 @@
+2006-11-23  David Fernandez  <dfernandez@cct.co.uk>
+
+	* include/devices_wallclock_i386_pc.inl: Added exception for DS_READ
+	  DS_WRITE. Take into account that in Intel PC platforms the 8Th bit
+	  in DS_ADDR is used to enable or disable NMI gate, and therefore,
+	  should be preserved.
+
 2001-09-18  Rajagopalan Thiruvenkatachary  <rajt@us.ibm.com>
 
 	* include/devices_wallclock_i386_pc.inl:
diff --git a/packages/devs/wallclock/i386/pc/current/include/devices_wallclock_i386_pc.inl b/packages/devs/wallclock/i386/pc/current/include/devices_wallclock_i386_pc.inl
--- a/packages/devs/wallclock/i386/pc/current/include/devices_wallclock_i386_pc.inl
+++ b/packages/devs/wallclock/i386/pc/current/include/devices_wallclock_i386_pc.inl
@@ -52,4 +52,22 @@
 #define DS_ADDR CYGDAT_DEVS_WALLCLOCK_I386_PC_RTC_ADDRESS_PORT
 #define DS_DATA    CYGDAT_DEVS_WALLCLOCK_I386_PC_RTC_DATA_PORT
 
+#ifndef DS_LINEAR
+#define DS_READ(offset, data)                               \
+CYG_MACRO_START                                             \
+    register CYG_BYTE btval;                                \
+    DS_READ_UINT8( DS_ADDR, (btval));                       \
+    DS_WRITE_UINT8(DS_ADDR, ((offset)&0x7F)|(btval&0x80));  \
+    DS_READ_UINT8( DS_DATA, (data));                        \
+CYG_MACRO_END
+#define DS_WRITE(offset, data)                              \
+CYG_MACRO_START                                             \
+    register CYG_BYTE btval;                                \
+    DS_READ_UINT8( DS_ADDR, (btval));                       \
+    DS_WRITE_UINT8(DS_ADDR, ((offset)&0x7F)|(btval&0x80));  \
+    DS_WRITE_UINT8(DS_DATA, (data));                        \
+CYG_MACRO_END
+#endif
+
+
 // EOF devs_wallclock_i386_pc.inl