# HG changeset patch
# User jlarmour
# Date 1058320432 0
# Node ID acb13f403cf55206a2eed88383c31d5504e7e5ac
# Parent  18f99a0f005913d774c1db7afc84a354b72f29b4
	* src/at91_misc.c (hal_interrupt_set_level): Fix assert condition;
	AT91 interrupt priority levels are between 0 and 7.

diff --git a/packages/hal/arm/at91/var/current/ChangeLog b/packages/hal/arm/at91/var/current/ChangeLog
--- a/packages/hal/arm/at91/var/current/ChangeLog
+++ b/packages/hal/arm/at91/var/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-06-25  Daniel Néri  <daniel.neri@sigicom.se>
+
+	* src/at91_misc.c (hal_interrupt_set_level): Fix assert condition;
+	AT91 interrupt priority levels are between 0 and 7.
+
 2003-06-24  Jonathan Larmour  <jifl@eCosCentric.com>
 
 	* include/var_io.h: Remove not seemingly useful AT91_PMC_SCER_CPU.
diff --git a/packages/hal/arm/at91/var/current/src/at91_misc.c b/packages/hal/arm/at91/var/current/src/at91_misc.c
--- a/packages/hal/arm/at91/var/current/src/at91_misc.c
+++ b/packages/hal/arm/at91/var/current/src/at91_misc.c
@@ -247,7 +247,7 @@ void hal_interrupt_set_level(int vector,
 
     CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX &&
                vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector");
-    CYG_ASSERT(level >= 1 && level <= 7, "Invalid level");
+    CYG_ASSERT(level >= 0 && level <= 7, "Invalid level");
 
     HAL_READ_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode);
     mode = (mode & ~AT91_AIC_SMR_PRIORITY) | level;