# HG changeset patch
# User msalter
# Date 1049822216 0
# Node ID ad41aac33e6157c3075980b822880f8bb191faf1
# Parent  22d7a1b27981222c413361526872b05b0a9fcbd6
ixp425 interrupt handling tweaks

diff --git a/packages/hal/arm/xscale/ixp425/current/ChangeLog b/packages/hal/arm/xscale/ixp425/current/ChangeLog
--- a/packages/hal/arm/xscale/ixp425/current/ChangeLog
+++ b/packages/hal/arm/xscale/ixp425/current/ChangeLog
@@ -1,3 +1,13 @@
+2003-04-08  Mark Salter  <msalter@redhat.com>
+
+	* include/hal_var_ints.h (CYGHWR_HAL_GDB_PORT_VECTORS_MATCH): Define.
+
+	* src/ixp425_misc.c (hal_interrupt_mask): Mask QM1 interrupt is all
+	NPE interrupts are masked.
+	(hal_interrupt_unmask): Unmask QM1 is any NPE interrupts unmasked.
+
+	* include/hal_ixp425.h (IXP425_INTR_FIQ_ENC_ST): Fix offset.
+ 
 2003-04-06  Mark Salter  <msalter@redhat.com>
 
 	* src/ixp425_pci.c (cyg_hal_plf_pci_init): Support non-host mode.
diff --git a/packages/hal/arm/xscale/ixp425/current/include/hal_ixp425.h b/packages/hal/arm/xscale/ixp425/current/include/hal_ixp425.h
--- a/packages/hal/arm/xscale/ixp425/current/include/hal_ixp425.h
+++ b/packages/hal/arm/xscale/ixp425/current/include/hal_ixp425.h
@@ -8,7 +8,7 @@
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -270,7 +270,7 @@
 #define IXP425_INTR_FIQ_ST         REG32(IXP425_INTR_CFG_BASE,0x10)
 #define IXP425_INTR_PRTY           REG32(IXP425_INTR_CFG_BASE,0x14)
 #define IXP425_INTR_IRQ_ENC_ST     REG32(IXP425_INTR_CFG_BASE,0x18)
-#define IXP425_INTR_FIQ_ENC_ST     REG32(IXP425_INTR_CFG_BASE,0x18)
+#define IXP425_INTR_FIQ_ENC_ST     REG32(IXP425_INTR_CFG_BASE,0x1C)
 
 // --------------------------------------------------------------------------
 // Timers (Chapter 15)
diff --git a/packages/hal/arm/xscale/ixp425/current/include/hal_var_ints.h b/packages/hal/arm/xscale/ixp425/current/include/hal_var_ints.h
--- a/packages/hal/arm/xscale/ixp425/current/include/hal_var_ints.h
+++ b/packages/hal/arm/xscale/ixp425/current/include/hal_var_ints.h
@@ -10,7 +10,7 @@
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -122,5 +122,16 @@ hal_clock_reinitialize(          int *pf
 
 #define HAL_PLATFORM_RESET_ENTRY 0x00000000
 
+
+// ------------------------------------------------------------------------
+// Used for to tell if interrupt belongs to GDB comm channel
+//
+#define CYGHWR_HAL_GDB_PORT_VECTORS_MATCH(_v_, _gv_) \
+    (((_v_) == (_gv_)) || \
+     ((_v_) == CYGNUM_HAL_INTERRUPT_QM1 && \
+       ((_gv_) == CYGNUM_HAL_INTERRUPT_NPEB || \
+        (_gv_) == CYGNUM_HAL_INTERRUPT_NPEC)))
+
+
 #endif // CYGONCE_HAL_VAR_INTS_H
 // EOF hal_var_ints.h
diff --git a/packages/hal/arm/xscale/ixp425/current/src/ixp425_misc.c b/packages/hal/arm/xscale/ixp425/current/src/ixp425_misc.c
--- a/packages/hal/arm/xscale/ixp425/current/src/ixp425_misc.c
+++ b/packages/hal/arm/xscale/ixp425/current/src/ixp425_misc.c
@@ -131,6 +131,8 @@ hal_IRQ_handler(void)
 void
 hal_interrupt_mask(int vector)
 {
+    unsigned val;
+
     if (vector < CYGNUM_HAL_ISR_MIN || CYGNUM_HAL_ISR_MAX < vector)
 	return;
 
@@ -141,12 +143,24 @@ hal_interrupt_mask(int vector)
     }
 #endif
 
-    *IXP425_INTR_EN &= ~(1 << vector);
+    val = *IXP425_INTR_EN & ~(1 << vector);
+
+    // If unmasking NPE interrupt, also unmask QM1 which is
+    // shared by all NPE ports.
+    if (vector == CYGNUM_HAL_INTERRUPT_NPEB ||
+	vector == CYGNUM_HAL_INTERRUPT_NPEC) {
+	if (!(val & (CYGNUM_HAL_INTERRUPT_NPEB | CYGNUM_HAL_INTERRUPT_NPEC)))
+	    val &= ~(1 << CYGNUM_HAL_INTERRUPT_QM1);
+    }
+    
+    *IXP425_INTR_EN = val;
 }
 
 void
 hal_interrupt_unmask(int vector)
 {
+    unsigned val;
+
     if (vector < CYGNUM_HAL_ISR_MIN || CYGNUM_HAL_ISR_MAX < vector)
 	return;
 
@@ -157,7 +171,16 @@ hal_interrupt_unmask(int vector)
     }
 #endif
 
-    *IXP425_INTR_EN |= (1 << vector);
+    val = *IXP425_INTR_EN | (1 << vector);
+
+    // If all NPE interrupts are masked, also mask QM1 which is
+    // shared by all NPE ports.
+    if (vector == CYGNUM_HAL_INTERRUPT_NPEB ||
+	vector == CYGNUM_HAL_INTERRUPT_NPEC) {
+	val |= (1 << CYGNUM_HAL_INTERRUPT_QM1);
+    }
+
+    *IXP425_INTR_EN = val;
 }
 
 void