# HG changeset patch
# User vae
# Date 1362850879 0
# Node ID bdaf2ba0b81c56f77389cd3633613fe35320edd1
# Parent  4a95551c2713a7098554769e36a82595adcf9491
* misc/redboot_ROM_FPU.ecm: Add ECM for RedBoot with FPU support.
* cdl/hal_cortexm_stm32_stm32x0g_eval.cdl: Implement CYGINT_HAL_FPV4_SP_D16.
[Bugzilla 1001607]

diff --git a/packages/hal/cortexm/stm32/stm32x0g_eval/current/ChangeLog b/packages/hal/cortexm/stm32/stm32x0g_eval/current/ChangeLog
--- a/packages/hal/cortexm/stm32/stm32x0g_eval/current/ChangeLog
+++ b/packages/hal/cortexm/stm32/stm32x0g_eval/current/ChangeLog
@@ -1,3 +1,9 @@
+2012-12-01  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* misc/redboot_ROM_FPU.ecm: Add ECM for RedBoot with FPU support.
+	* cdl/hal_cortexm_stm32_stm32x0g_eval.cdl: Implement CYGINT_HAL_FPV4_SP_D16.
+	[Bugzilla 1001607]
+
 2012-03-29  Jonathan Larmour  <jifl@eCosCentric.com>
 
 	* include/pkgconf/mlt_cortexm_stm32x0g_eval_sram.ldi:
diff --git a/packages/hal/cortexm/stm32/stm32x0g_eval/current/cdl/hal_cortexm_stm32_stm32x0g_eval.cdl b/packages/hal/cortexm/stm32/stm32x0g_eval/current/cdl/hal_cortexm_stm32_stm32x0g_eval.cdl
--- a/packages/hal/cortexm/stm32/stm32x0g_eval/current/cdl/hal_cortexm_stm32_stm32x0g_eval.cdl
+++ b/packages/hal/cortexm/stm32/stm32x0g_eval/current/cdl/hal_cortexm_stm32_stm32x0g_eval.cdl
@@ -125,6 +125,7 @@ cdl_package CYGPKG_HAL_CORTEXM_STM32_STM
             puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"ST STM3240G-EVAL\""
             puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
         }
+        implements    CYGINT_HAL_FPV4_SP_D16
     }
 
     cdl_component CYG_HAL_STARTUP {
@@ -146,7 +147,7 @@ cdl_package CYGPKG_HAL_CORTEXM_STM32_STM
             The 'ROMINT' type supports applications with code in on-chip flash
             and data/bss in on-chip SRAM, ignoring the external SRAM."
     }
-    
+
     cdl_component CYGHWR_MEMORY_LAYOUT {
         display "Memory layout"
         flavor data
@@ -231,9 +232,9 @@ cdl_package CYGPKG_HAL_CORTEXM_STM32_STM
                 the J5 setting."
         }
     }
-    
+
     implements CYGINT_HAL_VIRTUAL_VECTOR_VPRINTF
-    
+
     # The 9-pin D connector is connected to PC10 and PC11, which are connected to
     # USART3 or UART4 depending on pin config. The main difference between these
     # ports is that UART4 doesn't support hardware flow control. This board doesn't