# HG changeset patch # User jlarmour # Date 1048811933 0 # Node ID c3c06c9d0fd07ef13358151b769d8edb4b4b58d4 # Parent d6a1854fdc1b72e9c2b2b4152303c6e044725ce1 * include/hal_platform_setup.h: EDB7211 has two 8M FLASH chips with different chip selects, so map them contiguously. Also fix compiler warning with #if to #ifdef. * include/pkgconf/mlt_arm_edb7211_rom.mlt: Update to reflect ROM being 16M not 8M now. * include/pkgconf/mlt_arm_edb7211_rom.ldi: Ditto. * include/pkgconf/mlt_arm_edb7211_rom.h: Ditto. diff --git a/packages/hal/arm/edb7xxx/current/ChangeLog b/packages/hal/arm/edb7xxx/current/ChangeLog --- a/packages/hal/arm/edb7xxx/current/ChangeLog +++ b/packages/hal/arm/edb7xxx/current/ChangeLog @@ -1,3 +1,14 @@ +2003-03-28 Jani Monoses + + * include/hal_platform_setup.h: EDB7211 has two 8M FLASH chips + with different chip selects, so map them contiguously. + Also fix compiler warning with #if to #ifdef. + + * include/pkgconf/mlt_arm_edb7211_rom.mlt: Update to reflect ROM + being 16M not 8M now. + * include/pkgconf/mlt_arm_edb7211_rom.ldi: Ditto. + * include/pkgconf/mlt_arm_edb7211_rom.h: Ditto. + 2003-02-13 Gary Thomas * include/plf_io.h: Add CYG_MACRO_START/END markers to match diff --git a/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h b/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h --- a/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h +++ b/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h @@ -101,8 +101,12 @@ #define LCD_PA 0xC0000000 #define ROM0_LA_START 0xE0000000 #define ROM0_PA 0x00000000 +#if defined (__EDB7211) +#define ROM0_LA_END 0xE0800000 +#else #define ROM0_LA_END 0xF0000000 -#define ROM1_LA_START 0xF0000000 +#endif +#define ROM1_LA_START ROM0_LA_END #define ROM1_LA_END 0x00000000 #define ROM1_PA 0x10000000 #define EXPANSION2_LA_START 0x20000000 @@ -262,7 +266,6 @@ 15: mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ .endm #endif // CYG_HAL_STARTUP_RAM - #ifdef CYGHWR_HAL_ARM_EDB7XXX_VARIANT_EP7312 .macro INIT_MEMORY_CONFIG mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) @@ -284,7 +287,7 @@ 15: mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* str r2,[r1] .endm #else -#if CYGHWR_HAL_ARM_EDB7XXX_VARIANT_EP7209 +#ifdef CYGHWR_HAL_ARM_EDB7XXX_VARIANT_EP7209 // No DRAM controller .macro INIT_MEMORY_CONFIG /* Initialize memory configuration */ diff --git a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h --- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h @@ -14,7 +14,7 @@ #define CYGMEM_REGION_sram_SIZE (0x9c00) #define CYGMEM_REGION_sram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #define CYGMEM_REGION_rom (0xe0000000) -#define CYGMEM_REGION_rom_SIZE (0x800000) +#define CYGMEM_REGION_rom_SIZE (0x1000000) #define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) #ifndef __ASSEMBLER__ extern char CYG_LABEL_NAME (__heap1) []; diff --git a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi --- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi @@ -8,7 +8,7 @@ MEMORY { ram : ORIGIN = 0, LENGTH = 0xfd7000 sram : ORIGIN = 0x60000000, LENGTH = 0x9c00 - rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 + rom : ORIGIN = 0xe0000000, LENGTH = 0x1000000 } SECTIONS diff --git a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt --- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt @@ -1,7 +1,7 @@ version 0 region ram 0 fd7000 0 ! region sram 60000000 9c00 0 ! -region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. +region rom e0000000 1000000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! section data 0 1 1 1 1 1 0 0 1000 bss ! section bss 0 4 0 1 0 1 0 1 heap1 heap1 !