# HG changeset patch # User vae # Date 1377441778 0 # Node ID c53b67b63b638332ae09bc03b9f49178e4fa9d8c # Parent 77f9d3253c3e8d426e1e887faf2f4e45939eadca Define Cortex-M4F architecture specific builtin mathematical functions. diff --git a/packages/hal/cortexm/arch/current/ChangeLog b/packages/hal/cortexm/arch/current/ChangeLog --- a/packages/hal/cortexm/arch/current/ChangeLog +++ b/packages/hal/cortexm/arch/current/ChangeLog @@ -1,3 +1,8 @@ +2013-08-25 Ilija Kocho + + * cdl/hal_cortexm_fpu.cdl, include/fpv4_sp_d16_libm.h: Define Cortex-M4F + architecture specific builtin mathematical functions. [ Bugzilla 1001539 ] + 2013-04-29 Ilija Kocho * include/cortexm_stub.h: Remove unwanted diag_printf(). diff --git a/packages/hal/cortexm/arch/current/cdl/hal_cortexm_fpu.cdl b/packages/hal/cortexm/arch/current/cdl/hal_cortexm_fpu.cdl --- a/packages/hal/cortexm/arch/current/cdl/hal_cortexm_fpu.cdl +++ b/packages/hal/cortexm/arch/current/cdl/hal_cortexm_fpu.cdl @@ -85,11 +85,11 @@ flavor data legal_values { "ALL" "LAZY" "NONE" } default_value { "LAZY" } - - requires { is_active (CYGPKG_KERNEL) implies + + requires { is_active (CYGPKG_KERNEL) implies CYGTST_KERNEL_SKIP_MULTI_THREAD_FP_TEST == (CYGHWR_HAL_CORTEXM_FPU_SWITCH == "NONE") } - + description " This option selects the FPU context switching scheme. Straight-forward behaviour is to save and @@ -121,6 +121,11 @@ display "FPv4-SP-D16" no_define compile fpv4_sp_d16.c + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_LIBM_H " + } + description " FPv4-SP-D16 is ARMv7 architecture single precision floating point unit with 16 double precision / 32 single precision