# HG changeset patch
# User jlarmour
# Date 1335193788 0
# Node ID e07f3346a350a939317382c457db6ec5990e3030
# Parent  9cff5928a4e2380633b68c5574c32ca4e0cff7db
* include/var_io_pins.h (CYGHWR_HAL_STM32_PIN_IN): Removed
spurious parameter since the API for this macro should match the
F2/F4 (HIPERFORMANCE) definition.
* include/var_io_eth.h: Update F1 ETH_MII
CYGHWR_HAL_STM32_PIN_IN() usage to reflect correct API.

diff --git a/packages/hal/cortexm/stm32/var/current/ChangeLog b/packages/hal/cortexm/stm32/var/current/ChangeLog
--- a/packages/hal/cortexm/stm32/var/current/ChangeLog
+++ b/packages/hal/cortexm/stm32/var/current/ChangeLog
@@ -1,3 +1,12 @@
+2012-04-23  James Smith  <jsmith@ecoscentric.com>
+
+	* include/var_io_pins.h (CYGHWR_HAL_STM32_PIN_IN): Removed
+	spurious parameter since the API for this macro should match the
+	F2/F4 (HIPERFORMANCE) definition.
+
+	* include/var_io_eth.h: Update F1 ETH_MII
+	CYGHWR_HAL_STM32_PIN_IN() usage to reflect correct API.
+
 2012-04-13  Christophe Coutand  <ecos@hotmail.co.uk>
 
 	* include/var_io.h:
diff --git a/packages/hal/cortexm/stm32/var/current/include/var_io_eth.h b/packages/hal/cortexm/stm32/var/current/include/var_io_eth.h
--- a/packages/hal/cortexm/stm32/var/current/include/var_io_eth.h
+++ b/packages/hal/cortexm/stm32/var/current/include/var_io_eth.h
@@ -400,9 +400,9 @@
 #if defined (CYGHWR_HAL_CORTEXM_STM32_FAMILY_F1)
 
 // MII interface
-#define CYGHWR_HAL_STM32_ETH_MII_TX_CRS         CYGHWR_HAL_STM32_PIN_IN( A,  0, NA, FLOATING )
-#define CYGHWR_HAL_STM32_ETH_MII_COL            CYGHWR_HAL_STM32_PIN_IN( A,  3, NA, FLOATING )
-#define CYGHWR_HAL_STM32_ETH_MII_RX_ER          CYGHWR_HAL_STM32_PIN_IN( B, 10, NA, FLOATING )
+#define CYGHWR_HAL_STM32_ETH_MII_TX_CRS         CYGHWR_HAL_STM32_PIN_IN( A,  0, FLOATING )
+#define CYGHWR_HAL_STM32_ETH_MII_COL            CYGHWR_HAL_STM32_PIN_IN( A,  3, FLOATING )
+#define CYGHWR_HAL_STM32_ETH_MII_RX_ER          CYGHWR_HAL_STM32_PIN_IN( B, 10, FLOATING )
 
 #define CYGHWR_HAL_STM32_ETH_MII_TX_EN          CYGHWR_HAL_STM32_PIN_ALTFN_OUT( B, 11, 11, PUSHPULL, NONE, AT_LEAST(50) )
 #define CYGHWR_HAL_STM32_ETH_MII_TXD0           CYGHWR_HAL_STM32_PIN_ALTFN_OUT( B, 12, 11, PUSHPULL, NONE, AT_LEAST(50) )
diff --git a/packages/hal/cortexm/stm32/var/current/include/var_io_pins.h b/packages/hal/cortexm/stm32/var/current/include/var_io_pins.h
--- a/packages/hal/cortexm/stm32/var/current/include/var_io_pins.h
+++ b/packages/hal/cortexm/stm32/var/current/include/var_io_pins.h
@@ -465,7 +465,7 @@
 #define CYGHWR_HAL_STM32_PIN_ALTFN_OUT(__port,__pin,__af,__ppod,__pupd,__speed) \
   CYGHWR_HAL_STM32_GPIO(__port,__pin,OUT_##__speed,ALT_##__ppod)
 
-#define CYGHWR_HAL_STM32_PIN_IN(__port,__pin,__ppod,__pupd)     \
+#define CYGHWR_HAL_STM32_PIN_IN(__port,__pin,__pupd)     \
   CYGHWR_HAL_STM32_GPIO(__port,__pin,IN,__pupd)
 
 #define CYGHWR_HAL_STM32_PIN_ALTFN_IN(__port,__pin,__af,__ppod,__pupd)  \