# HG changeset patch
# User jlarmour
# Date 1157631082 0
# Node ID e29a68373ae99c1ab72e02a1cbf7a0482a79c73f
# Parent  0f6dadbc02a903e929e4dc40c6652765e2901fd9
        * include/plf_io.h: Added definition for SPI Mode Failure Disable bit
        in the SPI Mode register.

diff --git a/packages/hal/arm/at91/at91sam7s/current/ChangeLog b/packages/hal/arm/at91/at91sam7s/current/ChangeLog
--- a/packages/hal/arm/at91/at91sam7s/current/ChangeLog
+++ b/packages/hal/arm/at91/at91sam7s/current/ChangeLog
@@ -1,3 +1,8 @@
+2006-06-01  John Eigelaar <jeigelaar@mweb.co.za>
+
+	* include/plf_io.h: Added definition for SPI Mode Failure Disable bit
+	in the SPI Mode register.
+
 2006-06-01  Andrew Lunn  <andrew.lunn@ascom.ch>
 
 	* cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for
diff --git a/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h b/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
--- a/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
+++ b/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
@@ -62,6 +62,9 @@
 
 #define AT91_SPI AT91_SPI0
 
+//Extra SPI control bits
+#define AT91_SPI_MR_MODFDIS (1<<4)
+
 // DMA registers 
 #define AT91_SPI_RPR  0x100 // Receive Pointer Register
 #define AT91_SPI_RCR  0x104 // Receive Counter Register