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annotate packages/hal/powerpc/arch/current/include/ppc_regs.h @ 136:a9ac27ec7abc ecos-sw-2000-11-17

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Merge from eCos master repository on 2000-11-17-18:24:25-GMT
author jlarmour
date Fri, 17 Nov 2000 23:16:43 +0000
parents 435cced73e2f
children e0c0827131d1
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1 #ifndef CYGONCE_HAL_PPC_REGS_H
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2 #define CYGONCE_HAL_PPC_REGS_H
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3
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4 //==========================================================================
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5 //
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6 // ppc_regs.h
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7 //
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8 // PowerPC CPU definitions
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9 //
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10 //==========================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //==========================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): jskov
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38 // Contributors: jskov
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39 // Date: 1999-02-19
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40 // Purpose: Provide PPC register definitions
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41 // Description: Provide PPC register definitions
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42 // The short difinitions (sans CYGARC_REG_) are exported only
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43 // if CYGARC_HAL_COMMON_EXPORT_CPU_MACROS is defined.
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44 // Usage:
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45 // #include <cyg/hal/ppc_regs.h>
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46 // ...
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47 //
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48 //
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49 //####DESCRIPTIONEND####
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50 //
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51 //==========================================================================
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52
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53 #include <pkgconf/hal.h>
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54
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55 #include <cyg/hal/var_regs.h>
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56
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57 //--------------------------------------------------------------------------
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58 // SPR access macros.
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59 #define CYGARC_MTSPR(_spr_, _v_) \
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60 asm volatile ("mtspr %0, %1;" :: "I" (_spr_), "r" (_v_));
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61 #define CYGARC_MFSPR(_spr_, _v_) \
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62 asm volatile ("mfspr %0, %1;" : "=r" (_v_) : "I" (_spr_));
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64 //--------------------------------------------------------------------------
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65 // TB access macros.
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66 #define CYGARC_MTTB(_tbr_, _v_) \
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67 asm volatile ("mttb %0, %1;" :: "I" (_tbr_), "r" (_v_));
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68 #define CYGARC_MFTB(_tbr_, _v_) \
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69 asm volatile ("mftb %0, %1;" : "=r" (_v_) : "I" (_tbr_));
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71 //--------------------------------------------------------------------------
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72 // Generic PowerPC Family Definitions
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73 //--------------------------------------------------------------------------
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75 //--------------------------------------------------------------------------
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76 // Some SPRs
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77 #define CYGARC_REG_DSISR 18
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78 #define CYGARC_REG_DAR 19
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79 #define CYGARC_REG_DEC 22
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80 #define CYGARC_REG_SRR0 26
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81 #define CYGARC_REG_SRR1 27
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82 #define CYGARC_REG_SPRG0 272
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83 #define CYGARC_REG_SPRG1 273
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84 #define CYGARC_REG_SPRG2 274
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85 #define CYGARC_REG_SPRG3 275
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86 #define CYGARC_REG_PVR 287
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87
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88 #ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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89 #define DSISR CYGARC_REG_DSISR
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90 #define DAR CYGARC_REG_DAR
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91 #define DEC CYGARC_REG_DEC
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92 #define SRR0 CYGARC_REG_SRR0
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93 #define SRR1 CYGARC_REG_SRR1
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94 #define SPRG0 CYGARC_REG_SPRG0
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95 #define SPRG1 CYGARC_REG_SPRG1
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96 #define SPRG2 CYGARC_REG_SPRG2
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97 #define SPRG3 CYGARC_REG_SPRG3
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98 #define PVR CYGARC_REG_PVR
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99 #endif
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100
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101 //--------------------------------------------------------------------------
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102 // MSR bits
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103 #define CYGARC_REG_MSR_LE 0x00000001 // little-endian mode enable
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104 #define CYGARC_REG_MSR_RI 0x00000002 // recoverable exception
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105 #define CYGARC_REG_MSR_DR 0x00000010 // data address translation
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106 #define CYGARC_REG_MSR_IR 0x00000020 // instruction address translation
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107 #define CYGARC_REG_MSR_IP 0x00000040 // exception prefix
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108 #define CYGARC_REG_MSR_FE1 0x00000100 // floating-point exception mode 1
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109 #define CYGARC_REG_MSR_BE 0x00000200 // branch trace enable
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110 #define CYGARC_REG_MSR_SE 0x00000400 // single-step trace enable
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111 #define CYGARC_REG_MSR_FE0 0x00000800 // floating-point exception mode 0
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112 #define CYGARC_REG_MSR_ME 0x00001000 // machine check enable
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113 #define CYGARC_REG_MSR_FP 0x00002000 // floating-point available
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114 #define CYGARC_REG_MSR_PR 0x00004000 // privilege level
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115 #define CYGARC_REG_MSR_EE 0x00008000 // external interrupt enable
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116 #define CYGARC_REG_MSR_ILE 0x00010000 // exception little-endian mode
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117 #define CYGARC_REG_MSR_POW 0x00040000 // power management enable
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118
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119 #ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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120 #define MSR_LE CYGARC_REG_MSR_LE
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121 #define MSR_RI CYGARC_REG_MSR_RI
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122 #define MSR_DR CYGARC_REG_MSR_DR
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123 #define MSR_IR CYGARC_REG_MSR_IR
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124 #define MSR_IP CYGARC_REG_MSR_IP
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125 #define MSR_FE1 CYGARC_REG_MSR_FE1
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126 #define MSR_BE CYGARC_REG_MSR_BE
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127 #define MSR_SE CYGARC_REG_MSR_SE
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128 #define MSR_FE0 CYGARC_REG_MSR_FE0
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129 #define MSR_ME CYGARC_REG_MSR_ME
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130 #define MSR_FP CYGARC_REG_MSR_FP
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131 #define MSR_PR CYGARC_REG_MSR_PR
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132 #define MSR_EE CYGARC_REG_MSR_EE
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133 #define MSR_ILE CYGARC_REG_MSR_ILE
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134 #define MSR_POW CYGARC_REG_MSR_POW
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135 #endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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136
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137 //--------------------------------------------------------------------------
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138 // Time Base Registers
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139 // READ and WRITE are different addresses!
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140 #define CYGARC_REG_TBL_W 284
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141 #define CYGARC_REG_TBU_W 285
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142 #define CYGARC_REG_TBL_R 268
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143 #define CYGARC_REG_TBU_R 269
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145 #ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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146 #define TBL_W CYGARC_REG_TBL_W
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147 #define TBU_W CYGARC_REG_TBU_W
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148 #define TBL_R CYGARC_REG_TBL_R
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149 #define TBU_R CYGARC_REG_TBU_R
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150 #endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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151
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152 //-----------------------------------------------------------------------------
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153 #endif // ifdef CYGONCE_HAL_PPC_REGS_H
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154 // End of ppc_regs.h