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annotate packages/hal/powerpc/mpc8xx/current/include/variant.inc @ 1777:c16341b1bac6 default tip

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* Added execute permissions to files missed in conversion from CVS
author alexs
date Mon, 12 Oct 2009 02:26:09 +0100
parents c6e4e4cbfa97
children
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1 #ifndef CYGONCE_HAL_VARIANT_INC
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2 #define CYGONCE_HAL_VARIANT_INC
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3 ##=============================================================================
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4 ##
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5 ## variant.inc
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6 ##
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7 ## MPC8xx family assembler header file
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8 ##
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9 ##=============================================================================
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10 #####ECOSGPLCOPYRIGHTBEGIN####
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11 ## -------------------------------------------
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12 ## This file is part of eCos, the Embedded Configurable Operating System.
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13 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 ##
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15 ## eCos is free software; you can redistribute it and/or modify it under
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16 ## the terms of the GNU General Public License as published by the Free
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17 ## Software Foundation; either version 2 or (at your option) any later version.
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18 ##
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19 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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20 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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21 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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22 ## for more details.
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23 ##
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24 ## You should have received a copy of the GNU General Public License along
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25 ## with eCos; if not, write to the Free Software Foundation, Inc.,
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26 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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27 ##
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28 ## As a special exception, if other files instantiate templates or use macros
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29 ## or inline functions from this file, or you compile this file and link it
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30 ## with other works to produce a work based on this file, this file does not
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31 ## by itself cause the resulting work to be covered by the GNU General Public
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32 ## License. However the source code for this file must still be made available
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33 ## in accordance with section (3) of the GNU General Public License.
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34 ##
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35 ## This exception does not invalidate any other reasons why a work based on
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36 ## this file might be covered by the GNU General Public License.
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37 ##
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38 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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39 ## at http://sources.redhat.com/ecos/ecos-license/
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40 ## -------------------------------------------
208
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41 #####ECOSGPLCOPYRIGHTEND####
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42 ##=============================================================================
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43 #######DESCRIPTIONBEGIN####
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44 ##
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45 ## Author(s): jskov
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46 ## Contributors:jskov
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47 ## Date: 2000-02-04
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48 ## Purpose: MPC8xx family definitions.
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49 ## Description: This file contains various definitions and macros that are
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50 ## useful for writing assembly code for the MPC8xx CPU family.
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51 ## Usage:
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52 ## #include <cyg/hal/variant.inc>
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53 ## ...
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54 ##
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55 ##
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56 ######DESCRIPTIONEND####
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57 ##
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58 ##=============================================================================
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59
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60 #include <pkgconf/hal.h>
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61
801
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62 #undef CYG_MSR_COMMON
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63 #define CYG_MSR_COMMON (MSR_ME | MSR_RI)
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64
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65 #include <cyg/hal/arch.inc>
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66
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67 ##-----------------------------------------------------------------------------
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68 ## MPC8xx defined vectors
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69
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70 .macro hal_extra_vectors
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71 # MPC8xx vectors
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72 exception_vector software_emu
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73 exception_vector instruction_tlb_miss
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74 exception_vector data_tlb_miss
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75 exception_vector instruction_tlb_error
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76 exception_vector data_tlb_error
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77 exception_vector reserved_01500
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78 exception_vector reserved_01600
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79 exception_vector reserved_01700
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80 exception_vector reserved_01800
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81 exception_vector reserved_01900
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82 exception_vector reserved_01A00
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83 exception_vector reserved_01B00
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84 exception_vector data_breakpoint
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85 exception_vector instruction_breakpoint
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86 exception_vector peripheral_breakpoint
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87 exception_vector NMI_port
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88 .endm
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89
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90 ##-----------------------------------------------------------------------------
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91 ## MPC8xx CPU initialization
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92 ##
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93 ## Initialize CPU to a post-reset state, ensuring the ground doesn''t
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94 ## shift under us while we try to set things up.
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95
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96 .macro hal_cpu_init
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97 # Disable special MPC8xx "development support" which
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98 # suppresses trace exceptions. The CPU seems to hang, not
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99 # executing from offset 0x1e00(?) as expected.
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100 lwi r3,0x00000007
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101 mtspr ICTRL,r3
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102 li r3,0
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103 mtspr DER, r3
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104
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105 # Disable caches
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106 lwi r3,CYGARC_REG_DC_CMD_CD
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107 sync
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108 mtspr CYGARC_REG_DC_CST,r3
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109 lwi r3,CYGARC_REG_IC_CMD_CD
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110 isync
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111 mtspr CYGARC_REG_IC_CST,r3
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112 isync
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113
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114 # Default caching to off when MMU is disabled
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115 mfspr r3,CYGARC_REG_MI_CTR
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116 oris r3,r3,(CYGARC_REG_MI_CTR_CIDEF)@h
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117 mtspr CYGARC_REG_MI_CTR,r3
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118 mfspr r3,CYGARC_REG_MD_CTR
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119 oris r3,r3,(CYGARC_REG_MD_CTR_CIDEF)@h
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120 mtspr CYGARC_REG_MD_CTR,r3
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121
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122 # Set up MSR (disable MMU for now)
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123 lwi r3,(CYG_MSR & ~(MSR_IR | MSR_DR))
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124 sync
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125 mtmsr r3
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126 sync
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127 .endm
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128
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129 ##-----------------------------------------------------------------------------
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130 ## MPC8xx exception state handling
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131 .macro hal_variant_save regs
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132 .endm
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133
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134 .macro hal_variant_load regs
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135 .endm
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136
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137 ##-----------------------------------------------------------------------------
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138 ## MPC8xx monitor initialization
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139
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140 #ifndef CYGPKG_HAL_PPC_MON_DEFINED
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141
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142 #if defined(CYG_HAL_STARTUP_ROM) || \
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143 defined(CYG_HAL_STARTUP_ROMRAM) || \
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144 ( defined(CYG_HAL_STARTUP_RAM) && \
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145 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
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146
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147 .macro hal_mon_init
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148 #ifdef CYGSEM_HAL_POWERPC_COPY_VECTORS
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149 # If we are starting up from ROM and want vectors in RAM
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150 # or we are starting in RAM and NOT using a ROM monitor,
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151 # copy exception handler code to 0.
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152 lwi r3,rom_vectors # r3 = rom start
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153 lwi r4,0 # r4 = ram start
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154 lwi r5,rom_vectors_end # r5 = rom end
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155 cmplw r3,r5 # skip if no vectors
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156 beq 2f
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157
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158 subi r3,r3,4
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159 subi r4,r4,4
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160 subi r5,r5,4
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161 1:
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162 lwzu r0,4(r3) # get word from ROM
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163 stwu r0,4(r4) # store in RAM
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164 cmplw r3,r5 # compare
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165 blt 1b # loop if not yet done
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166 2:
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167 #endif
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168
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169 # Next initialize the VSR table. This happens whether the
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170 # vectors were copied to RAM or not.
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171
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172 # First fill with exception handlers
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173 lwi r3,cyg_hal_default_exception_vsr
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174 lwi r4,hal_vsr_table
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175 subi r4,r4,4
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176 li r5,CYGNUM_HAL_VSR_COUNT
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177 1: stwu r3,4(r4)
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178 subi r5,r5,1
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179 cmpwi r5,0
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180 bne 1b
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181
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182 # Then fill in the special vectors
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183 lwi r3,cyg_hal_default_interrupt_vsr
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184 lwi r4,hal_vsr_table
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185 stw r3,CYGNUM_HAL_VECTOR_INTERRUPT*4(r4)
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186 stw r3,CYGNUM_HAL_VECTOR_DECREMENTER*4(r4)
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187 .endm
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188
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189 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
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190
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191 # Initialize the VSR table entries
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192 # We only take control of the interrupt vectors,
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193 # the rest are left to the ROM for now...
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194
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195 .macro hal_mon_init
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196 lwi r3,cyg_hal_default_interrupt_vsr
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197 lwi r4,hal_vsr_table
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198 stw r3,CYGNUM_HAL_VECTOR_INTERRUPT*4(r4)
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199 stw r3,CYGNUM_HAL_VECTOR_DECREMENTER*4(r4)
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200 .endm
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201
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202
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203 #else
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204
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205 .macro hal_mon_init
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206
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207 .endm
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208
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209 #endif
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210
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211
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212 #define CYGPKG_HAL_PPC_MON_DEFINED
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213
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214 #endif // CYGPKG_HAL_PPC_MON_DEFINED
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215
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216
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217
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218
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219 ##-----------------------------------------------------------------------------
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220 ## Indicate that the ISR tables are defined in variant.S
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221
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222 #define CYG_HAL_PPC_ISR_TABLES_DEFINED
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223
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224 ##-----------------------------------------------------------------------------
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225 ## MPC8xx interrupt handling.
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226
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227 #ifndef CYGPKG_HAL_POWERPC_INTC_DEFINED
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228
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229 ## First level decoding of MPC8xx SIU interrupt controller.
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230
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231 # decode the interrupt
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232 .macro hal_intc_decode dreg,state
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233 lwz \dreg,CYGARC_PPCREG_VECTOR(\state) # retrieve vector number,
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234 rlwinm. \dreg,\dreg,22,31,31 # isolate bit 21
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235 beq 0f # done if decrementer (vec 0)
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236 lwi \dreg,CYGARC_REG_IMM_SIVEC # if external, get SIU
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237 lbz \dreg,0(\dreg) # vector.
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238 srwi \dreg,\dreg,2
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239 addi \dreg,\dreg,1 # Skip decrementer vector
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240 0: stw \dreg,CYGARC_PPCREG_VECTOR(\state) # update vector in state frame.
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241 slwi \dreg,\dreg,2 # convert to byte offset.
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242 .endm
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243
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244
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245 #define CYGPKG_HAL_POWERPC_INTC_DEFINED
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246 #endif // CYGPKG_HAL_POWERPC_INTC_DEFINED
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247
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248 #------------------------------------------------------------------------------
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249 #endif // ifndef CYGONCE_HAL_VARIANT_INC
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250 # end of variant.inc