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* Added execute permissions to files missed in conversion from CVS
author alexs
date Mon, 12 Oct 2009 02:26:09 +0100
parents d2c90368aeef
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1 #ifndef CYGONCE_HAL_CLOCK_H
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2 #define CYGONCE_HAL_CLOCK_H
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3
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4 //=============================================================================
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5 //
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6 // hal_clock.h
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7 //
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8 // HAL clock support
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9 //
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10 //=============================================================================
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11 //####ECOSGPLCOPYRIGHTBEGIN####
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12 // -------------------------------------------
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13 // This file is part of eCos, the Embedded Configurable Operating System.
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License along
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26 // with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use macros
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30 // or inline functions from this file, or you compile this file and link it
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31 // with other works to produce a work based on this file, this file does not
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32 // by itself cause the resulting work to be covered by the GNU General Public
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33 // License. However the source code for this file must still be made available
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34 // in accordance with section (3) of the GNU General Public License.
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35 //
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36 // This exception does not invalidate any other reasons why a work based on
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37 // this file might be covered by the GNU General Public License.
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38 //
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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40 // at http://sources.redhat.com/ecos/ecos-license/
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41 // -------------------------------------------
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42 //####ECOSGPLCOPYRIGHTEND####
2
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43 //=============================================================================
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44 //#####DESCRIPTIONBEGIN####
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45 //
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46 // Author(s): nickg, gthomas, hmt
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47 // Contributors: nickg, gthomas, hmt
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48 // Date: 1999-01-28
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49 // Purpose: Define clock support
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50 // Description: The macros defined here provide the HAL APIs for handling
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51 // the clock.
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52 //
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53 // Usage:
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54 // #include <cyg/hal/hal_intr.h> // which includes this file
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55 // ...
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56 //
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57 //
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58 //####DESCRIPTIONEND####
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59 //
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60 //=============================================================================
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61
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62 #include <cyg/hal/hal_io.h>
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63
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64 //-----------------------------------------------------------------------------
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65 // Clock control
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66
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67 // in erc32 simulator:
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68 // 4 = UART A
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69 // 5 = UART B
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70 // 7 = UART error
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71 // 12 = GPT (general purpose timer)
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72 // 13 = RTC (realtime clock)
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73 // 15 = watchdog
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74
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75 // in erc32 simulator:
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76
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77 // The vector used by the Real time clock is defined in hal_xpic.h
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78
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79 // We could place conditional code here to choose one clock or the other
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80 // depending on the selected interrupt vector... but pro tem: (pun intended)
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81
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82 #define SPARC_MEC_RTC_CLOCK_SCALE (5)
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83
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84 /* These must be accessed word-wide to work! */
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85
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86 #define SPARC_MEC_RTC (0x01f80080)
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87
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88 #define SPARC_MEC_RTC_COUNTER (SPARC_MEC_RTC + 0)
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89 #define SPARC_MEC_RTC_SCALER (SPARC_MEC_RTC + 4)
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90
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91 #define SPARC_MEC_GPT_COUNTER (SPARC_MEC_RTC + 8)
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92 #define SPARC_MEC_GPT_SCALER (SPARC_MEC_RTC + 0x0c)
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93
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94 /* MEC timer control register bits */
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95 #define SPARC_MEC_TCR_GACR 1 /* Continuous Running */
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96 #define SPARC_MEC_TCR_GACL 2 /* Counter Load */
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97 #define SPARC_MEC_TCR_GASE 4 /* System Enable */
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98 #define SPARC_MEC_TCR_GASL 8 /* not used */
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99 #define SPARC_MEC_TCR_TCRCR 0x100 /* Continuous Running */
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100 #define SPARC_MEC_TCR_TCRCL 0x200 /* Counter Load */
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101 #define SPARC_MEC_TCR_TCRSE 0x400 /* System Enable */
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102 #define SPARC_MEC_TCR_TCRSL 0x800 /* not used */
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103
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104 #define SPARC_MEC_RTC_CONTROL (SPARC_MEC_RTC + 0x18)
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105
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106 externC cyg_int32 cyg_hal_sparclite_clock_period;
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107
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108 #define HAL_CLOCK_INITIALIZE( _period_ ) CYG_MACRO_START \
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109 HAL_WRITE_UINT32( SPARC_MEC_RTC_SCALER, SPARC_MEC_RTC_CLOCK_SCALE );\
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110 cyg_hal_sparclite_clock_period = (_period_); \
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111 HAL_WRITE_UINT32( SPARC_MEC_RTC_COUNTER, (_period_) ); \
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112 HAL_WRITE_UINT32( SPARC_MEC_RTC_CONTROL, \
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113 (SPARC_MEC_TCR_TCRCR | \
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114 SPARC_MEC_TCR_TCRCL | \
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115 SPARC_MEC_TCR_TCRSE) ); \
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116 CYG_MACRO_END
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117
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118 #define HAL_CLOCK_RESET( _vector_, _period_ ) /* nowt, it is freerunning */
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119
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120 #define HAL_CLOCK_READ( _pvalue_ ) CYG_MACRO_START \
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121 cyg_uint32 _read_; \
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122 HAL_READ_UINT32( SPARC_MEC_RTC_COUNTER, _read_ ); \
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123 *((cyg_uint32 *)(_pvalue_)) = \
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124 (cyg_hal_sparclite_clock_period - _read_ ); \
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125 CYG_MACRO_END
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126
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127
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128 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
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129 #define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( _pvalue_ )
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130 #endif
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131
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132 //-----------------------------------------------------------------------------
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133 #endif // ifndef CYGONCE_HAL_CLOCK_H
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134 // End of hal_clock.h