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| author | alexs |
|---|---|
| date | Mon, 12 Oct 2009 02:26:09 +0100 |
| parents | d2c90368aeef |
| children |
| rev | line source |
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| 2 | 1 //============================================================================= |
| 2 // | |
| 3 // hal_priv.c | |
| 4 // | |
| 5 // SPARClite Architecture sim-specific private variables | |
| 6 // | |
| 7 //============================================================================= | |
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8 //####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
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12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later version. |
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16 // |
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17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
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18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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20 // for more details. |
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21 // |
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22 // You should have received a copy of the GNU General Public License along |
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23 // with eCos; if not, write to the Free Software Foundation, Inc., |
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
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25 // |
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26 // As a special exception, if other files instantiate templates or use macros |
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27 // or inline functions from this file, or you compile this file and link it |
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28 // with other works to produce a work based on this file, this file does not |
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29 // by itself cause the resulting work to be covered by the GNU General Public |
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30 // License. However the source code for this file must still be made available |
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31 // in accordance with section (3) of the GNU General Public License. |
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32 // |
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33 // This exception does not invalidate any other reasons why a work based on |
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34 // this file might be covered by the GNU General Public License. |
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35 // |
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36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
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210
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37 // at http://sources.redhat.com/ecos/ecos-license/ |
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38 // ------------------------------------------- |
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39 //####ECOSGPLCOPYRIGHTEND#### |
| 2 | 40 //============================================================================= |
| 41 //#####DESCRIPTIONBEGIN#### | |
| 42 // | |
| 43 // Author(s): hmt | |
| 44 // Contributors:hmt | |
| 45 // Date: 1998-12-10 | |
| 46 // Purpose: private vars for SPARClite sim. | |
| 47 // | |
| 48 //####DESCRIPTIONEND#### | |
| 49 // | |
| 50 //============================================================================= | |
| 51 | |
| 52 | |
| 53 #include <pkgconf/system.h> | |
| 54 #include <pkgconf/hal.h> | |
| 55 #include <pkgconf/hal_sparclite.h> | |
| 56 #include <pkgconf/hal_sparclite_sleb.h> | |
| 57 | |
| 58 #include <cyg/infra/cyg_type.h> | |
| 59 #include <cyg/hal/hal_intr.h> | |
| 60 #include <cyg/hal/hal_arch.h> | |
| 61 | |
| 62 #ifdef CYGPKG_KERNEL | |
| 63 #include <pkgconf/kernel.h> // CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT | |
| 64 #endif | |
| 65 | |
| 66 #include <cyg/hal/hal_clock.h> | |
| 67 | |
| 68 // ------------------------------------------------------------------------ | |
| 69 // Clock static to keep period recorded. | |
| 70 cyg_int32 cyg_hal_sparclite_clock_period = 0; | |
| 71 | |
| 72 /* Address of clock switch */ | |
| 73 #define CLKSW_ADDR 0x01000003 | |
| 74 | |
| 75 #define HAL_SPARC_86940_TIMER1_CONTROL_INIT ( \ | |
| 76 0 | \ | |
| 77 HAL_SPARC_86940_TCR_CLKPRS | \ | |
| 78 HAL_SPARC_86940_TCR_OUTLOW ) | |
| 79 // Disable, CLKSEL=prescale(2), periodic interrupts, gate 0 | |
| 80 // and lower the output: OUTCTL = 2 | |
| 81 | |
| 82 #define HAL_SPARC_86940_TIMER1_CONTROL_ENABLE ( \ | |
| 83 HAL_SPARC_86940_TCR_CE | \ | |
| 84 HAL_SPARC_86940_TCR_CLKPRS | \ | |
| 85 HAL_SPARC_86940_TCR_OUTSAME ) | |
| 86 // Enable + .... and no change to the output: OUTCTL = 0 | |
| 87 | |
| 88 void hal_clock_initialize( cyg_uint32 p ) | |
| 89 { | |
| 90 cyg_uint32 ints; | |
| 91 cyg_uint32 clk; | |
| 92 HAL_DISABLE_INTERRUPTS( ints ); | |
| 93 | |
| 94 HAL_SPARC_86940_TIMER1_CONTROL_WRITE( | |
| 95 HAL_SPARC_86940_TIMER1_CONTROL_INIT ); // Make sure it's disabled | |
| 96 | |
| 97 // Clear any pending interrupts: | |
| 98 HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_RTC ); | |
| 99 | |
| 100 clk = *(unsigned char *)CLKSW_ADDR; | |
| 101 if (clk & 0x80) | |
| 102 clk = 10; | |
| 103 | |
| 104 /* could be 10 - 62 MHz */ | |
| 105 clk = (clk & 0x3f); /* in MHz */ | |
| 106 // BUT the 86940 is internally clocked at half that speed (page 20 RHS) | |
| 107 clk >>= 1; | |
| 108 // so the clock is now the number of system ticks we want per counter | |
| 109 // tick... | |
| 110 HAL_SPARC_86940_TIMER1_PRESCALER_WRITE( | |
| 111 0 /* internal clock */ | | |
| 112 HAL_SPARC_86940_PRS_ODIV1 | | |
| 113 clk ); | |
| 114 // should give 1MHz on the externally visible counter... | |
| 115 HAL_SPARC_86940_TIMER1_CONTROL_WRITE( | |
| 116 HAL_SPARC_86940_TIMER1_CONTROL_INIT ); | |
| 117 HAL_SPARC_86940_TIMER1_RELOAD_WRITE( p ); | |
| 118 HAL_SPARC_86940_TIMER1_CONTROL_WRITE( | |
| 119 HAL_SPARC_86940_TIMER1_CONTROL_ENABLE ); | |
| 120 HAL_SPARC_86940_TIMER1_RELOAD_WRITE( p ); | |
| 121 cyg_hal_sparclite_clock_period = p; | |
| 122 HAL_RESTORE_INTERRUPTS( ints ); | |
| 123 } | |
| 124 | |
| 125 // ------------------------------------------------------------------------ | |
| 126 | |
| 127 #ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON | |
| 128 #include <cyg/hal/hal_cygm.h> // CygMon vector table & layout | |
| 129 | |
| 130 static struct { int eCosV, CygMonV; } setup[] = { | |
| 131 { CYGNUM_HAL_VECTOR_OTHERS , BSP_EXC_TRAP }, | |
| 132 { CYGNUM_HAL_VECTOR_FETCH_ABORT , BSP_EXC_IACCESS }, | |
| 133 { CYGNUM_HAL_VECTOR_ILLEGAL_OP , BSP_EXC_ILL }, | |
| 134 { CYGNUM_HAL_VECTOR_PRIV_OP , BSP_EXC_IPRIV }, | |
| 135 { CYGNUM_HAL_VECTOR_UNALIGNED , BSP_EXC_ALIGN }, | |
| 136 { CYGNUM_HAL_VECTOR_DATA_ABORT , BSP_EXC_DACCESS }, | |
| 137 }; | |
| 138 | |
| 139 #endif // CYG_HAL_USE_ROM_MONITOR_CYGMON | |
| 140 | |
| 141 // ------------------------------------------------------------------------ | |
| 142 // Board specific startups. | |
| 143 | |
| 144 extern void hal_board_prestart( void ); | |
| 145 extern void hal_board_poststart( void ); | |
| 146 | |
| 147 #define SLEB_LED (*(volatile char *)(0x02000003)) | |
| 148 | |
| 149 #define LED( _x_ ) SLEB_LED = (char)(0xff & ~(_x_)) | |
| 150 | |
| 151 void hal_board_prestart( void ) | |
| 152 { | |
| 153 | |
| 154 LED( 0xc0 ); | |
| 155 | |
| 156 // Disable default clocks &c | |
| 157 HAL_SPARC_86940_TIMER1_PRESCALER_WRITE( 1 ); // as if at reset | |
| 158 HAL_SPARC_86940_TIMER1_CONTROL_WRITE( 0 ); // as if at reset | |
| 159 | |
| 160 #ifdef CYG_HAL_USE_ROM_MONITOR_CYGMON | |
| 161 // then initialize our vectors to point to (or bounce to) | |
| 162 // CygMon's equivalent functionality. | |
| 163 { | |
| 164 extern void hal_user_trap_to_cygmon_vsr( void ); | |
| 165 extern void hal_nofpcp_trap_to_cygmon_vsr( void ); | |
| 166 extern void hal_nmi_handler( void ); | |
| 167 int i; | |
| 168 | |
| 169 HAL_VSR_SET( CYGNUM_HAL_VECTOR_USER_TRAP, | |
| 170 (CYG_ADDRESS)hal_user_trap_to_cygmon_vsr, NULL ); | |
| 171 | |
| 172 HAL_VSR_SET( CYGNUM_HAL_VECTOR_NOFPCP, | |
| 173 (CYG_ADDRESS)hal_nofpcp_trap_to_cygmon_vsr, NULL ); | |
| 174 | |
| 175 for ( i = 0; i < sizeof(setup)/sizeof(setup[0]); i++ ) | |
| 176 HAL_VSR_SET( setup[i].eCosV, | |
| 177 CYGMON_VECTOR_TABLE[ setup[i].CygMonV ], NULL ); | |
| 178 | |
| 179 // Just point this one straight though, and unmask it. | |
| 180 // That way CygMon looks after ^Cs itself. | |
| 181 HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_10, | |
| 182 CYGMON_VECTOR_TABLE[ BSP_EXC_INT10 ], NULL ); | |
| 183 HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_10 ); | |
| 184 | |
| 185 // Just point this one straight though, and unmask it. | |
| 186 // That way CygMon looks after the Ethernet itself. | |
| 187 HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_14, | |
| 188 CYGMON_VECTOR_TABLE[ BSP_EXC_INT14 ], NULL ); | |
| 189 HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_14 ); | |
| 190 | |
| 191 // Install handler for the NMI button on the board | |
| 192 HAL_VSR_SET( CYGNUM_HAL_VECTOR_INTERRUPT_15, | |
| 193 (CYG_ADDRESS)hal_nmi_handler, NULL ); | |
| 194 HAL_INTERRUPT_UNMASK( CYGNUM_HAL_VECTOR_INTERRUPT_15 ); | |
| 195 | |
| 196 LED( 0xc4 ); | |
| 197 | |
| 198 #ifdef CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT | |
| 199 { | |
| 200 extern void patch_dbg_syscalls(void * vector); | |
| 201 patch_dbg_syscalls( (void *)CYGMON_VECTOR_TABLE ); | |
| 202 } | |
| 203 #endif // CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT | |
| 204 | |
| 205 } | |
| 206 #endif // CYG_HAL_USE_ROM_MONITOR_CYGMON | |
| 207 | |
| 208 LED( 0xc8 ); | |
| 209 } | |
| 210 | |
| 211 void hal_board_poststart( void ) | |
| 212 { | |
| 213 LED( 0xe0 ); | |
| 214 HAL_ENABLE_INTERRUPTS(); | |
| 215 LED( 0xf0 ); | |
| 216 } | |
| 217 | |
| 218 | |
| 219 // EOF hal_priv.c |