Mercurial > flash_v2
comparison packages/kernel/current/ChangeLog @ 34:29bc183297e1 ecos-sw-1999-09-02
Merge from eCos master repository on 1999-09-02-16:26:10-BST
| author | jlarmour |
|---|---|
| date | Thu, 02 Sep 1999 16:11:22 +0000 |
| parents | 641b639be825 |
| children | e97d78785e2d |
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| 33:7a567ebab069 | 34:29bc183297e1 |
|---|---|
| 1 1999-08-25 Jonathan Larmour <jlarmour@cygnus.co.uk> | |
| 2 | |
| 3 * include/pkgconf/kernel.h: Add missing close brace in | |
| 4 CYGIMP_KERNEL_COUNTERS_CLOCK_LATENCY CDL. | |
| 5 | |
| 6 1999-08-24 Nick Garnett <nickg@cygnus.co.uk> | |
| 7 | |
| 8 * tests/kcache1.c (entry0): Depending on architecture, set | |
| 9 cyg_test_is_simulator for last two tests. Otherwise they take far | |
| 10 too long and time out. | |
| 11 | |
| 12 1999-08-23 Hugo Tyson <hmt@cygnus.co.uk> | |
| 13 | |
| 14 * tests/intr0.cxx (vsr0): | |
| 15 * tests/kintr0.c (vsr0): | |
| 16 Add a comment to the effect that vsr0() is NOT a valid VSR on any | |
| 17 known platform; VSRs must be writ in assembler. Customer | |
| 18 requested this, the examples are rather confusing otherwise. | |
| 19 | |
| 20 1999-08-23 Nick Garnett <nickg@cygnus.co.uk> | |
| 21 | |
| 22 * include/pkgconf/kernel.h: | |
| 23 * src/common/clock.cxx: | |
| 24 * tests/tm_basic.cxx: | |
| 25 Added CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY to enable recording | |
| 26 of DSR latency figures. Added code controlled by this option to | |
| 27 clock and tm_basic. Also made interrupt latency measurement | |
| 28 primarily dependent on CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY since | |
| 29 whether HAL_CLOCK_LATENCY is defined is not sufficient. | |
| 30 | |
| 1 1999-08-16 Jonathan Larmour <jlarmour@cygnus.co.uk> | 31 1999-08-16 Jonathan Larmour <jlarmour@cygnus.co.uk> |
| 2 | 32 |
| 3 * src/sload/sload.c: Rename AM32 to AM31 | 33 * src/sload/sload.c: Rename AM32 to AM31 |
| 4 | 34 |
| 5 1999-08-12 Nick Garnett <nickg@cygnus.co.uk> | 35 1999-08-12 Nick Garnett <nickg@cygnus.co.uk> |
