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comparison packages/kernel/current/tests/kcache1.c @ 24:306eee292492 ecos-sw-1999-07-16

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Merge from eCos master repository on 1999-07-16-05:47:06-BST
author jlarmour
date Fri, 16 Jul 1999 21:54:32 +0000
parents d3fbcdfa1b2f
children 29bc183297e1
comparison
equal deleted inserted replaced
23:8883a9947b66 24:306eee292492
126 time0(i); 126 time0(i);
127 } 127 }
128 } 128 }
129 129
130 // ------------------------------------------------------------------------- 130 // -------------------------------------------------------------------------
131 // With an ICache invalidate in the middle:
132 #ifdef HAL_ICACHE_INVALIDATE_ALL
133 static void time0II(register cyg_uint32 stride)
134 {
135 register cyg_uint32 j,k;
136 cyg_tick_count_t count0, count1;
137 cyg_ucount32 t;
138 register char c;
139
140 count0 = cyg_current_time();
141
142 k = 0;
143 if ( cyg_test_is_simulator )
144 k = 3960;
145
146 for(; k<4000;k++) {
147 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
148 HAL_ICACHE_INVALIDATE_ALL();
149 c=m[stride*j];
150 }
151 }
152
153 count1 = cyg_current_time();
154 t = count1 - count0;
155 diag_printf("stride=%d, time=%d\n", stride, t);
156 }
157
158 // -------------------------------------------------------------------------
159
160 void time1II(void)
161 {
162 cyg_uint32 i;
163
164 for(i=1; i<=MAX_STRIDE; i+=i) {
165 time0II(i);
166 }
167 }
168 #endif
169 // -------------------------------------------------------------------------
170 // With a DCache invalidate in the middle:
171 #ifdef HAL_DCACHE_INVALIDATE_ALL
172 static void time0DI(register cyg_uint32 stride)
173 {
174 register cyg_uint32 j,k;
175 cyg_tick_count_t count0, count1;
176 cyg_ucount32 t;
177 register char c;
178
179 count0 = cyg_current_time();
180
181 HAL_DCACHE_SYNC();
182
183 k = 0;
184 if ( cyg_test_is_simulator )
185 k = 3960;
186
187 for(; k<4000;k++) {
188 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
189 HAL_DCACHE_INVALIDATE_ALL();
190 c=m[stride*j];
191 }
192 }
193
194 count1 = cyg_current_time();
195 t = count1 - count0;
196 diag_printf("stride=%d, time=%d\n", stride, t);
197 }
198
199 // -------------------------------------------------------------------------
200
201 void time1DI(void)
202 {
203 cyg_uint32 i;
204
205 for(i=1; i<=MAX_STRIDE; i+=i) {
206 time0DI(i);
207 }
208 }
209 #endif
210 // -------------------------------------------------------------------------
131 // This test could be improved by counting number of passes possible 211 // This test could be improved by counting number of passes possible
132 // in a given number of ticks. 212 // in a given number of ticks.
133 213
134 static void entry0( cyg_addrword_t data ) 214 static void entry0( cyg_addrword_t data )
135 { 215 {
201 HAL_ICACHE_INVALIDATE_ALL(); 281 HAL_ICACHE_INVALIDATE_ALL();
202 HAL_DCACHE_INVALIDATE_ALL(); 282 HAL_DCACHE_INVALIDATE_ALL();
203 HAL_ICACHE_DISABLE(); 283 HAL_ICACHE_DISABLE();
204 HAL_DCACHE_DISABLE(); 284 HAL_DCACHE_DISABLE();
205 HAL_RESTORE_INTERRUPTS(oldints); 285 HAL_RESTORE_INTERRUPTS(oldints);
206 CYG_TEST_INFO("Dcache off Icache off"); 286 CYG_TEST_INFO("Dcache off Icache off (again)");
207 time1(); 287 time1();
288
289 #if defined(HAL_DCACHE_INVALIDATE_ALL) || defined(HAL_ICACHE_INVALIDATE_ALL)
290 HAL_DISABLE_INTERRUPTS(oldints);
291 HAL_DCACHE_PURGE_ALL();
292 HAL_ICACHE_INVALIDATE_ALL();
293 HAL_DCACHE_INVALIDATE_ALL();
294 HAL_ICACHE_ENABLE();
295 HAL_DCACHE_ENABLE();
296 HAL_RESTORE_INTERRUPTS(oldints);
297 CYG_TEST_INFO("Dcache on Icache on (again)");
298 time1();
299
300 #ifdef HAL_ICACHE_INVALIDATE_ALL
301 HAL_DISABLE_INTERRUPTS(oldints);
302 HAL_DCACHE_PURGE_ALL();
303 HAL_ICACHE_INVALIDATE_ALL();
304 HAL_DCACHE_INVALIDATE_ALL();
305 HAL_ICACHE_ENABLE();
306 HAL_DCACHE_ENABLE();
307 HAL_RESTORE_INTERRUPTS(oldints);
308 CYG_TEST_INFO("Dcache on Icache on: invalidate ICache each time");
309 time1II();
310 #endif
311 #ifdef HAL_DCACHE_INVALIDATE_ALL
312 HAL_DISABLE_INTERRUPTS(oldints);
313 HAL_DCACHE_PURGE_ALL();
314 HAL_ICACHE_INVALIDATE_ALL();
315 HAL_DCACHE_INVALIDATE_ALL();
316 HAL_ICACHE_ENABLE();
317 HAL_DCACHE_ENABLE();
318 HAL_RESTORE_INTERRUPTS(oldints);
319 CYG_TEST_INFO("Dcache on Icache on: invalidate DCache (expect bogus times)");
320 time1DI();
321 #endif
322 #endif // either INVALIDATE_ALL macro
208 323
209 #endif // HAL_CACHE_UNIFIED 324 #endif // HAL_CACHE_UNIFIED
210 325
211 CYG_TEST_PASS_FINISH("End of test"); 326 CYG_TEST_PASS_FINISH("End of test");
212 } 327 }